1 /* Convert RTL to assembler code and output it, for GNU compiler. 2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 4 Free Software Foundation, Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it under 9 the terms of the GNU General Public License as published by the Free 10 Software Foundation; either version 3, or (at your option) any later 11 version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 /* This is the final pass of the compiler. 23 It looks at the rtl code for a function and outputs assembler code. 24 25 Call `final_start_function' to output the assembler code for function entry, 26 `final' to output assembler code for some RTL code, 27 `final_end_function' to output assembler code for function exit. 28 If a function is compiled in several pieces, each piece is 29 output separately with `final'. 30 31 Some optimizations are also done at this level. 32 Move instructions that were made unnecessary by good register allocation 33 are detected and omitted from the output. (Though most of these 34 are removed by the last jump pass.) 35 36 Instructions to set the condition codes are omitted when it can be 37 seen that the condition codes already had the desired values. 38 39 In some cases it is sufficient if the inherited condition codes 40 have related values, but this may require the following insn 41 (the one that tests the condition codes) to be modified. 42 43 The code for the function prologue and epilogue are generated 44 directly in assembler by the target functions function_prologue and 45 function_epilogue. Those instructions never exist as rtl. */ 46 47 #include "config.h" 48 #include "system.h" 49 #include "coretypes.h" 50 #include "tm.h" 51 52 #include "tree.h" 53 #include "rtl.h" 54 #include "tm_p.h" 55 #include "regs.h" 56 #include "insn-config.h" 57 #include "insn-attr.h" 58 #include "recog.h" 59 #include "conditions.h" 60 #include "flags.h" 61 #include "real.h" 62 #include "hard-reg-set.h" 63 #include "output.h" 64 #include "except.h" 65 #include "function.h" 66 #include "toplev.h" 67 #include "reload.h" 68 #include "intl.h" 69 #include "basic-block.h" 70 #include "target.h" 71 #include "debug.h" 72 #include "expr.h" 73 #include "cfglayout.h" 74 #include "tree-pass.h" 75 #include "tree-flow.h" 76 #include "timevar.h" 77 #include "cgraph.h" 78 #include "coverage.h" 79 #include "df.h" 80 #include "vecprim.h" 81 #include "ggc.h" 82 #include "cfgloop.h" 83 #include "params.h" 84 85 #ifdef XCOFF_DEBUGGING_INFO 86 #include "xcoffout.h" /* Needed for external data 87 declarations for e.g. AIX 4.x. */ 88 #endif 89 90 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO) 91 #include "dwarf2out.h" 92 #endif 93 94 #ifdef DBX_DEBUGGING_INFO 95 #include "dbxout.h" 96 #endif 97 98 #ifdef SDB_DEBUGGING_INFO 99 #include "sdbout.h" 100 #endif 101 102 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a 103 null default for it to save conditionalization later. */ 104 #ifndef CC_STATUS_INIT 105 #define CC_STATUS_INIT 106 #endif 107 108 /* How to start an assembler comment. */ 109 #ifndef ASM_COMMENT_START 110 #define ASM_COMMENT_START ";#" 111 #endif 112 113 /* Is the given character a logical line separator for the assembler? */ 114 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR 115 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') 116 #endif 117 118 #ifndef JUMP_TABLES_IN_TEXT_SECTION 119 #define JUMP_TABLES_IN_TEXT_SECTION 0 120 #endif 121 122 /* Bitflags used by final_scan_insn. */ 123 #define SEEN_BB 1 124 #define SEEN_NOTE 2 125 #define SEEN_EMITTED 4 126 127 /* Last insn processed by final_scan_insn. */ 128 static rtx debug_insn; 129 rtx current_output_insn; 130 131 /* Line number of last NOTE. */ 132 static int last_linenum; 133 134 /* Last discriminator written to assembly. */ 135 static int last_discriminator; 136 137 /* Discriminator of current block. */ 138 static int discriminator; 139 140 /* Highest line number in current block. */ 141 static int high_block_linenum; 142 143 /* Likewise for function. */ 144 static int high_function_linenum; 145 146 /* Filename of last NOTE. */ 147 static const char *last_filename; 148 149 /* Override filename and line number. */ 150 static const char *override_filename; 151 static int override_linenum; 152 153 /* Whether to force emission of a line note before the next insn. */ 154 static bool force_source_line = false; 155 156 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ 157 158 /* Nonzero while outputting an `asm' with operands. 159 This means that inconsistencies are the user's fault, so don't die. 160 The precise value is the insn being output, to pass to error_for_asm. */ 161 rtx this_is_asm_operands; 162 163 /* Number of operands of this insn, for an `asm' with operands. */ 164 static unsigned int insn_noperands; 165 166 /* Compare optimization flag. */ 167 168 static rtx last_ignored_compare = 0; 169 170 /* Assign a unique number to each insn that is output. 171 This can be used to generate unique local labels. */ 172 173 static int insn_counter = 0; 174 175 #ifdef HAVE_cc0 176 /* This variable contains machine-dependent flags (defined in tm.h) 177 set and examined by output routines 178 that describe how to interpret the condition codes properly. */ 179 180 CC_STATUS cc_status; 181 182 /* During output of an insn, this contains a copy of cc_status 183 from before the insn. */ 184 185 CC_STATUS cc_prev_status; 186 #endif 187 188 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ 189 190 static int block_depth; 191 192 /* Nonzero if have enabled APP processing of our assembler output. */ 193 194 static int app_on; 195 196 /* If we are outputting an insn sequence, this contains the sequence rtx. 197 Zero otherwise. */ 198 199 rtx final_sequence; 200 201 #ifdef ASSEMBLER_DIALECT 202 203 /* Number of the assembler dialect to use, starting at 0. */ 204 static int dialect_number; 205 #endif 206 207 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ 208 rtx current_insn_predicate; 209 210 /* True if printing into -fdump-final-insns= dump. */ 211 bool final_insns_dump_p; 212 213 #ifdef HAVE_ATTR_length 214 static int asm_insn_count (rtx); 215 #endif 216 static void profile_function (FILE *); 217 static void profile_after_prologue (FILE *); 218 static bool notice_source_line (rtx, bool *); 219 static rtx walk_alter_subreg (rtx *, bool *); 220 static void output_asm_name (void); 221 static void output_alternate_entry_point (FILE *, rtx); 222 static tree get_mem_expr_from_op (rtx, int *); 223 static void output_asm_operand_names (rtx *, int *, int); 224 static void output_operand (rtx, int); 225 #ifdef LEAF_REGISTERS 226 static void leaf_renumber_regs (rtx); 227 #endif 228 #ifdef HAVE_cc0 229 static int alter_cond (rtx); 230 #endif 231 #ifndef ADDR_VEC_ALIGN 232 static int final_addr_vec_align (rtx); 233 #endif 234 #ifdef HAVE_ATTR_length 235 static int align_fuzz (rtx, rtx, int, unsigned); 236 #endif 237 238 /* Initialize data in final at the beginning of a compilation. */ 239 240 void 241 init_final (const char *filename ATTRIBUTE_UNUSED) 242 { 243 app_on = 0; 244 final_sequence = 0; 245 246 #ifdef ASSEMBLER_DIALECT 247 dialect_number = ASSEMBLER_DIALECT; 248 #endif 249 } 250 251 /* Default target function prologue and epilogue assembler output. 252 253 If not overridden for epilogue code, then the function body itself 254 contains return instructions wherever needed. */ 255 void 256 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, 257 HOST_WIDE_INT size ATTRIBUTE_UNUSED) 258 { 259 } 260 261 /* Default target hook that outputs nothing to a stream. */ 262 void 263 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) 264 { 265 } 266 267 /* Enable APP processing of subsequent output. 268 Used before the output from an `asm' statement. */ 269 270 void 271 app_enable (void) 272 { 273 if (! app_on) 274 { 275 fputs (ASM_APP_ON, asm_out_file); 276 app_on = 1; 277 } 278 } 279 280 /* Disable APP processing of subsequent output. 281 Called from varasm.c before most kinds of output. */ 282 283 void 284 app_disable (void) 285 { 286 if (app_on) 287 { 288 fputs (ASM_APP_OFF, asm_out_file); 289 app_on = 0; 290 } 291 } 292 293 /* Return the number of slots filled in the current 294 delayed branch sequence (we don't count the insn needing the 295 delay slot). Zero if not in a delayed branch sequence. */ 296 297 #ifdef DELAY_SLOTS 298 int 299 dbr_sequence_length (void) 300 { 301 if (final_sequence != 0) 302 return XVECLEN (final_sequence, 0) - 1; 303 else 304 return 0; 305 } 306 #endif 307 308 /* The next two pages contain routines used to compute the length of an insn 309 and to shorten branches. */ 310 311 /* Arrays for insn lengths, and addresses. The latter is referenced by 312 `insn_current_length'. */ 313 314 static int *insn_lengths; 315 316 VEC(int,heap) *insn_addresses_; 317 318 /* Max uid for which the above arrays are valid. */ 319 static int insn_lengths_max_uid; 320 321 /* Address of insn being processed. Used by `insn_current_length'. */ 322 int insn_current_address; 323 324 /* Address of insn being processed in previous iteration. */ 325 int insn_last_address; 326 327 /* known invariant alignment of insn being processed. */ 328 int insn_current_align; 329 330 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] 331 gives the next following alignment insn that increases the known 332 alignment, or NULL_RTX if there is no such insn. 333 For any alignment obtained this way, we can again index uid_align with 334 its uid to obtain the next following align that in turn increases the 335 alignment, till we reach NULL_RTX; the sequence obtained this way 336 for each insn we'll call the alignment chain of this insn in the following 337 comments. */ 338 339 struct label_alignment 340 { 341 short alignment; 342 short max_skip; 343 }; 344 345 static rtx *uid_align; 346 static int *uid_shuid; 347 static struct label_alignment *label_align; 348 349 /* Indicate that branch shortening hasn't yet been done. */ 350 351 void 352 init_insn_lengths (void) 353 { 354 if (uid_shuid) 355 { 356 free (uid_shuid); 357 uid_shuid = 0; 358 } 359 if (insn_lengths) 360 { 361 free (insn_lengths); 362 insn_lengths = 0; 363 insn_lengths_max_uid = 0; 364 } 365 #ifdef HAVE_ATTR_length 366 INSN_ADDRESSES_FREE (); 367 #endif 368 if (uid_align) 369 { 370 free (uid_align); 371 uid_align = 0; 372 } 373 } 374 375 /* Obtain the current length of an insn. If branch shortening has been done, 376 get its actual length. Otherwise, use FALLBACK_FN to calculate the 377 length. */ 378 static inline int 379 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED, 380 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED) 381 { 382 #ifdef HAVE_ATTR_length 383 rtx body; 384 int i; 385 int length = 0; 386 387 if (insn_lengths_max_uid > INSN_UID (insn)) 388 return insn_lengths[INSN_UID (insn)]; 389 else 390 switch (GET_CODE (insn)) 391 { 392 case NOTE: 393 case BARRIER: 394 case CODE_LABEL: 395 case DEBUG_INSN: 396 return 0; 397 398 case CALL_INSN: 399 length = fallback_fn (insn); 400 break; 401 402 case JUMP_INSN: 403 body = PATTERN (insn); 404 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 405 { 406 /* Alignment is machine-dependent and should be handled by 407 ADDR_VEC_ALIGN. */ 408 } 409 else 410 length = fallback_fn (insn); 411 break; 412 413 case INSN: 414 body = PATTERN (insn); 415 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) 416 return 0; 417 418 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 419 length = asm_insn_count (body) * fallback_fn (insn); 420 else if (GET_CODE (body) == SEQUENCE) 421 for (i = 0; i < XVECLEN (body, 0); i++) 422 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); 423 else 424 length = fallback_fn (insn); 425 break; 426 427 default: 428 break; 429 } 430 431 #ifdef ADJUST_INSN_LENGTH 432 ADJUST_INSN_LENGTH (insn, length); 433 #endif 434 return length; 435 #else /* not HAVE_ATTR_length */ 436 return 0; 437 #define insn_default_length 0 438 #define insn_min_length 0 439 #endif /* not HAVE_ATTR_length */ 440 } 441 442 /* Obtain the current length of an insn. If branch shortening has been done, 443 get its actual length. Otherwise, get its maximum length. */ 444 int 445 get_attr_length (rtx insn) 446 { 447 return get_attr_length_1 (insn, insn_default_length); 448 } 449 450 /* Obtain the current length of an insn. If branch shortening has been done, 451 get its actual length. Otherwise, get its minimum length. */ 452 int 453 get_attr_min_length (rtx insn) 454 { 455 return get_attr_length_1 (insn, insn_min_length); 456 } 457 458 /* Code to handle alignment inside shorten_branches. */ 459 460 /* Here is an explanation how the algorithm in align_fuzz can give 461 proper results: 462 463 Call a sequence of instructions beginning with alignment point X 464 and continuing until the next alignment point `block X'. When `X' 465 is used in an expression, it means the alignment value of the 466 alignment point. 467 468 Call the distance between the start of the first insn of block X, and 469 the end of the last insn of block X `IX', for the `inner size of X'. 470 This is clearly the sum of the instruction lengths. 471 472 Likewise with the next alignment-delimited block following X, which we 473 shall call block Y. 474 475 Call the distance between the start of the first insn of block X, and 476 the start of the first insn of block Y `OX', for the `outer size of X'. 477 478 The estimated padding is then OX - IX. 479 480 OX can be safely estimated as 481 482 if (X >= Y) 483 OX = round_up(IX, Y) 484 else 485 OX = round_up(IX, X) + Y - X 486 487 Clearly est(IX) >= real(IX), because that only depends on the 488 instruction lengths, and those being overestimated is a given. 489 490 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so 491 we needn't worry about that when thinking about OX. 492 493 When X >= Y, the alignment provided by Y adds no uncertainty factor 494 for branch ranges starting before X, so we can just round what we have. 495 But when X < Y, we don't know anything about the, so to speak, 496 `middle bits', so we have to assume the worst when aligning up from an 497 address mod X to one mod Y, which is Y - X. */ 498 499 #ifndef LABEL_ALIGN 500 #define LABEL_ALIGN(LABEL) align_labels_log 501 #endif 502 503 #ifndef LABEL_ALIGN_MAX_SKIP 504 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip 505 #endif 506 507 #ifndef LOOP_ALIGN 508 #define LOOP_ALIGN(LABEL) align_loops_log 509 #endif 510 511 #ifndef LOOP_ALIGN_MAX_SKIP 512 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip 513 #endif 514 515 #ifndef LABEL_ALIGN_AFTER_BARRIER 516 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 517 #endif 518 519 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 520 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0 521 #endif 522 523 #ifndef JUMP_ALIGN 524 #define JUMP_ALIGN(LABEL) align_jumps_log 525 #endif 526 527 #ifndef JUMP_ALIGN_MAX_SKIP 528 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip 529 #endif 530 531 #ifndef ADDR_VEC_ALIGN 532 static int 533 final_addr_vec_align (rtx addr_vec) 534 { 535 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); 536 537 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) 538 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; 539 return exact_log2 (align); 540 541 } 542 543 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) 544 #endif 545 546 #ifndef INSN_LENGTH_ALIGNMENT 547 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log 548 #endif 549 550 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) 551 552 static int min_labelno, max_labelno; 553 554 #define LABEL_TO_ALIGNMENT(LABEL) \ 555 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) 556 557 #define LABEL_TO_MAX_SKIP(LABEL) \ 558 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) 559 560 /* For the benefit of port specific code do this also as a function. */ 561 562 int 563 label_to_alignment (rtx label) 564 { 565 if (CODE_LABEL_NUMBER (label) <= max_labelno) 566 return LABEL_TO_ALIGNMENT (label); 567 return 0; 568 } 569 570 int 571 label_to_max_skip (rtx label) 572 { 573 if (CODE_LABEL_NUMBER (label) <= max_labelno) 574 return LABEL_TO_MAX_SKIP (label); 575 return 0; 576 } 577 578 #ifdef HAVE_ATTR_length 579 /* The differences in addresses 580 between a branch and its target might grow or shrink depending on 581 the alignment the start insn of the range (the branch for a forward 582 branch or the label for a backward branch) starts out on; if these 583 differences are used naively, they can even oscillate infinitely. 584 We therefore want to compute a 'worst case' address difference that 585 is independent of the alignment the start insn of the range end 586 up on, and that is at least as large as the actual difference. 587 The function align_fuzz calculates the amount we have to add to the 588 naively computed difference, by traversing the part of the alignment 589 chain of the start insn of the range that is in front of the end insn 590 of the range, and considering for each alignment the maximum amount 591 that it might contribute to a size increase. 592 593 For casesi tables, we also want to know worst case minimum amounts of 594 address difference, in case a machine description wants to introduce 595 some common offset that is added to all offsets in a table. 596 For this purpose, align_fuzz with a growth argument of 0 computes the 597 appropriate adjustment. */ 598 599 /* Compute the maximum delta by which the difference of the addresses of 600 START and END might grow / shrink due to a different address for start 601 which changes the size of alignment insns between START and END. 602 KNOWN_ALIGN_LOG is the alignment known for START. 603 GROWTH should be ~0 if the objective is to compute potential code size 604 increase, and 0 if the objective is to compute potential shrink. 605 The return value is undefined for any other value of GROWTH. */ 606 607 static int 608 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) 609 { 610 int uid = INSN_UID (start); 611 rtx align_label; 612 int known_align = 1 << known_align_log; 613 int end_shuid = INSN_SHUID (end); 614 int fuzz = 0; 615 616 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) 617 { 618 int align_addr, new_align; 619 620 uid = INSN_UID (align_label); 621 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; 622 if (uid_shuid[uid] > end_shuid) 623 break; 624 known_align_log = LABEL_TO_ALIGNMENT (align_label); 625 new_align = 1 << known_align_log; 626 if (new_align < known_align) 627 continue; 628 fuzz += (-align_addr ^ growth) & (new_align - known_align); 629 known_align = new_align; 630 } 631 return fuzz; 632 } 633 634 /* Compute a worst-case reference address of a branch so that it 635 can be safely used in the presence of aligned labels. Since the 636 size of the branch itself is unknown, the size of the branch is 637 not included in the range. I.e. for a forward branch, the reference 638 address is the end address of the branch as known from the previous 639 branch shortening pass, minus a value to account for possible size 640 increase due to alignment. For a backward branch, it is the start 641 address of the branch as known from the current pass, plus a value 642 to account for possible size increase due to alignment. 643 NB.: Therefore, the maximum offset allowed for backward branches needs 644 to exclude the branch size. */ 645 646 int 647 insn_current_reference_address (rtx branch) 648 { 649 rtx dest, seq; 650 int seq_uid; 651 652 if (! INSN_ADDRESSES_SET_P ()) 653 return 0; 654 655 seq = NEXT_INSN (PREV_INSN (branch)); 656 seq_uid = INSN_UID (seq); 657 if (!JUMP_P (branch)) 658 /* This can happen for example on the PA; the objective is to know the 659 offset to address something in front of the start of the function. 660 Thus, we can treat it like a backward branch. 661 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than 662 any alignment we'd encounter, so we skip the call to align_fuzz. */ 663 return insn_current_address; 664 dest = JUMP_LABEL (branch); 665 666 /* BRANCH has no proper alignment chain set, so use SEQ. 667 BRANCH also has no INSN_SHUID. */ 668 if (INSN_SHUID (seq) < INSN_SHUID (dest)) 669 { 670 /* Forward branch. */ 671 return (insn_last_address + insn_lengths[seq_uid] 672 - align_fuzz (seq, dest, length_unit_log, ~0)); 673 } 674 else 675 { 676 /* Backward branch. */ 677 return (insn_current_address 678 + align_fuzz (dest, seq, length_unit_log, ~0)); 679 } 680 } 681 #endif /* HAVE_ATTR_length */ 682 683 /* Compute branch alignments based on frequency information in the 684 CFG. */ 685 686 unsigned int 687 compute_alignments (void) 688 { 689 int log, max_skip, max_log; 690 basic_block bb; 691 int freq_max = 0; 692 int freq_threshold = 0; 693 694 if (label_align) 695 { 696 free (label_align); 697 label_align = 0; 698 } 699 700 max_labelno = max_label_num (); 701 min_labelno = get_first_label_num (); 702 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); 703 704 /* If not optimizing or optimizing for size, don't assign any alignments. */ 705 if (! optimize || optimize_function_for_size_p (cfun)) 706 return 0; 707 708 if (dump_file) 709 { 710 dump_flow_info (dump_file, TDF_DETAILS); 711 flow_loops_dump (dump_file, NULL, 1); 712 loop_optimizer_init (AVOID_CFG_MODIFICATIONS); 713 } 714 FOR_EACH_BB (bb) 715 if (bb->frequency > freq_max) 716 freq_max = bb->frequency; 717 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); 718 719 if (dump_file) 720 fprintf(dump_file, "freq_max: %i\n",freq_max); 721 FOR_EACH_BB (bb) 722 { 723 rtx label = BB_HEAD (bb); 724 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; 725 edge e; 726 edge_iterator ei; 727 728 if (!LABEL_P (label) 729 || optimize_bb_for_size_p (bb)) 730 { 731 if (dump_file) 732 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", 733 bb->index, bb->frequency, bb->loop_father->num, bb->loop_depth); 734 continue; 735 } 736 max_log = LABEL_ALIGN (label); 737 max_skip = LABEL_ALIGN_MAX_SKIP; 738 739 FOR_EACH_EDGE (e, ei, bb->preds) 740 { 741 if (e->flags & EDGE_FALLTHRU) 742 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); 743 else 744 branch_frequency += EDGE_FREQUENCY (e); 745 } 746 if (dump_file) 747 { 748 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", 749 bb->index, bb->frequency, bb->loop_father->num, 750 bb->loop_depth, 751 fallthru_frequency, branch_frequency); 752 if (!bb->loop_father->inner && bb->loop_father->num) 753 fprintf (dump_file, " inner_loop"); 754 if (bb->loop_father->header == bb) 755 fprintf (dump_file, " loop_header"); 756 fprintf (dump_file, "\n"); 757 } 758 759 /* There are two purposes to align block with no fallthru incoming edge: 760 1) to avoid fetch stalls when branch destination is near cache boundary 761 2) to improve cache efficiency in case the previous block is not executed 762 (so it does not need to be in the cache). 763 764 We to catch first case, we align frequently executed blocks. 765 To catch the second, we align blocks that are executed more frequently 766 than the predecessor and the predecessor is likely to not be executed 767 when function is called. */ 768 769 if (!has_fallthru 770 && (branch_frequency > freq_threshold 771 || (bb->frequency > bb->prev_bb->frequency * 10 772 && (bb->prev_bb->frequency 773 <= ENTRY_BLOCK_PTR->frequency / 2)))) 774 { 775 log = JUMP_ALIGN (label); 776 if (dump_file) 777 fprintf(dump_file, " jump alignment added.\n"); 778 if (max_log < log) 779 { 780 max_log = log; 781 max_skip = JUMP_ALIGN_MAX_SKIP; 782 } 783 } 784 /* In case block is frequent and reached mostly by non-fallthru edge, 785 align it. It is most likely a first block of loop. */ 786 if (has_fallthru 787 && optimize_bb_for_speed_p (bb) 788 && branch_frequency + fallthru_frequency > freq_threshold 789 && (branch_frequency 790 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) 791 { 792 log = LOOP_ALIGN (label); 793 if (dump_file) 794 fprintf(dump_file, " internal loop alignment added.\n"); 795 if (max_log < log) 796 { 797 max_log = log; 798 max_skip = LOOP_ALIGN_MAX_SKIP; 799 } 800 } 801 LABEL_TO_ALIGNMENT (label) = max_log; 802 LABEL_TO_MAX_SKIP (label) = max_skip; 803 } 804 805 if (dump_file) 806 { 807 loop_optimizer_finalize (); 808 free_dominance_info (CDI_DOMINATORS); 809 } 810 return 0; 811 } 812 813 struct rtl_opt_pass pass_compute_alignments = 814 { 815 { 816 RTL_PASS, 817 "alignments", /* name */ 818 NULL, /* gate */ 819 compute_alignments, /* execute */ 820 NULL, /* sub */ 821 NULL, /* next */ 822 0, /* static_pass_number */ 823 TV_NONE, /* tv_id */ 824 0, /* properties_required */ 825 0, /* properties_provided */ 826 0, /* properties_destroyed */ 827 0, /* todo_flags_start */ 828 TODO_dump_func | TODO_verify_rtl_sharing 829 | TODO_ggc_collect /* todo_flags_finish */ 830 } 831 }; 832 833 834 /* Make a pass over all insns and compute their actual lengths by shortening 835 any branches of variable length if possible. */ 836 837 /* shorten_branches might be called multiple times: for example, the SH 838 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. 839 In order to do this, it needs proper length information, which it obtains 840 by calling shorten_branches. This cannot be collapsed with 841 shorten_branches itself into a single pass unless we also want to integrate 842 reorg.c, since the branch splitting exposes new instructions with delay 843 slots. */ 844 845 void 846 shorten_branches (rtx first ATTRIBUTE_UNUSED) 847 { 848 rtx insn; 849 int max_uid; 850 int i; 851 int max_log; 852 int max_skip; 853 #ifdef HAVE_ATTR_length 854 #define MAX_CODE_ALIGN 16 855 rtx seq; 856 int something_changed = 1; 857 char *varying_length; 858 rtx body; 859 int uid; 860 rtx align_tab[MAX_CODE_ALIGN]; 861 862 #endif 863 864 /* Compute maximum UID and allocate label_align / uid_shuid. */ 865 max_uid = get_max_uid (); 866 867 /* Free uid_shuid before reallocating it. */ 868 free (uid_shuid); 869 870 uid_shuid = XNEWVEC (int, max_uid); 871 872 if (max_labelno != max_label_num ()) 873 { 874 int old = max_labelno; 875 int n_labels; 876 int n_old_labels; 877 878 max_labelno = max_label_num (); 879 880 n_labels = max_labelno - min_labelno + 1; 881 n_old_labels = old - min_labelno + 1; 882 883 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); 884 885 /* Range of labels grows monotonically in the function. Failing here 886 means that the initialization of array got lost. */ 887 gcc_assert (n_old_labels <= n_labels); 888 889 memset (label_align + n_old_labels, 0, 890 (n_labels - n_old_labels) * sizeof (struct label_alignment)); 891 } 892 893 /* Initialize label_align and set up uid_shuid to be strictly 894 monotonically rising with insn order. */ 895 /* We use max_log here to keep track of the maximum alignment we want to 896 impose on the next CODE_LABEL (or the current one if we are processing 897 the CODE_LABEL itself). */ 898 899 max_log = 0; 900 max_skip = 0; 901 902 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) 903 { 904 int log; 905 906 INSN_SHUID (insn) = i++; 907 if (INSN_P (insn)) 908 continue; 909 910 if (LABEL_P (insn)) 911 { 912 rtx next; 913 bool next_is_jumptable; 914 915 /* Merge in alignments computed by compute_alignments. */ 916 log = LABEL_TO_ALIGNMENT (insn); 917 if (max_log < log) 918 { 919 max_log = log; 920 max_skip = LABEL_TO_MAX_SKIP (insn); 921 } 922 923 next = next_nonnote_insn (insn); 924 next_is_jumptable = next && JUMP_TABLE_DATA_P (next); 925 if (!next_is_jumptable) 926 { 927 log = LABEL_ALIGN (insn); 928 if (max_log < log) 929 { 930 max_log = log; 931 max_skip = LABEL_ALIGN_MAX_SKIP; 932 } 933 } 934 /* ADDR_VECs only take room if read-only data goes into the text 935 section. */ 936 if ((JUMP_TABLES_IN_TEXT_SECTION 937 || readonly_data_section == text_section) 938 && next_is_jumptable) 939 { 940 log = ADDR_VEC_ALIGN (next); 941 if (max_log < log) 942 { 943 max_log = log; 944 max_skip = LABEL_ALIGN_MAX_SKIP; 945 } 946 } 947 LABEL_TO_ALIGNMENT (insn) = max_log; 948 LABEL_TO_MAX_SKIP (insn) = max_skip; 949 max_log = 0; 950 max_skip = 0; 951 } 952 else if (BARRIER_P (insn)) 953 { 954 rtx label; 955 956 for (label = insn; label && ! INSN_P (label); 957 label = NEXT_INSN (label)) 958 if (LABEL_P (label)) 959 { 960 log = LABEL_ALIGN_AFTER_BARRIER (insn); 961 if (max_log < log) 962 { 963 max_log = log; 964 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP; 965 } 966 break; 967 } 968 } 969 } 970 #ifdef HAVE_ATTR_length 971 972 /* Allocate the rest of the arrays. */ 973 insn_lengths = XNEWVEC (int, max_uid); 974 insn_lengths_max_uid = max_uid; 975 /* Syntax errors can lead to labels being outside of the main insn stream. 976 Initialize insn_addresses, so that we get reproducible results. */ 977 INSN_ADDRESSES_ALLOC (max_uid); 978 979 varying_length = XCNEWVEC (char, max_uid); 980 981 /* Initialize uid_align. We scan instructions 982 from end to start, and keep in align_tab[n] the last seen insn 983 that does an alignment of at least n+1, i.e. the successor 984 in the alignment chain for an insn that does / has a known 985 alignment of n. */ 986 uid_align = XCNEWVEC (rtx, max_uid); 987 988 for (i = MAX_CODE_ALIGN; --i >= 0;) 989 align_tab[i] = NULL_RTX; 990 seq = get_last_insn (); 991 for (; seq; seq = PREV_INSN (seq)) 992 { 993 int uid = INSN_UID (seq); 994 int log; 995 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); 996 uid_align[uid] = align_tab[0]; 997 if (log) 998 { 999 /* Found an alignment label. */ 1000 uid_align[uid] = align_tab[log]; 1001 for (i = log - 1; i >= 0; i--) 1002 align_tab[i] = seq; 1003 } 1004 } 1005 #ifdef CASE_VECTOR_SHORTEN_MODE 1006 if (optimize) 1007 { 1008 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum 1009 label fields. */ 1010 1011 int min_shuid = INSN_SHUID (get_insns ()) - 1; 1012 int max_shuid = INSN_SHUID (get_last_insn ()) + 1; 1013 int rel; 1014 1015 for (insn = first; insn != 0; insn = NEXT_INSN (insn)) 1016 { 1017 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; 1018 int len, i, min, max, insn_shuid; 1019 int min_align; 1020 addr_diff_vec_flags flags; 1021 1022 if (!JUMP_P (insn) 1023 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) 1024 continue; 1025 pat = PATTERN (insn); 1026 len = XVECLEN (pat, 1); 1027 gcc_assert (len > 0); 1028 min_align = MAX_CODE_ALIGN; 1029 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) 1030 { 1031 rtx lab = XEXP (XVECEXP (pat, 1, i), 0); 1032 int shuid = INSN_SHUID (lab); 1033 if (shuid < min) 1034 { 1035 min = shuid; 1036 min_lab = lab; 1037 } 1038 if (shuid > max) 1039 { 1040 max = shuid; 1041 max_lab = lab; 1042 } 1043 if (min_align > LABEL_TO_ALIGNMENT (lab)) 1044 min_align = LABEL_TO_ALIGNMENT (lab); 1045 } 1046 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); 1047 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); 1048 insn_shuid = INSN_SHUID (insn); 1049 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); 1050 memset (&flags, 0, sizeof (flags)); 1051 flags.min_align = min_align; 1052 flags.base_after_vec = rel > insn_shuid; 1053 flags.min_after_vec = min > insn_shuid; 1054 flags.max_after_vec = max > insn_shuid; 1055 flags.min_after_base = min > rel; 1056 flags.max_after_base = max > rel; 1057 ADDR_DIFF_VEC_FLAGS (pat) = flags; 1058 } 1059 } 1060 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1061 1062 /* Compute initial lengths, addresses, and varying flags for each insn. */ 1063 for (insn_current_address = 0, insn = first; 1064 insn != 0; 1065 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) 1066 { 1067 uid = INSN_UID (insn); 1068 1069 insn_lengths[uid] = 0; 1070 1071 if (LABEL_P (insn)) 1072 { 1073 int log = LABEL_TO_ALIGNMENT (insn); 1074 if (log) 1075 { 1076 int align = 1 << log; 1077 int new_address = (insn_current_address + align - 1) & -align; 1078 insn_lengths[uid] = new_address - insn_current_address; 1079 } 1080 } 1081 1082 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; 1083 1084 if (NOTE_P (insn) || BARRIER_P (insn) 1085 || LABEL_P (insn) || DEBUG_INSN_P(insn)) 1086 continue; 1087 if (INSN_DELETED_P (insn)) 1088 continue; 1089 1090 body = PATTERN (insn); 1091 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 1092 { 1093 /* This only takes room if read-only data goes into the text 1094 section. */ 1095 if (JUMP_TABLES_IN_TEXT_SECTION 1096 || readonly_data_section == text_section) 1097 insn_lengths[uid] = (XVECLEN (body, 1098 GET_CODE (body) == ADDR_DIFF_VEC) 1099 * GET_MODE_SIZE (GET_MODE (body))); 1100 /* Alignment is handled by ADDR_VEC_ALIGN. */ 1101 } 1102 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 1103 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); 1104 else if (GET_CODE (body) == SEQUENCE) 1105 { 1106 int i; 1107 int const_delay_slots; 1108 #ifdef DELAY_SLOTS 1109 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); 1110 #else 1111 const_delay_slots = 0; 1112 #endif 1113 /* Inside a delay slot sequence, we do not do any branch shortening 1114 if the shortening could change the number of delay slots 1115 of the branch. */ 1116 for (i = 0; i < XVECLEN (body, 0); i++) 1117 { 1118 rtx inner_insn = XVECEXP (body, 0, i); 1119 int inner_uid = INSN_UID (inner_insn); 1120 int inner_length; 1121 1122 if (GET_CODE (body) == ASM_INPUT 1123 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) 1124 inner_length = (asm_insn_count (PATTERN (inner_insn)) 1125 * insn_default_length (inner_insn)); 1126 else 1127 inner_length = insn_default_length (inner_insn); 1128 1129 insn_lengths[inner_uid] = inner_length; 1130 if (const_delay_slots) 1131 { 1132 if ((varying_length[inner_uid] 1133 = insn_variable_length_p (inner_insn)) != 0) 1134 varying_length[uid] = 1; 1135 INSN_ADDRESSES (inner_uid) = (insn_current_address 1136 + insn_lengths[uid]); 1137 } 1138 else 1139 varying_length[inner_uid] = 0; 1140 insn_lengths[uid] += inner_length; 1141 } 1142 } 1143 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) 1144 { 1145 insn_lengths[uid] = insn_default_length (insn); 1146 varying_length[uid] = insn_variable_length_p (insn); 1147 } 1148 1149 /* If needed, do any adjustment. */ 1150 #ifdef ADJUST_INSN_LENGTH 1151 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); 1152 if (insn_lengths[uid] < 0) 1153 fatal_insn ("negative insn length", insn); 1154 #endif 1155 } 1156 1157 /* Now loop over all the insns finding varying length insns. For each, 1158 get the current insn length. If it has changed, reflect the change. 1159 When nothing changes for a full pass, we are done. */ 1160 1161 while (something_changed) 1162 { 1163 something_changed = 0; 1164 insn_current_align = MAX_CODE_ALIGN - 1; 1165 for (insn_current_address = 0, insn = first; 1166 insn != 0; 1167 insn = NEXT_INSN (insn)) 1168 { 1169 int new_length; 1170 #ifdef ADJUST_INSN_LENGTH 1171 int tmp_length; 1172 #endif 1173 int length_align; 1174 1175 uid = INSN_UID (insn); 1176 1177 if (LABEL_P (insn)) 1178 { 1179 int log = LABEL_TO_ALIGNMENT (insn); 1180 if (log > insn_current_align) 1181 { 1182 int align = 1 << log; 1183 int new_address= (insn_current_address + align - 1) & -align; 1184 insn_lengths[uid] = new_address - insn_current_address; 1185 insn_current_align = log; 1186 insn_current_address = new_address; 1187 } 1188 else 1189 insn_lengths[uid] = 0; 1190 INSN_ADDRESSES (uid) = insn_current_address; 1191 continue; 1192 } 1193 1194 length_align = INSN_LENGTH_ALIGNMENT (insn); 1195 if (length_align < insn_current_align) 1196 insn_current_align = length_align; 1197 1198 insn_last_address = INSN_ADDRESSES (uid); 1199 INSN_ADDRESSES (uid) = insn_current_address; 1200 1201 #ifdef CASE_VECTOR_SHORTEN_MODE 1202 if (optimize && JUMP_P (insn) 1203 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) 1204 { 1205 rtx body = PATTERN (insn); 1206 int old_length = insn_lengths[uid]; 1207 rtx rel_lab = XEXP (XEXP (body, 0), 0); 1208 rtx min_lab = XEXP (XEXP (body, 2), 0); 1209 rtx max_lab = XEXP (XEXP (body, 3), 0); 1210 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); 1211 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); 1212 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); 1213 rtx prev; 1214 int rel_align = 0; 1215 addr_diff_vec_flags flags; 1216 1217 /* Avoid automatic aggregate initialization. */ 1218 flags = ADDR_DIFF_VEC_FLAGS (body); 1219 1220 /* Try to find a known alignment for rel_lab. */ 1221 for (prev = rel_lab; 1222 prev 1223 && ! insn_lengths[INSN_UID (prev)] 1224 && ! (varying_length[INSN_UID (prev)] & 1); 1225 prev = PREV_INSN (prev)) 1226 if (varying_length[INSN_UID (prev)] & 2) 1227 { 1228 rel_align = LABEL_TO_ALIGNMENT (prev); 1229 break; 1230 } 1231 1232 /* See the comment on addr_diff_vec_flags in rtl.h for the 1233 meaning of the flags values. base: REL_LAB vec: INSN */ 1234 /* Anything after INSN has still addresses from the last 1235 pass; adjust these so that they reflect our current 1236 estimate for this pass. */ 1237 if (flags.base_after_vec) 1238 rel_addr += insn_current_address - insn_last_address; 1239 if (flags.min_after_vec) 1240 min_addr += insn_current_address - insn_last_address; 1241 if (flags.max_after_vec) 1242 max_addr += insn_current_address - insn_last_address; 1243 /* We want to know the worst case, i.e. lowest possible value 1244 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, 1245 its offset is positive, and we have to be wary of code shrink; 1246 otherwise, it is negative, and we have to be vary of code 1247 size increase. */ 1248 if (flags.min_after_base) 1249 { 1250 /* If INSN is between REL_LAB and MIN_LAB, the size 1251 changes we are about to make can change the alignment 1252 within the observed offset, therefore we have to break 1253 it up into two parts that are independent. */ 1254 if (! flags.base_after_vec && flags.min_after_vec) 1255 { 1256 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); 1257 min_addr -= align_fuzz (insn, min_lab, 0, 0); 1258 } 1259 else 1260 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); 1261 } 1262 else 1263 { 1264 if (flags.base_after_vec && ! flags.min_after_vec) 1265 { 1266 min_addr -= align_fuzz (min_lab, insn, 0, ~0); 1267 min_addr -= align_fuzz (insn, rel_lab, 0, ~0); 1268 } 1269 else 1270 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); 1271 } 1272 /* Likewise, determine the highest lowest possible value 1273 for the offset of MAX_LAB. */ 1274 if (flags.max_after_base) 1275 { 1276 if (! flags.base_after_vec && flags.max_after_vec) 1277 { 1278 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); 1279 max_addr += align_fuzz (insn, max_lab, 0, ~0); 1280 } 1281 else 1282 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); 1283 } 1284 else 1285 { 1286 if (flags.base_after_vec && ! flags.max_after_vec) 1287 { 1288 max_addr += align_fuzz (max_lab, insn, 0, 0); 1289 max_addr += align_fuzz (insn, rel_lab, 0, 0); 1290 } 1291 else 1292 max_addr += align_fuzz (max_lab, rel_lab, 0, 0); 1293 } 1294 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, 1295 max_addr - rel_addr, 1296 body)); 1297 if (JUMP_TABLES_IN_TEXT_SECTION 1298 || readonly_data_section == text_section) 1299 { 1300 insn_lengths[uid] 1301 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); 1302 insn_current_address += insn_lengths[uid]; 1303 if (insn_lengths[uid] != old_length) 1304 something_changed = 1; 1305 } 1306 1307 continue; 1308 } 1309 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1310 1311 if (! (varying_length[uid])) 1312 { 1313 if (NONJUMP_INSN_P (insn) 1314 && GET_CODE (PATTERN (insn)) == SEQUENCE) 1315 { 1316 int i; 1317 1318 body = PATTERN (insn); 1319 for (i = 0; i < XVECLEN (body, 0); i++) 1320 { 1321 rtx inner_insn = XVECEXP (body, 0, i); 1322 int inner_uid = INSN_UID (inner_insn); 1323 1324 INSN_ADDRESSES (inner_uid) = insn_current_address; 1325 1326 insn_current_address += insn_lengths[inner_uid]; 1327 } 1328 } 1329 else 1330 insn_current_address += insn_lengths[uid]; 1331 1332 continue; 1333 } 1334 1335 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 1336 { 1337 int i; 1338 1339 body = PATTERN (insn); 1340 new_length = 0; 1341 for (i = 0; i < XVECLEN (body, 0); i++) 1342 { 1343 rtx inner_insn = XVECEXP (body, 0, i); 1344 int inner_uid = INSN_UID (inner_insn); 1345 int inner_length; 1346 1347 INSN_ADDRESSES (inner_uid) = insn_current_address; 1348 1349 /* insn_current_length returns 0 for insns with a 1350 non-varying length. */ 1351 if (! varying_length[inner_uid]) 1352 inner_length = insn_lengths[inner_uid]; 1353 else 1354 inner_length = insn_current_length (inner_insn); 1355 1356 if (inner_length != insn_lengths[inner_uid]) 1357 { 1358 insn_lengths[inner_uid] = inner_length; 1359 something_changed = 1; 1360 } 1361 insn_current_address += insn_lengths[inner_uid]; 1362 new_length += inner_length; 1363 } 1364 } 1365 else 1366 { 1367 new_length = insn_current_length (insn); 1368 insn_current_address += new_length; 1369 } 1370 1371 #ifdef ADJUST_INSN_LENGTH 1372 /* If needed, do any adjustment. */ 1373 tmp_length = new_length; 1374 ADJUST_INSN_LENGTH (insn, new_length); 1375 insn_current_address += (new_length - tmp_length); 1376 #endif 1377 1378 if (new_length != insn_lengths[uid]) 1379 { 1380 insn_lengths[uid] = new_length; 1381 something_changed = 1; 1382 } 1383 } 1384 /* For a non-optimizing compile, do only a single pass. */ 1385 if (!optimize) 1386 break; 1387 } 1388 1389 free (varying_length); 1390 1391 #endif /* HAVE_ATTR_length */ 1392 } 1393 1394 #ifdef HAVE_ATTR_length 1395 /* Given the body of an INSN known to be generated by an ASM statement, return 1396 the number of machine instructions likely to be generated for this insn. 1397 This is used to compute its length. */ 1398 1399 static int 1400 asm_insn_count (rtx body) 1401 { 1402 const char *templ; 1403 1404 if (GET_CODE (body) == ASM_INPUT) 1405 templ = XSTR (body, 0); 1406 else 1407 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); 1408 1409 return asm_str_count (templ); 1410 } 1411 #endif 1412 1413 /* Return the number of machine instructions likely to be generated for the 1414 inline-asm template. */ 1415 int 1416 asm_str_count (const char *templ) 1417 { 1418 int count = 1; 1419 1420 if (!*templ) 1421 return 0; 1422 1423 for (; *templ; templ++) 1424 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) 1425 || *templ == '\n') 1426 count++; 1427 1428 return count; 1429 } 1430 1431 /* ??? This is probably the wrong place for these. */ 1432 /* Structure recording the mapping from source file and directory 1433 names at compile time to those to be embedded in debug 1434 information. */ 1435 typedef struct debug_prefix_map 1436 { 1437 const char *old_prefix; 1438 const char *new_prefix; 1439 size_t old_len; 1440 size_t new_len; 1441 struct debug_prefix_map *next; 1442 } debug_prefix_map; 1443 1444 /* Linked list of such structures. */ 1445 debug_prefix_map *debug_prefix_maps; 1446 1447 1448 /* Record a debug file prefix mapping. ARG is the argument to 1449 -fdebug-prefix-map and must be of the form OLD=NEW. */ 1450 1451 void 1452 add_debug_prefix_map (const char *arg) 1453 { 1454 debug_prefix_map *map; 1455 const char *p; 1456 1457 p = strchr (arg, '='); 1458 if (!p) 1459 { 1460 error ("invalid argument %qs to -fdebug-prefix-map", arg); 1461 return; 1462 } 1463 map = XNEW (debug_prefix_map); 1464 map->old_prefix = xstrndup (arg, p - arg); 1465 map->old_len = p - arg; 1466 p++; 1467 map->new_prefix = xstrdup (p); 1468 map->new_len = strlen (p); 1469 map->next = debug_prefix_maps; 1470 debug_prefix_maps = map; 1471 } 1472 1473 /* Perform user-specified mapping of debug filename prefixes. Return 1474 the new name corresponding to FILENAME. */ 1475 1476 const char * 1477 remap_debug_filename (const char *filename) 1478 { 1479 debug_prefix_map *map; 1480 char *s; 1481 const char *name; 1482 size_t name_len; 1483 1484 for (map = debug_prefix_maps; map; map = map->next) 1485 if (strncmp (filename, map->old_prefix, map->old_len) == 0) 1486 break; 1487 if (!map) 1488 return filename; 1489 name = filename + map->old_len; 1490 name_len = strlen (name) + 1; 1491 s = (char *) alloca (name_len + map->new_len); 1492 memcpy (s, map->new_prefix, map->new_len); 1493 memcpy (s + map->new_len, name, name_len); 1494 return ggc_strdup (s); 1495 } 1496 1497 /* Return true if DWARF2 debug info can be emitted for DECL. */ 1498 1499 static bool 1500 dwarf2_debug_info_emitted_p (tree decl) 1501 { 1502 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) 1503 return false; 1504 1505 if (DECL_IGNORED_P (decl)) 1506 return false; 1507 1508 return true; 1509 } 1510 1511 /* Output assembler code for the start of a function, 1512 and initialize some of the variables in this file 1513 for the new function. The label for the function and associated 1514 assembler pseudo-ops have already been output in `assemble_start_function'. 1515 1516 FIRST is the first insn of the rtl for the function being compiled. 1517 FILE is the file to write assembler code to. 1518 OPTIMIZE is nonzero if we should eliminate redundant 1519 test and compare insns. */ 1520 1521 void 1522 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file, 1523 int optimize ATTRIBUTE_UNUSED) 1524 { 1525 block_depth = 0; 1526 1527 this_is_asm_operands = 0; 1528 1529 last_filename = locator_file (prologue_locator); 1530 last_linenum = locator_line (prologue_locator); 1531 last_discriminator = discriminator = 0; 1532 1533 high_block_linenum = high_function_linenum = last_linenum; 1534 1535 if (!DECL_IGNORED_P (current_function_decl)) 1536 debug_hooks->begin_prologue (last_linenum, last_filename); 1537 1538 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO) 1539 if (!dwarf2_debug_info_emitted_p (current_function_decl)) 1540 dwarf2out_begin_prologue (0, NULL); 1541 #endif 1542 1543 #ifdef LEAF_REG_REMAP 1544 if (current_function_uses_only_leaf_regs) 1545 leaf_renumber_regs (first); 1546 #endif 1547 1548 /* The Sun386i and perhaps other machines don't work right 1549 if the profiling code comes after the prologue. */ 1550 #ifdef PROFILE_BEFORE_PROLOGUE 1551 if (crtl->profile) 1552 profile_function (file); 1553 #endif /* PROFILE_BEFORE_PROLOGUE */ 1554 1555 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue) 1556 if (dwarf2out_do_frame ()) 1557 dwarf2out_frame_debug (NULL_RTX, false); 1558 #endif 1559 1560 /* If debugging, assign block numbers to all of the blocks in this 1561 function. */ 1562 if (write_symbols) 1563 { 1564 reemit_insn_block_notes (); 1565 number_blocks (current_function_decl); 1566 /* We never actually put out begin/end notes for the top-level 1567 block in the function. But, conceptually, that block is 1568 always needed. */ 1569 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; 1570 } 1571 1572 if (warn_frame_larger_than 1573 && get_frame_size () > frame_larger_than_size) 1574 { 1575 /* Issue a warning */ 1576 warning (OPT_Wframe_larger_than_, 1577 "the frame size of %wd bytes is larger than %wd bytes", 1578 get_frame_size (), frame_larger_than_size); 1579 } 1580 1581 /* First output the function prologue: code to set up the stack frame. */ 1582 targetm.asm_out.function_prologue (file, get_frame_size ()); 1583 1584 /* If the machine represents the prologue as RTL, the profiling code must 1585 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ 1586 #ifdef HAVE_prologue 1587 if (! HAVE_prologue) 1588 #endif 1589 profile_after_prologue (file); 1590 } 1591 1592 static void 1593 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) 1594 { 1595 #ifndef PROFILE_BEFORE_PROLOGUE 1596 if (crtl->profile) 1597 profile_function (file); 1598 #endif /* not PROFILE_BEFORE_PROLOGUE */ 1599 } 1600 1601 static void 1602 profile_function (FILE *file ATTRIBUTE_UNUSED) 1603 { 1604 #ifndef NO_PROFILE_COUNTERS 1605 # define NO_PROFILE_COUNTERS 0 1606 #endif 1607 #ifdef ASM_OUTPUT_REG_PUSH 1608 rtx sval = NULL, chain = NULL; 1609 1610 if (cfun->returns_struct) 1611 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1612 true); 1613 if (cfun->static_chain_decl) 1614 chain = targetm.calls.static_chain (current_function_decl, true); 1615 #endif /* ASM_OUTPUT_REG_PUSH */ 1616 1617 if (! NO_PROFILE_COUNTERS) 1618 { 1619 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); 1620 switch_to_section (data_section); 1621 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); 1622 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); 1623 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); 1624 } 1625 1626 switch_to_section (current_function_section ()); 1627 1628 #ifdef ASM_OUTPUT_REG_PUSH 1629 if (sval && REG_P (sval)) 1630 ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); 1631 if (chain && REG_P (chain)) 1632 ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); 1633 #endif 1634 1635 FUNCTION_PROFILER (file, current_function_funcdef_no); 1636 1637 #ifdef ASM_OUTPUT_REG_PUSH 1638 if (chain && REG_P (chain)) 1639 ASM_OUTPUT_REG_POP (file, REGNO (chain)); 1640 if (sval && REG_P (sval)) 1641 ASM_OUTPUT_REG_POP (file, REGNO (sval)); 1642 #endif 1643 } 1644 1645 /* Output assembler code for the end of a function. 1646 For clarity, args are same as those of `final_start_function' 1647 even though not all of them are needed. */ 1648 1649 void 1650 final_end_function (void) 1651 { 1652 app_disable (); 1653 1654 if (!DECL_IGNORED_P (current_function_decl)) 1655 debug_hooks->end_function (high_function_linenum); 1656 1657 /* Finally, output the function epilogue: 1658 code to restore the stack frame and return to the caller. */ 1659 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); 1660 1661 /* And debug output. */ 1662 if (!DECL_IGNORED_P (current_function_decl)) 1663 debug_hooks->end_epilogue (last_linenum, last_filename); 1664 1665 #if defined (DWARF2_UNWIND_INFO) 1666 if (!dwarf2_debug_info_emitted_p (current_function_decl) 1667 && dwarf2out_do_frame ()) 1668 dwarf2out_end_epilogue (last_linenum, last_filename); 1669 #endif 1670 } 1671 1672 /* Output assembler code for some insns: all or part of a function. 1673 For description of args, see `final_start_function', above. */ 1674 1675 void 1676 final (rtx first, FILE *file, int optimize) 1677 { 1678 rtx insn; 1679 int max_uid = 0; 1680 int seen = 0; 1681 1682 last_ignored_compare = 0; 1683 1684 for (insn = first; insn; insn = NEXT_INSN (insn)) 1685 { 1686 if (INSN_UID (insn) > max_uid) /* Find largest UID. */ 1687 max_uid = INSN_UID (insn); 1688 #ifdef HAVE_cc0 1689 /* If CC tracking across branches is enabled, record the insn which 1690 jumps to each branch only reached from one place. */ 1691 if (optimize && JUMP_P (insn)) 1692 { 1693 rtx lab = JUMP_LABEL (insn); 1694 if (lab && LABEL_NUSES (lab) == 1) 1695 { 1696 LABEL_REFS (lab) = insn; 1697 } 1698 } 1699 #endif 1700 } 1701 1702 init_recog (); 1703 1704 CC_STATUS_INIT; 1705 1706 /* Output the insns. */ 1707 for (insn = first; insn;) 1708 { 1709 #ifdef HAVE_ATTR_length 1710 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) 1711 { 1712 /* This can be triggered by bugs elsewhere in the compiler if 1713 new insns are created after init_insn_lengths is called. */ 1714 gcc_assert (NOTE_P (insn)); 1715 insn_current_address = -1; 1716 } 1717 else 1718 insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); 1719 #endif /* HAVE_ATTR_length */ 1720 1721 insn = final_scan_insn (insn, file, optimize, 0, &seen); 1722 } 1723 } 1724 1725 const char * 1726 get_insn_template (int code, rtx insn) 1727 { 1728 switch (insn_data[code].output_format) 1729 { 1730 case INSN_OUTPUT_FORMAT_SINGLE: 1731 return insn_data[code].output.single; 1732 case INSN_OUTPUT_FORMAT_MULTI: 1733 return insn_data[code].output.multi[which_alternative]; 1734 case INSN_OUTPUT_FORMAT_FUNCTION: 1735 gcc_assert (insn); 1736 return (*insn_data[code].output.function) (recog_data.operand, insn); 1737 1738 default: 1739 gcc_unreachable (); 1740 } 1741 } 1742 1743 /* Emit the appropriate declaration for an alternate-entry-point 1744 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with 1745 LABEL_KIND != LABEL_NORMAL. 1746 1747 The case fall-through in this function is intentional. */ 1748 static void 1749 output_alternate_entry_point (FILE *file, rtx insn) 1750 { 1751 const char *name = LABEL_NAME (insn); 1752 1753 switch (LABEL_KIND (insn)) 1754 { 1755 case LABEL_WEAK_ENTRY: 1756 #ifdef ASM_WEAKEN_LABEL 1757 ASM_WEAKEN_LABEL (file, name); 1758 #endif 1759 case LABEL_GLOBAL_ENTRY: 1760 targetm.asm_out.globalize_label (file, name); 1761 case LABEL_STATIC_ENTRY: 1762 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE 1763 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); 1764 #endif 1765 ASM_OUTPUT_LABEL (file, name); 1766 break; 1767 1768 case LABEL_NORMAL: 1769 default: 1770 gcc_unreachable (); 1771 } 1772 } 1773 1774 /* Given a CALL_INSN, find and return the nested CALL. */ 1775 static rtx 1776 call_from_call_insn (rtx insn) 1777 { 1778 rtx x; 1779 gcc_assert (CALL_P (insn)); 1780 x = PATTERN (insn); 1781 1782 while (GET_CODE (x) != CALL) 1783 { 1784 switch (GET_CODE (x)) 1785 { 1786 default: 1787 gcc_unreachable (); 1788 case COND_EXEC: 1789 x = COND_EXEC_CODE (x); 1790 break; 1791 case PARALLEL: 1792 x = XVECEXP (x, 0, 0); 1793 break; 1794 case SET: 1795 x = XEXP (x, 1); 1796 break; 1797 } 1798 } 1799 return x; 1800 } 1801 1802 /* The final scan for one insn, INSN. 1803 Args are same as in `final', except that INSN 1804 is the insn being scanned. 1805 Value returned is the next insn to be scanned. 1806 1807 NOPEEPHOLES is the flag to disallow peephole processing (currently 1808 used for within delayed branch sequence output). 1809 1810 SEEN is used to track the end of the prologue, for emitting 1811 debug information. We force the emission of a line note after 1812 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or 1813 at the beginning of the second basic block, whichever comes 1814 first. */ 1815 1816 rtx 1817 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED, 1818 int nopeepholes ATTRIBUTE_UNUSED, int *seen) 1819 { 1820 #ifdef HAVE_cc0 1821 rtx set; 1822 #endif 1823 rtx next; 1824 1825 insn_counter++; 1826 1827 /* Ignore deleted insns. These can occur when we split insns (due to a 1828 template of "#") while not optimizing. */ 1829 if (INSN_DELETED_P (insn)) 1830 return NEXT_INSN (insn); 1831 1832 switch (GET_CODE (insn)) 1833 { 1834 case NOTE: 1835 switch (NOTE_KIND (insn)) 1836 { 1837 case NOTE_INSN_DELETED: 1838 break; 1839 1840 case NOTE_INSN_SWITCH_TEXT_SECTIONS: 1841 in_cold_section_p = !in_cold_section_p; 1842 #ifdef DWARF2_UNWIND_INFO 1843 if (dwarf2out_do_frame ()) 1844 dwarf2out_switch_text_section (); 1845 else 1846 #endif 1847 if (!DECL_IGNORED_P (current_function_decl)) 1848 debug_hooks->switch_text_section (); 1849 1850 switch_to_section (current_function_section ()); 1851 break; 1852 1853 case NOTE_INSN_BASIC_BLOCK: 1854 #ifdef TARGET_UNWIND_INFO 1855 targetm.asm_out.unwind_emit (asm_out_file, insn); 1856 #endif 1857 1858 if (flag_debug_asm) 1859 fprintf (asm_out_file, "\t%s basic block %d\n", 1860 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index); 1861 1862 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) 1863 { 1864 *seen |= SEEN_EMITTED; 1865 force_source_line = true; 1866 } 1867 else 1868 *seen |= SEEN_BB; 1869 1870 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; 1871 1872 break; 1873 1874 case NOTE_INSN_EH_REGION_BEG: 1875 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", 1876 NOTE_EH_HANDLER (insn)); 1877 break; 1878 1879 case NOTE_INSN_EH_REGION_END: 1880 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", 1881 NOTE_EH_HANDLER (insn)); 1882 break; 1883 1884 case NOTE_INSN_PROLOGUE_END: 1885 targetm.asm_out.function_end_prologue (file); 1886 profile_after_prologue (file); 1887 1888 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 1889 { 1890 *seen |= SEEN_EMITTED; 1891 force_source_line = true; 1892 } 1893 else 1894 *seen |= SEEN_NOTE; 1895 1896 break; 1897 1898 case NOTE_INSN_EPILOGUE_BEG: 1899 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_epilogue) 1900 if (dwarf2out_do_frame ()) 1901 dwarf2out_begin_epilogue (insn); 1902 #endif 1903 targetm.asm_out.function_begin_epilogue (file); 1904 break; 1905 1906 case NOTE_INSN_CFA_RESTORE_STATE: 1907 #if defined (DWARF2_UNWIND_INFO) 1908 dwarf2out_frame_debug_restore_state (); 1909 #endif 1910 break; 1911 1912 case NOTE_INSN_FUNCTION_BEG: 1913 app_disable (); 1914 if (!DECL_IGNORED_P (current_function_decl)) 1915 debug_hooks->end_prologue (last_linenum, last_filename); 1916 1917 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 1918 { 1919 *seen |= SEEN_EMITTED; 1920 force_source_line = true; 1921 } 1922 else 1923 *seen |= SEEN_NOTE; 1924 1925 break; 1926 1927 case NOTE_INSN_BLOCK_BEG: 1928 if (debug_info_level == DINFO_LEVEL_NORMAL 1929 || debug_info_level == DINFO_LEVEL_VERBOSE 1930 || write_symbols == DWARF2_DEBUG 1931 || write_symbols == VMS_AND_DWARF2_DEBUG 1932 || write_symbols == VMS_DEBUG) 1933 { 1934 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1935 1936 app_disable (); 1937 ++block_depth; 1938 high_block_linenum = last_linenum; 1939 1940 /* Output debugging info about the symbol-block beginning. */ 1941 if (!DECL_IGNORED_P (current_function_decl)) 1942 debug_hooks->begin_block (last_linenum, n); 1943 1944 /* Mark this block as output. */ 1945 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; 1946 } 1947 if (write_symbols == DBX_DEBUG 1948 || write_symbols == SDB_DEBUG) 1949 { 1950 location_t *locus_ptr 1951 = block_nonartificial_location (NOTE_BLOCK (insn)); 1952 1953 if (locus_ptr != NULL) 1954 { 1955 override_filename = LOCATION_FILE (*locus_ptr); 1956 override_linenum = LOCATION_LINE (*locus_ptr); 1957 } 1958 } 1959 break; 1960 1961 case NOTE_INSN_BLOCK_END: 1962 if (debug_info_level == DINFO_LEVEL_NORMAL 1963 || debug_info_level == DINFO_LEVEL_VERBOSE 1964 || write_symbols == DWARF2_DEBUG 1965 || write_symbols == VMS_AND_DWARF2_DEBUG 1966 || write_symbols == VMS_DEBUG) 1967 { 1968 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 1969 1970 app_disable (); 1971 1972 /* End of a symbol-block. */ 1973 --block_depth; 1974 gcc_assert (block_depth >= 0); 1975 1976 if (!DECL_IGNORED_P (current_function_decl)) 1977 debug_hooks->end_block (high_block_linenum, n); 1978 } 1979 if (write_symbols == DBX_DEBUG 1980 || write_symbols == SDB_DEBUG) 1981 { 1982 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); 1983 location_t *locus_ptr 1984 = block_nonartificial_location (outer_block); 1985 1986 if (locus_ptr != NULL) 1987 { 1988 override_filename = LOCATION_FILE (*locus_ptr); 1989 override_linenum = LOCATION_LINE (*locus_ptr); 1990 } 1991 else 1992 { 1993 override_filename = NULL; 1994 override_linenum = 0; 1995 } 1996 } 1997 break; 1998 1999 case NOTE_INSN_DELETED_LABEL: 2000 /* Emit the label. We may have deleted the CODE_LABEL because 2001 the label could be proved to be unreachable, though still 2002 referenced (in the form of having its address taken. */ 2003 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 2004 break; 2005 2006 case NOTE_INSN_VAR_LOCATION: 2007 if (!DECL_IGNORED_P (current_function_decl)) 2008 debug_hooks->var_location (insn); 2009 break; 2010 2011 default: 2012 gcc_unreachable (); 2013 break; 2014 } 2015 break; 2016 2017 case BARRIER: 2018 #if defined (DWARF2_UNWIND_INFO) 2019 if (dwarf2out_do_frame ()) 2020 dwarf2out_frame_debug (insn, false); 2021 #endif 2022 break; 2023 2024 case CODE_LABEL: 2025 /* The target port might emit labels in the output function for 2026 some insn, e.g. sh.c output_branchy_insn. */ 2027 if (CODE_LABEL_NUMBER (insn) <= max_labelno) 2028 { 2029 int align = LABEL_TO_ALIGNMENT (insn); 2030 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2031 int max_skip = LABEL_TO_MAX_SKIP (insn); 2032 #endif 2033 2034 if (align && NEXT_INSN (insn)) 2035 { 2036 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2037 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); 2038 #else 2039 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP 2040 ASM_OUTPUT_ALIGN_WITH_NOP (file, align); 2041 #else 2042 ASM_OUTPUT_ALIGN (file, align); 2043 #endif 2044 #endif 2045 } 2046 } 2047 #ifdef HAVE_cc0 2048 CC_STATUS_INIT; 2049 #endif 2050 2051 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) 2052 debug_hooks->label (insn); 2053 2054 app_disable (); 2055 2056 next = next_nonnote_insn (insn); 2057 /* If this label is followed by a jump-table, make sure we put 2058 the label in the read-only section. Also possibly write the 2059 label and jump table together. */ 2060 if (next != 0 && JUMP_TABLE_DATA_P (next)) 2061 { 2062 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2063 /* In this case, the case vector is being moved by the 2064 target, so don't output the label at all. Leave that 2065 to the back end macros. */ 2066 #else 2067 if (! JUMP_TABLES_IN_TEXT_SECTION) 2068 { 2069 int log_align; 2070 2071 switch_to_section (targetm.asm_out.function_rodata_section 2072 (current_function_decl)); 2073 2074 #ifdef ADDR_VEC_ALIGN 2075 log_align = ADDR_VEC_ALIGN (next); 2076 #else 2077 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 2078 #endif 2079 ASM_OUTPUT_ALIGN (file, log_align); 2080 } 2081 else 2082 switch_to_section (current_function_section ()); 2083 2084 #ifdef ASM_OUTPUT_CASE_LABEL 2085 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), 2086 next); 2087 #else 2088 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2089 #endif 2090 #endif 2091 break; 2092 } 2093 if (LABEL_ALT_ENTRY_P (insn)) 2094 output_alternate_entry_point (file, insn); 2095 else 2096 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2097 break; 2098 2099 default: 2100 { 2101 rtx body = PATTERN (insn); 2102 int insn_code_number; 2103 const char *templ; 2104 bool is_stmt; 2105 2106 /* Reset this early so it is correct for ASM statements. */ 2107 current_insn_predicate = NULL_RTX; 2108 2109 /* An INSN, JUMP_INSN or CALL_INSN. 2110 First check for special kinds that recog doesn't recognize. */ 2111 2112 if (GET_CODE (body) == USE /* These are just declarations. */ 2113 || GET_CODE (body) == CLOBBER) 2114 break; 2115 2116 #ifdef HAVE_cc0 2117 { 2118 /* If there is a REG_CC_SETTER note on this insn, it means that 2119 the setting of the condition code was done in the delay slot 2120 of the insn that branched here. So recover the cc status 2121 from the insn that set it. */ 2122 2123 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 2124 if (note) 2125 { 2126 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); 2127 cc_prev_status = cc_status; 2128 } 2129 } 2130 #endif 2131 2132 /* Detect insns that are really jump-tables 2133 and output them as such. */ 2134 2135 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 2136 { 2137 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) 2138 int vlen, idx; 2139 #endif 2140 2141 if (! JUMP_TABLES_IN_TEXT_SECTION) 2142 switch_to_section (targetm.asm_out.function_rodata_section 2143 (current_function_decl)); 2144 else 2145 switch_to_section (current_function_section ()); 2146 2147 app_disable (); 2148 2149 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2150 if (GET_CODE (body) == ADDR_VEC) 2151 { 2152 #ifdef ASM_OUTPUT_ADDR_VEC 2153 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); 2154 #else 2155 gcc_unreachable (); 2156 #endif 2157 } 2158 else 2159 { 2160 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC 2161 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); 2162 #else 2163 gcc_unreachable (); 2164 #endif 2165 } 2166 #else 2167 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); 2168 for (idx = 0; idx < vlen; idx++) 2169 { 2170 if (GET_CODE (body) == ADDR_VEC) 2171 { 2172 #ifdef ASM_OUTPUT_ADDR_VEC_ELT 2173 ASM_OUTPUT_ADDR_VEC_ELT 2174 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); 2175 #else 2176 gcc_unreachable (); 2177 #endif 2178 } 2179 else 2180 { 2181 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT 2182 ASM_OUTPUT_ADDR_DIFF_ELT 2183 (file, 2184 body, 2185 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), 2186 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); 2187 #else 2188 gcc_unreachable (); 2189 #endif 2190 } 2191 } 2192 #ifdef ASM_OUTPUT_CASE_END 2193 ASM_OUTPUT_CASE_END (file, 2194 CODE_LABEL_NUMBER (PREV_INSN (insn)), 2195 insn); 2196 #endif 2197 #endif 2198 2199 switch_to_section (current_function_section ()); 2200 2201 break; 2202 } 2203 /* Output this line note if it is the first or the last line 2204 note in a row. */ 2205 if (!DECL_IGNORED_P (current_function_decl) 2206 && notice_source_line (insn, &is_stmt)) 2207 (*debug_hooks->source_line) (last_linenum, last_filename, 2208 last_discriminator, is_stmt); 2209 2210 if (GET_CODE (body) == ASM_INPUT) 2211 { 2212 const char *string = XSTR (body, 0); 2213 2214 /* There's no telling what that did to the condition codes. */ 2215 CC_STATUS_INIT; 2216 2217 if (string[0]) 2218 { 2219 expanded_location loc; 2220 2221 app_enable (); 2222 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); 2223 if (*loc.file && loc.line) 2224 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2225 ASM_COMMENT_START, loc.line, loc.file); 2226 fprintf (asm_out_file, "\t%s\n", string); 2227 #if HAVE_AS_LINE_ZERO 2228 if (*loc.file && loc.line) 2229 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2230 #endif 2231 } 2232 break; 2233 } 2234 2235 /* Detect `asm' construct with operands. */ 2236 if (asm_noperands (body) >= 0) 2237 { 2238 unsigned int noperands = asm_noperands (body); 2239 rtx *ops = XALLOCAVEC (rtx, noperands); 2240 const char *string; 2241 location_t loc; 2242 expanded_location expanded; 2243 2244 /* Make sure we flush any queued register saves in case this 2245 clobbers affected registers. */ 2246 if (dwarf2out_do_frame ()) 2247 dwarf2out_frame_debug (insn, false); 2248 2249 /* There's no telling what that did to the condition codes. */ 2250 CC_STATUS_INIT; 2251 2252 /* Get out the operand values. */ 2253 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); 2254 /* Inhibit dying on what would otherwise be compiler bugs. */ 2255 insn_noperands = noperands; 2256 this_is_asm_operands = insn; 2257 expanded = expand_location (loc); 2258 2259 #ifdef FINAL_PRESCAN_INSN 2260 FINAL_PRESCAN_INSN (insn, ops, insn_noperands); 2261 #endif 2262 2263 /* Output the insn using them. */ 2264 if (string[0]) 2265 { 2266 app_enable (); 2267 if (expanded.file && expanded.line) 2268 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2269 ASM_COMMENT_START, expanded.line, expanded.file); 2270 output_asm_insn (string, ops); 2271 #if HAVE_AS_LINE_ZERO 2272 if (expanded.file && expanded.line) 2273 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2274 #endif 2275 } 2276 2277 if (targetm.asm_out.final_postscan_insn) 2278 targetm.asm_out.final_postscan_insn (file, insn, ops, 2279 insn_noperands); 2280 2281 this_is_asm_operands = 0; 2282 break; 2283 } 2284 2285 app_disable (); 2286 2287 if (GET_CODE (body) == SEQUENCE) 2288 { 2289 /* A delayed-branch sequence */ 2290 int i; 2291 2292 final_sequence = body; 2293 2294 /* Record the delay slots' frame information before the branch. 2295 This is needed for delayed calls: see execute_cfa_program(). */ 2296 #if defined (DWARF2_UNWIND_INFO) 2297 if (dwarf2out_do_frame ()) 2298 for (i = 1; i < XVECLEN (body, 0); i++) 2299 dwarf2out_frame_debug (XVECEXP (body, 0, i), false); 2300 #endif 2301 2302 /* The first insn in this SEQUENCE might be a JUMP_INSN that will 2303 force the restoration of a comparison that was previously 2304 thought unnecessary. If that happens, cancel this sequence 2305 and cause that insn to be restored. */ 2306 2307 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); 2308 if (next != XVECEXP (body, 0, 1)) 2309 { 2310 final_sequence = 0; 2311 return next; 2312 } 2313 2314 for (i = 1; i < XVECLEN (body, 0); i++) 2315 { 2316 rtx insn = XVECEXP (body, 0, i); 2317 rtx next = NEXT_INSN (insn); 2318 /* We loop in case any instruction in a delay slot gets 2319 split. */ 2320 do 2321 insn = final_scan_insn (insn, file, 0, 1, seen); 2322 while (insn != next); 2323 } 2324 #ifdef DBR_OUTPUT_SEQEND 2325 DBR_OUTPUT_SEQEND (file); 2326 #endif 2327 final_sequence = 0; 2328 2329 /* If the insn requiring the delay slot was a CALL_INSN, the 2330 insns in the delay slot are actually executed before the 2331 called function. Hence we don't preserve any CC-setting 2332 actions in these insns and the CC must be marked as being 2333 clobbered by the function. */ 2334 if (CALL_P (XVECEXP (body, 0, 0))) 2335 { 2336 CC_STATUS_INIT; 2337 } 2338 break; 2339 } 2340 2341 /* We have a real machine instruction as rtl. */ 2342 2343 body = PATTERN (insn); 2344 2345 #ifdef HAVE_cc0 2346 set = single_set (insn); 2347 2348 /* Check for redundant test and compare instructions 2349 (when the condition codes are already set up as desired). 2350 This is done only when optimizing; if not optimizing, 2351 it should be possible for the user to alter a variable 2352 with the debugger in between statements 2353 and the next statement should reexamine the variable 2354 to compute the condition codes. */ 2355 2356 if (optimize) 2357 { 2358 if (set 2359 && GET_CODE (SET_DEST (set)) == CC0 2360 && insn != last_ignored_compare) 2361 { 2362 rtx src1, src2; 2363 if (GET_CODE (SET_SRC (set)) == SUBREG) 2364 SET_SRC (set) = alter_subreg (&SET_SRC (set)); 2365 2366 src1 = SET_SRC (set); 2367 src2 = NULL_RTX; 2368 if (GET_CODE (SET_SRC (set)) == COMPARE) 2369 { 2370 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) 2371 XEXP (SET_SRC (set), 0) 2372 = alter_subreg (&XEXP (SET_SRC (set), 0)); 2373 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) 2374 XEXP (SET_SRC (set), 1) 2375 = alter_subreg (&XEXP (SET_SRC (set), 1)); 2376 if (XEXP (SET_SRC (set), 1) 2377 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) 2378 src2 = XEXP (SET_SRC (set), 0); 2379 } 2380 if ((cc_status.value1 != 0 2381 && rtx_equal_p (src1, cc_status.value1)) 2382 || (cc_status.value2 != 0 2383 && rtx_equal_p (src1, cc_status.value2)) 2384 || (src2 != 0 && cc_status.value1 != 0 2385 && rtx_equal_p (src2, cc_status.value1)) 2386 || (src2 != 0 && cc_status.value2 != 0 2387 && rtx_equal_p (src2, cc_status.value2))) 2388 { 2389 /* Don't delete insn if it has an addressing side-effect. */ 2390 if (! FIND_REG_INC_NOTE (insn, NULL_RTX) 2391 /* or if anything in it is volatile. */ 2392 && ! volatile_refs_p (PATTERN (insn))) 2393 { 2394 /* We don't really delete the insn; just ignore it. */ 2395 last_ignored_compare = insn; 2396 break; 2397 } 2398 } 2399 } 2400 } 2401 2402 /* If this is a conditional branch, maybe modify it 2403 if the cc's are in a nonstandard state 2404 so that it accomplishes the same thing that it would 2405 do straightforwardly if the cc's were set up normally. */ 2406 2407 if (cc_status.flags != 0 2408 && JUMP_P (insn) 2409 && GET_CODE (body) == SET 2410 && SET_DEST (body) == pc_rtx 2411 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE 2412 && COMPARISON_P (XEXP (SET_SRC (body), 0)) 2413 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) 2414 { 2415 /* This function may alter the contents of its argument 2416 and clear some of the cc_status.flags bits. 2417 It may also return 1 meaning condition now always true 2418 or -1 meaning condition now always false 2419 or 2 meaning condition nontrivial but altered. */ 2420 int result = alter_cond (XEXP (SET_SRC (body), 0)); 2421 /* If condition now has fixed value, replace the IF_THEN_ELSE 2422 with its then-operand or its else-operand. */ 2423 if (result == 1) 2424 SET_SRC (body) = XEXP (SET_SRC (body), 1); 2425 if (result == -1) 2426 SET_SRC (body) = XEXP (SET_SRC (body), 2); 2427 2428 /* The jump is now either unconditional or a no-op. 2429 If it has become a no-op, don't try to output it. 2430 (It would not be recognized.) */ 2431 if (SET_SRC (body) == pc_rtx) 2432 { 2433 delete_insn (insn); 2434 break; 2435 } 2436 else if (GET_CODE (SET_SRC (body)) == RETURN) 2437 /* Replace (set (pc) (return)) with (return). */ 2438 PATTERN (insn) = body = SET_SRC (body); 2439 2440 /* Rerecognize the instruction if it has changed. */ 2441 if (result != 0) 2442 INSN_CODE (insn) = -1; 2443 } 2444 2445 /* If this is a conditional trap, maybe modify it if the cc's 2446 are in a nonstandard state so that it accomplishes the same 2447 thing that it would do straightforwardly if the cc's were 2448 set up normally. */ 2449 if (cc_status.flags != 0 2450 && NONJUMP_INSN_P (insn) 2451 && GET_CODE (body) == TRAP_IF 2452 && COMPARISON_P (TRAP_CONDITION (body)) 2453 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) 2454 { 2455 /* This function may alter the contents of its argument 2456 and clear some of the cc_status.flags bits. 2457 It may also return 1 meaning condition now always true 2458 or -1 meaning condition now always false 2459 or 2 meaning condition nontrivial but altered. */ 2460 int result = alter_cond (TRAP_CONDITION (body)); 2461 2462 /* If TRAP_CONDITION has become always false, delete the 2463 instruction. */ 2464 if (result == -1) 2465 { 2466 delete_insn (insn); 2467 break; 2468 } 2469 2470 /* If TRAP_CONDITION has become always true, replace 2471 TRAP_CONDITION with const_true_rtx. */ 2472 if (result == 1) 2473 TRAP_CONDITION (body) = const_true_rtx; 2474 2475 /* Rerecognize the instruction if it has changed. */ 2476 if (result != 0) 2477 INSN_CODE (insn) = -1; 2478 } 2479 2480 /* Make same adjustments to instructions that examine the 2481 condition codes without jumping and instructions that 2482 handle conditional moves (if this machine has either one). */ 2483 2484 if (cc_status.flags != 0 2485 && set != 0) 2486 { 2487 rtx cond_rtx, then_rtx, else_rtx; 2488 2489 if (!JUMP_P (insn) 2490 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) 2491 { 2492 cond_rtx = XEXP (SET_SRC (set), 0); 2493 then_rtx = XEXP (SET_SRC (set), 1); 2494 else_rtx = XEXP (SET_SRC (set), 2); 2495 } 2496 else 2497 { 2498 cond_rtx = SET_SRC (set); 2499 then_rtx = const_true_rtx; 2500 else_rtx = const0_rtx; 2501 } 2502 2503 switch (GET_CODE (cond_rtx)) 2504 { 2505 case GTU: 2506 case GT: 2507 case LTU: 2508 case LT: 2509 case GEU: 2510 case GE: 2511 case LEU: 2512 case LE: 2513 case EQ: 2514 case NE: 2515 { 2516 int result; 2517 if (XEXP (cond_rtx, 0) != cc0_rtx) 2518 break; 2519 result = alter_cond (cond_rtx); 2520 if (result == 1) 2521 validate_change (insn, &SET_SRC (set), then_rtx, 0); 2522 else if (result == -1) 2523 validate_change (insn, &SET_SRC (set), else_rtx, 0); 2524 else if (result == 2) 2525 INSN_CODE (insn) = -1; 2526 if (SET_DEST (set) == SET_SRC (set)) 2527 delete_insn (insn); 2528 } 2529 break; 2530 2531 default: 2532 break; 2533 } 2534 } 2535 2536 #endif 2537 2538 #ifdef HAVE_peephole 2539 /* Do machine-specific peephole optimizations if desired. */ 2540 2541 if (optimize && !flag_no_peephole && !nopeepholes) 2542 { 2543 rtx next = peephole (insn); 2544 /* When peepholing, if there were notes within the peephole, 2545 emit them before the peephole. */ 2546 if (next != 0 && next != NEXT_INSN (insn)) 2547 { 2548 rtx note, prev = PREV_INSN (insn); 2549 2550 for (note = NEXT_INSN (insn); note != next; 2551 note = NEXT_INSN (note)) 2552 final_scan_insn (note, file, optimize, nopeepholes, seen); 2553 2554 /* Put the notes in the proper position for a later 2555 rescan. For example, the SH target can do this 2556 when generating a far jump in a delayed branch 2557 sequence. */ 2558 note = NEXT_INSN (insn); 2559 PREV_INSN (note) = prev; 2560 NEXT_INSN (prev) = note; 2561 NEXT_INSN (PREV_INSN (next)) = insn; 2562 PREV_INSN (insn) = PREV_INSN (next); 2563 NEXT_INSN (insn) = next; 2564 PREV_INSN (next) = insn; 2565 } 2566 2567 /* PEEPHOLE might have changed this. */ 2568 body = PATTERN (insn); 2569 } 2570 #endif 2571 2572 /* Try to recognize the instruction. 2573 If successful, verify that the operands satisfy the 2574 constraints for the instruction. Crash if they don't, 2575 since `reload' should have changed them so that they do. */ 2576 2577 insn_code_number = recog_memoized (insn); 2578 cleanup_subreg_operands (insn); 2579 2580 /* Dump the insn in the assembly for debugging. */ 2581 if (flag_dump_rtl_in_asm) 2582 { 2583 print_rtx_head = ASM_COMMENT_START; 2584 print_rtl_single (asm_out_file, insn); 2585 print_rtx_head = ""; 2586 } 2587 2588 if (! constrain_operands_cached (1)) 2589 fatal_insn_not_found (insn); 2590 2591 /* Some target machines need to prescan each insn before 2592 it is output. */ 2593 2594 #ifdef FINAL_PRESCAN_INSN 2595 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); 2596 #endif 2597 2598 if (targetm.have_conditional_execution () 2599 && GET_CODE (PATTERN (insn)) == COND_EXEC) 2600 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); 2601 2602 #ifdef HAVE_cc0 2603 cc_prev_status = cc_status; 2604 2605 /* Update `cc_status' for this instruction. 2606 The instruction's output routine may change it further. 2607 If the output routine for a jump insn needs to depend 2608 on the cc status, it should look at cc_prev_status. */ 2609 2610 NOTICE_UPDATE_CC (body, insn); 2611 #endif 2612 2613 current_output_insn = debug_insn = insn; 2614 2615 #if defined (DWARF2_UNWIND_INFO) 2616 if (CALL_P (insn) && dwarf2out_do_frame ()) 2617 dwarf2out_frame_debug (insn, false); 2618 #endif 2619 2620 /* Find the proper template for this insn. */ 2621 templ = get_insn_template (insn_code_number, insn); 2622 2623 /* If the C code returns 0, it means that it is a jump insn 2624 which follows a deleted test insn, and that test insn 2625 needs to be reinserted. */ 2626 if (templ == 0) 2627 { 2628 rtx prev; 2629 2630 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); 2631 2632 /* We have already processed the notes between the setter and 2633 the user. Make sure we don't process them again, this is 2634 particularly important if one of the notes is a block 2635 scope note or an EH note. */ 2636 for (prev = insn; 2637 prev != last_ignored_compare; 2638 prev = PREV_INSN (prev)) 2639 { 2640 if (NOTE_P (prev)) 2641 delete_insn (prev); /* Use delete_note. */ 2642 } 2643 2644 return prev; 2645 } 2646 2647 /* If the template is the string "#", it means that this insn must 2648 be split. */ 2649 if (templ[0] == '#' && templ[1] == '\0') 2650 { 2651 rtx new_rtx = try_split (body, insn, 0); 2652 2653 /* If we didn't split the insn, go away. */ 2654 if (new_rtx == insn && PATTERN (new_rtx) == body) 2655 fatal_insn ("could not split insn", insn); 2656 2657 #ifdef HAVE_ATTR_length 2658 /* This instruction should have been split in shorten_branches, 2659 to ensure that we would have valid length info for the 2660 splitees. */ 2661 gcc_unreachable (); 2662 #endif 2663 2664 return new_rtx; 2665 } 2666 2667 #ifdef TARGET_UNWIND_INFO 2668 /* ??? This will put the directives in the wrong place if 2669 get_insn_template outputs assembly directly. However calling it 2670 before get_insn_template breaks if the insns is split. */ 2671 targetm.asm_out.unwind_emit (asm_out_file, insn); 2672 #endif 2673 2674 if (CALL_P (insn)) 2675 { 2676 rtx x = call_from_call_insn (insn); 2677 x = XEXP (x, 0); 2678 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) 2679 { 2680 tree t; 2681 x = XEXP (x, 0); 2682 t = SYMBOL_REF_DECL (x); 2683 if (t) 2684 assemble_external (t); 2685 } 2686 } 2687 2688 /* Output assembler code from the template. */ 2689 output_asm_insn (templ, recog_data.operand); 2690 2691 /* Record point-of-call information for ICF debugging. */ 2692 if (flag_enable_icf_debug && CALL_P (insn)) 2693 { 2694 rtx x = call_from_call_insn (insn); 2695 x = XEXP (x, 0); 2696 if (x && MEM_P (x)) 2697 { 2698 if (GET_CODE (XEXP (x, 0)) == SYMBOL_REF) 2699 { 2700 tree t; 2701 x = XEXP (x, 0); 2702 t = SYMBOL_REF_DECL (x); 2703 if (t) 2704 (*debug_hooks->direct_call) (t); 2705 } 2706 else 2707 (*debug_hooks->virtual_call) (INSN_UID (insn)); 2708 } 2709 } 2710 2711 /* Some target machines need to postscan each insn after 2712 it is output. */ 2713 if (targetm.asm_out.final_postscan_insn) 2714 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, 2715 recog_data.n_operands); 2716 2717 /* If necessary, report the effect that the instruction has on 2718 the unwind info. We've already done this for delay slots 2719 and call instructions. */ 2720 #if defined (DWARF2_UNWIND_INFO) 2721 if (final_sequence == 0 2722 #if !defined (HAVE_prologue) 2723 && !ACCUMULATE_OUTGOING_ARGS 2724 #endif 2725 && dwarf2out_do_frame ()) 2726 dwarf2out_frame_debug (insn, true); 2727 #endif 2728 2729 current_output_insn = debug_insn = 0; 2730 } 2731 } 2732 return NEXT_INSN (insn); 2733 } 2734 2735 /* Return whether a source line note needs to be emitted before INSN. 2736 Sets IS_STMT to TRUE if the line should be marked as a possible 2737 breakpoint location. */ 2738 2739 static bool 2740 notice_source_line (rtx insn, bool *is_stmt) 2741 { 2742 const char *filename; 2743 int linenum; 2744 2745 if (override_filename) 2746 { 2747 filename = override_filename; 2748 linenum = override_linenum; 2749 } 2750 else 2751 { 2752 filename = insn_file (insn); 2753 linenum = insn_line (insn); 2754 } 2755 2756 if (filename == NULL) 2757 return false; 2758 2759 if (force_source_line 2760 || filename != last_filename 2761 || last_linenum != linenum) 2762 { 2763 force_source_line = false; 2764 last_filename = filename; 2765 last_linenum = linenum; 2766 last_discriminator = discriminator; 2767 *is_stmt = true; 2768 high_block_linenum = MAX (last_linenum, high_block_linenum); 2769 high_function_linenum = MAX (last_linenum, high_function_linenum); 2770 return true; 2771 } 2772 2773 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) 2774 { 2775 /* If the discriminator changed, but the line number did not, 2776 output the line table entry with is_stmt false so the 2777 debugger does not treat this as a breakpoint location. */ 2778 last_discriminator = discriminator; 2779 *is_stmt = false; 2780 return true; 2781 } 2782 2783 return false; 2784 } 2785 2786 /* For each operand in INSN, simplify (subreg (reg)) so that it refers 2787 directly to the desired hard register. */ 2788 2789 void 2790 cleanup_subreg_operands (rtx insn) 2791 { 2792 int i; 2793 bool changed = false; 2794 extract_insn_cached (insn); 2795 for (i = 0; i < recog_data.n_operands; i++) 2796 { 2797 /* The following test cannot use recog_data.operand when testing 2798 for a SUBREG: the underlying object might have been changed 2799 already if we are inside a match_operator expression that 2800 matches the else clause. Instead we test the underlying 2801 expression directly. */ 2802 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 2803 { 2804 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]); 2805 changed = true; 2806 } 2807 else if (GET_CODE (recog_data.operand[i]) == PLUS 2808 || GET_CODE (recog_data.operand[i]) == MULT 2809 || MEM_P (recog_data.operand[i])) 2810 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); 2811 } 2812 2813 for (i = 0; i < recog_data.n_dups; i++) 2814 { 2815 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) 2816 { 2817 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]); 2818 changed = true; 2819 } 2820 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS 2821 || GET_CODE (*recog_data.dup_loc[i]) == MULT 2822 || MEM_P (*recog_data.dup_loc[i])) 2823 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); 2824 } 2825 if (changed) 2826 df_insn_rescan (insn); 2827 } 2828 2829 /* If X is a SUBREG, replace it with a REG or a MEM, 2830 based on the thing it is a subreg of. */ 2831 2832 rtx 2833 alter_subreg (rtx *xp) 2834 { 2835 rtx x = *xp; 2836 rtx y = SUBREG_REG (x); 2837 2838 /* simplify_subreg does not remove subreg from volatile references. 2839 We are required to. */ 2840 if (MEM_P (y)) 2841 { 2842 int offset = SUBREG_BYTE (x); 2843 2844 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE 2845 contains 0 instead of the proper offset. See simplify_subreg. */ 2846 if (offset == 0 2847 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) 2848 { 2849 int difference = GET_MODE_SIZE (GET_MODE (y)) 2850 - GET_MODE_SIZE (GET_MODE (x)); 2851 if (WORDS_BIG_ENDIAN) 2852 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; 2853 if (BYTES_BIG_ENDIAN) 2854 offset += difference % UNITS_PER_WORD; 2855 } 2856 2857 *xp = adjust_address (y, GET_MODE (x), offset); 2858 } 2859 else 2860 { 2861 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), 2862 SUBREG_BYTE (x)); 2863 2864 if (new_rtx != 0) 2865 *xp = new_rtx; 2866 else if (REG_P (y)) 2867 { 2868 /* Simplify_subreg can't handle some REG cases, but we have to. */ 2869 unsigned int regno; 2870 HOST_WIDE_INT offset; 2871 2872 regno = subreg_regno (x); 2873 if (subreg_lowpart_p (x)) 2874 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); 2875 else 2876 offset = SUBREG_BYTE (x); 2877 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); 2878 } 2879 } 2880 2881 return *xp; 2882 } 2883 2884 /* Do alter_subreg on all the SUBREGs contained in X. */ 2885 2886 static rtx 2887 walk_alter_subreg (rtx *xp, bool *changed) 2888 { 2889 rtx x = *xp; 2890 switch (GET_CODE (x)) 2891 { 2892 case PLUS: 2893 case MULT: 2894 case AND: 2895 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 2896 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); 2897 break; 2898 2899 case MEM: 2900 case ZERO_EXTEND: 2901 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 2902 break; 2903 2904 case SUBREG: 2905 *changed = true; 2906 return alter_subreg (xp); 2907 2908 default: 2909 break; 2910 } 2911 2912 return *xp; 2913 } 2914 2915 #ifdef HAVE_cc0 2916 2917 /* Given BODY, the body of a jump instruction, alter the jump condition 2918 as required by the bits that are set in cc_status.flags. 2919 Not all of the bits there can be handled at this level in all cases. 2920 2921 The value is normally 0. 2922 1 means that the condition has become always true. 2923 -1 means that the condition has become always false. 2924 2 means that COND has been altered. */ 2925 2926 static int 2927 alter_cond (rtx cond) 2928 { 2929 int value = 0; 2930 2931 if (cc_status.flags & CC_REVERSED) 2932 { 2933 value = 2; 2934 PUT_CODE (cond, swap_condition (GET_CODE (cond))); 2935 } 2936 2937 if (cc_status.flags & CC_INVERTED) 2938 { 2939 value = 2; 2940 PUT_CODE (cond, reverse_condition (GET_CODE (cond))); 2941 } 2942 2943 if (cc_status.flags & CC_NOT_POSITIVE) 2944 switch (GET_CODE (cond)) 2945 { 2946 case LE: 2947 case LEU: 2948 case GEU: 2949 /* Jump becomes unconditional. */ 2950 return 1; 2951 2952 case GT: 2953 case GTU: 2954 case LTU: 2955 /* Jump becomes no-op. */ 2956 return -1; 2957 2958 case GE: 2959 PUT_CODE (cond, EQ); 2960 value = 2; 2961 break; 2962 2963 case LT: 2964 PUT_CODE (cond, NE); 2965 value = 2; 2966 break; 2967 2968 default: 2969 break; 2970 } 2971 2972 if (cc_status.flags & CC_NOT_NEGATIVE) 2973 switch (GET_CODE (cond)) 2974 { 2975 case GE: 2976 case GEU: 2977 /* Jump becomes unconditional. */ 2978 return 1; 2979 2980 case LT: 2981 case LTU: 2982 /* Jump becomes no-op. */ 2983 return -1; 2984 2985 case LE: 2986 case LEU: 2987 PUT_CODE (cond, EQ); 2988 value = 2; 2989 break; 2990 2991 case GT: 2992 case GTU: 2993 PUT_CODE (cond, NE); 2994 value = 2; 2995 break; 2996 2997 default: 2998 break; 2999 } 3000 3001 if (cc_status.flags & CC_NO_OVERFLOW) 3002 switch (GET_CODE (cond)) 3003 { 3004 case GEU: 3005 /* Jump becomes unconditional. */ 3006 return 1; 3007 3008 case LEU: 3009 PUT_CODE (cond, EQ); 3010 value = 2; 3011 break; 3012 3013 case GTU: 3014 PUT_CODE (cond, NE); 3015 value = 2; 3016 break; 3017 3018 case LTU: 3019 /* Jump becomes no-op. */ 3020 return -1; 3021 3022 default: 3023 break; 3024 } 3025 3026 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) 3027 switch (GET_CODE (cond)) 3028 { 3029 default: 3030 gcc_unreachable (); 3031 3032 case NE: 3033 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); 3034 value = 2; 3035 break; 3036 3037 case EQ: 3038 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); 3039 value = 2; 3040 break; 3041 } 3042 3043 if (cc_status.flags & CC_NOT_SIGNED) 3044 /* The flags are valid if signed condition operators are converted 3045 to unsigned. */ 3046 switch (GET_CODE (cond)) 3047 { 3048 case LE: 3049 PUT_CODE (cond, LEU); 3050 value = 2; 3051 break; 3052 3053 case LT: 3054 PUT_CODE (cond, LTU); 3055 value = 2; 3056 break; 3057 3058 case GT: 3059 PUT_CODE (cond, GTU); 3060 value = 2; 3061 break; 3062 3063 case GE: 3064 PUT_CODE (cond, GEU); 3065 value = 2; 3066 break; 3067 3068 default: 3069 break; 3070 } 3071 3072 return value; 3073 } 3074 #endif 3075 3076 /* Report inconsistency between the assembler template and the operands. 3077 In an `asm', it's the user's fault; otherwise, the compiler's fault. */ 3078 3079 void 3080 output_operand_lossage (const char *cmsgid, ...) 3081 { 3082 char *fmt_string; 3083 char *new_message; 3084 const char *pfx_str; 3085 va_list ap; 3086 3087 va_start (ap, cmsgid); 3088 3089 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; 3090 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); 3091 vasprintf (&new_message, fmt_string, ap); 3092 3093 if (this_is_asm_operands) 3094 error_for_asm (this_is_asm_operands, "%s", new_message); 3095 else 3096 internal_error ("%s", new_message); 3097 3098 free (fmt_string); 3099 free (new_message); 3100 va_end (ap); 3101 } 3102 3103 /* Output of assembler code from a template, and its subroutines. */ 3104 3105 /* Annotate the assembly with a comment describing the pattern and 3106 alternative used. */ 3107 3108 static void 3109 output_asm_name (void) 3110 { 3111 if (debug_insn) 3112 { 3113 int num = INSN_CODE (debug_insn); 3114 fprintf (asm_out_file, "\t%s %d\t%s", 3115 ASM_COMMENT_START, INSN_UID (debug_insn), 3116 insn_data[num].name); 3117 if (insn_data[num].n_alternatives > 1) 3118 fprintf (asm_out_file, "/%d", which_alternative + 1); 3119 #ifdef HAVE_ATTR_length 3120 fprintf (asm_out_file, "\t[length = %d]", 3121 get_attr_length (debug_insn)); 3122 #endif 3123 /* Clear this so only the first assembler insn 3124 of any rtl insn will get the special comment for -dp. */ 3125 debug_insn = 0; 3126 } 3127 } 3128 3129 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 3130 or its address, return that expr . Set *PADDRESSP to 1 if the expr 3131 corresponds to the address of the object and 0 if to the object. */ 3132 3133 static tree 3134 get_mem_expr_from_op (rtx op, int *paddressp) 3135 { 3136 tree expr; 3137 int inner_addressp; 3138 3139 *paddressp = 0; 3140 3141 if (REG_P (op)) 3142 return REG_EXPR (op); 3143 else if (!MEM_P (op)) 3144 return 0; 3145 3146 if (MEM_EXPR (op) != 0) 3147 return MEM_EXPR (op); 3148 3149 /* Otherwise we have an address, so indicate it and look at the address. */ 3150 *paddressp = 1; 3151 op = XEXP (op, 0); 3152 3153 /* First check if we have a decl for the address, then look at the right side 3154 if it is a PLUS. Otherwise, strip off arithmetic and keep looking. 3155 But don't allow the address to itself be indirect. */ 3156 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) 3157 return expr; 3158 else if (GET_CODE (op) == PLUS 3159 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) 3160 return expr; 3161 3162 while (UNARY_P (op) 3163 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) 3164 op = XEXP (op, 0); 3165 3166 expr = get_mem_expr_from_op (op, &inner_addressp); 3167 return inner_addressp ? 0 : expr; 3168 } 3169 3170 /* Output operand names for assembler instructions. OPERANDS is the 3171 operand vector, OPORDER is the order to write the operands, and NOPS 3172 is the number of operands to write. */ 3173 3174 static void 3175 output_asm_operand_names (rtx *operands, int *oporder, int nops) 3176 { 3177 int wrote = 0; 3178 int i; 3179 3180 for (i = 0; i < nops; i++) 3181 { 3182 int addressp; 3183 rtx op = operands[oporder[i]]; 3184 tree expr = get_mem_expr_from_op (op, &addressp); 3185 3186 fprintf (asm_out_file, "%c%s", 3187 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); 3188 wrote = 1; 3189 if (expr) 3190 { 3191 fprintf (asm_out_file, "%s", 3192 addressp ? "*" : ""); 3193 print_mem_expr (asm_out_file, expr); 3194 wrote = 1; 3195 } 3196 else if (REG_P (op) && ORIGINAL_REGNO (op) 3197 && ORIGINAL_REGNO (op) != REGNO (op)) 3198 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); 3199 } 3200 } 3201 3202 /* Output text from TEMPLATE to the assembler output file, 3203 obeying %-directions to substitute operands taken from 3204 the vector OPERANDS. 3205 3206 %N (for N a digit) means print operand N in usual manner. 3207 %lN means require operand N to be a CODE_LABEL or LABEL_REF 3208 and print the label name with no punctuation. 3209 %cN means require operand N to be a constant 3210 and print the constant expression with no punctuation. 3211 %aN means expect operand N to be a memory address 3212 (not a memory reference!) and print a reference 3213 to that address. 3214 %nN means expect operand N to be a constant 3215 and print a constant expression for minus the value 3216 of the operand, with no other punctuation. */ 3217 3218 void 3219 output_asm_insn (const char *templ, rtx *operands) 3220 { 3221 const char *p; 3222 int c; 3223 #ifdef ASSEMBLER_DIALECT 3224 int dialect = 0; 3225 #endif 3226 int oporder[MAX_RECOG_OPERANDS]; 3227 char opoutput[MAX_RECOG_OPERANDS]; 3228 int ops = 0; 3229 3230 /* An insn may return a null string template 3231 in a case where no assembler code is needed. */ 3232 if (*templ == 0) 3233 return; 3234 3235 memset (opoutput, 0, sizeof opoutput); 3236 p = templ; 3237 putc ('\t', asm_out_file); 3238 3239 #ifdef ASM_OUTPUT_OPCODE 3240 ASM_OUTPUT_OPCODE (asm_out_file, p); 3241 #endif 3242 3243 while ((c = *p++)) 3244 switch (c) 3245 { 3246 case '\n': 3247 if (flag_verbose_asm) 3248 output_asm_operand_names (operands, oporder, ops); 3249 if (flag_print_asm_name) 3250 output_asm_name (); 3251 3252 ops = 0; 3253 memset (opoutput, 0, sizeof opoutput); 3254 3255 putc (c, asm_out_file); 3256 #ifdef ASM_OUTPUT_OPCODE 3257 while ((c = *p) == '\t') 3258 { 3259 putc (c, asm_out_file); 3260 p++; 3261 } 3262 ASM_OUTPUT_OPCODE (asm_out_file, p); 3263 #endif 3264 break; 3265 3266 #ifdef ASSEMBLER_DIALECT 3267 case '{': 3268 { 3269 int i; 3270 3271 if (dialect) 3272 output_operand_lossage ("nested assembly dialect alternatives"); 3273 else 3274 dialect = 1; 3275 3276 /* If we want the first dialect, do nothing. Otherwise, skip 3277 DIALECT_NUMBER of strings ending with '|'. */ 3278 for (i = 0; i < dialect_number; i++) 3279 { 3280 while (*p && *p != '}' && *p++ != '|') 3281 ; 3282 if (*p == '}') 3283 break; 3284 if (*p == '|') 3285 p++; 3286 } 3287 3288 if (*p == '\0') 3289 output_operand_lossage ("unterminated assembly dialect alternative"); 3290 } 3291 break; 3292 3293 case '|': 3294 if (dialect) 3295 { 3296 /* Skip to close brace. */ 3297 do 3298 { 3299 if (*p == '\0') 3300 { 3301 output_operand_lossage ("unterminated assembly dialect alternative"); 3302 break; 3303 } 3304 } 3305 while (*p++ != '}'); 3306 dialect = 0; 3307 } 3308 else 3309 putc (c, asm_out_file); 3310 break; 3311 3312 case '}': 3313 if (! dialect) 3314 putc (c, asm_out_file); 3315 dialect = 0; 3316 break; 3317 #endif 3318 3319 case '%': 3320 /* %% outputs a single %. */ 3321 if (*p == '%') 3322 { 3323 p++; 3324 putc (c, asm_out_file); 3325 } 3326 /* %= outputs a number which is unique to each insn in the entire 3327 compilation. This is useful for making local labels that are 3328 referred to more than once in a given insn. */ 3329 else if (*p == '=') 3330 { 3331 p++; 3332 fprintf (asm_out_file, "%d", insn_counter); 3333 } 3334 /* % followed by a letter and some digits 3335 outputs an operand in a special way depending on the letter. 3336 Letters `acln' are implemented directly. 3337 Other letters are passed to `output_operand' so that 3338 the PRINT_OPERAND macro can define them. */ 3339 else if (ISALPHA (*p)) 3340 { 3341 int letter = *p++; 3342 unsigned long opnum; 3343 char *endptr; 3344 3345 opnum = strtoul (p, &endptr, 10); 3346 3347 if (endptr == p) 3348 output_operand_lossage ("operand number missing " 3349 "after %%-letter"); 3350 else if (this_is_asm_operands && opnum >= insn_noperands) 3351 output_operand_lossage ("operand number out of range"); 3352 else if (letter == 'l') 3353 output_asm_label (operands[opnum]); 3354 else if (letter == 'a') 3355 output_address (operands[opnum]); 3356 else if (letter == 'c') 3357 { 3358 if (CONSTANT_ADDRESS_P (operands[opnum])) 3359 output_addr_const (asm_out_file, operands[opnum]); 3360 else 3361 output_operand (operands[opnum], 'c'); 3362 } 3363 else if (letter == 'n') 3364 { 3365 if (CONST_INT_P (operands[opnum])) 3366 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3367 - INTVAL (operands[opnum])); 3368 else 3369 { 3370 putc ('-', asm_out_file); 3371 output_addr_const (asm_out_file, operands[opnum]); 3372 } 3373 } 3374 else 3375 output_operand (operands[opnum], letter); 3376 3377 if (!opoutput[opnum]) 3378 oporder[ops++] = opnum; 3379 opoutput[opnum] = 1; 3380 3381 p = endptr; 3382 c = *p; 3383 } 3384 /* % followed by a digit outputs an operand the default way. */ 3385 else if (ISDIGIT (*p)) 3386 { 3387 unsigned long opnum; 3388 char *endptr; 3389 3390 opnum = strtoul (p, &endptr, 10); 3391 if (this_is_asm_operands && opnum >= insn_noperands) 3392 output_operand_lossage ("operand number out of range"); 3393 else 3394 output_operand (operands[opnum], 0); 3395 3396 if (!opoutput[opnum]) 3397 oporder[ops++] = opnum; 3398 opoutput[opnum] = 1; 3399 3400 p = endptr; 3401 c = *p; 3402 } 3403 /* % followed by punctuation: output something for that 3404 punctuation character alone, with no operand. 3405 The PRINT_OPERAND macro decides what is actually done. */ 3406 #ifdef PRINT_OPERAND_PUNCT_VALID_P 3407 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p)) 3408 output_operand (NULL_RTX, *p++); 3409 #endif 3410 else 3411 output_operand_lossage ("invalid %%-code"); 3412 break; 3413 3414 default: 3415 putc (c, asm_out_file); 3416 } 3417 3418 /* Write out the variable names for operands, if we know them. */ 3419 if (flag_verbose_asm) 3420 output_asm_operand_names (operands, oporder, ops); 3421 if (flag_print_asm_name) 3422 output_asm_name (); 3423 3424 putc ('\n', asm_out_file); 3425 } 3426 3427 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ 3428 3429 void 3430 output_asm_label (rtx x) 3431 { 3432 char buf[256]; 3433 3434 if (GET_CODE (x) == LABEL_REF) 3435 x = XEXP (x, 0); 3436 if (LABEL_P (x) 3437 || (NOTE_P (x) 3438 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) 3439 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3440 else 3441 output_operand_lossage ("'%%l' operand isn't a label"); 3442 3443 assemble_name (asm_out_file, buf); 3444 } 3445 3446 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and 3447 output_operand. Marks SYMBOL_REFs as referenced through use of 3448 assemble_external. */ 3449 3450 static int 3451 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) 3452 { 3453 rtx x = *xp; 3454 3455 /* If we have a used symbol, we may have to emit assembly 3456 annotations corresponding to whether the symbol is external, weak 3457 or has non-default visibility. */ 3458 if (GET_CODE (x) == SYMBOL_REF) 3459 { 3460 tree t; 3461 3462 t = SYMBOL_REF_DECL (x); 3463 if (t) 3464 assemble_external (t); 3465 3466 return -1; 3467 } 3468 3469 return 0; 3470 } 3471 3472 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ 3473 3474 void 3475 mark_symbol_refs_as_used (rtx x) 3476 { 3477 for_each_rtx (&x, mark_symbol_ref_as_used, NULL); 3478 } 3479 3480 /* Print operand X using machine-dependent assembler syntax. 3481 The macro PRINT_OPERAND is defined just to control this function. 3482 CODE is a non-digit that preceded the operand-number in the % spec, 3483 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char 3484 between the % and the digits. 3485 When CODE is a non-letter, X is 0. 3486 3487 The meanings of the letters are machine-dependent and controlled 3488 by PRINT_OPERAND. */ 3489 3490 static void 3491 output_operand (rtx x, int code ATTRIBUTE_UNUSED) 3492 { 3493 if (x && GET_CODE (x) == SUBREG) 3494 x = alter_subreg (&x); 3495 3496 /* X must not be a pseudo reg. */ 3497 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); 3498 3499 PRINT_OPERAND (asm_out_file, x, code); 3500 3501 if (x == NULL_RTX) 3502 return; 3503 3504 for_each_rtx (&x, mark_symbol_ref_as_used, NULL); 3505 } 3506 3507 /* Print a memory reference operand for address X 3508 using machine-dependent assembler syntax. 3509 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */ 3510 3511 void 3512 output_address (rtx x) 3513 { 3514 bool changed = false; 3515 walk_alter_subreg (&x, &changed); 3516 PRINT_OPERAND_ADDRESS (asm_out_file, x); 3517 } 3518 3519 /* Print an integer constant expression in assembler syntax. 3520 Addition and subtraction are the only arithmetic 3521 that may appear in these expressions. */ 3522 3523 void 3524 output_addr_const (FILE *file, rtx x) 3525 { 3526 char buf[256]; 3527 3528 restart: 3529 switch (GET_CODE (x)) 3530 { 3531 case PC: 3532 putc ('.', file); 3533 break; 3534 3535 case SYMBOL_REF: 3536 if (SYMBOL_REF_DECL (x)) 3537 { 3538 mark_decl_referenced (SYMBOL_REF_DECL (x)); 3539 assemble_external (SYMBOL_REF_DECL (x)); 3540 } 3541 #ifdef ASM_OUTPUT_SYMBOL_REF 3542 ASM_OUTPUT_SYMBOL_REF (file, x); 3543 #else 3544 assemble_name (file, XSTR (x, 0)); 3545 #endif 3546 break; 3547 3548 case LABEL_REF: 3549 x = XEXP (x, 0); 3550 /* Fall through. */ 3551 case CODE_LABEL: 3552 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3553 #ifdef ASM_OUTPUT_LABEL_REF 3554 ASM_OUTPUT_LABEL_REF (file, buf); 3555 #else 3556 assemble_name (file, buf); 3557 #endif 3558 break; 3559 3560 case CONST_INT: 3561 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); 3562 break; 3563 3564 case CONST: 3565 /* This used to output parentheses around the expression, 3566 but that does not work on the 386 (either ATT or BSD assembler). */ 3567 output_addr_const (file, XEXP (x, 0)); 3568 break; 3569 3570 case CONST_DOUBLE: 3571 if (GET_MODE (x) == VOIDmode) 3572 { 3573 /* We can use %d if the number is one word and positive. */ 3574 if (CONST_DOUBLE_HIGH (x)) 3575 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, 3576 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), 3577 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 3578 else if (CONST_DOUBLE_LOW (x) < 0) 3579 fprintf (file, HOST_WIDE_INT_PRINT_HEX, 3580 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 3581 else 3582 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); 3583 } 3584 else 3585 /* We can't handle floating point constants; 3586 PRINT_OPERAND must handle them. */ 3587 output_operand_lossage ("floating constant misused"); 3588 break; 3589 3590 case CONST_FIXED: 3591 fprintf (file, HOST_WIDE_INT_PRINT_HEX, 3592 (unsigned HOST_WIDE_INT) CONST_FIXED_VALUE_LOW (x)); 3593 break; 3594 3595 case PLUS: 3596 /* Some assemblers need integer constants to appear last (eg masm). */ 3597 if (CONST_INT_P (XEXP (x, 0))) 3598 { 3599 output_addr_const (file, XEXP (x, 1)); 3600 if (INTVAL (XEXP (x, 0)) >= 0) 3601 fprintf (file, "+"); 3602 output_addr_const (file, XEXP (x, 0)); 3603 } 3604 else 3605 { 3606 output_addr_const (file, XEXP (x, 0)); 3607 if (!CONST_INT_P (XEXP (x, 1)) 3608 || INTVAL (XEXP (x, 1)) >= 0) 3609 fprintf (file, "+"); 3610 output_addr_const (file, XEXP (x, 1)); 3611 } 3612 break; 3613 3614 case MINUS: 3615 /* Avoid outputting things like x-x or x+5-x, 3616 since some assemblers can't handle that. */ 3617 x = simplify_subtraction (x); 3618 if (GET_CODE (x) != MINUS) 3619 goto restart; 3620 3621 output_addr_const (file, XEXP (x, 0)); 3622 fprintf (file, "-"); 3623 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) 3624 || GET_CODE (XEXP (x, 1)) == PC 3625 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) 3626 output_addr_const (file, XEXP (x, 1)); 3627 else 3628 { 3629 fputs (targetm.asm_out.open_paren, file); 3630 output_addr_const (file, XEXP (x, 1)); 3631 fputs (targetm.asm_out.close_paren, file); 3632 } 3633 break; 3634 3635 case ZERO_EXTEND: 3636 case SIGN_EXTEND: 3637 case SUBREG: 3638 case TRUNCATE: 3639 output_addr_const (file, XEXP (x, 0)); 3640 break; 3641 3642 default: 3643 #ifdef OUTPUT_ADDR_CONST_EXTRA 3644 OUTPUT_ADDR_CONST_EXTRA (file, x, fail); 3645 break; 3646 3647 fail: 3648 #endif 3649 output_operand_lossage ("invalid expression as operand"); 3650 } 3651 } 3652 3653 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. 3654 %R prints the value of REGISTER_PREFIX. 3655 %L prints the value of LOCAL_LABEL_PREFIX. 3656 %U prints the value of USER_LABEL_PREFIX. 3657 %I prints the value of IMMEDIATE_PREFIX. 3658 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. 3659 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. 3660 3661 We handle alternate assembler dialects here, just like output_asm_insn. */ 3662 3663 void 3664 asm_fprintf (FILE *file, const char *p, ...) 3665 { 3666 char buf[10]; 3667 char *q, c; 3668 va_list argptr; 3669 3670 va_start (argptr, p); 3671 3672 buf[0] = '%'; 3673 3674 while ((c = *p++)) 3675 switch (c) 3676 { 3677 #ifdef ASSEMBLER_DIALECT 3678 case '{': 3679 { 3680 int i; 3681 3682 /* If we want the first dialect, do nothing. Otherwise, skip 3683 DIALECT_NUMBER of strings ending with '|'. */ 3684 for (i = 0; i < dialect_number; i++) 3685 { 3686 while (*p && *p++ != '|') 3687 ; 3688 3689 if (*p == '|') 3690 p++; 3691 } 3692 } 3693 break; 3694 3695 case '|': 3696 /* Skip to close brace. */ 3697 while (*p && *p++ != '}') 3698 ; 3699 break; 3700 3701 case '}': 3702 break; 3703 #endif 3704 3705 case '%': 3706 c = *p++; 3707 q = &buf[1]; 3708 while (strchr ("-+ #0", c)) 3709 { 3710 *q++ = c; 3711 c = *p++; 3712 } 3713 while (ISDIGIT (c) || c == '.') 3714 { 3715 *q++ = c; 3716 c = *p++; 3717 } 3718 switch (c) 3719 { 3720 case '%': 3721 putc ('%', file); 3722 break; 3723 3724 case 'd': case 'i': case 'u': 3725 case 'x': case 'X': case 'o': 3726 case 'c': 3727 *q++ = c; 3728 *q = 0; 3729 fprintf (file, buf, va_arg (argptr, int)); 3730 break; 3731 3732 case 'w': 3733 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and 3734 'o' cases, but we do not check for those cases. It 3735 means that the value is a HOST_WIDE_INT, which may be 3736 either `long' or `long long'. */ 3737 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); 3738 q += strlen (HOST_WIDE_INT_PRINT); 3739 *q++ = *p++; 3740 *q = 0; 3741 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); 3742 break; 3743 3744 case 'l': 3745 *q++ = c; 3746 #ifdef HAVE_LONG_LONG 3747 if (*p == 'l') 3748 { 3749 *q++ = *p++; 3750 *q++ = *p++; 3751 *q = 0; 3752 fprintf (file, buf, va_arg (argptr, long long)); 3753 } 3754 else 3755 #endif 3756 { 3757 *q++ = *p++; 3758 *q = 0; 3759 fprintf (file, buf, va_arg (argptr, long)); 3760 } 3761 3762 break; 3763 3764 case 's': 3765 *q++ = c; 3766 *q = 0; 3767 fprintf (file, buf, va_arg (argptr, char *)); 3768 break; 3769 3770 case 'O': 3771 #ifdef ASM_OUTPUT_OPCODE 3772 ASM_OUTPUT_OPCODE (asm_out_file, p); 3773 #endif 3774 break; 3775 3776 case 'R': 3777 #ifdef REGISTER_PREFIX 3778 fprintf (file, "%s", REGISTER_PREFIX); 3779 #endif 3780 break; 3781 3782 case 'I': 3783 #ifdef IMMEDIATE_PREFIX 3784 fprintf (file, "%s", IMMEDIATE_PREFIX); 3785 #endif 3786 break; 3787 3788 case 'L': 3789 #ifdef LOCAL_LABEL_PREFIX 3790 fprintf (file, "%s", LOCAL_LABEL_PREFIX); 3791 #endif 3792 break; 3793 3794 case 'U': 3795 fputs (user_label_prefix, file); 3796 break; 3797 3798 #ifdef ASM_FPRINTF_EXTENSIONS 3799 /* Uppercase letters are reserved for general use by asm_fprintf 3800 and so are not available to target specific code. In order to 3801 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, 3802 they are defined here. As they get turned into real extensions 3803 to asm_fprintf they should be removed from this list. */ 3804 case 'A': case 'B': case 'C': case 'D': case 'E': 3805 case 'F': case 'G': case 'H': case 'J': case 'K': 3806 case 'M': case 'N': case 'P': case 'Q': case 'S': 3807 case 'T': case 'V': case 'W': case 'Y': case 'Z': 3808 break; 3809 3810 ASM_FPRINTF_EXTENSIONS (file, argptr, p) 3811 #endif 3812 default: 3813 gcc_unreachable (); 3814 } 3815 break; 3816 3817 default: 3818 putc (c, file); 3819 } 3820 va_end (argptr); 3821 } 3822 3823 /* Split up a CONST_DOUBLE or integer constant rtx 3824 into two rtx's for single words, 3825 storing in *FIRST the word that comes first in memory in the target 3826 and in *SECOND the other. */ 3827 3828 void 3829 split_double (rtx value, rtx *first, rtx *second) 3830 { 3831 if (CONST_INT_P (value)) 3832 { 3833 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD)) 3834 { 3835 /* In this case the CONST_INT holds both target words. 3836 Extract the bits from it into two word-sized pieces. 3837 Sign extend each half to HOST_WIDE_INT. */ 3838 unsigned HOST_WIDE_INT low, high; 3839 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend; 3840 3841 /* Set sign_bit to the most significant bit of a word. */ 3842 sign_bit = 1; 3843 sign_bit <<= BITS_PER_WORD - 1; 3844 3845 /* Set mask so that all bits of the word are set. We could 3846 have used 1 << BITS_PER_WORD instead of basing the 3847 calculation on sign_bit. However, on machines where 3848 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a 3849 compiler warning, even though the code would never be 3850 executed. */ 3851 mask = sign_bit << 1; 3852 mask--; 3853 3854 /* Set sign_extend as any remaining bits. */ 3855 sign_extend = ~mask; 3856 3857 /* Pick the lower word and sign-extend it. */ 3858 low = INTVAL (value); 3859 low &= mask; 3860 if (low & sign_bit) 3861 low |= sign_extend; 3862 3863 /* Pick the higher word, shifted to the least significant 3864 bits, and sign-extend it. */ 3865 high = INTVAL (value); 3866 high >>= BITS_PER_WORD - 1; 3867 high >>= 1; 3868 high &= mask; 3869 if (high & sign_bit) 3870 high |= sign_extend; 3871 3872 /* Store the words in the target machine order. */ 3873 if (WORDS_BIG_ENDIAN) 3874 { 3875 *first = GEN_INT (high); 3876 *second = GEN_INT (low); 3877 } 3878 else 3879 { 3880 *first = GEN_INT (low); 3881 *second = GEN_INT (high); 3882 } 3883 } 3884 else 3885 { 3886 /* The rule for using CONST_INT for a wider mode 3887 is that we regard the value as signed. 3888 So sign-extend it. */ 3889 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx); 3890 if (WORDS_BIG_ENDIAN) 3891 { 3892 *first = high; 3893 *second = value; 3894 } 3895 else 3896 { 3897 *first = value; 3898 *second = high; 3899 } 3900 } 3901 } 3902 else if (GET_CODE (value) != CONST_DOUBLE) 3903 { 3904 if (WORDS_BIG_ENDIAN) 3905 { 3906 *first = const0_rtx; 3907 *second = value; 3908 } 3909 else 3910 { 3911 *first = value; 3912 *second = const0_rtx; 3913 } 3914 } 3915 else if (GET_MODE (value) == VOIDmode 3916 /* This is the old way we did CONST_DOUBLE integers. */ 3917 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT) 3918 { 3919 /* In an integer, the words are defined as most and least significant. 3920 So order them by the target's convention. */ 3921 if (WORDS_BIG_ENDIAN) 3922 { 3923 *first = GEN_INT (CONST_DOUBLE_HIGH (value)); 3924 *second = GEN_INT (CONST_DOUBLE_LOW (value)); 3925 } 3926 else 3927 { 3928 *first = GEN_INT (CONST_DOUBLE_LOW (value)); 3929 *second = GEN_INT (CONST_DOUBLE_HIGH (value)); 3930 } 3931 } 3932 else 3933 { 3934 REAL_VALUE_TYPE r; 3935 long l[2]; 3936 REAL_VALUE_FROM_CONST_DOUBLE (r, value); 3937 3938 /* Note, this converts the REAL_VALUE_TYPE to the target's 3939 format, splits up the floating point double and outputs 3940 exactly 32 bits of it into each of l[0] and l[1] -- 3941 not necessarily BITS_PER_WORD bits. */ 3942 REAL_VALUE_TO_TARGET_DOUBLE (r, l); 3943 3944 /* If 32 bits is an entire word for the target, but not for the host, 3945 then sign-extend on the host so that the number will look the same 3946 way on the host that it would on the target. See for instance 3947 simplify_unary_operation. The #if is needed to avoid compiler 3948 warnings. */ 3949 3950 #if HOST_BITS_PER_LONG > 32 3951 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32) 3952 { 3953 if (l[0] & ((long) 1 << 31)) 3954 l[0] |= ((long) (-1) << 32); 3955 if (l[1] & ((long) 1 << 31)) 3956 l[1] |= ((long) (-1) << 32); 3957 } 3958 #endif 3959 3960 *first = GEN_INT (l[0]); 3961 *second = GEN_INT (l[1]); 3962 } 3963 } 3964 3965 /* Return nonzero if this function has no function calls. */ 3966 3967 int 3968 leaf_function_p (void) 3969 { 3970 rtx insn; 3971 rtx link; 3972 3973 if (crtl->profile || profile_arc_flag) 3974 return 0; 3975 3976 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 3977 { 3978 if (CALL_P (insn) 3979 && ! SIBLING_CALL_P (insn)) 3980 return 0; 3981 if (NONJUMP_INSN_P (insn) 3982 && GET_CODE (PATTERN (insn)) == SEQUENCE 3983 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 3984 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 3985 return 0; 3986 } 3987 for (link = crtl->epilogue_delay_list; 3988 link; 3989 link = XEXP (link, 1)) 3990 { 3991 insn = XEXP (link, 0); 3992 3993 if (CALL_P (insn) 3994 && ! SIBLING_CALL_P (insn)) 3995 return 0; 3996 if (NONJUMP_INSN_P (insn) 3997 && GET_CODE (PATTERN (insn)) == SEQUENCE 3998 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 3999 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 4000 return 0; 4001 } 4002 4003 return 1; 4004 } 4005 4006 /* Return 1 if branch is a forward branch. 4007 Uses insn_shuid array, so it works only in the final pass. May be used by 4008 output templates to customary add branch prediction hints. 4009 */ 4010 int 4011 final_forward_branch_p (rtx insn) 4012 { 4013 int insn_id, label_id; 4014 4015 gcc_assert (uid_shuid); 4016 insn_id = INSN_SHUID (insn); 4017 label_id = INSN_SHUID (JUMP_LABEL (insn)); 4018 /* We've hit some insns that does not have id information available. */ 4019 gcc_assert (insn_id && label_id); 4020 return insn_id < label_id; 4021 } 4022 4023 /* On some machines, a function with no call insns 4024 can run faster if it doesn't create its own register window. 4025 When output, the leaf function should use only the "output" 4026 registers. Ordinarily, the function would be compiled to use 4027 the "input" registers to find its arguments; it is a candidate 4028 for leaf treatment if it uses only the "input" registers. 4029 Leaf function treatment means renumbering so the function 4030 uses the "output" registers instead. */ 4031 4032 #ifdef LEAF_REGISTERS 4033 4034 /* Return 1 if this function uses only the registers that can be 4035 safely renumbered. */ 4036 4037 int 4038 only_leaf_regs_used (void) 4039 { 4040 int i; 4041 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; 4042 4043 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 4044 if ((df_regs_ever_live_p (i) || global_regs[i]) 4045 && ! permitted_reg_in_leaf_functions[i]) 4046 return 0; 4047 4048 if (crtl->uses_pic_offset_table 4049 && pic_offset_table_rtx != 0 4050 && REG_P (pic_offset_table_rtx) 4051 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) 4052 return 0; 4053 4054 return 1; 4055 } 4056 4057 /* Scan all instructions and renumber all registers into those 4058 available in leaf functions. */ 4059 4060 static void 4061 leaf_renumber_regs (rtx first) 4062 { 4063 rtx insn; 4064 4065 /* Renumber only the actual patterns. 4066 The reg-notes can contain frame pointer refs, 4067 and renumbering them could crash, and should not be needed. */ 4068 for (insn = first; insn; insn = NEXT_INSN (insn)) 4069 if (INSN_P (insn)) 4070 leaf_renumber_regs_insn (PATTERN (insn)); 4071 for (insn = crtl->epilogue_delay_list; 4072 insn; 4073 insn = XEXP (insn, 1)) 4074 if (INSN_P (XEXP (insn, 0))) 4075 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0))); 4076 } 4077 4078 /* Scan IN_RTX and its subexpressions, and renumber all regs into those 4079 available in leaf functions. */ 4080 4081 void 4082 leaf_renumber_regs_insn (rtx in_rtx) 4083 { 4084 int i, j; 4085 const char *format_ptr; 4086 4087 if (in_rtx == 0) 4088 return; 4089 4090 /* Renumber all input-registers into output-registers. 4091 renumbered_regs would be 1 for an output-register; 4092 they */ 4093 4094 if (REG_P (in_rtx)) 4095 { 4096 int newreg; 4097 4098 /* Don't renumber the same reg twice. */ 4099 if (in_rtx->used) 4100 return; 4101 4102 newreg = REGNO (in_rtx); 4103 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg 4104 to reach here as part of a REG_NOTE. */ 4105 if (newreg >= FIRST_PSEUDO_REGISTER) 4106 { 4107 in_rtx->used = 1; 4108 return; 4109 } 4110 newreg = LEAF_REG_REMAP (newreg); 4111 gcc_assert (newreg >= 0); 4112 df_set_regs_ever_live (REGNO (in_rtx), false); 4113 df_set_regs_ever_live (newreg, true); 4114 SET_REGNO (in_rtx, newreg); 4115 in_rtx->used = 1; 4116 } 4117 4118 if (INSN_P (in_rtx)) 4119 { 4120 /* Inside a SEQUENCE, we find insns. 4121 Renumber just the patterns of these insns, 4122 just as we do for the top-level insns. */ 4123 leaf_renumber_regs_insn (PATTERN (in_rtx)); 4124 return; 4125 } 4126 4127 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); 4128 4129 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) 4130 switch (*format_ptr++) 4131 { 4132 case 'e': 4133 leaf_renumber_regs_insn (XEXP (in_rtx, i)); 4134 break; 4135 4136 case 'E': 4137 if (NULL != XVEC (in_rtx, i)) 4138 { 4139 for (j = 0; j < XVECLEN (in_rtx, i); j++) 4140 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); 4141 } 4142 break; 4143 4144 case 'S': 4145 case 's': 4146 case '0': 4147 case 'i': 4148 case 'w': 4149 case 'n': 4150 case 'u': 4151 break; 4152 4153 default: 4154 gcc_unreachable (); 4155 } 4156 } 4157 #endif 4158 4159 4160 /* When -gused is used, emit debug info for only used symbols. But in 4161 addition to the standard intercepted debug_hooks there are some direct 4162 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params. 4163 Those routines may also be called from a higher level intercepted routine. So 4164 to prevent recording data for an inner call to one of these for an intercept, 4165 we maintain an intercept nesting counter (debug_nesting). We only save the 4166 intercepted arguments if the nesting is 1. */ 4167 int debug_nesting = 0; 4168 4169 static tree *symbol_queue; 4170 int symbol_queue_index = 0; 4171 static int symbol_queue_size = 0; 4172 4173 /* Generate the symbols for any queued up type symbols we encountered 4174 while generating the type info for some originally used symbol. 4175 This might generate additional entries in the queue. Only when 4176 the nesting depth goes to 0 is this routine called. */ 4177 4178 void 4179 debug_flush_symbol_queue (void) 4180 { 4181 int i; 4182 4183 /* Make sure that additionally queued items are not flushed 4184 prematurely. */ 4185 4186 ++debug_nesting; 4187 4188 for (i = 0; i < symbol_queue_index; ++i) 4189 { 4190 /* If we pushed queued symbols then such symbols must be 4191 output no matter what anyone else says. Specifically, 4192 we need to make sure dbxout_symbol() thinks the symbol was 4193 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG 4194 which may be set for outside reasons. */ 4195 int saved_tree_used = TREE_USED (symbol_queue[i]); 4196 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]); 4197 TREE_USED (symbol_queue[i]) = 1; 4198 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0; 4199 4200 #ifdef DBX_DEBUGGING_INFO 4201 dbxout_symbol (symbol_queue[i], 0); 4202 #endif 4203 4204 TREE_USED (symbol_queue[i]) = saved_tree_used; 4205 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug; 4206 } 4207 4208 symbol_queue_index = 0; 4209 --debug_nesting; 4210 } 4211 4212 /* Queue a type symbol needed as part of the definition of a decl 4213 symbol. These symbols are generated when debug_flush_symbol_queue() 4214 is called. */ 4215 4216 void 4217 debug_queue_symbol (tree decl) 4218 { 4219 if (symbol_queue_index >= symbol_queue_size) 4220 { 4221 symbol_queue_size += 10; 4222 symbol_queue = XRESIZEVEC (tree, symbol_queue, symbol_queue_size); 4223 } 4224 4225 symbol_queue[symbol_queue_index++] = decl; 4226 } 4227 4228 /* Free symbol queue. */ 4229 void 4230 debug_free_queue (void) 4231 { 4232 if (symbol_queue) 4233 { 4234 free (symbol_queue); 4235 symbol_queue = NULL; 4236 symbol_queue_size = 0; 4237 } 4238 } 4239 4240 /* Turn the RTL into assembly. */ 4241 static unsigned int 4242 rest_of_handle_final (void) 4243 { 4244 rtx x; 4245 const char *fnname; 4246 4247 /* Get the function's name, as described by its RTL. This may be 4248 different from the DECL_NAME name used in the source file. */ 4249 4250 x = DECL_RTL (current_function_decl); 4251 gcc_assert (MEM_P (x)); 4252 x = XEXP (x, 0); 4253 gcc_assert (GET_CODE (x) == SYMBOL_REF); 4254 fnname = XSTR (x, 0); 4255 4256 assemble_start_function (current_function_decl, fnname); 4257 final_start_function (get_insns (), asm_out_file, optimize); 4258 final (get_insns (), asm_out_file, optimize); 4259 final_end_function (); 4260 4261 #ifdef TARGET_UNWIND_INFO 4262 /* ??? The IA-64 ".handlerdata" directive must be issued before 4263 the ".endp" directive that closes the procedure descriptor. */ 4264 output_function_exception_table (fnname); 4265 #endif 4266 4267 assemble_end_function (current_function_decl, fnname); 4268 4269 #ifndef TARGET_UNWIND_INFO 4270 /* Otherwise, it feels unclean to switch sections in the middle. */ 4271 output_function_exception_table (fnname); 4272 #endif 4273 4274 user_defined_section_attribute = false; 4275 4276 /* Free up reg info memory. */ 4277 free_reg_info (); 4278 4279 if (! quiet_flag) 4280 fflush (asm_out_file); 4281 4282 /* Write DBX symbols if requested. */ 4283 4284 /* Note that for those inline functions where we don't initially 4285 know for certain that we will be generating an out-of-line copy, 4286 the first invocation of this routine (rest_of_compilation) will 4287 skip over this code by doing a `goto exit_rest_of_compilation;'. 4288 Later on, wrapup_global_declarations will (indirectly) call 4289 rest_of_compilation again for those inline functions that need 4290 to have out-of-line copies generated. During that call, we 4291 *will* be routed past here. */ 4292 4293 timevar_push (TV_SYMOUT); 4294 if (!DECL_IGNORED_P (current_function_decl)) 4295 debug_hooks->function_decl (current_function_decl); 4296 timevar_pop (TV_SYMOUT); 4297 4298 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ 4299 DECL_INITIAL (current_function_decl) = error_mark_node; 4300 4301 if (DECL_STATIC_CONSTRUCTOR (current_function_decl) 4302 && targetm.have_ctors_dtors) 4303 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), 4304 decl_init_priority_lookup 4305 (current_function_decl)); 4306 if (DECL_STATIC_DESTRUCTOR (current_function_decl) 4307 && targetm.have_ctors_dtors) 4308 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), 4309 decl_fini_priority_lookup 4310 (current_function_decl)); 4311 return 0; 4312 } 4313 4314 struct rtl_opt_pass pass_final = 4315 { 4316 { 4317 RTL_PASS, 4318 "final", /* name */ 4319 NULL, /* gate */ 4320 rest_of_handle_final, /* execute */ 4321 NULL, /* sub */ 4322 NULL, /* next */ 4323 0, /* static_pass_number */ 4324 TV_FINAL, /* tv_id */ 4325 0, /* properties_required */ 4326 0, /* properties_provided */ 4327 0, /* properties_destroyed */ 4328 0, /* todo_flags_start */ 4329 TODO_ggc_collect /* todo_flags_finish */ 4330 } 4331 }; 4332 4333 4334 static unsigned int 4335 rest_of_handle_shorten_branches (void) 4336 { 4337 /* Shorten branches. */ 4338 shorten_branches (get_insns ()); 4339 return 0; 4340 } 4341 4342 struct rtl_opt_pass pass_shorten_branches = 4343 { 4344 { 4345 RTL_PASS, 4346 "shorten", /* name */ 4347 NULL, /* gate */ 4348 rest_of_handle_shorten_branches, /* execute */ 4349 NULL, /* sub */ 4350 NULL, /* next */ 4351 0, /* static_pass_number */ 4352 TV_FINAL, /* tv_id */ 4353 0, /* properties_required */ 4354 0, /* properties_provided */ 4355 0, /* properties_destroyed */ 4356 0, /* todo_flags_start */ 4357 TODO_dump_func /* todo_flags_finish */ 4358 } 4359 }; 4360 4361 4362 static unsigned int 4363 rest_of_clean_state (void) 4364 { 4365 rtx insn, next; 4366 FILE *final_output = NULL; 4367 int save_unnumbered = flag_dump_unnumbered; 4368 int save_noaddr = flag_dump_noaddr; 4369 4370 if (flag_dump_final_insns) 4371 { 4372 final_output = fopen (flag_dump_final_insns, "a"); 4373 if (!final_output) 4374 { 4375 error ("could not open final insn dump file %qs: %s", 4376 flag_dump_final_insns, strerror (errno)); 4377 flag_dump_final_insns = NULL; 4378 } 4379 else 4380 { 4381 const char *aname; 4382 4383 aname = (IDENTIFIER_POINTER 4384 (DECL_ASSEMBLER_NAME (current_function_decl))); 4385 fprintf (final_output, "\n;; Function (%s) %s\n\n", aname, 4386 cfun->function_frequency == FUNCTION_FREQUENCY_HOT 4387 ? " (hot)" 4388 : cfun->function_frequency == FUNCTION_FREQUENCY_UNLIKELY_EXECUTED 4389 ? " (unlikely executed)" 4390 : ""); 4391 4392 flag_dump_noaddr = flag_dump_unnumbered = 1; 4393 if (flag_compare_debug_opt || flag_compare_debug) 4394 dump_flags |= TDF_NOUID; 4395 final_insns_dump_p = true; 4396 4397 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 4398 if (LABEL_P (insn)) 4399 INSN_UID (insn) = CODE_LABEL_NUMBER (insn); 4400 else 4401 INSN_UID (insn) = 0; 4402 } 4403 } 4404 4405 /* It is very important to decompose the RTL instruction chain here: 4406 debug information keeps pointing into CODE_LABEL insns inside the function 4407 body. If these remain pointing to the other insns, we end up preserving 4408 whole RTL chain and attached detailed debug info in memory. */ 4409 for (insn = get_insns (); insn; insn = next) 4410 { 4411 next = NEXT_INSN (insn); 4412 NEXT_INSN (insn) = NULL; 4413 PREV_INSN (insn) = NULL; 4414 4415 if (final_output 4416 && (!NOTE_P (insn) || 4417 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION 4418 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG 4419 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END 4420 && NOTE_KIND (insn) != NOTE_INSN_CFA_RESTORE_STATE))) 4421 print_rtl_single (final_output, insn); 4422 4423 } 4424 4425 if (final_output) 4426 { 4427 flag_dump_noaddr = save_noaddr; 4428 flag_dump_unnumbered = save_unnumbered; 4429 final_insns_dump_p = false; 4430 4431 if (fclose (final_output)) 4432 { 4433 error ("could not close final insn dump file %qs: %s", 4434 flag_dump_final_insns, strerror (errno)); 4435 flag_dump_final_insns = NULL; 4436 } 4437 } 4438 4439 /* In case the function was not output, 4440 don't leave any temporary anonymous types 4441 queued up for sdb output. */ 4442 #ifdef SDB_DEBUGGING_INFO 4443 if (write_symbols == SDB_DEBUG) 4444 sdbout_types (NULL_TREE); 4445 #endif 4446 4447 flag_rerun_cse_after_global_opts = 0; 4448 reload_completed = 0; 4449 epilogue_completed = 0; 4450 #ifdef STACK_REGS 4451 regstack_completed = 0; 4452 #endif 4453 4454 /* Clear out the insn_length contents now that they are no 4455 longer valid. */ 4456 init_insn_lengths (); 4457 4458 /* Show no temporary slots allocated. */ 4459 init_temp_slots (); 4460 4461 free_bb_for_insn (); 4462 4463 delete_tree_ssa (); 4464 4465 if (targetm.binds_local_p (current_function_decl)) 4466 { 4467 unsigned int pref = crtl->preferred_stack_boundary; 4468 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) 4469 pref = crtl->stack_alignment_needed; 4470 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary 4471 = pref; 4472 } 4473 4474 /* Make sure volatile mem refs aren't considered valid operands for 4475 arithmetic insns. We must call this here if this is a nested inline 4476 function, since the above code leaves us in the init_recog state, 4477 and the function context push/pop code does not save/restore volatile_ok. 4478 4479 ??? Maybe it isn't necessary for expand_start_function to call this 4480 anymore if we do it here? */ 4481 4482 init_recog_no_volatile (); 4483 4484 /* We're done with this function. Free up memory if we can. */ 4485 free_after_parsing (cfun); 4486 free_after_compilation (cfun); 4487 return 0; 4488 } 4489 4490 struct rtl_opt_pass pass_clean_state = 4491 { 4492 { 4493 RTL_PASS, 4494 "*clean_state", /* name */ 4495 NULL, /* gate */ 4496 rest_of_clean_state, /* execute */ 4497 NULL, /* sub */ 4498 NULL, /* next */ 4499 0, /* static_pass_number */ 4500 TV_FINAL, /* tv_id */ 4501 0, /* properties_required */ 4502 0, /* properties_provided */ 4503 PROP_rtl, /* properties_destroyed */ 4504 0, /* todo_flags_start */ 4505 0 /* todo_flags_finish */ 4506 } 4507 }; 4508