1 /* Convert RTL to assembler code and output it, for GNU compiler. 2 Copyright (C) 1987-2013 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify it under 7 the terms of the GNU General Public License as published by the Free 8 Software Foundation; either version 3, or (at your option) any later 9 version. 10 11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 12 WARRANTY; without even the implied warranty of MERCHANTABILITY or 13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 14 for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 /* This is the final pass of the compiler. 21 It looks at the rtl code for a function and outputs assembler code. 22 23 Call `final_start_function' to output the assembler code for function entry, 24 `final' to output assembler code for some RTL code, 25 `final_end_function' to output assembler code for function exit. 26 If a function is compiled in several pieces, each piece is 27 output separately with `final'. 28 29 Some optimizations are also done at this level. 30 Move instructions that were made unnecessary by good register allocation 31 are detected and omitted from the output. (Though most of these 32 are removed by the last jump pass.) 33 34 Instructions to set the condition codes are omitted when it can be 35 seen that the condition codes already had the desired values. 36 37 In some cases it is sufficient if the inherited condition codes 38 have related values, but this may require the following insn 39 (the one that tests the condition codes) to be modified. 40 41 The code for the function prologue and epilogue are generated 42 directly in assembler by the target functions function_prologue and 43 function_epilogue. Those instructions never exist as rtl. */ 44 45 #include "config.h" 46 #include "system.h" 47 #include "coretypes.h" 48 #include "tm.h" 49 50 #include "tree.h" 51 #include "rtl.h" 52 #include "tm_p.h" 53 #include "regs.h" 54 #include "insn-config.h" 55 #include "insn-attr.h" 56 #include "recog.h" 57 #include "conditions.h" 58 #include "flags.h" 59 #include "hard-reg-set.h" 60 #include "output.h" 61 #include "except.h" 62 #include "function.h" 63 #include "rtl-error.h" 64 #include "toplev.h" /* exact_log2, floor_log2 */ 65 #include "reload.h" 66 #include "intl.h" 67 #include "basic-block.h" 68 #include "target.h" 69 #include "targhooks.h" 70 #include "debug.h" 71 #include "expr.h" 72 #include "tree-pass.h" 73 #include "tree-flow.h" 74 #include "cgraph.h" 75 #include "coverage.h" 76 #include "df.h" 77 #include "ggc.h" 78 #include "cfgloop.h" 79 #include "params.h" 80 #include "tree-pretty-print.h" /* for dump_function_header */ 81 82 #ifdef XCOFF_DEBUGGING_INFO 83 #include "xcoffout.h" /* Needed for external data 84 declarations for e.g. AIX 4.x. */ 85 #endif 86 87 #include "dwarf2out.h" 88 89 #ifdef DBX_DEBUGGING_INFO 90 #include "dbxout.h" 91 #endif 92 93 #ifdef SDB_DEBUGGING_INFO 94 #include "sdbout.h" 95 #endif 96 97 /* Most ports that aren't using cc0 don't need to define CC_STATUS_INIT. 98 So define a null default for it to save conditionalization later. */ 99 #ifndef CC_STATUS_INIT 100 #define CC_STATUS_INIT 101 #endif 102 103 /* Is the given character a logical line separator for the assembler? */ 104 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR 105 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == ';') 106 #endif 107 108 #ifndef JUMP_TABLES_IN_TEXT_SECTION 109 #define JUMP_TABLES_IN_TEXT_SECTION 0 110 #endif 111 112 /* Bitflags used by final_scan_insn. */ 113 #define SEEN_BB 1 114 #define SEEN_NOTE 2 115 #define SEEN_EMITTED 4 116 117 /* Last insn processed by final_scan_insn. */ 118 static rtx debug_insn; 119 rtx current_output_insn; 120 121 /* Line number of last NOTE. */ 122 static int last_linenum; 123 124 /* Last discriminator written to assembly. */ 125 static int last_discriminator; 126 127 /* Discriminator of current block. */ 128 static int discriminator; 129 130 /* Highest line number in current block. */ 131 static int high_block_linenum; 132 133 /* Likewise for function. */ 134 static int high_function_linenum; 135 136 /* Filename of last NOTE. */ 137 static const char *last_filename; 138 139 /* Override filename and line number. */ 140 static const char *override_filename; 141 static int override_linenum; 142 143 /* Whether to force emission of a line note before the next insn. */ 144 static bool force_source_line = false; 145 146 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */ 147 148 /* Nonzero while outputting an `asm' with operands. 149 This means that inconsistencies are the user's fault, so don't die. 150 The precise value is the insn being output, to pass to error_for_asm. */ 151 rtx this_is_asm_operands; 152 153 /* Number of operands of this insn, for an `asm' with operands. */ 154 static unsigned int insn_noperands; 155 156 /* Compare optimization flag. */ 157 158 static rtx last_ignored_compare = 0; 159 160 /* Assign a unique number to each insn that is output. 161 This can be used to generate unique local labels. */ 162 163 static int insn_counter = 0; 164 165 #ifdef HAVE_cc0 166 /* This variable contains machine-dependent flags (defined in tm.h) 167 set and examined by output routines 168 that describe how to interpret the condition codes properly. */ 169 170 CC_STATUS cc_status; 171 172 /* During output of an insn, this contains a copy of cc_status 173 from before the insn. */ 174 175 CC_STATUS cc_prev_status; 176 #endif 177 178 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */ 179 180 static int block_depth; 181 182 /* Nonzero if have enabled APP processing of our assembler output. */ 183 184 static int app_on; 185 186 /* If we are outputting an insn sequence, this contains the sequence rtx. 187 Zero otherwise. */ 188 189 rtx final_sequence; 190 191 #ifdef ASSEMBLER_DIALECT 192 193 /* Number of the assembler dialect to use, starting at 0. */ 194 static int dialect_number; 195 #endif 196 197 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */ 198 rtx current_insn_predicate; 199 200 /* True if printing into -fdump-final-insns= dump. */ 201 bool final_insns_dump_p; 202 203 /* True if profile_function should be called, but hasn't been called yet. */ 204 static bool need_profile_function; 205 206 static int asm_insn_count (rtx); 207 static void profile_function (FILE *); 208 static void profile_after_prologue (FILE *); 209 static bool notice_source_line (rtx, bool *); 210 static rtx walk_alter_subreg (rtx *, bool *); 211 static void output_asm_name (void); 212 static void output_alternate_entry_point (FILE *, rtx); 213 static tree get_mem_expr_from_op (rtx, int *); 214 static void output_asm_operand_names (rtx *, int *, int); 215 #ifdef LEAF_REGISTERS 216 static void leaf_renumber_regs (rtx); 217 #endif 218 #ifdef HAVE_cc0 219 static int alter_cond (rtx); 220 #endif 221 #ifndef ADDR_VEC_ALIGN 222 static int final_addr_vec_align (rtx); 223 #endif 224 static int align_fuzz (rtx, rtx, int, unsigned); 225 226 /* Initialize data in final at the beginning of a compilation. */ 227 228 void 229 init_final (const char *filename ATTRIBUTE_UNUSED) 230 { 231 app_on = 0; 232 final_sequence = 0; 233 234 #ifdef ASSEMBLER_DIALECT 235 dialect_number = ASSEMBLER_DIALECT; 236 #endif 237 } 238 239 /* Default target function prologue and epilogue assembler output. 240 241 If not overridden for epilogue code, then the function body itself 242 contains return instructions wherever needed. */ 243 void 244 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED, 245 HOST_WIDE_INT size ATTRIBUTE_UNUSED) 246 { 247 } 248 249 void 250 default_function_switched_text_sections (FILE *file ATTRIBUTE_UNUSED, 251 tree decl ATTRIBUTE_UNUSED, 252 bool new_is_cold ATTRIBUTE_UNUSED) 253 { 254 } 255 256 /* Default target hook that outputs nothing to a stream. */ 257 void 258 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED) 259 { 260 } 261 262 /* Enable APP processing of subsequent output. 263 Used before the output from an `asm' statement. */ 264 265 void 266 app_enable (void) 267 { 268 if (! app_on) 269 { 270 fputs (ASM_APP_ON, asm_out_file); 271 app_on = 1; 272 } 273 } 274 275 /* Disable APP processing of subsequent output. 276 Called from varasm.c before most kinds of output. */ 277 278 void 279 app_disable (void) 280 { 281 if (app_on) 282 { 283 fputs (ASM_APP_OFF, asm_out_file); 284 app_on = 0; 285 } 286 } 287 288 /* Return the number of slots filled in the current 289 delayed branch sequence (we don't count the insn needing the 290 delay slot). Zero if not in a delayed branch sequence. */ 291 292 #ifdef DELAY_SLOTS 293 int 294 dbr_sequence_length (void) 295 { 296 if (final_sequence != 0) 297 return XVECLEN (final_sequence, 0) - 1; 298 else 299 return 0; 300 } 301 #endif 302 303 /* The next two pages contain routines used to compute the length of an insn 304 and to shorten branches. */ 305 306 /* Arrays for insn lengths, and addresses. The latter is referenced by 307 `insn_current_length'. */ 308 309 static int *insn_lengths; 310 311 vec<int> insn_addresses_; 312 313 /* Max uid for which the above arrays are valid. */ 314 static int insn_lengths_max_uid; 315 316 /* Address of insn being processed. Used by `insn_current_length'. */ 317 int insn_current_address; 318 319 /* Address of insn being processed in previous iteration. */ 320 int insn_last_address; 321 322 /* known invariant alignment of insn being processed. */ 323 int insn_current_align; 324 325 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)] 326 gives the next following alignment insn that increases the known 327 alignment, or NULL_RTX if there is no such insn. 328 For any alignment obtained this way, we can again index uid_align with 329 its uid to obtain the next following align that in turn increases the 330 alignment, till we reach NULL_RTX; the sequence obtained this way 331 for each insn we'll call the alignment chain of this insn in the following 332 comments. */ 333 334 struct label_alignment 335 { 336 short alignment; 337 short max_skip; 338 }; 339 340 static rtx *uid_align; 341 static int *uid_shuid; 342 static struct label_alignment *label_align; 343 344 /* Indicate that branch shortening hasn't yet been done. */ 345 346 void 347 init_insn_lengths (void) 348 { 349 if (uid_shuid) 350 { 351 free (uid_shuid); 352 uid_shuid = 0; 353 } 354 if (insn_lengths) 355 { 356 free (insn_lengths); 357 insn_lengths = 0; 358 insn_lengths_max_uid = 0; 359 } 360 if (HAVE_ATTR_length) 361 INSN_ADDRESSES_FREE (); 362 if (uid_align) 363 { 364 free (uid_align); 365 uid_align = 0; 366 } 367 } 368 369 /* Obtain the current length of an insn. If branch shortening has been done, 370 get its actual length. Otherwise, use FALLBACK_FN to calculate the 371 length. */ 372 static inline int 373 get_attr_length_1 (rtx insn, int (*fallback_fn) (rtx)) 374 { 375 rtx body; 376 int i; 377 int length = 0; 378 379 if (!HAVE_ATTR_length) 380 return 0; 381 382 if (insn_lengths_max_uid > INSN_UID (insn)) 383 return insn_lengths[INSN_UID (insn)]; 384 else 385 switch (GET_CODE (insn)) 386 { 387 case NOTE: 388 case BARRIER: 389 case CODE_LABEL: 390 case DEBUG_INSN: 391 return 0; 392 393 case CALL_INSN: 394 length = fallback_fn (insn); 395 break; 396 397 case JUMP_INSN: 398 body = PATTERN (insn); 399 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 400 { 401 /* Alignment is machine-dependent and should be handled by 402 ADDR_VEC_ALIGN. */ 403 } 404 else 405 length = fallback_fn (insn); 406 break; 407 408 case INSN: 409 body = PATTERN (insn); 410 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER) 411 return 0; 412 413 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 414 length = asm_insn_count (body) * fallback_fn (insn); 415 else if (GET_CODE (body) == SEQUENCE) 416 for (i = 0; i < XVECLEN (body, 0); i++) 417 length += get_attr_length_1 (XVECEXP (body, 0, i), fallback_fn); 418 else 419 length = fallback_fn (insn); 420 break; 421 422 default: 423 break; 424 } 425 426 #ifdef ADJUST_INSN_LENGTH 427 ADJUST_INSN_LENGTH (insn, length); 428 #endif 429 return length; 430 } 431 432 /* Obtain the current length of an insn. If branch shortening has been done, 433 get its actual length. Otherwise, get its maximum length. */ 434 int 435 get_attr_length (rtx insn) 436 { 437 return get_attr_length_1 (insn, insn_default_length); 438 } 439 440 /* Obtain the current length of an insn. If branch shortening has been done, 441 get its actual length. Otherwise, get its minimum length. */ 442 int 443 get_attr_min_length (rtx insn) 444 { 445 return get_attr_length_1 (insn, insn_min_length); 446 } 447 448 /* Code to handle alignment inside shorten_branches. */ 449 450 /* Here is an explanation how the algorithm in align_fuzz can give 451 proper results: 452 453 Call a sequence of instructions beginning with alignment point X 454 and continuing until the next alignment point `block X'. When `X' 455 is used in an expression, it means the alignment value of the 456 alignment point. 457 458 Call the distance between the start of the first insn of block X, and 459 the end of the last insn of block X `IX', for the `inner size of X'. 460 This is clearly the sum of the instruction lengths. 461 462 Likewise with the next alignment-delimited block following X, which we 463 shall call block Y. 464 465 Call the distance between the start of the first insn of block X, and 466 the start of the first insn of block Y `OX', for the `outer size of X'. 467 468 The estimated padding is then OX - IX. 469 470 OX can be safely estimated as 471 472 if (X >= Y) 473 OX = round_up(IX, Y) 474 else 475 OX = round_up(IX, X) + Y - X 476 477 Clearly est(IX) >= real(IX), because that only depends on the 478 instruction lengths, and those being overestimated is a given. 479 480 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so 481 we needn't worry about that when thinking about OX. 482 483 When X >= Y, the alignment provided by Y adds no uncertainty factor 484 for branch ranges starting before X, so we can just round what we have. 485 But when X < Y, we don't know anything about the, so to speak, 486 `middle bits', so we have to assume the worst when aligning up from an 487 address mod X to one mod Y, which is Y - X. */ 488 489 #ifndef LABEL_ALIGN 490 #define LABEL_ALIGN(LABEL) align_labels_log 491 #endif 492 493 #ifndef LOOP_ALIGN 494 #define LOOP_ALIGN(LABEL) align_loops_log 495 #endif 496 497 #ifndef LABEL_ALIGN_AFTER_BARRIER 498 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0 499 #endif 500 501 #ifndef JUMP_ALIGN 502 #define JUMP_ALIGN(LABEL) align_jumps_log 503 #endif 504 505 int 506 default_label_align_after_barrier_max_skip (rtx insn ATTRIBUTE_UNUSED) 507 { 508 return 0; 509 } 510 511 int 512 default_loop_align_max_skip (rtx insn ATTRIBUTE_UNUSED) 513 { 514 return align_loops_max_skip; 515 } 516 517 int 518 default_label_align_max_skip (rtx insn ATTRIBUTE_UNUSED) 519 { 520 return align_labels_max_skip; 521 } 522 523 int 524 default_jump_align_max_skip (rtx insn ATTRIBUTE_UNUSED) 525 { 526 return align_jumps_max_skip; 527 } 528 529 #ifndef ADDR_VEC_ALIGN 530 static int 531 final_addr_vec_align (rtx addr_vec) 532 { 533 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec))); 534 535 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT) 536 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT; 537 return exact_log2 (align); 538 539 } 540 541 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC) 542 #endif 543 544 #ifndef INSN_LENGTH_ALIGNMENT 545 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log 546 #endif 547 548 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)]) 549 550 static int min_labelno, max_labelno; 551 552 #define LABEL_TO_ALIGNMENT(LABEL) \ 553 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment) 554 555 #define LABEL_TO_MAX_SKIP(LABEL) \ 556 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip) 557 558 /* For the benefit of port specific code do this also as a function. */ 559 560 int 561 label_to_alignment (rtx label) 562 { 563 if (CODE_LABEL_NUMBER (label) <= max_labelno) 564 return LABEL_TO_ALIGNMENT (label); 565 return 0; 566 } 567 568 int 569 label_to_max_skip (rtx label) 570 { 571 if (CODE_LABEL_NUMBER (label) <= max_labelno) 572 return LABEL_TO_MAX_SKIP (label); 573 return 0; 574 } 575 576 /* The differences in addresses 577 between a branch and its target might grow or shrink depending on 578 the alignment the start insn of the range (the branch for a forward 579 branch or the label for a backward branch) starts out on; if these 580 differences are used naively, they can even oscillate infinitely. 581 We therefore want to compute a 'worst case' address difference that 582 is independent of the alignment the start insn of the range end 583 up on, and that is at least as large as the actual difference. 584 The function align_fuzz calculates the amount we have to add to the 585 naively computed difference, by traversing the part of the alignment 586 chain of the start insn of the range that is in front of the end insn 587 of the range, and considering for each alignment the maximum amount 588 that it might contribute to a size increase. 589 590 For casesi tables, we also want to know worst case minimum amounts of 591 address difference, in case a machine description wants to introduce 592 some common offset that is added to all offsets in a table. 593 For this purpose, align_fuzz with a growth argument of 0 computes the 594 appropriate adjustment. */ 595 596 /* Compute the maximum delta by which the difference of the addresses of 597 START and END might grow / shrink due to a different address for start 598 which changes the size of alignment insns between START and END. 599 KNOWN_ALIGN_LOG is the alignment known for START. 600 GROWTH should be ~0 if the objective is to compute potential code size 601 increase, and 0 if the objective is to compute potential shrink. 602 The return value is undefined for any other value of GROWTH. */ 603 604 static int 605 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth) 606 { 607 int uid = INSN_UID (start); 608 rtx align_label; 609 int known_align = 1 << known_align_log; 610 int end_shuid = INSN_SHUID (end); 611 int fuzz = 0; 612 613 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid]) 614 { 615 int align_addr, new_align; 616 617 uid = INSN_UID (align_label); 618 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid]; 619 if (uid_shuid[uid] > end_shuid) 620 break; 621 known_align_log = LABEL_TO_ALIGNMENT (align_label); 622 new_align = 1 << known_align_log; 623 if (new_align < known_align) 624 continue; 625 fuzz += (-align_addr ^ growth) & (new_align - known_align); 626 known_align = new_align; 627 } 628 return fuzz; 629 } 630 631 /* Compute a worst-case reference address of a branch so that it 632 can be safely used in the presence of aligned labels. Since the 633 size of the branch itself is unknown, the size of the branch is 634 not included in the range. I.e. for a forward branch, the reference 635 address is the end address of the branch as known from the previous 636 branch shortening pass, minus a value to account for possible size 637 increase due to alignment. For a backward branch, it is the start 638 address of the branch as known from the current pass, plus a value 639 to account for possible size increase due to alignment. 640 NB.: Therefore, the maximum offset allowed for backward branches needs 641 to exclude the branch size. */ 642 643 int 644 insn_current_reference_address (rtx branch) 645 { 646 rtx dest, seq; 647 int seq_uid; 648 649 if (! INSN_ADDRESSES_SET_P ()) 650 return 0; 651 652 seq = NEXT_INSN (PREV_INSN (branch)); 653 seq_uid = INSN_UID (seq); 654 if (!JUMP_P (branch)) 655 /* This can happen for example on the PA; the objective is to know the 656 offset to address something in front of the start of the function. 657 Thus, we can treat it like a backward branch. 658 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than 659 any alignment we'd encounter, so we skip the call to align_fuzz. */ 660 return insn_current_address; 661 dest = JUMP_LABEL (branch); 662 663 /* BRANCH has no proper alignment chain set, so use SEQ. 664 BRANCH also has no INSN_SHUID. */ 665 if (INSN_SHUID (seq) < INSN_SHUID (dest)) 666 { 667 /* Forward branch. */ 668 return (insn_last_address + insn_lengths[seq_uid] 669 - align_fuzz (seq, dest, length_unit_log, ~0)); 670 } 671 else 672 { 673 /* Backward branch. */ 674 return (insn_current_address 675 + align_fuzz (dest, seq, length_unit_log, ~0)); 676 } 677 } 678 679 /* Compute branch alignments based on frequency information in the 680 CFG. */ 681 682 unsigned int 683 compute_alignments (void) 684 { 685 int log, max_skip, max_log; 686 basic_block bb; 687 int freq_max = 0; 688 int freq_threshold = 0; 689 690 if (label_align) 691 { 692 free (label_align); 693 label_align = 0; 694 } 695 696 max_labelno = max_label_num (); 697 min_labelno = get_first_label_num (); 698 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1); 699 700 /* If not optimizing or optimizing for size, don't assign any alignments. */ 701 if (! optimize || optimize_function_for_size_p (cfun)) 702 return 0; 703 704 if (dump_file) 705 { 706 dump_reg_info (dump_file); 707 dump_flow_info (dump_file, TDF_DETAILS); 708 flow_loops_dump (dump_file, NULL, 1); 709 } 710 loop_optimizer_init (AVOID_CFG_MODIFICATIONS); 711 FOR_EACH_BB (bb) 712 if (bb->frequency > freq_max) 713 freq_max = bb->frequency; 714 freq_threshold = freq_max / PARAM_VALUE (PARAM_ALIGN_THRESHOLD); 715 716 if (dump_file) 717 fprintf(dump_file, "freq_max: %i\n",freq_max); 718 FOR_EACH_BB (bb) 719 { 720 rtx label = BB_HEAD (bb); 721 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0; 722 edge e; 723 edge_iterator ei; 724 725 if (!LABEL_P (label) 726 || optimize_bb_for_size_p (bb)) 727 { 728 if (dump_file) 729 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i skipped.\n", 730 bb->index, bb->frequency, bb->loop_father->num, 731 bb_loop_depth (bb)); 732 continue; 733 } 734 max_log = LABEL_ALIGN (label); 735 max_skip = targetm.asm_out.label_align_max_skip (label); 736 737 FOR_EACH_EDGE (e, ei, bb->preds) 738 { 739 if (e->flags & EDGE_FALLTHRU) 740 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e); 741 else 742 branch_frequency += EDGE_FREQUENCY (e); 743 } 744 if (dump_file) 745 { 746 fprintf(dump_file, "BB %4i freq %4i loop %2i loop_depth %2i fall %4i branch %4i", 747 bb->index, bb->frequency, bb->loop_father->num, 748 bb_loop_depth (bb), 749 fallthru_frequency, branch_frequency); 750 if (!bb->loop_father->inner && bb->loop_father->num) 751 fprintf (dump_file, " inner_loop"); 752 if (bb->loop_father->header == bb) 753 fprintf (dump_file, " loop_header"); 754 fprintf (dump_file, "\n"); 755 } 756 757 /* There are two purposes to align block with no fallthru incoming edge: 758 1) to avoid fetch stalls when branch destination is near cache boundary 759 2) to improve cache efficiency in case the previous block is not executed 760 (so it does not need to be in the cache). 761 762 We to catch first case, we align frequently executed blocks. 763 To catch the second, we align blocks that are executed more frequently 764 than the predecessor and the predecessor is likely to not be executed 765 when function is called. */ 766 767 if (!has_fallthru 768 && (branch_frequency > freq_threshold 769 || (bb->frequency > bb->prev_bb->frequency * 10 770 && (bb->prev_bb->frequency 771 <= ENTRY_BLOCK_PTR->frequency / 2)))) 772 { 773 log = JUMP_ALIGN (label); 774 if (dump_file) 775 fprintf(dump_file, " jump alignment added.\n"); 776 if (max_log < log) 777 { 778 max_log = log; 779 max_skip = targetm.asm_out.jump_align_max_skip (label); 780 } 781 } 782 /* In case block is frequent and reached mostly by non-fallthru edge, 783 align it. It is most likely a first block of loop. */ 784 if (has_fallthru 785 && optimize_bb_for_speed_p (bb) 786 && branch_frequency + fallthru_frequency > freq_threshold 787 && (branch_frequency 788 > fallthru_frequency * PARAM_VALUE (PARAM_ALIGN_LOOP_ITERATIONS))) 789 { 790 log = LOOP_ALIGN (label); 791 if (dump_file) 792 fprintf(dump_file, " internal loop alignment added.\n"); 793 if (max_log < log) 794 { 795 max_log = log; 796 max_skip = targetm.asm_out.loop_align_max_skip (label); 797 } 798 } 799 LABEL_TO_ALIGNMENT (label) = max_log; 800 LABEL_TO_MAX_SKIP (label) = max_skip; 801 } 802 803 loop_optimizer_finalize (); 804 free_dominance_info (CDI_DOMINATORS); 805 return 0; 806 } 807 808 struct rtl_opt_pass pass_compute_alignments = 809 { 810 { 811 RTL_PASS, 812 "alignments", /* name */ 813 OPTGROUP_NONE, /* optinfo_flags */ 814 NULL, /* gate */ 815 compute_alignments, /* execute */ 816 NULL, /* sub */ 817 NULL, /* next */ 818 0, /* static_pass_number */ 819 TV_NONE, /* tv_id */ 820 0, /* properties_required */ 821 0, /* properties_provided */ 822 0, /* properties_destroyed */ 823 0, /* todo_flags_start */ 824 TODO_verify_rtl_sharing 825 | TODO_ggc_collect /* todo_flags_finish */ 826 } 827 }; 828 829 830 /* Make a pass over all insns and compute their actual lengths by shortening 831 any branches of variable length if possible. */ 832 833 /* shorten_branches might be called multiple times: for example, the SH 834 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG. 835 In order to do this, it needs proper length information, which it obtains 836 by calling shorten_branches. This cannot be collapsed with 837 shorten_branches itself into a single pass unless we also want to integrate 838 reorg.c, since the branch splitting exposes new instructions with delay 839 slots. */ 840 841 void 842 shorten_branches (rtx first) 843 { 844 rtx insn; 845 int max_uid; 846 int i; 847 int max_log; 848 int max_skip; 849 #define MAX_CODE_ALIGN 16 850 rtx seq; 851 int something_changed = 1; 852 char *varying_length; 853 rtx body; 854 int uid; 855 rtx align_tab[MAX_CODE_ALIGN]; 856 857 /* Compute maximum UID and allocate label_align / uid_shuid. */ 858 max_uid = get_max_uid (); 859 860 /* Free uid_shuid before reallocating it. */ 861 free (uid_shuid); 862 863 uid_shuid = XNEWVEC (int, max_uid); 864 865 if (max_labelno != max_label_num ()) 866 { 867 int old = max_labelno; 868 int n_labels; 869 int n_old_labels; 870 871 max_labelno = max_label_num (); 872 873 n_labels = max_labelno - min_labelno + 1; 874 n_old_labels = old - min_labelno + 1; 875 876 label_align = XRESIZEVEC (struct label_alignment, label_align, n_labels); 877 878 /* Range of labels grows monotonically in the function. Failing here 879 means that the initialization of array got lost. */ 880 gcc_assert (n_old_labels <= n_labels); 881 882 memset (label_align + n_old_labels, 0, 883 (n_labels - n_old_labels) * sizeof (struct label_alignment)); 884 } 885 886 /* Initialize label_align and set up uid_shuid to be strictly 887 monotonically rising with insn order. */ 888 /* We use max_log here to keep track of the maximum alignment we want to 889 impose on the next CODE_LABEL (or the current one if we are processing 890 the CODE_LABEL itself). */ 891 892 max_log = 0; 893 max_skip = 0; 894 895 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn)) 896 { 897 int log; 898 899 INSN_SHUID (insn) = i++; 900 if (INSN_P (insn)) 901 continue; 902 903 if (LABEL_P (insn)) 904 { 905 rtx next; 906 bool next_is_jumptable; 907 908 /* Merge in alignments computed by compute_alignments. */ 909 log = LABEL_TO_ALIGNMENT (insn); 910 if (max_log < log) 911 { 912 max_log = log; 913 max_skip = LABEL_TO_MAX_SKIP (insn); 914 } 915 916 next = next_nonnote_insn (insn); 917 next_is_jumptable = next && JUMP_TABLE_DATA_P (next); 918 if (!next_is_jumptable) 919 { 920 log = LABEL_ALIGN (insn); 921 if (max_log < log) 922 { 923 max_log = log; 924 max_skip = targetm.asm_out.label_align_max_skip (insn); 925 } 926 } 927 /* ADDR_VECs only take room if read-only data goes into the text 928 section. */ 929 if ((JUMP_TABLES_IN_TEXT_SECTION 930 || readonly_data_section == text_section) 931 && next_is_jumptable) 932 { 933 log = ADDR_VEC_ALIGN (next); 934 if (max_log < log) 935 { 936 max_log = log; 937 max_skip = targetm.asm_out.label_align_max_skip (insn); 938 } 939 } 940 LABEL_TO_ALIGNMENT (insn) = max_log; 941 LABEL_TO_MAX_SKIP (insn) = max_skip; 942 max_log = 0; 943 max_skip = 0; 944 } 945 else if (BARRIER_P (insn)) 946 { 947 rtx label; 948 949 for (label = insn; label && ! INSN_P (label); 950 label = NEXT_INSN (label)) 951 if (LABEL_P (label)) 952 { 953 log = LABEL_ALIGN_AFTER_BARRIER (insn); 954 if (max_log < log) 955 { 956 max_log = log; 957 max_skip = targetm.asm_out.label_align_after_barrier_max_skip (label); 958 } 959 break; 960 } 961 } 962 } 963 if (!HAVE_ATTR_length) 964 return; 965 966 /* Allocate the rest of the arrays. */ 967 insn_lengths = XNEWVEC (int, max_uid); 968 insn_lengths_max_uid = max_uid; 969 /* Syntax errors can lead to labels being outside of the main insn stream. 970 Initialize insn_addresses, so that we get reproducible results. */ 971 INSN_ADDRESSES_ALLOC (max_uid); 972 973 varying_length = XCNEWVEC (char, max_uid); 974 975 /* Initialize uid_align. We scan instructions 976 from end to start, and keep in align_tab[n] the last seen insn 977 that does an alignment of at least n+1, i.e. the successor 978 in the alignment chain for an insn that does / has a known 979 alignment of n. */ 980 uid_align = XCNEWVEC (rtx, max_uid); 981 982 for (i = MAX_CODE_ALIGN; --i >= 0;) 983 align_tab[i] = NULL_RTX; 984 seq = get_last_insn (); 985 for (; seq; seq = PREV_INSN (seq)) 986 { 987 int uid = INSN_UID (seq); 988 int log; 989 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0); 990 uid_align[uid] = align_tab[0]; 991 if (log) 992 { 993 /* Found an alignment label. */ 994 uid_align[uid] = align_tab[log]; 995 for (i = log - 1; i >= 0; i--) 996 align_tab[i] = seq; 997 } 998 } 999 1000 /* When optimizing, we start assuming minimum length, and keep increasing 1001 lengths as we find the need for this, till nothing changes. 1002 When not optimizing, we start assuming maximum lengths, and 1003 do a single pass to update the lengths. */ 1004 bool increasing = optimize != 0; 1005 1006 #ifdef CASE_VECTOR_SHORTEN_MODE 1007 if (optimize) 1008 { 1009 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum 1010 label fields. */ 1011 1012 int min_shuid = INSN_SHUID (get_insns ()) - 1; 1013 int max_shuid = INSN_SHUID (get_last_insn ()) + 1; 1014 int rel; 1015 1016 for (insn = first; insn != 0; insn = NEXT_INSN (insn)) 1017 { 1018 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat; 1019 int len, i, min, max, insn_shuid; 1020 int min_align; 1021 addr_diff_vec_flags flags; 1022 1023 if (!JUMP_P (insn) 1024 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC) 1025 continue; 1026 pat = PATTERN (insn); 1027 len = XVECLEN (pat, 1); 1028 gcc_assert (len > 0); 1029 min_align = MAX_CODE_ALIGN; 1030 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--) 1031 { 1032 rtx lab = XEXP (XVECEXP (pat, 1, i), 0); 1033 int shuid = INSN_SHUID (lab); 1034 if (shuid < min) 1035 { 1036 min = shuid; 1037 min_lab = lab; 1038 } 1039 if (shuid > max) 1040 { 1041 max = shuid; 1042 max_lab = lab; 1043 } 1044 if (min_align > LABEL_TO_ALIGNMENT (lab)) 1045 min_align = LABEL_TO_ALIGNMENT (lab); 1046 } 1047 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab); 1048 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab); 1049 insn_shuid = INSN_SHUID (insn); 1050 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0)); 1051 memset (&flags, 0, sizeof (flags)); 1052 flags.min_align = min_align; 1053 flags.base_after_vec = rel > insn_shuid; 1054 flags.min_after_vec = min > insn_shuid; 1055 flags.max_after_vec = max > insn_shuid; 1056 flags.min_after_base = min > rel; 1057 flags.max_after_base = max > rel; 1058 ADDR_DIFF_VEC_FLAGS (pat) = flags; 1059 1060 if (increasing) 1061 PUT_MODE (pat, CASE_VECTOR_SHORTEN_MODE (0, 0, pat)); 1062 } 1063 } 1064 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1065 1066 /* Compute initial lengths, addresses, and varying flags for each insn. */ 1067 int (*length_fun) (rtx) = increasing ? insn_min_length : insn_default_length; 1068 1069 for (insn_current_address = 0, insn = first; 1070 insn != 0; 1071 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn)) 1072 { 1073 uid = INSN_UID (insn); 1074 1075 insn_lengths[uid] = 0; 1076 1077 if (LABEL_P (insn)) 1078 { 1079 int log = LABEL_TO_ALIGNMENT (insn); 1080 if (log) 1081 { 1082 int align = 1 << log; 1083 int new_address = (insn_current_address + align - 1) & -align; 1084 insn_lengths[uid] = new_address - insn_current_address; 1085 } 1086 } 1087 1088 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid]; 1089 1090 if (NOTE_P (insn) || BARRIER_P (insn) 1091 || LABEL_P (insn) || DEBUG_INSN_P(insn)) 1092 continue; 1093 if (INSN_DELETED_P (insn)) 1094 continue; 1095 1096 body = PATTERN (insn); 1097 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 1098 { 1099 /* This only takes room if read-only data goes into the text 1100 section. */ 1101 if (JUMP_TABLES_IN_TEXT_SECTION 1102 || readonly_data_section == text_section) 1103 insn_lengths[uid] = (XVECLEN (body, 1104 GET_CODE (body) == ADDR_DIFF_VEC) 1105 * GET_MODE_SIZE (GET_MODE (body))); 1106 /* Alignment is handled by ADDR_VEC_ALIGN. */ 1107 } 1108 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0) 1109 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn); 1110 else if (GET_CODE (body) == SEQUENCE) 1111 { 1112 int i; 1113 int const_delay_slots; 1114 #ifdef DELAY_SLOTS 1115 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0)); 1116 #else 1117 const_delay_slots = 0; 1118 #endif 1119 int (*inner_length_fun) (rtx) 1120 = const_delay_slots ? length_fun : insn_default_length; 1121 /* Inside a delay slot sequence, we do not do any branch shortening 1122 if the shortening could change the number of delay slots 1123 of the branch. */ 1124 for (i = 0; i < XVECLEN (body, 0); i++) 1125 { 1126 rtx inner_insn = XVECEXP (body, 0, i); 1127 int inner_uid = INSN_UID (inner_insn); 1128 int inner_length; 1129 1130 if (GET_CODE (body) == ASM_INPUT 1131 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0) 1132 inner_length = (asm_insn_count (PATTERN (inner_insn)) 1133 * insn_default_length (inner_insn)); 1134 else 1135 inner_length = inner_length_fun (inner_insn); 1136 1137 insn_lengths[inner_uid] = inner_length; 1138 if (const_delay_slots) 1139 { 1140 if ((varying_length[inner_uid] 1141 = insn_variable_length_p (inner_insn)) != 0) 1142 varying_length[uid] = 1; 1143 INSN_ADDRESSES (inner_uid) = (insn_current_address 1144 + insn_lengths[uid]); 1145 } 1146 else 1147 varying_length[inner_uid] = 0; 1148 insn_lengths[uid] += inner_length; 1149 } 1150 } 1151 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER) 1152 { 1153 insn_lengths[uid] = length_fun (insn); 1154 varying_length[uid] = insn_variable_length_p (insn); 1155 } 1156 1157 /* If needed, do any adjustment. */ 1158 #ifdef ADJUST_INSN_LENGTH 1159 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]); 1160 if (insn_lengths[uid] < 0) 1161 fatal_insn ("negative insn length", insn); 1162 #endif 1163 } 1164 1165 /* Now loop over all the insns finding varying length insns. For each, 1166 get the current insn length. If it has changed, reflect the change. 1167 When nothing changes for a full pass, we are done. */ 1168 1169 while (something_changed) 1170 { 1171 something_changed = 0; 1172 insn_current_align = MAX_CODE_ALIGN - 1; 1173 for (insn_current_address = 0, insn = first; 1174 insn != 0; 1175 insn = NEXT_INSN (insn)) 1176 { 1177 int new_length; 1178 #ifdef ADJUST_INSN_LENGTH 1179 int tmp_length; 1180 #endif 1181 int length_align; 1182 1183 uid = INSN_UID (insn); 1184 1185 if (LABEL_P (insn)) 1186 { 1187 int log = LABEL_TO_ALIGNMENT (insn); 1188 1189 #ifdef CASE_VECTOR_SHORTEN_MODE 1190 /* If the mode of a following jump table was changed, we 1191 may need to update the alignment of this label. */ 1192 rtx next; 1193 bool next_is_jumptable; 1194 1195 next = next_nonnote_insn (insn); 1196 next_is_jumptable = next && JUMP_TABLE_DATA_P (next); 1197 if ((JUMP_TABLES_IN_TEXT_SECTION 1198 || readonly_data_section == text_section) 1199 && next_is_jumptable) 1200 { 1201 int newlog = ADDR_VEC_ALIGN (next); 1202 if (newlog != log) 1203 { 1204 log = newlog; 1205 LABEL_TO_ALIGNMENT (insn) = log; 1206 something_changed = 1; 1207 } 1208 } 1209 #endif 1210 1211 if (log > insn_current_align) 1212 { 1213 int align = 1 << log; 1214 int new_address= (insn_current_address + align - 1) & -align; 1215 insn_lengths[uid] = new_address - insn_current_address; 1216 insn_current_align = log; 1217 insn_current_address = new_address; 1218 } 1219 else 1220 insn_lengths[uid] = 0; 1221 INSN_ADDRESSES (uid) = insn_current_address; 1222 continue; 1223 } 1224 1225 length_align = INSN_LENGTH_ALIGNMENT (insn); 1226 if (length_align < insn_current_align) 1227 insn_current_align = length_align; 1228 1229 insn_last_address = INSN_ADDRESSES (uid); 1230 INSN_ADDRESSES (uid) = insn_current_address; 1231 1232 #ifdef CASE_VECTOR_SHORTEN_MODE 1233 if (optimize && JUMP_P (insn) 1234 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC) 1235 { 1236 rtx body = PATTERN (insn); 1237 int old_length = insn_lengths[uid]; 1238 rtx rel_lab = XEXP (XEXP (body, 0), 0); 1239 rtx min_lab = XEXP (XEXP (body, 2), 0); 1240 rtx max_lab = XEXP (XEXP (body, 3), 0); 1241 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab)); 1242 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab)); 1243 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab)); 1244 rtx prev; 1245 int rel_align = 0; 1246 addr_diff_vec_flags flags; 1247 enum machine_mode vec_mode; 1248 1249 /* Avoid automatic aggregate initialization. */ 1250 flags = ADDR_DIFF_VEC_FLAGS (body); 1251 1252 /* Try to find a known alignment for rel_lab. */ 1253 for (prev = rel_lab; 1254 prev 1255 && ! insn_lengths[INSN_UID (prev)] 1256 && ! (varying_length[INSN_UID (prev)] & 1); 1257 prev = PREV_INSN (prev)) 1258 if (varying_length[INSN_UID (prev)] & 2) 1259 { 1260 rel_align = LABEL_TO_ALIGNMENT (prev); 1261 break; 1262 } 1263 1264 /* See the comment on addr_diff_vec_flags in rtl.h for the 1265 meaning of the flags values. base: REL_LAB vec: INSN */ 1266 /* Anything after INSN has still addresses from the last 1267 pass; adjust these so that they reflect our current 1268 estimate for this pass. */ 1269 if (flags.base_after_vec) 1270 rel_addr += insn_current_address - insn_last_address; 1271 if (flags.min_after_vec) 1272 min_addr += insn_current_address - insn_last_address; 1273 if (flags.max_after_vec) 1274 max_addr += insn_current_address - insn_last_address; 1275 /* We want to know the worst case, i.e. lowest possible value 1276 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB, 1277 its offset is positive, and we have to be wary of code shrink; 1278 otherwise, it is negative, and we have to be vary of code 1279 size increase. */ 1280 if (flags.min_after_base) 1281 { 1282 /* If INSN is between REL_LAB and MIN_LAB, the size 1283 changes we are about to make can change the alignment 1284 within the observed offset, therefore we have to break 1285 it up into two parts that are independent. */ 1286 if (! flags.base_after_vec && flags.min_after_vec) 1287 { 1288 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0); 1289 min_addr -= align_fuzz (insn, min_lab, 0, 0); 1290 } 1291 else 1292 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0); 1293 } 1294 else 1295 { 1296 if (flags.base_after_vec && ! flags.min_after_vec) 1297 { 1298 min_addr -= align_fuzz (min_lab, insn, 0, ~0); 1299 min_addr -= align_fuzz (insn, rel_lab, 0, ~0); 1300 } 1301 else 1302 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0); 1303 } 1304 /* Likewise, determine the highest lowest possible value 1305 for the offset of MAX_LAB. */ 1306 if (flags.max_after_base) 1307 { 1308 if (! flags.base_after_vec && flags.max_after_vec) 1309 { 1310 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0); 1311 max_addr += align_fuzz (insn, max_lab, 0, ~0); 1312 } 1313 else 1314 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0); 1315 } 1316 else 1317 { 1318 if (flags.base_after_vec && ! flags.max_after_vec) 1319 { 1320 max_addr += align_fuzz (max_lab, insn, 0, 0); 1321 max_addr += align_fuzz (insn, rel_lab, 0, 0); 1322 } 1323 else 1324 max_addr += align_fuzz (max_lab, rel_lab, 0, 0); 1325 } 1326 vec_mode = CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr, 1327 max_addr - rel_addr, body); 1328 if (!increasing 1329 || (GET_MODE_SIZE (vec_mode) 1330 >= GET_MODE_SIZE (GET_MODE (body)))) 1331 PUT_MODE (body, vec_mode); 1332 if (JUMP_TABLES_IN_TEXT_SECTION 1333 || readonly_data_section == text_section) 1334 { 1335 insn_lengths[uid] 1336 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body))); 1337 insn_current_address += insn_lengths[uid]; 1338 if (insn_lengths[uid] != old_length) 1339 something_changed = 1; 1340 } 1341 1342 continue; 1343 } 1344 #endif /* CASE_VECTOR_SHORTEN_MODE */ 1345 1346 if (! (varying_length[uid])) 1347 { 1348 if (NONJUMP_INSN_P (insn) 1349 && GET_CODE (PATTERN (insn)) == SEQUENCE) 1350 { 1351 int i; 1352 1353 body = PATTERN (insn); 1354 for (i = 0; i < XVECLEN (body, 0); i++) 1355 { 1356 rtx inner_insn = XVECEXP (body, 0, i); 1357 int inner_uid = INSN_UID (inner_insn); 1358 1359 INSN_ADDRESSES (inner_uid) = insn_current_address; 1360 1361 insn_current_address += insn_lengths[inner_uid]; 1362 } 1363 } 1364 else 1365 insn_current_address += insn_lengths[uid]; 1366 1367 continue; 1368 } 1369 1370 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE) 1371 { 1372 int i; 1373 1374 body = PATTERN (insn); 1375 new_length = 0; 1376 for (i = 0; i < XVECLEN (body, 0); i++) 1377 { 1378 rtx inner_insn = XVECEXP (body, 0, i); 1379 int inner_uid = INSN_UID (inner_insn); 1380 int inner_length; 1381 1382 INSN_ADDRESSES (inner_uid) = insn_current_address; 1383 1384 /* insn_current_length returns 0 for insns with a 1385 non-varying length. */ 1386 if (! varying_length[inner_uid]) 1387 inner_length = insn_lengths[inner_uid]; 1388 else 1389 inner_length = insn_current_length (inner_insn); 1390 1391 if (inner_length != insn_lengths[inner_uid]) 1392 { 1393 if (!increasing || inner_length > insn_lengths[inner_uid]) 1394 { 1395 insn_lengths[inner_uid] = inner_length; 1396 something_changed = 1; 1397 } 1398 else 1399 inner_length = insn_lengths[inner_uid]; 1400 } 1401 insn_current_address += inner_length; 1402 new_length += inner_length; 1403 } 1404 } 1405 else 1406 { 1407 new_length = insn_current_length (insn); 1408 insn_current_address += new_length; 1409 } 1410 1411 #ifdef ADJUST_INSN_LENGTH 1412 /* If needed, do any adjustment. */ 1413 tmp_length = new_length; 1414 ADJUST_INSN_LENGTH (insn, new_length); 1415 insn_current_address += (new_length - tmp_length); 1416 #endif 1417 1418 if (new_length != insn_lengths[uid] 1419 && (!increasing || new_length > insn_lengths[uid])) 1420 { 1421 insn_lengths[uid] = new_length; 1422 something_changed = 1; 1423 } 1424 else 1425 insn_current_address += insn_lengths[uid] - new_length; 1426 } 1427 /* For a non-optimizing compile, do only a single pass. */ 1428 if (!increasing) 1429 break; 1430 } 1431 1432 free (varying_length); 1433 } 1434 1435 /* Given the body of an INSN known to be generated by an ASM statement, return 1436 the number of machine instructions likely to be generated for this insn. 1437 This is used to compute its length. */ 1438 1439 static int 1440 asm_insn_count (rtx body) 1441 { 1442 const char *templ; 1443 1444 if (GET_CODE (body) == ASM_INPUT) 1445 templ = XSTR (body, 0); 1446 else 1447 templ = decode_asm_operands (body, NULL, NULL, NULL, NULL, NULL); 1448 1449 return asm_str_count (templ); 1450 } 1451 1452 /* Return the number of machine instructions likely to be generated for the 1453 inline-asm template. */ 1454 int 1455 asm_str_count (const char *templ) 1456 { 1457 int count = 1; 1458 1459 if (!*templ) 1460 return 0; 1461 1462 for (; *templ; templ++) 1463 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*templ, templ) 1464 || *templ == '\n') 1465 count++; 1466 1467 return count; 1468 } 1469 1470 /* ??? This is probably the wrong place for these. */ 1471 /* Structure recording the mapping from source file and directory 1472 names at compile time to those to be embedded in debug 1473 information. */ 1474 typedef struct debug_prefix_map 1475 { 1476 const char *old_prefix; 1477 const char *new_prefix; 1478 size_t old_len; 1479 size_t new_len; 1480 struct debug_prefix_map *next; 1481 } debug_prefix_map; 1482 1483 /* Linked list of such structures. */ 1484 debug_prefix_map *debug_prefix_maps; 1485 1486 1487 /* Record a debug file prefix mapping. ARG is the argument to 1488 -fdebug-prefix-map and must be of the form OLD=NEW. */ 1489 1490 void 1491 add_debug_prefix_map (const char *arg) 1492 { 1493 debug_prefix_map *map; 1494 const char *p; 1495 char *env; 1496 const char *old; 1497 size_t oldlen; 1498 1499 p = strchr (arg, '='); 1500 if (!p) 1501 { 1502 error ("invalid argument %qs to -fdebug-prefix-map", arg); 1503 return; 1504 } 1505 if (*arg == '$') 1506 { 1507 env = xstrndup (arg+1, p - (arg+1)); 1508 old = getenv(env); 1509 if (!old) 1510 { 1511 warning (0, "environment variable %qs not set in argument to " 1512 "-fdebug-prefix-map", env); 1513 free(env); 1514 return; 1515 } 1516 oldlen = strlen(old); 1517 free(env); 1518 } 1519 else 1520 { 1521 old = xstrndup (arg, p - arg); 1522 oldlen = p - arg; 1523 } 1524 1525 map = XNEW (debug_prefix_map); 1526 map->old_prefix = old; 1527 map->old_len = oldlen; 1528 p++; 1529 map->new_prefix = xstrdup (p); 1530 map->new_len = strlen (p); 1531 map->next = debug_prefix_maps; 1532 debug_prefix_maps = map; 1533 } 1534 1535 /* Perform user-specified mapping of debug filename prefixes. Return 1536 the new name corresponding to FILENAME. */ 1537 1538 static const char * 1539 remap_debug_prefix_filename (const char *filename) 1540 { 1541 debug_prefix_map *map; 1542 char *s; 1543 const char *name; 1544 size_t name_len; 1545 1546 for (map = debug_prefix_maps; map; map = map->next) 1547 if (filename_ncmp (filename, map->old_prefix, map->old_len) == 0) 1548 break; 1549 if (!map) 1550 return filename; 1551 name = filename + map->old_len; 1552 name_len = strlen (name) + 1; 1553 s = (char *) alloca (name_len + map->new_len); 1554 memcpy (s, map->new_prefix, map->new_len); 1555 memcpy (s + map->new_len, name, name_len); 1556 return ggc_strdup (s); 1557 } 1558 1559 #include <regex.h> 1560 1561 typedef struct debug_regex_map 1562 { 1563 regex_t re; 1564 const char *sub; 1565 struct debug_regex_map *next; 1566 } debug_regex_map; 1567 1568 /* Linked list of such structures. */ 1569 debug_regex_map *debug_regex_maps; 1570 1571 1572 /* Record a debug file regex mapping. ARG is the argument to 1573 -fdebug-regex-map and must be of the form OLD=NEW. */ 1574 1575 void 1576 add_debug_regex_map (const char *arg) 1577 { 1578 debug_regex_map *map; 1579 const char *p; 1580 char *old; 1581 char buf[1024]; 1582 regex_t re; 1583 int e; 1584 1585 p = strchr (arg, '='); 1586 if (!p) 1587 { 1588 error ("invalid argument %qs to -fdebug-regex-map", arg); 1589 return; 1590 } 1591 1592 old = xstrndup (arg, p - arg); 1593 if ((e = regcomp(&re, old, REG_EXTENDED)) != 0) 1594 { 1595 regerror(e, &re, buf, sizeof(buf)); 1596 warning (0, "regular expression compilation for %qs in argument to " 1597 "-fdebug-regex-map failed: %qs", old, buf); 1598 free(old); 1599 return; 1600 } 1601 free(old); 1602 1603 map = XNEW (debug_regex_map); 1604 map->re = re; 1605 p++; 1606 map->sub = xstrdup (p); 1607 map->next = debug_regex_maps; 1608 debug_regex_maps = map; 1609 } 1610 1611 extern ssize_t aregsub(char **, const char *, 1612 const regmatch_t *rm, const char *); 1613 1614 /* Perform user-specified mapping of debug filename regular expressions. Return 1615 the new name corresponding to FILENAME. */ 1616 1617 static const char * 1618 remap_debug_regex_filename (const char *filename) 1619 { 1620 debug_regex_map *map; 1621 char *s; 1622 regmatch_t rm[10]; 1623 1624 for (map = debug_regex_maps; map; map = map->next) 1625 if (regexec (&map->re, filename, 10, rm, 0) == 0 1626 && aregsub (&s, map->sub, rm, filename) >= 0) 1627 { 1628 const char *name = ggc_strdup(s); 1629 free(s); 1630 return name; 1631 } 1632 return filename; 1633 } 1634 1635 const char * 1636 remap_debug_filename (const char *filename) 1637 { 1638 return remap_debug_regex_filename (remap_debug_prefix_filename (filename)); 1639 } 1640 1641 /* Return true if DWARF2 debug info can be emitted for DECL. */ 1642 1643 static bool 1644 dwarf2_debug_info_emitted_p (tree decl) 1645 { 1646 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG) 1647 return false; 1648 1649 if (DECL_IGNORED_P (decl)) 1650 return false; 1651 1652 return true; 1653 } 1654 1655 /* Return scope resulting from combination of S1 and S2. */ 1656 static tree 1657 choose_inner_scope (tree s1, tree s2) 1658 { 1659 if (!s1) 1660 return s2; 1661 if (!s2) 1662 return s1; 1663 if (BLOCK_NUMBER (s1) > BLOCK_NUMBER (s2)) 1664 return s1; 1665 return s2; 1666 } 1667 1668 /* Emit lexical block notes needed to change scope from S1 to S2. */ 1669 1670 static void 1671 change_scope (rtx orig_insn, tree s1, tree s2) 1672 { 1673 rtx insn = orig_insn; 1674 tree com = NULL_TREE; 1675 tree ts1 = s1, ts2 = s2; 1676 tree s; 1677 1678 while (ts1 != ts2) 1679 { 1680 gcc_assert (ts1 && ts2); 1681 if (BLOCK_NUMBER (ts1) > BLOCK_NUMBER (ts2)) 1682 ts1 = BLOCK_SUPERCONTEXT (ts1); 1683 else if (BLOCK_NUMBER (ts1) < BLOCK_NUMBER (ts2)) 1684 ts2 = BLOCK_SUPERCONTEXT (ts2); 1685 else 1686 { 1687 ts1 = BLOCK_SUPERCONTEXT (ts1); 1688 ts2 = BLOCK_SUPERCONTEXT (ts2); 1689 } 1690 } 1691 com = ts1; 1692 1693 /* Close scopes. */ 1694 s = s1; 1695 while (s != com) 1696 { 1697 rtx note = emit_note_before (NOTE_INSN_BLOCK_END, insn); 1698 NOTE_BLOCK (note) = s; 1699 s = BLOCK_SUPERCONTEXT (s); 1700 } 1701 1702 /* Open scopes. */ 1703 s = s2; 1704 while (s != com) 1705 { 1706 insn = emit_note_before (NOTE_INSN_BLOCK_BEG, insn); 1707 NOTE_BLOCK (insn) = s; 1708 s = BLOCK_SUPERCONTEXT (s); 1709 } 1710 } 1711 1712 /* Rebuild all the NOTE_INSN_BLOCK_BEG and NOTE_INSN_BLOCK_END notes based 1713 on the scope tree and the newly reordered instructions. */ 1714 1715 static void 1716 reemit_insn_block_notes (void) 1717 { 1718 tree cur_block = DECL_INITIAL (cfun->decl); 1719 rtx insn, note; 1720 1721 insn = get_insns (); 1722 if (!active_insn_p (insn)) 1723 insn = next_active_insn (insn); 1724 for (; insn; insn = next_active_insn (insn)) 1725 { 1726 tree this_block; 1727 1728 /* Avoid putting scope notes between jump table and its label. */ 1729 if (JUMP_TABLE_DATA_P (insn)) 1730 continue; 1731 1732 this_block = insn_scope (insn); 1733 /* For sequences compute scope resulting from merging all scopes 1734 of instructions nested inside. */ 1735 if (GET_CODE (PATTERN (insn)) == SEQUENCE) 1736 { 1737 int i; 1738 rtx body = PATTERN (insn); 1739 1740 this_block = NULL; 1741 for (i = 0; i < XVECLEN (body, 0); i++) 1742 this_block = choose_inner_scope (this_block, 1743 insn_scope (XVECEXP (body, 0, i))); 1744 } 1745 if (! this_block) 1746 { 1747 if (INSN_LOCATION (insn) == UNKNOWN_LOCATION) 1748 continue; 1749 else 1750 this_block = DECL_INITIAL (cfun->decl); 1751 } 1752 1753 if (this_block != cur_block) 1754 { 1755 change_scope (insn, cur_block, this_block); 1756 cur_block = this_block; 1757 } 1758 } 1759 1760 /* change_scope emits before the insn, not after. */ 1761 note = emit_note (NOTE_INSN_DELETED); 1762 change_scope (note, cur_block, DECL_INITIAL (cfun->decl)); 1763 delete_insn (note); 1764 1765 reorder_blocks (); 1766 } 1767 1768 /* Output assembler code for the start of a function, 1769 and initialize some of the variables in this file 1770 for the new function. The label for the function and associated 1771 assembler pseudo-ops have already been output in `assemble_start_function'. 1772 1773 FIRST is the first insn of the rtl for the function being compiled. 1774 FILE is the file to write assembler code to. 1775 OPTIMIZE_P is nonzero if we should eliminate redundant 1776 test and compare insns. */ 1777 1778 void 1779 final_start_function (rtx first, FILE *file, 1780 int optimize_p ATTRIBUTE_UNUSED) 1781 { 1782 block_depth = 0; 1783 1784 this_is_asm_operands = 0; 1785 1786 need_profile_function = false; 1787 1788 last_filename = LOCATION_FILE (prologue_location); 1789 last_linenum = LOCATION_LINE (prologue_location); 1790 last_discriminator = discriminator = 0; 1791 1792 high_block_linenum = high_function_linenum = last_linenum; 1793 1794 if (!DECL_IGNORED_P (current_function_decl)) 1795 debug_hooks->begin_prologue (last_linenum, last_filename); 1796 1797 if (!dwarf2_debug_info_emitted_p (current_function_decl)) 1798 dwarf2out_begin_prologue (0, NULL); 1799 1800 #ifdef LEAF_REG_REMAP 1801 if (crtl->uses_only_leaf_regs) 1802 leaf_renumber_regs (first); 1803 #endif 1804 1805 /* The Sun386i and perhaps other machines don't work right 1806 if the profiling code comes after the prologue. */ 1807 if (targetm.profile_before_prologue () && crtl->profile) 1808 { 1809 if (targetm.asm_out.function_prologue 1810 == default_function_pro_epilogue 1811 #ifdef HAVE_prologue 1812 && HAVE_prologue 1813 #endif 1814 ) 1815 { 1816 rtx insn; 1817 for (insn = first; insn; insn = NEXT_INSN (insn)) 1818 if (!NOTE_P (insn)) 1819 { 1820 insn = NULL_RTX; 1821 break; 1822 } 1823 else if (NOTE_KIND (insn) == NOTE_INSN_BASIC_BLOCK 1824 || NOTE_KIND (insn) == NOTE_INSN_FUNCTION_BEG) 1825 break; 1826 else if (NOTE_KIND (insn) == NOTE_INSN_DELETED 1827 || NOTE_KIND (insn) == NOTE_INSN_VAR_LOCATION) 1828 continue; 1829 else 1830 { 1831 insn = NULL_RTX; 1832 break; 1833 } 1834 1835 if (insn) 1836 need_profile_function = true; 1837 else 1838 profile_function (file); 1839 } 1840 else 1841 profile_function (file); 1842 } 1843 1844 /* If debugging, assign block numbers to all of the blocks in this 1845 function. */ 1846 if (write_symbols) 1847 { 1848 reemit_insn_block_notes (); 1849 number_blocks (current_function_decl); 1850 /* We never actually put out begin/end notes for the top-level 1851 block in the function. But, conceptually, that block is 1852 always needed. */ 1853 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1; 1854 } 1855 1856 if (warn_frame_larger_than 1857 && get_frame_size () > frame_larger_than_size) 1858 { 1859 /* Issue a warning */ 1860 warning (OPT_Wframe_larger_than_, 1861 "the frame size of %wd bytes is larger than %wd bytes", 1862 get_frame_size (), frame_larger_than_size); 1863 } 1864 1865 /* First output the function prologue: code to set up the stack frame. */ 1866 targetm.asm_out.function_prologue (file, get_frame_size ()); 1867 1868 /* If the machine represents the prologue as RTL, the profiling code must 1869 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */ 1870 #ifdef HAVE_prologue 1871 if (! HAVE_prologue) 1872 #endif 1873 profile_after_prologue (file); 1874 } 1875 1876 static void 1877 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED) 1878 { 1879 if (!targetm.profile_before_prologue () && crtl->profile) 1880 profile_function (file); 1881 } 1882 1883 static void 1884 profile_function (FILE *file ATTRIBUTE_UNUSED) 1885 { 1886 #ifndef NO_PROFILE_COUNTERS 1887 # define NO_PROFILE_COUNTERS 0 1888 #endif 1889 #ifdef ASM_OUTPUT_REG_PUSH 1890 rtx sval = NULL, chain = NULL; 1891 1892 if (cfun->returns_struct) 1893 sval = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1894 true); 1895 if (cfun->static_chain_decl) 1896 chain = targetm.calls.static_chain (current_function_decl, true); 1897 #endif /* ASM_OUTPUT_REG_PUSH */ 1898 1899 if (! NO_PROFILE_COUNTERS) 1900 { 1901 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE); 1902 switch_to_section (data_section); 1903 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT)); 1904 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no); 1905 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1); 1906 } 1907 1908 switch_to_section (current_function_section ()); 1909 1910 #ifdef ASM_OUTPUT_REG_PUSH 1911 if (sval && REG_P (sval)) 1912 ASM_OUTPUT_REG_PUSH (file, REGNO (sval)); 1913 if (chain && REG_P (chain)) 1914 ASM_OUTPUT_REG_PUSH (file, REGNO (chain)); 1915 #endif 1916 1917 FUNCTION_PROFILER (file, current_function_funcdef_no); 1918 1919 #ifdef ASM_OUTPUT_REG_PUSH 1920 if (chain && REG_P (chain)) 1921 ASM_OUTPUT_REG_POP (file, REGNO (chain)); 1922 if (sval && REG_P (sval)) 1923 ASM_OUTPUT_REG_POP (file, REGNO (sval)); 1924 #endif 1925 } 1926 1927 /* Output assembler code for the end of a function. 1928 For clarity, args are same as those of `final_start_function' 1929 even though not all of them are needed. */ 1930 1931 void 1932 final_end_function (void) 1933 { 1934 app_disable (); 1935 1936 if (!DECL_IGNORED_P (current_function_decl)) 1937 debug_hooks->end_function (high_function_linenum); 1938 1939 /* Finally, output the function epilogue: 1940 code to restore the stack frame and return to the caller. */ 1941 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ()); 1942 1943 /* And debug output. */ 1944 if (!DECL_IGNORED_P (current_function_decl)) 1945 debug_hooks->end_epilogue (last_linenum, last_filename); 1946 1947 if (!dwarf2_debug_info_emitted_p (current_function_decl) 1948 && dwarf2out_do_frame ()) 1949 dwarf2out_end_epilogue (last_linenum, last_filename); 1950 } 1951 1952 1953 /* Dumper helper for basic block information. FILE is the assembly 1954 output file, and INSN is the instruction being emitted. */ 1955 1956 static void 1957 dump_basic_block_info (FILE *file, rtx insn, basic_block *start_to_bb, 1958 basic_block *end_to_bb, int bb_map_size, int *bb_seqn) 1959 { 1960 basic_block bb; 1961 1962 if (!flag_debug_asm) 1963 return; 1964 1965 if (INSN_UID (insn) < bb_map_size 1966 && (bb = start_to_bb[INSN_UID (insn)]) != NULL) 1967 { 1968 edge e; 1969 edge_iterator ei; 1970 1971 fprintf (file, "%s BLOCK %d", ASM_COMMENT_START, bb->index); 1972 if (bb->frequency) 1973 fprintf (file, " freq:%d", bb->frequency); 1974 if (bb->count) 1975 fprintf (file, " count:" HOST_WIDEST_INT_PRINT_DEC, 1976 bb->count); 1977 fprintf (file, " seq:%d", (*bb_seqn)++); 1978 fprintf (file, "\n%s PRED:", ASM_COMMENT_START); 1979 FOR_EACH_EDGE (e, ei, bb->preds) 1980 { 1981 dump_edge_info (file, e, TDF_DETAILS, 0); 1982 } 1983 fprintf (file, "\n"); 1984 } 1985 if (INSN_UID (insn) < bb_map_size 1986 && (bb = end_to_bb[INSN_UID (insn)]) != NULL) 1987 { 1988 edge e; 1989 edge_iterator ei; 1990 1991 fprintf (asm_out_file, "%s SUCC:", ASM_COMMENT_START); 1992 FOR_EACH_EDGE (e, ei, bb->succs) 1993 { 1994 dump_edge_info (asm_out_file, e, TDF_DETAILS, 1); 1995 } 1996 fprintf (file, "\n"); 1997 } 1998 } 1999 2000 /* Output assembler code for some insns: all or part of a function. 2001 For description of args, see `final_start_function', above. */ 2002 2003 void 2004 final (rtx first, FILE *file, int optimize_p) 2005 { 2006 rtx insn, next; 2007 int seen = 0; 2008 2009 /* Used for -dA dump. */ 2010 basic_block *start_to_bb = NULL; 2011 basic_block *end_to_bb = NULL; 2012 int bb_map_size = 0; 2013 int bb_seqn = 0; 2014 2015 last_ignored_compare = 0; 2016 2017 #ifdef HAVE_cc0 2018 for (insn = first; insn; insn = NEXT_INSN (insn)) 2019 { 2020 /* If CC tracking across branches is enabled, record the insn which 2021 jumps to each branch only reached from one place. */ 2022 if (optimize_p && JUMP_P (insn)) 2023 { 2024 rtx lab = JUMP_LABEL (insn); 2025 if (lab && LABEL_P (lab) && LABEL_NUSES (lab) == 1) 2026 { 2027 LABEL_REFS (lab) = insn; 2028 } 2029 } 2030 } 2031 #endif 2032 2033 init_recog (); 2034 2035 CC_STATUS_INIT; 2036 2037 if (flag_debug_asm) 2038 { 2039 basic_block bb; 2040 2041 bb_map_size = get_max_uid () + 1; 2042 start_to_bb = XCNEWVEC (basic_block, bb_map_size); 2043 end_to_bb = XCNEWVEC (basic_block, bb_map_size); 2044 2045 /* There is no cfg for a thunk. */ 2046 if (!cfun->is_thunk) 2047 FOR_EACH_BB_REVERSE (bb) 2048 { 2049 start_to_bb[INSN_UID (BB_HEAD (bb))] = bb; 2050 end_to_bb[INSN_UID (BB_END (bb))] = bb; 2051 } 2052 } 2053 2054 /* Output the insns. */ 2055 for (insn = first; insn;) 2056 { 2057 if (HAVE_ATTR_length) 2058 { 2059 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ()) 2060 { 2061 /* This can be triggered by bugs elsewhere in the compiler if 2062 new insns are created after init_insn_lengths is called. */ 2063 gcc_assert (NOTE_P (insn)); 2064 insn_current_address = -1; 2065 } 2066 else 2067 insn_current_address = INSN_ADDRESSES (INSN_UID (insn)); 2068 } 2069 2070 dump_basic_block_info (file, insn, start_to_bb, end_to_bb, 2071 bb_map_size, &bb_seqn); 2072 insn = final_scan_insn (insn, file, optimize_p, 0, &seen); 2073 } 2074 2075 if (flag_debug_asm) 2076 { 2077 free (start_to_bb); 2078 free (end_to_bb); 2079 } 2080 2081 /* Remove CFI notes, to avoid compare-debug failures. */ 2082 for (insn = first; insn; insn = next) 2083 { 2084 next = NEXT_INSN (insn); 2085 if (NOTE_P (insn) 2086 && (NOTE_KIND (insn) == NOTE_INSN_CFI 2087 || NOTE_KIND (insn) == NOTE_INSN_CFI_LABEL)) 2088 delete_insn (insn); 2089 } 2090 } 2091 2092 const char * 2093 get_insn_template (int code, rtx insn) 2094 { 2095 switch (insn_data[code].output_format) 2096 { 2097 case INSN_OUTPUT_FORMAT_SINGLE: 2098 return insn_data[code].output.single; 2099 case INSN_OUTPUT_FORMAT_MULTI: 2100 return insn_data[code].output.multi[which_alternative]; 2101 case INSN_OUTPUT_FORMAT_FUNCTION: 2102 gcc_assert (insn); 2103 return (*insn_data[code].output.function) (recog_data.operand, insn); 2104 2105 default: 2106 gcc_unreachable (); 2107 } 2108 } 2109 2110 /* Emit the appropriate declaration for an alternate-entry-point 2111 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with 2112 LABEL_KIND != LABEL_NORMAL. 2113 2114 The case fall-through in this function is intentional. */ 2115 static void 2116 output_alternate_entry_point (FILE *file, rtx insn) 2117 { 2118 const char *name = LABEL_NAME (insn); 2119 2120 switch (LABEL_KIND (insn)) 2121 { 2122 case LABEL_WEAK_ENTRY: 2123 #ifdef ASM_WEAKEN_LABEL 2124 ASM_WEAKEN_LABEL (file, name); 2125 #endif 2126 case LABEL_GLOBAL_ENTRY: 2127 targetm.asm_out.globalize_label (file, name); 2128 case LABEL_STATIC_ENTRY: 2129 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE 2130 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function"); 2131 #endif 2132 ASM_OUTPUT_LABEL (file, name); 2133 break; 2134 2135 case LABEL_NORMAL: 2136 default: 2137 gcc_unreachable (); 2138 } 2139 } 2140 2141 /* Given a CALL_INSN, find and return the nested CALL. */ 2142 static rtx 2143 call_from_call_insn (rtx insn) 2144 { 2145 rtx x; 2146 gcc_assert (CALL_P (insn)); 2147 x = PATTERN (insn); 2148 2149 while (GET_CODE (x) != CALL) 2150 { 2151 switch (GET_CODE (x)) 2152 { 2153 default: 2154 gcc_unreachable (); 2155 case COND_EXEC: 2156 x = COND_EXEC_CODE (x); 2157 break; 2158 case PARALLEL: 2159 x = XVECEXP (x, 0, 0); 2160 break; 2161 case SET: 2162 x = XEXP (x, 1); 2163 break; 2164 } 2165 } 2166 return x; 2167 } 2168 2169 /* The final scan for one insn, INSN. 2170 Args are same as in `final', except that INSN 2171 is the insn being scanned. 2172 Value returned is the next insn to be scanned. 2173 2174 NOPEEPHOLES is the flag to disallow peephole processing (currently 2175 used for within delayed branch sequence output). 2176 2177 SEEN is used to track the end of the prologue, for emitting 2178 debug information. We force the emission of a line note after 2179 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or 2180 at the beginning of the second basic block, whichever comes 2181 first. */ 2182 2183 rtx 2184 final_scan_insn (rtx insn, FILE *file, int optimize_p ATTRIBUTE_UNUSED, 2185 int nopeepholes ATTRIBUTE_UNUSED, int *seen) 2186 { 2187 #ifdef HAVE_cc0 2188 rtx set; 2189 #endif 2190 rtx next; 2191 2192 insn_counter++; 2193 2194 /* Ignore deleted insns. These can occur when we split insns (due to a 2195 template of "#") while not optimizing. */ 2196 if (INSN_DELETED_P (insn)) 2197 return NEXT_INSN (insn); 2198 2199 switch (GET_CODE (insn)) 2200 { 2201 case NOTE: 2202 switch (NOTE_KIND (insn)) 2203 { 2204 case NOTE_INSN_DELETED: 2205 break; 2206 2207 case NOTE_INSN_SWITCH_TEXT_SECTIONS: 2208 in_cold_section_p = !in_cold_section_p; 2209 2210 if (dwarf2out_do_frame ()) 2211 dwarf2out_switch_text_section (); 2212 else if (!DECL_IGNORED_P (current_function_decl)) 2213 debug_hooks->switch_text_section (); 2214 2215 switch_to_section (current_function_section ()); 2216 targetm.asm_out.function_switched_text_sections (asm_out_file, 2217 current_function_decl, 2218 in_cold_section_p); 2219 break; 2220 2221 case NOTE_INSN_BASIC_BLOCK: 2222 if (need_profile_function) 2223 { 2224 profile_function (asm_out_file); 2225 need_profile_function = false; 2226 } 2227 2228 if (targetm.asm_out.unwind_emit) 2229 targetm.asm_out.unwind_emit (asm_out_file, insn); 2230 2231 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB) 2232 { 2233 *seen |= SEEN_EMITTED; 2234 force_source_line = true; 2235 } 2236 else 2237 *seen |= SEEN_BB; 2238 2239 discriminator = NOTE_BASIC_BLOCK (insn)->discriminator; 2240 2241 break; 2242 2243 case NOTE_INSN_EH_REGION_BEG: 2244 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB", 2245 NOTE_EH_HANDLER (insn)); 2246 break; 2247 2248 case NOTE_INSN_EH_REGION_END: 2249 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE", 2250 NOTE_EH_HANDLER (insn)); 2251 break; 2252 2253 case NOTE_INSN_PROLOGUE_END: 2254 targetm.asm_out.function_end_prologue (file); 2255 profile_after_prologue (file); 2256 2257 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 2258 { 2259 *seen |= SEEN_EMITTED; 2260 force_source_line = true; 2261 } 2262 else 2263 *seen |= SEEN_NOTE; 2264 2265 break; 2266 2267 case NOTE_INSN_EPILOGUE_BEG: 2268 if (!DECL_IGNORED_P (current_function_decl)) 2269 (*debug_hooks->begin_epilogue) (last_linenum, last_filename); 2270 targetm.asm_out.function_begin_epilogue (file); 2271 break; 2272 2273 case NOTE_INSN_CFI: 2274 dwarf2out_emit_cfi (NOTE_CFI (insn)); 2275 break; 2276 2277 case NOTE_INSN_CFI_LABEL: 2278 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LCFI", 2279 NOTE_LABEL_NUMBER (insn)); 2280 break; 2281 2282 case NOTE_INSN_FUNCTION_BEG: 2283 if (need_profile_function) 2284 { 2285 profile_function (asm_out_file); 2286 need_profile_function = false; 2287 } 2288 2289 app_disable (); 2290 if (!DECL_IGNORED_P (current_function_decl)) 2291 debug_hooks->end_prologue (last_linenum, last_filename); 2292 2293 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE) 2294 { 2295 *seen |= SEEN_EMITTED; 2296 force_source_line = true; 2297 } 2298 else 2299 *seen |= SEEN_NOTE; 2300 2301 break; 2302 2303 case NOTE_INSN_BLOCK_BEG: 2304 if (debug_info_level == DINFO_LEVEL_NORMAL 2305 || debug_info_level == DINFO_LEVEL_VERBOSE 2306 || write_symbols == DWARF2_DEBUG 2307 || write_symbols == VMS_AND_DWARF2_DEBUG 2308 || write_symbols == VMS_DEBUG) 2309 { 2310 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 2311 2312 app_disable (); 2313 ++block_depth; 2314 high_block_linenum = last_linenum; 2315 2316 /* Output debugging info about the symbol-block beginning. */ 2317 if (!DECL_IGNORED_P (current_function_decl)) 2318 debug_hooks->begin_block (last_linenum, n); 2319 2320 /* Mark this block as output. */ 2321 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1; 2322 } 2323 if (write_symbols == DBX_DEBUG 2324 || write_symbols == SDB_DEBUG) 2325 { 2326 location_t *locus_ptr 2327 = block_nonartificial_location (NOTE_BLOCK (insn)); 2328 2329 if (locus_ptr != NULL) 2330 { 2331 override_filename = LOCATION_FILE (*locus_ptr); 2332 override_linenum = LOCATION_LINE (*locus_ptr); 2333 } 2334 } 2335 break; 2336 2337 case NOTE_INSN_BLOCK_END: 2338 if (debug_info_level == DINFO_LEVEL_NORMAL 2339 || debug_info_level == DINFO_LEVEL_VERBOSE 2340 || write_symbols == DWARF2_DEBUG 2341 || write_symbols == VMS_AND_DWARF2_DEBUG 2342 || write_symbols == VMS_DEBUG) 2343 { 2344 int n = BLOCK_NUMBER (NOTE_BLOCK (insn)); 2345 2346 app_disable (); 2347 2348 /* End of a symbol-block. */ 2349 --block_depth; 2350 gcc_assert (block_depth >= 0); 2351 2352 if (!DECL_IGNORED_P (current_function_decl)) 2353 debug_hooks->end_block (high_block_linenum, n); 2354 } 2355 if (write_symbols == DBX_DEBUG 2356 || write_symbols == SDB_DEBUG) 2357 { 2358 tree outer_block = BLOCK_SUPERCONTEXT (NOTE_BLOCK (insn)); 2359 location_t *locus_ptr 2360 = block_nonartificial_location (outer_block); 2361 2362 if (locus_ptr != NULL) 2363 { 2364 override_filename = LOCATION_FILE (*locus_ptr); 2365 override_linenum = LOCATION_LINE (*locus_ptr); 2366 } 2367 else 2368 { 2369 override_filename = NULL; 2370 override_linenum = 0; 2371 } 2372 } 2373 break; 2374 2375 case NOTE_INSN_DELETED_LABEL: 2376 /* Emit the label. We may have deleted the CODE_LABEL because 2377 the label could be proved to be unreachable, though still 2378 referenced (in the form of having its address taken. */ 2379 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn)); 2380 break; 2381 2382 case NOTE_INSN_DELETED_DEBUG_LABEL: 2383 /* Similarly, but need to use different namespace for it. */ 2384 if (CODE_LABEL_NUMBER (insn) != -1) 2385 ASM_OUTPUT_DEBUG_LABEL (file, "LDL", CODE_LABEL_NUMBER (insn)); 2386 break; 2387 2388 case NOTE_INSN_VAR_LOCATION: 2389 case NOTE_INSN_CALL_ARG_LOCATION: 2390 if (!DECL_IGNORED_P (current_function_decl)) 2391 debug_hooks->var_location (insn); 2392 break; 2393 2394 default: 2395 gcc_unreachable (); 2396 break; 2397 } 2398 break; 2399 2400 case BARRIER: 2401 break; 2402 2403 case CODE_LABEL: 2404 /* The target port might emit labels in the output function for 2405 some insn, e.g. sh.c output_branchy_insn. */ 2406 if (CODE_LABEL_NUMBER (insn) <= max_labelno) 2407 { 2408 int align = LABEL_TO_ALIGNMENT (insn); 2409 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2410 int max_skip = LABEL_TO_MAX_SKIP (insn); 2411 #endif 2412 2413 if (align && NEXT_INSN (insn)) 2414 { 2415 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN 2416 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip); 2417 #else 2418 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP 2419 ASM_OUTPUT_ALIGN_WITH_NOP (file, align); 2420 #else 2421 ASM_OUTPUT_ALIGN (file, align); 2422 #endif 2423 #endif 2424 } 2425 } 2426 CC_STATUS_INIT; 2427 2428 if (!DECL_IGNORED_P (current_function_decl) && LABEL_NAME (insn)) 2429 debug_hooks->label (insn); 2430 2431 app_disable (); 2432 2433 next = next_nonnote_insn (insn); 2434 /* If this label is followed by a jump-table, make sure we put 2435 the label in the read-only section. Also possibly write the 2436 label and jump table together. */ 2437 if (next != 0 && JUMP_TABLE_DATA_P (next)) 2438 { 2439 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2440 /* In this case, the case vector is being moved by the 2441 target, so don't output the label at all. Leave that 2442 to the back end macros. */ 2443 #else 2444 if (! JUMP_TABLES_IN_TEXT_SECTION) 2445 { 2446 int log_align; 2447 2448 switch_to_section (targetm.asm_out.function_rodata_section 2449 (current_function_decl)); 2450 2451 #ifdef ADDR_VEC_ALIGN 2452 log_align = ADDR_VEC_ALIGN (next); 2453 #else 2454 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT); 2455 #endif 2456 ASM_OUTPUT_ALIGN (file, log_align); 2457 } 2458 else 2459 switch_to_section (current_function_section ()); 2460 2461 #ifdef ASM_OUTPUT_CASE_LABEL 2462 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn), 2463 next); 2464 #else 2465 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2466 #endif 2467 #endif 2468 break; 2469 } 2470 if (LABEL_ALT_ENTRY_P (insn)) 2471 output_alternate_entry_point (file, insn); 2472 else 2473 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn)); 2474 break; 2475 2476 default: 2477 { 2478 rtx body = PATTERN (insn); 2479 int insn_code_number; 2480 const char *templ; 2481 bool is_stmt; 2482 2483 /* Reset this early so it is correct for ASM statements. */ 2484 current_insn_predicate = NULL_RTX; 2485 2486 /* An INSN, JUMP_INSN or CALL_INSN. 2487 First check for special kinds that recog doesn't recognize. */ 2488 2489 if (GET_CODE (body) == USE /* These are just declarations. */ 2490 || GET_CODE (body) == CLOBBER) 2491 break; 2492 2493 #ifdef HAVE_cc0 2494 { 2495 /* If there is a REG_CC_SETTER note on this insn, it means that 2496 the setting of the condition code was done in the delay slot 2497 of the insn that branched here. So recover the cc status 2498 from the insn that set it. */ 2499 2500 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX); 2501 if (note) 2502 { 2503 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0)); 2504 cc_prev_status = cc_status; 2505 } 2506 } 2507 #endif 2508 2509 /* Detect insns that are really jump-tables 2510 and output them as such. */ 2511 2512 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC) 2513 { 2514 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)) 2515 int vlen, idx; 2516 #endif 2517 2518 if (! JUMP_TABLES_IN_TEXT_SECTION) 2519 switch_to_section (targetm.asm_out.function_rodata_section 2520 (current_function_decl)); 2521 else 2522 switch_to_section (current_function_section ()); 2523 2524 app_disable (); 2525 2526 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC) 2527 if (GET_CODE (body) == ADDR_VEC) 2528 { 2529 #ifdef ASM_OUTPUT_ADDR_VEC 2530 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body); 2531 #else 2532 gcc_unreachable (); 2533 #endif 2534 } 2535 else 2536 { 2537 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC 2538 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body); 2539 #else 2540 gcc_unreachable (); 2541 #endif 2542 } 2543 #else 2544 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC); 2545 for (idx = 0; idx < vlen; idx++) 2546 { 2547 if (GET_CODE (body) == ADDR_VEC) 2548 { 2549 #ifdef ASM_OUTPUT_ADDR_VEC_ELT 2550 ASM_OUTPUT_ADDR_VEC_ELT 2551 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0))); 2552 #else 2553 gcc_unreachable (); 2554 #endif 2555 } 2556 else 2557 { 2558 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT 2559 ASM_OUTPUT_ADDR_DIFF_ELT 2560 (file, 2561 body, 2562 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)), 2563 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0))); 2564 #else 2565 gcc_unreachable (); 2566 #endif 2567 } 2568 } 2569 #ifdef ASM_OUTPUT_CASE_END 2570 ASM_OUTPUT_CASE_END (file, 2571 CODE_LABEL_NUMBER (PREV_INSN (insn)), 2572 insn); 2573 #endif 2574 #endif 2575 2576 switch_to_section (current_function_section ()); 2577 2578 break; 2579 } 2580 /* Output this line note if it is the first or the last line 2581 note in a row. */ 2582 if (!DECL_IGNORED_P (current_function_decl) 2583 && notice_source_line (insn, &is_stmt)) 2584 (*debug_hooks->source_line) (last_linenum, last_filename, 2585 last_discriminator, is_stmt); 2586 2587 if (GET_CODE (body) == ASM_INPUT) 2588 { 2589 const char *string = XSTR (body, 0); 2590 2591 /* There's no telling what that did to the condition codes. */ 2592 CC_STATUS_INIT; 2593 2594 if (string[0]) 2595 { 2596 expanded_location loc; 2597 2598 app_enable (); 2599 loc = expand_location (ASM_INPUT_SOURCE_LOCATION (body)); 2600 if (*loc.file && loc.line) 2601 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2602 ASM_COMMENT_START, loc.line, loc.file); 2603 fprintf (asm_out_file, "\t%s\n", string); 2604 #if HAVE_AS_LINE_ZERO 2605 if (*loc.file && loc.line) 2606 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2607 #endif 2608 } 2609 break; 2610 } 2611 2612 /* Detect `asm' construct with operands. */ 2613 if (asm_noperands (body) >= 0) 2614 { 2615 unsigned int noperands = asm_noperands (body); 2616 rtx *ops = XALLOCAVEC (rtx, noperands); 2617 const char *string; 2618 location_t loc; 2619 expanded_location expanded; 2620 2621 /* There's no telling what that did to the condition codes. */ 2622 CC_STATUS_INIT; 2623 2624 /* Get out the operand values. */ 2625 string = decode_asm_operands (body, ops, NULL, NULL, NULL, &loc); 2626 /* Inhibit dying on what would otherwise be compiler bugs. */ 2627 insn_noperands = noperands; 2628 this_is_asm_operands = insn; 2629 expanded = expand_location (loc); 2630 2631 #ifdef FINAL_PRESCAN_INSN 2632 FINAL_PRESCAN_INSN (insn, ops, insn_noperands); 2633 #endif 2634 2635 /* Output the insn using them. */ 2636 if (string[0]) 2637 { 2638 app_enable (); 2639 if (expanded.file && expanded.line) 2640 fprintf (asm_out_file, "%s %i \"%s\" 1\n", 2641 ASM_COMMENT_START, expanded.line, expanded.file); 2642 output_asm_insn (string, ops); 2643 #if HAVE_AS_LINE_ZERO 2644 if (expanded.file && expanded.line) 2645 fprintf (asm_out_file, "%s 0 \"\" 2\n", ASM_COMMENT_START); 2646 #endif 2647 } 2648 2649 if (targetm.asm_out.final_postscan_insn) 2650 targetm.asm_out.final_postscan_insn (file, insn, ops, 2651 insn_noperands); 2652 2653 this_is_asm_operands = 0; 2654 break; 2655 } 2656 2657 app_disable (); 2658 2659 if (GET_CODE (body) == SEQUENCE) 2660 { 2661 /* A delayed-branch sequence */ 2662 int i; 2663 2664 final_sequence = body; 2665 2666 /* The first insn in this SEQUENCE might be a JUMP_INSN that will 2667 force the restoration of a comparison that was previously 2668 thought unnecessary. If that happens, cancel this sequence 2669 and cause that insn to be restored. */ 2670 2671 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen); 2672 if (next != XVECEXP (body, 0, 1)) 2673 { 2674 final_sequence = 0; 2675 return next; 2676 } 2677 2678 for (i = 1; i < XVECLEN (body, 0); i++) 2679 { 2680 rtx insn = XVECEXP (body, 0, i); 2681 rtx next = NEXT_INSN (insn); 2682 /* We loop in case any instruction in a delay slot gets 2683 split. */ 2684 do 2685 insn = final_scan_insn (insn, file, 0, 1, seen); 2686 while (insn != next); 2687 } 2688 #ifdef DBR_OUTPUT_SEQEND 2689 DBR_OUTPUT_SEQEND (file); 2690 #endif 2691 final_sequence = 0; 2692 2693 /* If the insn requiring the delay slot was a CALL_INSN, the 2694 insns in the delay slot are actually executed before the 2695 called function. Hence we don't preserve any CC-setting 2696 actions in these insns and the CC must be marked as being 2697 clobbered by the function. */ 2698 if (CALL_P (XVECEXP (body, 0, 0))) 2699 { 2700 CC_STATUS_INIT; 2701 } 2702 break; 2703 } 2704 2705 /* We have a real machine instruction as rtl. */ 2706 2707 body = PATTERN (insn); 2708 2709 #ifdef HAVE_cc0 2710 set = single_set (insn); 2711 2712 /* Check for redundant test and compare instructions 2713 (when the condition codes are already set up as desired). 2714 This is done only when optimizing; if not optimizing, 2715 it should be possible for the user to alter a variable 2716 with the debugger in between statements 2717 and the next statement should reexamine the variable 2718 to compute the condition codes. */ 2719 2720 if (optimize_p) 2721 { 2722 if (set 2723 && GET_CODE (SET_DEST (set)) == CC0 2724 && insn != last_ignored_compare) 2725 { 2726 rtx src1, src2; 2727 if (GET_CODE (SET_SRC (set)) == SUBREG) 2728 SET_SRC (set) = alter_subreg (&SET_SRC (set), true); 2729 2730 src1 = SET_SRC (set); 2731 src2 = NULL_RTX; 2732 if (GET_CODE (SET_SRC (set)) == COMPARE) 2733 { 2734 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG) 2735 XEXP (SET_SRC (set), 0) 2736 = alter_subreg (&XEXP (SET_SRC (set), 0), true); 2737 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG) 2738 XEXP (SET_SRC (set), 1) 2739 = alter_subreg (&XEXP (SET_SRC (set), 1), true); 2740 if (XEXP (SET_SRC (set), 1) 2741 == CONST0_RTX (GET_MODE (XEXP (SET_SRC (set), 0)))) 2742 src2 = XEXP (SET_SRC (set), 0); 2743 } 2744 if ((cc_status.value1 != 0 2745 && rtx_equal_p (src1, cc_status.value1)) 2746 || (cc_status.value2 != 0 2747 && rtx_equal_p (src1, cc_status.value2)) 2748 || (src2 != 0 && cc_status.value1 != 0 2749 && rtx_equal_p (src2, cc_status.value1)) 2750 || (src2 != 0 && cc_status.value2 != 0 2751 && rtx_equal_p (src2, cc_status.value2))) 2752 { 2753 /* Don't delete insn if it has an addressing side-effect. */ 2754 if (! FIND_REG_INC_NOTE (insn, NULL_RTX) 2755 /* or if anything in it is volatile. */ 2756 && ! volatile_refs_p (PATTERN (insn))) 2757 { 2758 /* We don't really delete the insn; just ignore it. */ 2759 last_ignored_compare = insn; 2760 break; 2761 } 2762 } 2763 } 2764 } 2765 2766 /* If this is a conditional branch, maybe modify it 2767 if the cc's are in a nonstandard state 2768 so that it accomplishes the same thing that it would 2769 do straightforwardly if the cc's were set up normally. */ 2770 2771 if (cc_status.flags != 0 2772 && JUMP_P (insn) 2773 && GET_CODE (body) == SET 2774 && SET_DEST (body) == pc_rtx 2775 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE 2776 && COMPARISON_P (XEXP (SET_SRC (body), 0)) 2777 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx) 2778 { 2779 /* This function may alter the contents of its argument 2780 and clear some of the cc_status.flags bits. 2781 It may also return 1 meaning condition now always true 2782 or -1 meaning condition now always false 2783 or 2 meaning condition nontrivial but altered. */ 2784 int result = alter_cond (XEXP (SET_SRC (body), 0)); 2785 /* If condition now has fixed value, replace the IF_THEN_ELSE 2786 with its then-operand or its else-operand. */ 2787 if (result == 1) 2788 SET_SRC (body) = XEXP (SET_SRC (body), 1); 2789 if (result == -1) 2790 SET_SRC (body) = XEXP (SET_SRC (body), 2); 2791 2792 /* The jump is now either unconditional or a no-op. 2793 If it has become a no-op, don't try to output it. 2794 (It would not be recognized.) */ 2795 if (SET_SRC (body) == pc_rtx) 2796 { 2797 delete_insn (insn); 2798 break; 2799 } 2800 else if (ANY_RETURN_P (SET_SRC (body))) 2801 /* Replace (set (pc) (return)) with (return). */ 2802 PATTERN (insn) = body = SET_SRC (body); 2803 2804 /* Rerecognize the instruction if it has changed. */ 2805 if (result != 0) 2806 INSN_CODE (insn) = -1; 2807 } 2808 2809 /* If this is a conditional trap, maybe modify it if the cc's 2810 are in a nonstandard state so that it accomplishes the same 2811 thing that it would do straightforwardly if the cc's were 2812 set up normally. */ 2813 if (cc_status.flags != 0 2814 && NONJUMP_INSN_P (insn) 2815 && GET_CODE (body) == TRAP_IF 2816 && COMPARISON_P (TRAP_CONDITION (body)) 2817 && XEXP (TRAP_CONDITION (body), 0) == cc0_rtx) 2818 { 2819 /* This function may alter the contents of its argument 2820 and clear some of the cc_status.flags bits. 2821 It may also return 1 meaning condition now always true 2822 or -1 meaning condition now always false 2823 or 2 meaning condition nontrivial but altered. */ 2824 int result = alter_cond (TRAP_CONDITION (body)); 2825 2826 /* If TRAP_CONDITION has become always false, delete the 2827 instruction. */ 2828 if (result == -1) 2829 { 2830 delete_insn (insn); 2831 break; 2832 } 2833 2834 /* If TRAP_CONDITION has become always true, replace 2835 TRAP_CONDITION with const_true_rtx. */ 2836 if (result == 1) 2837 TRAP_CONDITION (body) = const_true_rtx; 2838 2839 /* Rerecognize the instruction if it has changed. */ 2840 if (result != 0) 2841 INSN_CODE (insn) = -1; 2842 } 2843 2844 /* Make same adjustments to instructions that examine the 2845 condition codes without jumping and instructions that 2846 handle conditional moves (if this machine has either one). */ 2847 2848 if (cc_status.flags != 0 2849 && set != 0) 2850 { 2851 rtx cond_rtx, then_rtx, else_rtx; 2852 2853 if (!JUMP_P (insn) 2854 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE) 2855 { 2856 cond_rtx = XEXP (SET_SRC (set), 0); 2857 then_rtx = XEXP (SET_SRC (set), 1); 2858 else_rtx = XEXP (SET_SRC (set), 2); 2859 } 2860 else 2861 { 2862 cond_rtx = SET_SRC (set); 2863 then_rtx = const_true_rtx; 2864 else_rtx = const0_rtx; 2865 } 2866 2867 if (COMPARISON_P (cond_rtx) 2868 && XEXP (cond_rtx, 0) == cc0_rtx) 2869 { 2870 int result; 2871 result = alter_cond (cond_rtx); 2872 if (result == 1) 2873 validate_change (insn, &SET_SRC (set), then_rtx, 0); 2874 else if (result == -1) 2875 validate_change (insn, &SET_SRC (set), else_rtx, 0); 2876 else if (result == 2) 2877 INSN_CODE (insn) = -1; 2878 if (SET_DEST (set) == SET_SRC (set)) 2879 delete_insn (insn); 2880 } 2881 } 2882 2883 #endif 2884 2885 #ifdef HAVE_peephole 2886 /* Do machine-specific peephole optimizations if desired. */ 2887 2888 if (optimize_p && !flag_no_peephole && !nopeepholes) 2889 { 2890 rtx next = peephole (insn); 2891 /* When peepholing, if there were notes within the peephole, 2892 emit them before the peephole. */ 2893 if (next != 0 && next != NEXT_INSN (insn)) 2894 { 2895 rtx note, prev = PREV_INSN (insn); 2896 2897 for (note = NEXT_INSN (insn); note != next; 2898 note = NEXT_INSN (note)) 2899 final_scan_insn (note, file, optimize_p, nopeepholes, seen); 2900 2901 /* Put the notes in the proper position for a later 2902 rescan. For example, the SH target can do this 2903 when generating a far jump in a delayed branch 2904 sequence. */ 2905 note = NEXT_INSN (insn); 2906 PREV_INSN (note) = prev; 2907 NEXT_INSN (prev) = note; 2908 NEXT_INSN (PREV_INSN (next)) = insn; 2909 PREV_INSN (insn) = PREV_INSN (next); 2910 NEXT_INSN (insn) = next; 2911 PREV_INSN (next) = insn; 2912 } 2913 2914 /* PEEPHOLE might have changed this. */ 2915 body = PATTERN (insn); 2916 } 2917 #endif 2918 2919 /* Try to recognize the instruction. 2920 If successful, verify that the operands satisfy the 2921 constraints for the instruction. Crash if they don't, 2922 since `reload' should have changed them so that they do. */ 2923 2924 insn_code_number = recog_memoized (insn); 2925 cleanup_subreg_operands (insn); 2926 2927 /* Dump the insn in the assembly for debugging (-dAP). 2928 If the final dump is requested as slim RTL, dump slim 2929 RTL to the assembly file also. */ 2930 if (flag_dump_rtl_in_asm) 2931 { 2932 print_rtx_head = ASM_COMMENT_START; 2933 if (! (dump_flags & TDF_SLIM)) 2934 print_rtl_single (asm_out_file, insn); 2935 else 2936 dump_insn_slim (asm_out_file, insn); 2937 print_rtx_head = ""; 2938 } 2939 2940 if (! constrain_operands_cached (1)) 2941 fatal_insn_not_found (insn); 2942 2943 /* Some target machines need to prescan each insn before 2944 it is output. */ 2945 2946 #ifdef FINAL_PRESCAN_INSN 2947 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands); 2948 #endif 2949 2950 if (targetm.have_conditional_execution () 2951 && GET_CODE (PATTERN (insn)) == COND_EXEC) 2952 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn)); 2953 2954 #ifdef HAVE_cc0 2955 cc_prev_status = cc_status; 2956 2957 /* Update `cc_status' for this instruction. 2958 The instruction's output routine may change it further. 2959 If the output routine for a jump insn needs to depend 2960 on the cc status, it should look at cc_prev_status. */ 2961 2962 NOTICE_UPDATE_CC (body, insn); 2963 #endif 2964 2965 current_output_insn = debug_insn = insn; 2966 2967 /* Find the proper template for this insn. */ 2968 templ = get_insn_template (insn_code_number, insn); 2969 2970 /* If the C code returns 0, it means that it is a jump insn 2971 which follows a deleted test insn, and that test insn 2972 needs to be reinserted. */ 2973 if (templ == 0) 2974 { 2975 rtx prev; 2976 2977 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare); 2978 2979 /* We have already processed the notes between the setter and 2980 the user. Make sure we don't process them again, this is 2981 particularly important if one of the notes is a block 2982 scope note or an EH note. */ 2983 for (prev = insn; 2984 prev != last_ignored_compare; 2985 prev = PREV_INSN (prev)) 2986 { 2987 if (NOTE_P (prev)) 2988 delete_insn (prev); /* Use delete_note. */ 2989 } 2990 2991 return prev; 2992 } 2993 2994 /* If the template is the string "#", it means that this insn must 2995 be split. */ 2996 if (templ[0] == '#' && templ[1] == '\0') 2997 { 2998 rtx new_rtx = try_split (body, insn, 0); 2999 3000 /* If we didn't split the insn, go away. */ 3001 if (new_rtx == insn && PATTERN (new_rtx) == body) 3002 fatal_insn ("could not split insn", insn); 3003 3004 /* If we have a length attribute, this instruction should have 3005 been split in shorten_branches, to ensure that we would have 3006 valid length info for the splitees. */ 3007 gcc_assert (!HAVE_ATTR_length); 3008 3009 return new_rtx; 3010 } 3011 3012 /* ??? This will put the directives in the wrong place if 3013 get_insn_template outputs assembly directly. However calling it 3014 before get_insn_template breaks if the insns is split. */ 3015 if (targetm.asm_out.unwind_emit_before_insn 3016 && targetm.asm_out.unwind_emit) 3017 targetm.asm_out.unwind_emit (asm_out_file, insn); 3018 3019 if (CALL_P (insn)) 3020 { 3021 rtx x = call_from_call_insn (insn); 3022 x = XEXP (x, 0); 3023 if (x && MEM_P (x) && GET_CODE (XEXP (x, 0)) == SYMBOL_REF) 3024 { 3025 tree t; 3026 x = XEXP (x, 0); 3027 t = SYMBOL_REF_DECL (x); 3028 if (t) 3029 assemble_external (t); 3030 } 3031 if (!DECL_IGNORED_P (current_function_decl)) 3032 debug_hooks->var_location (insn); 3033 } 3034 3035 /* Output assembler code from the template. */ 3036 output_asm_insn (templ, recog_data.operand); 3037 3038 /* Some target machines need to postscan each insn after 3039 it is output. */ 3040 if (targetm.asm_out.final_postscan_insn) 3041 targetm.asm_out.final_postscan_insn (file, insn, recog_data.operand, 3042 recog_data.n_operands); 3043 3044 if (!targetm.asm_out.unwind_emit_before_insn 3045 && targetm.asm_out.unwind_emit) 3046 targetm.asm_out.unwind_emit (asm_out_file, insn); 3047 3048 current_output_insn = debug_insn = 0; 3049 } 3050 } 3051 return NEXT_INSN (insn); 3052 } 3053 3054 /* Return whether a source line note needs to be emitted before INSN. 3055 Sets IS_STMT to TRUE if the line should be marked as a possible 3056 breakpoint location. */ 3057 3058 static bool 3059 notice_source_line (rtx insn, bool *is_stmt) 3060 { 3061 const char *filename; 3062 int linenum; 3063 3064 if (override_filename) 3065 { 3066 filename = override_filename; 3067 linenum = override_linenum; 3068 } 3069 else 3070 { 3071 filename = insn_file (insn); 3072 linenum = insn_line (insn); 3073 } 3074 3075 if (filename == NULL) 3076 return false; 3077 3078 if (force_source_line 3079 || filename != last_filename 3080 || last_linenum != linenum) 3081 { 3082 force_source_line = false; 3083 last_filename = filename; 3084 last_linenum = linenum; 3085 last_discriminator = discriminator; 3086 *is_stmt = true; 3087 high_block_linenum = MAX (last_linenum, high_block_linenum); 3088 high_function_linenum = MAX (last_linenum, high_function_linenum); 3089 return true; 3090 } 3091 3092 if (SUPPORTS_DISCRIMINATOR && last_discriminator != discriminator) 3093 { 3094 /* If the discriminator changed, but the line number did not, 3095 output the line table entry with is_stmt false so the 3096 debugger does not treat this as a breakpoint location. */ 3097 last_discriminator = discriminator; 3098 *is_stmt = false; 3099 return true; 3100 } 3101 3102 return false; 3103 } 3104 3105 /* For each operand in INSN, simplify (subreg (reg)) so that it refers 3106 directly to the desired hard register. */ 3107 3108 void 3109 cleanup_subreg_operands (rtx insn) 3110 { 3111 int i; 3112 bool changed = false; 3113 extract_insn_cached (insn); 3114 for (i = 0; i < recog_data.n_operands; i++) 3115 { 3116 /* The following test cannot use recog_data.operand when testing 3117 for a SUBREG: the underlying object might have been changed 3118 already if we are inside a match_operator expression that 3119 matches the else clause. Instead we test the underlying 3120 expression directly. */ 3121 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG) 3122 { 3123 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i], true); 3124 changed = true; 3125 } 3126 else if (GET_CODE (recog_data.operand[i]) == PLUS 3127 || GET_CODE (recog_data.operand[i]) == MULT 3128 || MEM_P (recog_data.operand[i])) 3129 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i], &changed); 3130 } 3131 3132 for (i = 0; i < recog_data.n_dups; i++) 3133 { 3134 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG) 3135 { 3136 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i], true); 3137 changed = true; 3138 } 3139 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS 3140 || GET_CODE (*recog_data.dup_loc[i]) == MULT 3141 || MEM_P (*recog_data.dup_loc[i])) 3142 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i], &changed); 3143 } 3144 if (changed) 3145 df_insn_rescan (insn); 3146 } 3147 3148 /* If X is a SUBREG, try to replace it with a REG or a MEM, based on 3149 the thing it is a subreg of. Do it anyway if FINAL_P. */ 3150 3151 rtx 3152 alter_subreg (rtx *xp, bool final_p) 3153 { 3154 rtx x = *xp; 3155 rtx y = SUBREG_REG (x); 3156 3157 /* simplify_subreg does not remove subreg from volatile references. 3158 We are required to. */ 3159 if (MEM_P (y)) 3160 { 3161 int offset = SUBREG_BYTE (x); 3162 3163 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE 3164 contains 0 instead of the proper offset. See simplify_subreg. */ 3165 if (offset == 0 3166 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x))) 3167 { 3168 int difference = GET_MODE_SIZE (GET_MODE (y)) 3169 - GET_MODE_SIZE (GET_MODE (x)); 3170 if (WORDS_BIG_ENDIAN) 3171 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD; 3172 if (BYTES_BIG_ENDIAN) 3173 offset += difference % UNITS_PER_WORD; 3174 } 3175 3176 if (final_p) 3177 *xp = adjust_address (y, GET_MODE (x), offset); 3178 else 3179 *xp = adjust_address_nv (y, GET_MODE (x), offset); 3180 } 3181 else 3182 { 3183 rtx new_rtx = simplify_subreg (GET_MODE (x), y, GET_MODE (y), 3184 SUBREG_BYTE (x)); 3185 3186 if (new_rtx != 0) 3187 *xp = new_rtx; 3188 else if (final_p && REG_P (y)) 3189 { 3190 /* Simplify_subreg can't handle some REG cases, but we have to. */ 3191 unsigned int regno; 3192 HOST_WIDE_INT offset; 3193 3194 regno = subreg_regno (x); 3195 if (subreg_lowpart_p (x)) 3196 offset = byte_lowpart_offset (GET_MODE (x), GET_MODE (y)); 3197 else 3198 offset = SUBREG_BYTE (x); 3199 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, offset); 3200 } 3201 } 3202 3203 return *xp; 3204 } 3205 3206 /* Do alter_subreg on all the SUBREGs contained in X. */ 3207 3208 static rtx 3209 walk_alter_subreg (rtx *xp, bool *changed) 3210 { 3211 rtx x = *xp; 3212 switch (GET_CODE (x)) 3213 { 3214 case PLUS: 3215 case MULT: 3216 case AND: 3217 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 3218 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1), changed); 3219 break; 3220 3221 case MEM: 3222 case ZERO_EXTEND: 3223 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0), changed); 3224 break; 3225 3226 case SUBREG: 3227 *changed = true; 3228 return alter_subreg (xp, true); 3229 3230 default: 3231 break; 3232 } 3233 3234 return *xp; 3235 } 3236 3237 #ifdef HAVE_cc0 3238 3239 /* Given BODY, the body of a jump instruction, alter the jump condition 3240 as required by the bits that are set in cc_status.flags. 3241 Not all of the bits there can be handled at this level in all cases. 3242 3243 The value is normally 0. 3244 1 means that the condition has become always true. 3245 -1 means that the condition has become always false. 3246 2 means that COND has been altered. */ 3247 3248 static int 3249 alter_cond (rtx cond) 3250 { 3251 int value = 0; 3252 3253 if (cc_status.flags & CC_REVERSED) 3254 { 3255 value = 2; 3256 PUT_CODE (cond, swap_condition (GET_CODE (cond))); 3257 } 3258 3259 if (cc_status.flags & CC_INVERTED) 3260 { 3261 value = 2; 3262 PUT_CODE (cond, reverse_condition (GET_CODE (cond))); 3263 } 3264 3265 if (cc_status.flags & CC_NOT_POSITIVE) 3266 switch (GET_CODE (cond)) 3267 { 3268 case LE: 3269 case LEU: 3270 case GEU: 3271 /* Jump becomes unconditional. */ 3272 return 1; 3273 3274 case GT: 3275 case GTU: 3276 case LTU: 3277 /* Jump becomes no-op. */ 3278 return -1; 3279 3280 case GE: 3281 PUT_CODE (cond, EQ); 3282 value = 2; 3283 break; 3284 3285 case LT: 3286 PUT_CODE (cond, NE); 3287 value = 2; 3288 break; 3289 3290 default: 3291 break; 3292 } 3293 3294 if (cc_status.flags & CC_NOT_NEGATIVE) 3295 switch (GET_CODE (cond)) 3296 { 3297 case GE: 3298 case GEU: 3299 /* Jump becomes unconditional. */ 3300 return 1; 3301 3302 case LT: 3303 case LTU: 3304 /* Jump becomes no-op. */ 3305 return -1; 3306 3307 case LE: 3308 case LEU: 3309 PUT_CODE (cond, EQ); 3310 value = 2; 3311 break; 3312 3313 case GT: 3314 case GTU: 3315 PUT_CODE (cond, NE); 3316 value = 2; 3317 break; 3318 3319 default: 3320 break; 3321 } 3322 3323 if (cc_status.flags & CC_NO_OVERFLOW) 3324 switch (GET_CODE (cond)) 3325 { 3326 case GEU: 3327 /* Jump becomes unconditional. */ 3328 return 1; 3329 3330 case LEU: 3331 PUT_CODE (cond, EQ); 3332 value = 2; 3333 break; 3334 3335 case GTU: 3336 PUT_CODE (cond, NE); 3337 value = 2; 3338 break; 3339 3340 case LTU: 3341 /* Jump becomes no-op. */ 3342 return -1; 3343 3344 default: 3345 break; 3346 } 3347 3348 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N)) 3349 switch (GET_CODE (cond)) 3350 { 3351 default: 3352 gcc_unreachable (); 3353 3354 case NE: 3355 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT); 3356 value = 2; 3357 break; 3358 3359 case EQ: 3360 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE); 3361 value = 2; 3362 break; 3363 } 3364 3365 if (cc_status.flags & CC_NOT_SIGNED) 3366 /* The flags are valid if signed condition operators are converted 3367 to unsigned. */ 3368 switch (GET_CODE (cond)) 3369 { 3370 case LE: 3371 PUT_CODE (cond, LEU); 3372 value = 2; 3373 break; 3374 3375 case LT: 3376 PUT_CODE (cond, LTU); 3377 value = 2; 3378 break; 3379 3380 case GT: 3381 PUT_CODE (cond, GTU); 3382 value = 2; 3383 break; 3384 3385 case GE: 3386 PUT_CODE (cond, GEU); 3387 value = 2; 3388 break; 3389 3390 default: 3391 break; 3392 } 3393 3394 return value; 3395 } 3396 #endif 3397 3398 /* Report inconsistency between the assembler template and the operands. 3399 In an `asm', it's the user's fault; otherwise, the compiler's fault. */ 3400 3401 void 3402 output_operand_lossage (const char *cmsgid, ...) 3403 { 3404 char *fmt_string; 3405 char *new_message; 3406 const char *pfx_str; 3407 va_list ap; 3408 3409 va_start (ap, cmsgid); 3410 3411 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: "; 3412 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid)); 3413 vasprintf (&new_message, fmt_string, ap); 3414 3415 if (this_is_asm_operands) 3416 error_for_asm (this_is_asm_operands, "%s", new_message); 3417 else 3418 internal_error ("%s", new_message); 3419 3420 free (fmt_string); 3421 free (new_message); 3422 va_end (ap); 3423 } 3424 3425 /* Output of assembler code from a template, and its subroutines. */ 3426 3427 /* Annotate the assembly with a comment describing the pattern and 3428 alternative used. */ 3429 3430 static void 3431 output_asm_name (void) 3432 { 3433 if (debug_insn) 3434 { 3435 int num = INSN_CODE (debug_insn); 3436 fprintf (asm_out_file, "\t%s %d\t%s", 3437 ASM_COMMENT_START, INSN_UID (debug_insn), 3438 insn_data[num].name); 3439 if (insn_data[num].n_alternatives > 1) 3440 fprintf (asm_out_file, "/%d", which_alternative + 1); 3441 3442 if (HAVE_ATTR_length) 3443 fprintf (asm_out_file, "\t[length = %d]", 3444 get_attr_length (debug_insn)); 3445 3446 /* Clear this so only the first assembler insn 3447 of any rtl insn will get the special comment for -dp. */ 3448 debug_insn = 0; 3449 } 3450 } 3451 3452 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it 3453 or its address, return that expr . Set *PADDRESSP to 1 if the expr 3454 corresponds to the address of the object and 0 if to the object. */ 3455 3456 static tree 3457 get_mem_expr_from_op (rtx op, int *paddressp) 3458 { 3459 tree expr; 3460 int inner_addressp; 3461 3462 *paddressp = 0; 3463 3464 if (REG_P (op)) 3465 return REG_EXPR (op); 3466 else if (!MEM_P (op)) 3467 return 0; 3468 3469 if (MEM_EXPR (op) != 0) 3470 return MEM_EXPR (op); 3471 3472 /* Otherwise we have an address, so indicate it and look at the address. */ 3473 *paddressp = 1; 3474 op = XEXP (op, 0); 3475 3476 /* First check if we have a decl for the address, then look at the right side 3477 if it is a PLUS. Otherwise, strip off arithmetic and keep looking. 3478 But don't allow the address to itself be indirect. */ 3479 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp) 3480 return expr; 3481 else if (GET_CODE (op) == PLUS 3482 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp))) 3483 return expr; 3484 3485 while (UNARY_P (op) 3486 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH) 3487 op = XEXP (op, 0); 3488 3489 expr = get_mem_expr_from_op (op, &inner_addressp); 3490 return inner_addressp ? 0 : expr; 3491 } 3492 3493 /* Output operand names for assembler instructions. OPERANDS is the 3494 operand vector, OPORDER is the order to write the operands, and NOPS 3495 is the number of operands to write. */ 3496 3497 static void 3498 output_asm_operand_names (rtx *operands, int *oporder, int nops) 3499 { 3500 int wrote = 0; 3501 int i; 3502 3503 for (i = 0; i < nops; i++) 3504 { 3505 int addressp; 3506 rtx op = operands[oporder[i]]; 3507 tree expr = get_mem_expr_from_op (op, &addressp); 3508 3509 fprintf (asm_out_file, "%c%s", 3510 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START); 3511 wrote = 1; 3512 if (expr) 3513 { 3514 fprintf (asm_out_file, "%s", 3515 addressp ? "*" : ""); 3516 print_mem_expr (asm_out_file, expr); 3517 wrote = 1; 3518 } 3519 else if (REG_P (op) && ORIGINAL_REGNO (op) 3520 && ORIGINAL_REGNO (op) != REGNO (op)) 3521 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op)); 3522 } 3523 } 3524 3525 #ifdef ASSEMBLER_DIALECT 3526 /* Helper function to parse assembler dialects in the asm string. 3527 This is called from output_asm_insn and asm_fprintf. */ 3528 static const char * 3529 do_assembler_dialects (const char *p, int *dialect) 3530 { 3531 char c = *(p - 1); 3532 3533 switch (c) 3534 { 3535 case '{': 3536 { 3537 int i; 3538 3539 if (*dialect) 3540 output_operand_lossage ("nested assembly dialect alternatives"); 3541 else 3542 *dialect = 1; 3543 3544 /* If we want the first dialect, do nothing. Otherwise, skip 3545 DIALECT_NUMBER of strings ending with '|'. */ 3546 for (i = 0; i < dialect_number; i++) 3547 { 3548 while (*p && *p != '}' && *p++ != '|') 3549 ; 3550 if (*p == '}') 3551 break; 3552 } 3553 3554 if (*p == '\0') 3555 output_operand_lossage ("unterminated assembly dialect alternative"); 3556 } 3557 break; 3558 3559 case '|': 3560 if (*dialect) 3561 { 3562 /* Skip to close brace. */ 3563 do 3564 { 3565 if (*p == '\0') 3566 { 3567 output_operand_lossage ("unterminated assembly dialect alternative"); 3568 break; 3569 } 3570 } 3571 while (*p++ != '}'); 3572 *dialect = 0; 3573 } 3574 else 3575 putc (c, asm_out_file); 3576 break; 3577 3578 case '}': 3579 if (! *dialect) 3580 putc (c, asm_out_file); 3581 *dialect = 0; 3582 break; 3583 default: 3584 gcc_unreachable (); 3585 } 3586 3587 return p; 3588 } 3589 #endif 3590 3591 /* Output text from TEMPLATE to the assembler output file, 3592 obeying %-directions to substitute operands taken from 3593 the vector OPERANDS. 3594 3595 %N (for N a digit) means print operand N in usual manner. 3596 %lN means require operand N to be a CODE_LABEL or LABEL_REF 3597 and print the label name with no punctuation. 3598 %cN means require operand N to be a constant 3599 and print the constant expression with no punctuation. 3600 %aN means expect operand N to be a memory address 3601 (not a memory reference!) and print a reference 3602 to that address. 3603 %nN means expect operand N to be a constant 3604 and print a constant expression for minus the value 3605 of the operand, with no other punctuation. */ 3606 3607 void 3608 output_asm_insn (const char *templ, rtx *operands) 3609 { 3610 const char *p; 3611 int c; 3612 #ifdef ASSEMBLER_DIALECT 3613 int dialect = 0; 3614 #endif 3615 int oporder[MAX_RECOG_OPERANDS]; 3616 char opoutput[MAX_RECOG_OPERANDS]; 3617 int ops = 0; 3618 3619 /* An insn may return a null string template 3620 in a case where no assembler code is needed. */ 3621 if (*templ == 0) 3622 return; 3623 3624 memset (opoutput, 0, sizeof opoutput); 3625 p = templ; 3626 putc ('\t', asm_out_file); 3627 3628 #ifdef ASM_OUTPUT_OPCODE 3629 ASM_OUTPUT_OPCODE (asm_out_file, p); 3630 #endif 3631 3632 while ((c = *p++)) 3633 switch (c) 3634 { 3635 case '\n': 3636 if (flag_verbose_asm) 3637 output_asm_operand_names (operands, oporder, ops); 3638 if (flag_print_asm_name) 3639 output_asm_name (); 3640 3641 ops = 0; 3642 memset (opoutput, 0, sizeof opoutput); 3643 3644 putc (c, asm_out_file); 3645 #ifdef ASM_OUTPUT_OPCODE 3646 while ((c = *p) == '\t') 3647 { 3648 putc (c, asm_out_file); 3649 p++; 3650 } 3651 ASM_OUTPUT_OPCODE (asm_out_file, p); 3652 #endif 3653 break; 3654 3655 #ifdef ASSEMBLER_DIALECT 3656 case '{': 3657 case '}': 3658 case '|': 3659 p = do_assembler_dialects (p, &dialect); 3660 break; 3661 #endif 3662 3663 case '%': 3664 /* %% outputs a single %. */ 3665 if (*p == '%') 3666 { 3667 p++; 3668 putc (c, asm_out_file); 3669 } 3670 /* %= outputs a number which is unique to each insn in the entire 3671 compilation. This is useful for making local labels that are 3672 referred to more than once in a given insn. */ 3673 else if (*p == '=') 3674 { 3675 p++; 3676 fprintf (asm_out_file, "%d", insn_counter); 3677 } 3678 /* % followed by a letter and some digits 3679 outputs an operand in a special way depending on the letter. 3680 Letters `acln' are implemented directly. 3681 Other letters are passed to `output_operand' so that 3682 the TARGET_PRINT_OPERAND hook can define them. */ 3683 else if (ISALPHA (*p)) 3684 { 3685 int letter = *p++; 3686 unsigned long opnum; 3687 char *endptr; 3688 3689 opnum = strtoul (p, &endptr, 10); 3690 3691 if (endptr == p) 3692 output_operand_lossage ("operand number missing " 3693 "after %%-letter"); 3694 else if (this_is_asm_operands && opnum >= insn_noperands) 3695 output_operand_lossage ("operand number out of range"); 3696 else if (letter == 'l') 3697 output_asm_label (operands[opnum]); 3698 else if (letter == 'a') 3699 output_address (operands[opnum]); 3700 else if (letter == 'c') 3701 { 3702 if (CONSTANT_ADDRESS_P (operands[opnum])) 3703 output_addr_const (asm_out_file, operands[opnum]); 3704 else 3705 output_operand (operands[opnum], 'c'); 3706 } 3707 else if (letter == 'n') 3708 { 3709 if (CONST_INT_P (operands[opnum])) 3710 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC, 3711 - INTVAL (operands[opnum])); 3712 else 3713 { 3714 putc ('-', asm_out_file); 3715 output_addr_const (asm_out_file, operands[opnum]); 3716 } 3717 } 3718 else 3719 output_operand (operands[opnum], letter); 3720 3721 if (!opoutput[opnum]) 3722 oporder[ops++] = opnum; 3723 opoutput[opnum] = 1; 3724 3725 p = endptr; 3726 c = *p; 3727 } 3728 /* % followed by a digit outputs an operand the default way. */ 3729 else if (ISDIGIT (*p)) 3730 { 3731 unsigned long opnum; 3732 char *endptr; 3733 3734 opnum = strtoul (p, &endptr, 10); 3735 if (this_is_asm_operands && opnum >= insn_noperands) 3736 output_operand_lossage ("operand number out of range"); 3737 else 3738 output_operand (operands[opnum], 0); 3739 3740 if (!opoutput[opnum]) 3741 oporder[ops++] = opnum; 3742 opoutput[opnum] = 1; 3743 3744 p = endptr; 3745 c = *p; 3746 } 3747 /* % followed by punctuation: output something for that 3748 punctuation character alone, with no operand. The 3749 TARGET_PRINT_OPERAND hook decides what is actually done. */ 3750 else if (targetm.asm_out.print_operand_punct_valid_p ((unsigned char) *p)) 3751 output_operand (NULL_RTX, *p++); 3752 else 3753 output_operand_lossage ("invalid %%-code"); 3754 break; 3755 3756 default: 3757 putc (c, asm_out_file); 3758 } 3759 3760 /* Write out the variable names for operands, if we know them. */ 3761 if (flag_verbose_asm) 3762 output_asm_operand_names (operands, oporder, ops); 3763 if (flag_print_asm_name) 3764 output_asm_name (); 3765 3766 putc ('\n', asm_out_file); 3767 } 3768 3769 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */ 3770 3771 void 3772 output_asm_label (rtx x) 3773 { 3774 char buf[256]; 3775 3776 if (GET_CODE (x) == LABEL_REF) 3777 x = XEXP (x, 0); 3778 if (LABEL_P (x) 3779 || (NOTE_P (x) 3780 && NOTE_KIND (x) == NOTE_INSN_DELETED_LABEL)) 3781 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3782 else 3783 output_operand_lossage ("'%%l' operand isn't a label"); 3784 3785 assemble_name (asm_out_file, buf); 3786 } 3787 3788 /* Helper rtx-iteration-function for mark_symbol_refs_as_used and 3789 output_operand. Marks SYMBOL_REFs as referenced through use of 3790 assemble_external. */ 3791 3792 static int 3793 mark_symbol_ref_as_used (rtx *xp, void *dummy ATTRIBUTE_UNUSED) 3794 { 3795 rtx x = *xp; 3796 3797 /* If we have a used symbol, we may have to emit assembly 3798 annotations corresponding to whether the symbol is external, weak 3799 or has non-default visibility. */ 3800 if (GET_CODE (x) == SYMBOL_REF) 3801 { 3802 tree t; 3803 3804 t = SYMBOL_REF_DECL (x); 3805 if (t) 3806 assemble_external (t); 3807 3808 return -1; 3809 } 3810 3811 return 0; 3812 } 3813 3814 /* Marks SYMBOL_REFs in x as referenced through use of assemble_external. */ 3815 3816 void 3817 mark_symbol_refs_as_used (rtx x) 3818 { 3819 for_each_rtx (&x, mark_symbol_ref_as_used, NULL); 3820 } 3821 3822 /* Print operand X using machine-dependent assembler syntax. 3823 CODE is a non-digit that preceded the operand-number in the % spec, 3824 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char 3825 between the % and the digits. 3826 When CODE is a non-letter, X is 0. 3827 3828 The meanings of the letters are machine-dependent and controlled 3829 by TARGET_PRINT_OPERAND. */ 3830 3831 void 3832 output_operand (rtx x, int code ATTRIBUTE_UNUSED) 3833 { 3834 if (x && GET_CODE (x) == SUBREG) 3835 x = alter_subreg (&x, true); 3836 3837 /* X must not be a pseudo reg. */ 3838 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER); 3839 3840 targetm.asm_out.print_operand (asm_out_file, x, code); 3841 3842 if (x == NULL_RTX) 3843 return; 3844 3845 for_each_rtx (&x, mark_symbol_ref_as_used, NULL); 3846 } 3847 3848 /* Print a memory reference operand for address X using 3849 machine-dependent assembler syntax. */ 3850 3851 void 3852 output_address (rtx x) 3853 { 3854 bool changed = false; 3855 walk_alter_subreg (&x, &changed); 3856 targetm.asm_out.print_operand_address (asm_out_file, x); 3857 } 3858 3859 /* Print an integer constant expression in assembler syntax. 3860 Addition and subtraction are the only arithmetic 3861 that may appear in these expressions. */ 3862 3863 void 3864 output_addr_const (FILE *file, rtx x) 3865 { 3866 char buf[256]; 3867 3868 restart: 3869 switch (GET_CODE (x)) 3870 { 3871 case PC: 3872 putc ('.', file); 3873 break; 3874 3875 case SYMBOL_REF: 3876 if (SYMBOL_REF_DECL (x)) 3877 assemble_external (SYMBOL_REF_DECL (x)); 3878 #ifdef ASM_OUTPUT_SYMBOL_REF 3879 ASM_OUTPUT_SYMBOL_REF (file, x); 3880 #else 3881 assemble_name (file, XSTR (x, 0)); 3882 #endif 3883 break; 3884 3885 case LABEL_REF: 3886 x = XEXP (x, 0); 3887 /* Fall through. */ 3888 case CODE_LABEL: 3889 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x)); 3890 #ifdef ASM_OUTPUT_LABEL_REF 3891 ASM_OUTPUT_LABEL_REF (file, buf); 3892 #else 3893 assemble_name (file, buf); 3894 #endif 3895 break; 3896 3897 case CONST_INT: 3898 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x)); 3899 break; 3900 3901 case CONST: 3902 /* This used to output parentheses around the expression, 3903 but that does not work on the 386 (either ATT or BSD assembler). */ 3904 output_addr_const (file, XEXP (x, 0)); 3905 break; 3906 3907 case CONST_DOUBLE: 3908 if (GET_MODE (x) == VOIDmode) 3909 { 3910 /* We can use %d if the number is one word and positive. */ 3911 if (CONST_DOUBLE_HIGH (x)) 3912 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX, 3913 (unsigned HOST_WIDE_INT) CONST_DOUBLE_HIGH (x), 3914 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 3915 else if (CONST_DOUBLE_LOW (x) < 0) 3916 fprintf (file, HOST_WIDE_INT_PRINT_HEX, 3917 (unsigned HOST_WIDE_INT) CONST_DOUBLE_LOW (x)); 3918 else 3919 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x)); 3920 } 3921 else 3922 /* We can't handle floating point constants; 3923 PRINT_OPERAND must handle them. */ 3924 output_operand_lossage ("floating constant misused"); 3925 break; 3926 3927 case CONST_FIXED: 3928 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_FIXED_VALUE_LOW (x)); 3929 break; 3930 3931 case PLUS: 3932 /* Some assemblers need integer constants to appear last (eg masm). */ 3933 if (CONST_INT_P (XEXP (x, 0))) 3934 { 3935 output_addr_const (file, XEXP (x, 1)); 3936 if (INTVAL (XEXP (x, 0)) >= 0) 3937 fprintf (file, "+"); 3938 output_addr_const (file, XEXP (x, 0)); 3939 } 3940 else 3941 { 3942 output_addr_const (file, XEXP (x, 0)); 3943 if (!CONST_INT_P (XEXP (x, 1)) 3944 || INTVAL (XEXP (x, 1)) >= 0) 3945 fprintf (file, "+"); 3946 output_addr_const (file, XEXP (x, 1)); 3947 } 3948 break; 3949 3950 case MINUS: 3951 /* Avoid outputting things like x-x or x+5-x, 3952 since some assemblers can't handle that. */ 3953 x = simplify_subtraction (x); 3954 if (GET_CODE (x) != MINUS) 3955 goto restart; 3956 3957 output_addr_const (file, XEXP (x, 0)); 3958 fprintf (file, "-"); 3959 if ((CONST_INT_P (XEXP (x, 1)) && INTVAL (XEXP (x, 1)) >= 0) 3960 || GET_CODE (XEXP (x, 1)) == PC 3961 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF) 3962 output_addr_const (file, XEXP (x, 1)); 3963 else 3964 { 3965 fputs (targetm.asm_out.open_paren, file); 3966 output_addr_const (file, XEXP (x, 1)); 3967 fputs (targetm.asm_out.close_paren, file); 3968 } 3969 break; 3970 3971 case ZERO_EXTEND: 3972 case SIGN_EXTEND: 3973 case SUBREG: 3974 case TRUNCATE: 3975 output_addr_const (file, XEXP (x, 0)); 3976 break; 3977 3978 default: 3979 if (targetm.asm_out.output_addr_const_extra (file, x)) 3980 break; 3981 3982 output_operand_lossage ("invalid expression as operand"); 3983 } 3984 } 3985 3986 /* Output a quoted string. */ 3987 3988 void 3989 output_quoted_string (FILE *asm_file, const char *string) 3990 { 3991 #ifdef OUTPUT_QUOTED_STRING 3992 OUTPUT_QUOTED_STRING (asm_file, string); 3993 #else 3994 char c; 3995 3996 putc ('\"', asm_file); 3997 while ((c = *string++) != 0) 3998 { 3999 if (ISPRINT (c)) 4000 { 4001 if (c == '\"' || c == '\\') 4002 putc ('\\', asm_file); 4003 putc (c, asm_file); 4004 } 4005 else 4006 fprintf (asm_file, "\\%03o", (unsigned char) c); 4007 } 4008 putc ('\"', asm_file); 4009 #endif 4010 } 4011 4012 /* Write a HOST_WIDE_INT number in hex form 0x1234, fast. */ 4013 4014 void 4015 fprint_whex (FILE *f, unsigned HOST_WIDE_INT value) 4016 { 4017 char buf[2 + CHAR_BIT * sizeof (value) / 4]; 4018 if (value == 0) 4019 putc ('0', f); 4020 else 4021 { 4022 char *p = buf + sizeof (buf); 4023 do 4024 *--p = "0123456789abcdef"[value % 16]; 4025 while ((value /= 16) != 0); 4026 *--p = 'x'; 4027 *--p = '0'; 4028 fwrite (p, 1, buf + sizeof (buf) - p, f); 4029 } 4030 } 4031 4032 /* Internal function that prints an unsigned long in decimal in reverse. 4033 The output string IS NOT null-terminated. */ 4034 4035 static int 4036 sprint_ul_rev (char *s, unsigned long value) 4037 { 4038 int i = 0; 4039 do 4040 { 4041 s[i] = "0123456789"[value % 10]; 4042 value /= 10; 4043 i++; 4044 /* alternate version, without modulo */ 4045 /* oldval = value; */ 4046 /* value /= 10; */ 4047 /* s[i] = "0123456789" [oldval - 10*value]; */ 4048 /* i++ */ 4049 } 4050 while (value != 0); 4051 return i; 4052 } 4053 4054 /* Write an unsigned long as decimal to a file, fast. */ 4055 4056 void 4057 fprint_ul (FILE *f, unsigned long value) 4058 { 4059 /* python says: len(str(2**64)) == 20 */ 4060 char s[20]; 4061 int i; 4062 4063 i = sprint_ul_rev (s, value); 4064 4065 /* It's probably too small to bother with string reversal and fputs. */ 4066 do 4067 { 4068 i--; 4069 putc (s[i], f); 4070 } 4071 while (i != 0); 4072 } 4073 4074 /* Write an unsigned long as decimal to a string, fast. 4075 s must be wide enough to not overflow, at least 21 chars. 4076 Returns the length of the string (without terminating '\0'). */ 4077 4078 int 4079 sprint_ul (char *s, unsigned long value) 4080 { 4081 int len; 4082 char tmp_c; 4083 int i; 4084 int j; 4085 4086 len = sprint_ul_rev (s, value); 4087 s[len] = '\0'; 4088 4089 /* Reverse the string. */ 4090 i = 0; 4091 j = len - 1; 4092 while (i < j) 4093 { 4094 tmp_c = s[i]; 4095 s[i] = s[j]; 4096 s[j] = tmp_c; 4097 i++; j--; 4098 } 4099 4100 return len; 4101 } 4102 4103 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U. 4104 %R prints the value of REGISTER_PREFIX. 4105 %L prints the value of LOCAL_LABEL_PREFIX. 4106 %U prints the value of USER_LABEL_PREFIX. 4107 %I prints the value of IMMEDIATE_PREFIX. 4108 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string. 4109 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%. 4110 4111 We handle alternate assembler dialects here, just like output_asm_insn. */ 4112 4113 void 4114 asm_fprintf (FILE *file, const char *p, ...) 4115 { 4116 char buf[10]; 4117 char *q, c; 4118 #ifdef ASSEMBLER_DIALECT 4119 int dialect = 0; 4120 #endif 4121 va_list argptr; 4122 4123 va_start (argptr, p); 4124 4125 buf[0] = '%'; 4126 4127 while ((c = *p++)) 4128 switch (c) 4129 { 4130 #ifdef ASSEMBLER_DIALECT 4131 case '{': 4132 case '}': 4133 case '|': 4134 p = do_assembler_dialects (p, &dialect); 4135 break; 4136 #endif 4137 4138 case '%': 4139 c = *p++; 4140 q = &buf[1]; 4141 while (strchr ("-+ #0", c)) 4142 { 4143 *q++ = c; 4144 c = *p++; 4145 } 4146 while (ISDIGIT (c) || c == '.') 4147 { 4148 *q++ = c; 4149 c = *p++; 4150 } 4151 switch (c) 4152 { 4153 case '%': 4154 putc ('%', file); 4155 break; 4156 4157 case 'd': case 'i': case 'u': 4158 case 'x': case 'X': case 'o': 4159 case 'c': 4160 *q++ = c; 4161 *q = 0; 4162 fprintf (file, buf, va_arg (argptr, int)); 4163 break; 4164 4165 case 'w': 4166 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and 4167 'o' cases, but we do not check for those cases. It 4168 means that the value is a HOST_WIDE_INT, which may be 4169 either `long' or `long long'. */ 4170 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT)); 4171 q += strlen (HOST_WIDE_INT_PRINT); 4172 *q++ = *p++; 4173 *q = 0; 4174 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT)); 4175 break; 4176 4177 case 'l': 4178 *q++ = c; 4179 #ifdef HAVE_LONG_LONG 4180 if (*p == 'l') 4181 { 4182 *q++ = *p++; 4183 *q++ = *p++; 4184 *q = 0; 4185 fprintf (file, buf, va_arg (argptr, long long)); 4186 } 4187 else 4188 #endif 4189 { 4190 *q++ = *p++; 4191 *q = 0; 4192 fprintf (file, buf, va_arg (argptr, long)); 4193 } 4194 4195 break; 4196 4197 case 's': 4198 *q++ = c; 4199 *q = 0; 4200 fprintf (file, buf, va_arg (argptr, char *)); 4201 break; 4202 4203 case 'O': 4204 #ifdef ASM_OUTPUT_OPCODE 4205 ASM_OUTPUT_OPCODE (asm_out_file, p); 4206 #endif 4207 break; 4208 4209 case 'R': 4210 #ifdef REGISTER_PREFIX 4211 fprintf (file, "%s", REGISTER_PREFIX); 4212 #endif 4213 break; 4214 4215 case 'I': 4216 #ifdef IMMEDIATE_PREFIX 4217 fprintf (file, "%s", IMMEDIATE_PREFIX); 4218 #endif 4219 break; 4220 4221 case 'L': 4222 #ifdef LOCAL_LABEL_PREFIX 4223 fprintf (file, "%s", LOCAL_LABEL_PREFIX); 4224 #endif 4225 break; 4226 4227 case 'U': 4228 fputs (user_label_prefix, file); 4229 break; 4230 4231 #ifdef ASM_FPRINTF_EXTENSIONS 4232 /* Uppercase letters are reserved for general use by asm_fprintf 4233 and so are not available to target specific code. In order to 4234 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then, 4235 they are defined here. As they get turned into real extensions 4236 to asm_fprintf they should be removed from this list. */ 4237 case 'A': case 'B': case 'C': case 'D': case 'E': 4238 case 'F': case 'G': case 'H': case 'J': case 'K': 4239 case 'M': case 'N': case 'P': case 'Q': case 'S': 4240 case 'T': case 'V': case 'W': case 'Y': case 'Z': 4241 break; 4242 4243 ASM_FPRINTF_EXTENSIONS (file, argptr, p) 4244 #endif 4245 default: 4246 gcc_unreachable (); 4247 } 4248 break; 4249 4250 default: 4251 putc (c, file); 4252 } 4253 va_end (argptr); 4254 } 4255 4256 /* Return nonzero if this function has no function calls. */ 4257 4258 int 4259 leaf_function_p (void) 4260 { 4261 rtx insn; 4262 4263 if (crtl->profile || profile_arc_flag) 4264 return 0; 4265 4266 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 4267 { 4268 if (CALL_P (insn) 4269 && ! SIBLING_CALL_P (insn)) 4270 return 0; 4271 if (NONJUMP_INSN_P (insn) 4272 && GET_CODE (PATTERN (insn)) == SEQUENCE 4273 && CALL_P (XVECEXP (PATTERN (insn), 0, 0)) 4274 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0))) 4275 return 0; 4276 } 4277 4278 return 1; 4279 } 4280 4281 /* Return 1 if branch is a forward branch. 4282 Uses insn_shuid array, so it works only in the final pass. May be used by 4283 output templates to customary add branch prediction hints. 4284 */ 4285 int 4286 final_forward_branch_p (rtx insn) 4287 { 4288 int insn_id, label_id; 4289 4290 gcc_assert (uid_shuid); 4291 insn_id = INSN_SHUID (insn); 4292 label_id = INSN_SHUID (JUMP_LABEL (insn)); 4293 /* We've hit some insns that does not have id information available. */ 4294 gcc_assert (insn_id && label_id); 4295 return insn_id < label_id; 4296 } 4297 4298 /* On some machines, a function with no call insns 4299 can run faster if it doesn't create its own register window. 4300 When output, the leaf function should use only the "output" 4301 registers. Ordinarily, the function would be compiled to use 4302 the "input" registers to find its arguments; it is a candidate 4303 for leaf treatment if it uses only the "input" registers. 4304 Leaf function treatment means renumbering so the function 4305 uses the "output" registers instead. */ 4306 4307 #ifdef LEAF_REGISTERS 4308 4309 /* Return 1 if this function uses only the registers that can be 4310 safely renumbered. */ 4311 4312 int 4313 only_leaf_regs_used (void) 4314 { 4315 int i; 4316 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS; 4317 4318 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 4319 if ((df_regs_ever_live_p (i) || global_regs[i]) 4320 && ! permitted_reg_in_leaf_functions[i]) 4321 return 0; 4322 4323 if (crtl->uses_pic_offset_table 4324 && pic_offset_table_rtx != 0 4325 && REG_P (pic_offset_table_rtx) 4326 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)]) 4327 return 0; 4328 4329 return 1; 4330 } 4331 4332 /* Scan all instructions and renumber all registers into those 4333 available in leaf functions. */ 4334 4335 static void 4336 leaf_renumber_regs (rtx first) 4337 { 4338 rtx insn; 4339 4340 /* Renumber only the actual patterns. 4341 The reg-notes can contain frame pointer refs, 4342 and renumbering them could crash, and should not be needed. */ 4343 for (insn = first; insn; insn = NEXT_INSN (insn)) 4344 if (INSN_P (insn)) 4345 leaf_renumber_regs_insn (PATTERN (insn)); 4346 } 4347 4348 /* Scan IN_RTX and its subexpressions, and renumber all regs into those 4349 available in leaf functions. */ 4350 4351 void 4352 leaf_renumber_regs_insn (rtx in_rtx) 4353 { 4354 int i, j; 4355 const char *format_ptr; 4356 4357 if (in_rtx == 0) 4358 return; 4359 4360 /* Renumber all input-registers into output-registers. 4361 renumbered_regs would be 1 for an output-register; 4362 they */ 4363 4364 if (REG_P (in_rtx)) 4365 { 4366 int newreg; 4367 4368 /* Don't renumber the same reg twice. */ 4369 if (in_rtx->used) 4370 return; 4371 4372 newreg = REGNO (in_rtx); 4373 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg 4374 to reach here as part of a REG_NOTE. */ 4375 if (newreg >= FIRST_PSEUDO_REGISTER) 4376 { 4377 in_rtx->used = 1; 4378 return; 4379 } 4380 newreg = LEAF_REG_REMAP (newreg); 4381 gcc_assert (newreg >= 0); 4382 df_set_regs_ever_live (REGNO (in_rtx), false); 4383 df_set_regs_ever_live (newreg, true); 4384 SET_REGNO (in_rtx, newreg); 4385 in_rtx->used = 1; 4386 } 4387 4388 if (INSN_P (in_rtx)) 4389 { 4390 /* Inside a SEQUENCE, we find insns. 4391 Renumber just the patterns of these insns, 4392 just as we do for the top-level insns. */ 4393 leaf_renumber_regs_insn (PATTERN (in_rtx)); 4394 return; 4395 } 4396 4397 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx)); 4398 4399 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++) 4400 switch (*format_ptr++) 4401 { 4402 case 'e': 4403 leaf_renumber_regs_insn (XEXP (in_rtx, i)); 4404 break; 4405 4406 case 'E': 4407 if (NULL != XVEC (in_rtx, i)) 4408 { 4409 for (j = 0; j < XVECLEN (in_rtx, i); j++) 4410 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j)); 4411 } 4412 break; 4413 4414 case 'S': 4415 case 's': 4416 case '0': 4417 case 'i': 4418 case 'w': 4419 case 'n': 4420 case 'u': 4421 break; 4422 4423 default: 4424 gcc_unreachable (); 4425 } 4426 } 4427 #endif 4428 4429 /* Turn the RTL into assembly. */ 4430 static unsigned int 4431 rest_of_handle_final (void) 4432 { 4433 rtx x; 4434 const char *fnname; 4435 4436 /* Get the function's name, as described by its RTL. This may be 4437 different from the DECL_NAME name used in the source file. */ 4438 4439 x = DECL_RTL (current_function_decl); 4440 gcc_assert (MEM_P (x)); 4441 x = XEXP (x, 0); 4442 gcc_assert (GET_CODE (x) == SYMBOL_REF); 4443 fnname = XSTR (x, 0); 4444 4445 assemble_start_function (current_function_decl, fnname); 4446 final_start_function (get_insns (), asm_out_file, optimize); 4447 final (get_insns (), asm_out_file, optimize); 4448 final_end_function (); 4449 4450 /* The IA-64 ".handlerdata" directive must be issued before the ".endp" 4451 directive that closes the procedure descriptor. Similarly, for x64 SEH. 4452 Otherwise it's not strictly necessary, but it doesn't hurt either. */ 4453 output_function_exception_table (fnname); 4454 4455 assemble_end_function (current_function_decl, fnname); 4456 4457 user_defined_section_attribute = false; 4458 4459 /* Free up reg info memory. */ 4460 free_reg_info (); 4461 4462 if (! quiet_flag) 4463 fflush (asm_out_file); 4464 4465 /* Write DBX symbols if requested. */ 4466 4467 /* Note that for those inline functions where we don't initially 4468 know for certain that we will be generating an out-of-line copy, 4469 the first invocation of this routine (rest_of_compilation) will 4470 skip over this code by doing a `goto exit_rest_of_compilation;'. 4471 Later on, wrapup_global_declarations will (indirectly) call 4472 rest_of_compilation again for those inline functions that need 4473 to have out-of-line copies generated. During that call, we 4474 *will* be routed past here. */ 4475 4476 timevar_push (TV_SYMOUT); 4477 if (!DECL_IGNORED_P (current_function_decl)) 4478 debug_hooks->function_decl (current_function_decl); 4479 timevar_pop (TV_SYMOUT); 4480 4481 /* Release the blocks that are linked to DECL_INITIAL() to free the memory. */ 4482 DECL_INITIAL (current_function_decl) = error_mark_node; 4483 4484 if (DECL_STATIC_CONSTRUCTOR (current_function_decl) 4485 && targetm.have_ctors_dtors) 4486 targetm.asm_out.constructor (XEXP (DECL_RTL (current_function_decl), 0), 4487 decl_init_priority_lookup 4488 (current_function_decl)); 4489 if (DECL_STATIC_DESTRUCTOR (current_function_decl) 4490 && targetm.have_ctors_dtors) 4491 targetm.asm_out.destructor (XEXP (DECL_RTL (current_function_decl), 0), 4492 decl_fini_priority_lookup 4493 (current_function_decl)); 4494 return 0; 4495 } 4496 4497 struct rtl_opt_pass pass_final = 4498 { 4499 { 4500 RTL_PASS, 4501 "final", /* name */ 4502 OPTGROUP_NONE, /* optinfo_flags */ 4503 NULL, /* gate */ 4504 rest_of_handle_final, /* execute */ 4505 NULL, /* sub */ 4506 NULL, /* next */ 4507 0, /* static_pass_number */ 4508 TV_FINAL, /* tv_id */ 4509 0, /* properties_required */ 4510 0, /* properties_provided */ 4511 0, /* properties_destroyed */ 4512 0, /* todo_flags_start */ 4513 TODO_ggc_collect /* todo_flags_finish */ 4514 } 4515 }; 4516 4517 4518 static unsigned int 4519 rest_of_handle_shorten_branches (void) 4520 { 4521 /* Shorten branches. */ 4522 shorten_branches (get_insns ()); 4523 return 0; 4524 } 4525 4526 struct rtl_opt_pass pass_shorten_branches = 4527 { 4528 { 4529 RTL_PASS, 4530 "shorten", /* name */ 4531 OPTGROUP_NONE, /* optinfo_flags */ 4532 NULL, /* gate */ 4533 rest_of_handle_shorten_branches, /* execute */ 4534 NULL, /* sub */ 4535 NULL, /* next */ 4536 0, /* static_pass_number */ 4537 TV_SHORTEN_BRANCH, /* tv_id */ 4538 0, /* properties_required */ 4539 0, /* properties_provided */ 4540 0, /* properties_destroyed */ 4541 0, /* todo_flags_start */ 4542 0 /* todo_flags_finish */ 4543 } 4544 }; 4545 4546 4547 static unsigned int 4548 rest_of_clean_state (void) 4549 { 4550 rtx insn, next; 4551 FILE *final_output = NULL; 4552 int save_unnumbered = flag_dump_unnumbered; 4553 int save_noaddr = flag_dump_noaddr; 4554 4555 if (flag_dump_final_insns) 4556 { 4557 final_output = fopen (flag_dump_final_insns, "a"); 4558 if (!final_output) 4559 { 4560 error ("could not open final insn dump file %qs: %m", 4561 flag_dump_final_insns); 4562 flag_dump_final_insns = NULL; 4563 } 4564 else 4565 { 4566 flag_dump_noaddr = flag_dump_unnumbered = 1; 4567 if (flag_compare_debug_opt || flag_compare_debug) 4568 dump_flags |= TDF_NOUID; 4569 dump_function_header (final_output, current_function_decl, 4570 dump_flags); 4571 final_insns_dump_p = true; 4572 4573 for (insn = get_insns (); insn; insn = NEXT_INSN (insn)) 4574 if (LABEL_P (insn)) 4575 INSN_UID (insn) = CODE_LABEL_NUMBER (insn); 4576 else 4577 { 4578 if (NOTE_P (insn)) 4579 set_block_for_insn (insn, NULL); 4580 INSN_UID (insn) = 0; 4581 } 4582 } 4583 } 4584 4585 /* It is very important to decompose the RTL instruction chain here: 4586 debug information keeps pointing into CODE_LABEL insns inside the function 4587 body. If these remain pointing to the other insns, we end up preserving 4588 whole RTL chain and attached detailed debug info in memory. */ 4589 for (insn = get_insns (); insn; insn = next) 4590 { 4591 next = NEXT_INSN (insn); 4592 NEXT_INSN (insn) = NULL; 4593 PREV_INSN (insn) = NULL; 4594 4595 if (final_output 4596 && (!NOTE_P (insn) || 4597 (NOTE_KIND (insn) != NOTE_INSN_VAR_LOCATION 4598 && NOTE_KIND (insn) != NOTE_INSN_CALL_ARG_LOCATION 4599 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_BEG 4600 && NOTE_KIND (insn) != NOTE_INSN_BLOCK_END 4601 && NOTE_KIND (insn) != NOTE_INSN_DELETED_DEBUG_LABEL))) 4602 print_rtl_single (final_output, insn); 4603 } 4604 4605 if (final_output) 4606 { 4607 flag_dump_noaddr = save_noaddr; 4608 flag_dump_unnumbered = save_unnumbered; 4609 final_insns_dump_p = false; 4610 4611 if (fclose (final_output)) 4612 { 4613 error ("could not close final insn dump file %qs: %m", 4614 flag_dump_final_insns); 4615 flag_dump_final_insns = NULL; 4616 } 4617 } 4618 4619 /* In case the function was not output, 4620 don't leave any temporary anonymous types 4621 queued up for sdb output. */ 4622 #ifdef SDB_DEBUGGING_INFO 4623 if (write_symbols == SDB_DEBUG) 4624 sdbout_types (NULL_TREE); 4625 #endif 4626 4627 flag_rerun_cse_after_global_opts = 0; 4628 reload_completed = 0; 4629 epilogue_completed = 0; 4630 #ifdef STACK_REGS 4631 regstack_completed = 0; 4632 #endif 4633 4634 /* Clear out the insn_length contents now that they are no 4635 longer valid. */ 4636 init_insn_lengths (); 4637 4638 /* Show no temporary slots allocated. */ 4639 init_temp_slots (); 4640 4641 free_bb_for_insn (); 4642 4643 delete_tree_ssa (); 4644 4645 /* We can reduce stack alignment on call site only when we are sure that 4646 the function body just produced will be actually used in the final 4647 executable. */ 4648 if (decl_binds_to_current_def_p (current_function_decl)) 4649 { 4650 unsigned int pref = crtl->preferred_stack_boundary; 4651 if (crtl->stack_alignment_needed > crtl->preferred_stack_boundary) 4652 pref = crtl->stack_alignment_needed; 4653 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary 4654 = pref; 4655 } 4656 4657 /* Make sure volatile mem refs aren't considered valid operands for 4658 arithmetic insns. We must call this here if this is a nested inline 4659 function, since the above code leaves us in the init_recog state, 4660 and the function context push/pop code does not save/restore volatile_ok. 4661 4662 ??? Maybe it isn't necessary for expand_start_function to call this 4663 anymore if we do it here? */ 4664 4665 init_recog_no_volatile (); 4666 4667 /* We're done with this function. Free up memory if we can. */ 4668 free_after_parsing (cfun); 4669 free_after_compilation (cfun); 4670 return 0; 4671 } 4672 4673 struct rtl_opt_pass pass_clean_state = 4674 { 4675 { 4676 RTL_PASS, 4677 "*clean_state", /* name */ 4678 OPTGROUP_NONE, /* optinfo_flags */ 4679 NULL, /* gate */ 4680 rest_of_clean_state, /* execute */ 4681 NULL, /* sub */ 4682 NULL, /* next */ 4683 0, /* static_pass_number */ 4684 TV_FINAL, /* tv_id */ 4685 0, /* properties_required */ 4686 0, /* properties_provided */ 4687 PROP_rtl, /* properties_destroyed */ 4688 0, /* todo_flags_start */ 4689 0 /* todo_flags_finish */ 4690 } 4691 }; 4692