1 /* Xstormy16 cpu description. 2 Copyright (C) 1997-2013 Free Software Foundation, Inc. 3 Contributed by Red Hat, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GCC is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 22 /* Driver configuration. */ 23 24 #undef ASM_SPEC 25 #define ASM_SPEC "" 26 27 #undef LINK_SPEC 28 #define LINK_SPEC "%{h*} %{v:-V} \ 29 %{static:-Bstatic} %{shared:-shared} %{symbolic:-Bsymbolic}" 30 31 /* For xstormy16: 32 - If -msim is specified, everything is built and linked as for the sim. 33 - If -T is specified, that linker script is used, and it should provide 34 appropriate libraries. 35 - If neither is specified, everything is built as for the sim, but no 36 I/O support is assumed. */ 37 #undef LIB_SPEC 38 #define LIB_SPEC "-( -lc %{msim:-lsim}%{!msim:%{!T*:-lnosys}} -)" 39 40 #undef STARTFILE_SPEC 41 #define STARTFILE_SPEC "crt0.o%s crti.o%s crtbegin.o%s" 42 43 #undef ENDFILE_SPEC 44 #define ENDFILE_SPEC "crtend.o%s crtn.o%s" 45 46 47 /* Run-time target specifications. */ 48 49 #define TARGET_CPU_CPP_BUILTINS() \ 50 do \ 51 { \ 52 builtin_define_std ("xstormy16"); \ 53 builtin_assert ("machine=xstormy16"); \ 54 builtin_assert ("cpu=xstormy16"); \ 55 } \ 56 while (0) 57 58 /* Storage Layout. */ 59 60 #define BITS_BIG_ENDIAN 1 61 62 #define BYTES_BIG_ENDIAN 0 63 64 #define WORDS_BIG_ENDIAN 0 65 66 #define UNITS_PER_WORD 2 67 68 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \ 69 do \ 70 { \ 71 if (GET_MODE_CLASS (MODE) == MODE_INT \ 72 && GET_MODE_SIZE (MODE) < 2) \ 73 (MODE) = HImode; \ 74 } \ 75 while (0) 76 77 #define PARM_BOUNDARY 16 78 79 #define STACK_BOUNDARY 16 80 81 #define FUNCTION_BOUNDARY 16 82 83 #define BIGGEST_ALIGNMENT 16 84 85 #define DATA_ALIGNMENT(TYPE, ALIGN) \ 86 (TREE_CODE (TYPE) == ARRAY_TYPE \ 87 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 88 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 89 90 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 91 (TREE_CODE (EXP) == STRING_CST \ 92 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 93 94 #define STRICT_ALIGNMENT 1 95 96 #define PCC_BITFIELD_TYPE_MATTERS 1 97 98 /* Layout of Source Language Data Types. */ 99 100 #define INT_TYPE_SIZE 16 101 102 #define SHORT_TYPE_SIZE 16 103 104 #define LONG_TYPE_SIZE 32 105 106 #define LONG_LONG_TYPE_SIZE 64 107 108 #define FLOAT_TYPE_SIZE 32 109 110 #define DOUBLE_TYPE_SIZE 64 111 112 #define LONG_DOUBLE_TYPE_SIZE 64 113 114 #define DEFAULT_SIGNED_CHAR 0 115 116 #define SIZE_TYPE "unsigned int" 117 118 #define PTRDIFF_TYPE "int" 119 120 #undef WCHAR_TYPE 121 #define WCHAR_TYPE "long int" 122 123 #undef WCHAR_TYPE_SIZE 124 #define WCHAR_TYPE_SIZE 32 125 126 127 /* Register Basics. */ 128 129 #define FIRST_PSEUDO_REGISTER 19 130 131 #define FIXED_REGISTERS \ 132 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 1, 1 } 133 134 #define CALL_USED_REGISTERS \ 135 { 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1 } 136 137 138 /* Order of allocation of registers. */ 139 140 #define REG_ALLOC_ORDER { 7, 6, 5, 4, 3, 2, 1, 0, 9, 8, 10, 11, 12, 13, 14, 15, 16 } 141 142 143 /* How Values Fit in Registers. */ 144 145 #define HARD_REGNO_NREGS(REGNO, MODE) \ 146 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 147 148 #define HARD_REGNO_MODE_OK(REGNO, MODE) ((REGNO) != 16 || (MODE) == BImode) 149 150 /* A C expression that is nonzero if it is desirable to choose register 151 allocation so as to avoid move instructions between a value of mode MODE1 152 and a value of mode MODE2. 153 154 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are 155 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be 156 zero. */ 157 #define MODES_TIEABLE_P(MODE1, MODE2) ((MODE1) != BImode && (MODE2) != BImode) 158 159 160 /* Register Classes. */ 161 162 enum reg_class 163 { 164 NO_REGS, 165 R0_REGS, 166 R1_REGS, 167 TWO_REGS, 168 R2_REGS, 169 EIGHT_REGS, 170 R8_REGS, 171 ICALL_REGS, 172 GENERAL_REGS, 173 ALL_REGS, 174 LIM_REG_CLASSES 175 }; 176 177 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 178 179 #define REG_CLASS_NAMES \ 180 { \ 181 "NO_REGS", \ 182 "R0_REGS", \ 183 "R1_REGS", \ 184 "TWO_REGS", \ 185 "R2_REGS", \ 186 "EIGHT_REGS", \ 187 "R8_REGS", \ 188 "ICALL_REGS", \ 189 "GENERAL_REGS", \ 190 "ALL_REGS" \ 191 } 192 193 #define REG_CLASS_CONTENTS \ 194 { \ 195 { 0x00000 }, \ 196 { 0x00001 }, \ 197 { 0x00002 }, \ 198 { 0x00003 }, \ 199 { 0x00004 }, \ 200 { 0x000FF }, \ 201 { 0x00100 }, \ 202 { 0x00300 }, \ 203 { 0x6FFFF }, \ 204 { (1 << FIRST_PSEUDO_REGISTER) - 1 } \ 205 } 206 207 #define REGNO_REG_CLASS(REGNO) \ 208 ( (REGNO) == 0 ? R0_REGS \ 209 : (REGNO) == 1 ? R1_REGS \ 210 : (REGNO) == 2 ? R2_REGS \ 211 : (REGNO) < 8 ? EIGHT_REGS \ 212 : (REGNO) == 8 ? R8_REGS \ 213 : (REGNO) <= 18 ? GENERAL_REGS \ 214 : ALL_REGS) 215 216 #define BASE_REG_CLASS GENERAL_REGS 217 218 #define INDEX_REG_CLASS GENERAL_REGS 219 220 #define REGNO_OK_FOR_BASE_P(NUM) 1 221 222 #define REGNO_OK_FOR_INDEX_P(NUM) REGNO_OK_FOR_BASE_P (NUM) 223 224 /* This chip has the interesting property that only the first eight 225 registers can be moved to/from memory. */ 226 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \ 227 xstormy16_secondary_reload_class (CLASS, MODE, X) 228 229 230 /* Basic Stack Layout. */ 231 232 /* We want to use post-increment instructions to push things on the stack, 233 because we don't have any pre-increment ones. */ 234 #define STACK_PUSH_CODE POST_INC 235 236 #define FRAME_GROWS_DOWNWARD 0 237 238 #define ARGS_GROW_DOWNWARD 1 239 240 #define STARTING_FRAME_OFFSET 0 241 242 #define FIRST_PARM_OFFSET(FUNDECL) 0 243 244 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \ 245 ((COUNT) == 0 \ 246 ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \ 247 : NULL_RTX) 248 249 #define INCOMING_RETURN_ADDR_RTX \ 250 gen_rtx_MEM (SImode, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-4))) 251 252 #define INCOMING_FRAME_SP_OFFSET (xstormy16_interrupt_function_p () ? -6 : -4) 253 254 255 /* Register That Address the Stack Frame. */ 256 257 #define STATIC_CHAIN_REGNUM 1 258 #define HARD_FRAME_POINTER_REGNUM 13 259 #define STACK_POINTER_REGNUM 15 260 #define CARRY_REGNUM 16 261 #define FRAME_POINTER_REGNUM 17 262 #define ARG_POINTER_REGNUM 18 263 264 265 /* Eliminating the Frame Pointer and the Arg Pointer. */ 266 267 #define ELIMINABLE_REGS \ 268 { \ 269 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 270 {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 271 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 272 {ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \ 273 } 274 275 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 276 (OFFSET) = xstormy16_initial_elimination_offset (FROM, TO) 277 278 279 /* Passing Function Arguments on the Stack. */ 280 281 #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1) 282 283 284 /* Function Arguments in Registers. */ 285 286 #define NUM_ARGUMENT_REGISTERS 6 287 #define FIRST_ARGUMENT_REGISTER 2 288 289 #define XSTORMY16_WORD_SIZE(TYPE, MODE) \ 290 ((((TYPE) ? int_size_in_bytes (TYPE) : GET_MODE_SIZE (MODE)) \ 291 + 1) \ 292 / 2) 293 294 /* For this platform, the value of CUMULATIVE_ARGS is the number of words 295 of arguments that have been passed in registers so far. */ 296 #define CUMULATIVE_ARGS int 297 298 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 299 (CUM) = 0 300 301 #define FUNCTION_ARG_REGNO_P(REGNO) \ 302 ((REGNO) >= FIRST_ARGUMENT_REGISTER \ 303 && (REGNO) < FIRST_ARGUMENT_REGISTER + NUM_ARGUMENT_REGISTERS) 304 305 306 /* How Scalar Function Values are Returned. */ 307 308 /* The number of the hard register that is used to return a scalar value from a 309 function call. */ 310 #define RETURN_VALUE_REGNUM FIRST_ARGUMENT_REGISTER 311 312 313 /* Function Entry and Exit. */ 314 315 #define EPILOGUE_USES(REGNO) \ 316 xstormy16_epilogue_uses (REGNO) 317 318 319 /* Generating Code for Profiling. */ 320 321 /* This declaration must be present, but it can be an abort if profiling is 322 not implemented. */ 323 324 #define FUNCTION_PROFILER(FILE, LABELNO) xstormy16_function_profiler () 325 326 327 /* Trampolines for Nested Functions. */ 328 329 #define TRAMPOLINE_SIZE 8 330 #define TRAMPOLINE_ALIGNMENT 16 331 332 333 /* Addressing Modes. */ 334 335 #define HAVE_POST_INCREMENT 1 336 337 #define HAVE_PRE_DECREMENT 1 338 339 #define MAX_REGS_PER_ADDRESS 1 340 341 342 /* Describing Relative Costs of Operations. */ 343 344 #define BRANCH_COST(speed_p, predictable_p) 5 345 346 #define SLOW_BYTE_ACCESS 0 347 348 #define NO_FUNCTION_CSE 349 350 351 /* Dividing the output into sections. */ 352 353 #define TEXT_SECTION_ASM_OP ".text" 354 355 #define DATA_SECTION_ASM_OP ".data" 356 357 #define BSS_SECTION_ASM_OP "\t.section\t.bss" 358 359 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. 360 There are no shared libraries on this target so these sections need 361 not be writable. 362 363 Defined in elfos.h. */ 364 365 #undef CTORS_SECTION_ASM_OP 366 #undef DTORS_SECTION_ASM_OP 367 #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" 368 #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" 369 370 #define TARGET_ASM_INIT_SECTIONS xstormy16_asm_init_sections 371 372 #define JUMP_TABLES_IN_TEXT_SECTION 1 373 374 /* The Overall Framework of an Assembler File. */ 375 376 #define ASM_COMMENT_START ";" 377 378 #define ASM_APP_ON "#APP\n" 379 380 #define ASM_APP_OFF "#NO_APP\n" 381 382 /* Output of Data. */ 383 384 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '|') 385 386 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGNMENT) \ 387 xstormy16_asm_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 1) 388 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGNMENT) \ 389 xstormy16_asm_output_aligned_common (STREAM, DECL, NAME, SIZE, ALIGNMENT, 0) 390 391 392 /* Output and Generation of Labels. */ 393 #define SYMBOL_FLAG_XSTORMY16_BELOW100 (SYMBOL_FLAG_MACH_DEP << 0) 394 395 #define ASM_OUTPUT_SYMBOL_REF(STREAM, SYMBOL) \ 396 do \ 397 { \ 398 const char *rn = XSTR (SYMBOL, 0); \ 399 \ 400 if (SYMBOL_REF_FUNCTION_P (SYMBOL)) \ 401 ASM_OUTPUT_LABEL_REF ((STREAM), rn); \ 402 else \ 403 assemble_name (STREAM, rn); \ 404 } \ 405 while (0) 406 407 #define ASM_OUTPUT_LABEL_REF(STREAM, NAME) \ 408 do \ 409 { \ 410 fputs ("@fptr(", STREAM); \ 411 assemble_name (STREAM, NAME); \ 412 fputc (')', STREAM); \ 413 } \ 414 while (0) 415 416 /* Globalizing directive for a label. */ 417 #define GLOBAL_ASM_OP "\t.globl " 418 419 420 /* Output of Assembler Instructions. */ 421 422 #define REGISTER_NAMES \ 423 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10", \ 424 "r11", "r12", "r13", "psw", "sp", "carry", "fp", "ap" } 425 426 #define ADDITIONAL_REGISTER_NAMES \ 427 { { "r14", 14 }, \ 428 { "r15", 15 } } 429 430 #define REGISTER_PREFIX "" 431 #define LOCAL_LABEL_PREFIX "." 432 #define USER_LABEL_PREFIX "" 433 #define IMMEDIATE_PREFIX "#" 434 435 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ 436 fprintf (STREAM, "\tpush %d\n", REGNO) 437 438 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ 439 fprintf (STREAM, "\tpop %d\n", REGNO) 440 441 442 /* Output of dispatch tables. */ 443 444 /* This port does not use the ASM_OUTPUT_ADDR_VEC_ELT macro, because 445 this could cause label alignment to appear between the 'br' and the table, 446 which would be bad. Instead, it controls the output of the table 447 itself. */ 448 #define ASM_OUTPUT_ADDR_VEC(LABEL, BODY) \ 449 xstormy16_output_addr_vec (file, LABEL, BODY) 450 451 /* Alignment for ADDR_VECs is the same as for code. */ 452 #define ADDR_VEC_ALIGN(ADDR_VEC) 1 453 454 455 /* Assembler Commands for Exception Regions. */ 456 457 #define DWARF2_UNWIND_INFO 0 458 #define DWARF_CIE_DATA_ALIGNMENT 1 459 460 /* Assembler Commands for Alignment. */ 461 462 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 463 fprintf ((STREAM), "\t.p2align %d\n", (POWER)) 464 465 466 /* Macros Affecting all Debug Formats. */ 467 468 #undef PREFERRED_DEBUGGING_TYPE 469 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 470 471 472 /* Macros for SDB and Dwarf Output. */ 473 474 /* Define this macro if addresses in Dwarf 2 debugging info should not 475 be the same size as pointers on the target architecture. The 476 macro's value should be the size, in bytes, to use for addresses in 477 the debugging info. 478 479 Some architectures use word addresses to refer to code locations, 480 but Dwarf 2 info always uses byte addresses. On such machines, 481 Dwarf 2 addresses need to be larger than the architecture's 482 pointers. */ 483 #define DWARF2_ADDR_SIZE 4 484 485 486 /* Miscellaneous Parameters. */ 487 488 #define CASE_VECTOR_MODE SImode 489 490 #define WORD_REGISTER_OPERATIONS 491 492 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND 493 494 #define MOVE_MAX 2 495 496 #define SHIFT_COUNT_TRUNCATED 1 497 498 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 499 500 #define Pmode HImode 501 502 #define FUNCTION_MODE HImode 503 504 #define NO_IMPLICIT_EXTERN_C 505