1;; Constraints definitions belonging to the gcc backend for IBM S/390. 2;; Copyright (C) 2006-2019 Free Software Foundation, Inc. 3;; Written by Wolfgang Gellerich, using code and information found in 4;; files s390.md, s390.h, and s390.c. 5;; 6;; This file is part of GCC. 7;; 8;; GCC is free software; you can redistribute it and/or modify it under 9;; the terms of the GNU General Public License as published by the Free 10;; Software Foundation; either version 3, or (at your option) any later 11;; version. 12;; 13;; GCC is distributed in the hope that it will be useful, but WITHOUT ANY 14;; WARRANTY; without even the implied warranty of MERCHANTABILITY or 15;; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16;; for more details. 17;; 18;; You should have received a copy of the GNU General Public License 19;; along with GCC; see the file COPYING3. If not see 20;; <http://www.gnu.org/licenses/>. 21 22 23;; 24;; Special constraints for s/390 machine description: 25;; 26;; a -- Any address register from 1 to 15. 27;; b -- Memory operand whose address is a symbol reference or a symbol 28;; reference + constant which can be proven to be naturally aligned. 29;; c -- Condition code register 33. 30;; d -- Any register from 0 to 15. 31;; f -- Floating point registers. 32;; j -- Multiple letter constraint for constant scalar and vector values 33;; j00: constant zero scalar or vector 34;; jm1: constant scalar or vector with all bits set 35;; jxx: contiguous bitmask of 0 or 1 in all vector elements 36;; jyy: constant consisting of byte chunks being either 0 or 0xff 37;; jKK: constant vector with all elements having the same value and 38;; matching K constraint 39;; jm6: An integer operand with the lowest order 6 bits all ones. 40;; jdd: A constant operand that fits into the data section. 41;; t -- Access registers 36 and 37. 42;; v -- Vector registers v0-v31. 43;; C -- A signed 8-bit constant (-128..127) 44;; D -- An unsigned 16-bit constant (0..65535) 45;; G -- Const double zero operand 46;; I -- An 8-bit constant (0..255). 47;; J -- A 12-bit constant (0..4095). 48;; K -- A 16-bit constant (-32768..32767). 49;; L -- Value appropriate as displacement. 50;; (0..4095) for short displacement 51;; (-524288..524287) for long displacement 52;; M -- Constant integer with a value of 0x7fffffff. 53;; N -- Multiple letter constraint followed by 4 parameter letters. 54;; 0..9,x: number of the part counting from most to least significant 55;; S,H,Q: mode of the part 56;; D,S,H: mode of the containing operand 57;; 0,F: value of the other parts (F - all bits set) 58;; -- 59;; xxDq satisfies s390_contiguous_bitmask_p for DImode 60;; (with possible wraparound of the one-bit range) 61;; xxSw satisfies s390_contiguous_bitmask_p for SImode 62;; (with possible wraparound of the one-bit range) 63;; xxSq satisfies s390_contiguous_bitmask_nowrap_p for SImode 64;; (without wraparound of the one-bit range) 65;; 66;; The constraint matches if the specified part of a constant 67;; has a value different from its other parts. If the letter x 68;; is specified instead of a part number, the constraint matches 69;; if there is any single part with non-default value. 70;; O -- Multiple letter constraint followed by 1 parameter. 71;; s: Signed extended immediate value (-2G .. 2G-1). 72;; p: Positive extended immediate value (0 .. 4G-1). 73;; n: Negative extended immediate value (-4G+1 .. -1). 74;; These constraints do not accept any operand if the machine does 75;; not provide the extended-immediate facility. 76;; P -- Any integer constant that can be loaded without literal pool. 77;; Q -- Memory reference without index register and with short displacement. 78;; R -- Memory reference with index register and short displacement. 79;; S -- Memory reference without index register but with long displacement. 80;; T -- Memory reference with index register and long displacement. 81;; A -- Multiple letter constraint followed by Q, R, S, or T: 82;; Offsettable memory reference of type specified by second letter. 83;; B -- Multiple letter constraint followed by Q, R, S, or T: 84;; Memory reference of the type specified by second letter that 85;; does *not* refer to a literal pool entry. 86;; U -- Pointer with short displacement. (deprecated - use ZR) 87;; W -- Pointer with long displacement. (deprecated - use ZT) 88;; Y -- Address style operand without index. 89;; ZQ -- Pointer without index register and with short displacement. 90;; ZR -- Pointer with index register and short displacement. 91;; ZS -- Pointer without index register but with long displacement. 92;; ZT -- Pointer with index register and long displacement. 93;; ZL -- LARL operand when in 64-bit mode, otherwise nothing. 94;; 95;; 96 97 98;; 99;; Register constraints. 100;; 101 102(define_register_constraint "a" 103 "ADDR_REGS" 104 "Any address register from 1 to 15.") 105 106 107(define_register_constraint "c" 108 "CC_REGS" 109 "Condition code register 33") 110 111 112(define_register_constraint "d" 113 "GENERAL_REGS" 114 "Any register from 0 to 15") 115 116 117(define_register_constraint "f" 118 "FP_REGS" 119 "Floating point registers") 120 121 122(define_register_constraint "t" 123 "ACCESS_REGS" 124 "@internal 125 Access registers 36 and 37") 126 127 128(define_register_constraint "v" 129 "VEC_REGS" 130 "Vector registers v0-v31") 131 132 133;; 134;; General constraints for constants. 135;; 136 137(define_constraint "C" 138 "@internal 139 An 8-bit signed immediate constant (-128..127)" 140 (and (match_code "const_int") 141 (match_test "ival >= -128 && ival <= 127"))) 142 143 144(define_constraint "D" 145 "An unsigned 16-bit constant (0..65535)" 146 (and (match_code "const_int") 147 (match_test "ival >= 0 && ival <= 65535"))) 148 149 150(define_constraint "G" 151 "@internal 152 Const double zero operand" 153 (and (match_code "const_double") 154 (match_test "s390_float_const_zero_p (op)"))) 155 156 157(define_constraint "I" 158 "An 8-bit constant (0..255)" 159 (and (match_code "const_int") 160 (match_test "(unsigned HOST_WIDE_INT) ival <= 255"))) 161 162 163(define_constraint "J" 164 "A 12-bit constant (0..4095)" 165 (and (match_code "const_int") 166 (match_test "(unsigned HOST_WIDE_INT) ival <= 4095"))) 167 168 169(define_constraint "K" 170 "A 16-bit constant (-32768..32767)" 171 (and (match_code "const_int") 172 (match_test "ival >= -32768 && ival <= 32767"))) 173 174 175(define_constraint "L" 176 "Value appropriate as displacement. 177 (0..4095) for short displacement 178 (-524288..524287) for long displacement" 179 (and (match_code "const_int") 180 (match_test "TARGET_LONG_DISPLACEMENT ? 181 (ival >= -524288 && ival <= 524287) 182 : (ival >= 0 && ival <= 4095)"))) 183 184 185(define_constraint "M" 186 "Constant integer with a value of 0x7fffffff" 187 (and (match_code "const_int") 188 (match_test "ival == 2147483647"))) 189 190 191(define_constraint "P" 192 "@internal 193 Any integer constant that can be loaded without literal pool" 194 (and (match_code "const_int") 195 (match_test "legitimate_reload_constant_p (GEN_INT (ival))"))) 196 197 198(define_address_constraint "Y" 199 "Address style operand without index register" 200 201;; Simply check for base + offset style operands. Reload will take 202;; care of making sure we have a proper base register. 203 204 (match_test "s390_decompose_addrstyle_without_index (op, NULL, NULL)" )) 205 206 207;; N -- Multiple letter constraint followed by 4 parameter letters. 208;; 0..9,x: number of the part counting from most to least significant 209;; S,H,Q: mode of the part 210;; D,S,H: mode of the containing operand 211;; 0,F: value of the other parts (F = all bits set) 212;; 213;; The constraint matches if the specified part of a constant 214;; has a value different from its other parts. If the letter x 215;; is specified instead of a part number, the constraint matches 216;; if there is any single part with non-default value. 217;; 218;; The following patterns define only those constraints that are actually 219;; used in s390.md. If you need an additional one, simply add it in the 220;; obvious way. Function s390_N_constraint_str is ready to handle all 221;; combinations. 222;; 223 224 225(define_constraint "NxQS0" 226 "@internal" 227 (and (match_code "const_int") 228 (match_test "s390_N_constraint_str (\"xQS0\", ival)"))) 229 230 231(define_constraint "NxHD0" 232 "@internal" 233 (and (match_code "const_int") 234 (match_test "s390_N_constraint_str (\"xHD0\", ival)"))) 235 236 237(define_constraint "NxSD0" 238 "@internal" 239 (and (match_code "const_int") 240 (match_test "s390_N_constraint_str (\"xSD0\", ival)"))) 241 242 243(define_constraint "NxQD0" 244 "@internal" 245 (and (match_code "const_int") 246 (match_test "s390_N_constraint_str (\"xQD0\", ival)"))) 247 248 249(define_constraint "N3HD0" 250 "@internal" 251 (and (match_code "const_int") 252 (match_test "s390_N_constraint_str (\"3HD0\", ival)"))) 253 254 255(define_constraint "N2HD0" 256 "@internal" 257 (and (match_code "const_int") 258 (match_test "s390_N_constraint_str (\"2HD0\", ival)"))) 259 260 261(define_constraint "N1SD0" 262 "@internal" 263 (and (match_code "const_int") 264 (match_test "s390_N_constraint_str (\"1SD0\", ival)"))) 265 266 267(define_constraint "N1HS0" 268 "@internal" 269 (and (match_code "const_int") 270 (match_test "s390_N_constraint_str (\"1HS0\", ival)"))) 271 272 273(define_constraint "N1HD0" 274 "@internal" 275 (and (match_code "const_int") 276 (match_test "s390_N_constraint_str (\"1HD0\", ival)"))) 277 278 279(define_constraint "N0SD0" 280 "@internal" 281 (and (match_code "const_int") 282 (match_test "s390_N_constraint_str (\"0SD0\", ival)"))) 283 284 285(define_constraint "N0HS0" 286 "@internal" 287 (and (match_code "const_int") 288 (match_test "s390_N_constraint_str (\"0HS0\", ival)"))) 289 290 291(define_constraint "N0HD0" 292 "@internal" 293 (and (match_code "const_int") 294 (match_test "s390_N_constraint_str (\"0HD0\", ival)"))) 295 296 297(define_constraint "NxQDF" 298 "@internal" 299 (and (match_code "const_int") 300 (match_test "s390_N_constraint_str (\"xQDF\", ival)"))) 301 302 303(define_constraint "N1SDF" 304 "@internal" 305 (and (match_code "const_int") 306 (match_test "s390_N_constraint_str (\"1SDF\", ival)"))) 307 308 309(define_constraint "N0SDF" 310 "@internal" 311 (and (match_code "const_int") 312 (match_test "s390_N_constraint_str (\"0SDF\", ival)"))) 313 314 315(define_constraint "N3HDF" 316 "@internal" 317 (and (match_code "const_int") 318 (match_test "s390_N_constraint_str (\"3HDF\", ival)"))) 319 320 321(define_constraint "N2HDF" 322 "@internal" 323 (and (match_code "const_int") 324 (match_test "s390_N_constraint_str (\"2HDF\", ival)"))) 325 326 327(define_constraint "N1HDF" 328 "@internal" 329 (and (match_code "const_int") 330 (match_test "s390_N_constraint_str (\"1HDF\", ival)"))) 331 332 333(define_constraint "N0HDF" 334 "@internal" 335 (and (match_code "const_int") 336 (match_test "s390_N_constraint_str (\"0HDF\", ival)"))) 337 338 339(define_constraint "N0HSF" 340 "@internal" 341 (and (match_code "const_int") 342 (match_test "s390_N_constraint_str (\"0HSF\", ival)"))) 343 344 345(define_constraint "N1HSF" 346 "@internal" 347 (and (match_code "const_int") 348 (match_test "s390_N_constraint_str (\"1HSF\", ival)"))) 349 350 351(define_constraint "NxQSF" 352 "@internal" 353 (and (match_code "const_int") 354 (match_test "s390_N_constraint_str (\"xQSF\", ival)"))) 355 356 357(define_constraint "NxQHF" 358 "@internal" 359 (and (match_code "const_int") 360 (match_test "s390_N_constraint_str (\"xQHF\", ival)"))) 361 362 363(define_constraint "NxQH0" 364 "@internal" 365 (and (match_code "const_int") 366 (match_test "s390_N_constraint_str (\"xQH0\", ival)"))) 367 368(define_constraint "NxxDw" 369 "@internal" 370 (and (match_code "const_int") 371 (match_test "s390_contiguous_bitmask_p (ival, true, 64, NULL, NULL)"))) 372 373(define_constraint "NxxSq" 374 "@internal" 375 (and (match_code "const_int") 376 (match_test "s390_contiguous_bitmask_p (ival, false, 32, NULL, NULL)"))) 377 378(define_constraint "NxxSw" 379 "@internal" 380 (and (match_code "const_int") 381 (match_test "s390_contiguous_bitmask_p (ival, true, 32, NULL, NULL)"))) 382 383;; 384;; Double-letter constraints starting with O follow. 385;; 386 387 388(define_constraint "Os" 389 "@internal 390 Signed extended immediate value (-2G .. 2G-1). 391 This constraint will only match if the machine provides 392 the extended-immediate facility." 393 (and (match_code "const_int") 394 (match_test "s390_O_constraint_str ('s', ival)"))) 395 396 397(define_constraint "Op" 398 "@internal 399 Positive extended immediate value (0 .. 4G-1). 400 This constraint will only match if the machine provides 401 the extended-immediate facility." 402 (and (match_code "const_int") 403 (match_test "s390_O_constraint_str ('p', ival)"))) 404 405 406(define_constraint "On" 407 "@internal 408 Negative extended immediate value (-4G+1 .. -1). 409 This constraint will only match if the machine provides 410 the extended-immediate facility." 411 (and (match_code "const_int") 412 (match_test "s390_O_constraint_str ('n', ival)"))) 413 414 415;; 416;; Vector constraints follow. 417;; 418 419(define_constraint "j00" 420 "Zero scalar or vector constant" 421 (match_test "op == CONST0_RTX (GET_MODE (op))")) 422 423(define_constraint "jm1" 424 "All one bit scalar or vector constant" 425 (match_test "op == CONSTM1_RTX (GET_MODE (op))")) 426 427; vector generate mask operand - support for up to 64 bit elements 428(define_constraint "jxx" 429 "@internal" 430 (and (match_code "const_vector") 431 (match_test "s390_contiguous_bitmask_vector_p (op, NULL, NULL)"))) 432 433; vector generate byte mask operand - this is only supposed to deal 434; with real vectors 128 bit values of being either 0 or -1 are handled 435; with j00 and jm1 436(define_constraint "jyy" 437 "@internal" 438 (and (match_code "const_vector") 439 (match_test "s390_bytemask_vector_p (op, NULL)"))) 440 441; vector replicate immediate operand - support for up to 64 bit elements 442(define_constraint "jKK" 443 "@internal" 444 (and (and (and (match_code "const_vector") 445 (match_test "const_vec_duplicate_p (op)")) 446 (match_test "GET_MODE_UNIT_SIZE (GET_MODE (op)) <= 8")) 447 (match_test "satisfies_constraint_K (XVECEXP (op, 0, 0))"))) 448 449(define_constraint "jm6" 450 "@internal An integer operand with the lowest order 6 bits all ones." 451 (match_operand 0 "const_int_6bitset_operand")) 452 453;; 454;; Memory constraints follow. 455;; 456 457(define_memory_constraint "Q" 458 "Memory reference without index register and with short displacement" 459 (match_test "s390_mem_constraint (\"Q\", op)")) 460 461 462(define_memory_constraint "R" 463 "Memory reference with index register and short displacement" 464 (match_test "s390_mem_constraint (\"R\", op)")) 465 466 467(define_memory_constraint "S" 468 "Memory reference without index register but with long displacement" 469 (match_test "s390_mem_constraint (\"S\", op)")) 470 471 472(define_memory_constraint "T" 473 "Memory reference with index register and long displacement" 474 (match_test "s390_mem_constraint (\"T\", op)")) 475 476 477(define_memory_constraint "b" 478 "Memory reference whose address is a naturally aligned symbol reference." 479 (match_test "MEM_P (op) 480 && s390_check_symref_alignment (XEXP (op, 0), 481 GET_MODE_SIZE (GET_MODE (op)))")) 482 483; This defines 'm' as normal memory constraint. This is only possible 484; since the standard memory constraint is re-defined in s390.h using 485; the TARGET_MEM_CONSTRAINT macro. 486(define_memory_constraint "m" 487 "Matches the most general memory address for pre-z10 machines." 488 (match_test "s390_mem_constraint (\"T\", op)")) 489 490(define_memory_constraint "AQ" 491 "@internal 492 Offsettable memory reference without index register and with short displacement" 493 (match_test "s390_mem_constraint (\"AQ\", op)")) 494 495 496(define_memory_constraint "AR" 497 "@internal 498 Offsettable memory reference with index register and short displacement" 499 (match_test "s390_mem_constraint (\"AR\", op)")) 500 501 502(define_memory_constraint "AS" 503 "@internal 504 Offsettable memory reference without index register but with long displacement" 505 (match_test "s390_mem_constraint (\"AS\", op)")) 506 507 508(define_memory_constraint "AT" 509 "@internal 510 Offsettable memory reference with index register and long displacement" 511 (match_test "s390_mem_constraint (\"AT\", op)")) 512 513 514 515(define_constraint "BQ" 516 "@internal 517 Memory reference without index register and with short 518 displacement that does *not* refer to a literal pool entry." 519 (match_test "s390_mem_constraint (\"BQ\", op)")) 520 521 522(define_constraint "BR" 523 "@internal 524 Memory reference with index register and short displacement that 525 does *not* refer to a literal pool entry. " 526 (match_test "s390_mem_constraint (\"BR\", op)")) 527 528 529(define_constraint "BS" 530 "@internal 531 Memory reference without index register but with long displacement 532 that does *not* refer to a literal pool entry. " 533 (match_test "s390_mem_constraint (\"BS\", op)")) 534 535 536(define_constraint "BT" 537 "@internal 538 Memory reference with index register and long displacement that 539 does *not* refer to a literal pool entry. " 540 (match_test "s390_mem_constraint (\"BT\", op)")) 541 542 543(define_address_constraint "U" 544 "Pointer with short displacement. (deprecated - use ZR)" 545 (match_test "s390_mem_constraint (\"ZR\", op)")) 546 547(define_address_constraint "W" 548 "Pointer with long displacement. (deprecated - use ZT)" 549 (match_test "s390_mem_constraint (\"ZT\", op)")) 550 551 552(define_address_constraint "ZQ" 553 "Pointer without index register and with short displacement." 554 (match_test "s390_mem_constraint (\"ZQ\", op)")) 555 556(define_address_constraint "ZR" 557 "Pointer with index register and short displacement." 558 (match_test "s390_mem_constraint (\"ZR\", op)")) 559 560(define_address_constraint "ZS" 561 "Pointer without index register but with long displacement." 562 (match_test "s390_mem_constraint (\"ZS\", op)")) 563 564(define_address_constraint "ZT" 565 "Pointer with index register and long displacement." 566 (match_test "s390_mem_constraint (\"ZT\", op)")) 567 568(define_constraint "ZL" 569 "LARL operand when in 64-bit mode, otherwise nothing." 570 (match_test "TARGET_64BIT && larl_operand (op, VOIDmode)")) 571 572;; This constraint must behave like "i", in particular, the matching values 573;; must never be placed into registers or memory by 574;; cfgexpand.c:expand_asm_stmt. It could be straightforward to start its name 575;; with a letter from genpreds.c:const_int_constraints, however it would 576;; require using (match_code "const_int"), which is infeasible. To achieve the 577;; same effect, that is, setting maybe_allows_reg and maybe_allows_mem to false 578;; in genpreds.c:add_constraint, we explicitly exclude reg, subreg and mem 579;; codes. 580(define_constraint "jdd" 581 "A constant operand that fits into the data section. 582 Usage of this constraint might produce a relocation." 583 (and (not (match_code "reg")) 584 (not (match_code "subreg")) 585 (not (match_code "mem")) 586 (match_test "CONSTANT_P (op)"))) 587