xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/rs6000/601.md (revision fdd524d4ccd2bb0c6f67401e938dabf773eb0372)
1;; Scheduling description for PowerPC 601 processor.
2;;   Copyright (C) 2003-2013 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5
6;; GCC is free software; you can redistribute it and/or modify it
7;; under the terms of the GNU General Public License as published
8;; by the Free Software Foundation; either version 3, or (at your
9;; option) any later version.
10
11;; GCC is distributed in the hope that it will be useful, but WITHOUT
12;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
14;; License for more details.
15
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING3.  If not see
18;; <http://www.gnu.org/licenses/>.
19
20(define_automaton "ppc601,ppc601fp")
21(define_cpu_unit "iu_ppc601" "ppc601")
22(define_cpu_unit "fpu_ppc601" "ppc601fp")
23(define_cpu_unit "bpu_ppc601" "ppc601")
24
25;; PPC601  32-bit IU, FPU, BPU
26
27(define_insn_reservation "ppc601-load" 2
28  (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\
29		        load_l,store_c,sync")
30       (eq_attr "cpu" "ppc601"))
31  "iu_ppc601")
32
33(define_insn_reservation "ppc601-store" 2
34  (and (eq_attr "type" "store,store_ux,store_u")
35       (eq_attr "cpu" "ppc601"))
36  "iu_ppc601")
37
38(define_insn_reservation "ppc601-fpload" 3
39  (and (eq_attr "type" "fpload,fpload_ux,fpload_u")
40       (eq_attr "cpu" "ppc601"))
41  "iu_ppc601")
42
43(define_insn_reservation "ppc601-fpstore" 3
44  (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u")
45       (eq_attr "cpu" "ppc601"))
46  "iu_ppc601+fpu_ppc601")
47
48(define_insn_reservation "ppc601-integer" 1
49  (and (eq_attr "type" "integer,insert_word,insert_dword,shift,\
50                        trap,var_shift_rotate,cntlz,exts,isel")
51       (eq_attr "cpu" "ppc601"))
52  "iu_ppc601")
53
54(define_insn_reservation "ppc601-two" 1
55  (and (eq_attr "type" "two")
56       (eq_attr "cpu" "ppc601"))
57  "iu_ppc601,iu_ppc601")
58
59(define_insn_reservation "ppc601-three" 1
60  (and (eq_attr "type" "three")
61       (eq_attr "cpu" "ppc601"))
62  "iu_ppc601,iu_ppc601,iu_ppc601")
63
64(define_insn_reservation "ppc601-imul" 5
65  (and (eq_attr "type" "imul,imul2,imul3,imul_compare")
66       (eq_attr "cpu" "ppc601"))
67  "iu_ppc601*5")
68
69(define_insn_reservation "ppc601-idiv" 36
70  (and (eq_attr "type" "idiv")
71       (eq_attr "cpu" "ppc601"))
72  "iu_ppc601*36")
73
74; compare executes on integer unit, but feeds insns which
75; execute on the branch unit.
76(define_insn_reservation "ppc601-compare" 3
77  (and (eq_attr "type" "cmp,compare,delayed_compare,\
78                        var_delayed_compare")
79       (eq_attr "cpu" "ppc601"))
80  "iu_ppc601,nothing,bpu_ppc601")
81
82(define_insn_reservation "ppc601-fpcompare" 5
83  (and (eq_attr "type" "fpcompare")
84       (eq_attr "cpu" "ppc601"))
85  "(fpu_ppc601+iu_ppc601*2),nothing*2,bpu_ppc601")
86
87(define_insn_reservation "ppc601-fp" 4
88  (and (eq_attr "type" "fp")
89       (eq_attr "cpu" "ppc601"))
90  "fpu_ppc601")
91
92(define_insn_reservation "ppc601-dmul" 5
93  (and (eq_attr "type" "dmul")
94       (eq_attr "cpu" "ppc601"))
95  "fpu_ppc601*2")
96
97(define_insn_reservation "ppc601-sdiv" 17
98  (and (eq_attr "type" "sdiv")
99       (eq_attr "cpu" "ppc601"))
100  "fpu_ppc601*17")
101
102(define_insn_reservation "ppc601-ddiv" 31
103  (and (eq_attr "type" "ddiv")
104       (eq_attr "cpu" "ppc601"))
105  "fpu_ppc601*31")
106
107(define_insn_reservation "ppc601-mfcr" 2
108  (and (eq_attr "type" "mfcr")
109       (eq_attr "cpu" "ppc601"))
110  "iu_ppc601,bpu_ppc601")
111
112(define_insn_reservation "ppc601-mtcr" 4
113  (and (eq_attr "type" "mtcr")
114       (eq_attr "cpu" "ppc601"))
115  "iu_ppc601,bpu_ppc601")
116
117(define_insn_reservation "ppc601-crlogical" 4
118  (and (eq_attr "type" "cr_logical,delayed_cr")
119       (eq_attr "cpu" "ppc601"))
120  "bpu_ppc601")
121
122(define_insn_reservation "ppc601-mtjmpr" 4
123  (and (eq_attr "type" "mtjmpr")
124       (eq_attr "cpu" "ppc601"))
125  "iu_ppc601,bpu_ppc601")
126
127(define_insn_reservation "ppc601-mfjmpr" 2
128  (and (eq_attr "type" "mfjmpr")
129       (eq_attr "cpu" "ppc601"))
130  "iu_ppc601,bpu_ppc601")
131
132(define_insn_reservation "ppc601-branch" 1
133  (and (eq_attr "type" "jmpreg,branch,isync")
134       (eq_attr "cpu" "ppc601"))
135  "bpu_ppc601")
136
137