1;; Scheduling description for IBM PowerPC 476 processor. 2;; Copyright (C) 2009-2013 Free Software Foundation, Inc. 3;; Contributed by Peter Bergner (bergner@vnet.ibm.com). 4;; 5;; This file is part of GCC. 6;; 7;; GCC is free software; you can redistribute it and/or modify 8;; it under the terms of the GNU General Public License as published by 9;; the Free Software Foundation; either version 3, or (at your option) 10;; any later version. 11;; 12;; GCC is distributed in the hope that it will be useful, 13;; but WITHOUT ANY WARRANTY; without even the implied warranty of 14;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15;; GNU General Public License for more details. 16;; 17;; You should have received a copy of the GNU General Public License 18;; along with GCC; see the file COPYING3. If not see 19;; <http://www.gnu.org/licenses/>. 20 21;; PPC476 Embedded PowerPC controller 22;; 3 issue (476) / 4 issue (476fp) 23;; 24;; i_pipe - complex integer / compare 25;; lj_pipe - load-store / simple integer arithmetic 26;; b_pipe - branch pipe 27;; f_pipe - floating point arithmetic 28 29(define_automaton "ppc476_core,ppc476_apu") 30 31(define_cpu_unit "ppc476_i_pipe,ppc476_lj_pipe,ppc476_b_pipe" "ppc476_core") 32(define_cpu_unit "ppc476_issue_fp,ppc476_f_pipe" "ppc476_apu") 33(define_cpu_unit "ppc476_issue_0,ppc476_issue_1,ppc476_issue_2" "ppc476_core") 34 35(define_reservation "ppc476_issue" "ppc476_issue_0|ppc476_issue_1|ppc476_issue_2") 36(define_reservation "ppc476_issue2" "ppc476_issue_0+ppc476_issue_1\ 37 |ppc476_issue_0+ppc476_issue_2\ 38 |ppc476_issue_1+ppc476_issue_2") 39(define_reservation "ppc476_issue3" "ppc476_issue_0+ppc476_issue_1+ppc476_issue_2") 40 41(define_insn_reservation "ppc476-load" 4 42 (and (eq_attr "type" "load,load_ext,load_ext_u,load_ext_ux,load_ux,load_u,\ 43 load_l,store_c,sync") 44 (eq_attr "cpu" "ppc476")) 45 "ppc476_issue,\ 46 ppc476_lj_pipe") 47 48(define_insn_reservation "ppc476-store" 4 49 (and (eq_attr "type" "store,store_ux,store_u") 50 (eq_attr "cpu" "ppc476")) 51 "ppc476_issue,\ 52 ppc476_lj_pipe") 53 54(define_insn_reservation "ppc476-fpload" 4 55 (and (eq_attr "type" "fpload,fpload_ux,fpload_u") 56 (eq_attr "cpu" "ppc476")) 57 "ppc476_issue,\ 58 ppc476_lj_pipe") 59 60(define_insn_reservation "ppc476-fpstore" 4 61 (and (eq_attr "type" "fpstore,fpstore_ux,fpstore_u") 62 (eq_attr "cpu" "ppc476")) 63 "ppc476_issue,\ 64 ppc476_lj_pipe") 65 66(define_insn_reservation "ppc476-simple-integer" 1 67 (and (eq_attr "type" "integer,insert_word,var_shift_rotate,exts,shift") 68 (eq_attr "cpu" "ppc476")) 69 "ppc476_issue,\ 70 ppc476_i_pipe|ppc476_lj_pipe") 71 72(define_insn_reservation "ppc476-complex-integer" 1 73 (and (eq_attr "type" "cmp,cr_logical,delayed_cr,cntlz,isel,isync,sync,trap,popcnt") 74 (eq_attr "cpu" "ppc476")) 75 "ppc476_issue,\ 76 ppc476_i_pipe") 77 78(define_insn_reservation "ppc476-compare" 4 79 (and (eq_attr "type" "compare,delayed_compare,fast_compare,mfcr,mfcrf,\ 80 mtcr,mfjmpr,mtjmpr,var_delayed_compare") 81 (eq_attr "cpu" "ppc476")) 82 "ppc476_issue,\ 83 ppc476_i_pipe") 84 85(define_insn_reservation "ppc476-imul" 4 86 (and (eq_attr "type" "imul,imul_compare,imul2,imul3") 87 (eq_attr "cpu" "ppc476")) 88 "ppc476_issue,\ 89 ppc476_i_pipe") 90 91(define_insn_reservation "ppc476-idiv" 11 92 (and (eq_attr "type" "idiv") 93 (eq_attr "cpu" "ppc476")) 94 "ppc476_issue,\ 95 ppc476_i_pipe*11") 96 97(define_insn_reservation "ppc476-branch" 1 98 (and (eq_attr "type" "branch,jmpreg") 99 (eq_attr "cpu" "ppc476")) 100 "ppc476_issue,\ 101 ppc476_b_pipe") 102 103(define_insn_reservation "ppc476-two" 2 104 (and (eq_attr "type" "two") 105 (eq_attr "cpu" "ppc476")) 106 "ppc476_issue2,\ 107 ppc476_i_pipe|ppc476_lj_pipe,\ 108 ppc476_i_pipe|ppc476_lj_pipe") 109 110(define_insn_reservation "ppc476-three" 3 111 (and (eq_attr "type" "three") 112 (eq_attr "cpu" "ppc476")) 113 "ppc476_issue3,\ 114 ppc476_i_pipe|ppc476_lj_pipe,\ 115 ppc476_i_pipe|ppc476_lj_pipe,\ 116 ppc476_i_pipe|ppc476_lj_pipe") 117 118(define_insn_reservation "ppc476-fpcompare" 6 119 (and (eq_attr "type" "fpcompare") 120 (eq_attr "cpu" "ppc476")) 121 "ppc476_issue+ppc476_issue_fp,\ 122 ppc476_f_pipe+ppc476_i_pipe") 123 124(define_insn_reservation "ppc476-fp" 6 125 (and (eq_attr "type" "fp,dmul") 126 (eq_attr "cpu" "ppc476")) 127 "ppc476_issue_fp,\ 128 ppc476_f_pipe") 129 130(define_insn_reservation "ppc476-sdiv" 19 131 (and (eq_attr "type" "sdiv") 132 (eq_attr "cpu" "ppc476")) 133 "ppc476_issue_fp, 134 ppc476_f_pipe*19") 135 136(define_insn_reservation "ppc476-ddiv" 33 137 (and (eq_attr "type" "ddiv") 138 (eq_attr "cpu" "ppc476")) 139 "ppc476_issue_fp,\ 140 ppc476_f_pipe*33") 141 142