xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/mips/mips-modes.def (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1/* MIPS extra machine modes.
2   Copyright (C) 2003, 2004, 2007, 2008 Free Software Foundation, Inc.
3
4This file is part of GCC.
5
6GCC is free software; you can redistribute it and/or modify
7it under the terms of the GNU General Public License as published by
8the Free Software Foundation; either version 3, or (at your option)
9any later version.
10
11GCC is distributed in the hope that it will be useful,
12but WITHOUT ANY WARRANTY; without even the implied warranty of
13MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14GNU General Public License for more details.
15
16You should have received a copy of the GNU General Public License
17along with GCC; see the file COPYING3.  If not see
18<http://www.gnu.org/licenses/>.  */
19
20/* MIPS has a quirky almost-IEEE format for all its
21   floating point.  */
22RESET_FLOAT_FORMAT (SF, mips_single_format);
23RESET_FLOAT_FORMAT (DF, mips_double_format);
24
25/* Irix6 will override this via MIPS_TFMODE_FORMAT.  */
26FLOAT_MODE (TF, 16, mips_quad_format);
27
28/* Vector modes.  */
29VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
30VECTOR_MODES (FLOAT, 8);      /*            V4HF V2SF */
31VECTOR_MODES (INT, 4);        /*            V4QI V2HI */
32
33VECTOR_MODES (FRACT, 4);	/* V4QQ  V2HQ */
34VECTOR_MODES (UFRACT, 4);	/* V4UQQ V2UHQ */
35VECTOR_MODES (ACCUM, 4);	/*       V2HA */
36VECTOR_MODES (UACCUM, 4);	/*       V2UHA */
37
38/* Paired single comparison instructions use 2 or 4 CC.  */
39CC_MODE (CCV2);
40ADJUST_BYTESIZE (CCV2, 8);
41ADJUST_ALIGNMENT (CCV2, 8);
42
43CC_MODE (CCV4);
44ADJUST_BYTESIZE (CCV4, 16);
45ADJUST_ALIGNMENT (CCV4, 16);
46
47/* For MIPS DSP control registers.  */
48CC_MODE (CCDSP);
49