1 /* Subroutines used for macro/preprocessor support on the ia-32. 2 Copyright (C) 2008-2020 Free Software Foundation, Inc. 3 4 This file is part of GCC. 5 6 GCC is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GCC is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GCC; see the file COPYING3. If not see 18 <http://www.gnu.org/licenses/>. */ 19 20 #define IN_TARGET_CODE 1 21 22 #include "config.h" 23 #include "system.h" 24 #include "coretypes.h" 25 #include "target.h" 26 #include "c-family/c-common.h" 27 #include "memmodel.h" 28 #include "tm_p.h" 29 #include "c-family/c-pragma.h" 30 31 static bool ix86_pragma_target_parse (tree, tree); 32 static void ix86_target_macros_internal 33 (HOST_WIDE_INT, HOST_WIDE_INT, enum processor_type, enum processor_type, enum fpmath_unit, 34 void (*def_or_undef) (cpp_reader *, const char *)); 35 36 /* Internal function to either define or undef the appropriate system 37 macros. */ 38 static void 39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag, 40 HOST_WIDE_INT isa_flag2, 41 enum processor_type arch, 42 enum processor_type tune, 43 enum fpmath_unit fpmath, 44 void (*def_or_undef) (cpp_reader *, 45 const char *)) 46 { 47 /* For some of the k6/pentium varients there weren't separate ISA bits to 48 identify which tune/arch flag was passed, so figure it out here. */ 49 size_t arch_len = strlen (ix86_arch_string); 50 size_t tune_len = strlen (ix86_tune_string); 51 int last_arch_char = ix86_arch_string[arch_len - 1]; 52 int last_tune_char = ix86_tune_string[tune_len - 1]; 53 54 /* Built-ins based on -march=. */ 55 switch (arch) 56 { 57 case PROCESSOR_I386: 58 break; 59 case PROCESSOR_I486: 60 def_or_undef (parse_in, "__i486"); 61 def_or_undef (parse_in, "__i486__"); 62 break; 63 case PROCESSOR_LAKEMONT: 64 /* Intel MCU is based on Intel Pentium CPU. */ 65 case PROCESSOR_PENTIUM: 66 def_or_undef (parse_in, "__i586"); 67 def_or_undef (parse_in, "__i586__"); 68 def_or_undef (parse_in, "__pentium"); 69 def_or_undef (parse_in, "__pentium__"); 70 if (isa_flag & OPTION_MASK_ISA_MMX) 71 def_or_undef (parse_in, "__pentium_mmx__"); 72 break; 73 case PROCESSOR_PENTIUMPRO: 74 def_or_undef (parse_in, "__i686"); 75 def_or_undef (parse_in, "__i686__"); 76 def_or_undef (parse_in, "__pentiumpro"); 77 def_or_undef (parse_in, "__pentiumpro__"); 78 break; 79 case PROCESSOR_GEODE: 80 def_or_undef (parse_in, "__geode"); 81 def_or_undef (parse_in, "__geode__"); 82 break; 83 case PROCESSOR_K6: 84 def_or_undef (parse_in, "__k6"); 85 def_or_undef (parse_in, "__k6__"); 86 if (last_arch_char == '2') 87 def_or_undef (parse_in, "__k6_2__"); 88 else if (last_arch_char == '3') 89 def_or_undef (parse_in, "__k6_3__"); 90 else if (isa_flag & OPTION_MASK_ISA_3DNOW) 91 def_or_undef (parse_in, "__k6_3__"); 92 break; 93 case PROCESSOR_ATHLON: 94 def_or_undef (parse_in, "__athlon"); 95 def_or_undef (parse_in, "__athlon__"); 96 if (isa_flag & OPTION_MASK_ISA_SSE) 97 def_or_undef (parse_in, "__athlon_sse__"); 98 break; 99 case PROCESSOR_K8: 100 def_or_undef (parse_in, "__k8"); 101 def_or_undef (parse_in, "__k8__"); 102 break; 103 case PROCESSOR_AMDFAM10: 104 def_or_undef (parse_in, "__amdfam10"); 105 def_or_undef (parse_in, "__amdfam10__"); 106 break; 107 case PROCESSOR_BDVER1: 108 def_or_undef (parse_in, "__bdver1"); 109 def_or_undef (parse_in, "__bdver1__"); 110 break; 111 case PROCESSOR_BDVER2: 112 def_or_undef (parse_in, "__bdver2"); 113 def_or_undef (parse_in, "__bdver2__"); 114 break; 115 case PROCESSOR_BDVER3: 116 def_or_undef (parse_in, "__bdver3"); 117 def_or_undef (parse_in, "__bdver3__"); 118 break; 119 case PROCESSOR_BDVER4: 120 def_or_undef (parse_in, "__bdver4"); 121 def_or_undef (parse_in, "__bdver4__"); 122 break; 123 case PROCESSOR_ZNVER1: 124 def_or_undef (parse_in, "__znver1"); 125 def_or_undef (parse_in, "__znver1__"); 126 break; 127 case PROCESSOR_ZNVER2: 128 def_or_undef (parse_in, "__znver2"); 129 def_or_undef (parse_in, "__znver2__"); 130 break; 131 case PROCESSOR_ZNVER3: 132 def_or_undef (parse_in, "__znver3"); 133 def_or_undef (parse_in, "__znver3__"); 134 break; 135 case PROCESSOR_BTVER1: 136 def_or_undef (parse_in, "__btver1"); 137 def_or_undef (parse_in, "__btver1__"); 138 break; 139 case PROCESSOR_BTVER2: 140 def_or_undef (parse_in, "__btver2"); 141 def_or_undef (parse_in, "__btver2__"); 142 break; 143 case PROCESSOR_PENTIUM4: 144 def_or_undef (parse_in, "__pentium4"); 145 def_or_undef (parse_in, "__pentium4__"); 146 break; 147 case PROCESSOR_NOCONA: 148 def_or_undef (parse_in, "__nocona"); 149 def_or_undef (parse_in, "__nocona__"); 150 break; 151 case PROCESSOR_CORE2: 152 def_or_undef (parse_in, "__core2"); 153 def_or_undef (parse_in, "__core2__"); 154 break; 155 case PROCESSOR_NEHALEM: 156 def_or_undef (parse_in, "__corei7"); 157 def_or_undef (parse_in, "__corei7__"); 158 def_or_undef (parse_in, "__nehalem"); 159 def_or_undef (parse_in, "__nehalem__"); 160 break; 161 case PROCESSOR_SANDYBRIDGE: 162 def_or_undef (parse_in, "__corei7_avx"); 163 def_or_undef (parse_in, "__corei7_avx__"); 164 def_or_undef (parse_in, "__sandybridge"); 165 def_or_undef (parse_in, "__sandybridge__"); 166 break; 167 case PROCESSOR_HASWELL: 168 def_or_undef (parse_in, "__core_avx2"); 169 def_or_undef (parse_in, "__core_avx2__"); 170 def_or_undef (parse_in, "__haswell"); 171 def_or_undef (parse_in, "__haswell__"); 172 break; 173 case PROCESSOR_BONNELL: 174 def_or_undef (parse_in, "__atom"); 175 def_or_undef (parse_in, "__atom__"); 176 def_or_undef (parse_in, "__bonnell"); 177 def_or_undef (parse_in, "__bonnell__"); 178 break; 179 case PROCESSOR_SILVERMONT: 180 def_or_undef (parse_in, "__slm"); 181 def_or_undef (parse_in, "__slm__"); 182 def_or_undef (parse_in, "__silvermont"); 183 def_or_undef (parse_in, "__silvermont__"); 184 break; 185 case PROCESSOR_GOLDMONT: 186 def_or_undef (parse_in, "__goldmont"); 187 def_or_undef (parse_in, "__goldmont__"); 188 break; 189 case PROCESSOR_GOLDMONT_PLUS: 190 def_or_undef (parse_in, "__goldmont_plus"); 191 def_or_undef (parse_in, "__goldmont_plus__"); 192 break; 193 case PROCESSOR_TREMONT: 194 def_or_undef (parse_in, "__tremont"); 195 def_or_undef (parse_in, "__tremont__"); 196 break; 197 case PROCESSOR_KNL: 198 def_or_undef (parse_in, "__knl"); 199 def_or_undef (parse_in, "__knl__"); 200 break; 201 case PROCESSOR_KNM: 202 def_or_undef (parse_in, "__knm"); 203 def_or_undef (parse_in, "__knm__"); 204 break; 205 case PROCESSOR_SKYLAKE: 206 def_or_undef (parse_in, "__skylake"); 207 def_or_undef (parse_in, "__skylake__"); 208 break; 209 case PROCESSOR_SKYLAKE_AVX512: 210 def_or_undef (parse_in, "__skylake_avx512"); 211 def_or_undef (parse_in, "__skylake_avx512__"); 212 break; 213 case PROCESSOR_CANNONLAKE: 214 def_or_undef (parse_in, "__cannonlake"); 215 def_or_undef (parse_in, "__cannonlake__"); 216 break; 217 case PROCESSOR_ICELAKE_CLIENT: 218 def_or_undef (parse_in, "__icelake_client"); 219 def_or_undef (parse_in, "__icelake_client__"); 220 break; 221 case PROCESSOR_ICELAKE_SERVER: 222 def_or_undef (parse_in, "__icelake_server"); 223 def_or_undef (parse_in, "__icelake_server__"); 224 break; 225 case PROCESSOR_CASCADELAKE: 226 def_or_undef (parse_in, "__cascadelake"); 227 def_or_undef (parse_in, "__cascadelake__"); 228 break; 229 case PROCESSOR_TIGERLAKE: 230 def_or_undef (parse_in, "__tigerlake"); 231 def_or_undef (parse_in, "__tigerlake__"); 232 break; 233 case PROCESSOR_COOPERLAKE: 234 def_or_undef (parse_in, "__cooperlake"); 235 def_or_undef (parse_in, "__cooperlake__"); 236 /* use PROCESSOR_max to not set/unset the arch macro. */ 237 case PROCESSOR_max: 238 break; 239 case PROCESSOR_INTEL: 240 case PROCESSOR_GENERIC: 241 gcc_unreachable (); 242 } 243 244 /* Built-ins based on -mtune=. */ 245 switch (tune) 246 { 247 case PROCESSOR_I386: 248 def_or_undef (parse_in, "__tune_i386__"); 249 break; 250 case PROCESSOR_I486: 251 def_or_undef (parse_in, "__tune_i486__"); 252 break; 253 case PROCESSOR_PENTIUM: 254 def_or_undef (parse_in, "__tune_i586__"); 255 def_or_undef (parse_in, "__tune_pentium__"); 256 if (last_tune_char == 'x') 257 def_or_undef (parse_in, "__tune_pentium_mmx__"); 258 break; 259 case PROCESSOR_PENTIUMPRO: 260 def_or_undef (parse_in, "__tune_i686__"); 261 def_or_undef (parse_in, "__tune_pentiumpro__"); 262 switch (last_tune_char) 263 { 264 case '3': 265 def_or_undef (parse_in, "__tune_pentium3__"); 266 /* FALLTHRU */ 267 case '2': 268 def_or_undef (parse_in, "__tune_pentium2__"); 269 break; 270 } 271 break; 272 case PROCESSOR_GEODE: 273 def_or_undef (parse_in, "__tune_geode__"); 274 break; 275 case PROCESSOR_K6: 276 def_or_undef (parse_in, "__tune_k6__"); 277 if (last_tune_char == '2') 278 def_or_undef (parse_in, "__tune_k6_2__"); 279 else if (last_tune_char == '3') 280 def_or_undef (parse_in, "__tune_k6_3__"); 281 else if (isa_flag & OPTION_MASK_ISA_3DNOW) 282 def_or_undef (parse_in, "__tune_k6_3__"); 283 break; 284 case PROCESSOR_ATHLON: 285 def_or_undef (parse_in, "__tune_athlon__"); 286 if (isa_flag & OPTION_MASK_ISA_SSE) 287 def_or_undef (parse_in, "__tune_athlon_sse__"); 288 break; 289 case PROCESSOR_K8: 290 def_or_undef (parse_in, "__tune_k8__"); 291 break; 292 case PROCESSOR_AMDFAM10: 293 def_or_undef (parse_in, "__tune_amdfam10__"); 294 break; 295 case PROCESSOR_BDVER1: 296 def_or_undef (parse_in, "__tune_bdver1__"); 297 break; 298 case PROCESSOR_BDVER2: 299 def_or_undef (parse_in, "__tune_bdver2__"); 300 break; 301 case PROCESSOR_BDVER3: 302 def_or_undef (parse_in, "__tune_bdver3__"); 303 break; 304 case PROCESSOR_BDVER4: 305 def_or_undef (parse_in, "__tune_bdver4__"); 306 break; 307 case PROCESSOR_ZNVER1: 308 def_or_undef (parse_in, "__tune_znver1__"); 309 break; 310 case PROCESSOR_ZNVER2: 311 def_or_undef (parse_in, "__tune_znver2__"); 312 break; 313 case PROCESSOR_ZNVER3: 314 def_or_undef (parse_in, "__tune_znver3__"); 315 break; 316 case PROCESSOR_BTVER1: 317 def_or_undef (parse_in, "__tune_btver1__"); 318 break; 319 case PROCESSOR_BTVER2: 320 def_or_undef (parse_in, "__tune_btver2__"); 321 break; 322 case PROCESSOR_PENTIUM4: 323 def_or_undef (parse_in, "__tune_pentium4__"); 324 break; 325 case PROCESSOR_NOCONA: 326 def_or_undef (parse_in, "__tune_nocona__"); 327 break; 328 case PROCESSOR_CORE2: 329 def_or_undef (parse_in, "__tune_core2__"); 330 break; 331 case PROCESSOR_NEHALEM: 332 def_or_undef (parse_in, "__tune_corei7__"); 333 def_or_undef (parse_in, "__tune_nehalem__"); 334 break; 335 case PROCESSOR_SANDYBRIDGE: 336 def_or_undef (parse_in, "__tune_corei7_avx__"); 337 def_or_undef (parse_in, "__tune_sandybridge__"); 338 break; 339 case PROCESSOR_HASWELL: 340 def_or_undef (parse_in, "__tune_core_avx2__"); 341 def_or_undef (parse_in, "__tune_haswell__"); 342 break; 343 case PROCESSOR_BONNELL: 344 def_or_undef (parse_in, "__tune_atom__"); 345 def_or_undef (parse_in, "__tune_bonnell__"); 346 break; 347 case PROCESSOR_SILVERMONT: 348 def_or_undef (parse_in, "__tune_slm__"); 349 def_or_undef (parse_in, "__tune_silvermont__"); 350 break; 351 case PROCESSOR_GOLDMONT: 352 def_or_undef (parse_in, "__tune_goldmont__"); 353 break; 354 case PROCESSOR_GOLDMONT_PLUS: 355 def_or_undef (parse_in, "__tune_goldmont_plus__"); 356 break; 357 case PROCESSOR_TREMONT: 358 def_or_undef (parse_in, "__tune_tremont__"); 359 break; 360 case PROCESSOR_KNL: 361 def_or_undef (parse_in, "__tune_knl__"); 362 break; 363 case PROCESSOR_KNM: 364 def_or_undef (parse_in, "__tune_knm__"); 365 break; 366 case PROCESSOR_SKYLAKE: 367 def_or_undef (parse_in, "__tune_skylake__"); 368 break; 369 case PROCESSOR_SKYLAKE_AVX512: 370 def_or_undef (parse_in, "__tune_skylake_avx512__"); 371 break; 372 case PROCESSOR_CANNONLAKE: 373 def_or_undef (parse_in, "__tune_cannonlake__"); 374 break; 375 case PROCESSOR_ICELAKE_CLIENT: 376 def_or_undef (parse_in, "__tune_icelake_client__"); 377 break; 378 case PROCESSOR_ICELAKE_SERVER: 379 def_or_undef (parse_in, "__tune_icelake_server__"); 380 break; 381 case PROCESSOR_LAKEMONT: 382 def_or_undef (parse_in, "__tune_lakemont__"); 383 break; 384 case PROCESSOR_CASCADELAKE: 385 def_or_undef (parse_in, "__tune_cascadelake__"); 386 break; 387 case PROCESSOR_TIGERLAKE: 388 def_or_undef (parse_in, "__tune_tigerlake__"); 389 break; 390 case PROCESSOR_COOPERLAKE: 391 def_or_undef (parse_in, "__tune_cooperlake__"); 392 break; 393 case PROCESSOR_INTEL: 394 case PROCESSOR_GENERIC: 395 break; 396 /* use PROCESSOR_max to not set/unset the tune macro. */ 397 case PROCESSOR_max: 398 break; 399 } 400 401 switch (ix86_cmodel) 402 { 403 case CM_SMALL: 404 case CM_SMALL_PIC: 405 def_or_undef (parse_in, "__code_model_small__"); 406 break; 407 case CM_MEDIUM: 408 case CM_MEDIUM_PIC: 409 def_or_undef (parse_in, "__code_model_medium__"); 410 break; 411 case CM_LARGE: 412 case CM_LARGE_PIC: 413 def_or_undef (parse_in, "__code_model_large__"); 414 break; 415 case CM_32: 416 def_or_undef (parse_in, "__code_model_32__"); 417 break; 418 case CM_KERNEL: 419 def_or_undef (parse_in, "__code_model_kernel__"); 420 break; 421 default: 422 ; 423 } 424 425 if (isa_flag2 & OPTION_MASK_ISA2_WBNOINVD) 426 def_or_undef (parse_in, "__WBNOINVD__"); 427 if (isa_flag2 & OPTION_MASK_ISA2_AVX512VP2INTERSECT) 428 def_or_undef (parse_in, "__AVX512VP2INTERSECT__"); 429 if (isa_flag & OPTION_MASK_ISA_MMX) 430 def_or_undef (parse_in, "__MMX__"); 431 if (isa_flag & OPTION_MASK_ISA_3DNOW) 432 def_or_undef (parse_in, "__3dNOW__"); 433 if (isa_flag & OPTION_MASK_ISA_3DNOW_A) 434 def_or_undef (parse_in, "__3dNOW_A__"); 435 if (isa_flag & OPTION_MASK_ISA_SSE) 436 def_or_undef (parse_in, "__SSE__"); 437 if (isa_flag & OPTION_MASK_ISA_SSE2) 438 def_or_undef (parse_in, "__SSE2__"); 439 if (isa_flag & OPTION_MASK_ISA_SSE3) 440 def_or_undef (parse_in, "__SSE3__"); 441 if (isa_flag & OPTION_MASK_ISA_SSSE3) 442 def_or_undef (parse_in, "__SSSE3__"); 443 if (isa_flag & OPTION_MASK_ISA_SSE4_1) 444 def_or_undef (parse_in, "__SSE4_1__"); 445 if (isa_flag & OPTION_MASK_ISA_SSE4_2) 446 def_or_undef (parse_in, "__SSE4_2__"); 447 if (isa_flag & OPTION_MASK_ISA_AES) 448 def_or_undef (parse_in, "__AES__"); 449 if (isa_flag & OPTION_MASK_ISA_SHA) 450 def_or_undef (parse_in, "__SHA__"); 451 if (isa_flag & OPTION_MASK_ISA_PCLMUL) 452 def_or_undef (parse_in, "__PCLMUL__"); 453 if (isa_flag & OPTION_MASK_ISA_AVX) 454 def_or_undef (parse_in, "__AVX__"); 455 if (isa_flag & OPTION_MASK_ISA_AVX2) 456 def_or_undef (parse_in, "__AVX2__"); 457 if (isa_flag & OPTION_MASK_ISA_AVX512F) 458 def_or_undef (parse_in, "__AVX512F__"); 459 if (isa_flag & OPTION_MASK_ISA_AVX512ER) 460 def_or_undef (parse_in, "__AVX512ER__"); 461 if (isa_flag & OPTION_MASK_ISA_AVX512CD) 462 def_or_undef (parse_in, "__AVX512CD__"); 463 if (isa_flag & OPTION_MASK_ISA_AVX512PF) 464 def_or_undef (parse_in, "__AVX512PF__"); 465 if (isa_flag & OPTION_MASK_ISA_AVX512DQ) 466 def_or_undef (parse_in, "__AVX512DQ__"); 467 if (isa_flag & OPTION_MASK_ISA_AVX512BW) 468 def_or_undef (parse_in, "__AVX512BW__"); 469 if (isa_flag & OPTION_MASK_ISA_AVX512VL) 470 def_or_undef (parse_in, "__AVX512VL__"); 471 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI) 472 def_or_undef (parse_in, "__AVX512VBMI__"); 473 if (isa_flag & OPTION_MASK_ISA_AVX512IFMA) 474 def_or_undef (parse_in, "__AVX512IFMA__"); 475 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124VNNIW) 476 def_or_undef (parse_in, "__AVX5124VNNIW__"); 477 if (isa_flag & OPTION_MASK_ISA_AVX512VBMI2) 478 def_or_undef (parse_in, "__AVX512VBMI2__"); 479 if (isa_flag & OPTION_MASK_ISA_AVX512VNNI) 480 def_or_undef (parse_in, "__AVX512VNNI__"); 481 if (isa_flag2 & OPTION_MASK_ISA2_PCONFIG) 482 def_or_undef (parse_in, "__PCONFIG__"); 483 if (isa_flag2 & OPTION_MASK_ISA2_SGX) 484 def_or_undef (parse_in, "__SGX__"); 485 if (isa_flag2 & OPTION_MASK_ISA2_AVX5124FMAPS) 486 def_or_undef (parse_in, "__AVX5124FMAPS__"); 487 if (isa_flag & OPTION_MASK_ISA_AVX512BITALG) 488 def_or_undef (parse_in, "__AVX512BITALG__"); 489 if (isa_flag & OPTION_MASK_ISA_AVX512VPOPCNTDQ) 490 def_or_undef (parse_in, "__AVX512VPOPCNTDQ__"); 491 if (isa_flag & OPTION_MASK_ISA_FMA) 492 def_or_undef (parse_in, "__FMA__"); 493 if (isa_flag & OPTION_MASK_ISA_RTM) 494 def_or_undef (parse_in, "__RTM__"); 495 if (isa_flag & OPTION_MASK_ISA_SSE4A) 496 def_or_undef (parse_in, "__SSE4A__"); 497 if (isa_flag & OPTION_MASK_ISA_FMA4) 498 def_or_undef (parse_in, "__FMA4__"); 499 if (isa_flag & OPTION_MASK_ISA_XOP) 500 def_or_undef (parse_in, "__XOP__"); 501 if (isa_flag & OPTION_MASK_ISA_LWP) 502 def_or_undef (parse_in, "__LWP__"); 503 if (isa_flag & OPTION_MASK_ISA_ABM) 504 def_or_undef (parse_in, "__ABM__"); 505 if (isa_flag & OPTION_MASK_ISA_BMI) 506 def_or_undef (parse_in, "__BMI__"); 507 if (isa_flag & OPTION_MASK_ISA_BMI2) 508 def_or_undef (parse_in, "__BMI2__"); 509 if (isa_flag & OPTION_MASK_ISA_LZCNT) 510 def_or_undef (parse_in, "__LZCNT__"); 511 if (isa_flag & OPTION_MASK_ISA_TBM) 512 def_or_undef (parse_in, "__TBM__"); 513 if (isa_flag & OPTION_MASK_ISA_POPCNT) 514 def_or_undef (parse_in, "__POPCNT__"); 515 if (isa_flag & OPTION_MASK_ISA_FSGSBASE) 516 def_or_undef (parse_in, "__FSGSBASE__"); 517 if (isa_flag & OPTION_MASK_ISA_RDRND) 518 def_or_undef (parse_in, "__RDRND__"); 519 if (isa_flag & OPTION_MASK_ISA_F16C) 520 def_or_undef (parse_in, "__F16C__"); 521 if (isa_flag & OPTION_MASK_ISA_RDSEED) 522 def_or_undef (parse_in, "__RDSEED__"); 523 if (isa_flag & OPTION_MASK_ISA_PRFCHW) 524 def_or_undef (parse_in, "__PRFCHW__"); 525 if (isa_flag & OPTION_MASK_ISA_ADX) 526 def_or_undef (parse_in, "__ADX__"); 527 if (isa_flag & OPTION_MASK_ISA_FXSR) 528 def_or_undef (parse_in, "__FXSR__"); 529 if (isa_flag & OPTION_MASK_ISA_XSAVE) 530 def_or_undef (parse_in, "__XSAVE__"); 531 if (isa_flag & OPTION_MASK_ISA_XSAVEOPT) 532 def_or_undef (parse_in, "__XSAVEOPT__"); 533 if (isa_flag & OPTION_MASK_ISA_PREFETCHWT1) 534 def_or_undef (parse_in, "__PREFETCHWT1__"); 535 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE)) 536 def_or_undef (parse_in, "__SSE_MATH__"); 537 if ((fpmath & FPMATH_SSE) && (isa_flag & OPTION_MASK_ISA_SSE2)) 538 def_or_undef (parse_in, "__SSE2_MATH__"); 539 if (isa_flag & OPTION_MASK_ISA_CLFLUSHOPT) 540 def_or_undef (parse_in, "__CLFLUSHOPT__"); 541 if (isa_flag2 & OPTION_MASK_ISA2_CLZERO) 542 def_or_undef (parse_in, "__CLZERO__"); 543 if (isa_flag & OPTION_MASK_ISA_XSAVEC) 544 def_or_undef (parse_in, "__XSAVEC__"); 545 if (isa_flag & OPTION_MASK_ISA_XSAVES) 546 def_or_undef (parse_in, "__XSAVES__"); 547 if (isa_flag & OPTION_MASK_ISA_CLWB) 548 def_or_undef (parse_in, "__CLWB__"); 549 if (isa_flag2 & OPTION_MASK_ISA2_MWAITX) 550 def_or_undef (parse_in, "__MWAITX__"); 551 if (isa_flag & OPTION_MASK_ISA_PKU) 552 def_or_undef (parse_in, "__PKU__"); 553 if (isa_flag2 & OPTION_MASK_ISA2_RDPID) 554 def_or_undef (parse_in, "__RDPID__"); 555 if (isa_flag & OPTION_MASK_ISA_GFNI) 556 def_or_undef (parse_in, "__GFNI__"); 557 if ((isa_flag & OPTION_MASK_ISA_SHSTK)) 558 def_or_undef (parse_in, "__SHSTK__"); 559 if (isa_flag2 & OPTION_MASK_ISA2_VAES) 560 def_or_undef (parse_in, "__VAES__"); 561 if (isa_flag & OPTION_MASK_ISA_VPCLMULQDQ) 562 def_or_undef (parse_in, "__VPCLMULQDQ__"); 563 if (isa_flag & OPTION_MASK_ISA_MOVDIRI) 564 def_or_undef (parse_in, "__MOVDIRI__"); 565 if (isa_flag2 & OPTION_MASK_ISA2_MOVDIR64B) 566 def_or_undef (parse_in, "__MOVDIR64B__"); 567 if (isa_flag2 & OPTION_MASK_ISA2_WAITPKG) 568 def_or_undef (parse_in, "__WAITPKG__"); 569 if (isa_flag2 & OPTION_MASK_ISA2_CLDEMOTE) 570 def_or_undef (parse_in, "__CLDEMOTE__"); 571 if (isa_flag2 & OPTION_MASK_ISA2_PTWRITE) 572 def_or_undef (parse_in, "__PTWRITE__"); 573 if (isa_flag2 & OPTION_MASK_ISA2_AVX512BF16) 574 def_or_undef (parse_in, "__AVX512BF16__"); 575 if (TARGET_MMX_WITH_SSE) 576 def_or_undef (parse_in, "__MMX_WITH_SSE__"); 577 if (isa_flag2 & OPTION_MASK_ISA2_ENQCMD) 578 def_or_undef (parse_in, "__ENQCMD__"); 579 if (TARGET_IAMCU) 580 { 581 def_or_undef (parse_in, "__iamcu"); 582 def_or_undef (parse_in, "__iamcu__"); 583 } 584 } 585 586 587 /* Hook to validate the current #pragma GCC target and set the state, and 588 update the macros based on what was changed. If ARGS is NULL, then 589 POP_TARGET is used to reset the options. */ 590 591 static bool 592 ix86_pragma_target_parse (tree args, tree pop_target) 593 { 594 tree prev_tree = build_target_option_node (&global_options); 595 tree cur_tree; 596 struct cl_target_option *prev_opt; 597 struct cl_target_option *cur_opt; 598 HOST_WIDE_INT prev_isa; 599 HOST_WIDE_INT cur_isa; 600 HOST_WIDE_INT diff_isa; 601 HOST_WIDE_INT prev_isa2; 602 HOST_WIDE_INT cur_isa2; 603 HOST_WIDE_INT diff_isa2; 604 enum processor_type prev_arch; 605 enum processor_type prev_tune; 606 enum processor_type cur_arch; 607 enum processor_type cur_tune; 608 609 if (! args) 610 { 611 cur_tree = (pop_target ? pop_target : target_option_default_node); 612 cl_target_option_restore (&global_options, 613 TREE_TARGET_OPTION (cur_tree)); 614 } 615 else 616 { 617 cur_tree = ix86_valid_target_attribute_tree (NULL_TREE, args, 618 &global_options, 619 &global_options_set, 0); 620 if (!cur_tree || cur_tree == error_mark_node) 621 { 622 cl_target_option_restore (&global_options, 623 TREE_TARGET_OPTION (prev_tree)); 624 return false; 625 } 626 } 627 628 target_option_current_node = cur_tree; 629 ix86_reset_previous_fndecl (); 630 631 /* Figure out the previous/current isa, arch, tune and the differences. */ 632 prev_opt = TREE_TARGET_OPTION (prev_tree); 633 cur_opt = TREE_TARGET_OPTION (cur_tree); 634 prev_isa = prev_opt->x_ix86_isa_flags; 635 cur_isa = cur_opt->x_ix86_isa_flags; 636 diff_isa = (prev_isa ^ cur_isa); 637 prev_isa2 = prev_opt->x_ix86_isa_flags2; 638 cur_isa2 = cur_opt->x_ix86_isa_flags2; 639 diff_isa2 = (prev_isa2 ^ cur_isa2); 640 prev_arch = (enum processor_type) prev_opt->arch; 641 prev_tune = (enum processor_type) prev_opt->tune; 642 cur_arch = (enum processor_type) cur_opt->arch; 643 cur_tune = (enum processor_type) cur_opt->tune; 644 645 /* If the same processor is used for both previous and current options, don't 646 change the macros. */ 647 if (cur_arch == prev_arch) 648 cur_arch = prev_arch = PROCESSOR_max; 649 650 if (cur_tune == prev_tune) 651 cur_tune = prev_tune = PROCESSOR_max; 652 653 /* Undef all of the macros for that are no longer current. */ 654 ix86_target_macros_internal (prev_isa & diff_isa, 655 prev_isa2 & diff_isa2, 656 prev_arch, 657 prev_tune, 658 (enum fpmath_unit) prev_opt->x_ix86_fpmath, 659 cpp_undef); 660 661 /* For the definitions, ensure all newly defined macros are considered 662 as used for -Wunused-macros. There is no point warning about the 663 compiler predefined macros. */ 664 cpp_options *cpp_opts = cpp_get_options (parse_in); 665 unsigned char saved_warn_unused_macros = cpp_opts->warn_unused_macros; 666 cpp_opts->warn_unused_macros = 0; 667 668 /* Define all of the macros for new options that were just turned on. */ 669 ix86_target_macros_internal (cur_isa & diff_isa, 670 cur_isa2 & diff_isa2, 671 cur_arch, 672 cur_tune, 673 (enum fpmath_unit) cur_opt->x_ix86_fpmath, 674 cpp_define); 675 676 cpp_opts->warn_unused_macros = saved_warn_unused_macros; 677 678 return true; 679 } 680 681 /* Function to tell the preprocessor about the defines for the current target. */ 682 683 void 684 ix86_target_macros (void) 685 { 686 /* 32/64-bit won't change with target specific options, so do the assert and 687 builtin_define_std calls here. */ 688 if (TARGET_64BIT) 689 { 690 cpp_assert (parse_in, "cpu=x86_64"); 691 cpp_assert (parse_in, "machine=x86_64"); 692 cpp_define (parse_in, "__amd64"); 693 cpp_define (parse_in, "__amd64__"); 694 cpp_define (parse_in, "__x86_64"); 695 cpp_define (parse_in, "__x86_64__"); 696 if (TARGET_X32) 697 { 698 cpp_define (parse_in, "_ILP32"); 699 cpp_define (parse_in, "__ILP32__"); 700 } 701 } 702 else 703 { 704 cpp_assert (parse_in, "cpu=i386"); 705 cpp_assert (parse_in, "machine=i386"); 706 builtin_define_std ("i386"); 707 cpp_define (parse_in, "_ILP32"); 708 cpp_define (parse_in, "__ILP32__"); 709 } 710 711 if (!TARGET_80387) 712 cpp_define (parse_in, "_SOFT_FLOAT"); 713 714 if (TARGET_LONG_DOUBLE_64) 715 cpp_define (parse_in, "__LONG_DOUBLE_64__"); 716 717 if (TARGET_LONG_DOUBLE_128) 718 cpp_define (parse_in, "__LONG_DOUBLE_128__"); 719 720 if (TARGET_128BIT_LONG_DOUBLE) 721 cpp_define (parse_in, "__SIZEOF_FLOAT80__=16"); 722 else 723 cpp_define (parse_in, "__SIZEOF_FLOAT80__=12"); 724 725 cpp_define (parse_in, "__SIZEOF_FLOAT128__=16"); 726 727 cpp_define_formatted (parse_in, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE); 728 cpp_define_formatted (parse_in, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE); 729 730 cpp_define (parse_in, "__GCC_ASM_FLAG_OUTPUTS__"); 731 732 ix86_target_macros_internal (ix86_isa_flags, 733 ix86_isa_flags2, 734 ix86_arch, 735 ix86_tune, 736 ix86_fpmath, 737 cpp_define); 738 739 cpp_define (parse_in, "__SEG_FS"); 740 cpp_define (parse_in, "__SEG_GS"); 741 742 if (flag_cf_protection != CF_NONE) 743 cpp_define_formatted (parse_in, "__CET__=%d", 744 flag_cf_protection & ~CF_SET); 745 } 746 747 748 /* Register target pragmas. We need to add the hook for parsing #pragma GCC 749 option here rather than in i386.c since it will pull in various preprocessor 750 functions, and those are not present in languages like fortran without a 751 preprocessor. */ 752 753 void 754 ix86_register_pragmas (void) 755 { 756 /* Update pragma hook to allow parsing #pragma GCC target. */ 757 targetm.target_option.pragma_parse = ix86_pragma_target_parse; 758 759 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS); 760 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS); 761 762 #ifdef REGISTER_SUBTARGET_PRAGMAS 763 REGISTER_SUBTARGET_PRAGMAS (); 764 #endif 765 } 766