1 /* Copyright (C) 1988-2020 Free Software Foundation, Inc. 2 3 This file is part of GCC. 4 5 GCC is free software; you can redistribute it and/or modify 6 it under the terms of the GNU General Public License as published by 7 the Free Software Foundation; either version 3, or (at your option) 8 any later version. 9 10 GCC is distributed in the hope that it will be useful, 11 but WITHOUT ANY WARRANTY; without even the implied warranty of 12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 GNU General Public License for more details. 14 15 You should have received a copy of the GNU General Public License 16 along with GCC; see the file COPYING3. If not see 17 <http://www.gnu.org/licenses/>. */ 18 19 #define IN_TARGET_CODE 1 20 21 #include "config.h" 22 #include "system.h" 23 #include "coretypes.h" 24 #include "backend.h" 25 #include "rtl.h" 26 #include "tree.h" 27 #include "memmodel.h" 28 #include "gimple.h" 29 #include "cfghooks.h" 30 #include "cfgloop.h" 31 #include "df.h" 32 #include "tm_p.h" 33 #include "stringpool.h" 34 #include "expmed.h" 35 #include "optabs.h" 36 #include "regs.h" 37 #include "emit-rtl.h" 38 #include "recog.h" 39 #include "cgraph.h" 40 #include "diagnostic.h" 41 #include "cfgbuild.h" 42 #include "alias.h" 43 #include "fold-const.h" 44 #include "attribs.h" 45 #include "calls.h" 46 #include "stor-layout.h" 47 #include "varasm.h" 48 #include "output.h" 49 #include "insn-attr.h" 50 #include "flags.h" 51 #include "except.h" 52 #include "explow.h" 53 #include "expr.h" 54 #include "cfgrtl.h" 55 #include "common/common-target.h" 56 #include "langhooks.h" 57 #include "reload.h" 58 #include "gimplify.h" 59 #include "dwarf2.h" 60 #include "tm-constrs.h" 61 #include "cselib.h" 62 #include "sched-int.h" 63 #include "opts.h" 64 #include "tree-pass.h" 65 #include "context.h" 66 #include "pass_manager.h" 67 #include "target-globals.h" 68 #include "gimple-iterator.h" 69 #include "tree-vectorizer.h" 70 #include "shrink-wrap.h" 71 #include "builtins.h" 72 #include "rtl-iter.h" 73 #include "tree-iterator.h" 74 #include "dbgcnt.h" 75 #include "case-cfn-macros.h" 76 #include "dojump.h" 77 #include "fold-const-call.h" 78 #include "tree-vrp.h" 79 #include "tree-ssanames.h" 80 #include "selftest.h" 81 #include "selftest-rtl.h" 82 #include "print-rtl.h" 83 #include "intl.h" 84 #include "ifcvt.h" 85 #include "symbol-summary.h" 86 #include "ipa-prop.h" 87 #include "ipa-fnsummary.h" 88 #include "wide-int-bitmask.h" 89 #include "tree-vector-builder.h" 90 #include "debug.h" 91 #include "dwarf2out.h" 92 #include "i386-builtins.h" 93 94 #undef BDESC 95 #undef BDESC_FIRST 96 #undef BDESC_END 97 98 /* Macros for verification of enum ix86_builtins order. */ 99 #define BDESC_VERIFY(x, y, z) \ 100 gcc_checking_assert ((x) == (enum ix86_builtins) ((y) + (z))) 101 #define BDESC_VERIFYS(x, y, z) \ 102 STATIC_ASSERT ((x) == (enum ix86_builtins) ((y) + (z))) 103 104 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_FIRST, 105 IX86_BUILTIN__BDESC_COMI_LAST, 1); 106 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_FIRST, 107 IX86_BUILTIN__BDESC_PCMPESTR_LAST, 1); 108 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, 109 IX86_BUILTIN__BDESC_PCMPISTR_LAST, 1); 110 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_FIRST, 111 IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 1); 112 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, 113 IX86_BUILTIN__BDESC_ARGS_LAST, 1); 114 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, 115 IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 1); 116 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_FIRST, 117 IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1); 118 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, 119 IX86_BUILTIN__BDESC_CET_LAST, 1); 120 BDESC_VERIFYS (IX86_BUILTIN_MAX, 121 IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1); 122 123 124 /* Table for the ix86 builtin non-function types. */ 125 static GTY(()) tree ix86_builtin_type_tab[(int) IX86_BT_LAST_CPTR + 1]; 126 127 /* Retrieve an element from the above table, building some of 128 the types lazily. */ 129 130 static tree 131 ix86_get_builtin_type (enum ix86_builtin_type tcode) 132 { 133 unsigned int index; 134 tree type, itype; 135 136 gcc_assert ((unsigned)tcode < ARRAY_SIZE(ix86_builtin_type_tab)); 137 138 type = ix86_builtin_type_tab[(int) tcode]; 139 if (type != NULL) 140 return type; 141 142 gcc_assert (tcode > IX86_BT_LAST_PRIM); 143 if (tcode <= IX86_BT_LAST_VECT) 144 { 145 machine_mode mode; 146 147 index = tcode - IX86_BT_LAST_PRIM - 1; 148 itype = ix86_get_builtin_type (ix86_builtin_type_vect_base[index]); 149 mode = ix86_builtin_type_vect_mode[index]; 150 151 type = build_vector_type_for_mode (itype, mode); 152 } 153 else 154 { 155 int quals; 156 157 index = tcode - IX86_BT_LAST_VECT - 1; 158 if (tcode <= IX86_BT_LAST_PTR) 159 quals = TYPE_UNQUALIFIED; 160 else 161 quals = TYPE_QUAL_CONST; 162 163 itype = ix86_get_builtin_type (ix86_builtin_type_ptr_base[index]); 164 if (quals != TYPE_UNQUALIFIED) 165 itype = build_qualified_type (itype, quals); 166 167 type = build_pointer_type (itype); 168 } 169 170 ix86_builtin_type_tab[(int) tcode] = type; 171 return type; 172 } 173 174 /* Table for the ix86 builtin function types. */ 175 static GTY(()) tree ix86_builtin_func_type_tab[(int) IX86_BT_LAST_ALIAS + 1]; 176 177 /* Retrieve an element from the above table, building some of 178 the types lazily. */ 179 180 static tree 181 ix86_get_builtin_func_type (enum ix86_builtin_func_type tcode) 182 { 183 tree type; 184 185 gcc_assert ((unsigned)tcode < ARRAY_SIZE (ix86_builtin_func_type_tab)); 186 187 type = ix86_builtin_func_type_tab[(int) tcode]; 188 if (type != NULL) 189 return type; 190 191 if (tcode <= IX86_BT_LAST_FUNC) 192 { 193 unsigned start = ix86_builtin_func_start[(int) tcode]; 194 unsigned after = ix86_builtin_func_start[(int) tcode + 1]; 195 tree rtype, atype, args = void_list_node; 196 unsigned i; 197 198 rtype = ix86_get_builtin_type (ix86_builtin_func_args[start]); 199 for (i = after - 1; i > start; --i) 200 { 201 atype = ix86_get_builtin_type (ix86_builtin_func_args[i]); 202 args = tree_cons (NULL, atype, args); 203 } 204 205 type = build_function_type (rtype, args); 206 } 207 else 208 { 209 unsigned index = tcode - IX86_BT_LAST_FUNC - 1; 210 enum ix86_builtin_func_type icode; 211 212 icode = ix86_builtin_func_alias_base[index]; 213 type = ix86_get_builtin_func_type (icode); 214 } 215 216 ix86_builtin_func_type_tab[(int) tcode] = type; 217 return type; 218 } 219 220 /* Table for the ix86 builtin decls. */ 221 static GTY(()) tree ix86_builtins[(int) IX86_BUILTIN_MAX]; 222 223 struct builtin_isa ix86_builtins_isa[(int) IX86_BUILTIN_MAX]; 224 225 tree get_ix86_builtin (enum ix86_builtins c) 226 { 227 return ix86_builtins[c]; 228 } 229 230 /* Bits that can still enable any inclusion of a builtin. */ 231 HOST_WIDE_INT deferred_isa_values = 0; 232 HOST_WIDE_INT deferred_isa_values2 = 0; 233 234 /* Add an ix86 target builtin function with CODE, NAME and TYPE. Save the 235 MASK and MASK2 of which isa_flags and ix86_isa_flags2 to use in the 236 ix86_builtins_isa array. Stores the function decl in the ix86_builtins 237 array. Returns the function decl or NULL_TREE, if the builtin was not 238 added. 239 240 If the front end has a special hook for builtin functions, delay adding 241 builtin functions that aren't in the current ISA until the ISA is changed 242 with function specific optimization. Doing so, can save about 300K for the 243 default compiler. When the builtin is expanded, check at that time whether 244 it is valid. 245 246 If the front end doesn't have a special hook, record all builtins, even if 247 it isn't an instruction set in the current ISA in case the user uses 248 function specific options for a different ISA, so that we don't get scope 249 errors if a builtin is added in the middle of a function scope. */ 250 251 static inline tree 252 def_builtin (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, 253 const char *name, 254 enum ix86_builtin_func_type tcode, 255 enum ix86_builtins code) 256 { 257 tree decl = NULL_TREE; 258 259 /* An instruction may be 64bit only regardless of ISAs. */ 260 if (!(mask & OPTION_MASK_ISA_64BIT) || TARGET_64BIT) 261 { 262 ix86_builtins_isa[(int) code].isa = mask; 263 ix86_builtins_isa[(int) code].isa2 = mask2; 264 265 mask &= ~OPTION_MASK_ISA_64BIT; 266 267 /* Filter out the masks most often ored together with others. */ 268 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512VL) 269 && mask != OPTION_MASK_ISA_AVX512VL) 270 mask &= ~OPTION_MASK_ISA_AVX512VL; 271 if ((mask & ix86_isa_flags & OPTION_MASK_ISA_AVX512BW) 272 && mask != OPTION_MASK_ISA_AVX512BW) 273 mask &= ~OPTION_MASK_ISA_AVX512BW; 274 275 if (((mask2 == 0 || (mask2 & ix86_isa_flags2) != 0) 276 && (mask == 0 || (mask & ix86_isa_flags) != 0)) 277 || ((mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE) 278 || (lang_hooks.builtin_function 279 == lang_hooks.builtin_function_ext_scope)) 280 { 281 tree type = ix86_get_builtin_func_type (tcode); 282 decl = add_builtin_function (name, type, code, BUILT_IN_MD, 283 NULL, NULL_TREE); 284 ix86_builtins[(int) code] = decl; 285 ix86_builtins_isa[(int) code].set_and_not_built_p = false; 286 } 287 else 288 { 289 /* Just MASK and MASK2 where set_and_not_built_p == true can potentially 290 include a builtin. */ 291 deferred_isa_values |= mask; 292 deferred_isa_values2 |= mask2; 293 ix86_builtins[(int) code] = NULL_TREE; 294 ix86_builtins_isa[(int) code].tcode = tcode; 295 ix86_builtins_isa[(int) code].name = name; 296 ix86_builtins_isa[(int) code].const_p = false; 297 ix86_builtins_isa[(int) code].pure_p = false; 298 ix86_builtins_isa[(int) code].set_and_not_built_p = true; 299 } 300 } 301 302 return decl; 303 } 304 305 /* Like def_builtin, but also marks the function decl "const". */ 306 307 static inline tree 308 def_builtin_const (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name, 309 enum ix86_builtin_func_type tcode, enum ix86_builtins code) 310 { 311 tree decl = def_builtin (mask, mask2, name, tcode, code); 312 if (decl) 313 TREE_READONLY (decl) = 1; 314 else 315 ix86_builtins_isa[(int) code].const_p = true; 316 317 return decl; 318 } 319 320 /* Like def_builtin, but also marks the function decl "pure". */ 321 322 static inline tree 323 def_builtin_pure (HOST_WIDE_INT mask, HOST_WIDE_INT mask2, const char *name, 324 enum ix86_builtin_func_type tcode, enum ix86_builtins code) 325 { 326 tree decl = def_builtin (mask, mask2, name, tcode, code); 327 if (decl) 328 DECL_PURE_P (decl) = 1; 329 else 330 ix86_builtins_isa[(int) code].pure_p = true; 331 332 return decl; 333 } 334 335 /* Add any new builtin functions for a given ISA that may not have been 336 declared. This saves a bit of space compared to adding all of the 337 declarations to the tree, even if we didn't use them. */ 338 339 void 340 ix86_add_new_builtins (HOST_WIDE_INT isa, HOST_WIDE_INT isa2) 341 { 342 isa &= ~OPTION_MASK_ISA_64BIT; 343 344 if ((isa & deferred_isa_values) == 0 345 && (isa2 & deferred_isa_values2) == 0 346 && ((deferred_isa_values & OPTION_MASK_ISA_MMX) == 0 347 || !(TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0))) 348 return; 349 350 /* Bits in ISA value can be removed from potential isa values. */ 351 deferred_isa_values &= ~isa; 352 deferred_isa_values2 &= ~isa2; 353 if (TARGET_64BIT && (isa & OPTION_MASK_ISA_SSE2) != 0) 354 deferred_isa_values &= ~OPTION_MASK_ISA_MMX; 355 356 int i; 357 tree saved_current_target_pragma = current_target_pragma; 358 current_target_pragma = NULL_TREE; 359 360 for (i = 0; i < (int)IX86_BUILTIN_MAX; i++) 361 { 362 if (((ix86_builtins_isa[i].isa & isa) != 0 363 || (ix86_builtins_isa[i].isa2 & isa2) != 0 364 || ((ix86_builtins_isa[i].isa & OPTION_MASK_ISA_MMX) != 0 365 && TARGET_64BIT 366 && (isa & OPTION_MASK_ISA_SSE2) != 0)) 367 && ix86_builtins_isa[i].set_and_not_built_p) 368 { 369 tree decl, type; 370 371 /* Don't define the builtin again. */ 372 ix86_builtins_isa[i].set_and_not_built_p = false; 373 374 type = ix86_get_builtin_func_type (ix86_builtins_isa[i].tcode); 375 decl = add_builtin_function_ext_scope (ix86_builtins_isa[i].name, 376 type, i, BUILT_IN_MD, NULL, 377 NULL_TREE); 378 379 ix86_builtins[i] = decl; 380 if (ix86_builtins_isa[i].const_p) 381 TREE_READONLY (decl) = 1; 382 } 383 } 384 385 current_target_pragma = saved_current_target_pragma; 386 } 387 388 /* TM vector builtins. */ 389 390 /* Reuse the existing x86-specific `struct builtin_description' cause 391 we're lazy. Add casts to make them fit. */ 392 static const struct builtin_description bdesc_tm[] = 393 { 394 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WM64", (enum ix86_builtins) BUILT_IN_TM_STORE_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI }, 395 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI }, 396 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM64", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M64, UNKNOWN, VOID_FTYPE_PV2SI_V2SI }, 397 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_M64, UNKNOWN, V2SI_FTYPE_PCV2SI }, 398 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M64, UNKNOWN, V2SI_FTYPE_PCV2SI }, 399 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI }, 400 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM64", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M64, UNKNOWN, V2SI_FTYPE_PCV2SI }, 401 402 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WM128", (enum ix86_builtins) BUILT_IN_TM_STORE_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF }, 403 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF }, 404 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM128", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M128, UNKNOWN, VOID_FTYPE_PV4SF_V4SF }, 405 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_M128, UNKNOWN, V4SF_FTYPE_PCV4SF }, 406 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M128, UNKNOWN, V4SF_FTYPE_PCV4SF }, 407 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF }, 408 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM128", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M128, UNKNOWN, V4SF_FTYPE_PCV4SF }, 409 410 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WM256", (enum ix86_builtins) BUILT_IN_TM_STORE_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF }, 411 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaRM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAR_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF }, 412 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_WaWM256", (enum ix86_builtins) BUILT_IN_TM_STORE_WAW_M256, UNKNOWN, VOID_FTYPE_PV8SF_V8SF }, 413 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_M256, UNKNOWN, V8SF_FTYPE_PCV8SF }, 414 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaRM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAR_M256, UNKNOWN, V8SF_FTYPE_PCV8SF }, 415 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RaWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RAW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF }, 416 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_RfWM256", (enum ix86_builtins) BUILT_IN_TM_LOAD_RFW_M256, UNKNOWN, V8SF_FTYPE_PCV8SF }, 417 418 { OPTION_MASK_ISA_MMX, 0, CODE_FOR_nothing, "__builtin__ITM_LM64", (enum ix86_builtins) BUILT_IN_TM_LOG_M64, UNKNOWN, VOID_FTYPE_PCVOID }, 419 { OPTION_MASK_ISA_SSE, 0, CODE_FOR_nothing, "__builtin__ITM_LM128", (enum ix86_builtins) BUILT_IN_TM_LOG_M128, UNKNOWN, VOID_FTYPE_PCVOID }, 420 { OPTION_MASK_ISA_AVX, 0, CODE_FOR_nothing, "__builtin__ITM_LM256", (enum ix86_builtins) BUILT_IN_TM_LOG_M256, UNKNOWN, VOID_FTYPE_PCVOID }, 421 }; 422 423 /* Initialize the transactional memory vector load/store builtins. */ 424 425 static void 426 ix86_init_tm_builtins (void) 427 { 428 enum ix86_builtin_func_type ftype; 429 const struct builtin_description *d; 430 size_t i; 431 tree decl; 432 tree attrs_load, attrs_type_load, attrs_store, attrs_type_store; 433 tree attrs_log, attrs_type_log; 434 435 if (!flag_tm) 436 return; 437 438 /* If there are no builtins defined, we must be compiling in a 439 language without trans-mem support. */ 440 if (!builtin_decl_explicit_p (BUILT_IN_TM_LOAD_1)) 441 return; 442 443 /* Use whatever attributes a normal TM load has. */ 444 decl = builtin_decl_explicit (BUILT_IN_TM_LOAD_1); 445 attrs_load = DECL_ATTRIBUTES (decl); 446 attrs_type_load = TYPE_ATTRIBUTES (TREE_TYPE (decl)); 447 /* Use whatever attributes a normal TM store has. */ 448 decl = builtin_decl_explicit (BUILT_IN_TM_STORE_1); 449 attrs_store = DECL_ATTRIBUTES (decl); 450 attrs_type_store = TYPE_ATTRIBUTES (TREE_TYPE (decl)); 451 /* Use whatever attributes a normal TM log has. */ 452 decl = builtin_decl_explicit (BUILT_IN_TM_LOG); 453 attrs_log = DECL_ATTRIBUTES (decl); 454 attrs_type_log = TYPE_ATTRIBUTES (TREE_TYPE (decl)); 455 456 for (i = 0, d = bdesc_tm; 457 i < ARRAY_SIZE (bdesc_tm); 458 i++, d++) 459 { 460 if ((d->mask & ix86_isa_flags) != 0 461 || ((d->mask & OPTION_MASK_ISA_MMX) != 0 && TARGET_MMX_WITH_SSE) 462 || (lang_hooks.builtin_function 463 == lang_hooks.builtin_function_ext_scope)) 464 { 465 tree type, attrs, attrs_type; 466 enum built_in_function code = (enum built_in_function) d->code; 467 468 ftype = (enum ix86_builtin_func_type) d->flag; 469 type = ix86_get_builtin_func_type (ftype); 470 471 if (BUILTIN_TM_LOAD_P (code)) 472 { 473 attrs = attrs_load; 474 attrs_type = attrs_type_load; 475 } 476 else if (BUILTIN_TM_STORE_P (code)) 477 { 478 attrs = attrs_store; 479 attrs_type = attrs_type_store; 480 } 481 else 482 { 483 attrs = attrs_log; 484 attrs_type = attrs_type_log; 485 } 486 decl = add_builtin_function (d->name, type, code, BUILT_IN_NORMAL, 487 /* The builtin without the prefix for 488 calling it directly. */ 489 d->name + strlen ("__builtin_"), 490 attrs); 491 /* add_builtin_function() will set the DECL_ATTRIBUTES, now 492 set the TYPE_ATTRIBUTES. */ 493 decl_attributes (&TREE_TYPE (decl), attrs_type, ATTR_FLAG_BUILT_IN); 494 495 set_builtin_decl (code, decl, false); 496 } 497 } 498 } 499 500 /* Set up all the MMX/SSE builtins, even builtins for instructions that are not 501 in the current target ISA to allow the user to compile particular modules 502 with different target specific options that differ from the command line 503 options. */ 504 static void 505 ix86_init_mmx_sse_builtins (void) 506 { 507 const struct builtin_description * d; 508 enum ix86_builtin_func_type ftype; 509 size_t i; 510 511 /* Add all special builtins with variable number of operands. */ 512 for (i = 0, d = bdesc_special_args; 513 i < ARRAY_SIZE (bdesc_special_args); 514 i++, d++) 515 { 516 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, i); 517 if (d->name == 0) 518 continue; 519 520 ftype = (enum ix86_builtin_func_type) d->flag; 521 def_builtin (d->mask, d->mask2, d->name, ftype, d->code); 522 } 523 BDESC_VERIFYS (IX86_BUILTIN__BDESC_SPECIAL_ARGS_LAST, 524 IX86_BUILTIN__BDESC_SPECIAL_ARGS_FIRST, 525 ARRAY_SIZE (bdesc_special_args) - 1); 526 527 /* Add all builtins with variable number of operands. */ 528 for (i = 0, d = bdesc_args; 529 i < ARRAY_SIZE (bdesc_args); 530 i++, d++) 531 { 532 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ARGS_FIRST, i); 533 if (d->name == 0) 534 continue; 535 536 ftype = (enum ix86_builtin_func_type) d->flag; 537 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 538 } 539 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ARGS_LAST, 540 IX86_BUILTIN__BDESC_ARGS_FIRST, 541 ARRAY_SIZE (bdesc_args) - 1); 542 543 /* Add all builtins with rounding. */ 544 for (i = 0, d = bdesc_round_args; 545 i < ARRAY_SIZE (bdesc_round_args); 546 i++, d++) 547 { 548 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, i); 549 if (d->name == 0) 550 continue; 551 552 ftype = (enum ix86_builtin_func_type) d->flag; 553 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 554 } 555 BDESC_VERIFYS (IX86_BUILTIN__BDESC_ROUND_ARGS_LAST, 556 IX86_BUILTIN__BDESC_ROUND_ARGS_FIRST, 557 ARRAY_SIZE (bdesc_round_args) - 1); 558 559 /* pcmpestr[im] insns. */ 560 for (i = 0, d = bdesc_pcmpestr; 561 i < ARRAY_SIZE (bdesc_pcmpestr); 562 i++, d++) 563 { 564 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPESTR_FIRST, i); 565 if (d->code == IX86_BUILTIN_PCMPESTRM128) 566 ftype = V16QI_FTYPE_V16QI_INT_V16QI_INT_INT; 567 else 568 ftype = INT_FTYPE_V16QI_INT_V16QI_INT_INT; 569 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 570 } 571 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPESTR_LAST, 572 IX86_BUILTIN__BDESC_PCMPESTR_FIRST, 573 ARRAY_SIZE (bdesc_pcmpestr) - 1); 574 575 /* pcmpistr[im] insns. */ 576 for (i = 0, d = bdesc_pcmpistr; 577 i < ARRAY_SIZE (bdesc_pcmpistr); 578 i++, d++) 579 { 580 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_PCMPISTR_FIRST, i); 581 if (d->code == IX86_BUILTIN_PCMPISTRM128) 582 ftype = V16QI_FTYPE_V16QI_V16QI_INT; 583 else 584 ftype = INT_FTYPE_V16QI_V16QI_INT; 585 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 586 } 587 BDESC_VERIFYS (IX86_BUILTIN__BDESC_PCMPISTR_LAST, 588 IX86_BUILTIN__BDESC_PCMPISTR_FIRST, 589 ARRAY_SIZE (bdesc_pcmpistr) - 1); 590 591 /* comi/ucomi insns. */ 592 for (i = 0, d = bdesc_comi; i < ARRAY_SIZE (bdesc_comi); i++, d++) 593 { 594 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_COMI_FIRST, i); 595 if (d->mask == OPTION_MASK_ISA_SSE2) 596 ftype = INT_FTYPE_V2DF_V2DF; 597 else 598 ftype = INT_FTYPE_V4SF_V4SF; 599 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 600 } 601 BDESC_VERIFYS (IX86_BUILTIN__BDESC_COMI_LAST, 602 IX86_BUILTIN__BDESC_COMI_FIRST, 603 ARRAY_SIZE (bdesc_comi) - 1); 604 605 /* SSE */ 606 def_builtin (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_ldmxcsr", 607 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_LDMXCSR); 608 def_builtin_pure (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_stmxcsr", 609 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_STMXCSR); 610 611 /* SSE or 3DNow!A */ 612 def_builtin (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A 613 /* As it uses V4HImode, we have to require -mmmx too. */ 614 | OPTION_MASK_ISA_MMX, 0, 615 "__builtin_ia32_maskmovq", VOID_FTYPE_V8QI_V8QI_PCHAR, 616 IX86_BUILTIN_MASKMOVQ); 617 618 /* SSE2 */ 619 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_maskmovdqu", 620 VOID_FTYPE_V16QI_V16QI_PCHAR, IX86_BUILTIN_MASKMOVDQU); 621 622 def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_clflush", 623 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSH); 624 x86_mfence = def_builtin (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_mfence", 625 VOID_FTYPE_VOID, IX86_BUILTIN_MFENCE); 626 627 /* SSE3. */ 628 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_monitor", 629 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITOR); 630 def_builtin (OPTION_MASK_ISA_SSE3, 0, "__builtin_ia32_mwait", 631 VOID_FTYPE_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAIT); 632 633 /* AES */ 634 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 635 "__builtin_ia32_aesenc128", 636 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENC128); 637 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 638 "__builtin_ia32_aesenclast128", 639 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESENCLAST128); 640 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 641 "__builtin_ia32_aesdec128", 642 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDEC128); 643 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 644 "__builtin_ia32_aesdeclast128", 645 V2DI_FTYPE_V2DI_V2DI, IX86_BUILTIN_AESDECLAST128); 646 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 647 "__builtin_ia32_aesimc128", 648 V2DI_FTYPE_V2DI, IX86_BUILTIN_AESIMC128); 649 def_builtin_const (OPTION_MASK_ISA_AES | OPTION_MASK_ISA_SSE2, 0, 650 "__builtin_ia32_aeskeygenassist128", 651 V2DI_FTYPE_V2DI_INT, IX86_BUILTIN_AESKEYGENASSIST128); 652 653 /* PCLMUL */ 654 def_builtin_const (OPTION_MASK_ISA_PCLMUL | OPTION_MASK_ISA_SSE2, 0, 655 "__builtin_ia32_pclmulqdq128", 656 V2DI_FTYPE_V2DI_V2DI_INT, IX86_BUILTIN_PCLMULQDQ128); 657 658 /* RDRND */ 659 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand16_step", 660 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDRAND16_STEP); 661 def_builtin (OPTION_MASK_ISA_RDRND, 0, "__builtin_ia32_rdrand32_step", 662 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDRAND32_STEP); 663 def_builtin (OPTION_MASK_ISA_RDRND | OPTION_MASK_ISA_64BIT, 0, 664 "__builtin_ia32_rdrand64_step", INT_FTYPE_PULONGLONG, 665 IX86_BUILTIN_RDRAND64_STEP); 666 667 /* AVX2 */ 668 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2df", 669 V2DF_FTYPE_V2DF_PCDOUBLE_V4SI_V2DF_INT, 670 IX86_BUILTIN_GATHERSIV2DF); 671 672 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4df", 673 V4DF_FTYPE_V4DF_PCDOUBLE_V4SI_V4DF_INT, 674 IX86_BUILTIN_GATHERSIV4DF); 675 676 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2df", 677 V2DF_FTYPE_V2DF_PCDOUBLE_V2DI_V2DF_INT, 678 IX86_BUILTIN_GATHERDIV2DF); 679 680 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4df", 681 V4DF_FTYPE_V4DF_PCDOUBLE_V4DI_V4DF_INT, 682 IX86_BUILTIN_GATHERDIV4DF); 683 684 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4sf", 685 V4SF_FTYPE_V4SF_PCFLOAT_V4SI_V4SF_INT, 686 IX86_BUILTIN_GATHERSIV4SF); 687 688 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8sf", 689 V8SF_FTYPE_V8SF_PCFLOAT_V8SI_V8SF_INT, 690 IX86_BUILTIN_GATHERSIV8SF); 691 692 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf", 693 V4SF_FTYPE_V4SF_PCFLOAT_V2DI_V4SF_INT, 694 IX86_BUILTIN_GATHERDIV4SF); 695 696 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4sf256", 697 V4SF_FTYPE_V4SF_PCFLOAT_V4DI_V4SF_INT, 698 IX86_BUILTIN_GATHERDIV8SF); 699 700 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv2di", 701 V2DI_FTYPE_V2DI_PCINT64_V4SI_V2DI_INT, 702 IX86_BUILTIN_GATHERSIV2DI); 703 704 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4di", 705 V4DI_FTYPE_V4DI_PCINT64_V4SI_V4DI_INT, 706 IX86_BUILTIN_GATHERSIV4DI); 707 708 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv2di", 709 V2DI_FTYPE_V2DI_PCINT64_V2DI_V2DI_INT, 710 IX86_BUILTIN_GATHERDIV2DI); 711 712 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4di", 713 V4DI_FTYPE_V4DI_PCINT64_V4DI_V4DI_INT, 714 IX86_BUILTIN_GATHERDIV4DI); 715 716 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv4si", 717 V4SI_FTYPE_V4SI_PCINT_V4SI_V4SI_INT, 718 IX86_BUILTIN_GATHERSIV4SI); 719 720 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gathersiv8si", 721 V8SI_FTYPE_V8SI_PCINT_V8SI_V8SI_INT, 722 IX86_BUILTIN_GATHERSIV8SI); 723 724 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si", 725 V4SI_FTYPE_V4SI_PCINT_V2DI_V4SI_INT, 726 IX86_BUILTIN_GATHERDIV4SI); 727 728 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatherdiv4si256", 729 V4SI_FTYPE_V4SI_PCINT_V4DI_V4SI_INT, 730 IX86_BUILTIN_GATHERDIV8SI); 731 732 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4df ", 733 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_V4DF_INT, 734 IX86_BUILTIN_GATHERALTSIV4DF); 735 736 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8sf ", 737 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_V8SF_INT, 738 IX86_BUILTIN_GATHERALTDIV8SF); 739 740 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltsiv4di ", 741 V4DI_FTYPE_V4DI_PCINT64_V8SI_V4DI_INT, 742 IX86_BUILTIN_GATHERALTSIV4DI); 743 744 def_builtin_pure (OPTION_MASK_ISA_AVX2, 0, "__builtin_ia32_gatheraltdiv8si ", 745 V8SI_FTYPE_V8SI_PCINT_V4DI_V8SI_INT, 746 IX86_BUILTIN_GATHERALTDIV8SI); 747 748 /* AVX512F */ 749 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16sf", 750 V16SF_FTYPE_V16SF_PCVOID_V16SI_HI_INT, 751 IX86_BUILTIN_GATHER3SIV16SF); 752 753 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8df", 754 V8DF_FTYPE_V8DF_PCVOID_V8SI_QI_INT, 755 IX86_BUILTIN_GATHER3SIV8DF); 756 757 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16sf", 758 V8SF_FTYPE_V8SF_PCVOID_V8DI_QI_INT, 759 IX86_BUILTIN_GATHER3DIV16SF); 760 761 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8df", 762 V8DF_FTYPE_V8DF_PCVOID_V8DI_QI_INT, 763 IX86_BUILTIN_GATHER3DIV8DF); 764 765 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv16si", 766 V16SI_FTYPE_V16SI_PCVOID_V16SI_HI_INT, 767 IX86_BUILTIN_GATHER3SIV16SI); 768 769 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gathersiv8di", 770 V8DI_FTYPE_V8DI_PCVOID_V8SI_QI_INT, 771 IX86_BUILTIN_GATHER3SIV8DI); 772 773 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv16si", 774 V8SI_FTYPE_V8SI_PCVOID_V8DI_QI_INT, 775 IX86_BUILTIN_GATHER3DIV16SI); 776 777 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gatherdiv8di", 778 V8DI_FTYPE_V8DI_PCVOID_V8DI_QI_INT, 779 IX86_BUILTIN_GATHER3DIV8DI); 780 781 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8df ", 782 V8DF_FTYPE_V8DF_PCDOUBLE_V16SI_QI_INT, 783 IX86_BUILTIN_GATHER3ALTSIV8DF); 784 785 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16sf ", 786 V16SF_FTYPE_V16SF_PCFLOAT_V8DI_HI_INT, 787 IX86_BUILTIN_GATHER3ALTDIV16SF); 788 789 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altsiv8di ", 790 V8DI_FTYPE_V8DI_PCINT64_V16SI_QI_INT, 791 IX86_BUILTIN_GATHER3ALTSIV8DI); 792 793 def_builtin_pure (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_gather3altdiv16si ", 794 V16SI_FTYPE_V16SI_PCINT_V8DI_HI_INT, 795 IX86_BUILTIN_GATHER3ALTDIV16SI); 796 797 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16sf", 798 VOID_FTYPE_PVOID_HI_V16SI_V16SF_INT, 799 IX86_BUILTIN_SCATTERSIV16SF); 800 801 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8df", 802 VOID_FTYPE_PVOID_QI_V8SI_V8DF_INT, 803 IX86_BUILTIN_SCATTERSIV8DF); 804 805 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16sf", 806 VOID_FTYPE_PVOID_QI_V8DI_V8SF_INT, 807 IX86_BUILTIN_SCATTERDIV16SF); 808 809 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8df", 810 VOID_FTYPE_PVOID_QI_V8DI_V8DF_INT, 811 IX86_BUILTIN_SCATTERDIV8DF); 812 813 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv16si", 814 VOID_FTYPE_PVOID_HI_V16SI_V16SI_INT, 815 IX86_BUILTIN_SCATTERSIV16SI); 816 817 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scattersiv8di", 818 VOID_FTYPE_PVOID_QI_V8SI_V8DI_INT, 819 IX86_BUILTIN_SCATTERSIV8DI); 820 821 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv16si", 822 VOID_FTYPE_PVOID_QI_V8DI_V8SI_INT, 823 IX86_BUILTIN_SCATTERDIV16SI); 824 825 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatterdiv8di", 826 VOID_FTYPE_PVOID_QI_V8DI_V8DI_INT, 827 IX86_BUILTIN_SCATTERDIV8DI); 828 829 /* AVX512VL */ 830 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2df", 831 V2DF_FTYPE_V2DF_PCVOID_V4SI_QI_INT, 832 IX86_BUILTIN_GATHER3SIV2DF); 833 834 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4df", 835 V4DF_FTYPE_V4DF_PCVOID_V4SI_QI_INT, 836 IX86_BUILTIN_GATHER3SIV4DF); 837 838 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2df", 839 V2DF_FTYPE_V2DF_PCVOID_V2DI_QI_INT, 840 IX86_BUILTIN_GATHER3DIV2DF); 841 842 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4df", 843 V4DF_FTYPE_V4DF_PCVOID_V4DI_QI_INT, 844 IX86_BUILTIN_GATHER3DIV4DF); 845 846 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4sf", 847 V4SF_FTYPE_V4SF_PCVOID_V4SI_QI_INT, 848 IX86_BUILTIN_GATHER3SIV4SF); 849 850 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8sf", 851 V8SF_FTYPE_V8SF_PCVOID_V8SI_QI_INT, 852 IX86_BUILTIN_GATHER3SIV8SF); 853 854 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4sf", 855 V4SF_FTYPE_V4SF_PCVOID_V2DI_QI_INT, 856 IX86_BUILTIN_GATHER3DIV4SF); 857 858 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8sf", 859 V4SF_FTYPE_V4SF_PCVOID_V4DI_QI_INT, 860 IX86_BUILTIN_GATHER3DIV8SF); 861 862 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv2di", 863 V2DI_FTYPE_V2DI_PCVOID_V4SI_QI_INT, 864 IX86_BUILTIN_GATHER3SIV2DI); 865 866 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4di", 867 V4DI_FTYPE_V4DI_PCVOID_V4SI_QI_INT, 868 IX86_BUILTIN_GATHER3SIV4DI); 869 870 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div2di", 871 V2DI_FTYPE_V2DI_PCVOID_V2DI_QI_INT, 872 IX86_BUILTIN_GATHER3DIV2DI); 873 874 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4di", 875 V4DI_FTYPE_V4DI_PCVOID_V4DI_QI_INT, 876 IX86_BUILTIN_GATHER3DIV4DI); 877 878 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv4si", 879 V4SI_FTYPE_V4SI_PCVOID_V4SI_QI_INT, 880 IX86_BUILTIN_GATHER3SIV4SI); 881 882 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3siv8si", 883 V8SI_FTYPE_V8SI_PCVOID_V8SI_QI_INT, 884 IX86_BUILTIN_GATHER3SIV8SI); 885 886 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div4si", 887 V4SI_FTYPE_V4SI_PCVOID_V2DI_QI_INT, 888 IX86_BUILTIN_GATHER3DIV4SI); 889 890 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3div8si", 891 V4SI_FTYPE_V4SI_PCVOID_V4DI_QI_INT, 892 IX86_BUILTIN_GATHER3DIV8SI); 893 894 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4df ", 895 V4DF_FTYPE_V4DF_PCDOUBLE_V8SI_QI_INT, 896 IX86_BUILTIN_GATHER3ALTSIV4DF); 897 898 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8sf ", 899 V8SF_FTYPE_V8SF_PCFLOAT_V4DI_QI_INT, 900 IX86_BUILTIN_GATHER3ALTDIV8SF); 901 902 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altsiv4di ", 903 V4DI_FTYPE_V4DI_PCINT64_V8SI_QI_INT, 904 IX86_BUILTIN_GATHER3ALTSIV4DI); 905 906 def_builtin_pure (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_gather3altdiv8si ", 907 V8SI_FTYPE_V8SI_PCINT_V4DI_QI_INT, 908 IX86_BUILTIN_GATHER3ALTDIV8SI); 909 910 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8sf", 911 VOID_FTYPE_PVOID_QI_V8SI_V8SF_INT, 912 IX86_BUILTIN_SCATTERSIV8SF); 913 914 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4sf", 915 VOID_FTYPE_PVOID_QI_V4SI_V4SF_INT, 916 IX86_BUILTIN_SCATTERSIV4SF); 917 918 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4df", 919 VOID_FTYPE_PVOID_QI_V4SI_V4DF_INT, 920 IX86_BUILTIN_SCATTERSIV4DF); 921 922 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2df", 923 VOID_FTYPE_PVOID_QI_V4SI_V2DF_INT, 924 IX86_BUILTIN_SCATTERSIV2DF); 925 926 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8sf", 927 VOID_FTYPE_PVOID_QI_V4DI_V4SF_INT, 928 IX86_BUILTIN_SCATTERDIV8SF); 929 930 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4sf", 931 VOID_FTYPE_PVOID_QI_V2DI_V4SF_INT, 932 IX86_BUILTIN_SCATTERDIV4SF); 933 934 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4df", 935 VOID_FTYPE_PVOID_QI_V4DI_V4DF_INT, 936 IX86_BUILTIN_SCATTERDIV4DF); 937 938 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2df", 939 VOID_FTYPE_PVOID_QI_V2DI_V2DF_INT, 940 IX86_BUILTIN_SCATTERDIV2DF); 941 942 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv8si", 943 VOID_FTYPE_PVOID_QI_V8SI_V8SI_INT, 944 IX86_BUILTIN_SCATTERSIV8SI); 945 946 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4si", 947 VOID_FTYPE_PVOID_QI_V4SI_V4SI_INT, 948 IX86_BUILTIN_SCATTERSIV4SI); 949 950 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv4di", 951 VOID_FTYPE_PVOID_QI_V4SI_V4DI_INT, 952 IX86_BUILTIN_SCATTERSIV4DI); 953 954 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scattersiv2di", 955 VOID_FTYPE_PVOID_QI_V4SI_V2DI_INT, 956 IX86_BUILTIN_SCATTERSIV2DI); 957 958 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv8si", 959 VOID_FTYPE_PVOID_QI_V4DI_V4SI_INT, 960 IX86_BUILTIN_SCATTERDIV8SI); 961 962 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4si", 963 VOID_FTYPE_PVOID_QI_V2DI_V4SI_INT, 964 IX86_BUILTIN_SCATTERDIV4SI); 965 966 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv4di", 967 VOID_FTYPE_PVOID_QI_V4DI_V4DI_INT, 968 IX86_BUILTIN_SCATTERDIV4DI); 969 970 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatterdiv2di", 971 VOID_FTYPE_PVOID_QI_V2DI_V2DI_INT, 972 IX86_BUILTIN_SCATTERDIV2DI); 973 974 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8df ", 975 VOID_FTYPE_PDOUBLE_QI_V16SI_V8DF_INT, 976 IX86_BUILTIN_SCATTERALTSIV8DF); 977 978 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16sf ", 979 VOID_FTYPE_PFLOAT_HI_V8DI_V16SF_INT, 980 IX86_BUILTIN_SCATTERALTDIV16SF); 981 982 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltsiv8di ", 983 VOID_FTYPE_PLONGLONG_QI_V16SI_V8DI_INT, 984 IX86_BUILTIN_SCATTERALTSIV8DI); 985 986 def_builtin (OPTION_MASK_ISA_AVX512F, 0, "__builtin_ia32_scatteraltdiv16si ", 987 VOID_FTYPE_PINT_HI_V8DI_V16SI_INT, 988 IX86_BUILTIN_SCATTERALTDIV16SI); 989 990 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4df ", 991 VOID_FTYPE_PDOUBLE_QI_V8SI_V4DF_INT, 992 IX86_BUILTIN_SCATTERALTSIV4DF); 993 994 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8sf ", 995 VOID_FTYPE_PFLOAT_QI_V4DI_V8SF_INT, 996 IX86_BUILTIN_SCATTERALTDIV8SF); 997 998 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv4di ", 999 VOID_FTYPE_PLONGLONG_QI_V8SI_V4DI_INT, 1000 IX86_BUILTIN_SCATTERALTSIV4DI); 1001 1002 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv8si ", 1003 VOID_FTYPE_PINT_QI_V4DI_V8SI_INT, 1004 IX86_BUILTIN_SCATTERALTDIV8SI); 1005 1006 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2df ", 1007 VOID_FTYPE_PDOUBLE_QI_V4SI_V2DF_INT, 1008 IX86_BUILTIN_SCATTERALTSIV2DF); 1009 1010 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4sf ", 1011 VOID_FTYPE_PFLOAT_QI_V2DI_V4SF_INT, 1012 IX86_BUILTIN_SCATTERALTDIV4SF); 1013 1014 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltsiv2di ", 1015 VOID_FTYPE_PLONGLONG_QI_V4SI_V2DI_INT, 1016 IX86_BUILTIN_SCATTERALTSIV2DI); 1017 1018 def_builtin (OPTION_MASK_ISA_AVX512VL, 0, "__builtin_ia32_scatteraltdiv4si ", 1019 VOID_FTYPE_PINT_QI_V2DI_V4SI_INT, 1020 IX86_BUILTIN_SCATTERALTDIV4SI); 1021 1022 /* AVX512PF */ 1023 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdpd", 1024 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT, 1025 IX86_BUILTIN_GATHERPFDPD); 1026 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfdps", 1027 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT, 1028 IX86_BUILTIN_GATHERPFDPS); 1029 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqpd", 1030 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT, 1031 IX86_BUILTIN_GATHERPFQPD); 1032 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_gatherpfqps", 1033 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT, 1034 IX86_BUILTIN_GATHERPFQPS); 1035 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdpd", 1036 VOID_FTYPE_QI_V8SI_PCVOID_INT_INT, 1037 IX86_BUILTIN_SCATTERPFDPD); 1038 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfdps", 1039 VOID_FTYPE_HI_V16SI_PCVOID_INT_INT, 1040 IX86_BUILTIN_SCATTERPFDPS); 1041 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqpd", 1042 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT, 1043 IX86_BUILTIN_SCATTERPFQPD); 1044 def_builtin (OPTION_MASK_ISA_AVX512PF, 0, "__builtin_ia32_scatterpfqps", 1045 VOID_FTYPE_QI_V8DI_PCVOID_INT_INT, 1046 IX86_BUILTIN_SCATTERPFQPS); 1047 1048 /* SHA */ 1049 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg1", 1050 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG1); 1051 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1msg2", 1052 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1MSG2); 1053 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1nexte", 1054 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA1NEXTE); 1055 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha1rnds4", 1056 V4SI_FTYPE_V4SI_V4SI_INT, IX86_BUILTIN_SHA1RNDS4); 1057 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg1", 1058 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG1); 1059 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256msg2", 1060 V4SI_FTYPE_V4SI_V4SI, IX86_BUILTIN_SHA256MSG2); 1061 def_builtin_const (OPTION_MASK_ISA_SHA, 0, "__builtin_ia32_sha256rnds2", 1062 V4SI_FTYPE_V4SI_V4SI_V4SI, IX86_BUILTIN_SHA256RNDS2); 1063 1064 /* RTM. */ 1065 def_builtin (OPTION_MASK_ISA_RTM, 0, "__builtin_ia32_xabort", 1066 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_XABORT); 1067 1068 /* MMX access to the vec_init patterns. */ 1069 def_builtin_const (OPTION_MASK_ISA_MMX, 0, 1070 "__builtin_ia32_vec_init_v2si", 1071 V2SI_FTYPE_INT_INT, IX86_BUILTIN_VEC_INIT_V2SI); 1072 1073 def_builtin_const (OPTION_MASK_ISA_MMX, 0, 1074 "__builtin_ia32_vec_init_v4hi", 1075 V4HI_FTYPE_HI_HI_HI_HI, 1076 IX86_BUILTIN_VEC_INIT_V4HI); 1077 1078 def_builtin_const (OPTION_MASK_ISA_MMX, 0, 1079 "__builtin_ia32_vec_init_v8qi", 1080 V8QI_FTYPE_QI_QI_QI_QI_QI_QI_QI_QI, 1081 IX86_BUILTIN_VEC_INIT_V8QI); 1082 1083 /* Access to the vec_extract patterns. */ 1084 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2df", 1085 DOUBLE_FTYPE_V2DF_INT, IX86_BUILTIN_VEC_EXT_V2DF); 1086 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v2di", 1087 DI_FTYPE_V2DI_INT, IX86_BUILTIN_VEC_EXT_V2DI); 1088 def_builtin_const (OPTION_MASK_ISA_SSE, 0, "__builtin_ia32_vec_ext_v4sf", 1089 FLOAT_FTYPE_V4SF_INT, IX86_BUILTIN_VEC_EXT_V4SF); 1090 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v4si", 1091 SI_FTYPE_V4SI_INT, IX86_BUILTIN_VEC_EXT_V4SI); 1092 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v8hi", 1093 HI_FTYPE_V8HI_INT, IX86_BUILTIN_VEC_EXT_V8HI); 1094 1095 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A 1096 /* As it uses V4HImode, we have to require -mmmx too. */ 1097 | OPTION_MASK_ISA_MMX, 0, 1098 "__builtin_ia32_vec_ext_v4hi", 1099 HI_FTYPE_V4HI_INT, IX86_BUILTIN_VEC_EXT_V4HI); 1100 1101 def_builtin_const (OPTION_MASK_ISA_MMX, 0, 1102 "__builtin_ia32_vec_ext_v2si", 1103 SI_FTYPE_V2SI_INT, IX86_BUILTIN_VEC_EXT_V2SI); 1104 1105 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_ext_v16qi", 1106 QI_FTYPE_V16QI_INT, IX86_BUILTIN_VEC_EXT_V16QI); 1107 1108 /* Access to the vec_set patterns. */ 1109 def_builtin_const (OPTION_MASK_ISA_SSE4_1 | OPTION_MASK_ISA_64BIT, 0, 1110 "__builtin_ia32_vec_set_v2di", 1111 V2DI_FTYPE_V2DI_DI_INT, IX86_BUILTIN_VEC_SET_V2DI); 1112 1113 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4sf", 1114 V4SF_FTYPE_V4SF_FLOAT_INT, IX86_BUILTIN_VEC_SET_V4SF); 1115 1116 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v4si", 1117 V4SI_FTYPE_V4SI_SI_INT, IX86_BUILTIN_VEC_SET_V4SI); 1118 1119 def_builtin_const (OPTION_MASK_ISA_SSE2, 0, "__builtin_ia32_vec_set_v8hi", 1120 V8HI_FTYPE_V8HI_HI_INT, IX86_BUILTIN_VEC_SET_V8HI); 1121 1122 def_builtin_const (OPTION_MASK_ISA_SSE | OPTION_MASK_ISA_3DNOW_A 1123 /* As it uses V4HImode, we have to require -mmmx too. */ 1124 | OPTION_MASK_ISA_MMX, 0, 1125 "__builtin_ia32_vec_set_v4hi", 1126 V4HI_FTYPE_V4HI_HI_INT, IX86_BUILTIN_VEC_SET_V4HI); 1127 1128 def_builtin_const (OPTION_MASK_ISA_SSE4_1, 0, "__builtin_ia32_vec_set_v16qi", 1129 V16QI_FTYPE_V16QI_QI_INT, IX86_BUILTIN_VEC_SET_V16QI); 1130 1131 /* RDSEED */ 1132 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_hi_step", 1133 INT_FTYPE_PUSHORT, IX86_BUILTIN_RDSEED16_STEP); 1134 def_builtin (OPTION_MASK_ISA_RDSEED, 0, "__builtin_ia32_rdseed_si_step", 1135 INT_FTYPE_PUNSIGNED, IX86_BUILTIN_RDSEED32_STEP); 1136 def_builtin (OPTION_MASK_ISA_RDSEED | OPTION_MASK_ISA_64BIT, 0, 1137 "__builtin_ia32_rdseed_di_step", 1138 INT_FTYPE_PULONGLONG, IX86_BUILTIN_RDSEED64_STEP); 1139 1140 /* ADCX */ 1141 def_builtin (0, 0, "__builtin_ia32_addcarryx_u32", 1142 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_ADDCARRYX32); 1143 def_builtin (OPTION_MASK_ISA_64BIT, 0, 1144 "__builtin_ia32_addcarryx_u64", 1145 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG, 1146 IX86_BUILTIN_ADDCARRYX64); 1147 1148 /* SBB */ 1149 def_builtin (0, 0, "__builtin_ia32_sbb_u32", 1150 UCHAR_FTYPE_UCHAR_UINT_UINT_PUNSIGNED, IX86_BUILTIN_SBB32); 1151 def_builtin (OPTION_MASK_ISA_64BIT, 0, 1152 "__builtin_ia32_sbb_u64", 1153 UCHAR_FTYPE_UCHAR_ULONGLONG_ULONGLONG_PULONGLONG, 1154 IX86_BUILTIN_SBB64); 1155 1156 /* Read/write FLAGS. */ 1157 if (TARGET_64BIT) 1158 { 1159 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_readeflags_u64", 1160 UINT64_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS); 1161 def_builtin (OPTION_MASK_ISA_64BIT, 0, "__builtin_ia32_writeeflags_u64", 1162 VOID_FTYPE_UINT64, IX86_BUILTIN_WRITE_FLAGS); 1163 } 1164 else 1165 { 1166 def_builtin (0, 0, "__builtin_ia32_readeflags_u32", 1167 UNSIGNED_FTYPE_VOID, IX86_BUILTIN_READ_FLAGS); 1168 def_builtin (0, 0, "__builtin_ia32_writeeflags_u32", 1169 VOID_FTYPE_UNSIGNED, IX86_BUILTIN_WRITE_FLAGS); 1170 } 1171 1172 /* CLFLUSHOPT. */ 1173 def_builtin (OPTION_MASK_ISA_CLFLUSHOPT, 0, "__builtin_ia32_clflushopt", 1174 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLFLUSHOPT); 1175 1176 /* CLWB. */ 1177 def_builtin (OPTION_MASK_ISA_CLWB, 0, "__builtin_ia32_clwb", 1178 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLWB); 1179 1180 /* MONITORX and MWAITX. */ 1181 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_monitorx", 1182 VOID_FTYPE_PCVOID_UNSIGNED_UNSIGNED, IX86_BUILTIN_MONITORX); 1183 def_builtin (0, OPTION_MASK_ISA2_MWAITX, "__builtin_ia32_mwaitx", 1184 VOID_FTYPE_UNSIGNED_UNSIGNED_UNSIGNED, IX86_BUILTIN_MWAITX); 1185 1186 /* CLZERO. */ 1187 def_builtin (0, OPTION_MASK_ISA2_CLZERO, "__builtin_ia32_clzero", 1188 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLZERO); 1189 1190 /* WAITPKG. */ 1191 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umonitor", 1192 VOID_FTYPE_PVOID, IX86_BUILTIN_UMONITOR); 1193 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_umwait", 1194 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_UMWAIT); 1195 def_builtin (0, OPTION_MASK_ISA2_WAITPKG, "__builtin_ia32_tpause", 1196 UINT8_FTYPE_UNSIGNED_UINT64, IX86_BUILTIN_TPAUSE); 1197 1198 /* CLDEMOTE. */ 1199 def_builtin (0, OPTION_MASK_ISA2_CLDEMOTE, "__builtin_ia32_cldemote", 1200 VOID_FTYPE_PCVOID, IX86_BUILTIN_CLDEMOTE); 1201 1202 /* Add FMA4 multi-arg argument instructions */ 1203 for (i = 0, d = bdesc_multi_arg; i < ARRAY_SIZE (bdesc_multi_arg); i++, d++) 1204 { 1205 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, i); 1206 if (d->name == 0) 1207 continue; 1208 1209 ftype = (enum ix86_builtin_func_type) d->flag; 1210 def_builtin_const (d->mask, d->mask2, d->name, ftype, d->code); 1211 } 1212 BDESC_VERIFYS (IX86_BUILTIN__BDESC_MULTI_ARG_LAST, 1213 IX86_BUILTIN__BDESC_MULTI_ARG_FIRST, 1214 ARRAY_SIZE (bdesc_multi_arg) - 1); 1215 1216 /* Add CET inrinsics. */ 1217 for (i = 0, d = bdesc_cet; i < ARRAY_SIZE (bdesc_cet); i++, d++) 1218 { 1219 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_FIRST, i); 1220 if (d->name == 0) 1221 continue; 1222 1223 ftype = (enum ix86_builtin_func_type) d->flag; 1224 def_builtin (d->mask, d->mask2, d->name, ftype, d->code); 1225 } 1226 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_LAST, 1227 IX86_BUILTIN__BDESC_CET_FIRST, 1228 ARRAY_SIZE (bdesc_cet) - 1); 1229 1230 for (i = 0, d = bdesc_cet_rdssp; 1231 i < ARRAY_SIZE (bdesc_cet_rdssp); 1232 i++, d++) 1233 { 1234 BDESC_VERIFY (d->code, IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, i); 1235 if (d->name == 0) 1236 continue; 1237 1238 ftype = (enum ix86_builtin_func_type) d->flag; 1239 def_builtin (d->mask, d->mask2, d->name, ftype, d->code); 1240 } 1241 BDESC_VERIFYS (IX86_BUILTIN__BDESC_CET_NORMAL_LAST, 1242 IX86_BUILTIN__BDESC_CET_NORMAL_FIRST, 1243 ARRAY_SIZE (bdesc_cet_rdssp) - 1); 1244 } 1245 1246 #undef BDESC_VERIFY 1247 #undef BDESC_VERIFYS 1248 1249 /* Make builtins to detect cpu type and features supported. NAME is 1250 the builtin name, CODE is the builtin code, and FTYPE is the function 1251 type of the builtin. */ 1252 1253 static void 1254 make_cpu_type_builtin (const char* name, int code, 1255 enum ix86_builtin_func_type ftype, bool is_const) 1256 { 1257 tree decl; 1258 tree type; 1259 1260 type = ix86_get_builtin_func_type (ftype); 1261 decl = add_builtin_function (name, type, code, BUILT_IN_MD, 1262 NULL, NULL_TREE); 1263 gcc_assert (decl != NULL_TREE); 1264 ix86_builtins[(int) code] = decl; 1265 TREE_READONLY (decl) = is_const; 1266 } 1267 1268 /* Make builtins to get CPU type and features supported. The created 1269 builtins are : 1270 1271 __builtin_cpu_init (), to detect cpu type and features, 1272 __builtin_cpu_is ("<CPUNAME>"), to check if cpu is of type <CPUNAME>, 1273 __builtin_cpu_supports ("<FEATURE>"), to check if cpu supports <FEATURE> 1274 */ 1275 1276 static void 1277 ix86_init_platform_type_builtins (void) 1278 { 1279 make_cpu_type_builtin ("__builtin_cpu_init", IX86_BUILTIN_CPU_INIT, 1280 INT_FTYPE_VOID, false); 1281 make_cpu_type_builtin ("__builtin_cpu_is", IX86_BUILTIN_CPU_IS, 1282 INT_FTYPE_PCCHAR, true); 1283 make_cpu_type_builtin ("__builtin_cpu_supports", IX86_BUILTIN_CPU_SUPPORTS, 1284 INT_FTYPE_PCCHAR, true); 1285 } 1286 1287 /* Internal method for ix86_init_builtins. */ 1288 1289 static void 1290 ix86_init_builtins_va_builtins_abi (void) 1291 { 1292 tree ms_va_ref, sysv_va_ref; 1293 tree fnvoid_va_end_ms, fnvoid_va_end_sysv; 1294 tree fnvoid_va_start_ms, fnvoid_va_start_sysv; 1295 tree fnvoid_va_copy_ms, fnvoid_va_copy_sysv; 1296 tree fnattr_ms = NULL_TREE, fnattr_sysv = NULL_TREE; 1297 1298 if (!TARGET_64BIT) 1299 return; 1300 fnattr_ms = build_tree_list (get_identifier ("ms_abi"), NULL_TREE); 1301 fnattr_sysv = build_tree_list (get_identifier ("sysv_abi"), NULL_TREE); 1302 ms_va_ref = build_reference_type (ms_va_list_type_node); 1303 sysv_va_ref = build_pointer_type (TREE_TYPE (sysv_va_list_type_node)); 1304 1305 fnvoid_va_end_ms = build_function_type_list (void_type_node, ms_va_ref, 1306 NULL_TREE); 1307 fnvoid_va_start_ms 1308 = build_varargs_function_type_list (void_type_node, ms_va_ref, NULL_TREE); 1309 fnvoid_va_end_sysv 1310 = build_function_type_list (void_type_node, sysv_va_ref, NULL_TREE); 1311 fnvoid_va_start_sysv 1312 = build_varargs_function_type_list (void_type_node, sysv_va_ref, 1313 NULL_TREE); 1314 fnvoid_va_copy_ms 1315 = build_function_type_list (void_type_node, ms_va_ref, 1316 ms_va_list_type_node, NULL_TREE); 1317 fnvoid_va_copy_sysv 1318 = build_function_type_list (void_type_node, sysv_va_ref, 1319 sysv_va_ref, NULL_TREE); 1320 1321 add_builtin_function ("__builtin_ms_va_start", fnvoid_va_start_ms, 1322 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_ms); 1323 add_builtin_function ("__builtin_ms_va_end", fnvoid_va_end_ms, 1324 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_ms); 1325 add_builtin_function ("__builtin_ms_va_copy", fnvoid_va_copy_ms, 1326 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_ms); 1327 add_builtin_function ("__builtin_sysv_va_start", fnvoid_va_start_sysv, 1328 BUILT_IN_VA_START, BUILT_IN_NORMAL, NULL, fnattr_sysv); 1329 add_builtin_function ("__builtin_sysv_va_end", fnvoid_va_end_sysv, 1330 BUILT_IN_VA_END, BUILT_IN_NORMAL, NULL, fnattr_sysv); 1331 add_builtin_function ("__builtin_sysv_va_copy", fnvoid_va_copy_sysv, 1332 BUILT_IN_VA_COPY, BUILT_IN_NORMAL, NULL, fnattr_sysv); 1333 } 1334 1335 static void 1336 ix86_init_builtin_types (void) 1337 { 1338 tree float80_type_node, const_string_type_node; 1339 1340 /* The __float80 type. */ 1341 float80_type_node = long_double_type_node; 1342 if (TYPE_MODE (float80_type_node) != XFmode) 1343 { 1344 if (float64x_type_node != NULL_TREE 1345 && TYPE_MODE (float64x_type_node) == XFmode) 1346 float80_type_node = float64x_type_node; 1347 else 1348 { 1349 /* The __float80 type. */ 1350 float80_type_node = make_node (REAL_TYPE); 1351 1352 TYPE_PRECISION (float80_type_node) = 80; 1353 layout_type (float80_type_node); 1354 } 1355 } 1356 lang_hooks.types.register_builtin_type (float80_type_node, "__float80"); 1357 1358 /* The __float128 type. The node has already been created as 1359 _Float128, so we only need to register the __float128 name for 1360 it. */ 1361 lang_hooks.types.register_builtin_type (float128_type_node, "__float128"); 1362 1363 const_string_type_node 1364 = build_pointer_type (build_qualified_type 1365 (char_type_node, TYPE_QUAL_CONST)); 1366 1367 /* This macro is built by i386-builtin-types.awk. */ 1368 DEFINE_BUILTIN_PRIMITIVE_TYPES; 1369 } 1370 1371 void 1372 ix86_init_builtins (void) 1373 { 1374 tree ftype, decl; 1375 1376 ix86_init_builtin_types (); 1377 1378 /* Builtins to get CPU type and features. */ 1379 ix86_init_platform_type_builtins (); 1380 1381 /* TFmode support builtins. */ 1382 def_builtin_const (0, 0, "__builtin_infq", 1383 FLOAT128_FTYPE_VOID, IX86_BUILTIN_INFQ); 1384 def_builtin_const (0, 0, "__builtin_huge_valq", 1385 FLOAT128_FTYPE_VOID, IX86_BUILTIN_HUGE_VALQ); 1386 1387 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_CONST_STRING); 1388 decl = add_builtin_function ("__builtin_nanq", ftype, IX86_BUILTIN_NANQ, 1389 BUILT_IN_MD, "nanq", NULL_TREE); 1390 TREE_READONLY (decl) = 1; 1391 ix86_builtins[(int) IX86_BUILTIN_NANQ] = decl; 1392 1393 decl = add_builtin_function ("__builtin_nansq", ftype, IX86_BUILTIN_NANSQ, 1394 BUILT_IN_MD, "nansq", NULL_TREE); 1395 TREE_READONLY (decl) = 1; 1396 ix86_builtins[(int) IX86_BUILTIN_NANSQ] = decl; 1397 1398 /* We will expand them to normal call if SSE isn't available since 1399 they are used by libgcc. */ 1400 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128); 1401 decl = add_builtin_function ("__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ, 1402 BUILT_IN_MD, "__fabstf2", NULL_TREE); 1403 TREE_READONLY (decl) = 1; 1404 ix86_builtins[(int) IX86_BUILTIN_FABSQ] = decl; 1405 1406 ftype = ix86_get_builtin_func_type (FLOAT128_FTYPE_FLOAT128_FLOAT128); 1407 decl = add_builtin_function ("__builtin_copysignq", ftype, 1408 IX86_BUILTIN_COPYSIGNQ, BUILT_IN_MD, 1409 "__copysigntf3", NULL_TREE); 1410 TREE_READONLY (decl) = 1; 1411 ix86_builtins[(int) IX86_BUILTIN_COPYSIGNQ] = decl; 1412 1413 ix86_init_tm_builtins (); 1414 ix86_init_mmx_sse_builtins (); 1415 1416 if (TARGET_LP64) 1417 ix86_init_builtins_va_builtins_abi (); 1418 1419 #ifdef SUBTARGET_INIT_BUILTINS 1420 SUBTARGET_INIT_BUILTINS; 1421 #endif 1422 } 1423 1424 /* Return the ix86 builtin for CODE. */ 1425 1426 tree 1427 ix86_builtin_decl (unsigned code, bool) 1428 { 1429 if (code >= IX86_BUILTIN_MAX) 1430 return error_mark_node; 1431 1432 return ix86_builtins[code]; 1433 } 1434 1435 /* This returns the target-specific builtin with code CODE if 1436 current_function_decl has visibility on this builtin, which is checked 1437 using isa flags. Returns NULL_TREE otherwise. */ 1438 1439 static tree ix86_get_builtin (enum ix86_builtins code) 1440 { 1441 struct cl_target_option *opts; 1442 tree target_tree = NULL_TREE; 1443 1444 /* Determine the isa flags of current_function_decl. */ 1445 1446 if (current_function_decl) 1447 target_tree = DECL_FUNCTION_SPECIFIC_TARGET (current_function_decl); 1448 1449 if (target_tree == NULL) 1450 target_tree = target_option_default_node; 1451 1452 opts = TREE_TARGET_OPTION (target_tree); 1453 1454 if ((ix86_builtins_isa[(int) code].isa & opts->x_ix86_isa_flags) 1455 || (ix86_builtins_isa[(int) code].isa2 & opts->x_ix86_isa_flags2)) 1456 return ix86_builtin_decl (code, true); 1457 else 1458 return NULL_TREE; 1459 } 1460 1461 /* Vectorization library interface and handlers. */ 1462 tree (*ix86_veclib_handler) (combined_fn, tree, tree); 1463 1464 /* Returns a function decl for a vectorized version of the combined function 1465 with combined_fn code FN and the result vector type TYPE, or NULL_TREE 1466 if it is not available. */ 1467 1468 tree 1469 ix86_builtin_vectorized_function (unsigned int fn, tree type_out, 1470 tree type_in) 1471 { 1472 machine_mode in_mode, out_mode; 1473 int in_n, out_n; 1474 1475 if (TREE_CODE (type_out) != VECTOR_TYPE 1476 || TREE_CODE (type_in) != VECTOR_TYPE) 1477 return NULL_TREE; 1478 1479 out_mode = TYPE_MODE (TREE_TYPE (type_out)); 1480 out_n = TYPE_VECTOR_SUBPARTS (type_out); 1481 in_mode = TYPE_MODE (TREE_TYPE (type_in)); 1482 in_n = TYPE_VECTOR_SUBPARTS (type_in); 1483 1484 switch (fn) 1485 { 1486 CASE_CFN_EXP2: 1487 if (out_mode == SFmode && in_mode == SFmode) 1488 { 1489 if (out_n == 16 && in_n == 16) 1490 return ix86_get_builtin (IX86_BUILTIN_EXP2PS); 1491 } 1492 break; 1493 1494 CASE_CFN_IFLOOR: 1495 CASE_CFN_LFLOOR: 1496 CASE_CFN_LLFLOOR: 1497 /* The round insn does not trap on denormals. */ 1498 if (flag_trapping_math || !TARGET_SSE4_1) 1499 break; 1500 1501 if (out_mode == SImode && in_mode == DFmode) 1502 { 1503 if (out_n == 4 && in_n == 2) 1504 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX); 1505 else if (out_n == 8 && in_n == 4) 1506 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX256); 1507 else if (out_n == 16 && in_n == 8) 1508 return ix86_get_builtin (IX86_BUILTIN_FLOORPD_VEC_PACK_SFIX512); 1509 } 1510 if (out_mode == SImode && in_mode == SFmode) 1511 { 1512 if (out_n == 4 && in_n == 4) 1513 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX); 1514 else if (out_n == 8 && in_n == 8) 1515 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX256); 1516 else if (out_n == 16 && in_n == 16) 1517 return ix86_get_builtin (IX86_BUILTIN_FLOORPS_SFIX512); 1518 } 1519 break; 1520 1521 CASE_CFN_ICEIL: 1522 CASE_CFN_LCEIL: 1523 CASE_CFN_LLCEIL: 1524 /* The round insn does not trap on denormals. */ 1525 if (flag_trapping_math || !TARGET_SSE4_1) 1526 break; 1527 1528 if (out_mode == SImode && in_mode == DFmode) 1529 { 1530 if (out_n == 4 && in_n == 2) 1531 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX); 1532 else if (out_n == 8 && in_n == 4) 1533 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX256); 1534 else if (out_n == 16 && in_n == 8) 1535 return ix86_get_builtin (IX86_BUILTIN_CEILPD_VEC_PACK_SFIX512); 1536 } 1537 if (out_mode == SImode && in_mode == SFmode) 1538 { 1539 if (out_n == 4 && in_n == 4) 1540 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX); 1541 else if (out_n == 8 && in_n == 8) 1542 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX256); 1543 else if (out_n == 16 && in_n == 16) 1544 return ix86_get_builtin (IX86_BUILTIN_CEILPS_SFIX512); 1545 } 1546 break; 1547 1548 CASE_CFN_IRINT: 1549 CASE_CFN_LRINT: 1550 CASE_CFN_LLRINT: 1551 if (out_mode == SImode && in_mode == DFmode) 1552 { 1553 if (out_n == 4 && in_n == 2) 1554 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX); 1555 else if (out_n == 8 && in_n == 4) 1556 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX256); 1557 else if (out_n == 16 && in_n == 8) 1558 return ix86_get_builtin (IX86_BUILTIN_VEC_PACK_SFIX512); 1559 } 1560 if (out_mode == SImode && in_mode == SFmode) 1561 { 1562 if (out_n == 4 && in_n == 4) 1563 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ); 1564 else if (out_n == 8 && in_n == 8) 1565 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ256); 1566 else if (out_n == 16 && in_n == 16) 1567 return ix86_get_builtin (IX86_BUILTIN_CVTPS2DQ512); 1568 } 1569 break; 1570 1571 CASE_CFN_IROUND: 1572 CASE_CFN_LROUND: 1573 CASE_CFN_LLROUND: 1574 /* The round insn does not trap on denormals. */ 1575 if (flag_trapping_math || !TARGET_SSE4_1) 1576 break; 1577 1578 if (out_mode == SImode && in_mode == DFmode) 1579 { 1580 if (out_n == 4 && in_n == 2) 1581 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX); 1582 else if (out_n == 8 && in_n == 4) 1583 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX256); 1584 else if (out_n == 16 && in_n == 8) 1585 return ix86_get_builtin (IX86_BUILTIN_ROUNDPD_AZ_VEC_PACK_SFIX512); 1586 } 1587 if (out_mode == SImode && in_mode == SFmode) 1588 { 1589 if (out_n == 4 && in_n == 4) 1590 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX); 1591 else if (out_n == 8 && in_n == 8) 1592 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX256); 1593 else if (out_n == 16 && in_n == 16) 1594 return ix86_get_builtin (IX86_BUILTIN_ROUNDPS_AZ_SFIX512); 1595 } 1596 break; 1597 1598 CASE_CFN_FLOOR: 1599 /* The round insn does not trap on denormals. */ 1600 if (flag_trapping_math || !TARGET_SSE4_1) 1601 break; 1602 1603 if (out_mode == DFmode && in_mode == DFmode) 1604 { 1605 if (out_n == 2 && in_n == 2) 1606 return ix86_get_builtin (IX86_BUILTIN_FLOORPD); 1607 else if (out_n == 4 && in_n == 4) 1608 return ix86_get_builtin (IX86_BUILTIN_FLOORPD256); 1609 else if (out_n == 8 && in_n == 8) 1610 return ix86_get_builtin (IX86_BUILTIN_FLOORPD512); 1611 } 1612 if (out_mode == SFmode && in_mode == SFmode) 1613 { 1614 if (out_n == 4 && in_n == 4) 1615 return ix86_get_builtin (IX86_BUILTIN_FLOORPS); 1616 else if (out_n == 8 && in_n == 8) 1617 return ix86_get_builtin (IX86_BUILTIN_FLOORPS256); 1618 else if (out_n == 16 && in_n == 16) 1619 return ix86_get_builtin (IX86_BUILTIN_FLOORPS512); 1620 } 1621 break; 1622 1623 CASE_CFN_CEIL: 1624 /* The round insn does not trap on denormals. */ 1625 if (flag_trapping_math || !TARGET_SSE4_1) 1626 break; 1627 1628 if (out_mode == DFmode && in_mode == DFmode) 1629 { 1630 if (out_n == 2 && in_n == 2) 1631 return ix86_get_builtin (IX86_BUILTIN_CEILPD); 1632 else if (out_n == 4 && in_n == 4) 1633 return ix86_get_builtin (IX86_BUILTIN_CEILPD256); 1634 else if (out_n == 8 && in_n == 8) 1635 return ix86_get_builtin (IX86_BUILTIN_CEILPD512); 1636 } 1637 if (out_mode == SFmode && in_mode == SFmode) 1638 { 1639 if (out_n == 4 && in_n == 4) 1640 return ix86_get_builtin (IX86_BUILTIN_CEILPS); 1641 else if (out_n == 8 && in_n == 8) 1642 return ix86_get_builtin (IX86_BUILTIN_CEILPS256); 1643 else if (out_n == 16 && in_n == 16) 1644 return ix86_get_builtin (IX86_BUILTIN_CEILPS512); 1645 } 1646 break; 1647 1648 CASE_CFN_TRUNC: 1649 /* The round insn does not trap on denormals. */ 1650 if (flag_trapping_math || !TARGET_SSE4_1) 1651 break; 1652 1653 if (out_mode == DFmode && in_mode == DFmode) 1654 { 1655 if (out_n == 2 && in_n == 2) 1656 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD); 1657 else if (out_n == 4 && in_n == 4) 1658 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD256); 1659 else if (out_n == 8 && in_n == 8) 1660 return ix86_get_builtin (IX86_BUILTIN_TRUNCPD512); 1661 } 1662 if (out_mode == SFmode && in_mode == SFmode) 1663 { 1664 if (out_n == 4 && in_n == 4) 1665 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS); 1666 else if (out_n == 8 && in_n == 8) 1667 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS256); 1668 else if (out_n == 16 && in_n == 16) 1669 return ix86_get_builtin (IX86_BUILTIN_TRUNCPS512); 1670 } 1671 break; 1672 1673 CASE_CFN_FMA: 1674 if (out_mode == DFmode && in_mode == DFmode) 1675 { 1676 if (out_n == 2 && in_n == 2) 1677 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD); 1678 if (out_n == 4 && in_n == 4) 1679 return ix86_get_builtin (IX86_BUILTIN_VFMADDPD256); 1680 } 1681 if (out_mode == SFmode && in_mode == SFmode) 1682 { 1683 if (out_n == 4 && in_n == 4) 1684 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS); 1685 if (out_n == 8 && in_n == 8) 1686 return ix86_get_builtin (IX86_BUILTIN_VFMADDPS256); 1687 } 1688 break; 1689 1690 default: 1691 break; 1692 } 1693 1694 /* Dispatch to a handler for a vectorization library. */ 1695 if (ix86_veclib_handler) 1696 return ix86_veclib_handler (combined_fn (fn), type_out, type_in); 1697 1698 return NULL_TREE; 1699 } 1700 1701 /* Returns a decl of a function that implements gather load with 1702 memory type MEM_VECTYPE and index type INDEX_VECTYPE and SCALE. 1703 Return NULL_TREE if it is not available. */ 1704 1705 tree 1706 ix86_vectorize_builtin_gather (const_tree mem_vectype, 1707 const_tree index_type, int scale) 1708 { 1709 bool si; 1710 enum ix86_builtins code; 1711 1712 if (! TARGET_AVX2 || !TARGET_USE_GATHER) 1713 return NULL_TREE; 1714 1715 if ((TREE_CODE (index_type) != INTEGER_TYPE 1716 && !POINTER_TYPE_P (index_type)) 1717 || (TYPE_MODE (index_type) != SImode 1718 && TYPE_MODE (index_type) != DImode)) 1719 return NULL_TREE; 1720 1721 if (TYPE_PRECISION (index_type) > POINTER_SIZE) 1722 return NULL_TREE; 1723 1724 /* v*gather* insn sign extends index to pointer mode. */ 1725 if (TYPE_PRECISION (index_type) < POINTER_SIZE 1726 && TYPE_UNSIGNED (index_type)) 1727 return NULL_TREE; 1728 1729 if (scale <= 0 1730 || scale > 8 1731 || (scale & (scale - 1)) != 0) 1732 return NULL_TREE; 1733 1734 si = TYPE_MODE (index_type) == SImode; 1735 switch (TYPE_MODE (mem_vectype)) 1736 { 1737 case E_V2DFmode: 1738 if (TARGET_AVX512VL) 1739 code = si ? IX86_BUILTIN_GATHER3SIV2DF : IX86_BUILTIN_GATHER3DIV2DF; 1740 else 1741 code = si ? IX86_BUILTIN_GATHERSIV2DF : IX86_BUILTIN_GATHERDIV2DF; 1742 break; 1743 case E_V4DFmode: 1744 if (TARGET_AVX512VL) 1745 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DF : IX86_BUILTIN_GATHER3DIV4DF; 1746 else 1747 code = si ? IX86_BUILTIN_GATHERALTSIV4DF : IX86_BUILTIN_GATHERDIV4DF; 1748 break; 1749 case E_V2DImode: 1750 if (TARGET_AVX512VL) 1751 code = si ? IX86_BUILTIN_GATHER3SIV2DI : IX86_BUILTIN_GATHER3DIV2DI; 1752 else 1753 code = si ? IX86_BUILTIN_GATHERSIV2DI : IX86_BUILTIN_GATHERDIV2DI; 1754 break; 1755 case E_V4DImode: 1756 if (TARGET_AVX512VL) 1757 code = si ? IX86_BUILTIN_GATHER3ALTSIV4DI : IX86_BUILTIN_GATHER3DIV4DI; 1758 else 1759 code = si ? IX86_BUILTIN_GATHERALTSIV4DI : IX86_BUILTIN_GATHERDIV4DI; 1760 break; 1761 case E_V4SFmode: 1762 if (TARGET_AVX512VL) 1763 code = si ? IX86_BUILTIN_GATHER3SIV4SF : IX86_BUILTIN_GATHER3DIV4SF; 1764 else 1765 code = si ? IX86_BUILTIN_GATHERSIV4SF : IX86_BUILTIN_GATHERDIV4SF; 1766 break; 1767 case E_V8SFmode: 1768 if (TARGET_AVX512VL) 1769 code = si ? IX86_BUILTIN_GATHER3SIV8SF : IX86_BUILTIN_GATHER3ALTDIV8SF; 1770 else 1771 code = si ? IX86_BUILTIN_GATHERSIV8SF : IX86_BUILTIN_GATHERALTDIV8SF; 1772 break; 1773 case E_V4SImode: 1774 if (TARGET_AVX512VL) 1775 code = si ? IX86_BUILTIN_GATHER3SIV4SI : IX86_BUILTIN_GATHER3DIV4SI; 1776 else 1777 code = si ? IX86_BUILTIN_GATHERSIV4SI : IX86_BUILTIN_GATHERDIV4SI; 1778 break; 1779 case E_V8SImode: 1780 if (TARGET_AVX512VL) 1781 code = si ? IX86_BUILTIN_GATHER3SIV8SI : IX86_BUILTIN_GATHER3ALTDIV8SI; 1782 else 1783 code = si ? IX86_BUILTIN_GATHERSIV8SI : IX86_BUILTIN_GATHERALTDIV8SI; 1784 break; 1785 case E_V8DFmode: 1786 if (TARGET_AVX512F) 1787 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DF : IX86_BUILTIN_GATHER3DIV8DF; 1788 else 1789 return NULL_TREE; 1790 break; 1791 case E_V8DImode: 1792 if (TARGET_AVX512F) 1793 code = si ? IX86_BUILTIN_GATHER3ALTSIV8DI : IX86_BUILTIN_GATHER3DIV8DI; 1794 else 1795 return NULL_TREE; 1796 break; 1797 case E_V16SFmode: 1798 if (TARGET_AVX512F) 1799 code = si ? IX86_BUILTIN_GATHER3SIV16SF : IX86_BUILTIN_GATHER3ALTDIV16SF; 1800 else 1801 return NULL_TREE; 1802 break; 1803 case E_V16SImode: 1804 if (TARGET_AVX512F) 1805 code = si ? IX86_BUILTIN_GATHER3SIV16SI : IX86_BUILTIN_GATHER3ALTDIV16SI; 1806 else 1807 return NULL_TREE; 1808 break; 1809 default: 1810 return NULL_TREE; 1811 } 1812 1813 return ix86_get_builtin (code); 1814 } 1815 1816 /* Returns a code for a target-specific builtin that implements 1817 reciprocal of the function, or NULL_TREE if not available. */ 1818 1819 tree 1820 ix86_builtin_reciprocal (tree fndecl) 1821 { 1822 enum ix86_builtins fn_code 1823 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl); 1824 switch (fn_code) 1825 { 1826 /* Vectorized version of sqrt to rsqrt conversion. */ 1827 case IX86_BUILTIN_SQRTPS_NR: 1828 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR); 1829 1830 case IX86_BUILTIN_SQRTPS_NR256: 1831 return ix86_get_builtin (IX86_BUILTIN_RSQRTPS_NR256); 1832 1833 default: 1834 return NULL_TREE; 1835 } 1836 } 1837 1838 /* This is the order of bit-fields in __processor_features in cpuinfo.c */ 1839 enum processor_features 1840 { 1841 F_CMOV = 0, 1842 F_MMX, 1843 F_POPCNT, 1844 F_SSE, 1845 F_SSE2, 1846 F_SSE3, 1847 F_SSSE3, 1848 F_SSE4_1, 1849 F_SSE4_2, 1850 F_AVX, 1851 F_AVX2, 1852 F_SSE4_A, 1853 F_FMA4, 1854 F_XOP, 1855 F_FMA, 1856 F_AVX512F, 1857 F_BMI, 1858 F_BMI2, 1859 F_AES, 1860 F_PCLMUL, 1861 F_AVX512VL, 1862 F_AVX512BW, 1863 F_AVX512DQ, 1864 F_AVX512CD, 1865 F_AVX512ER, 1866 F_AVX512PF, 1867 F_AVX512VBMI, 1868 F_AVX512IFMA, 1869 F_AVX5124VNNIW, 1870 F_AVX5124FMAPS, 1871 F_AVX512VPOPCNTDQ, 1872 F_AVX512VBMI2, 1873 F_GFNI, 1874 F_VPCLMULQDQ, 1875 F_AVX512VNNI, 1876 F_AVX512BITALG, 1877 F_AVX512BF16, 1878 F_AVX512VP2INTERSECT, 1879 F_MAX 1880 }; 1881 1882 /* These are the target attribute strings for which a dispatcher is 1883 available, from fold_builtin_cpu. */ 1884 struct _isa_names_table 1885 { 1886 const char *const name; 1887 const enum processor_features feature; 1888 const enum feature_priority priority; 1889 }; 1890 1891 static const _isa_names_table isa_names_table[] = 1892 { 1893 {"cmov", F_CMOV, P_NONE}, 1894 {"mmx", F_MMX, P_MMX}, 1895 {"popcnt", F_POPCNT, P_POPCNT}, 1896 {"sse", F_SSE, P_SSE}, 1897 {"sse2", F_SSE2, P_SSE2}, 1898 {"sse3", F_SSE3, P_SSE3}, 1899 {"ssse3", F_SSSE3, P_SSSE3}, 1900 {"sse4a", F_SSE4_A, P_SSE4_A}, 1901 {"sse4.1", F_SSE4_1, P_SSE4_1}, 1902 {"sse4.2", F_SSE4_2, P_SSE4_2}, 1903 {"avx", F_AVX, P_AVX}, 1904 {"fma4", F_FMA4, P_FMA4}, 1905 {"xop", F_XOP, P_XOP}, 1906 {"fma", F_FMA, P_FMA}, 1907 {"avx2", F_AVX2, P_AVX2}, 1908 {"avx512f", F_AVX512F, P_AVX512F}, 1909 {"bmi", F_BMI, P_BMI}, 1910 {"bmi2", F_BMI2, P_BMI2}, 1911 {"aes", F_AES, P_AES}, 1912 {"pclmul", F_PCLMUL, P_PCLMUL}, 1913 {"avx512vl",F_AVX512VL, P_NONE}, 1914 {"avx512bw",F_AVX512BW, P_NONE}, 1915 {"avx512dq",F_AVX512DQ, P_NONE}, 1916 {"avx512cd",F_AVX512CD, P_NONE}, 1917 {"avx512er",F_AVX512ER, P_NONE}, 1918 {"avx512pf",F_AVX512PF, P_NONE}, 1919 {"avx512vbmi",F_AVX512VBMI, P_NONE}, 1920 {"avx512ifma",F_AVX512IFMA, P_NONE}, 1921 {"avx5124vnniw",F_AVX5124VNNIW, P_NONE}, 1922 {"avx5124fmaps",F_AVX5124FMAPS, P_NONE}, 1923 {"avx512vpopcntdq",F_AVX512VPOPCNTDQ, P_NONE}, 1924 {"avx512vbmi2", F_AVX512VBMI2, P_NONE}, 1925 {"gfni", F_GFNI, P_NONE}, 1926 {"vpclmulqdq", F_VPCLMULQDQ, P_NONE}, 1927 {"avx512vnni", F_AVX512VNNI, P_NONE}, 1928 {"avx512bitalg", F_AVX512BITALG, P_NONE}, 1929 {"avx512bf16", F_AVX512BF16, P_NONE}, 1930 {"avx512vp2intersect",F_AVX512VP2INTERSECT, P_NONE} 1931 }; 1932 1933 /* This parses the attribute arguments to target in DECL and determines 1934 the right builtin to use to match the platform specification. 1935 It returns the priority value for this version decl. If PREDICATE_LIST 1936 is not NULL, it stores the list of cpu features that need to be checked 1937 before dispatching this function. */ 1938 1939 unsigned int 1940 get_builtin_code_for_version (tree decl, tree *predicate_list) 1941 { 1942 tree attrs; 1943 struct cl_target_option cur_target; 1944 tree target_node; 1945 struct cl_target_option *new_target; 1946 const char *arg_str = NULL; 1947 const char *attrs_str = NULL; 1948 char *tok_str = NULL; 1949 char *token; 1950 1951 enum feature_priority priority = P_NONE; 1952 1953 static unsigned int NUM_FEATURES 1954 = sizeof (isa_names_table) / sizeof (_isa_names_table); 1955 1956 unsigned int i; 1957 1958 tree predicate_chain = NULL_TREE; 1959 tree predicate_decl, predicate_arg; 1960 1961 attrs = lookup_attribute ("target", DECL_ATTRIBUTES (decl)); 1962 gcc_assert (attrs != NULL); 1963 1964 attrs = TREE_VALUE (TREE_VALUE (attrs)); 1965 1966 gcc_assert (TREE_CODE (attrs) == STRING_CST); 1967 attrs_str = TREE_STRING_POINTER (attrs); 1968 1969 /* Return priority zero for default function. */ 1970 if (strcmp (attrs_str, "default") == 0) 1971 return 0; 1972 1973 /* Handle arch= if specified. For priority, set it to be 1 more than 1974 the best instruction set the processor can handle. For instance, if 1975 there is a version for atom and a version for ssse3 (the highest ISA 1976 priority for atom), the atom version must be checked for dispatch 1977 before the ssse3 version. */ 1978 if (strstr (attrs_str, "arch=") != NULL) 1979 { 1980 cl_target_option_save (&cur_target, &global_options); 1981 target_node 1982 = ix86_valid_target_attribute_tree (decl, attrs, &global_options, 1983 &global_options_set, 0); 1984 1985 gcc_assert (target_node); 1986 if (target_node == error_mark_node) 1987 return 0; 1988 new_target = TREE_TARGET_OPTION (target_node); 1989 gcc_assert (new_target); 1990 1991 if (new_target->arch_specified && new_target->arch > 0) 1992 for (i = 0; i < (unsigned int) pta_size; i++) 1993 if (processor_alias_table[i].processor == new_target->arch) 1994 { 1995 const pta *arch_info = &processor_alias_table[i]; 1996 switch (arch_info->priority) 1997 { 1998 default: 1999 arg_str = arch_info->name; 2000 priority = arch_info->priority; 2001 break; 2002 case P_PROC_DYNAMIC: 2003 switch (new_target->arch) 2004 { 2005 case PROCESSOR_NEHALEM: 2006 if (TARGET_PCLMUL_P (new_target->x_ix86_isa_flags)) 2007 { 2008 arg_str = "westmere"; 2009 priority = P_PCLMUL; 2010 } 2011 else 2012 { 2013 /* We translate "arch=corei7" and "arch=nehalem" 2014 to "corei7" so that it will be mapped to 2015 M_INTEL_COREI7 as cpu type to cover all 2016 M_INTEL_COREI7_XXXs. */ 2017 arg_str = "corei7"; 2018 priority = P_PROC_SSE4_2; 2019 } 2020 break; 2021 case PROCESSOR_SANDYBRIDGE: 2022 if (TARGET_F16C_P (new_target->x_ix86_isa_flags)) 2023 arg_str = "ivybridge"; 2024 else 2025 arg_str = "sandybridge"; 2026 priority = P_PROC_AVX; 2027 break; 2028 case PROCESSOR_HASWELL: 2029 if (TARGET_ADX_P (new_target->x_ix86_isa_flags)) 2030 arg_str = "broadwell"; 2031 else 2032 arg_str = "haswell"; 2033 priority = P_PROC_AVX2; 2034 break; 2035 case PROCESSOR_AMDFAM10: 2036 arg_str = "amdfam10h"; 2037 priority = P_PROC_SSE4_A; 2038 break; 2039 default: 2040 gcc_unreachable (); 2041 } 2042 break; 2043 case P_NONE: 2044 break; 2045 } 2046 break; 2047 } 2048 2049 cl_target_option_restore (&global_options, &cur_target); 2050 2051 if (predicate_list && arg_str == NULL) 2052 { 2053 error_at (DECL_SOURCE_LOCATION (decl), 2054 "no dispatcher found for the versioning attributes"); 2055 return 0; 2056 } 2057 2058 if (predicate_list) 2059 { 2060 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_IS]; 2061 /* For a C string literal the length includes the trailing NULL. */ 2062 predicate_arg = build_string_literal (strlen (arg_str) + 1, arg_str); 2063 predicate_chain = tree_cons (predicate_decl, predicate_arg, 2064 predicate_chain); 2065 } 2066 } 2067 2068 /* Process feature name. */ 2069 tok_str = (char *) xmalloc (strlen (attrs_str) + 1); 2070 strcpy (tok_str, attrs_str); 2071 token = strtok (tok_str, ","); 2072 predicate_decl = ix86_builtins [(int) IX86_BUILTIN_CPU_SUPPORTS]; 2073 2074 while (token != NULL) 2075 { 2076 /* Do not process "arch=" */ 2077 if (strncmp (token, "arch=", 5) == 0) 2078 { 2079 token = strtok (NULL, ","); 2080 continue; 2081 } 2082 for (i = 0; i < NUM_FEATURES; ++i) 2083 { 2084 if (strcmp (token, isa_names_table[i].name) == 0) 2085 { 2086 if (predicate_list) 2087 { 2088 predicate_arg = build_string_literal ( 2089 strlen (isa_names_table[i].name) + 1, 2090 isa_names_table[i].name); 2091 predicate_chain = tree_cons (predicate_decl, predicate_arg, 2092 predicate_chain); 2093 } 2094 /* Find the maximum priority feature. */ 2095 if (isa_names_table[i].priority > priority) 2096 priority = isa_names_table[i].priority; 2097 2098 break; 2099 } 2100 } 2101 if (predicate_list && priority == P_NONE) 2102 { 2103 error_at (DECL_SOURCE_LOCATION (decl), 2104 "ISA %qs is not supported in %<target%> attribute, " 2105 "use %<arch=%> syntax", token); 2106 return 0; 2107 } 2108 token = strtok (NULL, ","); 2109 } 2110 free (tok_str); 2111 2112 if (predicate_list && predicate_chain == NULL_TREE) 2113 { 2114 error_at (DECL_SOURCE_LOCATION (decl), 2115 "no dispatcher found for the versioning attributes: %s", 2116 attrs_str); 2117 return 0; 2118 } 2119 else if (predicate_list) 2120 { 2121 predicate_chain = nreverse (predicate_chain); 2122 *predicate_list = predicate_chain; 2123 } 2124 2125 return priority; 2126 } 2127 2128 /* This builds the processor_model struct type defined in 2129 libgcc/config/i386/cpuinfo.c */ 2130 2131 static tree 2132 build_processor_model_struct (void) 2133 { 2134 const char *field_name[] = {"__cpu_vendor", "__cpu_type", "__cpu_subtype", 2135 "__cpu_features"}; 2136 tree field = NULL_TREE, field_chain = NULL_TREE; 2137 int i; 2138 tree type = make_node (RECORD_TYPE); 2139 2140 /* The first 3 fields are unsigned int. */ 2141 for (i = 0; i < 3; ++i) 2142 { 2143 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL, 2144 get_identifier (field_name[i]), unsigned_type_node); 2145 if (field_chain != NULL_TREE) 2146 DECL_CHAIN (field) = field_chain; 2147 field_chain = field; 2148 } 2149 2150 /* The last field is an array of unsigned integers of size one. */ 2151 field = build_decl (UNKNOWN_LOCATION, FIELD_DECL, 2152 get_identifier (field_name[3]), 2153 build_array_type (unsigned_type_node, 2154 build_index_type (size_one_node))); 2155 if (field_chain != NULL_TREE) 2156 DECL_CHAIN (field) = field_chain; 2157 field_chain = field; 2158 2159 finish_builtin_struct (type, "__processor_model", field_chain, NULL_TREE); 2160 return type; 2161 } 2162 2163 /* Returns a extern, comdat VAR_DECL of type TYPE and name NAME. */ 2164 2165 static tree 2166 make_var_decl (tree type, const char *name) 2167 { 2168 tree new_decl; 2169 2170 new_decl = build_decl (UNKNOWN_LOCATION, 2171 VAR_DECL, 2172 get_identifier(name), 2173 type); 2174 2175 DECL_EXTERNAL (new_decl) = 1; 2176 TREE_STATIC (new_decl) = 1; 2177 TREE_PUBLIC (new_decl) = 1; 2178 DECL_INITIAL (new_decl) = 0; 2179 DECL_ARTIFICIAL (new_decl) = 0; 2180 DECL_PRESERVE_P (new_decl) = 1; 2181 2182 make_decl_one_only (new_decl, DECL_ASSEMBLER_NAME (new_decl)); 2183 assemble_variable (new_decl, 0, 0, 0); 2184 2185 return new_decl; 2186 } 2187 2188 /* FNDECL is a __builtin_cpu_is or a __builtin_cpu_supports call that is folded 2189 into an integer defined in libgcc/config/i386/cpuinfo.c */ 2190 2191 tree 2192 fold_builtin_cpu (tree fndecl, tree *args) 2193 { 2194 unsigned int i; 2195 enum ix86_builtins fn_code 2196 = (enum ix86_builtins) DECL_MD_FUNCTION_CODE (fndecl); 2197 tree param_string_cst = NULL; 2198 2199 tree __processor_model_type = build_processor_model_struct (); 2200 tree __cpu_model_var = make_var_decl (__processor_model_type, 2201 "__cpu_model"); 2202 2203 2204 varpool_node::add (__cpu_model_var); 2205 2206 gcc_assert ((args != NULL) && (*args != NULL)); 2207 2208 param_string_cst = *args; 2209 while (param_string_cst 2210 && TREE_CODE (param_string_cst) != STRING_CST) 2211 { 2212 /* *args must be a expr that can contain other EXPRS leading to a 2213 STRING_CST. */ 2214 if (!EXPR_P (param_string_cst)) 2215 { 2216 error ("parameter to builtin must be a string constant or literal"); 2217 return integer_zero_node; 2218 } 2219 param_string_cst = TREE_OPERAND (EXPR_CHECK (param_string_cst), 0); 2220 } 2221 2222 gcc_assert (param_string_cst); 2223 2224 if (fn_code == IX86_BUILTIN_CPU_IS) 2225 { 2226 tree ref; 2227 tree field; 2228 tree final; 2229 2230 unsigned int field_val = 0; 2231 2232 for (i = 0; i < num_arch_names; i++) 2233 if (processor_alias_table[i].model != 0 2234 && strcmp (processor_alias_table[i].name, 2235 TREE_STRING_POINTER (param_string_cst)) == 0) 2236 break; 2237 2238 if (i == num_arch_names) 2239 { 2240 error ("parameter to builtin not valid: %s", 2241 TREE_STRING_POINTER (param_string_cst)); 2242 return integer_zero_node; 2243 } 2244 2245 field = TYPE_FIELDS (__processor_model_type); 2246 field_val = processor_alias_table[i].model; 2247 2248 /* CPU types are stored in the next field. */ 2249 if (field_val > M_CPU_TYPE_START 2250 && field_val < M_CPU_SUBTYPE_START) 2251 { 2252 field = DECL_CHAIN (field); 2253 field_val -= M_CPU_TYPE_START; 2254 } 2255 2256 /* CPU subtypes are stored in the next field. */ 2257 if (field_val > M_CPU_SUBTYPE_START) 2258 { 2259 field = DECL_CHAIN ( DECL_CHAIN (field)); 2260 field_val -= M_CPU_SUBTYPE_START; 2261 } 2262 2263 /* Get the appropriate field in __cpu_model. */ 2264 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var, 2265 field, NULL_TREE); 2266 2267 /* Check the value. */ 2268 final = build2 (EQ_EXPR, unsigned_type_node, ref, 2269 build_int_cstu (unsigned_type_node, field_val)); 2270 return build1 (CONVERT_EXPR, integer_type_node, final); 2271 } 2272 else if (fn_code == IX86_BUILTIN_CPU_SUPPORTS) 2273 { 2274 tree ref; 2275 tree array_elt; 2276 tree field; 2277 tree final; 2278 2279 unsigned int field_val = 0; 2280 unsigned int NUM_ISA_NAMES 2281 = sizeof (isa_names_table) / sizeof (struct _isa_names_table); 2282 2283 for (i = 0; i < NUM_ISA_NAMES; i++) 2284 if (strcmp (isa_names_table[i].name, 2285 TREE_STRING_POINTER (param_string_cst)) == 0) 2286 break; 2287 2288 if (i == NUM_ISA_NAMES) 2289 { 2290 error ("parameter to builtin not valid: %s", 2291 TREE_STRING_POINTER (param_string_cst)); 2292 return integer_zero_node; 2293 } 2294 2295 if (isa_names_table[i].feature >= 32) 2296 { 2297 tree __cpu_features2_var = make_var_decl (unsigned_type_node, 2298 "__cpu_features2"); 2299 2300 varpool_node::add (__cpu_features2_var); 2301 field_val = (1U << (isa_names_table[i].feature - 32)); 2302 /* Return __cpu_features2 & field_val */ 2303 final = build2 (BIT_AND_EXPR, unsigned_type_node, 2304 __cpu_features2_var, 2305 build_int_cstu (unsigned_type_node, field_val)); 2306 return build1 (CONVERT_EXPR, integer_type_node, final); 2307 } 2308 2309 field = TYPE_FIELDS (__processor_model_type); 2310 /* Get the last field, which is __cpu_features. */ 2311 while (DECL_CHAIN (field)) 2312 field = DECL_CHAIN (field); 2313 2314 /* Get the appropriate field: __cpu_model.__cpu_features */ 2315 ref = build3 (COMPONENT_REF, TREE_TYPE (field), __cpu_model_var, 2316 field, NULL_TREE); 2317 2318 /* Access the 0th element of __cpu_features array. */ 2319 array_elt = build4 (ARRAY_REF, unsigned_type_node, ref, 2320 integer_zero_node, NULL_TREE, NULL_TREE); 2321 2322 field_val = (1U << isa_names_table[i].feature); 2323 /* Return __cpu_model.__cpu_features[0] & field_val */ 2324 final = build2 (BIT_AND_EXPR, unsigned_type_node, array_elt, 2325 build_int_cstu (unsigned_type_node, field_val)); 2326 if (isa_names_table[i].feature == (INT_TYPE_SIZE - 1)) 2327 return build2 (NE_EXPR, integer_type_node, final, 2328 build_int_cst (unsigned_type_node, 0)); 2329 else 2330 return build1 (CONVERT_EXPR, integer_type_node, final); 2331 } 2332 gcc_unreachable (); 2333 } 2334 2335 #include "gt-i386-builtins.h" 2336