1;; Constraint definitions for IA-32 and x86-64. 2;; Copyright (C) 2006-2013 Free Software Foundation, Inc. 3;; 4;; This file is part of GCC. 5;; 6;; GCC is free software; you can redistribute it and/or modify 7;; it under the terms of the GNU General Public License as published by 8;; the Free Software Foundation; either version 3, or (at your option) 9;; any later version. 10;; 11;; GCC is distributed in the hope that it will be useful, 12;; but WITHOUT ANY WARRANTY; without even the implied warranty of 13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14;; GNU General Public License for more details. 15;; 16;; You should have received a copy of the GNU General Public License 17;; along with GCC; see the file COPYING3. If not see 18;; <http://www.gnu.org/licenses/>. 19 20;;; Unused letters: 21;;; B H T 22;;; h jk v 23 24;; Integer register constraints. 25;; It is not necessary to define 'r' here. 26(define_register_constraint "R" "LEGACY_REGS" 27 "Legacy register---the eight integer registers available on all 28 i386 processors (@code{a}, @code{b}, @code{c}, @code{d}, 29 @code{si}, @code{di}, @code{bp}, @code{sp}).") 30 31(define_register_constraint "q" "TARGET_64BIT ? GENERAL_REGS : Q_REGS" 32 "Any register accessible as @code{@var{r}l}. In 32-bit mode, @code{a}, 33 @code{b}, @code{c}, and @code{d}; in 64-bit mode, any integer register.") 34 35(define_register_constraint "Q" "Q_REGS" 36 "Any register accessible as @code{@var{r}h}: @code{a}, @code{b}, 37 @code{c}, and @code{d}.") 38 39(define_register_constraint "l" "INDEX_REGS" 40 "@internal Any register that can be used as the index in a base+index 41 memory access: that is, any general register except the stack pointer.") 42 43(define_register_constraint "a" "AREG" 44 "The @code{a} register.") 45 46(define_register_constraint "b" "BREG" 47 "The @code{b} register.") 48 49(define_register_constraint "c" "CREG" 50 "The @code{c} register.") 51 52(define_register_constraint "d" "DREG" 53 "The @code{d} register.") 54 55(define_register_constraint "S" "SIREG" 56 "The @code{si} register.") 57 58(define_register_constraint "D" "DIREG" 59 "The @code{di} register.") 60 61(define_register_constraint "A" "AD_REGS" 62 "The @code{a} and @code{d} registers, as a pair (for instructions 63 that return half the result in one and half in the other).") 64 65(define_register_constraint "U" "CLOBBERED_REGS" 66 "The call-clobbered integer registers.") 67 68;; Floating-point register constraints. 69(define_register_constraint "f" 70 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FLOAT_REGS : NO_REGS" 71 "Any 80387 floating-point (stack) register.") 72 73(define_register_constraint "t" 74 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_TOP_REG : NO_REGS" 75 "Top of 80387 floating-point stack (@code{%st(0)}).") 76 77(define_register_constraint "u" 78 "TARGET_80387 || TARGET_FLOAT_RETURNS_IN_80387 ? FP_SECOND_REG : NO_REGS" 79 "Second from top of 80387 floating-point stack (@code{%st(1)}).") 80 81;; Vector registers (also used for plain floating point nowadays). 82(define_register_constraint "y" "TARGET_MMX ? MMX_REGS : NO_REGS" 83 "Any MMX register.") 84 85(define_register_constraint "x" "TARGET_SSE ? SSE_REGS : NO_REGS" 86 "Any SSE register.") 87 88;; We use the Y prefix to denote any number of conditional register sets: 89;; z First SSE register. 90;; i SSE2 inter-unit moves enabled 91;; m MMX inter-unit moves enabled 92;; a Integer register when zero extensions with AND are disabled 93;; p Integer register when TARGET_PARTIAL_REG_STALL is disabled 94;; d Integer register when integer DFmode moves are enabled 95;; x Integer register when integer XFmode moves are enabled 96;; f x87 register when 80387 floating point arithmetic is enabled 97 98(define_register_constraint "Yz" "TARGET_SSE ? SSE_FIRST_REG : NO_REGS" 99 "First SSE register (@code{%xmm0}).") 100 101(define_register_constraint "Yi" 102 "TARGET_SSE2 && TARGET_INTER_UNIT_MOVES ? SSE_REGS : NO_REGS" 103 "@internal Any SSE register, when SSE2 and inter-unit moves are enabled.") 104 105(define_register_constraint "Ym" 106 "TARGET_MMX && TARGET_INTER_UNIT_MOVES ? MMX_REGS : NO_REGS" 107 "@internal Any MMX register, when inter-unit moves are enabled.") 108 109(define_register_constraint "Yp" 110 "TARGET_PARTIAL_REG_STALL ? NO_REGS : GENERAL_REGS" 111 "@internal Any integer register when TARGET_PARTIAL_REG_STALL is disabled.") 112 113(define_register_constraint "Ya" 114 "TARGET_ZERO_EXTEND_WITH_AND && optimize_function_for_speed_p (cfun) 115 ? NO_REGS : GENERAL_REGS" 116 "@internal Any integer register when zero extensions with AND are disabled.") 117 118(define_register_constraint "Yd" 119 "(TARGET_64BIT 120 || (TARGET_INTEGER_DFMODE_MOVES && optimize_function_for_speed_p (cfun))) 121 ? GENERAL_REGS : NO_REGS" 122 "@internal Any integer register when integer DFmode moves are enabled.") 123 124(define_register_constraint "Yx" 125 "optimize_function_for_speed_p (cfun) ? GENERAL_REGS : NO_REGS" 126 "@internal Any integer register when integer XFmode moves are enabled.") 127 128(define_register_constraint "Yf" 129 "(ix86_fpmath & FPMATH_387) ? FLOAT_REGS : NO_REGS" 130 "@internal Any x87 register when 80387 FP arithmetic is enabled.") 131 132(define_constraint "z" 133 "@internal Constant call address operand." 134 (match_operand 0 "constant_call_address_operand")) 135 136(define_constraint "w" 137 "@internal Call memory operand." 138 (and (not (match_test "TARGET_X32")) 139 (match_operand 0 "memory_operand"))) 140 141;; Integer constant constraints. 142(define_constraint "I" 143 "Integer constant in the range 0 @dots{} 31, for 32-bit shifts." 144 (and (match_code "const_int") 145 (match_test "IN_RANGE (ival, 0, 31)"))) 146 147(define_constraint "J" 148 "Integer constant in the range 0 @dots{} 63, for 64-bit shifts." 149 (and (match_code "const_int") 150 (match_test "IN_RANGE (ival, 0, 63)"))) 151 152(define_constraint "K" 153 "Signed 8-bit integer constant." 154 (and (match_code "const_int") 155 (match_test "IN_RANGE (ival, -128, 127)"))) 156 157(define_constraint "L" 158 "@code{0xFF}, @code{0xFFFF} or @code{0xFFFFFFFF} 159 for AND as a zero-extending move." 160 (and (match_code "const_int") 161 (match_test "ival == 0xff || ival == 0xffff 162 || ival == (HOST_WIDE_INT) 0xffffffff"))) 163 164(define_constraint "M" 165 "0, 1, 2, or 3 (shifts for the @code{lea} instruction)." 166 (and (match_code "const_int") 167 (match_test "IN_RANGE (ival, 0, 3)"))) 168 169(define_constraint "N" 170 "Unsigned 8-bit integer constant (for @code{in} and @code{out} 171 instructions)." 172 (and (match_code "const_int") 173 (match_test "IN_RANGE (ival, 0, 255)"))) 174 175(define_constraint "O" 176 "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts." 177 (and (match_code "const_int") 178 (match_test "IN_RANGE (ival, 0, 127)"))) 179 180;; Floating-point constant constraints. 181;; We allow constants even if TARGET_80387 isn't set, because the 182;; stack register converter may need to load 0.0 into the function 183;; value register (top of stack). 184(define_constraint "G" 185 "Standard 80387 floating point constant." 186 (and (match_code "const_double") 187 (match_test "standard_80387_constant_p (op) > 0"))) 188 189;; This can theoretically be any mode's CONST0_RTX. 190(define_constraint "C" 191 "Standard SSE floating point constant." 192 (match_test "standard_sse_constant_p (op)")) 193 194;; Constant-or-symbol-reference constraints. 195 196(define_constraint "e" 197 "32-bit signed integer constant, or a symbolic reference known 198 to fit that range (for immediate operands in sign-extending x86-64 199 instructions)." 200 (match_operand 0 "x86_64_immediate_operand")) 201 202;; We use W prefix to denote any number of 203;; constant-or-symbol-reference constraints 204 205(define_constraint "Wz" 206 "32-bit unsigned integer constant, or a symbolic reference known 207 to fit that range (for zero-extending conversion operations that 208 require non-VOIDmode immediate operands)." 209 (and (match_operand 0 "x86_64_zext_immediate_operand") 210 (match_test "GET_MODE (op) != VOIDmode"))) 211 212(define_constraint "Z" 213 "32-bit unsigned integer constant, or a symbolic reference known 214 to fit that range (for immediate operands in zero-extending x86-64 215 instructions)." 216 (match_operand 0 "x86_64_zext_immediate_operand")) 217