1 /* Target macros for the FRV port of GCC. 2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2007, 2008, 2009 3 Free Software Foundation, Inc. 4 Contributed by Red Hat Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it 9 under the terms of the GNU General Public License as published 10 by the Free Software Foundation; either version 3, or (at your 11 option) any later version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 #ifndef __FRV_H__ 23 #define __FRV_H__ 24 25 /* Frv general purpose macros. */ 26 /* Align an address. */ 27 #define ADDR_ALIGN(addr,align) (((addr) + (align) - 1) & ~((align) - 1)) 28 29 /* Return true if a value is inside a range. */ 30 #define IN_RANGE_P(VALUE, LOW, HIGH) \ 31 ( (((HOST_WIDE_INT)(VALUE)) >= (HOST_WIDE_INT)(LOW)) \ 32 && (((HOST_WIDE_INT)(VALUE)) <= ((HOST_WIDE_INT)(HIGH)))) 33 34 35 /* Driver configuration. */ 36 37 /* A C expression which determines whether the option `-CHAR' takes arguments. 38 The value should be the number of arguments that option takes-zero, for many 39 options. 40 41 By default, this macro is defined to handle the standard options properly. 42 You need not define it unless you wish to add additional options which take 43 arguments. 44 45 Defined in svr4.h. */ 46 #undef SWITCH_TAKES_ARG 47 #define SWITCH_TAKES_ARG(CHAR) \ 48 (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G') 49 50 /* A C expression which determines whether the option `-NAME' takes arguments. 51 The value should be the number of arguments that option takes-zero, for many 52 options. This macro rather than `SWITCH_TAKES_ARG' is used for 53 multi-character option names. 54 55 By default, this macro is defined as `DEFAULT_WORD_SWITCH_TAKES_ARG', which 56 handles the standard options properly. You need not define 57 `WORD_SWITCH_TAKES_ARG' unless you wish to add additional options which take 58 arguments. Any redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and 59 then check for additional options. 60 61 Defined in svr4.h. */ 62 #undef WORD_SWITCH_TAKES_ARG 63 64 /* -fpic and -fPIC used to imply the -mlibrary-pic multilib, but with 65 FDPIC which multilib to use depends on whether FDPIC is in use or 66 not. The trick we use is to introduce -multilib-library-pic as a 67 pseudo-flag that selects the library-pic multilib, and map fpic 68 and fPIC to it only if fdpic is not selected. Also, if fdpic is 69 selected and no PIC/PIE options are present, we imply -fPIE. 70 Otherwise, if -fpic or -fPIC are enabled and we're optimizing for 71 speed, or if we have -On with n>=3, enable inlining of PLTs. As 72 for -mgprel-ro, we want to enable it by default, but not for -fpic or 73 -fpie. */ 74 75 #define DRIVER_SELF_SPECS SUBTARGET_DRIVER_SELF_SPECS \ 76 "%{mno-pack:\ 77 %{!mhard-float:-msoft-float}\ 78 %{!mmedia:-mno-media}}\ 79 %{!mfdpic:%{fpic|fPIC: -multilib-library-pic}}\ 80 %{mfdpic:%{!fpic:%{!fpie:%{!fPIC:%{!fPIE:\ 81 %{!fno-pic:%{!fno-pie:%{!fno-PIC:%{!fno-PIE:-fPIE}}}}}}}} \ 82 %{!mno-inline-plt:%{O*:%{!O0:%{!Os:%{fpic|fPIC:-minline-plt} \ 83 %{!fpic:%{!fPIC:%{!O:%{!O1:%{!O2:-minline-plt}}}}}}}}} \ 84 %{!mno-gprel-ro:%{!fpic:%{!fpie:-mgprel-ro}}}} \ 85 " 86 #ifndef SUBTARGET_DRIVER_SELF_SPECS 87 # define SUBTARGET_DRIVER_SELF_SPECS 88 #endif 89 90 /* A C string constant that tells the GCC driver program options to pass to 91 the assembler. It can also specify how to translate options you give to GNU 92 CC into options for GCC to pass to the assembler. See the file `sun3.h' 93 for an example of this. 94 95 Do not define this macro if it does not need to do anything. 96 97 Defined in svr4.h. */ 98 #undef ASM_SPEC 99 #define ASM_SPEC "\ 100 %{G*} %{v} %{n} %{T} %{Ym,*} %{Yd,*} %{Wa,*:%*} \ 101 %{mtomcat-stats} \ 102 %{!mno-eflags: \ 103 %{mcpu=*} \ 104 %{mgpr-*} %{mfpr-*} \ 105 %{msoft-float} %{mhard-float} \ 106 %{mdword} %{mno-dword} \ 107 %{mdouble} %{mno-double} \ 108 %{mmedia} %{mno-media} \ 109 %{mmuladd} %{mno-muladd} \ 110 %{mpack} %{mno-pack} \ 111 %{mno-fdpic:-mnopic} %{mfdpic} \ 112 %{fpic|fpie: -mpic} %{fPIC|fPIE: -mPIC} %{mlibrary-pic}}" 113 114 /* Another C string constant used much like `LINK_SPEC'. The difference 115 between the two is that `STARTFILE_SPEC' is used at the very beginning of 116 the command given to the linker. 117 118 If this macro is not defined, a default is provided that loads the standard 119 C startup file from the usual place. See `gcc.c'. 120 121 Defined in svr4.h. */ 122 #undef STARTFILE_SPEC 123 #define STARTFILE_SPEC "crt0%O%s frvbegin%O%s" 124 125 /* Another C string constant used much like `LINK_SPEC'. The difference 126 between the two is that `ENDFILE_SPEC' is used at the very end of the 127 command given to the linker. 128 129 Do not define this macro if it does not need to do anything. 130 131 Defined in svr4.h. */ 132 #undef ENDFILE_SPEC 133 #define ENDFILE_SPEC "frvend%O%s" 134 135 136 #define MASK_DEFAULT_FRV \ 137 (MASK_MEDIA \ 138 | MASK_DOUBLE \ 139 | MASK_MULADD \ 140 | MASK_DWORD \ 141 | MASK_PACK) 142 143 #define MASK_DEFAULT_FR500 \ 144 (MASK_MEDIA | MASK_DWORD | MASK_PACK) 145 146 #define MASK_DEFAULT_FR550 \ 147 (MASK_MEDIA | MASK_DWORD | MASK_PACK) 148 149 #define MASK_DEFAULT_FR450 \ 150 (MASK_GPR_32 \ 151 | MASK_FPR_32 \ 152 | MASK_MEDIA \ 153 | MASK_SOFT_FLOAT \ 154 | MASK_DWORD \ 155 | MASK_PACK) 156 157 #define MASK_DEFAULT_FR400 \ 158 (MASK_GPR_32 \ 159 | MASK_FPR_32 \ 160 | MASK_MEDIA \ 161 | MASK_ACC_4 \ 162 | MASK_SOFT_FLOAT \ 163 | MASK_DWORD \ 164 | MASK_PACK) 165 166 #define MASK_DEFAULT_SIMPLE \ 167 (MASK_GPR_32 | MASK_SOFT_FLOAT) 168 169 /* A C string constant that tells the GCC driver program options to pass to 170 `cc1'. It can also specify how to translate options you give to GCC into 171 options for GCC to pass to the `cc1'. 172 173 Do not define this macro if it does not need to do anything. */ 174 /* For ABI compliance, we need to put bss data into the normal data section. */ 175 #define CC1_SPEC "%{G*}" 176 177 /* A C string constant that tells the GCC driver program options to pass to 178 the linker. It can also specify how to translate options you give to GCC 179 into options for GCC to pass to the linker. 180 181 Do not define this macro if it does not need to do anything. 182 183 Defined in svr4.h. */ 184 /* Override the svr4.h version with one that dispenses without the svr4 185 shared library options, notably -G. */ 186 #undef LINK_SPEC 187 #define LINK_SPEC "\ 188 %{h*} %{v:-V} \ 189 %{b} \ 190 %{mfdpic:-melf32frvfd -z text} \ 191 %{static:-dn -Bstatic} \ 192 %{shared:-Bdynamic} \ 193 %{symbolic:-Bsymbolic} \ 194 %{G*} \ 195 %{YP,*} \ 196 %{Qy:} %{!Qn:-Qy}" 197 198 /* Another C string constant used much like `LINK_SPEC'. The difference 199 between the two is that `LIB_SPEC' is used at the end of the command given 200 to the linker. 201 202 If this macro is not defined, a default is provided that loads the standard 203 C library from the usual place. See `gcc.c'. 204 205 Defined in svr4.h. */ 206 207 #undef LIB_SPEC 208 #define LIB_SPEC "--start-group -lc -lsim --end-group" 209 210 #ifndef CPU_TYPE 211 #define CPU_TYPE FRV_CPU_FR500 212 #endif 213 214 /* Run-time target specifications */ 215 216 #define TARGET_CPU_CPP_BUILTINS() \ 217 do \ 218 { \ 219 int issue_rate; \ 220 \ 221 builtin_define ("__frv__"); \ 222 builtin_assert ("machine=frv"); \ 223 \ 224 issue_rate = frv_issue_rate (); \ 225 if (issue_rate > 1) \ 226 builtin_define_with_int_value ("__FRV_VLIW__", issue_rate); \ 227 builtin_define_with_int_value ("__FRV_GPR__", NUM_GPRS); \ 228 builtin_define_with_int_value ("__FRV_FPR__", NUM_FPRS); \ 229 builtin_define_with_int_value ("__FRV_ACC__", NUM_ACCS); \ 230 \ 231 switch (frv_cpu_type) \ 232 { \ 233 case FRV_CPU_GENERIC: \ 234 builtin_define ("__CPU_GENERIC__"); \ 235 break; \ 236 case FRV_CPU_FR550: \ 237 builtin_define ("__CPU_FR550__"); \ 238 break; \ 239 case FRV_CPU_FR500: \ 240 case FRV_CPU_TOMCAT: \ 241 builtin_define ("__CPU_FR500__"); \ 242 break; \ 243 case FRV_CPU_FR450: \ 244 builtin_define ("__CPU_FR450__"); \ 245 break; \ 246 case FRV_CPU_FR405: \ 247 builtin_define ("__CPU_FR405__"); \ 248 break; \ 249 case FRV_CPU_FR400: \ 250 builtin_define ("__CPU_FR400__"); \ 251 break; \ 252 case FRV_CPU_FR300: \ 253 case FRV_CPU_SIMPLE: \ 254 builtin_define ("__CPU_FR300__"); \ 255 break; \ 256 } \ 257 \ 258 if (TARGET_HARD_FLOAT) \ 259 builtin_define ("__FRV_HARD_FLOAT__"); \ 260 if (TARGET_DWORD) \ 261 builtin_define ("__FRV_DWORD__"); \ 262 if (TARGET_FDPIC) \ 263 builtin_define ("__FRV_FDPIC__"); \ 264 if (flag_leading_underscore > 0) \ 265 builtin_define ("__FRV_UNDERSCORE__"); \ 266 } \ 267 while (0) 268 269 270 #define TARGET_HAS_FPRS (TARGET_HARD_FLOAT || TARGET_MEDIA) 271 272 #define NUM_GPRS (TARGET_GPR_32? 32 : 64) 273 #define NUM_FPRS (!TARGET_HAS_FPRS? 0 : TARGET_FPR_32? 32 : 64) 274 #define NUM_ACCS (!TARGET_MEDIA? 0 : TARGET_ACC_4? 4 : 8) 275 276 /* X is a valid accumulator number if (X & ACC_MASK) == X. */ 277 #define ACC_MASK \ 278 (!TARGET_MEDIA ? 0 \ 279 : TARGET_ACC_4 ? 3 \ 280 : frv_cpu_type == FRV_CPU_FR450 ? 11 \ 281 : 7) 282 283 /* Macros to identify the blend of media instructions available. Revision 1 284 is the one found on the FR500. Revision 2 includes the changes made for 285 the FR400. 286 287 Treat the generic processor as a revision 1 machine for now, for 288 compatibility with earlier releases. */ 289 290 #define TARGET_MEDIA_REV1 \ 291 (TARGET_MEDIA \ 292 && (frv_cpu_type == FRV_CPU_GENERIC \ 293 || frv_cpu_type == FRV_CPU_FR500)) 294 295 #define TARGET_MEDIA_REV2 \ 296 (TARGET_MEDIA \ 297 && (frv_cpu_type == FRV_CPU_FR400 \ 298 || frv_cpu_type == FRV_CPU_FR405 \ 299 || frv_cpu_type == FRV_CPU_FR450 \ 300 || frv_cpu_type == FRV_CPU_FR550)) 301 302 #define TARGET_MEDIA_FR450 \ 303 (frv_cpu_type == FRV_CPU_FR450) 304 305 #define TARGET_FR500_FR550_BUILTINS \ 306 (frv_cpu_type == FRV_CPU_FR500 \ 307 || frv_cpu_type == FRV_CPU_FR550) 308 309 #define TARGET_FR405_BUILTINS \ 310 (frv_cpu_type == FRV_CPU_FR405 \ 311 || frv_cpu_type == FRV_CPU_FR450) 312 313 #ifndef HAVE_AS_TLS 314 #define HAVE_AS_TLS 0 315 #endif 316 317 /* This macro is a C statement to print on `stderr' a string describing the 318 particular machine description choice. Every machine description should 319 define `TARGET_VERSION'. For example: 320 321 #ifdef MOTOROLA 322 #define TARGET_VERSION \ 323 fprintf (stderr, " (68k, Motorola syntax)"); 324 #else 325 #define TARGET_VERSION \ 326 fprintf (stderr, " (68k, MIT syntax)"); 327 #endif */ 328 #define TARGET_VERSION fprintf (stderr, _(" (frv)")) 329 330 /* Sometimes certain combinations of command options do not make sense on a 331 particular target machine. You can define a macro `OVERRIDE_OPTIONS' to 332 take account of this. This macro, if defined, is executed once just after 333 all the command options have been parsed. 334 335 Don't use this macro to turn on various extra optimizations for `-O'. That 336 is what `OPTIMIZATION_OPTIONS' is for. */ 337 338 #define OVERRIDE_OPTIONS frv_override_options () 339 340 /* Some machines may desire to change what optimizations are performed for 341 various optimization levels. This macro, if defined, is executed once just 342 after the optimization level is determined and before the remainder of the 343 command options have been parsed. Values set in this macro are used as the 344 default values for the other command line options. 345 346 LEVEL is the optimization level specified; 2 if `-O2' is specified, 1 if 347 `-O' is specified, and 0 if neither is specified. 348 349 SIZE is nonzero if `-Os' is specified, 0 otherwise. 350 351 You should not use this macro to change options that are not 352 machine-specific. These should uniformly selected by the same optimization 353 level on all supported machines. Use this macro to enable machine-specific 354 optimizations. 355 356 *Do not examine `write_symbols' in this macro!* The debugging options are 357 *not supposed to alter the generated code. */ 358 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) frv_optimization_options (LEVEL, SIZE) 359 360 361 /* Define this macro if debugging can be performed even without a frame 362 pointer. If this macro is defined, GCC will turn on the 363 `-fomit-frame-pointer' option whenever `-O' is specified. */ 364 /* Frv needs a specific frame layout that includes the frame pointer. */ 365 366 #define CAN_DEBUG_WITHOUT_FP 367 368 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) (TARGET_ALIGN_LABELS ? 3 : 0) 369 370 /* Small Data Area Support. */ 371 /* Maximum size of variables that go in .sdata/.sbss. 372 The -msdata=foo switch also controls how small variables are handled. */ 373 #ifndef SDATA_DEFAULT_SIZE 374 #define SDATA_DEFAULT_SIZE 8 375 #endif 376 377 378 /* Storage Layout */ 379 380 /* Define this macro to have the value 1 if the most significant bit in a byte 381 has the lowest number; otherwise define it to have the value zero. This 382 means that bit-field instructions count from the most significant bit. If 383 the machine has no bit-field instructions, then this must still be defined, 384 but it doesn't matter which value it is defined to. This macro need not be 385 a constant. 386 387 This macro does not affect the way structure fields are packed into bytes or 388 words; that is controlled by `BYTES_BIG_ENDIAN'. */ 389 #define BITS_BIG_ENDIAN 1 390 391 /* Define this macro to have the value 1 if the most significant byte in a word 392 has the lowest number. This macro need not be a constant. */ 393 #define BYTES_BIG_ENDIAN 1 394 395 /* Define this macro to have the value 1 if, in a multiword object, the most 396 significant word has the lowest number. This applies to both memory 397 locations and registers; GCC fundamentally assumes that the order of 398 words in memory is the same as the order in registers. This macro need not 399 be a constant. */ 400 #define WORDS_BIG_ENDIAN 1 401 402 /* Number of storage units in a word; normally 4. */ 403 #define UNITS_PER_WORD 4 404 405 /* A macro to update MODE and UNSIGNEDP when an object whose type is TYPE and 406 which has the specified mode and signedness is to be stored in a register. 407 This macro is only called when TYPE is a scalar type. 408 409 On most RISC machines, which only have operations that operate on a full 410 register, define this macro to set M to `word_mode' if M is an integer mode 411 narrower than `BITS_PER_WORD'. In most cases, only integer modes should be 412 widened because wider-precision floating-point operations are usually more 413 expensive than their narrower counterparts. 414 415 For most machines, the macro definition does not change UNSIGNEDP. However, 416 some machines, have instructions that preferentially handle either signed or 417 unsigned quantities of certain modes. For example, on the DEC Alpha, 32-bit 418 loads from memory and 32-bit add instructions sign-extend the result to 64 419 bits. On such machines, set UNSIGNEDP according to which kind of extension 420 is more efficient. 421 422 Do not define this macro if it would never modify MODE. */ 423 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE) \ 424 do \ 425 { \ 426 if (GET_MODE_CLASS (MODE) == MODE_INT \ 427 && GET_MODE_SIZE (MODE) < 4) \ 428 (MODE) = SImode; \ 429 } \ 430 while (0) 431 432 /* Normal alignment required for function parameters on the stack, in bits. 433 All stack parameters receive at least this much alignment regardless of data 434 type. On most machines, this is the same as the size of an integer. */ 435 #define PARM_BOUNDARY 32 436 437 /* Define this macro if you wish to preserve a certain alignment for the stack 438 pointer. The definition is a C expression for the desired alignment 439 (measured in bits). 440 441 If `PUSH_ROUNDING' is not defined, the stack will always be aligned to the 442 specified boundary. If `PUSH_ROUNDING' is defined and specifies a less 443 strict alignment than `STACK_BOUNDARY', the stack may be momentarily 444 unaligned while pushing arguments. */ 445 #define STACK_BOUNDARY 64 446 447 /* Alignment required for a function entry point, in bits. */ 448 #define FUNCTION_BOUNDARY 128 449 450 /* Biggest alignment that any data type can require on this machine, 451 in bits. */ 452 #define BIGGEST_ALIGNMENT 64 453 454 /* @@@ A hack, needed because libobjc wants to use ADJUST_FIELD_ALIGN for 455 some reason. */ 456 #ifdef IN_TARGET_LIBS 457 #define BIGGEST_FIELD_ALIGNMENT 64 458 #else 459 /* An expression for the alignment of a structure field FIELD if the 460 alignment computed in the usual way is COMPUTED. GCC uses this 461 value instead of the value in `BIGGEST_ALIGNMENT' or 462 `BIGGEST_FIELD_ALIGNMENT', if defined, for structure fields only. */ 463 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \ 464 frv_adjust_field_align (FIELD, COMPUTED) 465 #endif 466 467 /* If defined, a C expression to compute the alignment for a static variable. 468 TYPE is the data type, and ALIGN is the alignment that the object 469 would ordinarily have. The value of this macro is used instead of that 470 alignment to align the object. 471 472 If this macro is not defined, then ALIGN is used. 473 474 One use of this macro is to increase alignment of medium-size data to make 475 it all fit in fewer cache lines. Another is to cause character arrays to be 476 word-aligned so that `strcpy' calls that copy constants to character arrays 477 can be done inline. */ 478 #define DATA_ALIGNMENT(TYPE, ALIGN) \ 479 (TREE_CODE (TYPE) == ARRAY_TYPE \ 480 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \ 481 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 482 483 /* If defined, a C expression to compute the alignment given to a constant that 484 is being placed in memory. CONSTANT is the constant and ALIGN is the 485 alignment that the object would ordinarily have. The value of this macro is 486 used instead of that alignment to align the object. 487 488 If this macro is not defined, then ALIGN is used. 489 490 The typical use of this macro is to increase alignment for string constants 491 to be word aligned so that `strcpy' calls that copy constants can be done 492 inline. */ 493 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \ 494 (TREE_CODE (EXP) == STRING_CST \ 495 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN)) 496 497 /* Define this macro to be the value 1 if instructions will fail to work if 498 given data not on the nominal alignment. If instructions will merely go 499 slower in that case, define this macro as 0. */ 500 #define STRICT_ALIGNMENT 1 501 502 /* Define this if you wish to imitate the way many other C compilers handle 503 alignment of bitfields and the structures that contain them. 504 505 The behavior is that the type written for a bit-field (`int', `short', or 506 other integer type) imposes an alignment for the entire structure, as if the 507 structure really did contain an ordinary field of that type. In addition, 508 the bit-field is placed within the structure so that it would fit within such 509 a field, not crossing a boundary for it. 510 511 Thus, on most machines, a bit-field whose type is written as `int' would not 512 cross a four-byte boundary, and would force four-byte alignment for the 513 whole structure. (The alignment used may not be four bytes; it is 514 controlled by the other alignment parameters.) 515 516 If the macro is defined, its definition should be a C expression; a nonzero 517 value for the expression enables this behavior. 518 519 Note that if this macro is not defined, or its value is zero, some bitfields 520 may cross more than one alignment boundary. The compiler can support such 521 references if there are `insv', `extv', and `extzv' insns that can directly 522 reference memory. 523 524 The other known way of making bitfields work is to define 525 `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'. Then every 526 structure can be accessed with fullwords. 527 528 Unless the machine has bit-field instructions or you define 529 `STRUCTURE_SIZE_BOUNDARY' that way, you must define 530 `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value. 531 532 If your aim is to make GCC use the same conventions for laying out 533 bitfields as are used by another compiler, here is how to investigate what 534 the other compiler does. Compile and run this program: 535 536 struct foo1 537 { 538 char x; 539 char :0; 540 char y; 541 }; 542 543 struct foo2 544 { 545 char x; 546 int :0; 547 char y; 548 }; 549 550 main () 551 { 552 printf ("Size of foo1 is %d\n", 553 sizeof (struct foo1)); 554 printf ("Size of foo2 is %d\n", 555 sizeof (struct foo2)); 556 exit (0); 557 } 558 559 If this prints 2 and 5, then the compiler's behavior is what you would get 560 from `PCC_BITFIELD_TYPE_MATTERS'. 561 562 Defined in svr4.h. */ 563 #define PCC_BITFIELD_TYPE_MATTERS 1 564 565 566 /* Layout of Source Language Data Types. */ 567 568 #define CHAR_TYPE_SIZE 8 569 #define SHORT_TYPE_SIZE 16 570 #define INT_TYPE_SIZE 32 571 #define LONG_TYPE_SIZE 32 572 #define LONG_LONG_TYPE_SIZE 64 573 #define FLOAT_TYPE_SIZE 32 574 #define DOUBLE_TYPE_SIZE 64 575 #define LONG_DOUBLE_TYPE_SIZE 64 576 577 /* An expression whose value is 1 or 0, according to whether the type `char' 578 should be signed or unsigned by default. The user can always override this 579 default with the options `-fsigned-char' and `-funsigned-char'. */ 580 #define DEFAULT_SIGNED_CHAR 1 581 582 583 /* General purpose registers. */ 584 #define GPR_FIRST 0 /* First gpr */ 585 #define GPR_LAST (GPR_FIRST + 63) /* Last gpr */ 586 #define GPR_R0 GPR_FIRST /* R0, constant 0 */ 587 #define GPR_FP (GPR_FIRST + 2) /* Frame pointer */ 588 #define GPR_SP (GPR_FIRST + 1) /* Stack pointer */ 589 /* small data register */ 590 #define SDA_BASE_REG ((unsigned)(TARGET_FDPIC ? -1 : flag_pic ? PIC_REGNO : (GPR_FIRST + 16))) 591 #define PIC_REGNO (GPR_FIRST + (TARGET_FDPIC?15:17)) /* PIC register. */ 592 #define FDPIC_FPTR_REGNO (GPR_FIRST + 14) /* uClinux PIC function pointer register. */ 593 #define FDPIC_REGNO (GPR_FIRST + 15) /* uClinux PIC register. */ 594 595 #define HARD_REGNO_RENAME_OK(from,to) (TARGET_FDPIC ? ((to) != FDPIC_REG) : 1) 596 597 #define OUR_FDPIC_REG get_hard_reg_initial_val (SImode, FDPIC_REGNO) 598 599 #define FPR_FIRST 64 /* First FP reg */ 600 #define FPR_LAST 127 /* Last FP reg */ 601 602 #define GPR_TEMP_NUM frv_condexec_temps /* # gprs to reserve for temps */ 603 604 /* We reserve the last CR and CCR in each category to be used as a reload 605 register to reload the CR/CCR registers. This is a kludge. */ 606 #define CC_FIRST 128 /* First ICC/FCC reg */ 607 #define CC_LAST 135 /* Last ICC/FCC reg */ 608 #define ICC_FIRST (CC_FIRST + 4) /* First ICC reg */ 609 #define ICC_LAST (CC_FIRST + 7) /* Last ICC reg */ 610 #define ICC_TEMP (CC_FIRST + 7) /* Temporary ICC reg */ 611 #define FCC_FIRST (CC_FIRST) /* First FCC reg */ 612 #define FCC_LAST (CC_FIRST + 3) /* Last FCC reg */ 613 614 /* Amount to shift a value to locate a ICC or FCC register in the CCR 615 register and shift it to the bottom 4 bits. */ 616 #define CC_SHIFT_RIGHT(REGNO) (((REGNO) - CC_FIRST) << 2) 617 618 /* Mask to isolate a single ICC/FCC value. */ 619 #define CC_MASK 0xf 620 621 /* Masks to isolate the various bits in an ICC field. */ 622 #define ICC_MASK_N 0x8 /* negative */ 623 #define ICC_MASK_Z 0x4 /* zero */ 624 #define ICC_MASK_V 0x2 /* overflow */ 625 #define ICC_MASK_C 0x1 /* carry */ 626 627 /* Mask to isolate the N/Z flags in an ICC. */ 628 #define ICC_MASK_NZ (ICC_MASK_N | ICC_MASK_Z) 629 630 /* Mask to isolate the Z/C flags in an ICC. */ 631 #define ICC_MASK_ZC (ICC_MASK_Z | ICC_MASK_C) 632 633 /* Masks to isolate the various bits in a FCC field. */ 634 #define FCC_MASK_E 0x8 /* equal */ 635 #define FCC_MASK_L 0x4 /* less than */ 636 #define FCC_MASK_G 0x2 /* greater than */ 637 #define FCC_MASK_U 0x1 /* unordered */ 638 639 /* For CCR registers, the machine wants CR4..CR7 to be used for integer 640 code and CR0..CR3 to be used for floating point. */ 641 #define CR_FIRST 136 /* First CCR */ 642 #define CR_LAST 143 /* Last CCR */ 643 #define CR_NUM (CR_LAST-CR_FIRST+1) /* # of CCRs (8) */ 644 #define ICR_FIRST (CR_FIRST + 4) /* First integer CCR */ 645 #define ICR_LAST (CR_FIRST + 7) /* Last integer CCR */ 646 #define ICR_TEMP ICR_LAST /* Temp integer CCR */ 647 #define FCR_FIRST (CR_FIRST + 0) /* First float CCR */ 648 #define FCR_LAST (CR_FIRST + 3) /* Last float CCR */ 649 650 /* Amount to shift a value to locate a CR register in the CCCR special purpose 651 register and shift it to the bottom 2 bits. */ 652 #define CR_SHIFT_RIGHT(REGNO) (((REGNO) - CR_FIRST) << 1) 653 654 /* Mask to isolate a single CR value. */ 655 #define CR_MASK 0x3 656 657 #define ACC_FIRST 144 /* First acc register */ 658 #define ACC_LAST 155 /* Last acc register */ 659 660 #define ACCG_FIRST 156 /* First accg register */ 661 #define ACCG_LAST 167 /* Last accg register */ 662 663 #define AP_FIRST 168 /* fake argument pointer */ 664 665 #define SPR_FIRST 169 666 #define SPR_LAST 172 667 #define LR_REGNO (SPR_FIRST) 668 #define LCR_REGNO (SPR_FIRST + 1) 669 #define IACC_FIRST (SPR_FIRST + 2) 670 #define IACC_LAST (SPR_FIRST + 3) 671 672 #define GPR_P(R) IN_RANGE_P (R, GPR_FIRST, GPR_LAST) 673 #define GPR_OR_AP_P(R) (GPR_P (R) || (R) == ARG_POINTER_REGNUM) 674 #define FPR_P(R) IN_RANGE_P (R, FPR_FIRST, FPR_LAST) 675 #define CC_P(R) IN_RANGE_P (R, CC_FIRST, CC_LAST) 676 #define ICC_P(R) IN_RANGE_P (R, ICC_FIRST, ICC_LAST) 677 #define FCC_P(R) IN_RANGE_P (R, FCC_FIRST, FCC_LAST) 678 #define CR_P(R) IN_RANGE_P (R, CR_FIRST, CR_LAST) 679 #define ICR_P(R) IN_RANGE_P (R, ICR_FIRST, ICR_LAST) 680 #define FCR_P(R) IN_RANGE_P (R, FCR_FIRST, FCR_LAST) 681 #define ACC_P(R) IN_RANGE_P (R, ACC_FIRST, ACC_LAST) 682 #define ACCG_P(R) IN_RANGE_P (R, ACCG_FIRST, ACCG_LAST) 683 #define SPR_P(R) IN_RANGE_P (R, SPR_FIRST, SPR_LAST) 684 685 #define GPR_OR_PSEUDO_P(R) (GPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 686 #define FPR_OR_PSEUDO_P(R) (FPR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 687 #define GPR_AP_OR_PSEUDO_P(R) (GPR_OR_AP_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 688 #define CC_OR_PSEUDO_P(R) (CC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 689 #define ICC_OR_PSEUDO_P(R) (ICC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 690 #define FCC_OR_PSEUDO_P(R) (FCC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 691 #define CR_OR_PSEUDO_P(R) (CR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 692 #define ICR_OR_PSEUDO_P(R) (ICR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 693 #define FCR_OR_PSEUDO_P(R) (FCR_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 694 #define ACC_OR_PSEUDO_P(R) (ACC_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 695 #define ACCG_OR_PSEUDO_P(R) (ACCG_P (R) || (R) >= FIRST_PSEUDO_REGISTER) 696 697 #define MAX_STACK_IMMEDIATE_OFFSET 2047 698 699 700 /* Register Basics. */ 701 702 /* Number of hardware registers known to the compiler. They receive numbers 0 703 through `FIRST_PSEUDO_REGISTER-1'; thus, the first pseudo register's number 704 really is assigned the number `FIRST_PSEUDO_REGISTER'. */ 705 #define FIRST_PSEUDO_REGISTER (SPR_LAST + 1) 706 707 /* The first/last register that can contain the arguments to a function. */ 708 #define FIRST_ARG_REGNUM (GPR_FIRST + 8) 709 #define LAST_ARG_REGNUM (FIRST_ARG_REGNUM + FRV_NUM_ARG_REGS - 1) 710 711 /* Registers used by the exception handling functions. These should be 712 registers that are not otherwise used by the calling sequence. */ 713 #define FIRST_EH_REGNUM 14 714 #define LAST_EH_REGNUM 15 715 716 /* Scratch registers used in the prologue, epilogue and thunks. 717 OFFSET_REGNO is for loading constant addends that are too big for a 718 single instruction. TEMP_REGNO is used for transferring SPRs to and from 719 the stack, and various other activities. */ 720 #define OFFSET_REGNO 4 721 #define TEMP_REGNO 5 722 723 /* Registers used in the prologue. OLD_SP_REGNO is the old stack pointer, 724 which is sometimes used to set up the frame pointer. */ 725 #define OLD_SP_REGNO 6 726 727 /* Registers used in the epilogue. STACKADJ_REGNO stores the exception 728 handler's stack adjustment. */ 729 #define STACKADJ_REGNO 6 730 731 /* Registers used in thunks. JMP_REGNO is used for loading the target 732 address. */ 733 #define JUMP_REGNO 6 734 735 #define EH_RETURN_DATA_REGNO(N) ((N) <= (LAST_EH_REGNUM - FIRST_EH_REGNUM)? \ 736 (N) + FIRST_EH_REGNUM : INVALID_REGNUM) 737 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (SImode, STACKADJ_REGNO) 738 #define EH_RETURN_HANDLER_RTX RETURN_ADDR_RTX (0, frame_pointer_rtx) 739 740 #define EPILOGUE_USES(REGNO) ((REGNO) == LR_REGNO) 741 742 /* An initializer that says which registers are used for fixed purposes all 743 throughout the compiled code and are therefore not available for general 744 allocation. These would include the stack pointer, the frame pointer 745 (except on machines where that can be used as a general register when no 746 frame pointer is needed), the program counter on machines where that is 747 considered one of the addressable registers, and any other numbered register 748 with a standard use. 749 750 This information is expressed as a sequence of numbers, separated by commas 751 and surrounded by braces. The Nth number is 1 if register N is fixed, 0 752 otherwise. 753 754 The table initialized from this macro, and the table initialized by the 755 following one, may be overridden at run time either automatically, by the 756 actions of the macro `CONDITIONAL_REGISTER_USAGE', or by the user with the 757 command options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'. */ 758 759 /* gr0 -- Hard Zero 760 gr1 -- Stack Pointer 761 gr2 -- Frame Pointer 762 gr3 -- Hidden Parameter 763 gr16 -- Small Data reserved 764 gr17 -- Pic reserved 765 gr28 -- OS reserved 766 gr29 -- OS reserved 767 gr30 -- OS reserved 768 gr31 -- OS reserved 769 cr3 -- reserved to reload FCC registers. 770 cr7 -- reserved to reload ICC registers. */ 771 #define FIXED_REGISTERS \ 772 { /* Integer Registers */ \ 773 1, 1, 1, 1, 0, 0, 0, 0, /* 000-007, gr0 - gr7 */ \ 774 0, 0, 0, 0, 0, 0, 0, 0, /* 008-015, gr8 - gr15 */ \ 775 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 776 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 777 0, 0, 0, 0, 0, 0, 0, 0, /* 032-039, gr32 - gr39 */ \ 778 0, 0, 0, 0, 0, 0, 0, 0, /* 040-040, gr48 - gr47 */ \ 779 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 780 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 781 /* Float Registers */ \ 782 0, 0, 0, 0, 0, 0, 0, 0, /* 064-071, fr0 - fr7 */ \ 783 0, 0, 0, 0, 0, 0, 0, 0, /* 072-079, fr8 - fr15 */ \ 784 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 785 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 786 0, 0, 0, 0, 0, 0, 0, 0, /* 096-103, fr32 - fr39 */ \ 787 0, 0, 0, 0, 0, 0, 0, 0, /* 104-111, fr48 - fr47 */ \ 788 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 789 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 790 /* Condition Code Registers */ \ 791 0, 0, 0, 0, /* 128-131, fcc0 - fcc3 */ \ 792 0, 0, 0, 1, /* 132-135, icc0 - icc3 */ \ 793 /* Conditional execution Registers (CCR) */ \ 794 0, 0, 0, 0, 0, 0, 0, 1, /* 136-143, cr0 - cr7 */ \ 795 /* Accumulators */ \ 796 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 797 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 798 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 799 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 800 /* Other registers */ \ 801 1, /* 168, AP - fake arg ptr */ \ 802 1, /* 169, LR - Link register*/ \ 803 0, /* 170, LCR - Loop count reg*/ \ 804 1, 1 /* 171-172, iacc0 */ \ 805 } 806 807 /* Like `FIXED_REGISTERS' but has 1 for each register that is clobbered (in 808 general) by function calls as well as for fixed registers. This macro 809 therefore identifies the registers that are not available for general 810 allocation of values that must live across function calls. 811 812 If a register has 0 in `CALL_USED_REGISTERS', the compiler automatically 813 saves it on function entry and restores it on function exit, if the register 814 is used within the function. */ 815 #define CALL_USED_REGISTERS \ 816 { /* Integer Registers */ \ 817 1, 1, 1, 1, 1, 1, 1, 1, /* 000-007, gr0 - gr7 */ \ 818 1, 1, 1, 1, 1, 1, 1, 1, /* 008-015, gr8 - gr15 */ \ 819 1, 1, 0, 0, 0, 0, 0, 0, /* 016-023, gr16 - gr23 */ \ 820 0, 0, 0, 0, 1, 1, 1, 1, /* 024-031, gr24 - gr31 */ \ 821 1, 1, 1, 1, 1, 1, 1, 1, /* 032-039, gr32 - gr39 */ \ 822 1, 1, 1, 1, 1, 1, 1, 1, /* 040-040, gr48 - gr47 */ \ 823 0, 0, 0, 0, 0, 0, 0, 0, /* 048-055, gr48 - gr55 */ \ 824 0, 0, 0, 0, 0, 0, 0, 0, /* 056-063, gr56 - gr63 */ \ 825 /* Float Registers */ \ 826 1, 1, 1, 1, 1, 1, 1, 1, /* 064-071, fr0 - fr7 */ \ 827 1, 1, 1, 1, 1, 1, 1, 1, /* 072-079, fr8 - fr15 */ \ 828 0, 0, 0, 0, 0, 0, 0, 0, /* 080-087, fr16 - fr23 */ \ 829 0, 0, 0, 0, 0, 0, 0, 0, /* 088-095, fr24 - fr31 */ \ 830 1, 1, 1, 1, 1, 1, 1, 1, /* 096-103, fr32 - fr39 */ \ 831 1, 1, 1, 1, 1, 1, 1, 1, /* 104-111, fr48 - fr47 */ \ 832 0, 0, 0, 0, 0, 0, 0, 0, /* 112-119, fr48 - fr55 */ \ 833 0, 0, 0, 0, 0, 0, 0, 0, /* 120-127, fr56 - fr63 */ \ 834 /* Condition Code Registers */ \ 835 1, 1, 1, 1, /* 128-131, fcc0 - fcc3 */ \ 836 1, 1, 1, 1, /* 132-135, icc0 - icc3 */ \ 837 /* Conditional execution Registers (CCR) */ \ 838 1, 1, 1, 1, 1, 1, 1, 1, /* 136-143, cr0 - cr7 */ \ 839 /* Accumulators */ \ 840 1, 1, 1, 1, 1, 1, 1, 1, /* 144-151, acc0 - acc7 */ \ 841 1, 1, 1, 1, /* 152-155, acc8 - acc11 */ \ 842 1, 1, 1, 1, 1, 1, 1, 1, /* 156-163, accg0 - accg7 */ \ 843 1, 1, 1, 1, /* 164-167, accg8 - accg11 */ \ 844 /* Other registers */ \ 845 1, /* 168, AP - fake arg ptr */ \ 846 1, /* 169, LR - Link register*/ \ 847 1, /* 170, LCR - Loop count reg */ \ 848 1, 1 /* 171-172, iacc0 */ \ 849 } 850 851 /* Zero or more C statements that may conditionally modify two variables 852 `fixed_regs' and `call_used_regs' (both of type `char []') after they have 853 been initialized from the two preceding macros. 854 855 This is necessary in case the fixed or call-clobbered registers depend on 856 target flags. 857 858 You need not define this macro if it has no work to do. 859 860 If the usage of an entire class of registers depends on the target flags, 861 you may indicate this to GCC by using this macro to modify `fixed_regs' and 862 `call_used_regs' to 1 for each of the registers in the classes which should 863 not be used by GCC. Also define the macro `REG_CLASS_FROM_LETTER' to return 864 `NO_REGS' if it is called with a letter for a class that shouldn't be used. 865 866 (However, if this class is not included in `GENERAL_REGS' and all of the 867 insn patterns whose constraints permit this class are controlled by target 868 switches, then GCC will automatically avoid using these registers when the 869 target switches are opposed to them.) */ 870 871 #define CONDITIONAL_REGISTER_USAGE frv_conditional_register_usage () 872 873 874 /* Order of allocation of registers. */ 875 876 /* If defined, an initializer for a vector of integers, containing the numbers 877 of hard registers in the order in which GCC should prefer to use them 878 (from most preferred to least). 879 880 If this macro is not defined, registers are used lowest numbered first (all 881 else being equal). 882 883 One use of this macro is on machines where the highest numbered registers 884 must always be saved and the save-multiple-registers instruction supports 885 only sequences of consecutive registers. On such machines, define 886 `REG_ALLOC_ORDER' to be an initializer that lists the highest numbered 887 allocatable register first. */ 888 889 /* On the FRV, allocate GR16 and GR17 after other saved registers so that we 890 have a better chance of allocating 2 registers at a time and can use the 891 double word load/store instructions in the prologue. */ 892 #define REG_ALLOC_ORDER \ 893 { \ 894 /* volatile registers */ \ 895 GPR_FIRST + 4, GPR_FIRST + 5, GPR_FIRST + 6, GPR_FIRST + 7, \ 896 GPR_FIRST + 8, GPR_FIRST + 9, GPR_FIRST + 10, GPR_FIRST + 11, \ 897 GPR_FIRST + 12, GPR_FIRST + 13, GPR_FIRST + 14, GPR_FIRST + 15, \ 898 GPR_FIRST + 32, GPR_FIRST + 33, GPR_FIRST + 34, GPR_FIRST + 35, \ 899 GPR_FIRST + 36, GPR_FIRST + 37, GPR_FIRST + 38, GPR_FIRST + 39, \ 900 GPR_FIRST + 40, GPR_FIRST + 41, GPR_FIRST + 42, GPR_FIRST + 43, \ 901 GPR_FIRST + 44, GPR_FIRST + 45, GPR_FIRST + 46, GPR_FIRST + 47, \ 902 \ 903 FPR_FIRST + 0, FPR_FIRST + 1, FPR_FIRST + 2, FPR_FIRST + 3, \ 904 FPR_FIRST + 4, FPR_FIRST + 5, FPR_FIRST + 6, FPR_FIRST + 7, \ 905 FPR_FIRST + 8, FPR_FIRST + 9, FPR_FIRST + 10, FPR_FIRST + 11, \ 906 FPR_FIRST + 12, FPR_FIRST + 13, FPR_FIRST + 14, FPR_FIRST + 15, \ 907 FPR_FIRST + 32, FPR_FIRST + 33, FPR_FIRST + 34, FPR_FIRST + 35, \ 908 FPR_FIRST + 36, FPR_FIRST + 37, FPR_FIRST + 38, FPR_FIRST + 39, \ 909 FPR_FIRST + 40, FPR_FIRST + 41, FPR_FIRST + 42, FPR_FIRST + 43, \ 910 FPR_FIRST + 44, FPR_FIRST + 45, FPR_FIRST + 46, FPR_FIRST + 47, \ 911 \ 912 ICC_FIRST + 0, ICC_FIRST + 1, ICC_FIRST + 2, ICC_FIRST + 3, \ 913 FCC_FIRST + 0, FCC_FIRST + 1, FCC_FIRST + 2, FCC_FIRST + 3, \ 914 CR_FIRST + 0, CR_FIRST + 1, CR_FIRST + 2, CR_FIRST + 3, \ 915 CR_FIRST + 4, CR_FIRST + 5, CR_FIRST + 6, CR_FIRST + 7, \ 916 \ 917 /* saved registers */ \ 918 GPR_FIRST + 18, GPR_FIRST + 19, \ 919 GPR_FIRST + 20, GPR_FIRST + 21, GPR_FIRST + 22, GPR_FIRST + 23, \ 920 GPR_FIRST + 24, GPR_FIRST + 25, GPR_FIRST + 26, GPR_FIRST + 27, \ 921 GPR_FIRST + 48, GPR_FIRST + 49, GPR_FIRST + 50, GPR_FIRST + 51, \ 922 GPR_FIRST + 52, GPR_FIRST + 53, GPR_FIRST + 54, GPR_FIRST + 55, \ 923 GPR_FIRST + 56, GPR_FIRST + 57, GPR_FIRST + 58, GPR_FIRST + 59, \ 924 GPR_FIRST + 60, GPR_FIRST + 61, GPR_FIRST + 62, GPR_FIRST + 63, \ 925 GPR_FIRST + 16, GPR_FIRST + 17, \ 926 \ 927 FPR_FIRST + 16, FPR_FIRST + 17, FPR_FIRST + 18, FPR_FIRST + 19, \ 928 FPR_FIRST + 20, FPR_FIRST + 21, FPR_FIRST + 22, FPR_FIRST + 23, \ 929 FPR_FIRST + 24, FPR_FIRST + 25, FPR_FIRST + 26, FPR_FIRST + 27, \ 930 FPR_FIRST + 28, FPR_FIRST + 29, FPR_FIRST + 30, FPR_FIRST + 31, \ 931 FPR_FIRST + 48, FPR_FIRST + 49, FPR_FIRST + 50, FPR_FIRST + 51, \ 932 FPR_FIRST + 52, FPR_FIRST + 53, FPR_FIRST + 54, FPR_FIRST + 55, \ 933 FPR_FIRST + 56, FPR_FIRST + 57, FPR_FIRST + 58, FPR_FIRST + 59, \ 934 FPR_FIRST + 60, FPR_FIRST + 61, FPR_FIRST + 62, FPR_FIRST + 63, \ 935 \ 936 /* special or fixed registers */ \ 937 GPR_FIRST + 0, GPR_FIRST + 1, GPR_FIRST + 2, GPR_FIRST + 3, \ 938 GPR_FIRST + 28, GPR_FIRST + 29, GPR_FIRST + 30, GPR_FIRST + 31, \ 939 ACC_FIRST + 0, ACC_FIRST + 1, ACC_FIRST + 2, ACC_FIRST + 3, \ 940 ACC_FIRST + 4, ACC_FIRST + 5, ACC_FIRST + 6, ACC_FIRST + 7, \ 941 ACC_FIRST + 8, ACC_FIRST + 9, ACC_FIRST + 10, ACC_FIRST + 11, \ 942 ACCG_FIRST + 0, ACCG_FIRST + 1, ACCG_FIRST + 2, ACCG_FIRST + 3, \ 943 ACCG_FIRST + 4, ACCG_FIRST + 5, ACCG_FIRST + 6, ACCG_FIRST + 7, \ 944 ACCG_FIRST + 8, ACCG_FIRST + 9, ACCG_FIRST + 10, ACCG_FIRST + 11, \ 945 AP_FIRST, LR_REGNO, LCR_REGNO, \ 946 IACC_FIRST + 0, IACC_FIRST + 1 \ 947 } 948 949 950 /* How Values Fit in Registers. */ 951 952 /* A C expression for the number of consecutive hard registers, starting at 953 register number REGNO, required to hold a value of mode MODE. 954 955 On a machine where all registers are exactly one word, a suitable definition 956 of this macro is 957 958 #define HARD_REGNO_NREGS(REGNO, MODE) \ 959 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) \ 960 / UNITS_PER_WORD)) */ 961 962 /* On the FRV, make the CC modes take 3 words in the integer registers, so that 963 we can build the appropriate instructions to properly reload the values. */ 964 #define HARD_REGNO_NREGS(REGNO, MODE) frv_hard_regno_nregs (REGNO, MODE) 965 966 /* A C expression that is nonzero if it is permissible to store a value of mode 967 MODE in hard register number REGNO (or in several registers starting with 968 that one). For a machine where all registers are equivalent, a suitable 969 definition is 970 971 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1 972 973 It is not necessary for this macro to check for the numbers of fixed 974 registers, because the allocation mechanism considers them to be always 975 occupied. 976 977 On some machines, double-precision values must be kept in even/odd register 978 pairs. The way to implement that is to define this macro to reject odd 979 register numbers for such modes. 980 981 The minimum requirement for a mode to be OK in a register is that the 982 `movMODE' instruction pattern support moves between the register and any 983 other hard register for which the mode is OK; and that moving a value into 984 the register and back out not alter it. 985 986 Since the same instruction used to move `SImode' will work for all narrower 987 integer modes, it is not necessary on any machine for `HARD_REGNO_MODE_OK' 988 to distinguish between these modes, provided you define patterns `movhi', 989 etc., to take advantage of this. This is useful because of the interaction 990 between `HARD_REGNO_MODE_OK' and `MODES_TIEABLE_P'; it is very desirable for 991 all integer modes to be tieable. 992 993 Many machines have special registers for floating point arithmetic. Often 994 people assume that floating point machine modes are allowed only in floating 995 point registers. This is not true. Any registers that can hold integers 996 can safely *hold* a floating point machine mode, whether or not floating 997 arithmetic can be done on it in those registers. Integer move instructions 998 can be used to move the values. 999 1000 On some machines, though, the converse is true: fixed-point machine modes 1001 may not go in floating registers. This is true if the floating registers 1002 normalize any value stored in them, because storing a non-floating value 1003 there would garble it. In this case, `HARD_REGNO_MODE_OK' should reject 1004 fixed-point machine modes in floating registers. But if the floating 1005 registers do not automatically normalize, if you can store any bit pattern 1006 in one and retrieve it unchanged without a trap, then any machine mode may 1007 go in a floating register, so you can define this macro to say so. 1008 1009 The primary significance of special floating registers is rather that they 1010 are the registers acceptable in floating point arithmetic instructions. 1011 However, this is of no concern to `HARD_REGNO_MODE_OK'. You handle it by 1012 writing the proper constraints for those instructions. 1013 1014 On some machines, the floating registers are especially slow to access, so 1015 that it is better to store a value in a stack frame than in such a register 1016 if floating point arithmetic is not being done. As long as the floating 1017 registers are not in class `GENERAL_REGS', they will not be used unless some 1018 pattern's constraint asks for one. */ 1019 #define HARD_REGNO_MODE_OK(REGNO, MODE) frv_hard_regno_mode_ok (REGNO, MODE) 1020 1021 /* A C expression that is nonzero if it is desirable to choose register 1022 allocation so as to avoid move instructions between a value of mode MODE1 1023 and a value of mode MODE2. 1024 1025 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R, MODE2)' are 1026 ever different for any R, then `MODES_TIEABLE_P (MODE1, MODE2)' must be 1027 zero. */ 1028 #define MODES_TIEABLE_P(MODE1, MODE2) (MODE1 == MODE2) 1029 1030 /* Define this macro if the compiler should avoid copies to/from CCmode 1031 registers. You should only define this macro if support fo copying to/from 1032 CCmode is incomplete. */ 1033 #define AVOID_CCMODE_COPIES 1034 1035 1036 /* Register Classes. */ 1037 1038 /* An enumeral type that must be defined with all the register class names as 1039 enumeral values. `NO_REGS' must be first. `ALL_REGS' must be the last 1040 register class, followed by one more enumeral value, `LIM_REG_CLASSES', 1041 which is not a register class but rather tells how many classes there are. 1042 1043 Each register class has a number, which is the value of casting the class 1044 name to type `int'. The number serves as an index in many of the tables 1045 described below. */ 1046 enum reg_class 1047 { 1048 NO_REGS, 1049 ICC_REGS, 1050 FCC_REGS, 1051 CC_REGS, 1052 ICR_REGS, 1053 FCR_REGS, 1054 CR_REGS, 1055 LCR_REG, 1056 LR_REG, 1057 GR8_REGS, 1058 GR9_REGS, 1059 GR89_REGS, 1060 FDPIC_REGS, 1061 FDPIC_FPTR_REGS, 1062 FDPIC_CALL_REGS, 1063 SPR_REGS, 1064 QUAD_ACC_REGS, 1065 EVEN_ACC_REGS, 1066 ACC_REGS, 1067 ACCG_REGS, 1068 QUAD_FPR_REGS, 1069 FEVEN_REGS, 1070 FPR_REGS, 1071 QUAD_REGS, 1072 EVEN_REGS, 1073 GPR_REGS, 1074 ALL_REGS, 1075 LIM_REG_CLASSES 1076 }; 1077 1078 #define GENERAL_REGS GPR_REGS 1079 1080 /* The number of distinct register classes, defined as follows: 1081 1082 #define N_REG_CLASSES (int) LIM_REG_CLASSES */ 1083 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 1084 1085 /* An initializer containing the names of the register classes as C string 1086 constants. These names are used in writing some of the debugging dumps. */ 1087 #define REG_CLASS_NAMES { \ 1088 "NO_REGS", \ 1089 "ICC_REGS", \ 1090 "FCC_REGS", \ 1091 "CC_REGS", \ 1092 "ICR_REGS", \ 1093 "FCR_REGS", \ 1094 "CR_REGS", \ 1095 "LCR_REG", \ 1096 "LR_REG", \ 1097 "GR8_REGS", \ 1098 "GR9_REGS", \ 1099 "GR89_REGS", \ 1100 "FDPIC_REGS", \ 1101 "FDPIC_FPTR_REGS", \ 1102 "FDPIC_CALL_REGS", \ 1103 "SPR_REGS", \ 1104 "QUAD_ACC_REGS", \ 1105 "EVEN_ACC_REGS", \ 1106 "ACC_REGS", \ 1107 "ACCG_REGS", \ 1108 "QUAD_FPR_REGS", \ 1109 "FEVEN_REGS", \ 1110 "FPR_REGS", \ 1111 "QUAD_REGS", \ 1112 "EVEN_REGS", \ 1113 "GPR_REGS", \ 1114 "ALL_REGS" \ 1115 } 1116 1117 /* An initializer containing the contents of the register classes, as integers 1118 which are bit masks. The Nth integer specifies the contents of class N. 1119 The way the integer MASK is interpreted is that register R is in the class 1120 if `MASK & (1 << R)' is 1. 1121 1122 When the machine has more than 32 registers, an integer does not suffice. 1123 Then the integers are replaced by sub-initializers, braced groupings 1124 containing several integers. Each sub-initializer must be suitable as an 1125 initializer for the type `HARD_REG_SET' which is defined in 1126 `hard-reg-set.h'. */ 1127 #define REG_CLASS_CONTENTS \ 1128 { /* gr0-gr31 gr32-gr63 fr0-fr31 fr32-fr-63 cc/ccr/acc ap/spr */ \ 1129 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* NO_REGS */\ 1130 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000f0,0x0}, /* ICC_REGS */\ 1131 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000000f,0x0}, /* FCC_REGS */\ 1132 { 0x00000000,0x00000000,0x00000000,0x00000000,0x000000ff,0x0}, /* CC_REGS */\ 1133 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000f000,0x0}, /* ICR_REGS */\ 1134 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000f00,0x0}, /* FCR_REGS */\ 1135 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0000ff00,0x0}, /* CR_REGS */\ 1136 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x400}, /* LCR_REGS */\ 1137 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x200}, /* LR_REGS */\ 1138 { 0x00000100,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR8_REGS */\ 1139 { 0x00000200,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR9_REGS */\ 1140 { 0x00000300,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* GR89_REGS */\ 1141 { 0x00008000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_REGS */\ 1142 { 0x00004000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_FPTR_REGS */\ 1143 { 0x0000c000,0x00000000,0x00000000,0x00000000,0x00000000,0x0}, /* FDPIC_CALL_REGS */\ 1144 { 0x00000000,0x00000000,0x00000000,0x00000000,0x00000000,0x1e00}, /* SPR_REGS */\ 1145 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* QUAD_ACC */\ 1146 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* EVEN_ACC */\ 1147 { 0x00000000,0x00000000,0x00000000,0x00000000,0x0fff0000,0x0}, /* ACC_REGS */\ 1148 { 0x00000000,0x00000000,0x00000000,0x00000000,0xf0000000,0xff}, /* ACCG_REGS*/\ 1149 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* QUAD_FPR */\ 1150 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FEVEN_REG*/\ 1151 { 0x00000000,0x00000000,0xffffffff,0xffffffff,0x00000000,0x0}, /* FPR_REGS */\ 1152 { 0x0ffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* QUAD_REGS*/\ 1153 { 0xfffffffc,0xffffffff,0x00000000,0x00000000,0x00000000,0x0}, /* EVEN_REGS*/\ 1154 { 0xffffffff,0xffffffff,0x00000000,0x00000000,0x00000000,0x100}, /* GPR_REGS */\ 1155 { 0xffffffff,0xffffffff,0xffffffff,0xffffffff,0xffffffff,0x1fff}, /* ALL_REGS */\ 1156 } 1157 1158 /* The following macro defines cover classes for Integrated Register 1159 Allocator. Cover classes is a set of non-intersected register 1160 classes covering all hard registers used for register allocation 1161 purpose. Any move between two registers of a cover class should be 1162 cheaper than load or store of the registers. The macro value is 1163 array of register classes with LIM_REG_CLASSES used as the end 1164 marker. */ 1165 1166 #define IRA_COVER_CLASSES \ 1167 { \ 1168 GPR_REGS, FPR_REGS, ACC_REGS, ICR_REGS, FCR_REGS, ICC_REGS, FCC_REGS, \ 1169 ACCG_REGS, SPR_REGS, \ 1170 LIM_REG_CLASSES \ 1171 } 1172 1173 /* A C expression whose value is a register class containing hard register 1174 REGNO. In general there is more than one such class; choose a class which 1175 is "minimal", meaning that no smaller class also contains the register. */ 1176 1177 extern enum reg_class regno_reg_class[]; 1178 #define REGNO_REG_CLASS(REGNO) regno_reg_class [REGNO] 1179 1180 /* A macro whose definition is the name of the class to which a valid base 1181 register must belong. A base register is one used in an address which is 1182 the register value plus a displacement. */ 1183 #define BASE_REG_CLASS GPR_REGS 1184 1185 /* A macro whose definition is the name of the class to which a valid index 1186 register must belong. An index register is one used in an address where its 1187 value is either multiplied by a scale factor or added to another register 1188 (as well as added to a displacement). */ 1189 #define INDEX_REG_CLASS GPR_REGS 1190 1191 /* A C expression which defines the machine-dependent operand constraint 1192 letters for register classes. If CHAR is such a letter, the value should be 1193 the register class corresponding to it. Otherwise, the value should be 1194 `NO_REGS'. The register letter `r', corresponding to class `GENERAL_REGS', 1195 will not be passed to this macro; you do not need to handle it. 1196 1197 The following letters are unavailable, due to being used as 1198 constraints: 1199 '0'..'9' 1200 '<', '>' 1201 'E', 'F', 'G', 'H' 1202 'I', 'J', 'K', 'L', 'M', 'N', 'O', 'P' 1203 'Q', 'R', 'S', 'T', 'U' 1204 'V', 'X' 1205 'g', 'i', 'm', 'n', 'o', 'p', 'r', 's' */ 1206 1207 extern enum reg_class reg_class_from_letter[]; 1208 #define REG_CLASS_FROM_LETTER(CHAR) reg_class_from_letter [(unsigned char)(CHAR)] 1209 1210 /* A C expression which is nonzero if register number NUM is suitable for use 1211 as a base register in operand addresses. It may be either a suitable hard 1212 register or a pseudo register that has been allocated such a hard register. */ 1213 #define REGNO_OK_FOR_BASE_P(NUM) \ 1214 ((NUM) < FIRST_PSEUDO_REGISTER \ 1215 ? GPR_P (NUM) \ 1216 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1217 1218 /* A C expression which is nonzero if register number NUM is suitable for use 1219 as an index register in operand addresses. It may be either a suitable hard 1220 register or a pseudo register that has been allocated such a hard register. 1221 1222 The difference between an index register and a base register is that the 1223 index register may be scaled. If an address involves the sum of two 1224 registers, neither one of them scaled, then either one may be labeled the 1225 "base" and the other the "index"; but whichever labeling is used must fit 1226 the machine's constraints of which registers may serve in each capacity. 1227 The compiler will try both labelings, looking for one that is valid, and 1228 will reload one or both registers only if neither labeling works. */ 1229 #define REGNO_OK_FOR_INDEX_P(NUM) \ 1230 ((NUM) < FIRST_PSEUDO_REGISTER \ 1231 ? GPR_P (NUM) \ 1232 : (reg_renumber [NUM] >= 0 && GPR_P (reg_renumber [NUM]))) 1233 1234 /* A C expression that places additional restrictions on the register class to 1235 use when it is necessary to copy value X into a register in class CLASS. 1236 The value is a register class; perhaps CLASS, or perhaps another, smaller 1237 class. On many machines, the following definition is safe: 1238 1239 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS 1240 1241 Sometimes returning a more restrictive class makes better code. For 1242 example, on the 68000, when X is an integer constant that is in range for a 1243 `moveq' instruction, the value of this macro is always `DATA_REGS' as long 1244 as CLASS includes the data registers. Requiring a data register guarantees 1245 that a `moveq' will be used. 1246 1247 If X is a `const_double', by returning `NO_REGS' you can force X into a 1248 memory constant. This is useful on certain machines where immediate 1249 floating values cannot be loaded into certain kinds of registers. 1250 1251 This declaration must be present. */ 1252 #define PREFERRED_RELOAD_CLASS(X, CLASS) CLASS 1253 1254 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1255 frv_secondary_reload_class (CLASS, MODE, X) 1256 1257 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, X) \ 1258 frv_secondary_reload_class (CLASS, MODE, X) 1259 1260 /* A C expression whose value is nonzero if pseudos that have been assigned to 1261 registers of class CLASS would likely be spilled because registers of CLASS 1262 are needed for spill registers. 1263 1264 The default value of this macro returns 1 if CLASS has exactly one register 1265 and zero otherwise. On most machines, this default should be used. Only 1266 define this macro to some other expression if pseudo allocated by 1267 `local-alloc.c' end up in memory because their hard registers were needed 1268 for spill registers. If this macro returns nonzero for those classes, those 1269 pseudos will only be allocated by `global.c', which knows how to reallocate 1270 the pseudo to another register. If there would not be another register 1271 available for reallocation, you should not change the definition of this 1272 macro since the only effect of such a definition would be to slow down 1273 register allocation. */ 1274 #define CLASS_LIKELY_SPILLED_P(CLASS) frv_class_likely_spilled_p (CLASS) 1275 1276 /* A C expression for the maximum number of consecutive registers of 1277 class CLASS needed to hold a value of mode MODE. 1278 1279 This is closely related to the macro `HARD_REGNO_NREGS'. In fact, the value 1280 of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be the maximum value of 1281 `HARD_REGNO_NREGS (REGNO, MODE)' for all REGNO values in the class CLASS. 1282 1283 This macro helps control the handling of multiple-word values in 1284 the reload pass. 1285 1286 This declaration is required. */ 1287 #define CLASS_MAX_NREGS(CLASS, MODE) frv_class_max_nregs (CLASS, MODE) 1288 1289 #define ZERO_P(x) (x == CONST0_RTX (GET_MODE (x))) 1290 1291 /* 6-bit signed immediate. */ 1292 #define CONST_OK_FOR_I(VALUE) IN_RANGE_P(VALUE, -32, 31) 1293 /* 10-bit signed immediate. */ 1294 #define CONST_OK_FOR_J(VALUE) IN_RANGE_P(VALUE, -512, 511) 1295 /* Unused */ 1296 #define CONST_OK_FOR_K(VALUE) 0 1297 /* 16-bit signed immediate. */ 1298 #define CONST_OK_FOR_L(VALUE) IN_RANGE_P(VALUE, -32768, 32767) 1299 /* 16-bit unsigned immediate. */ 1300 #define CONST_OK_FOR_M(VALUE) IN_RANGE_P (VALUE, 0, 65535) 1301 /* 12-bit signed immediate that is negative. */ 1302 #define CONST_OK_FOR_N(VALUE) IN_RANGE_P(VALUE, -2048, -1) 1303 /* Zero */ 1304 #define CONST_OK_FOR_O(VALUE) ((VALUE) == 0) 1305 /* 12-bit signed immediate that is negative. */ 1306 #define CONST_OK_FOR_P(VALUE) IN_RANGE_P(VALUE, 1, 2047) 1307 1308 /* A C expression that defines the machine-dependent operand constraint letters 1309 (`I', `J', `K', .. 'P') that specify particular ranges of integer values. 1310 If C is one of those letters, the expression should check that VALUE, an 1311 integer, is in the appropriate range and return 1 if so, 0 otherwise. If C 1312 is not one of those letters, the value should be 0 regardless of VALUE. */ 1313 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 1314 ( (C) == 'I' ? CONST_OK_FOR_I (VALUE) \ 1315 : (C) == 'J' ? CONST_OK_FOR_J (VALUE) \ 1316 : (C) == 'K' ? CONST_OK_FOR_K (VALUE) \ 1317 : (C) == 'L' ? CONST_OK_FOR_L (VALUE) \ 1318 : (C) == 'M' ? CONST_OK_FOR_M (VALUE) \ 1319 : (C) == 'N' ? CONST_OK_FOR_N (VALUE) \ 1320 : (C) == 'O' ? CONST_OK_FOR_O (VALUE) \ 1321 : (C) == 'P' ? CONST_OK_FOR_P (VALUE) \ 1322 : 0) 1323 1324 1325 /* A C expression that defines the machine-dependent operand constraint letters 1326 (`G', `H') that specify particular ranges of `const_double' values. 1327 1328 If C is one of those letters, the expression should check that VALUE, an RTX 1329 of code `const_double', is in the appropriate range and return 1 if so, 0 1330 otherwise. If C is not one of those letters, the value should be 0 1331 regardless of VALUE. 1332 1333 `const_double' is used for all floating-point constants and for `DImode' 1334 fixed-point constants. A given letter can accept either or both kinds of 1335 values. It can use `GET_MODE' to distinguish between these kinds. */ 1336 1337 #define CONST_DOUBLE_OK_FOR_G(VALUE) \ 1338 ((GET_MODE (VALUE) == VOIDmode \ 1339 && CONST_DOUBLE_LOW (VALUE) == 0 \ 1340 && CONST_DOUBLE_HIGH (VALUE) == 0) \ 1341 || ((GET_MODE (VALUE) == SFmode \ 1342 || GET_MODE (VALUE) == DFmode) \ 1343 && (VALUE) == CONST0_RTX (GET_MODE (VALUE)))) 1344 1345 #define CONST_DOUBLE_OK_FOR_H(VALUE) 0 1346 1347 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 1348 ( (C) == 'G' ? CONST_DOUBLE_OK_FOR_G (VALUE) \ 1349 : (C) == 'H' ? CONST_DOUBLE_OK_FOR_H (VALUE) \ 1350 : 0) 1351 1352 /* A C expression that defines the optional machine-dependent constraint 1353 letters (`Q', `R', `S', `T', `U') that can be used to segregate specific 1354 types of operands, usually memory references, for the target machine. 1355 Normally this macro will not be defined. If it is required for a particular 1356 target machine, it should return 1 if VALUE corresponds to the operand type 1357 represented by the constraint letter C. If C is not defined as an extra 1358 constraint, the value returned should be 0 regardless of VALUE. 1359 1360 For example, on the ROMP, load instructions cannot have their output in r0 1361 if the memory reference contains a symbolic address. Constraint letter `Q' 1362 is defined as representing a memory address that does *not* contain a 1363 symbolic address. An alternative is specified with a `Q' constraint on the 1364 input and `r' on the output. The next alternative specifies `m' on the 1365 input and a register class that does not include r0 on the output. */ 1366 1367 /* 12-bit relocations. */ 1368 #define EXTRA_CONSTRAINT_FOR_Q(VALUE) \ 1369 (got12_operand (VALUE, GET_MODE (VALUE))) 1370 1371 /* Double word memory ops that take one instruction. */ 1372 #define EXTRA_CONSTRAINT_FOR_R(VALUE) \ 1373 (dbl_memory_one_insn_operand (VALUE, GET_MODE (VALUE))) 1374 1375 /* SYMBOL_REF */ 1376 #define EXTRA_CONSTRAINT_FOR_S(VALUE) \ 1377 (CONSTANT_P (VALUE) && call_operand (VALUE, VOIDmode)) 1378 1379 /* Double word memory ops that take two instructions. */ 1380 #define EXTRA_CONSTRAINT_FOR_T(VALUE) \ 1381 (dbl_memory_two_insn_operand (VALUE, GET_MODE (VALUE))) 1382 1383 /* Memory operand for conditional execution. */ 1384 #define EXTRA_CONSTRAINT_FOR_U(VALUE) \ 1385 (condexec_memory_operand (VALUE, GET_MODE (VALUE))) 1386 1387 #define EXTRA_CONSTRAINT(VALUE, C) \ 1388 ( (C) == 'Q' ? EXTRA_CONSTRAINT_FOR_Q (VALUE) \ 1389 : (C) == 'R' ? EXTRA_CONSTRAINT_FOR_R (VALUE) \ 1390 : (C) == 'S' ? EXTRA_CONSTRAINT_FOR_S (VALUE) \ 1391 : (C) == 'T' ? EXTRA_CONSTRAINT_FOR_T (VALUE) \ 1392 : (C) == 'U' ? EXTRA_CONSTRAINT_FOR_U (VALUE) \ 1393 : 0) 1394 1395 #define EXTRA_MEMORY_CONSTRAINT(C,STR) \ 1396 ((C) == 'U' || (C) == 'R' || (C) == 'T') 1397 1398 #define CONSTRAINT_LEN(C, STR) \ 1399 ((C) == 'D' ? 3 : DEFAULT_CONSTRAINT_LEN ((C), (STR))) 1400 1401 #define REG_CLASS_FROM_CONSTRAINT(C, STR) \ 1402 (((C) == 'D' && (STR)[1] == '8' && (STR)[2] == '9') ? GR89_REGS : \ 1403 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '9') ? GR9_REGS : \ 1404 ((C) == 'D' && (STR)[1] == '0' && (STR)[2] == '8') ? GR8_REGS : \ 1405 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '4') ? FDPIC_FPTR_REGS : \ 1406 ((C) == 'D' && (STR)[1] == '1' && (STR)[2] == '5') ? FDPIC_REGS : \ 1407 REG_CLASS_FROM_LETTER ((C))) 1408 1409 1410 /* Basic Stack Layout. */ 1411 1412 /* Structure to describe information about a saved range of registers */ 1413 1414 typedef struct frv_stack_regs { 1415 const char * name; /* name of the register ranges */ 1416 int first; /* first register in the range */ 1417 int last; /* last register in the range */ 1418 int size_1word; /* # of bytes to be stored via 1 word stores */ 1419 int size_2words; /* # of bytes to be stored via 2 word stores */ 1420 unsigned char field_p; /* true if the registers are a single SPR */ 1421 unsigned char dword_p; /* true if we can do dword stores */ 1422 unsigned char special_p; /* true if the regs have a fixed save loc. */ 1423 } frv_stack_regs_t; 1424 1425 /* Register ranges to look into saving. */ 1426 #define STACK_REGS_GPR 0 /* Gprs (normally gr16..gr31, gr48..gr63) */ 1427 #define STACK_REGS_FPR 1 /* Fprs (normally fr16..fr31, fr48..fr63) */ 1428 #define STACK_REGS_LR 2 /* LR register */ 1429 #define STACK_REGS_CC 3 /* CCrs (normally not saved) */ 1430 #define STACK_REGS_LCR 5 /* lcr register */ 1431 #define STACK_REGS_STDARG 6 /* stdarg registers */ 1432 #define STACK_REGS_STRUCT 7 /* structure return (gr3) */ 1433 #define STACK_REGS_FP 8 /* FP register */ 1434 #define STACK_REGS_MAX 9 /* # of register ranges */ 1435 1436 /* Values for save_p field. */ 1437 #define REG_SAVE_NO_SAVE 0 /* register not saved */ 1438 #define REG_SAVE_1WORD 1 /* save the register */ 1439 #define REG_SAVE_2WORDS 2 /* save register and register+1 */ 1440 1441 /* Structure used to define the frv stack. */ 1442 1443 typedef struct frv_stack { 1444 int total_size; /* total bytes allocated for stack */ 1445 int vars_size; /* variable save area size */ 1446 int parameter_size; /* outgoing parameter size */ 1447 int stdarg_size; /* size of regs needed to be saved for stdarg */ 1448 int regs_size; /* size of the saved registers */ 1449 int regs_size_1word; /* # of bytes to be stored via 1 word stores */ 1450 int regs_size_2words; /* # of bytes to be stored via 2 word stores */ 1451 int header_size; /* size of the old FP, struct ret., LR save */ 1452 int pretend_size; /* size of pretend args */ 1453 int vars_offset; /* offset to save local variables from new SP*/ 1454 int regs_offset; /* offset to save registers from new SP */ 1455 /* register range information */ 1456 frv_stack_regs_t regs[STACK_REGS_MAX]; 1457 /* offset to store each register */ 1458 int reg_offset[FIRST_PSEUDO_REGISTER]; 1459 /* whether to save register (& reg+1) */ 1460 unsigned char save_p[FIRST_PSEUDO_REGISTER]; 1461 } frv_stack_t; 1462 1463 /* Define this macro if pushing a word onto the stack moves the stack pointer 1464 to a smaller address. */ 1465 #define STACK_GROWS_DOWNWARD 1 1466 1467 /* Define this macro to nonzero if the addresses of local variable slots 1468 are at negative offsets from the frame pointer. */ 1469 #define FRAME_GROWS_DOWNWARD 1 1470 1471 /* Offset from the frame pointer to the first local variable slot to be 1472 allocated. 1473 1474 If `FRAME_GROWS_DOWNWARD', find the next slot's offset by subtracting the 1475 first slot's length from `STARTING_FRAME_OFFSET'. Otherwise, it is found by 1476 adding the length of the first slot to the value `STARTING_FRAME_OFFSET'. */ 1477 #define STARTING_FRAME_OFFSET 0 1478 1479 /* Offset from the stack pointer register to the first location at which 1480 outgoing arguments are placed. If not specified, the default value of zero 1481 is used. This is the proper value for most machines. 1482 1483 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1484 location at which outgoing arguments are placed. */ 1485 #define STACK_POINTER_OFFSET 0 1486 1487 /* Offset from the argument pointer register to the first argument's address. 1488 On some machines it may depend on the data type of the function. 1489 1490 If `ARGS_GROW_DOWNWARD', this is the offset to the location above the first 1491 argument's address. */ 1492 #define FIRST_PARM_OFFSET(FUNDECL) 0 1493 1494 /* A C expression whose value is RTL representing the address in a stack frame 1495 where the pointer to the caller's frame is stored. Assume that FRAMEADDR is 1496 an RTL expression for the address of the stack frame itself. 1497 1498 If you don't define this macro, the default is to return the value of 1499 FRAMEADDR--that is, the stack frame address is also the address of the stack 1500 word that points to the previous frame. */ 1501 #define DYNAMIC_CHAIN_ADDRESS(FRAMEADDR) frv_dynamic_chain_address (FRAMEADDR) 1502 1503 /* A C expression whose value is RTL representing the value of the return 1504 address for the frame COUNT steps up from the current frame, after the 1505 prologue. FRAMEADDR is the frame pointer of the COUNT frame, or the frame 1506 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME' is 1507 defined. 1508 1509 The value of the expression must always be the correct address when COUNT is 1510 zero, but may be `NULL_RTX' if there is not way to determine the return 1511 address of other frames. */ 1512 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) frv_return_addr_rtx (COUNT, FRAMEADDR) 1513 1514 #define RETURN_POINTER_REGNUM LR_REGNO 1515 1516 /* A C expression whose value is RTL representing the location of the incoming 1517 return address at the beginning of any function, before the prologue. This 1518 RTL is either a `REG', indicating that the return value is saved in `REG', 1519 or a `MEM' representing a location in the stack. 1520 1521 You only need to define this macro if you want to support call frame 1522 debugging information like that provided by DWARF 2. */ 1523 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (SImode, RETURN_POINTER_REGNUM) 1524 1525 1526 /* Register That Address the Stack Frame. */ 1527 1528 /* The register number of the stack pointer register, which must also be a 1529 fixed register according to `FIXED_REGISTERS'. On most machines, the 1530 hardware determines which register this is. */ 1531 #define STACK_POINTER_REGNUM (GPR_FIRST + 1) 1532 1533 /* The register number of the frame pointer register, which is used to access 1534 automatic variables in the stack frame. On some machines, the hardware 1535 determines which register this is. On other machines, you can choose any 1536 register you wish for this purpose. */ 1537 #define FRAME_POINTER_REGNUM (GPR_FIRST + 2) 1538 1539 /* The register number of the arg pointer register, which is used to access the 1540 function's argument list. On some machines, this is the same as the frame 1541 pointer register. On some machines, the hardware determines which register 1542 this is. On other machines, you can choose any register you wish for this 1543 purpose. If this is not the same register as the frame pointer register, 1544 then you must mark it as a fixed register according to `FIXED_REGISTERS', or 1545 arrange to be able to eliminate it. */ 1546 1547 /* On frv this is a fake register that is eliminated in 1548 terms of either the frame pointer or stack pointer. */ 1549 #define ARG_POINTER_REGNUM AP_FIRST 1550 1551 /* Register numbers used for passing a function's static chain pointer. If 1552 register windows are used, the register number as seen by the called 1553 function is `STATIC_CHAIN_INCOMING_REGNUM', while the register number as 1554 seen by the calling function is `STATIC_CHAIN_REGNUM'. If these registers 1555 are the same, `STATIC_CHAIN_INCOMING_REGNUM' need not be defined. 1556 1557 The static chain register need not be a fixed register. 1558 1559 If the static chain is passed in memory, these macros should not be defined; 1560 instead, the next two macros should be defined. */ 1561 #define STATIC_CHAIN_REGNUM (GPR_FIRST + 7) 1562 #define STATIC_CHAIN_INCOMING_REGNUM (GPR_FIRST + 7) 1563 1564 1565 /* Eliminating the Frame Pointer and the Arg Pointer. */ 1566 1567 /* If defined, this macro specifies a table of register pairs used to eliminate 1568 unneeded registers that point into the stack frame. If it is not defined, 1569 the only elimination attempted by the compiler is to replace references to 1570 the frame pointer with references to the stack pointer. 1571 1572 The definition of this macro is a list of structure initializations, each of 1573 which specifies an original and replacement register. 1574 1575 On some machines, the position of the argument pointer is not known until 1576 the compilation is completed. In such a case, a separate hard register must 1577 be used for the argument pointer. This register can be eliminated by 1578 replacing it with either the frame pointer or the argument pointer, 1579 depending on whether or not the frame pointer has been eliminated. 1580 1581 In this case, you might specify: 1582 #define ELIMINABLE_REGS \ 1583 {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1584 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1585 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 1586 1587 Note that the elimination of the argument pointer with the stack pointer is 1588 specified first since that is the preferred elimination. */ 1589 1590 #define ELIMINABLE_REGS \ 1591 { \ 1592 {ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 1593 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 1594 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \ 1595 } 1596 1597 /* This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'. It specifies the 1598 initial difference between the specified pair of registers. This macro must 1599 be defined if `ELIMINABLE_REGS' is defined. */ 1600 1601 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 1602 (OFFSET) = frv_initial_elimination_offset (FROM, TO) 1603 1604 1605 /* Passing Function Arguments on the Stack. */ 1606 1607 /* If defined, the maximum amount of space required for outgoing arguments will 1608 be computed and placed into the variable 1609 `crtl->outgoing_args_size'. No space will be pushed onto the 1610 stack for each call; instead, the function prologue should increase the 1611 stack frame size by this amount. 1612 1613 Defining both `PUSH_ROUNDING' and `ACCUMULATE_OUTGOING_ARGS' is not 1614 proper. */ 1615 #define ACCUMULATE_OUTGOING_ARGS 1 1616 1617 /* A C expression that should indicate the number of bytes of its own arguments 1618 that a function pops on returning, or 0 if the function pops no arguments 1619 and the caller must therefore pop them all after the function returns. 1620 1621 FUNDECL is a C variable whose value is a tree node that describes the 1622 function in question. Normally it is a node of type `FUNCTION_DECL' that 1623 describes the declaration of the function. From this it is possible to 1624 obtain the DECL_ATTRIBUTES of the function. 1625 1626 FUNTYPE is a C variable whose value is a tree node that describes the 1627 function in question. Normally it is a node of type `FUNCTION_TYPE' that 1628 describes the data type of the function. From this it is possible to obtain 1629 the data types of the value and arguments (if known). 1630 1631 When a call to a library function is being considered, FUNTYPE will contain 1632 an identifier node for the library function. Thus, if you need to 1633 distinguish among various library functions, you can do so by their names. 1634 Note that "library function" in this context means a function used to 1635 perform arithmetic, whose name is known specially in the compiler and was 1636 not mentioned in the C code being compiled. 1637 1638 STACK-SIZE is the number of bytes of arguments passed on the stack. If a 1639 variable number of bytes is passed, it is zero, and argument popping will 1640 always be the responsibility of the calling function. 1641 1642 On the VAX, all functions always pop their arguments, so the definition of 1643 this macro is STACK-SIZE. On the 68000, using the standard calling 1644 convention, no functions pop their arguments, so the value of the macro is 1645 always 0 in this case. But an alternative calling convention is available 1646 in which functions that take a fixed number of arguments pop them but other 1647 functions (such as `printf') pop nothing (the caller pops all). When this 1648 convention is in use, FUNTYPE is examined to determine whether a function 1649 takes a fixed number of arguments. */ 1650 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, STACK_SIZE) 0 1651 1652 1653 /* The number of register assigned to holding function arguments. */ 1654 1655 #define FRV_NUM_ARG_REGS 6 1656 1657 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 1658 frv_function_arg (&CUM, MODE, TYPE, NAMED, FALSE) 1659 1660 /* Define this macro if the target machine has "register windows", so that the 1661 register in which a function sees an arguments is not necessarily the same 1662 as the one in which the caller passed the argument. 1663 1664 For such machines, `FUNCTION_ARG' computes the register in which the caller 1665 passes the value, and `FUNCTION_INCOMING_ARG' should be defined in a similar 1666 fashion to tell the function being called where the arguments will arrive. 1667 1668 If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves both 1669 purposes. */ 1670 1671 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \ 1672 frv_function_arg (&CUM, MODE, TYPE, NAMED, TRUE) 1673 1674 /* A C type for declaring a variable that is used as the first argument of 1675 `FUNCTION_ARG' and other related values. For some target machines, the type 1676 `int' suffices and can hold the number of bytes of argument so far. 1677 1678 There is no need to record in `CUMULATIVE_ARGS' anything about the arguments 1679 that have been passed on the stack. The compiler has other variables to 1680 keep track of that. For target machines on which all arguments are passed 1681 on the stack, there is no need to store anything in `CUMULATIVE_ARGS'; 1682 however, the data structure must exist and should not be empty, so use 1683 `int'. */ 1684 #define CUMULATIVE_ARGS int 1685 1686 /* A C statement (sans semicolon) for initializing the variable CUM for the 1687 state at the beginning of the argument list. The variable has type 1688 `CUMULATIVE_ARGS'. The value of FNTYPE is the tree node for the data type 1689 of the function which will receive the args, or 0 if the args are to a 1690 compiler support library function. The value of INDIRECT is nonzero when 1691 processing an indirect call, for example a call through a function pointer. 1692 The value of INDIRECT is zero for a call to an explicitly named function, a 1693 library function call, or when `INIT_CUMULATIVE_ARGS' is used to find 1694 arguments for the function being compiled. 1695 1696 When processing a call to a compiler support library function, LIBNAME 1697 identifies which one. It is a `symbol_ref' rtx which contains the name of 1698 the function, as a string. LIBNAME is 0 when an ordinary C function call is 1699 being processed. Thus, each time this macro is called, either LIBNAME or 1700 FNTYPE is nonzero, but never both of them at once. */ 1701 1702 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 1703 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, FNDECL, FALSE) 1704 1705 /* Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of finding the 1706 arguments for the function being compiled. If this macro is undefined, 1707 `INIT_CUMULATIVE_ARGS' is used instead. 1708 1709 The value passed for LIBNAME is always 0, since library routines with 1710 special calling conventions are never compiled with GCC. The argument 1711 LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'. */ 1712 1713 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM, FNTYPE, LIBNAME) \ 1714 frv_init_cumulative_args (&CUM, FNTYPE, LIBNAME, NULL, TRUE) 1715 1716 /* A C statement (sans semicolon) to update the summarizer variable CUM to 1717 advance past an argument in the argument list. The values MODE, TYPE and 1718 NAMED describe that argument. Once this is done, the variable CUM is 1719 suitable for analyzing the *following* argument with `FUNCTION_ARG', etc. 1720 1721 This macro need not do anything if the argument in question was passed on 1722 the stack. The compiler knows how to track the amount of stack space used 1723 for arguments without any special help. */ 1724 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 1725 frv_function_arg_advance (&CUM, MODE, TYPE, NAMED) 1726 1727 /* If defined, a C expression that gives the alignment boundary, in bits, of an 1728 argument with the specified mode and type. If it is not defined, 1729 `PARM_BOUNDARY' is used for all arguments. */ 1730 1731 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \ 1732 frv_function_arg_boundary (MODE, TYPE) 1733 1734 /* A C expression that is nonzero if REGNO is the number of a hard register in 1735 which function arguments are sometimes passed. This does *not* include 1736 implicit arguments such as the static chain and the structure-value address. 1737 On many machines, no registers can be used for this purpose since all 1738 function arguments are pushed on the stack. */ 1739 #define FUNCTION_ARG_REGNO_P(REGNO) \ 1740 ((REGNO) >= FIRST_ARG_REGNUM && ((REGNO) <= LAST_ARG_REGNUM)) 1741 1742 1743 /* How Scalar Function Values are Returned. */ 1744 1745 /* The number of the hard register that is used to return a scalar value from a 1746 function call. */ 1747 #define RETURN_VALUE_REGNUM (GPR_FIRST + 8) 1748 1749 #define FUNCTION_VALUE_REGNO_P(REGNO) frv_function_value_regno_p (REGNO) 1750 1751 1752 /* How Large Values are Returned. */ 1753 1754 /* The number of the register that is used to pass the structure 1755 value address. */ 1756 #define FRV_STRUCT_VALUE_REGNUM (GPR_FIRST + 3) 1757 1758 1759 /* Function Entry and Exit. */ 1760 1761 /* Define this macro as a C expression that is nonzero if the return 1762 instruction or the function epilogue ignores the value of the stack pointer; 1763 in other words, if it is safe to delete an instruction to adjust the stack 1764 pointer before a return from the function. 1765 1766 Note that this macro's value is relevant only for functions for which frame 1767 pointers are maintained. It is never safe to delete a final stack 1768 adjustment in a function that has no frame pointer, and the compiler knows 1769 this regardless of `EXIT_IGNORE_STACK'. */ 1770 #define EXIT_IGNORE_STACK 1 1771 1772 /* Generating Code for Profiling. */ 1773 1774 /* A C statement or compound statement to output to FILE some assembler code to 1775 call the profiling subroutine `mcount'. Before calling, the assembler code 1776 must load the address of a counter variable into a register where `mcount' 1777 expects to find the address. The name of this variable is `LP' followed by 1778 the number LABELNO, so you would generate the name using `LP%d' in a 1779 `fprintf'. 1780 1781 The details of how the address should be passed to `mcount' are determined 1782 by your operating system environment, not by GCC. To figure them out, 1783 compile a small program for profiling using the system's installed C 1784 compiler and look at the assembler code that results. 1785 1786 This declaration must be present, but it can be an abort if profiling is 1787 not implemented. */ 1788 1789 #define FUNCTION_PROFILER(FILE, LABELNO) 1790 1791 /* Trampolines for Nested Functions. */ 1792 1793 /* A C expression for the size in bytes of the trampoline, as an integer. */ 1794 #define TRAMPOLINE_SIZE frv_trampoline_size () 1795 1796 /* Alignment required for trampolines, in bits. 1797 1798 If you don't define this macro, the value of `BIGGEST_ALIGNMENT' is used for 1799 aligning trampolines. */ 1800 #define TRAMPOLINE_ALIGNMENT (TARGET_FDPIC ? 64 : 32) 1801 1802 /* Define this macro if trampolines need a special subroutine to do their work. 1803 The macro should expand to a series of `asm' statements which will be 1804 compiled with GCC. They go in a library function named 1805 `__transfer_from_trampoline'. 1806 1807 If you need to avoid executing the ordinary prologue code of a compiled C 1808 function when you jump to the subroutine, you can do so by placing a special 1809 label of your own in the assembler code. Use one `asm' statement to 1810 generate an assembler label, and another to make the label global. Then 1811 trampolines can use that label to jump directly to your special assembler 1812 code. */ 1813 1814 #ifdef __FRV_UNDERSCORE__ 1815 #define TRAMPOLINE_TEMPLATE_NAME "___trampoline_template" 1816 #else 1817 #define TRAMPOLINE_TEMPLATE_NAME "__trampoline_template" 1818 #endif 1819 1820 #define Twrite _write 1821 1822 #if ! __FRV_FDPIC__ 1823 #define TRANSFER_FROM_TRAMPOLINE \ 1824 extern int Twrite (int, const void *, unsigned); \ 1825 \ 1826 void \ 1827 __trampoline_setup (short * addr, int size, int fnaddr, int sc) \ 1828 { \ 1829 extern short __trampoline_template[]; \ 1830 short * to = addr; \ 1831 short * from = &__trampoline_template[0]; \ 1832 int i; \ 1833 \ 1834 if (size < 20) \ 1835 { \ 1836 Twrite (2, "__trampoline_setup bad size\n", \ 1837 sizeof ("__trampoline_setup bad size\n") - 1); \ 1838 exit (-1); \ 1839 } \ 1840 \ 1841 to[0] = from[0]; \ 1842 to[1] = (short)(fnaddr); \ 1843 to[2] = from[2]; \ 1844 to[3] = (short)(sc); \ 1845 to[4] = from[4]; \ 1846 to[5] = (short)(fnaddr >> 16); \ 1847 to[6] = from[6]; \ 1848 to[7] = (short)(sc >> 16); \ 1849 to[8] = from[8]; \ 1850 to[9] = from[9]; \ 1851 \ 1852 for (i = 0; i < 20; i++) \ 1853 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1854 } \ 1855 \ 1856 __asm__("\n" \ 1857 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1858 "\t.text\n" \ 1859 TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1860 "\tsetlos #0, gr6\n" /* jump register */ \ 1861 "\tsetlos #0, gr7\n" /* static chain */ \ 1862 "\tsethi #0, gr6\n" \ 1863 "\tsethi #0, gr7\n" \ 1864 "\tjmpl @(gr0,gr6)\n"); 1865 #else 1866 #define TRANSFER_FROM_TRAMPOLINE \ 1867 extern int Twrite (int, const void *, unsigned); \ 1868 \ 1869 void \ 1870 __trampoline_setup (addr, size, fnaddr, sc) \ 1871 short * addr; \ 1872 int size; \ 1873 int fnaddr; \ 1874 int sc; \ 1875 { \ 1876 extern short __trampoline_template[]; \ 1877 short * from = &__trampoline_template[0]; \ 1878 int i; \ 1879 short **desc = (short **)addr; \ 1880 short * to = addr + 4; \ 1881 \ 1882 if (size != 32) \ 1883 { \ 1884 Twrite (2, "__trampoline_setup bad size\n", \ 1885 sizeof ("__trampoline_setup bad size\n") - 1); \ 1886 exit (-1); \ 1887 } \ 1888 \ 1889 /* Create a function descriptor with the address of the code below 1890 and NULL as the FDPIC value. We don't need the real GOT value 1891 here, since we don't use it, so we use NULL, that is just as 1892 good. */ \ 1893 desc[0] = to; \ 1894 desc[1] = NULL; \ 1895 size -= 8; \ 1896 \ 1897 to[0] = from[0]; \ 1898 to[1] = (short)(fnaddr); \ 1899 to[2] = from[2]; \ 1900 to[3] = (short)(sc); \ 1901 to[4] = from[4]; \ 1902 to[5] = (short)(fnaddr >> 16); \ 1903 to[6] = from[6]; \ 1904 to[7] = (short)(sc >> 16); \ 1905 to[8] = from[8]; \ 1906 to[9] = from[9]; \ 1907 to[10] = from[10]; \ 1908 to[11] = from[11]; \ 1909 \ 1910 for (i = 0; i < size; i++) \ 1911 __asm__ volatile ("dcf @(%0,%1)\n\tici @(%0,%1)" :: "r" (to), "r" (i)); \ 1912 } \ 1913 \ 1914 __asm__("\n" \ 1915 "\t.globl " TRAMPOLINE_TEMPLATE_NAME "\n" \ 1916 "\t.text\n" \ 1917 TRAMPOLINE_TEMPLATE_NAME ":\n" \ 1918 "\tsetlos #0, gr6\n" /* Jump register. */ \ 1919 "\tsetlos #0, gr7\n" /* Static chain. */ \ 1920 "\tsethi #0, gr6\n" \ 1921 "\tsethi #0, gr7\n" \ 1922 "\tldd @(gr6,gr0),gr14\n" \ 1923 "\tjmpl @(gr14,gr0)\n" \ 1924 ); 1925 #endif 1926 1927 1928 /* Addressing Modes. */ 1929 1930 /* A number, the maximum number of registers that can appear in a valid memory 1931 address. Note that it is up to you to specify a value equal to the maximum 1932 number that `TARGET_LEGITIMATE_ADDRESS_P' would ever accept. */ 1933 #define MAX_REGS_PER_ADDRESS 2 1934 1935 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 1936 use as a base register. For hard registers, it should always accept those 1937 which the hardware permits and reject the others. Whether the macro accepts 1938 or rejects pseudo registers must be controlled by `REG_OK_STRICT' as 1939 described above. This usually requires two variant definitions, of which 1940 `REG_OK_STRICT' controls the one actually used. */ 1941 #ifdef REG_OK_STRICT 1942 #define REG_OK_FOR_BASE_P(X) GPR_P (REGNO (X)) 1943 #else 1944 #define REG_OK_FOR_BASE_P(X) GPR_AP_OR_PSEUDO_P (REGNO (X)) 1945 #endif 1946 1947 /* A C expression that is nonzero if X (assumed to be a `reg' RTX) is valid for 1948 use as an index register. 1949 1950 The difference between an index register and a base register is that the 1951 index register may be scaled. If an address involves the sum of two 1952 registers, neither one of them scaled, then either one may be labeled the 1953 "base" and the other the "index"; but whichever labeling is used must fit 1954 the machine's constraints of which registers may serve in each capacity. 1955 The compiler will try both labelings, looking for one that is valid, and 1956 will reload one or both registers only if neither labeling works. */ 1957 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_BASE_P (X) 1958 1959 #define FIND_BASE_TERM frv_find_base_term 1960 1961 /* A C expression that is nonzero if X is a legitimate constant for an 1962 immediate operand on the target machine. You can assume that X satisfies 1963 `CONSTANT_P', so you need not check this. In fact, `1' is a suitable 1964 definition for this macro on machines where anything `CONSTANT_P' is valid. */ 1965 #define LEGITIMATE_CONSTANT_P(X) frv_legitimate_constant_p (X) 1966 1967 /* The load-and-update commands allow pre-modification in addresses. 1968 The index has to be in a register. */ 1969 #define HAVE_PRE_MODIFY_REG 1 1970 1971 1972 /* We define extra CC modes in frv-modes.def so we need a selector. */ 1973 1974 #define SELECT_CC_MODE frv_select_cc_mode 1975 1976 /* A C expression whose value is one if it is always safe to reverse a 1977 comparison whose mode is MODE. If `SELECT_CC_MODE' can ever return MODE for 1978 a floating-point inequality comparison, then `REVERSIBLE_CC_MODE (MODE)' 1979 must be zero. 1980 1981 You need not define this macro if it would always returns zero or if the 1982 floating-point format is anything other than `IEEE_FLOAT_FORMAT'. For 1983 example, here is the definition used on the SPARC, where floating-point 1984 inequality comparisons are always given `CCFPEmode': 1985 1986 #define REVERSIBLE_CC_MODE(MODE) ((MODE) != CCFPEmode) */ 1987 1988 /* On frv, don't consider floating point comparisons to be reversible. In 1989 theory, fp equality comparisons can be reversible. */ 1990 #define REVERSIBLE_CC_MODE(MODE) \ 1991 ((MODE) == CCmode || (MODE) == CC_UNSmode || (MODE) == CC_NZmode) 1992 1993 /* Frv CCR_MODE's are not reversible. */ 1994 #define REVERSE_CONDEXEC_PREDICATES_P(x,y) 0 1995 1996 1997 /* Describing Relative Costs of Operations. */ 1998 1999 /* A C expression for the cost of moving data from a register in class FROM to 2000 one in class TO. The classes are expressed using the enumeration values 2001 such as `GENERAL_REGS'. A value of 4 is the default; other values are 2002 interpreted relative to that. 2003 2004 It is not required that the cost always equal 2 when FROM is the same as TO; 2005 on some machines it is expensive to move between registers if they are not 2006 general registers. 2007 2008 If reload sees an insn consisting of a single `set' between two hard 2009 registers, and if `REGISTER_MOVE_COST' applied to their classes returns a 2010 value of 2, reload does not check to ensure that the constraints of the insn 2011 are met. Setting a cost of other than 2 will allow reload to verify that 2012 the constraints are met. You should do this if the `movM' pattern's 2013 constraints do not allow such copying. */ 2014 #define REGISTER_MOVE_COST(MODE, FROM, TO) frv_register_move_cost (FROM, TO) 2015 2016 /* A C expression for the cost of moving data of mode M between a register and 2017 memory. A value of 2 is the default; this cost is relative to those in 2018 `REGISTER_MOVE_COST'. 2019 2020 If moving between registers and memory is more expensive than between two 2021 registers, you should define this macro to express the relative cost. */ 2022 #define MEMORY_MOVE_COST(M,C,I) 4 2023 2024 /* A C expression for the cost of a branch instruction. A value of 1 is the 2025 default; other values are interpreted relative to that. */ 2026 #define BRANCH_COST(speed_p, predictable_p) frv_branch_cost_int 2027 2028 /* Define this macro as a C expression which is nonzero if accessing less than 2029 a word of memory (i.e. a `char' or a `short') is no faster than accessing a 2030 word of memory, i.e., if such access require more than one instruction or if 2031 there is no difference in cost between byte and (aligned) word loads. 2032 2033 When this macro is not defined, the compiler will access a field by finding 2034 the smallest containing object; when it is defined, a fullword load will be 2035 used if alignment permits. Unless bytes accesses are faster than word 2036 accesses, using word accesses is preferable since it may eliminate 2037 subsequent memory access if subsequent accesses occur to other fields in the 2038 same word of the structure, but to different bytes. */ 2039 #define SLOW_BYTE_ACCESS 1 2040 2041 /* Define this macro if it is as good or better to call a constant function 2042 address than to call an address kept in a register. */ 2043 #define NO_FUNCTION_CSE 2044 2045 2046 /* Dividing the output into sections. */ 2047 2048 /* A C expression whose value is a string containing the assembler operation 2049 that should precede instructions and read-only data. Normally `".text"' is 2050 right. */ 2051 #define TEXT_SECTION_ASM_OP "\t.text" 2052 2053 /* A C expression whose value is a string containing the assembler operation to 2054 identify the following data as writable initialized data. Normally 2055 `".data"' is right. */ 2056 #define DATA_SECTION_ASM_OP "\t.data" 2057 2058 /* If defined, a C expression whose value is a string containing the 2059 assembler operation to identify the following data as 2060 uninitialized global data. If not defined, and neither 2061 `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined, 2062 uninitialized global data will be output in the data section if 2063 `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be 2064 used. */ 2065 #define BSS_SECTION_ASM_OP "\t.section .bss,\"aw\"" 2066 2067 /* Short Data Support */ 2068 #define SDATA_SECTION_ASM_OP "\t.section .sdata,\"aw\"" 2069 2070 /* On svr4, we *do* have support for the .init and .fini sections, and we 2071 can put stuff in there to be executed before and after `main'. We let 2072 crtstuff.c and other files know this by defining the following symbols. 2073 The definitions say how to change sections to the .init and .fini 2074 sections. This is the same for all known svr4 assemblers. 2075 2076 The standard System V.4 macros will work, but they look ugly in the 2077 assembly output, so redefine them. */ 2078 2079 #undef INIT_SECTION_ASM_OP 2080 #undef FINI_SECTION_ASM_OP 2081 #define INIT_SECTION_ASM_OP "\t.section .init,\"ax\"" 2082 #define FINI_SECTION_ASM_OP "\t.section .fini,\"ax\"" 2083 2084 #undef CTORS_SECTION_ASM_OP 2085 #undef DTORS_SECTION_ASM_OP 2086 #define CTORS_SECTION_ASM_OP "\t.section\t.ctors,\"a\"" 2087 #define DTORS_SECTION_ASM_OP "\t.section\t.dtors,\"a\"" 2088 2089 /* A C expression whose value is a string containing the assembler operation to 2090 switch to the fixup section that records all initialized pointers in a -fpic 2091 program so they can be changed program startup time if the program is loaded 2092 at a different address than linked for. */ 2093 #define FIXUP_SECTION_ASM_OP "\t.section .rofixup,\"a\"" 2094 2095 /* Position Independent Code. */ 2096 2097 /* A C expression that is nonzero if X is a legitimate immediate operand on the 2098 target machine when generating position independent code. You can assume 2099 that X satisfies `CONSTANT_P', so you need not check this. You can also 2100 assume FLAG_PIC is true, so you need not check it either. You need not 2101 define this macro if all constants (including `SYMBOL_REF') can be immediate 2102 operands when generating position independent code. */ 2103 #define LEGITIMATE_PIC_OPERAND_P(X) \ 2104 ( GET_CODE (X) == CONST_INT \ 2105 || GET_CODE (X) == CONST_DOUBLE \ 2106 || (GET_CODE (X) == HIGH && GET_CODE (XEXP (X, 0)) == CONST_INT) \ 2107 || got12_operand (X, VOIDmode)) \ 2108 2109 2110 /* The Overall Framework of an Assembler File. */ 2111 2112 /* A C string constant describing how to begin a comment in the target 2113 assembler language. The compiler assumes that the comment will end at the 2114 end of the line. */ 2115 #define ASM_COMMENT_START ";" 2116 2117 /* A C string constant for text to be output before each `asm' statement or 2118 group of consecutive ones. Normally this is `"#APP"', which is a comment 2119 that has no effect on most assemblers but tells the GNU assembler that it 2120 must check the lines that follow for all valid assembler constructs. */ 2121 #define ASM_APP_ON "#APP\n" 2122 2123 /* A C string constant for text to be output after each `asm' statement or 2124 group of consecutive ones. Normally this is `"#NO_APP"', which tells the 2125 GNU assembler to resume making the time-saving assumptions that are valid 2126 for ordinary compiler output. */ 2127 #define ASM_APP_OFF "#NO_APP\n" 2128 2129 2130 /* Output of Data. */ 2131 2132 /* This is how to output a label to dwarf/dwarf2. */ 2133 #define ASM_OUTPUT_DWARF_ADDR(STREAM, LABEL) \ 2134 do { \ 2135 fprintf (STREAM, "\t.picptr\t"); \ 2136 assemble_name (STREAM, LABEL); \ 2137 } while (0) 2138 2139 /* Whether to emit the gas specific dwarf2 line number support. */ 2140 #define DWARF2_ASM_LINE_DEBUG_INFO (TARGET_DEBUG_LOC) 2141 2142 /* Output of Uninitialized Variables. */ 2143 2144 /* A C statement (sans semicolon) to output to the stdio stream STREAM the 2145 assembler definition of a local-common-label named NAME whose size is SIZE 2146 bytes. The variable ROUNDED is the size rounded up to whatever alignment 2147 the caller wants. 2148 2149 Use the expression `assemble_name (STREAM, NAME)' to output the name itself; 2150 before and after that, output the additional assembler syntax for defining 2151 the name, and a newline. 2152 2153 This macro controls how the assembler definitions of uninitialized static 2154 variables are output. */ 2155 #undef ASM_OUTPUT_LOCAL 2156 2157 /* Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a separate, 2158 explicit argument. If you define this macro, it is used in place of 2159 `ASM_OUTPUT_LOCAL', and gives you more flexibility in handling the required 2160 alignment of the variable. The alignment is specified as the number of 2161 bits. 2162 2163 Defined in svr4.h. */ 2164 #undef ASM_OUTPUT_ALIGNED_LOCAL 2165 2166 /* This is for final.c, because it is used by ASM_DECLARE_OBJECT_NAME. */ 2167 extern int size_directive_output; 2168 2169 /* Like `ASM_OUTPUT_ALIGNED_LOCAL' except that it takes an additional 2170 parameter - the DECL of variable to be output, if there is one. 2171 This macro can be called with DECL == NULL_TREE. If you define 2172 this macro, it is used in place of `ASM_OUTPUT_LOCAL' and 2173 `ASM_OUTPUT_ALIGNED_LOCAL', and gives you more flexibility in 2174 handling the destination of the variable. */ 2175 #undef ASM_OUTPUT_ALIGNED_DECL_LOCAL 2176 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ 2177 do { \ 2178 if ((SIZE) > 0 && (SIZE) <= g_switch_value) \ 2179 switch_to_section (get_named_section (NULL, ".sbss", 0)); \ 2180 else \ 2181 switch_to_section (bss_section); \ 2182 ASM_OUTPUT_ALIGN (STREAM, floor_log2 ((ALIGN) / BITS_PER_UNIT)); \ 2183 ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL); \ 2184 ASM_OUTPUT_SKIP (STREAM, (SIZE) ? (SIZE) : 1); \ 2185 } while (0) 2186 2187 2188 /* Output and Generation of Labels. */ 2189 2190 /* A C statement (sans semicolon) to output to the stdio stream STREAM the 2191 assembler definition of a label named NAME. Use the expression 2192 `assemble_name (STREAM, NAME)' to output the name itself; before and after 2193 that, output the additional assembler syntax for defining the name, and a 2194 newline. */ 2195 #define ASM_OUTPUT_LABEL(STREAM, NAME) \ 2196 do { \ 2197 assemble_name (STREAM, NAME); \ 2198 fputs (":\n", STREAM); \ 2199 } while (0) 2200 2201 /* Globalizing directive for a label. */ 2202 #define GLOBAL_ASM_OP "\t.globl " 2203 2204 /* A C statement to store into the string STRING a label whose name is made 2205 from the string PREFIX and the number NUM. 2206 2207 This string, when output subsequently by `assemble_name', should produce the 2208 output that `(*targetm.asm_out.internal_label)' would produce with the same PREFIX 2209 and NUM. 2210 2211 If the string begins with `*', then `assemble_name' will output the rest of 2212 the string unchanged. It is often convenient for 2213 `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way. If the string doesn't 2214 start with `*', then `ASM_OUTPUT_LABELREF' gets to output the string, and 2215 may change it. (Of course, `ASM_OUTPUT_LABELREF' is also part of your 2216 machine description, so you should know what it does on your machine.) 2217 2218 Defined in svr4.h. */ 2219 #undef ASM_GENERATE_INTERNAL_LABEL 2220 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 2221 do { \ 2222 sprintf (LABEL, "*.%s%ld", PREFIX, (long)NUM); \ 2223 } while (0) 2224 2225 2226 /* Macros Controlling Initialization Routines. */ 2227 2228 /* If defined, a C string constant for the assembler operation to identify the 2229 following data as initialization code. If not defined, GCC will assume 2230 such a section does not exist. When you are using special sections for 2231 initialization and termination functions, this macro also controls how 2232 `crtstuff.c' and `libgcc2.c' arrange to run the initialization functions. 2233 2234 Defined in svr4.h. */ 2235 #undef INIT_SECTION_ASM_OP 2236 2237 /* If defined, `main' will call `__main' despite the presence of 2238 `INIT_SECTION_ASM_OP'. This macro should be defined for systems where the 2239 init section is not actually run automatically, but is still useful for 2240 collecting the lists of constructors and destructors. */ 2241 #define INVOKE__main 2242 2243 /* Output of Assembler Instructions. */ 2244 2245 /* A C initializer containing the assembler's names for the machine registers, 2246 each one as a C string constant. This is what translates register numbers 2247 in the compiler into assembler language. */ 2248 #define REGISTER_NAMES \ 2249 { \ 2250 "gr0", "sp", "fp", "gr3", "gr4", "gr5", "gr6", "gr7", \ 2251 "gr8", "gr9", "gr10", "gr11", "gr12", "gr13", "gr14", "gr15", \ 2252 "gr16", "gr17", "gr18", "gr19", "gr20", "gr21", "gr22", "gr23", \ 2253 "gr24", "gr25", "gr26", "gr27", "gr28", "gr29", "gr30", "gr31", \ 2254 "gr32", "gr33", "gr34", "gr35", "gr36", "gr37", "gr38", "gr39", \ 2255 "gr40", "gr41", "gr42", "gr43", "gr44", "gr45", "gr46", "gr47", \ 2256 "gr48", "gr49", "gr50", "gr51", "gr52", "gr53", "gr54", "gr55", \ 2257 "gr56", "gr57", "gr58", "gr59", "gr60", "gr61", "gr62", "gr63", \ 2258 \ 2259 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7", \ 2260 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15", \ 2261 "fr16", "fr17", "fr18", "fr19", "fr20", "fr21", "fr22", "fr23", \ 2262 "fr24", "fr25", "fr26", "fr27", "fr28", "fr29", "fr30", "fr31", \ 2263 "fr32", "fr33", "fr34", "fr35", "fr36", "fr37", "fr38", "fr39", \ 2264 "fr40", "fr41", "fr42", "fr43", "fr44", "fr45", "fr46", "fr47", \ 2265 "fr48", "fr49", "fr50", "fr51", "fr52", "fr53", "fr54", "fr55", \ 2266 "fr56", "fr57", "fr58", "fr59", "fr60", "fr61", "fr62", "fr63", \ 2267 \ 2268 "fcc0", "fcc1", "fcc2", "fcc3", "icc0", "icc1", "icc2", "icc3", \ 2269 "cc0", "cc1", "cc2", "cc3", "cc4", "cc5", "cc6", "cc7", \ 2270 "acc0", "acc1", "acc2", "acc3", "acc4", "acc5", "acc6", "acc7", \ 2271 "acc8", "acc9", "acc10", "acc11", \ 2272 "accg0","accg1","accg2","accg3","accg4","accg5","accg6","accg7", \ 2273 "accg8", "accg9", "accg10", "accg11", \ 2274 "ap", "lr", "lcr", "iacc0h", "iacc0l" \ 2275 } 2276 2277 /* Define this macro if you are using an unusual assembler that 2278 requires different names for the machine instructions. 2279 2280 The definition is a C statement or statements which output an 2281 assembler instruction opcode to the stdio stream STREAM. The 2282 macro-operand PTR is a variable of type `char *' which points to 2283 the opcode name in its "internal" form--the form that is written 2284 in the machine description. The definition should output the 2285 opcode name to STREAM, performing any translation you desire, and 2286 increment the variable PTR to point at the end of the opcode so 2287 that it will not be output twice. 2288 2289 In fact, your macro definition may process less than the entire 2290 opcode name, or more than the opcode name; but if you want to 2291 process text that includes `%'-sequences to substitute operands, 2292 you must take care of the substitution yourself. Just be sure to 2293 increment PTR over whatever text should not be output normally. 2294 2295 If you need to look at the operand values, they can be found as the 2296 elements of `recog_operand'. 2297 2298 If the macro definition does nothing, the instruction is output in 2299 the usual way. */ 2300 2301 #define ASM_OUTPUT_OPCODE(STREAM, PTR)\ 2302 (PTR) = frv_asm_output_opcode (STREAM, PTR) 2303 2304 /* If defined, a C statement to be executed just prior to the output 2305 of assembler code for INSN, to modify the extracted operands so 2306 they will be output differently. 2307 2308 Here the argument OPVEC is the vector containing the operands 2309 extracted from INSN, and NOPERANDS is the number of elements of 2310 the vector which contain meaningful data for this insn. The 2311 contents of this vector are what will be used to convert the insn 2312 template into assembler code, so you can change the assembler 2313 output by changing the contents of the vector. 2314 2315 This macro is useful when various assembler syntaxes share a single 2316 file of instruction patterns; by defining this macro differently, 2317 you can cause a large class of instructions to be output 2318 differently (such as with rearranged operands). Naturally, 2319 variations in assembler syntax affecting individual insn patterns 2320 ought to be handled by writing conditional output routines in 2321 those patterns. 2322 2323 If this macro is not defined, it is equivalent to a null statement. */ 2324 2325 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS)\ 2326 frv_final_prescan_insn (INSN, OPVEC, NOPERANDS) 2327 2328 2329 /* A C compound statement to output to stdio stream STREAM the assembler syntax 2330 for an instruction operand X. X is an RTL expression. 2331 2332 CODE is a value that can be used to specify one of several ways of printing 2333 the operand. It is used when identical operands must be printed differently 2334 depending on the context. CODE comes from the `%' specification that was 2335 used to request printing of the operand. If the specification was just 2336 `%DIGIT' then CODE is 0; if the specification was `%LTR DIGIT' then CODE is 2337 the ASCII code for LTR. 2338 2339 If X is a register, this macro should print the register's name. The names 2340 can be found in an array `reg_names' whose type is `char *[]'. `reg_names' 2341 is initialized from `REGISTER_NAMES'. 2342 2343 When the machine description has a specification `%PUNCT' (a `%' followed by 2344 a punctuation character), this macro is called with a null pointer for X and 2345 the punctuation character for CODE. */ 2346 #define PRINT_OPERAND(STREAM, X, CODE) frv_print_operand (STREAM, X, CODE) 2347 2348 /* A C expression which evaluates to true if CODE is a valid punctuation 2349 character for use in the `PRINT_OPERAND' macro. If 2350 `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no punctuation 2351 characters (except for the standard one, `%') are used in this way. */ 2352 /* . == gr0 2353 # == hint operand -- always zero for now 2354 @ == small data base register (gr16) 2355 ~ == pic register (gr17) 2356 * == temporary integer CCR register (cr3) 2357 & == temporary integer ICC register (icc3) */ 2358 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 2359 ((CODE) == '.' || (CODE) == '#' || (CODE) == '@' || (CODE) == '~' \ 2360 || (CODE) == '*' || (CODE) == '&') 2361 2362 /* A C compound statement to output to stdio stream STREAM the assembler syntax 2363 for an instruction operand that is a memory reference whose address is X. X 2364 is an RTL expression. 2365 2366 On some machines, the syntax for a symbolic address depends on the section 2367 that the address refers to. On these machines, define the macro 2368 `ENCODE_SECTION_INFO' to store the information into the `symbol_ref', and 2369 then check for it here. 2370 2371 This declaration must be present. */ 2372 #define PRINT_OPERAND_ADDRESS(STREAM, X) frv_print_operand_address (STREAM, X) 2373 2374 /* If defined, C string expressions to be used for the `%R', `%L', `%U', and 2375 `%I' options of `asm_fprintf' (see `final.c'). These are useful when a 2376 single `md' file must support multiple assembler formats. In that case, the 2377 various `tm.h' files can define these macros differently. 2378 2379 USER_LABEL_PREFIX is defined in svr4.h. */ 2380 #undef USER_LABEL_PREFIX 2381 #define USER_LABEL_PREFIX "" 2382 #define REGISTER_PREFIX "" 2383 #define LOCAL_LABEL_PREFIX "." 2384 #define IMMEDIATE_PREFIX "#" 2385 2386 2387 /* Output of dispatch tables. */ 2388 2389 /* This macro should be provided on machines where the addresses in a dispatch 2390 table are relative to the table's own address. 2391 2392 The definition should be a C statement to output to the stdio stream STREAM 2393 an assembler pseudo-instruction to generate a difference between two labels. 2394 VALUE and REL are the numbers of two internal labels. The definitions of 2395 these labels are output using `(*targetm.asm_out.internal_label)', and they must be 2396 printed in the same way here. For example, 2397 2398 fprintf (STREAM, "\t.word L%d-L%d\n", VALUE, REL) */ 2399 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 2400 fprintf (STREAM, "\t.word .L%d-.L%d\n", VALUE, REL) 2401 2402 /* This macro should be provided on machines where the addresses in a dispatch 2403 table are absolute. 2404 2405 The definition should be a C statement to output to the stdio stream STREAM 2406 an assembler pseudo-instruction to generate a reference to a label. VALUE 2407 is the number of an internal label whose definition is output using 2408 `(*targetm.asm_out.internal_label)'. For example, 2409 2410 fprintf (STREAM, "\t.word L%d\n", VALUE) */ 2411 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 2412 fprintf (STREAM, "\t.word .L%d\n", VALUE) 2413 2414 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic) 2415 2416 /* Assembler Commands for Exception Regions. */ 2417 2418 /* Define this macro to 0 if your target supports DWARF 2 frame unwind 2419 information, but it does not yet work with exception handling. Otherwise, 2420 if your target supports this information (if it defines 2421 `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or 2422 `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1. 2423 2424 If this macro is defined to 1, the DWARF 2 unwinder will be the default 2425 exception handling mechanism; otherwise, setjmp/longjmp will be used by 2426 default. 2427 2428 If this macro is defined to anything, the DWARF 2 unwinder will be used 2429 instead of inline unwinders and __unwind_function in the non-setjmp case. */ 2430 #define DWARF2_UNWIND_INFO 1 2431 2432 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LR_REGNO) 2433 2434 /* Assembler Commands for Alignment. */ 2435 2436 /* A C statement to output to the stdio stream STREAM an assembler instruction 2437 to advance the location counter by NBYTES bytes. Those bytes should be zero 2438 when loaded. NBYTES will be a C expression of type `int'. 2439 2440 Defined in svr4.h. */ 2441 #undef ASM_OUTPUT_SKIP 2442 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \ 2443 fprintf (STREAM, "\t.zero\t%u\n", (int)(NBYTES)) 2444 2445 /* A C statement to output to the stdio stream STREAM an assembler command to 2446 advance the location counter to a multiple of 2 to the POWER bytes. POWER 2447 will be a C expression of type `int'. */ 2448 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 2449 fprintf ((STREAM), "\t.p2align %d\n", (POWER)) 2450 2451 /* Inside the text section, align with unpacked nops rather than zeros. */ 2452 #define ASM_OUTPUT_ALIGN_WITH_NOP(STREAM, POWER) \ 2453 fprintf ((STREAM), "\t.p2alignl %d,0x80880000\n", (POWER)) 2454 2455 /* Macros Affecting all Debug Formats. */ 2456 2457 /* A C expression that returns the DBX register number for the compiler 2458 register number REGNO. In simple cases, the value of this expression may be 2459 REGNO itself. But sometimes there are some registers that the compiler 2460 knows about and DBX does not, or vice versa. In such cases, some register 2461 may need to have one number in the compiler and another for DBX. 2462 2463 If two registers have consecutive numbers inside GCC, and they can be 2464 used as a pair to hold a multiword value, then they *must* have consecutive 2465 numbers after renumbering with `DBX_REGISTER_NUMBER'. Otherwise, debuggers 2466 will be unable to access such a pair, because they expect register pairs to 2467 be consecutive in their own numbering scheme. 2468 2469 If you find yourself defining `DBX_REGISTER_NUMBER' in way that does not 2470 preserve register pairs, then what you must do instead is redefine the 2471 actual register numbering scheme. 2472 2473 This declaration is required. */ 2474 #define DBX_REGISTER_NUMBER(REGNO) (REGNO) 2475 2476 /* A C expression that returns the type of debugging output GCC produces 2477 when the user specifies `-g' or `-ggdb'. Define this if you have arranged 2478 for GCC to support more than one format of debugging output. Currently, 2479 the allowable values are `DBX_DEBUG', `SDB_DEBUG', `DWARF_DEBUG', 2480 `DWARF2_DEBUG', and `XCOFF_DEBUG'. 2481 2482 The value of this macro only affects the default debugging output; the user 2483 can always get a specific type of output by using `-gstabs', `-gcoff', 2484 `-gdwarf-1', `-gdwarf-2', or `-gxcoff'. 2485 2486 Defined in svr4.h. */ 2487 #undef PREFERRED_DEBUGGING_TYPE 2488 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG 2489 2490 /* Miscellaneous Parameters. */ 2491 2492 /* An alias for a machine mode name. This is the machine mode that elements of 2493 a jump-table should have. */ 2494 #define CASE_VECTOR_MODE SImode 2495 2496 /* Define this macro if operations between registers with integral mode smaller 2497 than a word are always performed on the entire register. Most RISC machines 2498 have this property and most CISC machines do not. */ 2499 #define WORD_REGISTER_OPERATIONS 2500 2501 /* Define this macro to be a C expression indicating when insns that read 2502 memory in MODE, an integral mode narrower than a word, set the bits outside 2503 of MODE to be either the sign-extension or the zero-extension of the data 2504 read. Return `SIGN_EXTEND' for values of MODE for which the insn 2505 sign-extends, `ZERO_EXTEND' for which it zero-extends, and `UNKNOWN' for other 2506 modes. 2507 2508 This macro is not called with MODE non-integral or with a width greater than 2509 or equal to `BITS_PER_WORD', so you may return any value in this case. Do 2510 not define this macro if it would always return `UNKNOWN'. On machines where 2511 this macro is defined, you will normally define it as the constant 2512 `SIGN_EXTEND' or `ZERO_EXTEND'. */ 2513 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND 2514 2515 /* Define if loading short immediate values into registers sign extends. */ 2516 #define SHORT_IMMEDIATES_SIGN_EXTEND 2517 2518 /* The maximum number of bytes that a single instruction can move quickly from 2519 memory to memory. */ 2520 #define MOVE_MAX 8 2521 2522 /* A C expression which is nonzero if on this machine it is safe to "convert" 2523 an integer of INPREC bits to one of OUTPREC bits (where OUTPREC is smaller 2524 than INPREC) by merely operating on it as if it had only OUTPREC bits. 2525 2526 On many machines, this expression can be 1. 2527 2528 When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for modes for 2529 which `MODES_TIEABLE_P' is 0, suboptimal code can result. If this is the 2530 case, making `TRULY_NOOP_TRUNCATION' return 0 in such cases may improve 2531 things. */ 2532 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 2533 2534 /* An alias for the machine mode for pointers. On most machines, define this 2535 to be the integer mode corresponding to the width of a hardware pointer; 2536 `SImode' on 32-bit machine or `DImode' on 64-bit machines. On some machines 2537 you must define this to be one of the partial integer modes, such as 2538 `PSImode'. 2539 2540 The width of `Pmode' must be at least as large as the value of 2541 `POINTER_SIZE'. If it is not equal, you must define the macro 2542 `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to `Pmode'. */ 2543 #define Pmode SImode 2544 2545 /* An alias for the machine mode used for memory references to functions being 2546 called, in `call' RTL expressions. On most machines this should be 2547 `QImode'. */ 2548 #define FUNCTION_MODE QImode 2549 2550 /* Define this macro to handle System V style pragmas: #pragma pack and 2551 #pragma weak. Note, #pragma weak will only be supported if SUPPORT_WEAK is 2552 defined. 2553 2554 Defined in svr4.h. */ 2555 #define HANDLE_SYSV_PRAGMA 1 2556 2557 /* A C expression for the maximum number of instructions to execute via 2558 conditional execution instructions instead of a branch. A value of 2559 BRANCH_COST+1 is the default if the machine does not use 2560 cc0, and 1 if it does use cc0. */ 2561 #define MAX_CONDITIONAL_EXECUTE frv_condexec_insns 2562 2563 /* A C expression to modify the code described by the conditional if 2564 information CE_INFO, possibly updating the tests in TRUE_EXPR, and 2565 FALSE_EXPR for converting if-then and if-then-else code to conditional 2566 instructions. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if the 2567 tests cannot be converted. */ 2568 #define IFCVT_MODIFY_TESTS(CE_INFO, TRUE_EXPR, FALSE_EXPR) \ 2569 frv_ifcvt_modify_tests (CE_INFO, &TRUE_EXPR, &FALSE_EXPR) 2570 2571 /* A C expression to modify the code described by the conditional if 2572 information CE_INFO, for the basic block BB, possibly updating the tests in 2573 TRUE_EXPR, and FALSE_EXPR for converting the && and || parts of if-then or 2574 if-then-else code to conditional instructions. OLD_TRUE and OLD_FALSE are 2575 the previous tests. Set either TRUE_EXPR or FALSE_EXPR to a null pointer if 2576 the tests cannot be converted. */ 2577 #define IFCVT_MODIFY_MULTIPLE_TESTS(CE_INFO, BB, TRUE_EXPR, FALSE_EXPR) \ 2578 frv_ifcvt_modify_multiple_tests (CE_INFO, BB, &TRUE_EXPR, &FALSE_EXPR) 2579 2580 /* A C expression to modify the code described by the conditional if 2581 information CE_INFO with the new PATTERN in INSN. If PATTERN is a null 2582 pointer after the IFCVT_MODIFY_INSN macro executes, it is assumed that that 2583 insn cannot be converted to be executed conditionally. */ 2584 #define IFCVT_MODIFY_INSN(CE_INFO, PATTERN, INSN) \ 2585 (PATTERN) = frv_ifcvt_modify_insn (CE_INFO, PATTERN, INSN) 2586 2587 /* A C expression to perform any final machine dependent modifications in 2588 converting code to conditional execution in the code described by the 2589 conditional if information CE_INFO. */ 2590 #define IFCVT_MODIFY_FINAL(CE_INFO) frv_ifcvt_modify_final (CE_INFO) 2591 2592 /* A C expression to cancel any machine dependent modifications in converting 2593 code to conditional execution in the code described by the conditional if 2594 information CE_INFO. */ 2595 #define IFCVT_MODIFY_CANCEL(CE_INFO) frv_ifcvt_modify_cancel (CE_INFO) 2596 2597 /* Initialize the extra fields provided by IFCVT_EXTRA_FIELDS. */ 2598 #define IFCVT_INIT_EXTRA_FIELDS(CE_INFO) frv_ifcvt_init_extra_fields (CE_INFO) 2599 2600 /* The definition of the following macro results in that the 2nd jump 2601 optimization (after the 2nd insn scheduling) is minimal. It is 2602 necessary to define when start cycle marks of insns (TImode is used 2603 for this) is used for VLIW insn packing. Some jump optimizations 2604 make such marks invalid. These marks are corrected for some 2605 (minimal) optimizations. ??? Probably the macro is temporary. 2606 Final solution could making the 2nd jump optimizations before the 2607 2nd instruction scheduling or corrections of the marks for all jump 2608 optimizations. Although some jump optimizations are actually 2609 deoptimizations for VLIW (super-scalar) processors. */ 2610 2611 #define MINIMAL_SECOND_JUMP_OPTIMIZATION 2612 2613 2614 /* If the following macro is defined and nonzero and deterministic 2615 finite state automata are used for pipeline hazard recognition, the 2616 code making resource-constrained software pipelining is on. */ 2617 #define RCSP_SOFTWARE_PIPELINING 1 2618 2619 /* If the following macro is defined and nonzero and deterministic 2620 finite state automata are used for pipeline hazard recognition, we 2621 will try to exchange insns in queue ready to improve the schedule. 2622 The more macro value, the more tries will be made. */ 2623 #define FIRST_CYCLE_MULTIPASS_SCHEDULING 1 2624 2625 /* The following macro is used only when value of 2626 FIRST_CYCLE_MULTIPASS_SCHEDULING is nonzero. The more macro value, 2627 the more tries will be made to choose better schedule. If the 2628 macro value is zero or negative there will be no multi-pass 2629 scheduling. */ 2630 #define FIRST_CYCLE_MULTIPASS_SCHEDULING_LOOKAHEAD frv_sched_lookahead 2631 2632 enum frv_builtins 2633 { 2634 FRV_BUILTIN_MAND, 2635 FRV_BUILTIN_MOR, 2636 FRV_BUILTIN_MXOR, 2637 FRV_BUILTIN_MNOT, 2638 FRV_BUILTIN_MAVEH, 2639 FRV_BUILTIN_MSATHS, 2640 FRV_BUILTIN_MSATHU, 2641 FRV_BUILTIN_MADDHSS, 2642 FRV_BUILTIN_MADDHUS, 2643 FRV_BUILTIN_MSUBHSS, 2644 FRV_BUILTIN_MSUBHUS, 2645 FRV_BUILTIN_MPACKH, 2646 FRV_BUILTIN_MQADDHSS, 2647 FRV_BUILTIN_MQADDHUS, 2648 FRV_BUILTIN_MQSUBHSS, 2649 FRV_BUILTIN_MQSUBHUS, 2650 FRV_BUILTIN_MUNPACKH, 2651 FRV_BUILTIN_MDPACKH, 2652 FRV_BUILTIN_MBTOH, 2653 FRV_BUILTIN_MHTOB, 2654 FRV_BUILTIN_MCOP1, 2655 FRV_BUILTIN_MCOP2, 2656 FRV_BUILTIN_MROTLI, 2657 FRV_BUILTIN_MROTRI, 2658 FRV_BUILTIN_MWCUT, 2659 FRV_BUILTIN_MSLLHI, 2660 FRV_BUILTIN_MSRLHI, 2661 FRV_BUILTIN_MSRAHI, 2662 FRV_BUILTIN_MEXPDHW, 2663 FRV_BUILTIN_MEXPDHD, 2664 FRV_BUILTIN_MMULHS, 2665 FRV_BUILTIN_MMULHU, 2666 FRV_BUILTIN_MMULXHS, 2667 FRV_BUILTIN_MMULXHU, 2668 FRV_BUILTIN_MMACHS, 2669 FRV_BUILTIN_MMACHU, 2670 FRV_BUILTIN_MMRDHS, 2671 FRV_BUILTIN_MMRDHU, 2672 FRV_BUILTIN_MQMULHS, 2673 FRV_BUILTIN_MQMULHU, 2674 FRV_BUILTIN_MQMULXHU, 2675 FRV_BUILTIN_MQMULXHS, 2676 FRV_BUILTIN_MQMACHS, 2677 FRV_BUILTIN_MQMACHU, 2678 FRV_BUILTIN_MCPXRS, 2679 FRV_BUILTIN_MCPXRU, 2680 FRV_BUILTIN_MCPXIS, 2681 FRV_BUILTIN_MCPXIU, 2682 FRV_BUILTIN_MQCPXRS, 2683 FRV_BUILTIN_MQCPXRU, 2684 FRV_BUILTIN_MQCPXIS, 2685 FRV_BUILTIN_MQCPXIU, 2686 FRV_BUILTIN_MCUT, 2687 FRV_BUILTIN_MCUTSS, 2688 FRV_BUILTIN_MWTACC, 2689 FRV_BUILTIN_MWTACCG, 2690 FRV_BUILTIN_MRDACC, 2691 FRV_BUILTIN_MRDACCG, 2692 FRV_BUILTIN_MTRAP, 2693 FRV_BUILTIN_MCLRACC, 2694 FRV_BUILTIN_MCLRACCA, 2695 FRV_BUILTIN_MDUNPACKH, 2696 FRV_BUILTIN_MBTOHE, 2697 FRV_BUILTIN_MQXMACHS, 2698 FRV_BUILTIN_MQXMACXHS, 2699 FRV_BUILTIN_MQMACXHS, 2700 FRV_BUILTIN_MADDACCS, 2701 FRV_BUILTIN_MSUBACCS, 2702 FRV_BUILTIN_MASACCS, 2703 FRV_BUILTIN_MDADDACCS, 2704 FRV_BUILTIN_MDSUBACCS, 2705 FRV_BUILTIN_MDASACCS, 2706 FRV_BUILTIN_MABSHS, 2707 FRV_BUILTIN_MDROTLI, 2708 FRV_BUILTIN_MCPLHI, 2709 FRV_BUILTIN_MCPLI, 2710 FRV_BUILTIN_MDCUTSSI, 2711 FRV_BUILTIN_MQSATHS, 2712 FRV_BUILTIN_MQLCLRHS, 2713 FRV_BUILTIN_MQLMTHS, 2714 FRV_BUILTIN_MQSLLHI, 2715 FRV_BUILTIN_MQSRAHI, 2716 FRV_BUILTIN_MHSETLOS, 2717 FRV_BUILTIN_MHSETLOH, 2718 FRV_BUILTIN_MHSETHIS, 2719 FRV_BUILTIN_MHSETHIH, 2720 FRV_BUILTIN_MHDSETS, 2721 FRV_BUILTIN_MHDSETH, 2722 FRV_BUILTIN_SMUL, 2723 FRV_BUILTIN_UMUL, 2724 FRV_BUILTIN_PREFETCH0, 2725 FRV_BUILTIN_PREFETCH, 2726 FRV_BUILTIN_SMASS, 2727 FRV_BUILTIN_SMSSS, 2728 FRV_BUILTIN_SMU, 2729 FRV_BUILTIN_SCUTSS, 2730 FRV_BUILTIN_ADDSS, 2731 FRV_BUILTIN_SUBSS, 2732 FRV_BUILTIN_SLASS, 2733 FRV_BUILTIN_IACCreadll, 2734 FRV_BUILTIN_IACCreadl, 2735 FRV_BUILTIN_IACCsetll, 2736 FRV_BUILTIN_IACCsetl, 2737 FRV_BUILTIN_SCAN, 2738 FRV_BUILTIN_READ8, 2739 FRV_BUILTIN_READ16, 2740 FRV_BUILTIN_READ32, 2741 FRV_BUILTIN_READ64, 2742 FRV_BUILTIN_WRITE8, 2743 FRV_BUILTIN_WRITE16, 2744 FRV_BUILTIN_WRITE32, 2745 FRV_BUILTIN_WRITE64 2746 }; 2747 #define FRV_BUILTIN_FIRST_NONMEDIA FRV_BUILTIN_SMUL 2748 2749 /* Enable prototypes on the call rtl functions. */ 2750 #define MD_CALL_PROTOTYPES 1 2751 2752 #define CPU_UNITS_QUERY 1 2753 2754 #ifdef __FRV_FDPIC__ 2755 #define CRT_GET_RFIB_DATA(dbase) \ 2756 ({ extern void *_GLOBAL_OFFSET_TABLE_; (dbase) = &_GLOBAL_OFFSET_TABLE_; }) 2757 #endif 2758 2759 #endif /* __FRV_H__ */ 2760