xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/avr/predicates.md (revision d11b170b9000ada93db553723522a63d5deac310)
1;; Predicate definitions for ATMEL AVR micro controllers.
2;; Copyright (C) 2006, 2007, 2008 Free Software Foundation, Inc.
3;;
4;; This file is part of GCC.
5;;
6;; GCC is free software; you can redistribute it and/or modify
7;; it under the terms of the GNU General Public License as published by
8;; the Free Software Foundation; either version 3, or (at your option)
9;; any later version.
10;;
11;; GCC is distributed in the hope that it will be useful,
12;; but WITHOUT ANY WARRANTY; without even the implied warranty of
13;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14;; GNU General Public License for more details.
15;;
16;; You should have received a copy of the GNU General Public License
17;; along with GCC; see the file COPYING3.  If not see
18;; <http://www.gnu.org/licenses/>.
19
20;; Registers from r0 to r15.
21(define_predicate "l_register_operand"
22  (and (match_code "reg")
23       (match_test "REGNO (op) <= 15")))
24
25;; Registers from r16 to r31.
26(define_predicate "d_register_operand"
27  (and (match_code "reg")
28       (match_test "REGNO (op) >= 16 && REGNO (op) <= 31")))
29
30(define_predicate "even_register_operand"
31  (and (match_code "reg")
32       (and (match_test "REGNO (op) <= 31")
33            (match_test "(REGNO (op) & 1) == 0"))))
34
35(define_predicate "odd_register_operand"
36  (and (match_code "reg")
37       (and (match_test "REGNO (op) <= 31")
38            (match_test "(REGNO (op) & 1) != 0"))))
39
40;; SP register.
41(define_predicate "stack_register_operand"
42  (and (match_code "reg")
43       (match_test "REGNO (op) == REG_SP")))
44
45;; Return true if OP is a valid address for lower half of I/O space.
46(define_predicate "low_io_address_operand"
47  (and (match_code "const_int")
48       (match_test "IN_RANGE((INTVAL (op)), 0x20, 0x3F)")))
49
50;; Return true if OP is a valid address for high half of I/O space.
51(define_predicate "high_io_address_operand"
52  (and (match_code "const_int")
53       (match_test "IN_RANGE((INTVAL (op)), 0x40, 0x5F)")))
54
55;; Return true if OP is a valid address of I/O space.
56(define_predicate "io_address_operand"
57  (and (match_code "const_int")
58       (match_test "IN_RANGE((INTVAL (op)), 0x20, (0x60 - GET_MODE_SIZE(mode)))")))
59
60;; Return 1 if OP is the zero constant for MODE.
61(define_predicate "const0_operand"
62  (and (match_code "const_int,const_double")
63       (match_test "op == CONST0_RTX (mode)")))
64
65;; Returns true if OP is either the constant zero or a register.
66(define_predicate "reg_or_0_operand"
67  (ior (match_operand 0 "register_operand")
68       (match_operand 0 "const0_operand")))
69
70;; Returns 1 if OP is a SYMBOL_REF.
71(define_predicate "symbol_ref_operand"
72  (match_code "symbol_ref"))
73
74;; Return true if OP is a text segment reference.
75;; This is needed for program memory address expressions.
76(define_predicate "text_segment_operand"
77  (match_code "code_label,label_ref,symbol_ref,plus,const")
78{
79  switch (GET_CODE (op))
80    {
81    case CODE_LABEL:
82      return true;
83    case LABEL_REF :
84      return true;
85    case SYMBOL_REF :
86      return SYMBOL_REF_FUNCTION_P (op);
87    case PLUS :
88      /* Assume canonical format of symbol + constant.
89	 Fall through.  */
90    case CONST :
91      return text_segment_operand (XEXP (op, 0), VOIDmode);
92    default :
93      return false;
94    }
95})
96
97;; Return true if OP is a constant that contains only one 1 in its
98;; binary representation.
99(define_predicate "single_one_operand"
100  (and (match_code "const_int")
101       (match_test "exact_log2(INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
102
103;; Return true if OP is a constant that contains only one 0 in its
104;; binary representation.
105(define_predicate "single_zero_operand"
106  (and (match_code "const_int")
107       (match_test "exact_log2(~INTVAL (op) & GET_MODE_MASK (mode)) >= 0")))
108
109;;
110(define_predicate "avr_sp_immediate_operand"
111  (and (match_code "const_int")
112       (match_test "INTVAL (op) >= -6 && INTVAL (op) <= 5")))
113
114;; True for EQ & NE
115(define_predicate "eqne_operator"
116  (match_code "eq,ne"))
117
118;; True for GE & LT
119(define_predicate "gelt_operator"
120  (match_code "ge,lt"))
121
122;; True for GT, GTU, LE & LEU
123(define_predicate "difficult_comparison_operator"
124  (match_code "gt,gtu,le,leu"))
125
126;; False for GT, GTU, LE & LEU
127(define_predicate "simple_comparison_operator"
128  (and (match_operand 0 "comparison_operator")
129       (not (match_code "gt,gtu,le,leu"))))
130
131;; Return true if OP is a valid call operand.
132(define_predicate "call_insn_operand"
133  (and (match_code "mem")
134       (ior (match_test "register_operand (XEXP (op, 0), mode)")
135            (match_test "CONSTANT_ADDRESS_P (XEXP (op, 0))"))))
136
137;; True for register that is pseudo register.
138(define_predicate "pseudo_register_operand"
139  (and (match_code "reg")
140       (match_test "!HARD_REGISTER_P (op)")))
141