1 /* Definitions of target machine for GNU compiler, 2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers. 3 Copyright (C) 1998-2015 Free Software Foundation, Inc. 4 Contributed by Denis Chertykov (chertykov@gmail.com) 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GCC is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 typedef struct 23 { 24 /* Id of the address space as used in c_register_addr_space */ 25 unsigned char id; 26 27 /* Flavour of memory: 0 = RAM, 1 = Flash */ 28 int memory_class; 29 30 /* Width of pointer (in bytes) */ 31 int pointer_size; 32 33 /* Name of the address space as visible to the user */ 34 const char *name; 35 36 /* Segment (i.e. 64k memory chunk) number. */ 37 int segment; 38 39 /* Section prefix, e.g. ".progmem1.data" */ 40 const char *section_name; 41 } avr_addrspace_t; 42 43 extern const avr_addrspace_t avr_addrspace[]; 44 45 /* Known address spaces */ 46 47 enum 48 { 49 ADDR_SPACE_RAM, /* ADDR_SPACE_GENERIC */ 50 ADDR_SPACE_FLASH, 51 ADDR_SPACE_FLASH1, 52 ADDR_SPACE_FLASH2, 53 ADDR_SPACE_FLASH3, 54 ADDR_SPACE_FLASH4, 55 ADDR_SPACE_FLASH5, 56 ADDR_SPACE_MEMX, 57 /* Sentinel */ 58 ADDR_SPACE_COUNT 59 }; 60 61 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile) 62 63 #define AVR_HAVE_JMP_CALL (avr_arch->have_jmp_call) 64 #define AVR_HAVE_MUL (avr_arch->have_mul) 65 #define AVR_HAVE_MOVW (avr_arch->have_movw_lpmx) 66 #define AVR_HAVE_LPM (!AVR_TINY) 67 #define AVR_HAVE_LPMX (avr_arch->have_movw_lpmx) 68 #define AVR_HAVE_ELPM (avr_arch->have_elpm) 69 #define AVR_HAVE_ELPMX (avr_arch->have_elpmx) 70 #define AVR_HAVE_RAMPD (avr_arch->have_rampd) 71 #define AVR_HAVE_RAMPX (avr_arch->have_rampd) 72 #define AVR_HAVE_RAMPY (avr_arch->have_rampd) 73 #define AVR_HAVE_RAMPZ (avr_arch->have_elpm \ 74 || avr_arch->have_rampd) 75 #define AVR_HAVE_EIJMP_EICALL (avr_arch->have_eijmp_eicall) 76 77 /* Handling of 8-bit SP versus 16-bit SP is as follows: 78 79 FIXME: DRIVER_SELF_SPECS has changed. 80 -msp8 is used internally to select the right multilib for targets with 81 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices 82 with 8-bit SP or by multilib generation machinery. If a frame pointer is 83 needed and SP is only 8 bits wide, SP is zero-extended to get FP. 84 85 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option. 86 This option has no effect on multilib selection. It serves to save some 87 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone. 88 89 These two properties are reflected by built-in macros __AVR_SP8__ resp. 90 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation 91 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */ 92 93 #define AVR_HAVE_8BIT_SP \ 94 (TARGET_TINY_STACK || avr_sp8) 95 96 #define AVR_HAVE_SPH (!avr_sp8) 97 98 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL) 99 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL) 100 101 #define AVR_XMEGA (avr_arch->xmega_p) 102 #define AVR_TINY (avr_arch->tiny_p) 103 104 #define BITS_BIG_ENDIAN 0 105 #define BYTES_BIG_ENDIAN 0 106 #define WORDS_BIG_ENDIAN 0 107 108 #ifdef IN_LIBGCC2 109 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */ 110 #define UNITS_PER_WORD 4 111 #else 112 /* Width of a word, in units (bytes). */ 113 #define UNITS_PER_WORD 1 114 #endif 115 116 #define POINTER_SIZE 16 117 118 119 /* Maximum sized of reasonable data type 120 DImode or Dfmode ... */ 121 #define MAX_FIXED_MODE_SIZE 32 122 123 #define PARM_BOUNDARY 8 124 125 #define FUNCTION_BOUNDARY 8 126 127 #define EMPTY_FIELD_BOUNDARY 8 128 129 /* No data type wants to be aligned rounder than this. */ 130 #define BIGGEST_ALIGNMENT 8 131 132 #define TARGET_VTABLE_ENTRY_ALIGN 8 133 134 #define STRICT_ALIGNMENT 0 135 136 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16) 137 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16) 138 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32) 139 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64) 140 #define FLOAT_TYPE_SIZE 32 141 #define DOUBLE_TYPE_SIZE 32 142 #define LONG_DOUBLE_TYPE_SIZE 32 143 #define LONG_LONG_ACCUM_TYPE_SIZE 64 144 145 #define DEFAULT_SIGNED_CHAR 1 146 147 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int") 148 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int") 149 150 #define WCHAR_TYPE_SIZE 16 151 152 #define FIRST_PSEUDO_REGISTER 36 153 154 #define FIXED_REGISTERS {\ 155 1,1,/* r0 r1 */\ 156 0,0,/* r2 r3 */\ 157 0,0,/* r4 r5 */\ 158 0,0,/* r6 r7 */\ 159 0,0,/* r8 r9 */\ 160 0,0,/* r10 r11 */\ 161 0,0,/* r12 r13 */\ 162 0,0,/* r14 r15 */\ 163 0,0,/* r16 r17 */\ 164 0,0,/* r18 r19 */\ 165 0,0,/* r20 r21 */\ 166 0,0,/* r22 r23 */\ 167 0,0,/* r24 r25 */\ 168 0,0,/* r26 r27 */\ 169 0,0,/* r28 r29 */\ 170 0,0,/* r30 r31 */\ 171 1,1,/* STACK */\ 172 1,1 /* arg pointer */ } 173 174 #define CALL_USED_REGISTERS { \ 175 1,1,/* r0 r1 */ \ 176 0,0,/* r2 r3 */ \ 177 0,0,/* r4 r5 */ \ 178 0,0,/* r6 r7 */ \ 179 0,0,/* r8 r9 */ \ 180 0,0,/* r10 r11 */ \ 181 0,0,/* r12 r13 */ \ 182 0,0,/* r14 r15 */ \ 183 0,0,/* r16 r17 */ \ 184 1,1,/* r18 r19 */ \ 185 1,1,/* r20 r21 */ \ 186 1,1,/* r22 r23 */ \ 187 1,1,/* r24 r25 */ \ 188 1,1,/* r26 r27 */ \ 189 0,0,/* r28 r29 */ \ 190 1,1,/* r30 r31 */ \ 191 1,1,/* STACK */ \ 192 1,1 /* arg pointer */ } 193 194 #define REG_ALLOC_ORDER { \ 195 24,25, \ 196 18,19, \ 197 20,21, \ 198 22,23, \ 199 30,31, \ 200 26,27, \ 201 28,29, \ 202 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \ 203 0,1, \ 204 32,33,34,35 \ 205 } 206 207 #define ADJUST_REG_ALLOC_ORDER avr_adjust_reg_alloc_order() 208 209 210 #define HARD_REGNO_NREGS(REGNO, MODE) \ 211 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 212 213 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE) 214 215 #define MODES_TIEABLE_P(MODE1, MODE2) 1 216 217 enum reg_class { 218 NO_REGS, 219 R0_REG, /* r0 */ 220 POINTER_X_REGS, /* r26 - r27 */ 221 POINTER_Y_REGS, /* r28 - r29 */ 222 POINTER_Z_REGS, /* r30 - r31 */ 223 STACK_REG, /* STACK */ 224 BASE_POINTER_REGS, /* r28 - r31 */ 225 POINTER_REGS, /* r26 - r31 */ 226 ADDW_REGS, /* r24 - r31 */ 227 SIMPLE_LD_REGS, /* r16 - r23 */ 228 LD_REGS, /* r16 - r31 */ 229 NO_LD_REGS, /* r0 - r15 */ 230 GENERAL_REGS, /* r0 - r31 */ 231 ALL_REGS, LIM_REG_CLASSES 232 }; 233 234 235 #define N_REG_CLASSES (int)LIM_REG_CLASSES 236 237 #define REG_CLASS_NAMES { \ 238 "NO_REGS", \ 239 "R0_REG", /* r0 */ \ 240 "POINTER_X_REGS", /* r26 - r27 */ \ 241 "POINTER_Y_REGS", /* r28 - r29 */ \ 242 "POINTER_Z_REGS", /* r30 - r31 */ \ 243 "STACK_REG", /* STACK */ \ 244 "BASE_POINTER_REGS", /* r28 - r31 */ \ 245 "POINTER_REGS", /* r26 - r31 */ \ 246 "ADDW_REGS", /* r24 - r31 */ \ 247 "SIMPLE_LD_REGS", /* r16 - r23 */ \ 248 "LD_REGS", /* r16 - r31 */ \ 249 "NO_LD_REGS", /* r0 - r15 */ \ 250 "GENERAL_REGS", /* r0 - r31 */ \ 251 "ALL_REGS" } 252 253 #define REG_CLASS_CONTENTS { \ 254 {0x00000000,0x00000000}, /* NO_REGS */ \ 255 {0x00000001,0x00000000}, /* R0_REG */ \ 256 {3u << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \ 257 {3u << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \ 258 {3u << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \ 259 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \ 260 {(3u << REG_Y) | (3u << REG_Z), \ 261 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \ 262 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z), \ 263 0x00000000}, /* POINTER_REGS, r26 - r31 */ \ 264 {(3u << REG_X) | (3u << REG_Y) | (3u << REG_Z) | (3u << REG_W), \ 265 0x00000000}, /* ADDW_REGS, r24 - r31 */ \ 266 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \ 267 {(3u << REG_X)|(3u << REG_Y)|(3u << REG_Z)|(3u << REG_W)|(0xffu << 16),\ 268 0x00000000}, /* LD_REGS, r16 - r31 */ \ 269 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \ 270 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \ 271 {0xffffffff,0x00000003} /* ALL_REGS */ \ 272 } 273 274 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R) 275 276 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \ 277 avr_mode_code_base_reg_class (mode, as, outer_code, index_code) 278 279 #define INDEX_REG_CLASS NO_REGS 280 281 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \ 282 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code) 283 284 #define REGNO_OK_FOR_INDEX_P(NUM) 0 285 286 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \ 287 avr_hard_regno_call_part_clobbered (REGNO, MODE) 288 289 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true 290 291 #define STACK_PUSH_CODE POST_DEC 292 293 #define STACK_GROWS_DOWNWARD 294 295 #define STARTING_FRAME_OFFSET avr_starting_frame_offset() 296 297 #define STACK_POINTER_OFFSET 1 298 299 #define FIRST_PARM_OFFSET(FUNDECL) 0 300 301 #define STACK_BOUNDARY 8 302 303 #define STACK_POINTER_REGNUM 32 304 305 #define FRAME_POINTER_REGNUM REG_Y 306 307 #define ARG_POINTER_REGNUM 34 308 309 #define STATIC_CHAIN_REGNUM ((AVR_TINY) ? 18 :2) 310 311 #define ELIMINABLE_REGS { \ 312 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 313 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \ 314 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }, \ 315 { FRAME_POINTER_REGNUM + 1, STACK_POINTER_REGNUM + 1 } } 316 317 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 318 OFFSET = avr_initial_elimination_offset (FROM, TO) 319 320 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem) 321 322 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken 323 for POST_DEC targets (PR27386). */ 324 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/ 325 326 typedef struct avr_args 327 { 328 /* # Registers available for passing */ 329 int nregs; 330 331 /* Next available register number */ 332 int regno; 333 } CUMULATIVE_ARGS; 334 335 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \ 336 avr_init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL) 337 338 #define FUNCTION_ARG_REGNO_P(r) avr_function_arg_regno_p(r) 339 340 #define DEFAULT_PCC_STRUCT_RETURN 0 341 342 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO) 343 344 #define HAVE_POST_INCREMENT 1 345 #define HAVE_PRE_DECREMENT 1 346 347 #define MAX_REGS_PER_ADDRESS 1 348 349 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \ 350 do { \ 351 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \ 352 ADDR_TYPE (TYPE), \ 353 IND_L, make_memloc); \ 354 if (new_x) \ 355 { \ 356 X = new_x; \ 357 goto WIN; \ 358 } \ 359 } while (0) 360 361 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost 362 363 #define SLOW_BYTE_ACCESS 0 364 365 #define NO_FUNCTION_CSE 366 367 #define REGISTER_TARGET_PRAGMAS() \ 368 do { \ 369 avr_register_target_pragmas(); \ 370 } while (0) 371 372 #define TEXT_SECTION_ASM_OP "\t.text" 373 374 #define DATA_SECTION_ASM_OP "\t.data" 375 376 #define BSS_SECTION_ASM_OP "\t.section .bss" 377 378 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections. 379 There are no shared libraries on this target, and these sections are 380 placed in the read-only program memory, so they are not writable. */ 381 382 #undef CTORS_SECTION_ASM_OP 383 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits" 384 385 #undef DTORS_SECTION_ASM_OP 386 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits" 387 388 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor 389 390 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor 391 392 #define SUPPORTS_INIT_PRIORITY 0 393 394 #define JUMP_TABLES_IN_TEXT_SECTION 0 395 396 #define ASM_COMMENT_START " ; " 397 398 #define ASM_APP_ON "/* #APP */\n" 399 400 #define ASM_APP_OFF "/* #NOAPP */\n" 401 402 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$')) 403 404 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \ 405 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false) 406 407 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \ 408 avr_asm_asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN, \ 409 asm_output_aligned_bss) 410 411 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \ 412 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true) 413 414 /* Globalizing directive for a label. */ 415 #define GLOBAL_ASM_OP ".global\t" 416 417 #define SUPPORTS_WEAK 1 418 419 #define HAS_INIT_SECTION 1 420 421 #define REGISTER_NAMES { \ 422 "r0","r1","r2","r3","r4","r5","r6","r7", \ 423 "r8","r9","r10","r11","r12","r13","r14","r15", \ 424 "r16","r17","r18","r19","r20","r21","r22","r23", \ 425 "r24","r25","r26","r27","r28","r29","r30","r31", \ 426 "__SP_L__","__SP_H__","argL","argH"} 427 428 #define FINAL_PRESCAN_INSN(insn, operand, nop) \ 429 avr_final_prescan_insn (insn, operand,nop) 430 431 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \ 432 { \ 433 gcc_assert (REGNO < 32); \ 434 fprintf (STREAM, "\tpush\tr%d", REGNO); \ 435 } 436 437 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \ 438 { \ 439 gcc_assert (REGNO < 32); \ 440 fprintf (STREAM, "\tpop\tr%d", REGNO); \ 441 } 442 443 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 444 avr_output_addr_vec_elt (STREAM, VALUE) 445 446 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 447 do { \ 448 if ((POWER) > 0) \ 449 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \ 450 } while (0) 451 452 #define CASE_VECTOR_MODE HImode 453 454 #undef WORD_REGISTER_OPERATIONS 455 456 #define MOVE_MAX 4 457 458 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 459 460 #define Pmode HImode 461 462 #define FUNCTION_MODE HImode 463 464 #define DOLLARS_IN_IDENTIFIERS 0 465 466 #define TRAMPOLINE_SIZE 4 467 468 /* Store in cc_status the expressions 469 that the condition codes will describe 470 after execution of an instruction whose pattern is EXP. 471 Do not alter them if the instruction would not alter the cc's. */ 472 473 #define NOTICE_UPDATE_CC(EXP, INSN) avr_notice_update_cc (EXP, INSN) 474 475 /* The add insns don't set overflow in a usable way. */ 476 #define CC_OVERFLOW_UNUSABLE 01000 477 /* The mov,and,or,xor insns don't set carry. That's ok though as the 478 Z bit is all we need when doing unsigned comparisons on the result of 479 these insns (since they're always with 0). However, conditions.h has 480 CC_NO_OVERFLOW defined for this purpose. Rename it to something more 481 understandable. */ 482 #define CC_NO_CARRY CC_NO_OVERFLOW 483 484 485 /* Output assembler code to FILE to increment profiler label # LABELNO 486 for profiling a function entry. */ 487 488 #define FUNCTION_PROFILER(FILE, LABELNO) \ 489 fprintf (FILE, "/* profiler %d */", (LABELNO)) 490 491 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \ 492 (LENGTH = avr_adjust_insn_length (INSN, LENGTH)) 493 494 extern const char *avr_devicespecs_file (int, const char**); 495 496 #define EXTRA_SPEC_FUNCTIONS \ 497 { "device-specs-file", avr_devicespecs_file }, 498 499 /* Driver self specs has lmited functionality w.r.t. '%s' for dynamic specs. 500 Apply '%s' to a static string to inflate the file (directory) name which 501 is used to diagnose problems with reading the specs file. */ 502 503 #undef DRIVER_SELF_SPECS 504 #define DRIVER_SELF_SPECS \ 505 " %:device-specs-file(device-specs%s %{mmcu=*:%*})" 506 507 /* No libstdc++ for now. Empty string doesn't work. */ 508 #define LIBSTDCXX "gcc" 509 510 /* This is the default without any -mmcu=* option. */ 511 #define MULTILIB_DEFAULTS { "mmcu=" AVR_MMCU_DEFAULT } 512 513 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \ 514 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO) 515 516 #define CR_TAB "\n\t" 517 518 #define DWARF2_ADDR_SIZE 4 519 520 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx () 521 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2) 522 523 /* The caller's stack pointer value immediately before the call 524 is one byte below the first argument. */ 525 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1 526 527 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 528 avr_hard_regno_rename_ok (OLD_REG, NEW_REG) 529 530 /* A C structure for machine-specific, per-function data. 531 This is added to the cfun structure. */ 532 struct GTY(()) machine_function 533 { 534 /* 'true' - if current function is a naked function. */ 535 int is_naked; 536 537 /* 'true' - if current function is an interrupt function 538 as specified by the "interrupt" attribute. */ 539 int is_interrupt; 540 541 /* 'true' - if current function is a signal function 542 as specified by the "signal" attribute. */ 543 int is_signal; 544 545 /* 'true' - if current function is a 'task' function 546 as specified by the "OS_task" attribute. */ 547 int is_OS_task; 548 549 /* 'true' - if current function is a 'main' function 550 as specified by the "OS_main" attribute. */ 551 int is_OS_main; 552 553 /* Current function stack size. */ 554 int stack_usage; 555 556 /* 'true' if a callee might be tail called */ 557 int sibcall_fails; 558 559 /* 'true' if the above is_foo predicates are sanity-checked to avoid 560 multiple diagnose for the same function. */ 561 int attributes_checked_p; 562 }; 563 564 /* AVR does not round pushes, but the existence of this macro is 565 required in order for pushes to be generated. */ 566 #define PUSH_ROUNDING(X) (X) 567 568 /* Define prototype here to avoid build warning. Some files using 569 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include 570 tm.h but not tm_p.h. */ 571 extern int avr_accumulate_outgoing_args (void); 572 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args() 573 574 #define INIT_EXPANDERS avr_init_expanders() 575 576 /* Flags used for io and address attributes. */ 577 #define SYMBOL_FLAG_IO_LOW (SYMBOL_FLAG_MACH_DEP << 4) 578 #define SYMBOL_FLAG_IO (SYMBOL_FLAG_MACH_DEP << 5) 579 #define SYMBOL_FLAG_ADDRESS (SYMBOL_FLAG_MACH_DEP << 6) 580