xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/arm-protos.h (revision 5dd36a3bc8bf2a9dec29ceb6349550414570c447)
1 /* Prototypes for exported functions defined in arm.c and pe.c
2    Copyright (C) 1999-2017 Free Software Foundation, Inc.
3    Contributed by Richard Earnshaw (rearnsha@arm.com)
4    Minor hacks by Nick Clifton (nickc@cygnus.com)
5 
6    This file is part of GCC.
7 
8    GCC is free software; you can redistribute it and/or modify
9    it under the terms of the GNU General Public License as published by
10    the Free Software Foundation; either version 3, or (at your option)
11    any later version.
12 
13    GCC is distributed in the hope that it will be useful,
14    but WITHOUT ANY WARRANTY; without even the implied warranty of
15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16    GNU General Public License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with GCC; see the file COPYING3.  If not see
20    <http://www.gnu.org/licenses/>.  */
21 
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
24 
25 #include "sbitmap.h"
26 
27 extern enum unwind_info_type arm_except_unwind_info (struct gcc_options *);
28 extern int use_return_insn (int, rtx);
29 extern bool use_simple_return_p (void);
30 extern enum reg_class arm_regno_class (int);
31 extern void arm_load_pic_register (unsigned long);
32 extern int arm_volatile_func (void);
33 extern void arm_expand_prologue (void);
34 extern void arm_expand_epilogue (bool);
35 extern void arm_declare_function_name (FILE *, const char *, tree);
36 extern void arm_asm_declare_function_name (FILE *, const char *, tree);
37 extern void thumb2_expand_return (bool);
38 extern const char *arm_strip_name_encoding (const char *);
39 extern void arm_asm_output_labelref (FILE *, const char *);
40 extern void thumb2_asm_output_opcode (FILE *);
41 extern unsigned long arm_current_func_type (void);
42 extern HOST_WIDE_INT arm_compute_initial_elimination_offset (unsigned int,
43 							     unsigned int);
44 extern HOST_WIDE_INT thumb_compute_initial_elimination_offset (unsigned int,
45 							       unsigned int);
46 extern unsigned int arm_dbx_register_number (unsigned int);
47 extern void arm_output_fn_unwind (FILE *, bool);
48 
49 extern rtx arm_expand_builtin (tree exp, rtx target, rtx subtarget
50 			       ATTRIBUTE_UNUSED, enum machine_mode mode
51 			       ATTRIBUTE_UNUSED, int ignore ATTRIBUTE_UNUSED);
52 extern tree arm_builtin_decl (unsigned code, bool initialize_p
53 			      ATTRIBUTE_UNUSED);
54 extern void arm_init_builtins (void);
55 extern void arm_atomic_assign_expand_fenv (tree *hold, tree *clear, tree *update);
56 extern rtx arm_simd_vect_par_cnst_half (machine_mode mode, bool high);
57 extern bool arm_simd_check_vect_par_cnst_half_p (rtx op, machine_mode mode,
58 						 bool high);
59 #ifdef RTX_CODE
60 extern void arm_gen_unlikely_cbranch (enum rtx_code, machine_mode cc_mode,
61 				      rtx label_ref);
62 extern bool arm_vector_mode_supported_p (machine_mode);
63 extern bool arm_small_register_classes_for_mode_p (machine_mode);
64 extern int arm_hard_regno_mode_ok (unsigned int, machine_mode);
65 extern bool arm_modes_tieable_p (machine_mode, machine_mode);
66 extern int const_ok_for_arm (HOST_WIDE_INT);
67 extern int const_ok_for_op (HOST_WIDE_INT, enum rtx_code);
68 extern int const_ok_for_dimode_op (HOST_WIDE_INT, enum rtx_code);
69 extern int arm_split_constant (RTX_CODE, machine_mode, rtx,
70 			       HOST_WIDE_INT, rtx, rtx, int);
71 extern int legitimate_pic_operand_p (rtx);
72 extern rtx legitimize_pic_address (rtx, machine_mode, rtx);
73 extern rtx legitimize_tls_address (rtx, rtx);
74 extern bool arm_legitimate_address_p (machine_mode, rtx, bool);
75 extern int arm_legitimate_address_outer_p (machine_mode, rtx, RTX_CODE, int);
76 extern int thumb_legitimate_offset_p (machine_mode, HOST_WIDE_INT);
77 extern int thumb1_legitimate_address_p (machine_mode, rtx, int);
78 extern bool ldm_stm_operation_p (rtx, bool, machine_mode mode,
79                                  bool, bool);
80 extern int arm_const_double_rtx (rtx);
81 extern int vfp3_const_double_rtx (rtx);
82 extern int neon_immediate_valid_for_move (rtx, machine_mode, rtx *, int *);
83 extern int neon_immediate_valid_for_logic (rtx, machine_mode, int, rtx *,
84 					   int *);
85 extern int neon_immediate_valid_for_shift (rtx, machine_mode, rtx *,
86 					   int *, bool);
87 extern char *neon_output_logic_immediate (const char *, rtx *,
88 					  machine_mode, int, int);
89 extern char *neon_output_shift_immediate (const char *, char, rtx *,
90 					  machine_mode, int, bool);
91 extern void neon_pairwise_reduce (rtx, rtx, machine_mode,
92 				  rtx (*) (rtx, rtx, rtx));
93 extern rtx neon_make_constant (rtx);
94 extern tree arm_builtin_vectorized_function (unsigned int, tree, tree);
95 extern void neon_expand_vector_init (rtx, rtx);
96 extern void neon_lane_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT, const_tree);
97 extern void arm_const_bounds (rtx, HOST_WIDE_INT, HOST_WIDE_INT);
98 extern HOST_WIDE_INT neon_element_bits (machine_mode);
99 extern void neon_emit_pair_result_insn (machine_mode,
100 					rtx (*) (rtx, rtx, rtx, rtx),
101 					rtx, rtx, rtx);
102 extern void neon_disambiguate_copy (rtx *, rtx *, rtx *, unsigned int);
103 extern void neon_split_vcombine (rtx op[3]);
104 extern enum reg_class coproc_secondary_reload_class (machine_mode, rtx,
105 						     bool);
106 extern bool arm_tls_referenced_p (rtx);
107 
108 extern int arm_coproc_mem_operand (rtx, bool);
109 extern int neon_vector_mem_operand (rtx, int, bool);
110 extern int neon_struct_mem_operand (rtx);
111 
112 extern int tls_mentioned_p (rtx);
113 extern int symbol_mentioned_p (rtx);
114 extern int label_mentioned_p (rtx);
115 extern RTX_CODE minmax_code (rtx);
116 extern bool arm_sat_operator_match (rtx, rtx, int *, bool *);
117 extern int adjacent_mem_locations (rtx, rtx);
118 extern bool gen_ldm_seq (rtx *, int, bool);
119 extern bool gen_stm_seq (rtx *, int);
120 extern bool gen_const_stm_seq (rtx *, int);
121 extern rtx arm_gen_load_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
122 extern rtx arm_gen_store_multiple (int *, int, rtx, int, rtx, HOST_WIDE_INT *);
123 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT);
124 extern bool operands_ok_ldrd_strd (rtx, rtx, rtx, HOST_WIDE_INT, bool, bool);
125 extern bool gen_operands_ldrd_strd (rtx *, bool, bool, bool);
126 extern int arm_gen_movmemqi (rtx *);
127 extern bool gen_movmem_ldrd_strd (rtx *);
128 extern machine_mode arm_select_cc_mode (RTX_CODE, rtx, rtx);
129 extern machine_mode arm_select_dominance_cc_mode (rtx, rtx,
130 						       HOST_WIDE_INT);
131 extern rtx arm_gen_compare_reg (RTX_CODE, rtx, rtx, rtx);
132 extern rtx arm_gen_return_addr_mask (void);
133 extern void arm_reload_in_hi (rtx *);
134 extern void arm_reload_out_hi (rtx *);
135 extern int arm_max_const_double_inline_cost (void);
136 extern int arm_const_double_inline_cost (rtx);
137 extern bool arm_const_double_by_parts (rtx);
138 extern bool arm_const_double_by_immediates (rtx);
139 extern void arm_emit_call_insn (rtx, rtx, bool);
140 bool detect_cmse_nonsecure_call (tree);
141 extern const char *output_call (rtx *);
142 void arm_emit_movpair (rtx, rtx);
143 extern const char *output_mov_long_double_arm_from_arm (rtx *);
144 extern const char *output_move_double (rtx *, bool, int *count);
145 extern const char *output_move_quad (rtx *);
146 extern int arm_count_output_move_double_insns (rtx *);
147 extern const char *output_move_vfp (rtx *operands);
148 extern const char *output_move_neon (rtx *operands);
149 extern int arm_attr_length_move_neon (rtx_insn *);
150 extern int arm_address_offset_is_imm (rtx_insn *);
151 extern const char *output_add_immediate (rtx *);
152 extern const char *arithmetic_instr (rtx, int);
153 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
154 extern const char *output_return_instruction (rtx, bool, bool, bool);
155 extern const char *output_probe_stack_range (rtx, rtx);
156 extern void arm_poke_function_name (FILE *, const char *);
157 extern void arm_final_prescan_insn (rtx_insn *);
158 extern int arm_debugger_arg_offset (int, rtx);
159 extern bool arm_is_long_call_p (tree);
160 extern int    arm_emit_vector_const (FILE *, rtx);
161 extern void arm_emit_fp16_const (rtx c);
162 extern const char * arm_output_load_gr (rtx *);
163 extern const char *vfp_output_vstmd (rtx *);
164 extern void arm_output_multireg_pop (rtx *, bool, rtx, bool, bool);
165 extern void arm_set_return_address (rtx, rtx);
166 extern int arm_eliminable_register (rtx);
167 extern const char *arm_output_shift(rtx *, int);
168 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx *, bool);
169 extern const char *arm_output_iwmmxt_tinsr (rtx *);
170 extern unsigned int arm_sync_loop_insns (rtx , rtx *);
171 extern int arm_attr_length_push_multi(rtx, rtx);
172 extern int arm_attr_length_pop_multi(rtx *, bool, bool);
173 extern void arm_expand_compare_and_swap (rtx op[]);
174 extern void arm_split_compare_and_swap (rtx op[]);
175 extern void arm_split_atomic_op (enum rtx_code, rtx, rtx, rtx, rtx, rtx, rtx);
176 extern rtx arm_load_tp (rtx);
177 extern bool arm_coproc_builtin_available (enum unspecv);
178 extern bool arm_coproc_ldc_stc_legitimate_address (rtx);
179 
180 #if defined TREE_CODE
181 extern void arm_init_cumulative_args (CUMULATIVE_ARGS *, tree, rtx, tree);
182 extern bool arm_pad_arg_upward (machine_mode, const_tree);
183 extern bool arm_pad_reg_upward (machine_mode, tree, int);
184 #endif
185 extern int arm_apply_result_size (void);
186 
187 #endif /* RTX_CODE */
188 
189 /* Thumb functions.  */
190 extern void arm_init_expanders (void);
191 extern const char *thumb1_unexpanded_epilogue (void);
192 extern void thumb1_expand_prologue (void);
193 extern void thumb1_expand_epilogue (void);
194 extern const char *thumb1_output_interwork (void);
195 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT);
196 #ifdef RTX_CODE
197 extern enum arm_cond_code maybe_get_arm_condition_code (rtx);
198 extern void thumb1_final_prescan_insn (rtx_insn *);
199 extern void thumb2_final_prescan_insn (rtx_insn *);
200 extern const char *thumb_load_double_from_address (rtx *);
201 extern const char *thumb_output_move_mem_multiple (int, rtx *);
202 extern const char *thumb_call_via_reg (rtx);
203 extern void thumb_expand_movmemqi (rtx *);
204 extern rtx arm_return_addr (int, rtx);
205 extern void thumb_reload_out_hi (rtx *);
206 extern void thumb_set_return_address (rtx, rtx);
207 extern const char *thumb1_output_casesi (rtx *);
208 extern const char *thumb2_output_casesi (rtx *);
209 #endif
210 
211 /* Defined in pe.c.  */
212 extern int arm_dllexport_name_p (const char *);
213 extern int arm_dllimport_name_p (const char *);
214 
215 #ifdef TREE_CODE
216 extern void arm_pe_unique_section (tree, int);
217 extern void arm_pe_encode_section_info (tree, rtx, int);
218 extern int arm_dllexport_p (tree);
219 extern int arm_dllimport_p (tree);
220 extern void arm_mark_dllexport (tree);
221 extern void arm_mark_dllimport (tree);
222 extern bool arm_change_mode_p (tree);
223 #endif
224 
225 extern tree arm_valid_target_attribute_tree (tree, struct gcc_options *,
226 					     struct gcc_options *);
227 extern void arm_configure_build_target (struct arm_build_target *,
228 					struct cl_target_option *,
229 					struct gcc_options *, bool);
230 extern void arm_pr_long_calls (struct cpp_reader *);
231 extern void arm_pr_no_long_calls (struct cpp_reader *);
232 extern void arm_pr_long_calls_off (struct cpp_reader *);
233 
234 extern const char *arm_mangle_type (const_tree);
235 extern const char *arm_mangle_builtin_type (const_tree);
236 
237 extern void arm_order_regs_for_local_alloc (void);
238 
239 extern int arm_max_conditional_execute ();
240 
241 /* Vectorizer cost model implementation.  */
242 struct cpu_vec_costs {
243   const int scalar_stmt_cost;   /* Cost of any scalar operation, excluding
244 				   load and store.  */
245   const int scalar_load_cost;   /* Cost of scalar load.  */
246   const int scalar_store_cost;  /* Cost of scalar store.  */
247   const int vec_stmt_cost;      /* Cost of any vector operation, excluding
248                                    load, store, vector-to-scalar and
249                                    scalar-to-vector operation.  */
250   const int vec_to_scalar_cost;    /* Cost of vect-to-scalar operation.  */
251   const int scalar_to_vec_cost;    /* Cost of scalar-to-vector operation.  */
252   const int vec_align_load_cost;   /* Cost of aligned vector load.  */
253   const int vec_unalign_load_cost; /* Cost of unaligned vector load.  */
254   const int vec_unalign_store_cost; /* Cost of unaligned vector load.  */
255   const int vec_store_cost;        /* Cost of vector store.  */
256   const int cond_taken_branch_cost;    /* Cost of taken branch for vectorizer
257 					  cost model.  */
258   const int cond_not_taken_branch_cost;/* Cost of not taken branch for
259 					  vectorizer cost model.  */
260 };
261 
262 #ifdef RTX_CODE
263 /* This needs to be here because we need RTX_CODE and similar.  */
264 
265 struct cpu_cost_table;
266 
267 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
268    structure is modified.  */
269 
270 struct tune_params
271 {
272   const struct cpu_cost_table *insn_extra_cost;
273   bool (*sched_adjust_cost) (rtx_insn *, int, rtx_insn *, int *);
274   int (*branch_cost) (bool, bool);
275   /* Vectorizer costs.  */
276   const struct cpu_vec_costs* vec_costs;
277   int constant_limit;
278   /* Maximum number of instructions to conditionalise.  */
279   int max_insns_skipped;
280   /* Maximum number of instructions to inline calls to memset.  */
281   int max_insns_inline_memset;
282   /* Issue rate of the processor.  */
283   unsigned int issue_rate;
284   /* Explicit prefetch data.  */
285   struct
286     {
287       int num_slots;
288       int l1_cache_size;
289       int l1_cache_line_size;
290     } prefetch;
291   enum {PREF_CONST_POOL_FALSE, PREF_CONST_POOL_TRUE}
292     prefer_constant_pool: 1;
293   /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM.  */
294   enum {PREF_LDRD_FALSE, PREF_LDRD_TRUE} prefer_ldrd_strd: 1;
295   /* The preference for non short cirtcuit operation when optimizing for
296      performance. The first element covers Thumb state and the second one
297      is for ARM state.  */
298   enum log_op_non_short_circuit {LOG_OP_NON_SHORT_CIRCUIT_FALSE,
299 				 LOG_OP_NON_SHORT_CIRCUIT_TRUE};
300   log_op_non_short_circuit logical_op_non_short_circuit_thumb: 1;
301   log_op_non_short_circuit logical_op_non_short_circuit_arm: 1;
302   /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding.  */
303   enum {DISPARAGE_FLAGS_NEITHER, DISPARAGE_FLAGS_PARTIAL, DISPARAGE_FLAGS_ALL}
304     disparage_flag_setting_t16_encodings: 2;
305   enum {PREF_NEON_64_FALSE, PREF_NEON_64_TRUE} prefer_neon_for_64bits: 1;
306   /* Prefer to inline string operations like memset by using Neon.  */
307   enum {PREF_NEON_STRINGOPS_FALSE, PREF_NEON_STRINGOPS_TRUE}
308     string_ops_prefer_neon: 1;
309   /* Bitfield encoding the fusible pairs of instructions.  Use FUSE_OPS
310      in an initializer if multiple fusion operations are supported on a
311      target.  */
312   enum fuse_ops
313   {
314     FUSE_NOTHING   = 0,
315     FUSE_MOVW_MOVT = 1 << 0,
316     FUSE_AES_AESMC = 1 << 1
317   } fusible_ops: 2;
318   /* Depth of scheduling queue to check for L2 autoprefetcher.  */
319   enum {SCHED_AUTOPREF_OFF, SCHED_AUTOPREF_RANK, SCHED_AUTOPREF_FULL}
320     sched_autopref: 2;
321 };
322 
323 /* Smash multiple fusion operations into a type that can be used for an
324    initializer.  */
325 #define FUSE_OPS(x) ((tune_params::fuse_ops) (x))
326 
327 extern const struct tune_params *current_tune;
328 extern int vfp3_const_double_for_fract_bits (rtx);
329 /* return power of two from operand, otherwise 0.  */
330 extern int vfp3_const_double_for_bits (rtx);
331 
332 extern void arm_emit_coreregs_64bit_shift (enum rtx_code, rtx, rtx, rtx, rtx,
333 					   rtx);
334 extern bool arm_fusion_enabled_p (tune_params::fuse_ops);
335 extern bool arm_valid_symbolic_address_p (rtx);
336 extern bool arm_validize_comparison (rtx *, rtx *, rtx *);
337 #endif /* RTX_CODE */
338 
339 extern bool arm_gen_setmem (rtx *);
340 extern void arm_expand_vec_perm (rtx target, rtx op0, rtx op1, rtx sel);
341 extern bool arm_expand_vec_perm_const (rtx target, rtx op0, rtx op1, rtx sel);
342 
343 extern bool arm_autoinc_modes_ok_p (machine_mode, enum arm_auto_incmodes);
344 
345 extern void arm_emit_eabi_attribute (const char *, int, int);
346 
347 extern void arm_reset_previous_fndecl (void);
348 extern void save_restore_target_globals (tree);
349 
350 /* Defined in gcc/common/config/arm-common.c.  */
351 extern const char *arm_rewrite_selected_cpu (const char *name);
352 
353 /* Defined in gcc/common/config/arm-c.c.  */
354 extern void arm_lang_object_attributes_init (void);
355 extern void arm_register_target_pragmas (void);
356 extern void arm_cpu_cpp_builtins (struct cpp_reader *);
357 
358 extern bool arm_is_constant_pool_ref (rtx);
359 
360 /* The bits in this mask specify which instruction scheduling options should
361    be used.  */
362 extern unsigned int tune_flags;
363 
364 /* Nonzero if this chip supports the ARM Architecture 3M extensions.  */
365 extern int arm_arch3m;
366 
367 /* Nonzero if this chip supports the ARM Architecture 4 extensions.  */
368 extern int arm_arch4;
369 
370 /* Nonzero if this chip supports the ARM Architecture 4t extensions.  */
371 extern int arm_arch4t;
372 
373 /* Nonzero if this chip supports the ARM Architecture 5 extensions.  */
374 extern int arm_arch5;
375 
376 /* Nonzero if this chip supports the ARM Architecture 5E extensions.  */
377 extern int arm_arch5e;
378 
379 /* Nonzero if this chip supports the ARM Architecture 6 extensions.  */
380 extern int arm_arch6;
381 
382 /* Nonzero if this chip supports the ARM 6K extensions.  */
383 extern int arm_arch6k;
384 
385 /* Nonzero if this chip supports the ARM 6KZ extensions.  */
386 extern int arm_arch6kz;
387 
388 /* Nonzero if instructions present in ARMv6-M can be used.  */
389 extern int arm_arch6m;
390 
391 /* Nonzero if this chip supports the ARM 7 extensions.  */
392 extern int arm_arch7;
393 
394 /* Nonzero if this chip supports the Large Physical Address Extension.  */
395 extern int arm_arch_lpae;
396 
397 /* Nonzero if instructions not present in the 'M' profile can be used.  */
398 extern int arm_arch_notm;
399 
400 /* Nonzero if instructions present in ARMv7E-M can be used.  */
401 extern int arm_arch7em;
402 
403 /* Nonzero if instructions present in ARMv8 can be used.  */
404 extern int arm_arch8;
405 
406 /* Nonzero if this chip can benefit from load scheduling.  */
407 extern int arm_ld_sched;
408 
409 /* Nonzero if this chip is a StrongARM.  */
410 extern int arm_tune_strongarm;
411 
412 /* Nonzero if this chip supports Intel Wireless MMX technology.  */
413 extern int arm_arch_iwmmxt;
414 
415 /* Nonzero if this chip supports Intel Wireless MMX2 technology.  */
416 extern int arm_arch_iwmmxt2;
417 
418 /* Nonzero if this chip is an XScale.  */
419 extern int arm_arch_xscale;
420 
421 /* Nonzero if tuning for XScale  */
422 extern int arm_tune_xscale;
423 
424 /* Nonzero if we want to tune for stores that access the write-buffer.
425    This typically means an ARM6 or ARM7 with MMU or MPU.  */
426 extern int arm_tune_wbuf;
427 
428 /* Nonzero if tuning for Cortex-A9.  */
429 extern int arm_tune_cortex_a9;
430 
431 /* Nonzero if we should define __THUMB_INTERWORK__ in the
432    preprocessor.
433    XXX This is a bit of a hack, it's intended to help work around
434    problems in GLD which doesn't understand that armv5t code is
435    interworking clean.  */
436 extern int arm_cpp_interwork;
437 
438 /* Nonzero if chip supports Thumb 1.  */
439 extern int arm_arch_thumb1;
440 
441 /* Nonzero if chip supports Thumb 2.  */
442 extern int arm_arch_thumb2;
443 
444 /* Nonzero if chip supports integer division instruction.  */
445 extern int arm_arch_arm_hwdiv;
446 extern int arm_arch_thumb_hwdiv;
447 
448 /* Nonzero if chip disallows volatile memory access in IT block.  */
449 extern int arm_arch_no_volatile_ce;
450 
451 /* Nonzero if we should use Neon to handle 64-bits operations rather
452    than core registers.  */
453 extern int prefer_neon_for_64bits;
454 
455 /* Structure defining the current overall architectural target and tuning.  */
456 struct arm_build_target
457 {
458   /* Name of the target CPU, if known, or NULL if the target CPU was not
459      specified by the user (and inferred from the -march option).  */
460   const char *core_name;
461   /* Name of the target ARCH.  NULL if there is a selected CPU.  */
462   const char *arch_name;
463   /* Preprocessor substring (never NULL).  */
464   const char *arch_pp_name;
465   /* CPU identifier for the core we're compiling for (architecturally).  */
466   enum processor_type arch_core;
467   /* The base architecture value.  */
468   enum base_architecture base_arch;
469   /* Bitmap encapsulating the isa_bits for the target environment.  */
470   sbitmap isa;
471   /* Flags used for tuning.  Long term, these move into tune_params.  */
472   unsigned int tune_flags;
473   /* Tables with more detailed tuning information.  */
474   const struct tune_params *tune;
475   /* CPU identifier for the tuning target.  */
476   enum processor_type tune_core;
477 };
478 
479 extern struct arm_build_target arm_active_target;
480 
481 
482 #endif /* ! GCC_ARM_PROTOS_H */
483