1# CPU, FPU and architecture specifications for ARM. 2# 3# Copyright (C) 2011-2019 Free Software Foundation, Inc. 4# 5# This file is part of GCC. 6# 7# GCC is free software; you can redistribute it and/or modify it under 8# the terms of the GNU General Public License as published by the Free 9# Software Foundation; either version 3, or (at your option) any later 10# version. 11# 12# GCC is distributed in the hope that it will be useful, but WITHOUT ANY 13# WARRANTY; without even the implied warranty of MERCHANTABILITY or 14# FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 15# for more details. 16# 17# You should have received a copy of the GNU General Public License 18# along with GCC; see the file COPYING3. If not see 19# <http://www.gnu.org/licenses/>. 20 21# This file describes all the various CPUs, FPUs and architectures supported 22# by the compiler. It is pre-processed by parsecpu.awk for a number of 23# purposes. 24# 25# The general form is a sequence of begin..end blocks with the following 26# syntax: 27# begin <object-type> <name> 28# attribute-statement* 29# end <object-type> <name> 30# 31# where object type is one of "cpu" "arch" "fpu". Each object type has 32# a specific set of permitted attributes, some of which are optional; further 33# details can be found below. 34# 35# Some objects cross-reference other objects by name. Objects are permitted 36# in any order and it is not necessary to place a cross-referenced object 37# earlier in the file. 38# 39# The object names for cpu, arch and fpu objects are used for the public option 40# names in the final compiler. The order within each group is preserved and 41# forms the order for the list within the compiler. 42 43# Most objects in this file support forward references. The major 44# exception is feature groups, which may only refer to previously 45# defined features or feature groups. This is done to avoid the risk 46# of feature groups recursively referencing each other and causing 47# the parser to hang. 48 49# Features - general convention: all lower case. 50 51# Architecture rel 4 52define feature armv4 53 54# Thumb aware. 55define feature thumb 56 57# Architecture rel 5t. 58define feature armv5t 59 60# Architecture rel 5te. 61define feature armv5te 62 63# XScale. 64define feature xscale 65 66# Architecture rel 6. 67define feature armv6 68 69# Architecture rel 6k. 70define feature armv6k 71 72# Thumb-2. 73define feature thumb2 74 75# Instructions not present in 'M' profile. 76define feature notm 77 78# Architecture uses be8 mode in big-endian. 79define feature be8 80 81# Thumb division instructions. 82define feature tdiv 83 84# Architecture rel 7e-m. 85define feature armv7em 86 87# Architecture rel 7. 88define feature armv7 89 90# MP extension to ArmV7-A 91define feature mp 92 93# SEC extension to ArmV7-A 94define feature sec 95 96# ARM division instructions. 97define feature adiv 98 99# Architecture rel 8. 100define feature armv8 101 102# ARMv8 CRC32 instructions. 103define feature crc32 104 105# XScale v2 (Wireless MMX). 106define feature iwmmxt 107 108# XScale Wireless MMX2. 109define feature iwmmxt2 110 111# Architecture rel 8.1. 112define feature armv8_1 113 114# Architecture rel 8.2. 115define feature armv8_2 116 117# Architecture rel 8.3. 118define feature armv8_3 119 120# Architecture rel 8.4. 121define feature armv8_4 122 123# Architecture rel 8.5. 124define feature armv8_5 125 126# M-Profile security extensions. 127define feature cmse 128 129# Floating point and Neon extensions. 130# VFPv1 is not supported in GCC. 131 132# Vector floating point v2. 133define feature vfpv2 134 135# Vector floating point v3. 136define feature vfpv3 137 138# Vector floating point v4. 139define feature vfpv4 140 141# Floating point v5. 142define feature fpv5 143 144# ARMv7-A LPAE. 145define feature lpae 146 147# Advanced SIMD instructions. 148define feature neon 149 150# Conversions to/from fp16 (VFPv3 extension). 151define feature fp16conv 152 153# Double precision operations supported. 154define feature fp_dbl 155 156# 32 Double precision registers. 157define feature fp_d32 158 159# Crypto extension to ARMv8. 160define feature crypto 161 162# FP16 data processing (half-precision float). 163define feature fp16 164 165# Dot Product instructions extension to ARMv8.2-a. 166define feature dotprod 167 168# Half-precision floating-point instructions in ARMv8.4-A. 169define feature fp16fml 170 171# ISA Quirks (errata?). Don't forget to add this to the fgroup 172# ALL_QUIRKS below. 173 174# No volatile memory in IT blocks. 175define feature quirk_no_volatile_ce 176 177# Previously mis-identified by GCC. 178define feature quirk_armv6kz 179 180# Cortex-M3 LDRD quirk. 181define feature quirk_cm3_ldrd 182 183# (Very) slow multiply operations. Should probably be a tuning bit. 184define feature smallmul 185 186# Speculation Barrier Instruction for v8-A architectures, added by 187# default to v8.5-A 188define feature sb 189 190# Execution and Data Prediction Restriction Instruction for 191# v8-A architectures, added by default from v8.5-A 192define feature predres 193 194# Feature groups. Conventionally all (or mostly) upper case. 195# ALL_FPU lists all the feature bits associated with the floating-point 196# unit; these will all be removed if the floating-point unit is disabled 197# (eg -mfloat-abi=soft). ALL_FPU_INTERNAL must ONLY contain features that 198# form part of a named -mfpu option; it is used to map the capabilities 199# back to a named FPU for the benefit of the assembler. 200# 201# ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the 202# construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD 203# extensions that are either part of a named FPU or optional extensions 204# respectively. 205 206 207# List of all cryptographic extensions to stripout if crypto is 208# disabled. Currently, that's trivial, but we define it anyway for 209# consistency with the SIMD and FP disable lists. 210define fgroup ALL_CRYPTO crypto 211 212# List of all SIMD bits to strip out if SIMD is disabled. This does 213# strip off 32 D-registers, but does not remove support for 214# double-precision FP. 215define fgroup ALL_SIMD_INTERNAL fp_d32 neon ALL_CRYPTO 216define fgroup ALL_SIMD ALL_SIMD_INTERNAL dotprod fp16fml 217 218# List of all FPU bits to strip out if -mfpu is used to override the 219# default. fp16 is deliberately missing from this list. 220define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL 221 222# Similarly, but including fp16 and other extensions that aren't part of 223# -mfpu support. 224define fgroup ALL_FP fp16 ALL_FPU_INTERNAL 225 226define fgroup ARMv4 armv4 notm 227define fgroup ARMv4t ARMv4 thumb 228define fgroup ARMv5t ARMv4t armv5t 229define fgroup ARMv5te ARMv5t armv5te 230define fgroup ARMv5tej ARMv5te 231define fgroup ARMv6 ARMv5te armv6 be8 232define fgroup ARMv6j ARMv6 233define fgroup ARMv6k ARMv6 armv6k 234define fgroup ARMv6z ARMv6 235define fgroup ARMv6kz ARMv6k quirk_armv6kz 236define fgroup ARMv6zk ARMv6k 237define fgroup ARMv6t2 ARMv6 thumb2 238# This is suspect. ARMv6-m doesn't really pull in any useful features 239# from ARMv5* or ARMv6. 240define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8 241# This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and 242# integer SIMD instructions that are in ARMv6T2. */ 243define fgroup ARMv7 ARMv6m thumb2 armv7 244 245define fgroup ARMv7a ARMv7 notm armv6k 246define fgroup ARMv7ve ARMv7a adiv tdiv lpae mp sec 247define fgroup ARMv7r ARMv7a tdiv 248define fgroup ARMv7m ARMv7 tdiv 249define fgroup ARMv7em ARMv7m armv7em 250define fgroup ARMv8a ARMv7ve armv8 251define fgroup ARMv8_1a ARMv8a crc32 armv8_1 252define fgroup ARMv8_2a ARMv8_1a armv8_2 253define fgroup ARMv8_3a ARMv8_2a armv8_3 254define fgroup ARMv8_4a ARMv8_3a armv8_4 255define fgroup ARMv8_5a ARMv8_4a armv8_5 sb predres 256define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv 257define fgroup ARMv8m_main ARMv7m armv8 cmse 258define fgroup ARMv8r ARMv8a 259 260# Useful combinations. 261define fgroup VFPv2 vfpv2 262define fgroup VFPv3 VFPv2 vfpv3 263define fgroup VFPv4 VFPv3 vfpv4 fp16conv 264define fgroup FPv5 VFPv4 fpv5 265 266define fgroup FP_DBL fp_dbl 267define fgroup FP_D32 FP_DBL fp_d32 268define fgroup FP_ARMv8 FPv5 FP_D32 269define fgroup NEON FP_D32 neon 270define fgroup CRYPTO NEON crypto 271define fgroup DOTPROD NEON dotprod 272 273# List of all quirk bits to strip out when comparing CPU features with 274# architectures. 275# xscale isn't really a 'quirk', but it isn't an architecture either and we 276# need to ignore it for matching purposes. 277define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd xscale 278 279# Architecture entries 280# format: 281# begin arch <name> 282# tune for <cpu> 283# [tune flags <list>] 284# base <name> 285# [profile <A|R|M>] 286# isa <isa-flags-list> 287# end arch <name> 288# 289 290begin arch armv4 291 tune for arm7tdmi 292 tune flags CO_PROC 293 base 4 294 isa ARMv4 295end arch armv4 296 297begin arch armv4t 298 tune for arm7tdmi 299 tune flags CO_PROC 300 base 4T 301 isa ARMv4t 302end arch armv4t 303 304begin arch armv5t 305 tune for arm10tdmi 306 tune flags CO_PROC 307 base 5T 308 isa ARMv5t 309end arch armv5t 310 311begin arch armv5te 312 tune for arm1026ej-s 313 tune flags CO_PROC 314 base 5TE 315 isa ARMv5te 316 option fp add VFPv2 FP_DBL 317 optalias vfpv2 fp 318 option nofp remove ALL_FP 319end arch armv5te 320 321begin arch armv5tej 322 tune for arm1026ej-s 323 tune flags CO_PROC 324 base 5TEJ 325 isa ARMv5tej 326 option fp add VFPv2 FP_DBL 327 optalias vfpv2 fp 328 option nofp remove ALL_FP 329end arch armv5tej 330 331begin arch armv6 332 tune for arm1136j-s 333 tune flags CO_PROC 334 base 6 335 isa ARMv6 336 option fp add VFPv2 FP_DBL 337 optalias vfpv2 fp 338 option nofp remove ALL_FP 339end arch armv6 340 341begin arch armv6j 342 tune for arm1136j-s 343 tune flags CO_PROC 344 base 6J 345 isa ARMv6j 346 option fp add VFPv2 FP_DBL 347 optalias vfpv2 fp 348 option nofp remove ALL_FP 349end arch armv6j 350 351begin arch armv6k 352 tune for mpcore 353 tune flags CO_PROC 354 base 6K 355 isa ARMv6k 356 option fp add VFPv2 FP_DBL 357 optalias vfpv2 fp 358 option nofp remove ALL_FP 359end arch armv6k 360 361begin arch armv6z 362 tune for arm1176jz-s 363 tune flags CO_PROC 364 base 6Z 365 isa ARMv6z 366 option fp add VFPv2 FP_DBL 367 optalias vfpv2 fp 368 option nofp remove ALL_FP 369end arch armv6z 370 371begin arch armv6kz 372 tune for arm1176jz-s 373 tune flags CO_PROC 374 base 6KZ 375 isa ARMv6kz 376 option fp add VFPv2 FP_DBL 377 optalias vfpv2 fp 378 option nofp remove ALL_FP 379end arch armv6kz 380 381begin arch armv6zk 382 tune for arm1176jz-s 383 tune flags CO_PROC 384 base 6KZ 385 isa ARMv6kz 386 option fp add VFPv2 FP_DBL 387 optalias vfpv2 fp 388 option nofp remove ALL_FP 389end arch armv6zk 390 391begin arch armv6t2 392 tune for arm1156t2-s 393 tune flags CO_PROC 394 base 6T2 395 isa ARMv6t2 396 option fp add VFPv2 FP_DBL 397 optalias vfpv2 fp 398 option nofp remove ALL_FP 399end arch armv6t2 400 401begin arch armv6-m 402 tune for cortex-m1 403 base 6M 404 profile M 405 isa ARMv6m 406end arch armv6-m 407 408# This is now equivalent to armv6-m, but we keep it because some 409# versions of GAS still distinguish between the two. 410begin arch armv6s-m 411 tune for cortex-m1 412 base 6M 413 profile M 414 isa ARMv6m 415end arch armv6s-m 416 417begin arch armv7 418 tune for cortex-a8 419 tune flags CO_PROC 420 base 7 421 isa ARMv7 422# fp => VFPv3-d16 (only useful for the A+R profile subset). 423 option fp add VFPv3 FP_DBL 424 optalias vfpv3-d16 fp 425 option nofp remove ALL_FP 426end arch armv7 427 428begin arch armv7-a 429 tune for cortex-a8 430 tune flags CO_PROC 431 base 7A 432 profile A 433 isa ARMv7a 434 option mp add mp 435 option sec add sec 436# fp => VFPv3-d16, simd => neon-vfpv3 437 option fp add VFPv3 FP_DBL 438 optalias vfpv3-d16 fp 439 option vfpv3 add VFPv3 FP_D32 440 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 441 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 442 option vfpv4-d16 add VFPv4 FP_DBL 443 option vfpv4 add VFPv4 FP_D32 444 option simd add VFPv3 NEON 445 optalias neon simd 446 optalias neon-vfpv3 simd 447 option neon-fp16 add VFPv3 NEON fp16conv 448 option neon-vfpv4 add VFPv4 NEON 449 option nosimd remove ALL_SIMD 450 option nofp remove ALL_FP 451end arch armv7-a 452 453begin arch armv7ve 454 tune for cortex-a8 455 tune flags CO_PROC 456 base 7A 457 profile A 458 isa ARMv7ve 459# fp => VFPv4-d16, simd => neon-vfpv4 460 option vfpv3-d16 add VFPv3 FP_DBL 461 option vfpv3 add VFPv3 FP_D32 462 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 463 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv 464 option fp add VFPv4 FP_DBL 465 optalias vfpv4-d16 fp 466 option vfpv4 add VFPv4 FP_D32 467 option neon add VFPv3 NEON 468 optalias neon-vfpv3 neon 469 option neon-fp16 add VFPv3 NEON fp16conv 470 option simd add VFPv4 NEON 471 optalias neon-vfpv4 simd 472 option nosimd remove ALL_SIMD 473 option nofp remove ALL_FP 474end arch armv7ve 475 476begin arch armv7-r 477 tune for cortex-r4 478 tune flags CO_PROC 479 base 7R 480 profile R 481 isa ARMv7r 482# ARMv7-r uses VFPv3-d16 483 option fp.sp add VFPv3 484 optalias vfpv3xd fp.sp 485 option fp add VFPv3 FP_DBL 486 optalias vfpv3-d16 fp 487 option vfpv3xd-fp16 add VFPv3 fp16conv 488 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 489 option idiv add adiv 490 option nofp remove ALL_FP 491 option noidiv remove adiv 492end arch armv7-r 493 494begin arch armv7-m 495 tune for cortex-m3 496 tune flags CO_PROC 497 base 7M 498 profile M 499 isa ARMv7m 500# In theory FP is permitted in v7-m, but in practice no implementations exist. 501# leave it out for now. 502end arch armv7-m 503 504begin arch armv7e-m 505 tune for cortex-m4 506 tune flags CO_PROC 507 base 7EM 508 profile M 509 isa ARMv7em 510# fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16 511 option fp add VFPv4 512 optalias vfpv4-sp-d16 fp 513 option fpv5 add FPv5 514 option fp.dp add FPv5 FP_DBL 515 optalias fpv5-d16 fp.dp 516 option nofp remove ALL_FP 517end arch armv7e-m 518 519begin arch armv8-a 520 tune for cortex-a53 521 tune flags CO_PROC 522 base 8A 523 profile A 524 isa ARMv8a 525 option crc add crc32 526 option simd add FP_ARMv8 NEON 527 option crypto add FP_ARMv8 CRYPTO 528 option nocrypto remove ALL_CRYPTO 529 option nofp remove ALL_FP 530 option sb add sb 531 option predres add predres 532end arch armv8-a 533 534begin arch armv8.1-a 535 tune for cortex-a53 536 tune flags CO_PROC 537 base 8A 538 profile A 539 isa ARMv8_1a 540 option simd add FP_ARMv8 NEON 541 option crypto add FP_ARMv8 CRYPTO 542 option nocrypto remove ALL_CRYPTO 543 option nofp remove ALL_FP 544 option sb add sb 545 option predres add predres 546end arch armv8.1-a 547 548begin arch armv8.2-a 549 tune for cortex-a53 550 tune flags CO_PROC 551 base 8A 552 profile A 553 isa ARMv8_2a 554 option simd add FP_ARMv8 NEON 555 option fp16 add fp16 FP_ARMv8 NEON 556 option fp16fml add fp16fml fp16 FP_ARMv8 NEON 557 option crypto add FP_ARMv8 CRYPTO 558 option nocrypto remove ALL_CRYPTO 559 option nofp remove ALL_FP 560 option dotprod add FP_ARMv8 DOTPROD 561 option sb add sb 562 option predres add predres 563end arch armv8.2-a 564 565begin arch armv8.3-a 566 tune for cortex-a53 567 tune flags CO_PROC 568 base 8A 569 profile A 570 isa ARMv8_3a 571 option simd add FP_ARMv8 NEON 572 option fp16 add fp16 FP_ARMv8 NEON 573 option fp16fml add fp16fml fp16 FP_ARMv8 NEON 574 option crypto add FP_ARMv8 CRYPTO 575 option nocrypto remove ALL_CRYPTO 576 option nofp remove ALL_FP 577 option dotprod add FP_ARMv8 DOTPROD 578 option sb add sb 579 option predres add predres 580end arch armv8.3-a 581 582begin arch armv8.4-a 583 tune for cortex-a53 584 tune flags CO_PROC 585 base 8A 586 profile A 587 isa ARMv8_4a 588 option simd add FP_ARMv8 DOTPROD 589 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 590 option crypto add FP_ARMv8 CRYPTO DOTPROD 591 option nocrypto remove ALL_CRYPTO 592 option nofp remove ALL_FP 593 option sb add sb 594 option predres add predres 595end arch armv8.4-a 596 597begin arch armv8.5-a 598 tune for cortex-a53 599 tune flags CO_PROC 600 base 8A 601 profile A 602 isa ARMv8_5a 603 option simd add FP_ARMv8 DOTPROD 604 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD 605 option crypto add FP_ARMv8 CRYPTO DOTPROD 606 option nocrypto remove ALL_CRYPTO 607 option nofp remove ALL_FP 608end arch armv8.5-a 609 610begin arch armv8-m.base 611 tune for cortex-m23 612 base 8M_BASE 613 profile M 614 isa ARMv8m_base 615end arch armv8-m.base 616 617begin arch armv8-m.main 618 tune for cortex-m7 619 tune flags CO_PROC 620 base 8M_MAIN 621 profile M 622 isa ARMv8m_main 623 option dsp add armv7em 624# fp => FPv5-sp-d16; fp.dp => FPv5-d16 625 option fp add FPv5 626 option fp.dp add FPv5 FP_DBL 627 option nofp remove ALL_FP 628 option nodsp remove armv7em 629end arch armv8-m.main 630 631begin arch armv8-r 632 tune for cortex-r52 633 tune flags CO_PROC 634 base 8R 635 profile R 636 isa ARMv8r 637 option crc add crc32 638# fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision 639# note: no fp option for fp-armv8 (d16) + double precision at the moment 640 option fp.sp add FPv5 641 option simd add FP_ARMv8 NEON 642 option crypto add FP_ARMv8 CRYPTO 643 option nocrypto remove ALL_CRYPTO 644 option nofp remove ALL_FP 645end arch armv8-r 646 647begin arch iwmmxt 648 tune for iwmmxt 649 tune flags LDSCHED STRONG XSCALE 650 base 5TE 651 isa ARMv5te xscale iwmmxt 652end arch iwmmxt 653 654begin arch iwmmxt2 655 tune for iwmmxt2 656 tune flags LDSCHED STRONG XSCALE 657 base 5TE 658 isa ARMv5te xscale iwmmxt iwmmxt2 659end arch iwmmxt2 660 661# CPU entries 662# format: 663# begin cpu <name> 664# [cname <c-compatible-name>] 665# [alias <name>+] 666# [tune for <cpu-name>] 667# [tune flags <list>] 668# architecture <name> 669# [isa <additional-isa-flags-list>] 670# [option <name> add|remove <isa-list>]* 671# [optalias <name> <optname>]* 672# [costs <name>] 673# [vendor <vendor-id> 674# [part <part-id> [minrev [maxrev]]] 675# end cpu <name> 676# 677# If omitted, cname is formed from transforming the cpuname to convert 678# non-valid punctuation characters to '_'. 679# Any number of alias names may be specified for a CPU. If the name starts 680# with a '!' then it will be recognized as a valid name, but will not 681# be printed in any help text listing permitted CPUs. 682# If specified, tune for specifies a CPU target to use for tuning this core. 683# isa flags are appended to those defined by the architecture. 684# Each add option must have a distinct feature set and each remove 685# option must similarly have a distinct feature set. Option aliases can be 686# added with the optalias statement. 687# Vendor, part and revision information is used for native CPU and architecture 688# detection. All values must be in hex (lower case) with the leading '0x' 689# omitted. For example the cortex-a9 will have vendor 41 and part c09. 690# Revision information is used to match a subrange of part 691# revisions: minrev <= detected <= maxrev. 692# If a minrev or maxrev are omitted then minrev defaults to zero and maxrev 693# to infinity. 694# Revision information is not implemented yet; no part uses it. 695 696# V4 Architecture Processors 697begin cpu arm8 698 tune flags LDSCHED 699 architecture armv4 700 costs fastmul 701end cpu arm8 702 703begin cpu arm810 704 tune flags LDSCHED 705 architecture armv4 706 costs fastmul 707end cpu arm810 708 709begin cpu strongarm 710 alias strongarm110 !strongarm1100 !strongarm1110 711 tune flags LDSCHED STRONG 712 architecture armv4 713 costs strongarm 714end cpu strongarm 715 716begin cpu fa526 717 tune flags LDSCHED 718 architecture armv4 719 costs fastmul 720end cpu fa526 721 722begin cpu fa626 723 tune flags LDSCHED 724 architecture armv4 725 costs fastmul 726end cpu fa626 727 728 729# V4T Architecture Processors 730begin cpu arm7tdmi 731 alias arm7tdmi-s 732 tune flags CO_PROC 733 architecture armv4t 734 costs fastmul 735end cpu arm7tdmi 736 737begin cpu arm710t 738 alias arm720t arm740t 739 tune flags WBUF 740 architecture armv4t 741 costs fastmul 742end cpu arm710t 743 744begin cpu arm9 745 tune flags LDSCHED 746 architecture armv4t 747 costs fastmul 748end cpu arm9 749 750begin cpu arm9tdmi 751 tune flags LDSCHED 752 architecture armv4t 753 costs fastmul 754end cpu arm9tdmi 755 756begin cpu arm920t 757 alias arm920 arm922t arm940t ep9312 758 tune flags LDSCHED 759 architecture armv4t 760 costs fastmul 761end cpu arm920t 762 763 764# V5T Architecture Processors 765# These used VFPv1 which isn't supported by GCC 766begin cpu arm10tdmi 767 alias arm1020t 768 tune flags LDSCHED 769 architecture armv5t 770 costs fastmul 771end cpu arm10tdmi 772 773 774# V5TE Architecture Processors 775begin cpu arm9e 776 alias arm946e-s arm966e-s arm968e-s 777 tune flags LDSCHED 778 architecture armv5te+fp 779 option nofp remove ALL_FP 780 costs 9e 781end cpu arm9e 782 783begin cpu arm10e 784 alias arm1020e arm1022e 785 tune flags LDSCHED 786 architecture armv5te+fp 787 option nofp remove ALL_FP 788 costs fastmul 789end cpu arm10e 790 791begin cpu xscale 792 tune flags LDSCHED XSCALE 793 architecture armv5te 794 isa xscale 795 costs xscale 796end cpu xscale 797 798begin cpu iwmmxt 799 tune flags LDSCHED XSCALE 800 architecture iwmmxt 801 costs xscale 802end cpu iwmmxt 803 804begin cpu iwmmxt2 805 tune flags LDSCHED XSCALE 806 architecture iwmmxt2 807 costs xscale 808end cpu iwmmxt2 809 810begin cpu fa606te 811 tune flags LDSCHED 812 architecture armv5te 813 costs 9e 814end cpu fa606te 815 816begin cpu fa626te 817 tune flags LDSCHED 818 architecture armv5te 819 costs 9e 820end cpu fa626te 821 822begin cpu fmp626 823 tune flags LDSCHED 824 architecture armv5te 825 costs 9e 826end cpu fmp626 827 828begin cpu fa726te 829 tune flags LDSCHED 830 architecture armv5te 831 costs fa726te 832end cpu fa726te 833 834 835# V5TEJ Architecture Processors 836begin cpu arm926ej-s 837 cname arm926ejs 838 tune flags LDSCHED 839 architecture armv5tej+fp 840 option nofp remove ALL_FP 841 costs 9e 842 vendor 41 843 part 926 844end cpu arm926ej-s 845 846begin cpu arm1026ej-s 847 cname arm1026ejs 848 tune flags LDSCHED 849 architecture armv5tej+fp 850 option nofp remove ALL_FP 851 costs 9e 852 vendor 41 853 part a26 854end cpu arm1026ej-s 855 856 857# V6 Architecture Processors 858begin cpu arm1136j-s 859 cname arm1136js 860 tune flags LDSCHED 861 architecture armv6j 862 costs 9e 863end cpu arm1136j-s 864 865begin cpu arm1136jf-s 866 cname arm1136jfs 867 tune flags LDSCHED 868 architecture armv6j+fp 869 costs 9e 870 vendor 41 871 part b36 872end cpu arm1136jf-s 873 874begin cpu arm1176jz-s 875 cname arm1176jzs 876 tune flags LDSCHED 877 architecture armv6kz 878 costs 9e 879end cpu arm1176jz-s 880 881begin cpu arm1176jzf-s 882 cname arm1176jzfs 883 tune flags LDSCHED 884 architecture armv6kz+fp 885 costs 9e 886 vendor 41 887 part b76 888end cpu arm1176jzf-s 889 890begin cpu mpcorenovfp 891 tune flags LDSCHED 892 architecture armv6k 893 costs 9e 894end cpu mpcorenovfp 895 896begin cpu mpcore 897 tune flags LDSCHED 898 architecture armv6k+fp 899 costs 9e 900 vendor 41 901 part b02 902end cpu mpcore 903 904begin cpu arm1156t2-s 905 cname arm1156t2s 906 tune flags LDSCHED 907 architecture armv6t2 908 costs v6t2 909end cpu arm1156t2-s 910 911begin cpu arm1156t2f-s 912 cname arm1156t2fs 913 tune flags LDSCHED 914 architecture armv6t2+fp 915 costs v6t2 916 vendor 41 917 part b56 918end cpu arm1156t2f-s 919 920 921# V6M Architecture Processors 922begin cpu cortex-m1 923 cname cortexm1 924 tune flags LDSCHED 925 architecture armv6s-m 926 costs v6m 927 vendor 41 928 part c21 929end cpu cortex-m1 930 931begin cpu cortex-m0 932 cname cortexm0 933 tune flags LDSCHED 934 architecture armv6s-m 935 costs v6m 936 vendor 41 937 part c20 938end cpu cortex-m0 939 940begin cpu cortex-m0plus 941 cname cortexm0plus 942 tune flags LDSCHED 943 architecture armv6s-m 944 costs v6m 945end cpu cortex-m0plus 946 947 948# V6M Architecture Processors for small-multiply implementations. 949begin cpu cortex-m1.small-multiply 950 cname cortexm1smallmultiply 951 tune for cortex-m1 952 tune flags LDSCHED SMALLMUL 953 architecture armv6s-m 954 costs v6m 955end cpu cortex-m1.small-multiply 956 957begin cpu cortex-m0.small-multiply 958 cname cortexm0smallmultiply 959 tune for cortex-m0 960 tune flags LDSCHED SMALLMUL 961 architecture armv6s-m 962 costs v6m 963end cpu cortex-m0.small-multiply 964 965begin cpu cortex-m0plus.small-multiply 966 cname cortexm0plussmallmultiply 967 tune for cortex-m0plus 968 tune flags LDSCHED SMALLMUL 969 architecture armv6s-m 970 costs v6m 971end cpu cortex-m0plus.small-multiply 972 973 974# V7 Architecture Processors 975begin cpu generic-armv7-a 976 cname genericv7a 977 tune flags LDSCHED 978 architecture armv7-a+fp 979 option mp add mp 980 option sec add sec 981 option vfpv3-d16 add VFPv3 FP_DBL 982 option vfpv3 add VFPv3 FP_D32 983 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv 984 option vfpv3-fp16 add VFPv3 FP_D32 fp16conv 985 option vfpv4-d16 add VFPv4 FP_DBL 986 option vfpv4 add VFPv4 FP_D32 987 option simd add VFPv3 NEON 988 optalias neon simd 989 optalias neon-vfpv3 simd 990 option neon-fp16 add VFPv3 NEON fp16conv 991 option neon-vfpv4 add VFPv4 NEON 992 option nosimd remove ALL_SIMD 993 option nofp remove ALL_FP 994 costs cortex 995end cpu generic-armv7-a 996 997begin cpu cortex-a5 998 cname cortexa5 999 tune flags LDSCHED 1000 architecture armv7-a+mp+sec+neon-fp16 1001 option nosimd remove ALL_SIMD 1002 option nofp remove ALL_FP 1003 costs cortex_a5 1004 vendor 41 1005 part c05 1006end cpu cortex-a5 1007 1008begin cpu cortex-a7 1009 cname cortexa7 1010 tune flags LDSCHED 1011 architecture armv7ve+simd 1012 option nosimd remove ALL_SIMD 1013 option nofp remove ALL_FP 1014 costs cortex_a7 1015 vendor 41 1016 part c07 1017end cpu cortex-a7 1018 1019begin cpu cortex-a8 1020 cname cortexa8 1021 tune flags LDSCHED 1022 architecture armv7-a+sec+simd 1023 option nofp remove ALL_FP 1024 costs cortex_a8 1025 vendor 41 1026 part c08 1027end cpu cortex-a8 1028 1029begin cpu cortex-a9 1030 cname cortexa9 1031 tune flags LDSCHED 1032 architecture armv7-a+mp+sec+neon-fp16 1033 option nosimd remove ALL_SIMD 1034 option nofp remove ALL_FP 1035 costs cortex_a9 1036 vendor 41 1037 part c09 1038end cpu cortex-a9 1039 1040begin cpu cortex-a12 1041 cname cortexa12 1042 tune for cortex-a17 1043 tune flags LDSCHED 1044 architecture armv7ve+simd 1045 option nofp remove ALL_FP 1046 costs cortex_a12 1047 vendor 41 1048 part c0d 1049end cpu cortex-a12 1050 1051begin cpu cortex-a15 1052 cname cortexa15 1053 tune flags LDSCHED 1054 architecture armv7ve+simd 1055 option nofp remove ALL_FP 1056 costs cortex_a15 1057 vendor 41 1058 part c0f 1059end cpu cortex-a15 1060 1061begin cpu cortex-a17 1062 cname cortexa17 1063 tune flags LDSCHED 1064 architecture armv7ve+simd 1065 option nofp remove ALL_FP 1066 costs cortex_a12 1067 vendor 41 1068 part c0e 1069end cpu cortex-a17 1070 1071begin cpu cortex-r4 1072 cname cortexr4 1073 tune flags LDSCHED 1074 architecture armv7-r 1075 costs cortex 1076end cpu cortex-r4 1077 1078begin cpu cortex-r4f 1079 cname cortexr4f 1080 tune flags LDSCHED 1081 architecture armv7-r+fp 1082 costs cortex 1083 vendor 41 1084 part c14 1085end cpu cortex-r4f 1086 1087begin cpu cortex-r5 1088 cname cortexr5 1089 tune flags LDSCHED 1090 architecture armv7-r+idiv+fp 1091 option nofp.dp remove FP_DBL 1092 option nofp remove ALL_FP 1093 costs cortex 1094 vendor 41 1095 part c15 1096end cpu cortex-r5 1097 1098begin cpu cortex-r7 1099 cname cortexr7 1100 tune flags LDSCHED 1101 architecture armv7-r+idiv+vfpv3-d16-fp16 1102 option nofp.dp remove FP_DBL 1103 option nofp remove ALL_FP 1104 costs cortex 1105 vendor 41 1106 part c17 1107end cpu cortex-r7 1108 1109begin cpu cortex-r8 1110 cname cortexr8 1111 tune for cortex-r7 1112 tune flags LDSCHED 1113 architecture armv7-r+idiv+vfpv3-d16-fp16 1114 option nofp.dp remove FP_DBL 1115 option nofp remove ALL_FP 1116 costs cortex 1117 vendor 41 1118 part c18 1119end cpu cortex-r8 1120 1121begin cpu cortex-m7 1122 cname cortexm7 1123 tune flags LDSCHED 1124 architecture armv7e-m+fp.dp 1125 isa quirk_no_volatile_ce 1126 option nofp.dp remove FP_DBL 1127 option nofp remove ALL_FP 1128 costs cortex_m7 1129end cpu cortex-m7 1130 1131begin cpu cortex-m4 1132 cname cortexm4 1133 tune flags LDSCHED 1134 architecture armv7e-m+fp 1135 option nofp remove ALL_FP 1136 costs v7m 1137 vendor 41 1138 part c24 1139end cpu cortex-m4 1140 1141begin cpu cortex-m3 1142 cname cortexm3 1143 tune flags LDSCHED 1144 architecture armv7-m 1145 isa quirk_cm3_ldrd 1146 costs v7m 1147 vendor 41 1148 part c23 1149end cpu cortex-m3 1150 1151begin cpu marvell-pj4 1152 tune flags LDSCHED 1153 architecture armv7-a+mp+sec 1154 costs marvell_pj4 1155end cpu marvell-pj4 1156 1157 1158# V7 big.LITTLE implementations 1159begin cpu cortex-a15.cortex-a7 1160 cname cortexa15cortexa7 1161 tune for cortex-a7 1162 tune flags LDSCHED 1163 architecture armv7ve+simd 1164 option nofp remove ALL_FP 1165 costs cortex_a15 1166end cpu cortex-a15.cortex-a7 1167 1168begin cpu cortex-a17.cortex-a7 1169 cname cortexa17cortexa7 1170 tune for cortex-a7 1171 tune flags LDSCHED 1172 architecture armv7ve+simd 1173 option nofp remove ALL_FP 1174 costs cortex_a12 1175end cpu cortex-a17.cortex-a7 1176 1177 1178# V8 A-profile Architecture Processors 1179begin cpu cortex-a32 1180 cname cortexa32 1181 tune for cortex-a53 1182 tune flags LDSCHED 1183 architecture armv8-a+crc+simd 1184 option crypto add FP_ARMv8 CRYPTO 1185 option nofp remove ALL_FP 1186 costs cortex_a35 1187 vendor 41 1188 part d01 1189end cpu cortex-a32 1190 1191begin cpu cortex-a35 1192 cname cortexa35 1193 tune for cortex-a53 1194 tune flags LDSCHED 1195 architecture armv8-a+crc+simd 1196 option crypto add FP_ARMv8 CRYPTO 1197 option nofp remove ALL_FP 1198 costs cortex_a35 1199 vendor 41 1200 part d04 1201end cpu cortex-a35 1202 1203begin cpu cortex-a53 1204 cname cortexa53 1205 tune flags LDSCHED 1206 architecture armv8-a+crc+simd 1207 option crypto add FP_ARMv8 CRYPTO 1208 option nofp remove ALL_FP 1209 costs cortex_a53 1210 vendor 41 1211 part d03 1212end cpu cortex-a53 1213 1214begin cpu cortex-a57 1215 cname cortexa57 1216 tune flags LDSCHED 1217 architecture armv8-a+crc+simd 1218 option crypto add FP_ARMv8 CRYPTO 1219 costs cortex_a57 1220 vendor 41 1221 part d07 1222end cpu cortex-a57 1223 1224begin cpu cortex-a72 1225 cname cortexa72 1226 tune for cortex-a57 1227 tune flags LDSCHED 1228 architecture armv8-a+crc+simd 1229 option crypto add FP_ARMv8 CRYPTO 1230 costs cortex_a57 1231 vendor 41 1232 part d08 1233end cpu cortex-a72 1234 1235begin cpu cortex-a73 1236 cname cortexa73 1237 tune for cortex-a57 1238 tune flags LDSCHED 1239 architecture armv8-a+crc+simd 1240 option crypto add FP_ARMv8 CRYPTO 1241 costs cortex_a73 1242 vendor 41 1243 part d09 1244end cpu cortex-a73 1245 1246begin cpu exynos-m1 1247 cname exynosm1 1248 tune flags LDSCHED 1249 architecture armv8-a+crc+simd 1250 option crypto add FP_ARMv8 CRYPTO 1251 costs exynosm1 1252end cpu exynos-m1 1253 1254begin cpu xgene1 1255 tune flags LDSCHED 1256 architecture armv8-a+simd 1257 option crypto add FP_ARMv8 CRYPTO 1258 costs xgene1 1259end cpu xgene1 1260 1261# V8 A-profile big.LITTLE implementations 1262begin cpu cortex-a57.cortex-a53 1263 cname cortexa57cortexa53 1264 tune for cortex-a53 1265 tune flags LDSCHED 1266 architecture armv8-a+crc+simd 1267 option crypto add FP_ARMv8 CRYPTO 1268 costs cortex_a57 1269end cpu cortex-a57.cortex-a53 1270 1271begin cpu cortex-a72.cortex-a53 1272 cname cortexa72cortexa53 1273 tune for cortex-a53 1274 tune flags LDSCHED 1275 architecture armv8-a+crc+simd 1276 option crypto add FP_ARMv8 CRYPTO 1277 costs cortex_a57 1278end cpu cortex-a72.cortex-a53 1279 1280begin cpu cortex-a73.cortex-a35 1281 cname cortexa73cortexa35 1282 tune for cortex-a53 1283 tune flags LDSCHED 1284 architecture armv8-a+crc+simd 1285 option crypto add FP_ARMv8 CRYPTO 1286 costs cortex_a73 1287end cpu cortex-a73.cortex-a35 1288 1289begin cpu cortex-a73.cortex-a53 1290 cname cortexa73cortexa53 1291 tune for cortex-a53 1292 tune flags LDSCHED 1293 architecture armv8-a+crc+simd 1294 option crypto add FP_ARMv8 CRYPTO 1295 costs cortex_a73 1296end cpu cortex-a73.cortex-a53 1297 1298 1299# ARMv8.2 A-profile Architecture Processors 1300begin cpu cortex-a55 1301 cname cortexa55 1302 tune for cortex-a53 1303 tune flags LDSCHED 1304 architecture armv8.2-a+fp16+dotprod+simd 1305 option crypto add FP_ARMv8 CRYPTO 1306 option nofp remove ALL_FP 1307 costs cortex_a53 1308 vendor 41 1309 part d05 1310end cpu cortex-a55 1311 1312begin cpu cortex-a75 1313 cname cortexa75 1314 tune for cortex-a57 1315 tune flags LDSCHED 1316 architecture armv8.2-a+fp16+dotprod+simd 1317 option crypto add FP_ARMv8 CRYPTO 1318 costs cortex_a73 1319 vendor 41 1320 part d0a 1321end cpu cortex-a75 1322 1323begin cpu cortex-a76 1324 cname cortexa76 1325 tune for cortex-a57 1326 tune flags LDSCHED 1327 architecture armv8.2-a+fp16+dotprod+simd 1328 option crypto add FP_ARMv8 CRYPTO 1329 costs cortex_a57 1330 vendor 41 1331 part d0b 1332end cpu cortex-a76 1333 1334begin cpu neoverse-n1 1335 cname neoversen1 1336 alias !ares 1337 tune for cortex-a57 1338 tune flags LDSCHED 1339 architecture armv8.2-a+fp16+dotprod+simd 1340 option crypto add FP_ARMv8 CRYPTO 1341 costs cortex_a57 1342 vendor 41 1343 part d0c 1344end cpu neoverse-n1 1345 1346# ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations 1347begin cpu cortex-a75.cortex-a55 1348 cname cortexa75cortexa55 1349 tune for cortex-a53 1350 tune flags LDSCHED 1351 architecture armv8.2-a+fp16+dotprod+simd 1352 option crypto add FP_ARMv8 CRYPTO 1353 costs cortex_a73 1354end cpu cortex-a75.cortex-a55 1355 1356begin cpu cortex-a76.cortex-a55 1357 cname cortexa76cortexa55 1358 tune for cortex-a53 1359 tune flags LDSCHED 1360 architecture armv8.2-a+fp16+dotprod+simd 1361 option crypto add FP_ARMv8 CRYPTO 1362 costs cortex_a57 1363end cpu cortex-a76.cortex-a55 1364 1365# V8 M-profile implementations. 1366begin cpu cortex-m23 1367 cname cortexm23 1368 tune flags LDSCHED 1369 architecture armv8-m.base 1370 costs v6m 1371end cpu cortex-m23 1372 1373begin cpu cortex-m33 1374 cname cortexm33 1375 tune flags LDSCHED 1376 architecture armv8-m.main+dsp+fp 1377 option nofp remove ALL_FP 1378 option nodsp remove armv7em 1379 costs v7m 1380end cpu cortex-m33 1381 1382# V8 R-profile implementations. 1383begin cpu cortex-r52 1384 cname cortexr52 1385 tune flags LDSCHED 1386 architecture armv8-r+crc+simd 1387 option nofp.dp remove FP_DBL ALL_SIMD 1388 costs cortex 1389 vendor 41 1390 part d13 1391end cpu cortex-r52 1392 1393# FPU entries 1394# format: 1395# begin fpu <name> 1396# isa <isa-flags-list> 1397# end fpu <name> 1398 1399begin fpu vfp 1400 isa VFPv2 FP_DBL 1401end fpu vfp 1402 1403begin fpu vfpv2 1404 isa VFPv2 FP_DBL 1405end fpu vfpv2 1406 1407begin fpu vfpv3 1408 isa VFPv3 FP_D32 1409end fpu vfpv3 1410 1411begin fpu vfpv3-fp16 1412 isa VFPv3 FP_D32 fp16conv 1413end fpu vfpv3-fp16 1414 1415begin fpu vfpv3-d16 1416 isa VFPv3 FP_DBL 1417end fpu vfpv3-d16 1418 1419begin fpu vfpv3-d16-fp16 1420 isa VFPv3 FP_DBL fp16conv 1421end fpu vfpv3-d16-fp16 1422 1423begin fpu vfpv3xd 1424 isa VFPv3 1425end fpu vfpv3xd 1426 1427begin fpu vfpv3xd-fp16 1428 isa VFPv3 fp16conv 1429end fpu vfpv3xd-fp16 1430 1431begin fpu neon 1432 isa VFPv3 NEON 1433end fpu neon 1434 1435begin fpu neon-vfpv3 1436 isa VFPv3 NEON 1437end fpu neon-vfpv3 1438 1439begin fpu neon-fp16 1440 isa VFPv3 NEON fp16conv 1441end fpu neon-fp16 1442 1443begin fpu vfpv4 1444 isa VFPv4 FP_D32 1445end fpu vfpv4 1446 1447begin fpu neon-vfpv4 1448 isa VFPv4 NEON 1449end fpu neon-vfpv4 1450 1451begin fpu vfpv4-d16 1452 isa VFPv4 FP_DBL 1453end fpu vfpv4-d16 1454 1455begin fpu fpv4-sp-d16 1456 isa VFPv4 1457end fpu fpv4-sp-d16 1458 1459begin fpu fpv5-sp-d16 1460 isa FPv5 1461end fpu fpv5-sp-d16 1462 1463begin fpu fpv5-d16 1464 isa FPv5 FP_DBL 1465end fpu fpv5-d16 1466 1467begin fpu fp-armv8 1468 isa FP_ARMv8 1469end fpu fp-armv8 1470 1471begin fpu neon-fp-armv8 1472 isa FP_ARMv8 NEON 1473end fpu neon-fp-armv8 1474 1475begin fpu crypto-neon-fp-armv8 1476 isa FP_ARMv8 CRYPTO 1477end fpu crypto-neon-fp-armv8 1478 1479# Compatibility aliases. 1480begin fpu vfp3 1481 isa VFPv3 FP_D32 1482end fpu vfp3 1483