1 /* Definitions of target machine for GNU compiler, for ARM with a.out 2 Copyright (C) 1995-2016 Free Software Foundation, Inc. 3 Contributed by Richard Earnshaw (rearnsha@armltd.co.uk). 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 Under Section 7 of GPL version 3, you are granted additional 18 permissions described in the GCC Runtime Library Exception, version 19 3.1, as published by the Free Software Foundation. 20 21 You should have received a copy of the GNU General Public License and 22 a copy of the GCC Runtime Library Exception along with this program; 23 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see 24 <http://www.gnu.org/licenses/>. */ 25 26 #ifndef ASM_APP_ON 27 #define ASM_APP_ON "" 28 #endif 29 #ifndef ASM_APP_OFF 30 #define ASM_APP_OFF "" 31 #endif 32 33 /* Switch to the text or data segment. */ 34 #define TEXT_SECTION_ASM_OP "\t.text" 35 #define DATA_SECTION_ASM_OP "\t.data" 36 #define BSS_SECTION_ASM_OP "\t.bss" 37 38 /* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed, 39 make sure that this change is reflected in the function 40 coff_arm_is_local_label_name() in bfd/coff-arm.c. */ 41 #ifndef REGISTER_PREFIX 42 #define REGISTER_PREFIX "" 43 #endif 44 45 #ifndef USER_LABEL_PREFIX 46 #define USER_LABEL_PREFIX "_" 47 #endif 48 49 #ifndef LOCAL_LABEL_PREFIX 50 #define LOCAL_LABEL_PREFIX "" 51 #endif 52 53 /* The assembler's names for the registers. Note that the ?xx registers are 54 there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15 55 (each of which is overlaid on two S registers), although there are no 56 actual single-precision registers which correspond to D16-D31. */ 57 #ifndef REGISTER_NAMES 58 #define REGISTER_NAMES \ 59 { \ 60 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \ 61 "r8", "r9", "r10", "fp", "ip", "sp", "lr", "pc", \ 62 "s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7", \ 63 "s8", "s9", "s10", "s11", "s12", "s13", "s14", "s15", \ 64 "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \ 65 "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \ 66 "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \ 67 "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \ 68 "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \ 69 "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \ 70 "wr0", "wr1", "wr2", "wr3", \ 71 "wr4", "wr5", "wr6", "wr7", \ 72 "wr8", "wr9", "wr10", "wr11", \ 73 "wr12", "wr13", "wr14", "wr15", \ 74 "wcgr0", "wcgr1", "wcgr2", "wcgr3", \ 75 "cc", "vfpcc", "sfp", "afp" \ 76 } 77 #endif 78 79 #ifndef ADDITIONAL_REGISTER_NAMES 80 #define ADDITIONAL_REGISTER_NAMES \ 81 { \ 82 {"a1", 0}, \ 83 {"a2", 1}, \ 84 {"a3", 2}, \ 85 {"a4", 3}, \ 86 {"v1", 4}, \ 87 {"v2", 5}, \ 88 {"v3", 6}, \ 89 {"v4", 7}, \ 90 {"v5", 8}, \ 91 {"v6", 9}, \ 92 {"rfp", 9}, /* Historical. */ \ 93 {"sb", 9}, /* Historical. */ \ 94 {"v7", 10}, \ 95 {"sl", 10}, /* Historical. */ \ 96 {"r11", 11}, /* fp */ \ 97 {"r12", 12}, /* ip */ \ 98 {"r13", 13}, /* sp */ \ 99 {"r14", 14}, /* lr */ \ 100 {"r15", 15} /* pc */ \ 101 } 102 #endif 103 104 #ifndef OVERLAPPING_REGISTER_NAMES 105 #define OVERLAPPING_REGISTER_NAMES \ 106 { \ 107 {"d0", FIRST_VFP_REGNUM + 0, 2}, \ 108 {"d1", FIRST_VFP_REGNUM + 2, 2}, \ 109 {"d2", FIRST_VFP_REGNUM + 4, 2}, \ 110 {"d3", FIRST_VFP_REGNUM + 6, 2}, \ 111 {"d4", FIRST_VFP_REGNUM + 8, 2}, \ 112 {"d5", FIRST_VFP_REGNUM + 10, 2}, \ 113 {"d6", FIRST_VFP_REGNUM + 12, 2}, \ 114 {"d7", FIRST_VFP_REGNUM + 14, 2}, \ 115 {"d8", FIRST_VFP_REGNUM + 16, 2}, \ 116 {"d9", FIRST_VFP_REGNUM + 18, 2}, \ 117 {"d10", FIRST_VFP_REGNUM + 20, 2}, \ 118 {"d11", FIRST_VFP_REGNUM + 22, 2}, \ 119 {"d12", FIRST_VFP_REGNUM + 24, 2}, \ 120 {"d13", FIRST_VFP_REGNUM + 26, 2}, \ 121 {"d14", FIRST_VFP_REGNUM + 28, 2}, \ 122 {"d15", FIRST_VFP_REGNUM + 30, 2}, \ 123 {"q0", FIRST_VFP_REGNUM + 0, 4}, \ 124 {"q1", FIRST_VFP_REGNUM + 4, 4}, \ 125 {"q2", FIRST_VFP_REGNUM + 8, 4}, \ 126 {"q3", FIRST_VFP_REGNUM + 12, 4}, \ 127 {"q4", FIRST_VFP_REGNUM + 16, 4}, \ 128 {"q5", FIRST_VFP_REGNUM + 20, 4}, \ 129 {"q6", FIRST_VFP_REGNUM + 24, 4}, \ 130 {"q7", FIRST_VFP_REGNUM + 28, 4}, \ 131 {"q8", FIRST_VFP_REGNUM + 32, 4}, \ 132 {"q9", FIRST_VFP_REGNUM + 36, 4}, \ 133 {"q10", FIRST_VFP_REGNUM + 40, 4}, \ 134 {"q11", FIRST_VFP_REGNUM + 44, 4}, \ 135 {"q12", FIRST_VFP_REGNUM + 48, 4}, \ 136 {"q13", FIRST_VFP_REGNUM + 52, 4}, \ 137 {"q14", FIRST_VFP_REGNUM + 56, 4}, \ 138 {"q15", FIRST_VFP_REGNUM + 60, 4} \ 139 } 140 #endif 141 142 #ifndef NO_DOLLAR_IN_LABEL 143 #define NO_DOLLAR_IN_LABEL 1 144 #endif 145 146 /* Generate DBX debugging information. riscix.h will undefine this because 147 the native assembler does not support stabs. */ 148 #define DBX_DEBUGGING_INFO 1 149 150 /* Acorn dbx moans about continuation chars, so don't use any. */ 151 #ifndef DBX_CONTIN_LENGTH 152 #define DBX_CONTIN_LENGTH 0 153 #endif 154 155 /* Output a function label definition. */ 156 #ifndef ASM_DECLARE_FUNCTION_NAME 157 #define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL) \ 158 do \ 159 { \ 160 ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL); \ 161 ASM_OUTPUT_LABEL (STREAM, NAME); \ 162 } \ 163 while (0) 164 #endif 165 166 /* Globalizing directive for a label. */ 167 #define GLOBAL_ASM_OP "\t.global\t" 168 169 /* Make an internal label into a string. */ 170 #ifndef ASM_GENERATE_INTERNAL_LABEL 171 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM) \ 172 sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM)) 173 #endif 174 175 /* Output an element of a dispatch table. */ 176 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \ 177 do \ 178 { \ 179 gcc_assert (!TARGET_THUMB2); \ 180 asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE); \ 181 } \ 182 while (0) 183 184 185 /* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions 186 can be used. For non-pic code where the offsets do not suitable for 187 TBB/TBH the elements are output as absolute labels. */ 188 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL) \ 189 do \ 190 { \ 191 if (TARGET_ARM) \ 192 asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE); \ 193 else if (TARGET_THUMB1) \ 194 { \ 195 if (flag_pic || optimize_size) \ 196 { \ 197 switch (GET_MODE(body)) \ 198 { \ 199 case QImode: \ 200 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \ 201 VALUE, REL); \ 202 break; \ 203 case HImode: /* TBH */ \ 204 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \ 205 VALUE, REL); \ 206 break; \ 207 case SImode: \ 208 asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n", \ 209 VALUE, REL); \ 210 break; \ 211 default: \ 212 gcc_unreachable(); \ 213 } \ 214 } \ 215 else \ 216 asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \ 217 } \ 218 else /* Thumb-2 */ \ 219 { \ 220 switch (GET_MODE(body)) \ 221 { \ 222 case QImode: /* TBB */ \ 223 asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n", \ 224 VALUE, REL); \ 225 break; \ 226 case HImode: /* TBH */ \ 227 asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n", \ 228 VALUE, REL); \ 229 break; \ 230 case SImode: \ 231 if (flag_pic) \ 232 asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \ 233 else \ 234 asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE); \ 235 break; \ 236 default: \ 237 gcc_unreachable(); \ 238 } \ 239 } \ 240 } \ 241 while (0) 242 243 244 #undef ASM_OUTPUT_ASCII 245 #define ASM_OUTPUT_ASCII(STREAM, PTR, LEN) \ 246 output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN) 247 248 /* Output a gap. In fact we fill it with nulls. */ 249 #undef ASM_OUTPUT_SKIP 250 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) \ 251 fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES)) 252 253 /* Align output to a power of two. Horrible /bin/as. */ 254 #ifndef ASM_OUTPUT_ALIGN 255 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \ 256 do \ 257 { \ 258 register int amount = 1 << (POWER); \ 259 \ 260 if (amount == 2) \ 261 fprintf (STREAM, "\t.even\n"); \ 262 else if (amount != 1) \ 263 fprintf (STREAM, "\t.align\t%d\n", amount - 4); \ 264 } \ 265 while (0) 266 #endif 267 268 /* Output a common block. */ 269 #ifndef ASM_OUTPUT_COMMON 270 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED) \ 271 do \ 272 { \ 273 fprintf (STREAM, "\t.comm\t"); \ 274 assemble_name (STREAM, NAME); \ 275 asm_fprintf (STREAM, ", %d\t%@ %d\n", \ 276 (int)(ROUNDED), (int)(SIZE)); \ 277 } \ 278 while (0) 279 #endif 280 281 /* Output a local common block. /bin/as can't do this, so hack a 282 `.space' into the bss segment. Note that this is *bad* practice, 283 which is guaranteed NOT to work since it doesn't define STATIC 284 COMMON space but merely STATIC BSS space. */ 285 #ifndef ASM_OUTPUT_ALIGNED_LOCAL 286 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN) \ 287 do \ 288 { \ 289 switch_to_section (bss_section); \ 290 ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT)); \ 291 ASM_OUTPUT_LABEL (STREAM, NAME); \ 292 fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE)); \ 293 } \ 294 while (0) 295 #endif 296 297 /* Output a zero-initialized block. */ 298 #ifndef ASM_OUTPUT_ALIGNED_BSS 299 #define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \ 300 asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN) 301 #endif 302 303 #ifndef ASM_COMMENT_START 304 #define ASM_COMMENT_START "@" 305 #endif 306 307 /* This works for GAS and some other assemblers. */ 308 #define SET_ASM_OP "\t.set\t" 309