xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/arm/aout.h (revision b7b7574d3bf8eeb51a1fa3977b59142ec6434a55)
1 /* Definitions of target machine for GNU compiler, for ARM with a.out
2    Copyright (C) 1995, 1996, 1997, 1998, 1999, 2000, 2004, 2007, 2008
3    Free Software Foundation, Inc.
4    Contributed by Richard Earnshaw (rearnsha@armltd.co.uk).
5 
6    This file is part of GCC.
7 
8    GCC is free software; you can redistribute it and/or modify it
9    under the terms of the GNU General Public License as published
10    by the Free Software Foundation; either version 3, or (at your
11    option) any later version.
12 
13    GCC is distributed in the hope that it will be useful, but WITHOUT
14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
16    License for more details.
17 
18    You should have received a copy of the GNU General Public License
19    along with GCC; see the file COPYING3.  If not see
20    <http://www.gnu.org/licenses/>.  */
21 
22 #ifndef ASM_APP_ON
23 #define ASM_APP_ON  		""
24 #endif
25 #ifndef ASM_APP_OFF
26 #define ASM_APP_OFF  		""
27 #endif
28 
29 /* Switch to the text or data segment.  */
30 #define TEXT_SECTION_ASM_OP  	"\t.text"
31 #define DATA_SECTION_ASM_OP  	"\t.data"
32 #define BSS_SECTION_ASM_OP   	"\t.bss"
33 
34 /* Note: If USER_LABEL_PREFIX or LOCAL_LABEL_PREFIX are changed,
35    make sure that this change is reflected in the function
36    coff_arm_is_local_label_name() in bfd/coff-arm.c.  */
37 #ifndef REGISTER_PREFIX
38 #define REGISTER_PREFIX 	""
39 #endif
40 
41 #ifndef USER_LABEL_PREFIX
42 #define USER_LABEL_PREFIX 	"_"
43 #endif
44 
45 #ifndef LOCAL_LABEL_PREFIX
46 #define LOCAL_LABEL_PREFIX 	""
47 #endif
48 
49 /* The assembler's names for the registers.  Note that the ?xx registers are
50    there so that VFPv3/NEON registers D16-D31 have the same spacing as D0-D15
51    (each of which is overlaid on two S registers), although there are no
52    actual single-precision registers which correspond to D16-D31.  */
53 #ifndef REGISTER_NAMES
54 #define REGISTER_NAMES				   \
55 {				                   \
56   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",  \
57   "r8", "r9", "sl", "fp", "ip", "sp", "lr", "pc",  \
58   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",  \
59   "cc", "sfp", "afp",		   		   \
60   "mv0",   "mv1",   "mv2",   "mv3",		   \
61   "mv4",   "mv5",   "mv6",   "mv7",		   \
62   "mv8",   "mv9",   "mv10",  "mv11",		   \
63   "mv12",  "mv13",  "mv14",  "mv15",		   \
64   "wcgr0", "wcgr1", "wcgr2", "wcgr3",		   \
65   "wr0",   "wr1",   "wr2",   "wr3",		   \
66   "wr4",   "wr5",   "wr6",   "wr7",		   \
67   "wr8",   "wr9",   "wr10",  "wr11",		   \
68   "wr12",  "wr13",  "wr14",  "wr15",		   \
69   "s0",  "s1",  "s2",  "s3",  "s4",  "s5",  "s6",  "s7",  \
70   "s8",  "s9",  "s10", "s11", "s12", "s13", "s14", "s15", \
71   "s16", "s17", "s18", "s19", "s20", "s21", "s22", "s23", \
72   "s24", "s25", "s26", "s27", "s28", "s29", "s30", "s31", \
73   "d16", "?16", "d17", "?17", "d18", "?18", "d19", "?19", \
74   "d20", "?20", "d21", "?21", "d22", "?22", "d23", "?23", \
75   "d24", "?24", "d25", "?25", "d26", "?26", "d27", "?27", \
76   "d28", "?28", "d29", "?29", "d30", "?30", "d31", "?31", \
77   "vfpcc"					   \
78 }
79 #endif
80 
81 #ifndef ADDITIONAL_REGISTER_NAMES
82 #define ADDITIONAL_REGISTER_NAMES		\
83 {						\
84   {"a1", 0},					\
85   {"a2", 1},					\
86   {"a3", 2},					\
87   {"a4", 3},					\
88   {"v1", 4},					\
89   {"v2", 5},					\
90   {"v3", 6},					\
91   {"v4", 7},					\
92   {"v5", 8},					\
93   {"v6", 9},					\
94   {"rfp", 9}, /* Gcc used to call it this */	\
95   {"sb", 9},					\
96   {"v7", 10},					\
97   {"r10", 10},	/* sl */			\
98   {"r11", 11},	/* fp */			\
99   {"r12", 12},	/* ip */			\
100   {"r13", 13},	/* sp */			\
101   {"r14", 14},	/* lr */			\
102   {"r15", 15},	/* pc */			\
103   {"mvf0", 27},					\
104   {"mvf1", 28},					\
105   {"mvf2", 29},					\
106   {"mvf3", 30},					\
107   {"mvf4", 31},					\
108   {"mvf5", 32},					\
109   {"mvf6", 33},					\
110   {"mvf7", 34},					\
111   {"mvf8", 35},					\
112   {"mvf9", 36},					\
113   {"mvf10", 37},				\
114   {"mvf11", 38},				\
115   {"mvf12", 39},				\
116   {"mvf13", 40},				\
117   {"mvf14", 41},				\
118   {"mvf15", 42},				\
119   {"mvd0", 27},					\
120   {"mvd1", 28},					\
121   {"mvd2", 29},					\
122   {"mvd3", 30},					\
123   {"mvd4", 31},					\
124   {"mvd5", 32},					\
125   {"mvd6", 33},					\
126   {"mvd7", 34},					\
127   {"mvd8", 35},					\
128   {"mvd9", 36},					\
129   {"mvd10", 37},				\
130   {"mvd11", 38},				\
131   {"mvd12", 39},				\
132   {"mvd13", 40},				\
133   {"mvd14", 41},				\
134   {"mvd15", 42},				\
135   {"mvfx0", 27},				\
136   {"mvfx1", 28},				\
137   {"mvfx2", 29},				\
138   {"mvfx3", 30},				\
139   {"mvfx4", 31},				\
140   {"mvfx5", 32},				\
141   {"mvfx6", 33},				\
142   {"mvfx7", 34},				\
143   {"mvfx8", 35},				\
144   {"mvfx9", 36},				\
145   {"mvfx10", 37},				\
146   {"mvfx11", 38},				\
147   {"mvfx12", 39},				\
148   {"mvfx13", 40},				\
149   {"mvfx14", 41},				\
150   {"mvfx15", 42},				\
151   {"mvdx0", 27},				\
152   {"mvdx1", 28},				\
153   {"mvdx2", 29},				\
154   {"mvdx3", 30},				\
155   {"mvdx4", 31},				\
156   {"mvdx5", 32},				\
157   {"mvdx6", 33},				\
158   {"mvdx7", 34},				\
159   {"mvdx8", 35},				\
160   {"mvdx9", 36},				\
161   {"mvdx10", 37},				\
162   {"mvdx11", 38},				\
163   {"mvdx12", 39},				\
164   {"mvdx13", 40},				\
165   {"mvdx14", 41},				\
166   {"mvdx15", 42},				\
167   {"d0", 63}, {"q0", 63},			\
168   {"d1", 65},					\
169   {"d2", 67}, {"q1", 67},			\
170   {"d3", 69},					\
171   {"d4", 71}, {"q2", 71},			\
172   {"d5", 73},					\
173   {"d6", 75}, {"q3", 75},			\
174   {"d7", 77},					\
175   {"d8", 79}, {"q4", 79},			\
176   {"d9", 81},					\
177   {"d10", 83}, {"q5", 83},			\
178   {"d11", 85},					\
179   {"d12", 87}, {"q6", 87},			\
180   {"d13", 89},					\
181   {"d14", 91}, {"q7", 91},			\
182   {"d15", 93},					\
183   {"q8", 95},					\
184   {"q9", 99},					\
185   {"q10", 103},					\
186   {"q11", 107},					\
187   {"q12", 111},					\
188   {"q13", 115},					\
189   {"q14", 119},					\
190   {"q15", 123}					\
191 }
192 #endif
193 
194 #ifndef NO_DOLLAR_IN_LABEL
195 #define NO_DOLLAR_IN_LABEL 1
196 #endif
197 
198 /* Generate DBX debugging information.  riscix.h will undefine this because
199    the native assembler does not support stabs.  */
200 #define DBX_DEBUGGING_INFO 1
201 
202 /* Acorn dbx moans about continuation chars, so don't use any.  */
203 #ifndef DBX_CONTIN_LENGTH
204 #define DBX_CONTIN_LENGTH  0
205 #endif
206 
207 /* Output a function label definition.  */
208 #ifndef ASM_DECLARE_FUNCTION_NAME
209 #define ASM_DECLARE_FUNCTION_NAME(STREAM, NAME, DECL)	\
210   do							\
211     {							\
212       ARM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL);   \
213       ASM_OUTPUT_LABEL (STREAM, NAME);			\
214     }							\
215   while (0)
216 #endif
217 
218 /* Globalizing directive for a label.  */
219 #define GLOBAL_ASM_OP "\t.global\t"
220 
221 /* Make an internal label into a string.  */
222 #ifndef ASM_GENERATE_INTERNAL_LABEL
223 #define ASM_GENERATE_INTERNAL_LABEL(STRING, PREFIX, NUM)  \
224   sprintf (STRING, "*%s%s%u", LOCAL_LABEL_PREFIX, PREFIX, (unsigned int)(NUM))
225 #endif
226 
227 /* Output an element of a dispatch table.  */
228 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)			\
229   do								\
230     {								\
231       gcc_assert (!TARGET_THUMB2);				\
232       asm_fprintf (STREAM, "\t.word\t%LL%d\n", VALUE);		\
233     }								\
234   while (0)
235 
236 
237 /* Thumb-2 always uses addr_diff_elf so that the Table Branch instructions
238    can be used.  For non-pic code where the offsets do not suitable for
239    TBB/TBH the elements are output as absolute labels.  */
240 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)		\
241   do									\
242     {									\
243       if (TARGET_ARM)							\
244 	asm_fprintf (STREAM, "\tb\t%LL%d\n", VALUE);			\
245       else if (TARGET_THUMB1)						\
246 	{								\
247 	  if (flag_pic || optimize_size)				\
248 	    {								\
249 	      switch (GET_MODE(body))					\
250 		{							\
251 		case QImode:						\
252 		  asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
253 			       VALUE, REL);				\
254 		  break;						\
255 		case HImode: /* TBH */					\
256 		  asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
257 			       VALUE, REL);				\
258 		  break;						\
259 		case SImode:						\
260 		  asm_fprintf (STREAM, "\t.word\t%LL%d-%LL%d\n",	\
261 			       VALUE, REL);				\
262 		  break;						\
263 		default:						\
264 		  gcc_unreachable();					\
265 		}							\
266 	    }								\
267 	  else								\
268 	    asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);		\
269 	}								\
270       else /* Thumb-2 */						\
271 	{								\
272 	  switch (GET_MODE(body))					\
273 	    {								\
274 	    case QImode: /* TBB */					\
275 	      asm_fprintf (STREAM, "\t.byte\t(%LL%d-%LL%d)/2\n",	\
276 			   VALUE, REL);					\
277 	      break;							\
278 	    case HImode: /* TBH */					\
279 	      asm_fprintf (STREAM, "\t.2byte\t(%LL%d-%LL%d)/2\n",	\
280 			   VALUE, REL);					\
281 	      break;							\
282 	    case SImode:						\
283 	      if (flag_pic)						\
284 		asm_fprintf (STREAM, "\t.word\t%LL%d+1-%LL%d\n", VALUE, REL); \
285 	      else							\
286 		asm_fprintf (STREAM, "\t.word\t%LL%d+1\n", VALUE);	\
287 	      break;							\
288 	    default:							\
289 	      gcc_unreachable();					\
290 	    }								\
291 	}								\
292     }									\
293   while (0)
294 
295 
296 #undef  ASM_OUTPUT_ASCII
297 #define ASM_OUTPUT_ASCII(STREAM, PTR, LEN)  \
298   output_ascii_pseudo_op (STREAM, (const unsigned char *) (PTR), LEN)
299 
300 /* Output a gap.  In fact we fill it with nulls.  */
301 #undef  ASM_OUTPUT_SKIP
302 #define ASM_OUTPUT_SKIP(STREAM, NBYTES) 	\
303   fprintf (STREAM, "\t.space\t%d\n", (int) (NBYTES))
304 
305 /* Align output to a power of two.  Horrible /bin/as.  */
306 #ifndef ASM_OUTPUT_ALIGN
307 #define ASM_OUTPUT_ALIGN(STREAM, POWER)			\
308   do							\
309     {							\
310       register int amount = 1 << (POWER);		\
311 							\
312       if (amount == 2)					\
313 	fprintf (STREAM, "\t.even\n");			\
314       else if (amount != 1)				\
315 	fprintf (STREAM, "\t.align\t%d\n", amount - 4);	\
316     }							\
317   while (0)
318 #endif
319 
320 /* Output a common block.  */
321 #ifndef ASM_OUTPUT_COMMON
322 #define ASM_OUTPUT_COMMON(STREAM, NAME, SIZE, ROUNDED)	\
323   do							\
324     {							\
325       fprintf (STREAM, "\t.comm\t");			\
326       assemble_name (STREAM, NAME);			\
327       asm_fprintf (STREAM, ", %d\t%@ %d\n", 		\
328 	           (int)(ROUNDED), (int)(SIZE));	\
329     }							\
330   while (0)
331 #endif
332 
333 /* Output a local common block.  /bin/as can't do this, so hack a
334    `.space' into the bss segment.  Note that this is *bad* practice,
335    which is guaranteed NOT to work since it doesn't define STATIC
336    COMMON space but merely STATIC BSS space.  */
337 #ifndef ASM_OUTPUT_ALIGNED_LOCAL
338 #define ASM_OUTPUT_ALIGNED_LOCAL(STREAM, NAME, SIZE, ALIGN)		\
339   do									\
340     {									\
341       switch_to_section (bss_section);					\
342       ASM_OUTPUT_ALIGN (STREAM, floor_log2 (ALIGN / BITS_PER_UNIT));	\
343       ASM_OUTPUT_LABEL (STREAM, NAME);					\
344       fprintf (STREAM, "\t.space\t%d\n", (int)(SIZE));			\
345     }									\
346   while (0)
347 #endif
348 
349 /* Output a zero-initialized block.  */
350 #ifndef ASM_OUTPUT_ALIGNED_BSS
351 #define ASM_OUTPUT_ALIGNED_BSS(STREAM, DECL, NAME, SIZE, ALIGN) \
352   asm_output_aligned_bss (STREAM, DECL, NAME, SIZE, ALIGN)
353 #endif
354 
355 /* Output a #ident directive.  */
356 #ifndef ASM_OUTPUT_IDENT
357 #define ASM_OUTPUT_IDENT(STREAM,STRING)  \
358   asm_fprintf (STREAM, "%@ - - - ident %s\n", STRING)
359 #endif
360 
361 #ifndef ASM_COMMENT_START
362 #define ASM_COMMENT_START 	"@"
363 #endif
364 
365 /* This works for GAS and some other assemblers.  */
366 #define SET_ASM_OP		"\t.set\t"
367