1; Options for the DEC Alpha port of the compiler 2; 3; Copyright (C) 2005, 2007 Free Software Foundation, Inc. 4; 5; This file is part of GCC. 6; 7; GCC is free software; you can redistribute it and/or modify it under 8; the terms of the GNU General Public License as published by the Free 9; Software Foundation; either version 3, or (at your option) any later 10; version. 11; 12; GCC is distributed in the hope that it will be useful, but WITHOUT 13; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15; License for more details. 16; 17; You should have received a copy of the GNU General Public License 18; along with GCC; see the file COPYING3. If not see 19; <http://www.gnu.org/licenses/>. 20 21msoft-float 22Target Report Mask(SOFT_FP) 23Do not use hardware fp 24 25mfp-regs 26Target Report Mask(FPREGS) 27Use fp registers 28 29mgas 30Target RejectNegative Mask(GAS) 31Assume GAS 32 33malpha-as 34Target RejectNegative InverseMask(GAS) 35Do not assume GAS 36 37mieee-conformant 38Target RejectNegative Mask(IEEE_CONFORMANT) 39Request IEEE-conformant math library routines (OSF/1) 40 41mieee 42Target Report RejectNegative Mask(IEEE) 43Emit IEEE-conformant code, without inexact exceptions 44 45mieee-with-inexact 46Target Report RejectNegative Mask(IEEE_WITH_INEXACT) 47 48mbuild-constants 49Target Report Mask(BUILD_CONSTANTS) 50Do not emit complex integer constants to read-only memory 51 52mfloat-vax 53Target Report RejectNegative Mask(FLOAT_VAX) 54Use VAX fp 55 56mfloat-ieee 57Target Report RejectNegative InverseMask(FLOAT_VAX) 58Do not use VAX fp 59 60mbwx 61Target Report Mask(BWX) 62Emit code for the byte/word ISA extension 63 64mmax 65Target Report Mask(MAX) 66Emit code for the motion video ISA extension 67 68mfix 69Target Report Mask(FIX) 70Emit code for the fp move and sqrt ISA extension 71 72mcix 73Target Report Mask(CIX) 74Emit code for the counting ISA extension 75 76mexplicit-relocs 77Target Report Mask(EXPLICIT_RELOCS) 78Emit code using explicit relocation directives 79 80msmall-data 81Target Report RejectNegative Mask(SMALL_DATA) 82Emit 16-bit relocations to the small data areas 83 84mlarge-data 85Target Report RejectNegative InverseMask(SMALL_DATA) 86Emit 32-bit relocations to the small data areas 87 88msmall-text 89Target Report RejectNegative Mask(SMALL_TEXT) 90Emit direct branches to local functions 91 92mlarge-text 93Target Report RejectNegative InverseMask(SMALL_TEXT) 94Emit indirect branches to local functions 95 96mtls-kernel 97Target Report Mask(TLS_KERNEL) 98Emit rdval instead of rduniq for thread pointer 99 100mlong-double-128 101Target Report RejectNegative Mask(LONG_DOUBLE_128) 102Use 128-bit long double 103 104mlong-double-64 105Target Report RejectNegative InverseMask(LONG_DOUBLE_128) 106Use 64-bit long double 107 108mcpu= 109Target RejectNegative Joined Var(alpha_cpu_string) 110Use features of and schedule given CPU 111 112mtune= 113Target RejectNegative Joined Var(alpha_tune_string) 114Schedule given CPU 115 116mfp-rounding-mode= 117Target RejectNegative Joined Var(alpha_fprm_string) 118Control the generated fp rounding mode 119 120mfp-trap-mode= 121Target RejectNegative Joined Var(alpha_fptm_string) 122Control the IEEE trap mode 123 124mtrap-precision= 125Target RejectNegative Joined Var(alpha_tp_string) 126Control the precision given to fp exceptions 127 128mmemory-latency= 129Target RejectNegative Joined Var(alpha_mlat_string) 130Tune expected memory latency 131 132mtls-size= 133Target RejectNegative Joined UInteger Var(alpha_tls_size) Init(32) 134Specify bit size of immediate TLS offsets 135