xref: /netbsd-src/external/gpl3/gcc.old/dist/gcc/config/aarch64/aarch64-modes.def (revision 33881f779a77dce6440bdc44610d94de75bebefe)
1/* Machine description for AArch64 architecture.
2   Copyright (C) 2009-2017 Free Software Foundation, Inc.
3   Contributed by ARM Ltd.
4
5   This file is part of GCC.
6
7   GCC is free software; you can redistribute it and/or modify it
8   under the terms of the GNU General Public License as published by
9   the Free Software Foundation; either version 3, or (at your option)
10   any later version.
11
12   GCC is distributed in the hope that it will be useful, but
13   WITHOUT ANY WARRANTY; without even the implied warranty of
14   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
15   General Public License for more details.
16
17   You should have received a copy of the GNU General Public License
18   along with GCC; see the file COPYING3.  If not see
19   <http://www.gnu.org/licenses/>.  */
20
21CC_MODE (CCFP);
22CC_MODE (CCFPE);
23CC_MODE (CC_SWP);
24CC_MODE (CC_NZ);    /* Only N and Z bits of condition flags are valid.  */
25CC_MODE (CC_Z);     /* Only Z bit of condition flags is valid.  */
26CC_MODE (CC_C);     /* Only C bit of condition flags is valid.  */
27
28/* Half-precision floating point for __fp16.  */
29FLOAT_MODE (HF, 2, 0);
30ADJUST_FLOAT_FORMAT (HF, &ieee_half_format);
31
32/* Vector modes.  */
33VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI.  */
34VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI.  */
35VECTOR_MODES (FLOAT, 8);      /*                 V2SF.  */
36VECTOR_MODES (FLOAT, 16);     /*            V4SF V2DF.  */
37VECTOR_MODE (FLOAT, DF, 1);   /*                 V1DF.  */
38
39/* Oct Int: 256-bit integer mode needed for 32-byte vector arguments.  */
40INT_MODE (OI, 32);
41
42/* Opaque integer modes for 3 or 4 Neon q-registers / 6 or 8 Neon d-registers
43   (2 d-regs = 1 q-reg = TImode).  */
44INT_MODE (CI, 48);
45INT_MODE (XI, 64);
46
47/* Vector modes for register lists.  */
48VECTOR_MODES (INT, 32);		/* V32QI V16HI V8SI V4DI.  */
49VECTOR_MODES (FLOAT, 32);	/* V8SF V4DF.  */
50
51VECTOR_MODES (INT, 48);		/* V32QI V16HI V8SI V4DI.  */
52VECTOR_MODES (FLOAT, 48);	/* V8SF V4DF.  */
53
54VECTOR_MODES (INT, 64);		/* V32QI V16HI V8SI V4DI.  */
55VECTOR_MODES (FLOAT, 64);	/* V8SF V4DF.  */
56
57/* Quad float: 128-bit floating mode for long doubles.  */
58FLOAT_MODE (TF, 16, ieee_quad_format);
59