1 /* RTX cost tables for AArch64. 2 3 Copyright (C) 2014-2019 Free Software Foundation, Inc. 4 5 This file is part of GCC. 6 7 GCC is free software; you can redistribute it and/or modify it 8 under the terms of the GNU General Public License as published 9 by the Free Software Foundation; either version 3, or (at your 10 option) any later version. 11 12 GCC is distributed in the hope that it will be useful, but WITHOUT 13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 15 License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GCC; see the file COPYING3. If not see 19 <http://www.gnu.org/licenses/>. */ 20 21 #ifndef GCC_AARCH64_COST_TABLES_H 22 #define GCC_AARCH64_COST_TABLES_H 23 24 #include "config/arm/aarch-cost-tables.h" 25 26 /* QDF24xx does not implement AArch32. */ 27 const struct cpu_cost_table qdf24xx_extra_costs = 28 { 29 /* ALU */ 30 { 31 0, /* arith. */ 32 0, /* logical. */ 33 0, /* shift. */ 34 0, /* shift_reg. */ 35 COSTS_N_INSNS (1), /* arith_shift. */ 36 COSTS_N_INSNS (1), /* arith_shift_reg. */ 37 0, /* log_shift. */ 38 0, /* log_shift_reg. */ 39 0, /* extend. */ 40 0, /* extend_arith. */ 41 0, /* bfi. */ 42 0, /* bfx. */ 43 0, /* clz. */ 44 0, /* rev. */ 45 0, /* non_exec. */ 46 true /* non_exec_costs_exec. */ 47 }, 48 { 49 /* MULT SImode */ 50 { 51 COSTS_N_INSNS (2), /* simple. */ 52 COSTS_N_INSNS (2), /* flag_setting. */ 53 COSTS_N_INSNS (2), /* extend. */ 54 COSTS_N_INSNS (2), /* add. */ 55 COSTS_N_INSNS (2), /* extend_add. */ 56 COSTS_N_INSNS (4) /* idiv. */ 57 }, 58 /* MULT DImode */ 59 { 60 COSTS_N_INSNS (3), /* simple. */ 61 0, /* flag_setting (N/A). */ 62 COSTS_N_INSNS (3), /* extend. */ 63 COSTS_N_INSNS (3), /* add. */ 64 COSTS_N_INSNS (3), /* extend_add. */ 65 COSTS_N_INSNS (9) /* idiv. */ 66 } 67 }, 68 /* LD/ST */ 69 { 70 COSTS_N_INSNS (2), /* load. */ 71 COSTS_N_INSNS (2), /* load_sign_extend. */ 72 COSTS_N_INSNS (2), /* ldrd. */ 73 COSTS_N_INSNS (2), /* ldm_1st. */ 74 1, /* ldm_regs_per_insn_1st. */ 75 2, /* ldm_regs_per_insn_subsequent. */ 76 COSTS_N_INSNS (2), /* loadf. */ 77 COSTS_N_INSNS (2), /* loadd. */ 78 COSTS_N_INSNS (3), /* load_unaligned. */ 79 0, /* store. */ 80 0, /* strd. */ 81 0, /* stm_1st. */ 82 1, /* stm_regs_per_insn_1st. */ 83 2, /* stm_regs_per_insn_subsequent. */ 84 0, /* storef. */ 85 0, /* stored. */ 86 COSTS_N_INSNS (1), /* store_unaligned. */ 87 COSTS_N_INSNS (1), /* loadv. */ 88 COSTS_N_INSNS (1) /* storev. */ 89 }, 90 { 91 /* FP SFmode */ 92 { 93 COSTS_N_INSNS (6), /* div. */ 94 COSTS_N_INSNS (5), /* mult. */ 95 COSTS_N_INSNS (5), /* mult_addsub. */ 96 COSTS_N_INSNS (5), /* fma. */ 97 COSTS_N_INSNS (3), /* addsub. */ 98 COSTS_N_INSNS (1), /* fpconst. */ 99 COSTS_N_INSNS (1), /* neg. */ 100 COSTS_N_INSNS (2), /* compare. */ 101 COSTS_N_INSNS (4), /* widen. */ 102 COSTS_N_INSNS (4), /* narrow. */ 103 COSTS_N_INSNS (4), /* toint. */ 104 COSTS_N_INSNS (4), /* fromint. */ 105 COSTS_N_INSNS (2) /* roundint. */ 106 }, 107 /* FP DFmode */ 108 { 109 COSTS_N_INSNS (11), /* div. */ 110 COSTS_N_INSNS (6), /* mult. */ 111 COSTS_N_INSNS (6), /* mult_addsub. */ 112 COSTS_N_INSNS (6), /* fma. */ 113 COSTS_N_INSNS (3), /* addsub. */ 114 COSTS_N_INSNS (1), /* fpconst. */ 115 COSTS_N_INSNS (1), /* neg. */ 116 COSTS_N_INSNS (2), /* compare. */ 117 COSTS_N_INSNS (4), /* widen. */ 118 COSTS_N_INSNS (4), /* narrow. */ 119 COSTS_N_INSNS (4), /* toint. */ 120 COSTS_N_INSNS (4), /* fromint. */ 121 COSTS_N_INSNS (2) /* roundint. */ 122 } 123 }, 124 /* Vector */ 125 { 126 COSTS_N_INSNS (1) /* alu. */ 127 } 128 }; 129 130 /* ThunderX does not implement AArch32. */ 131 const struct cpu_cost_table thunderx_extra_costs = 132 { 133 /* ALU */ 134 { 135 0, /* Arith. */ 136 0, /* Logical. */ 137 0, /* Shift. */ 138 0, /* Shift_reg. */ 139 COSTS_N_INSNS (1)+1, /* Arith_shift. */ 140 COSTS_N_INSNS (1)+1, /* Arith_shift_reg. */ 141 COSTS_N_INSNS (1), /* UNUSED: Log_shift. */ 142 COSTS_N_INSNS (1), /* UNUSED: Log_shift_reg. */ 143 0, /* Extend. */ 144 COSTS_N_INSNS (1), /* Extend_arith. */ 145 0, /* Bfi. */ 146 0, /* Bfx. */ 147 COSTS_N_INSNS (5), /* Clz. */ 148 0, /* rev. */ 149 0, /* UNUSED: non_exec. */ 150 false /* UNUSED: non_exec_costs_exec. */ 151 }, 152 { 153 /* MULT SImode */ 154 { 155 COSTS_N_INSNS (3), /* Simple. */ 156 0, /* Flag_setting. */ 157 0, /* Extend. */ 158 0, /* Add. */ 159 COSTS_N_INSNS (1), /* Extend_add. */ 160 COSTS_N_INSNS (21) /* Idiv. */ 161 }, 162 /* MULT DImode */ 163 { 164 COSTS_N_INSNS (3), /* Simple. */ 165 0, /* Flag_setting. */ 166 0, /* Extend. */ 167 0, /* Add. */ 168 COSTS_N_INSNS (1), /* Extend_add. */ 169 COSTS_N_INSNS (37) /* Idiv. */ 170 }, 171 }, 172 /* LD/ST */ 173 { 174 COSTS_N_INSNS (2), /* Load. */ 175 COSTS_N_INSNS (2), /* Load_sign_extend. */ 176 COSTS_N_INSNS (2), /* Ldrd. */ 177 0, /* N/A: Ldm_1st. */ 178 0, /* N/A: Ldm_regs_per_insn_1st. */ 179 0, /* N/A: Ldm_regs_per_insn_subsequent. */ 180 COSTS_N_INSNS (3), /* Loadf. */ 181 COSTS_N_INSNS (3), /* Loadd. */ 182 0, /* N/A: Load_unaligned. */ 183 0, /* Store. */ 184 0, /* Strd. */ 185 0, /* N/A: Stm_1st. */ 186 0, /* N/A: Stm_regs_per_insn_1st. */ 187 0, /* N/A: Stm_regs_per_insn_subsequent. */ 188 0, /* Storef. */ 189 0, /* Stored. */ 190 COSTS_N_INSNS (1), /* Store_unaligned. */ 191 COSTS_N_INSNS (1), /* Loadv. */ 192 COSTS_N_INSNS (1) /* Storev. */ 193 }, 194 { 195 /* FP SFmode */ 196 { 197 COSTS_N_INSNS (11), /* Div. */ 198 COSTS_N_INSNS (5), /* Mult. */ 199 COSTS_N_INSNS (5), /* Mult_addsub. */ 200 COSTS_N_INSNS (5), /* Fma. */ 201 COSTS_N_INSNS (3), /* Addsub. */ 202 0, /* Fpconst. */ 203 COSTS_N_INSNS (1), /* Neg. */ 204 0, /* Compare. */ 205 COSTS_N_INSNS (5), /* Widen. */ 206 COSTS_N_INSNS (5), /* Narrow. */ 207 COSTS_N_INSNS (5), /* Toint. */ 208 COSTS_N_INSNS (5), /* Fromint. */ 209 COSTS_N_INSNS (1) /* Roundint. */ 210 }, 211 /* FP DFmode */ 212 { 213 COSTS_N_INSNS (21), /* Div. */ 214 COSTS_N_INSNS (5), /* Mult. */ 215 COSTS_N_INSNS (5), /* Mult_addsub. */ 216 COSTS_N_INSNS (5), /* Fma. */ 217 COSTS_N_INSNS (3), /* Addsub. */ 218 0, /* Fpconst. */ 219 COSTS_N_INSNS (1), /* Neg. */ 220 0, /* Compare. */ 221 COSTS_N_INSNS (5), /* Widen. */ 222 COSTS_N_INSNS (5), /* Narrow. */ 223 COSTS_N_INSNS (5), /* Toint. */ 224 COSTS_N_INSNS (5), /* Fromint. */ 225 COSTS_N_INSNS (1) /* Roundint. */ 226 } 227 }, 228 /* Vector */ 229 { 230 COSTS_N_INSNS (1) /* Alu. */ 231 } 232 }; 233 234 const struct cpu_cost_table thunderx2t99_extra_costs = 235 { 236 /* ALU */ 237 { 238 0, /* Arith. */ 239 0, /* Logical. */ 240 0, /* Shift. */ 241 0, /* Shift_reg. */ 242 COSTS_N_INSNS (1), /* Arith_shift. */ 243 COSTS_N_INSNS (1), /* Arith_shift_reg. */ 244 COSTS_N_INSNS (1), /* Log_shift. */ 245 COSTS_N_INSNS (1), /* Log_shift_reg. */ 246 0, /* Extend. */ 247 COSTS_N_INSNS (1), /* Extend_arith. */ 248 0, /* Bfi. */ 249 0, /* Bfx. */ 250 COSTS_N_INSNS (3), /* Clz. */ 251 0, /* Rev. */ 252 0, /* Non_exec. */ 253 true /* Non_exec_costs_exec. */ 254 }, 255 { 256 /* MULT SImode */ 257 { 258 COSTS_N_INSNS (4), /* Simple. */ 259 COSTS_N_INSNS (4), /* Flag_setting. */ 260 COSTS_N_INSNS (4), /* Extend. */ 261 COSTS_N_INSNS (5), /* Add. */ 262 COSTS_N_INSNS (5), /* Extend_add. */ 263 COSTS_N_INSNS (18) /* Idiv. */ 264 }, 265 /* MULT DImode */ 266 { 267 COSTS_N_INSNS (4), /* Simple. */ 268 0, /* Flag_setting. */ 269 COSTS_N_INSNS (4), /* Extend. */ 270 COSTS_N_INSNS (5), /* Add. */ 271 COSTS_N_INSNS (5), /* Extend_add. */ 272 COSTS_N_INSNS (26) /* Idiv. */ 273 } 274 }, 275 /* LD/ST */ 276 { 277 COSTS_N_INSNS (4), /* Load. */ 278 COSTS_N_INSNS (4), /* Load_sign_extend. */ 279 COSTS_N_INSNS (5), /* Ldrd. */ 280 COSTS_N_INSNS (4), /* Ldm_1st. */ 281 1, /* Ldm_regs_per_insn_1st. */ 282 1, /* Ldm_regs_per_insn_subsequent. */ 283 COSTS_N_INSNS (4), /* Loadf. */ 284 COSTS_N_INSNS (4), /* Loadd. */ 285 COSTS_N_INSNS (4), /* Load_unaligned. */ 286 0, /* Store. */ 287 0, /* Strd. */ 288 0, /* Stm_1st. */ 289 1, /* Stm_regs_per_insn_1st. */ 290 1, /* Stm_regs_per_insn_subsequent. */ 291 0, /* Storef. */ 292 0, /* Stored. */ 293 0, /* Store_unaligned. */ 294 COSTS_N_INSNS (1), /* Loadv. */ 295 COSTS_N_INSNS (1) /* Storev. */ 296 }, 297 { 298 /* FP SFmode */ 299 { 300 COSTS_N_INSNS (4), /* Div. */ 301 COSTS_N_INSNS (1), /* Mult. */ 302 COSTS_N_INSNS (1), /* Mult_addsub. */ 303 COSTS_N_INSNS (1), /* Fma. */ 304 COSTS_N_INSNS (1), /* Addsub. */ 305 COSTS_N_INSNS (1), /* Fpconst. */ 306 COSTS_N_INSNS (1), /* Neg. */ 307 COSTS_N_INSNS (1), /* Compare. */ 308 COSTS_N_INSNS (2), /* Widen. */ 309 COSTS_N_INSNS (2), /* Narrow. */ 310 COSTS_N_INSNS (2), /* Toint. */ 311 COSTS_N_INSNS (2), /* Fromint. */ 312 COSTS_N_INSNS (2) /* Roundint. */ 313 }, 314 /* FP DFmode */ 315 { 316 COSTS_N_INSNS (6), /* Div. */ 317 COSTS_N_INSNS (1), /* Mult. */ 318 COSTS_N_INSNS (1), /* Mult_addsub. */ 319 COSTS_N_INSNS (1), /* Fma. */ 320 COSTS_N_INSNS (1), /* Addsub. */ 321 COSTS_N_INSNS (1), /* Fpconst. */ 322 COSTS_N_INSNS (1), /* Neg. */ 323 COSTS_N_INSNS (1), /* Compare. */ 324 COSTS_N_INSNS (2), /* Widen. */ 325 COSTS_N_INSNS (2), /* Narrow. */ 326 COSTS_N_INSNS (2), /* Toint. */ 327 COSTS_N_INSNS (2), /* Fromint. */ 328 COSTS_N_INSNS (2) /* Roundint. */ 329 } 330 }, 331 /* Vector */ 332 { 333 COSTS_N_INSNS (1) /* Alu. */ 334 } 335 }; 336 337 const struct cpu_cost_table tsv110_extra_costs = 338 { 339 /* ALU */ 340 { 341 0, /* arith. */ 342 0, /* logical. */ 343 0, /* shift. */ 344 0, /* shift_reg. */ 345 COSTS_N_INSNS (1), /* arith_shift. */ 346 COSTS_N_INSNS (1), /* arith_shift_reg. */ 347 COSTS_N_INSNS (1), /* log_shift. */ 348 COSTS_N_INSNS (1), /* log_shift_reg. */ 349 0, /* extend. */ 350 COSTS_N_INSNS (1), /* extend_arith. */ 351 0, /* bfi. */ 352 0, /* bfx. */ 353 0, /* clz. */ 354 0, /* rev. */ 355 0, /* non_exec. */ 356 true /* non_exec_costs_exec. */ 357 }, 358 359 { 360 /* MULT SImode */ 361 { 362 COSTS_N_INSNS (2), /* simple. */ 363 COSTS_N_INSNS (2), /* flag_setting. */ 364 COSTS_N_INSNS (2), /* extend. */ 365 COSTS_N_INSNS (2), /* add. */ 366 COSTS_N_INSNS (2), /* extend_add. */ 367 COSTS_N_INSNS (11) /* idiv. */ 368 }, 369 /* MULT DImode */ 370 { 371 COSTS_N_INSNS (3), /* simple. */ 372 0, /* flag_setting (N/A). */ 373 COSTS_N_INSNS (3), /* extend. */ 374 COSTS_N_INSNS (3), /* add. */ 375 COSTS_N_INSNS (3), /* extend_add. */ 376 COSTS_N_INSNS (19) /* idiv. */ 377 } 378 }, 379 /* LD/ST */ 380 { 381 COSTS_N_INSNS (3), /* load. */ 382 COSTS_N_INSNS (4), /* load_sign_extend. */ 383 COSTS_N_INSNS (3), /* ldrd. */ 384 COSTS_N_INSNS (3), /* ldm_1st. */ 385 1, /* ldm_regs_per_insn_1st. */ 386 2, /* ldm_regs_per_insn_subsequent. */ 387 COSTS_N_INSNS (4), /* loadf. */ 388 COSTS_N_INSNS (4), /* loadd. */ 389 COSTS_N_INSNS (4), /* load_unaligned. */ 390 0, /* store. */ 391 0, /* strd. */ 392 0, /* stm_1st. */ 393 1, /* stm_regs_per_insn_1st. */ 394 2, /* stm_regs_per_insn_subsequent. */ 395 0, /* storef. */ 396 0, /* stored. */ 397 COSTS_N_INSNS (1), /* store_unaligned. */ 398 COSTS_N_INSNS (4), /* loadv. */ 399 COSTS_N_INSNS (4) /* storev. */ 400 }, 401 { 402 /* FP SFmode */ 403 { 404 COSTS_N_INSNS (10), /* div. */ 405 COSTS_N_INSNS (4), /* mult. */ 406 COSTS_N_INSNS (4), /* mult_addsub. */ 407 COSTS_N_INSNS (4), /* fma. */ 408 COSTS_N_INSNS (4), /* addsub. */ 409 COSTS_N_INSNS (1), /* fpconst. */ 410 COSTS_N_INSNS (1), /* neg. */ 411 COSTS_N_INSNS (1), /* compare. */ 412 COSTS_N_INSNS (2), /* widen. */ 413 COSTS_N_INSNS (2), /* narrow. */ 414 COSTS_N_INSNS (2), /* toint. */ 415 COSTS_N_INSNS (1), /* fromint. */ 416 COSTS_N_INSNS (2) /* roundint. */ 417 }, 418 /* FP DFmode */ 419 { 420 COSTS_N_INSNS (17), /* div. */ 421 COSTS_N_INSNS (4), /* mult. */ 422 COSTS_N_INSNS (6), /* mult_addsub. */ 423 COSTS_N_INSNS (6), /* fma. */ 424 COSTS_N_INSNS (3), /* addsub. */ 425 COSTS_N_INSNS (1), /* fpconst. */ 426 COSTS_N_INSNS (1), /* neg. */ 427 COSTS_N_INSNS (1), /* compare. */ 428 COSTS_N_INSNS (2), /* widen. */ 429 COSTS_N_INSNS (2), /* narrow. */ 430 COSTS_N_INSNS (2), /* toint. */ 431 COSTS_N_INSNS (1), /* fromint. */ 432 COSTS_N_INSNS (2) /* roundint. */ 433 } 434 }, 435 /* Vector */ 436 { 437 COSTS_N_INSNS (1) /* alu. */ 438 } 439 }; 440 441 #endif 442