1 /* Save and restore call-clobbered registers which are live across a call. 2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000, 3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 4 Free Software Foundation, Inc. 5 6 This file is part of GCC. 7 8 GCC is free software; you can redistribute it and/or modify it under 9 the terms of the GNU General Public License as published by the Free 10 Software Foundation; either version 3, or (at your option) any later 11 version. 12 13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY 14 WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 16 for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GCC; see the file COPYING3. If not see 20 <http://www.gnu.org/licenses/>. */ 21 22 #include "config.h" 23 #include "system.h" 24 #include "coretypes.h" 25 #include "tm.h" 26 #include "rtl.h" 27 #include "regs.h" 28 #include "insn-config.h" 29 #include "flags.h" 30 #include "hard-reg-set.h" 31 #include "recog.h" 32 #include "basic-block.h" 33 #include "reload.h" 34 #include "function.h" 35 #include "expr.h" 36 #include "toplev.h" 37 #include "tm_p.h" 38 #include "addresses.h" 39 #include "output.h" 40 #include "df.h" 41 #include "ggc.h" 42 43 /* True if caller-save has been initialized. */ 44 bool caller_save_initialized_p; 45 46 /* Call used hard registers which can not be saved because there is no 47 insn for this. */ 48 HARD_REG_SET no_caller_save_reg_set; 49 50 #ifndef MAX_MOVE_MAX 51 #define MAX_MOVE_MAX MOVE_MAX 52 #endif 53 54 #ifndef MIN_UNITS_PER_WORD 55 #define MIN_UNITS_PER_WORD UNITS_PER_WORD 56 #endif 57 58 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD) 59 60 /* Modes for each hard register that we can save. The smallest mode is wide 61 enough to save the entire contents of the register. When saving the 62 register because it is live we first try to save in multi-register modes. 63 If that is not possible the save is done one register at a time. */ 64 65 static enum machine_mode 66 regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 67 68 /* For each hard register, a place on the stack where it can be saved, 69 if needed. */ 70 71 static rtx 72 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1]; 73 74 /* The number of elements in the subsequent array. */ 75 static int save_slots_num; 76 77 /* Allocated slots so far. */ 78 static rtx save_slots[FIRST_PSEUDO_REGISTER]; 79 80 /* We will only make a register eligible for caller-save if it can be 81 saved in its widest mode with a simple SET insn as long as the memory 82 address is valid. We record the INSN_CODE is those insns here since 83 when we emit them, the addresses might not be valid, so they might not 84 be recognized. */ 85 86 static int 87 cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 88 static int 89 cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]; 90 91 /* Set of hard regs currently residing in save area (during insn scan). */ 92 93 static HARD_REG_SET hard_regs_saved; 94 95 /* Number of registers currently in hard_regs_saved. */ 96 97 static int n_regs_saved; 98 99 /* Computed by mark_referenced_regs, all regs referenced in a given 100 insn. */ 101 static HARD_REG_SET referenced_regs; 102 103 104 typedef void refmarker_fn (rtx *loc, enum machine_mode mode, int hardregno, 105 void *mark_arg); 106 107 static int reg_save_code (int, enum machine_mode); 108 static int reg_restore_code (int, enum machine_mode); 109 110 struct saved_hard_reg; 111 static void initiate_saved_hard_regs (void); 112 static struct saved_hard_reg *new_saved_hard_reg (int, int); 113 static void finish_saved_hard_regs (void); 114 static int saved_hard_reg_compare_func (const void *, const void *); 115 116 static void mark_set_regs (rtx, const_rtx, void *); 117 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg); 118 static refmarker_fn mark_reg_as_referenced; 119 static refmarker_fn replace_reg_with_saved_mem; 120 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *, 121 enum machine_mode *); 122 static int insert_restore (struct insn_chain *, int, int, int, 123 enum machine_mode *); 124 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int, 125 rtx); 126 static void add_stored_regs (rtx, const_rtx, void *); 127 128 129 130 static GTY(()) rtx savepat; 131 static GTY(()) rtx restpat; 132 static GTY(()) rtx test_reg; 133 static GTY(()) rtx test_mem; 134 static GTY(()) rtx saveinsn; 135 static GTY(()) rtx restinsn; 136 137 /* Return the INSN_CODE used to save register REG in mode MODE. */ 138 static int 139 reg_save_code (int reg, enum machine_mode mode) 140 { 141 bool ok; 142 if (cached_reg_save_code[reg][mode]) 143 return cached_reg_save_code[reg][mode]; 144 if (!HARD_REGNO_MODE_OK (reg, mode)) 145 { 146 cached_reg_save_code[reg][mode] = -1; 147 cached_reg_restore_code[reg][mode] = -1; 148 return -1; 149 } 150 151 /* Update the register number and modes of the register 152 and memory operand. */ 153 SET_REGNO (test_reg, reg); 154 PUT_MODE (test_reg, mode); 155 PUT_MODE (test_mem, mode); 156 157 /* Force re-recognition of the modified insns. */ 158 INSN_CODE (saveinsn) = -1; 159 INSN_CODE (restinsn) = -1; 160 161 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn); 162 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn); 163 164 /* Now extract both insns and see if we can meet their 165 constraints. */ 166 ok = (cached_reg_save_code[reg][mode] != -1 167 && cached_reg_restore_code[reg][mode] != -1); 168 if (ok) 169 { 170 extract_insn (saveinsn); 171 ok = constrain_operands (1); 172 extract_insn (restinsn); 173 ok &= constrain_operands (1); 174 } 175 176 if (! ok) 177 { 178 cached_reg_save_code[reg][mode] = -1; 179 cached_reg_restore_code[reg][mode] = -1; 180 } 181 gcc_assert (cached_reg_save_code[reg][mode]); 182 return cached_reg_save_code[reg][mode]; 183 } 184 185 /* Return the INSN_CODE used to restore register REG in mode MODE. */ 186 static int 187 reg_restore_code (int reg, enum machine_mode mode) 188 { 189 if (cached_reg_restore_code[reg][mode]) 190 return cached_reg_restore_code[reg][mode]; 191 /* Populate our cache. */ 192 reg_save_code (reg, mode); 193 return cached_reg_restore_code[reg][mode]; 194 } 195 196 /* Initialize for caller-save. 197 198 Look at all the hard registers that are used by a call and for which 199 reginfo.c has not already excluded from being used across a call. 200 201 Ensure that we can find a mode to save the register and that there is a 202 simple insn to save and restore the register. This latter check avoids 203 problems that would occur if we tried to save the MQ register of some 204 machines directly into memory. */ 205 206 void 207 init_caller_save (void) 208 { 209 rtx addr_reg; 210 int offset; 211 rtx address; 212 int i, j; 213 214 if (caller_save_initialized_p) 215 return; 216 217 caller_save_initialized_p = true; 218 219 CLEAR_HARD_REG_SET (no_caller_save_reg_set); 220 /* First find all the registers that we need to deal with and all 221 the modes that they can have. If we can't find a mode to use, 222 we can't have the register live over calls. */ 223 224 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 225 { 226 if (call_used_regs[i] 227 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i)) 228 { 229 for (j = 1; j <= MOVE_MAX_WORDS; j++) 230 { 231 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j, 232 VOIDmode); 233 if (regno_save_mode[i][j] == VOIDmode && j == 1) 234 { 235 SET_HARD_REG_BIT (call_fixed_reg_set, i); 236 } 237 } 238 } 239 else 240 regno_save_mode[i][1] = VOIDmode; 241 } 242 243 /* The following code tries to approximate the conditions under which 244 we can easily save and restore a register without scratch registers or 245 other complexities. It will usually work, except under conditions where 246 the validity of an insn operand is dependent on the address offset. 247 No such cases are currently known. 248 249 We first find a typical offset from some BASE_REG_CLASS register. 250 This address is chosen by finding the first register in the class 251 and by finding the smallest power of two that is a valid offset from 252 that register in every mode we will use to save registers. */ 253 254 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 255 if (TEST_HARD_REG_BIT 256 (reg_class_contents 257 [(int) base_reg_class (regno_save_mode[i][1], PLUS, CONST_INT)], i)) 258 break; 259 260 gcc_assert (i < FIRST_PSEUDO_REGISTER); 261 262 addr_reg = gen_rtx_REG (Pmode, i); 263 264 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1) 265 { 266 address = gen_rtx_PLUS (Pmode, addr_reg, GEN_INT (offset)); 267 268 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 269 if (regno_save_mode[i][1] != VOIDmode 270 && ! strict_memory_address_p (regno_save_mode[i][1], address)) 271 break; 272 273 if (i == FIRST_PSEUDO_REGISTER) 274 break; 275 } 276 277 /* If we didn't find a valid address, we must use register indirect. */ 278 if (offset == 0) 279 address = addr_reg; 280 281 /* Next we try to form an insn to save and restore the register. We 282 see if such an insn is recognized and meets its constraints. 283 284 To avoid lots of unnecessary RTL allocation, we construct all the RTL 285 once, then modify the memory and register operands in-place. */ 286 287 test_reg = gen_rtx_REG (VOIDmode, 0); 288 test_mem = gen_rtx_MEM (VOIDmode, address); 289 savepat = gen_rtx_SET (VOIDmode, test_mem, test_reg); 290 restpat = gen_rtx_SET (VOIDmode, test_reg, test_mem); 291 292 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, savepat, -1, 0); 293 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, 0, 0, restpat, -1, 0); 294 295 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 296 for (j = 1; j <= MOVE_MAX_WORDS; j++) 297 if (reg_save_code (i,regno_save_mode[i][j]) == -1) 298 { 299 regno_save_mode[i][j] = VOIDmode; 300 if (j == 1) 301 { 302 SET_HARD_REG_BIT (call_fixed_reg_set, i); 303 if (call_used_regs[i]) 304 SET_HARD_REG_BIT (no_caller_save_reg_set, i); 305 } 306 } 307 } 308 309 310 311 /* Initialize save areas by showing that we haven't allocated any yet. */ 312 313 void 314 init_save_areas (void) 315 { 316 int i, j; 317 318 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 319 for (j = 1; j <= MOVE_MAX_WORDS; j++) 320 regno_save_mem[i][j] = 0; 321 save_slots_num = 0; 322 323 } 324 325 /* The structure represents a hard register which should be saved 326 through the call. It is used when the integrated register 327 allocator (IRA) is used and sharing save slots is on. */ 328 struct saved_hard_reg 329 { 330 /* Order number starting with 0. */ 331 int num; 332 /* The hard regno. */ 333 int hard_regno; 334 /* Execution frequency of all calls through which given hard 335 register should be saved. */ 336 int call_freq; 337 /* Stack slot reserved to save the hard register through calls. */ 338 rtx slot; 339 /* True if it is first hard register in the chain of hard registers 340 sharing the same stack slot. */ 341 int first_p; 342 /* Order number of the next hard register structure with the same 343 slot in the chain. -1 represents end of the chain. */ 344 int next; 345 }; 346 347 /* Map: hard register number to the corresponding structure. */ 348 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER]; 349 350 /* The number of all structures representing hard registers should be 351 saved, in order words, the number of used elements in the following 352 array. */ 353 static int saved_regs_num; 354 355 /* Pointers to all the structures. Index is the order number of the 356 corresponding structure. */ 357 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER]; 358 359 /* First called function for work with saved hard registers. */ 360 static void 361 initiate_saved_hard_regs (void) 362 { 363 int i; 364 365 saved_regs_num = 0; 366 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 367 hard_reg_map[i] = NULL; 368 } 369 370 /* Allocate and return new saved hard register with given REGNO and 371 CALL_FREQ. */ 372 static struct saved_hard_reg * 373 new_saved_hard_reg (int regno, int call_freq) 374 { 375 struct saved_hard_reg *saved_reg; 376 377 saved_reg 378 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg)); 379 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg; 380 saved_reg->num = saved_regs_num++; 381 saved_reg->hard_regno = regno; 382 saved_reg->call_freq = call_freq; 383 saved_reg->first_p = FALSE; 384 saved_reg->next = -1; 385 return saved_reg; 386 } 387 388 /* Free memory allocated for the saved hard registers. */ 389 static void 390 finish_saved_hard_regs (void) 391 { 392 int i; 393 394 for (i = 0; i < saved_regs_num; i++) 395 free (all_saved_regs[i]); 396 } 397 398 /* The function is used to sort the saved hard register structures 399 according their frequency. */ 400 static int 401 saved_hard_reg_compare_func (const void *v1p, const void *v2p) 402 { 403 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p; 404 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p; 405 406 if (flag_omit_frame_pointer) 407 { 408 if (p1->call_freq - p2->call_freq != 0) 409 return p1->call_freq - p2->call_freq; 410 } 411 else if (p2->call_freq - p1->call_freq != 0) 412 return p2->call_freq - p1->call_freq; 413 414 return p1->num - p2->num; 415 } 416 417 /* Allocate save areas for any hard registers that might need saving. 418 We take a conservative approach here and look for call-clobbered hard 419 registers that are assigned to pseudos that cross calls. This may 420 overestimate slightly (especially if some of these registers are later 421 used as spill registers), but it should not be significant. 422 423 For IRA we use priority coloring to decrease stack slots needed for 424 saving hard registers through calls. We build conflicts for them 425 to do coloring. 426 427 Future work: 428 429 In the fallback case we should iterate backwards across all possible 430 modes for the save, choosing the largest available one instead of 431 falling back to the smallest mode immediately. (eg TF -> DF -> SF). 432 433 We do not try to use "move multiple" instructions that exist 434 on some machines (such as the 68k moveml). It could be a win to try 435 and use them when possible. The hard part is doing it in a way that is 436 machine independent since they might be saving non-consecutive 437 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ 438 439 void 440 setup_save_areas (void) 441 { 442 int i, j, k, freq; 443 HARD_REG_SET hard_regs_used; 444 struct saved_hard_reg *saved_reg; 445 rtx insn; 446 struct insn_chain *chain, *next; 447 unsigned int regno; 448 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets; 449 reg_set_iterator rsi; 450 451 CLEAR_HARD_REG_SET (hard_regs_used); 452 453 /* Find every CALL_INSN and record which hard regs are live across the 454 call into HARD_REG_MAP and HARD_REGS_USED. */ 455 initiate_saved_hard_regs (); 456 /* Create hard reg saved regs. */ 457 for (chain = reload_insn_chain; chain != 0; chain = next) 458 { 459 insn = chain->insn; 460 next = chain->next; 461 if (!CALL_P (insn) 462 || find_reg_note (insn, REG_NORETURN, NULL)) 463 continue; 464 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn)); 465 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, 466 &chain->live_throughout); 467 COPY_HARD_REG_SET (used_regs, call_used_reg_set); 468 469 /* Record all registers set in this call insn. These don't 470 need to be saved. N.B. the call insn might set a subreg 471 of a multi-hard-reg pseudo; then the pseudo is considered 472 live during the call, but the subreg that is set 473 isn't. */ 474 CLEAR_HARD_REG_SET (this_insn_sets); 475 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); 476 /* Sibcalls are considered to set the return value. */ 477 if (SIBLING_CALL_P (insn) && crtl->return_rtx) 478 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); 479 480 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); 481 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); 482 AND_HARD_REG_SET (hard_regs_to_save, used_regs); 483 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 484 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) 485 { 486 if (hard_reg_map[regno] != NULL) 487 hard_reg_map[regno]->call_freq += freq; 488 else 489 saved_reg = new_saved_hard_reg (regno, freq); 490 SET_HARD_REG_BIT (hard_regs_used, regno); 491 } 492 /* Look through all live pseudos, mark their hard registers. */ 493 EXECUTE_IF_SET_IN_REG_SET 494 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) 495 { 496 int r = reg_renumber[regno]; 497 int bound; 498 499 if (r < 0) 500 continue; 501 502 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; 503 for (; r < bound; r++) 504 if (TEST_HARD_REG_BIT (used_regs, r)) 505 { 506 if (hard_reg_map[r] != NULL) 507 hard_reg_map[r]->call_freq += freq; 508 else 509 saved_reg = new_saved_hard_reg (r, freq); 510 SET_HARD_REG_BIT (hard_regs_to_save, r); 511 SET_HARD_REG_BIT (hard_regs_used, r); 512 } 513 } 514 } 515 516 /* If requested, figure out which hard regs can share save slots. */ 517 if (optimize && flag_ira_share_save_slots) 518 { 519 rtx slot; 520 char *saved_reg_conflicts; 521 int next_k; 522 struct saved_hard_reg *saved_reg2, *saved_reg3; 523 int call_saved_regs_num; 524 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER]; 525 int best_slot_num; 526 int prev_save_slots_num; 527 rtx prev_save_slots[FIRST_PSEUDO_REGISTER]; 528 529 /* Find saved hard register conflicts. */ 530 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num); 531 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num); 532 for (chain = reload_insn_chain; chain != 0; chain = next) 533 { 534 call_saved_regs_num = 0; 535 insn = chain->insn; 536 next = chain->next; 537 if (!CALL_P (insn) 538 || find_reg_note (insn, REG_NORETURN, NULL)) 539 continue; 540 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, 541 &chain->live_throughout); 542 COPY_HARD_REG_SET (used_regs, call_used_reg_set); 543 544 /* Record all registers set in this call insn. These don't 545 need to be saved. N.B. the call insn might set a subreg 546 of a multi-hard-reg pseudo; then the pseudo is considered 547 live during the call, but the subreg that is set 548 isn't. */ 549 CLEAR_HARD_REG_SET (this_insn_sets); 550 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); 551 /* Sibcalls are considered to set the return value, 552 compare df-scan.c:df_get_call_refs. */ 553 if (SIBLING_CALL_P (insn) && crtl->return_rtx) 554 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets); 555 556 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set); 557 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets); 558 AND_HARD_REG_SET (hard_regs_to_save, used_regs); 559 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 560 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) 561 { 562 gcc_assert (hard_reg_map[regno] != NULL); 563 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno]; 564 } 565 /* Look through all live pseudos, mark their hard registers. */ 566 EXECUTE_IF_SET_IN_REG_SET 567 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) 568 { 569 int r = reg_renumber[regno]; 570 int bound; 571 572 if (r < 0) 573 continue; 574 575 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; 576 for (; r < bound; r++) 577 if (TEST_HARD_REG_BIT (used_regs, r)) 578 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r]; 579 } 580 for (i = 0; i < call_saved_regs_num; i++) 581 { 582 saved_reg = call_saved_regs[i]; 583 for (j = 0; j < call_saved_regs_num; j++) 584 if (i != j) 585 { 586 saved_reg2 = call_saved_regs[j]; 587 saved_reg_conflicts[saved_reg->num * saved_regs_num 588 + saved_reg2->num] 589 = saved_reg_conflicts[saved_reg2->num * saved_regs_num 590 + saved_reg->num] 591 = TRUE; 592 } 593 } 594 } 595 /* Sort saved hard regs. */ 596 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *), 597 saved_hard_reg_compare_func); 598 /* Initiate slots available from the previous reload 599 iteration. */ 600 prev_save_slots_num = save_slots_num; 601 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx)); 602 save_slots_num = 0; 603 /* Allocate stack slots for the saved hard registers. */ 604 for (i = 0; i < saved_regs_num; i++) 605 { 606 saved_reg = all_saved_regs[i]; 607 regno = saved_reg->hard_regno; 608 for (j = 0; j < i; j++) 609 { 610 saved_reg2 = all_saved_regs[j]; 611 if (! saved_reg2->first_p) 612 continue; 613 slot = saved_reg2->slot; 614 for (k = j; k >= 0; k = next_k) 615 { 616 saved_reg3 = all_saved_regs[k]; 617 next_k = saved_reg3->next; 618 if (saved_reg_conflicts[saved_reg->num * saved_regs_num 619 + saved_reg3->num]) 620 break; 621 } 622 if (k < 0 623 && (GET_MODE_SIZE (regno_save_mode[regno][1]) 624 <= GET_MODE_SIZE (regno_save_mode 625 [saved_reg2->hard_regno][1]))) 626 { 627 saved_reg->slot 628 = adjust_address_nv 629 (slot, regno_save_mode[saved_reg->hard_regno][1], 0); 630 regno_save_mem[regno][1] = saved_reg->slot; 631 saved_reg->next = saved_reg2->next; 632 saved_reg2->next = i; 633 if (dump_file != NULL) 634 fprintf (dump_file, "%d uses slot of %d\n", 635 regno, saved_reg2->hard_regno); 636 break; 637 } 638 } 639 if (j == i) 640 { 641 saved_reg->first_p = TRUE; 642 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++) 643 { 644 slot = prev_save_slots[j]; 645 if (slot == NULL_RTX) 646 continue; 647 if (GET_MODE_SIZE (regno_save_mode[regno][1]) 648 <= GET_MODE_SIZE (GET_MODE (slot)) 649 && best_slot_num < 0) 650 best_slot_num = j; 651 if (GET_MODE (slot) == regno_save_mode[regno][1]) 652 break; 653 } 654 if (best_slot_num >= 0) 655 { 656 saved_reg->slot = prev_save_slots[best_slot_num]; 657 saved_reg->slot 658 = adjust_address_nv 659 (saved_reg->slot, 660 regno_save_mode[saved_reg->hard_regno][1], 0); 661 if (dump_file != NULL) 662 fprintf (dump_file, 663 "%d uses a slot from prev iteration\n", regno); 664 prev_save_slots[best_slot_num] = NULL_RTX; 665 if (best_slot_num + 1 == prev_save_slots_num) 666 prev_save_slots_num--; 667 } 668 else 669 { 670 saved_reg->slot 671 = assign_stack_local_1 672 (regno_save_mode[regno][1], 673 GET_MODE_SIZE (regno_save_mode[regno][1]), 0, true); 674 if (dump_file != NULL) 675 fprintf (dump_file, "%d uses a new slot\n", regno); 676 } 677 regno_save_mem[regno][1] = saved_reg->slot; 678 save_slots[save_slots_num++] = saved_reg->slot; 679 } 680 } 681 free (saved_reg_conflicts); 682 finish_saved_hard_regs (); 683 } 684 else 685 { 686 /* We are not sharing slots. 687 688 Run through all the call-used hard-registers and allocate 689 space for each in the caller-save area. Try to allocate space 690 in a manner which allows multi-register saves/restores to be done. */ 691 692 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 693 for (j = MOVE_MAX_WORDS; j > 0; j--) 694 { 695 int do_save = 1; 696 697 /* If no mode exists for this size, try another. Also break out 698 if we have already saved this hard register. */ 699 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0) 700 continue; 701 702 /* See if any register in this group has been saved. */ 703 for (k = 0; k < j; k++) 704 if (regno_save_mem[i + k][1]) 705 { 706 do_save = 0; 707 break; 708 } 709 if (! do_save) 710 continue; 711 712 for (k = 0; k < j; k++) 713 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k)) 714 { 715 do_save = 0; 716 break; 717 } 718 if (! do_save) 719 continue; 720 721 /* We have found an acceptable mode to store in. Since 722 hard register is always saved in the widest mode 723 available, the mode may be wider than necessary, it is 724 OK to reduce the alignment of spill space. We will 725 verify that it is equal to or greater than required 726 when we restore and save the hard register in 727 insert_restore and insert_save. */ 728 regno_save_mem[i][j] 729 = assign_stack_local_1 (regno_save_mode[i][j], 730 GET_MODE_SIZE (regno_save_mode[i][j]), 731 0, true); 732 733 /* Setup single word save area just in case... */ 734 for (k = 0; k < j; k++) 735 /* This should not depend on WORDS_BIG_ENDIAN. 736 The order of words in regs is the same as in memory. */ 737 regno_save_mem[i + k][1] 738 = adjust_address_nv (regno_save_mem[i][j], 739 regno_save_mode[i + k][1], 740 k * UNITS_PER_WORD); 741 } 742 } 743 744 /* Now loop again and set the alias set of any save areas we made to 745 the alias set used to represent frame objects. */ 746 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) 747 for (j = MOVE_MAX_WORDS; j > 0; j--) 748 if (regno_save_mem[i][j] != 0) 749 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ()); 750 } 751 752 753 754 /* Find the places where hard regs are live across calls and save them. */ 755 756 void 757 save_call_clobbered_regs (void) 758 { 759 struct insn_chain *chain, *next, *last = NULL; 760 enum machine_mode save_mode [FIRST_PSEUDO_REGISTER]; 761 762 /* Computed in mark_set_regs, holds all registers set by the current 763 instruction. */ 764 HARD_REG_SET this_insn_sets; 765 766 CLEAR_HARD_REG_SET (hard_regs_saved); 767 n_regs_saved = 0; 768 769 for (chain = reload_insn_chain; chain != 0; chain = next) 770 { 771 rtx insn = chain->insn; 772 enum rtx_code code = GET_CODE (insn); 773 774 next = chain->next; 775 776 gcc_assert (!chain->is_caller_save_insn); 777 778 if (NONDEBUG_INSN_P (insn)) 779 { 780 /* If some registers have been saved, see if INSN references 781 any of them. We must restore them before the insn if so. */ 782 783 if (n_regs_saved) 784 { 785 int regno; 786 787 if (code == JUMP_INSN) 788 /* Restore all registers if this is a JUMP_INSN. */ 789 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved); 790 else 791 { 792 CLEAR_HARD_REG_SET (referenced_regs); 793 mark_referenced_regs (&PATTERN (insn), 794 mark_reg_as_referenced, NULL); 795 AND_HARD_REG_SET (referenced_regs, hard_regs_saved); 796 } 797 798 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 799 if (TEST_HARD_REG_BIT (referenced_regs, regno)) 800 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS, save_mode); 801 } 802 803 if (code == CALL_INSN 804 && ! SIBLING_CALL_P (insn) 805 && ! find_reg_note (insn, REG_NORETURN, NULL)) 806 { 807 unsigned regno; 808 HARD_REG_SET hard_regs_to_save; 809 reg_set_iterator rsi; 810 811 /* Use the register life information in CHAIN to compute which 812 regs are live during the call. */ 813 REG_SET_TO_HARD_REG_SET (hard_regs_to_save, 814 &chain->live_throughout); 815 /* Save hard registers always in the widest mode available. */ 816 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 817 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) 818 save_mode [regno] = regno_save_mode [regno][1]; 819 else 820 save_mode [regno] = VOIDmode; 821 822 /* Look through all live pseudos, mark their hard registers 823 and choose proper mode for saving. */ 824 EXECUTE_IF_SET_IN_REG_SET 825 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi) 826 { 827 int r = reg_renumber[regno]; 828 int nregs; 829 enum machine_mode mode; 830 831 if (r < 0) 832 continue; 833 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)]; 834 mode = HARD_REGNO_CALLER_SAVE_MODE 835 (r, nregs, PSEUDO_REGNO_MODE (regno)); 836 if (GET_MODE_BITSIZE (mode) 837 > GET_MODE_BITSIZE (save_mode[r])) 838 save_mode[r] = mode; 839 while (nregs-- > 0) 840 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs); 841 } 842 843 /* Record all registers set in this call insn. These don't need 844 to be saved. N.B. the call insn might set a subreg of a 845 multi-hard-reg pseudo; then the pseudo is considered live 846 during the call, but the subreg that is set isn't. */ 847 CLEAR_HARD_REG_SET (this_insn_sets); 848 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets); 849 850 /* Compute which hard regs must be saved before this call. */ 851 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set); 852 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets); 853 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved); 854 AND_HARD_REG_SET (hard_regs_to_save, call_used_reg_set); 855 856 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 857 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno)) 858 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode); 859 860 /* Must recompute n_regs_saved. */ 861 n_regs_saved = 0; 862 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 863 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) 864 n_regs_saved++; 865 } 866 last = chain; 867 } 868 else if (DEBUG_INSN_P (insn) && n_regs_saved) 869 mark_referenced_regs (&PATTERN (insn), 870 replace_reg_with_saved_mem, 871 save_mode); 872 873 if (chain->next == 0 || chain->next->block != chain->block) 874 { 875 int regno; 876 /* At the end of the basic block, we must restore any registers that 877 remain saved. If the last insn in the block is a JUMP_INSN, put 878 the restore before the insn, otherwise, put it after the insn. */ 879 880 if (n_regs_saved 881 && DEBUG_INSN_P (insn) 882 && last 883 && last->block == chain->block) 884 { 885 rtx ins, prev; 886 basic_block bb = BLOCK_FOR_INSN (insn); 887 888 /* When adding hard reg restores after a DEBUG_INSN, move 889 all notes between last real insn and this DEBUG_INSN after 890 the DEBUG_INSN, otherwise we could get code 891 -g/-g0 differences. */ 892 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev) 893 { 894 prev = PREV_INSN (ins); 895 if (NOTE_P (ins)) 896 { 897 NEXT_INSN (prev) = NEXT_INSN (ins); 898 PREV_INSN (NEXT_INSN (ins)) = prev; 899 PREV_INSN (ins) = insn; 900 NEXT_INSN (ins) = NEXT_INSN (insn); 901 NEXT_INSN (insn) = ins; 902 if (NEXT_INSN (ins)) 903 PREV_INSN (NEXT_INSN (ins)) = ins; 904 if (BB_END (bb) == insn) 905 BB_END (bb) = ins; 906 } 907 else 908 gcc_assert (DEBUG_INSN_P (ins)); 909 } 910 } 911 last = NULL; 912 913 if (n_regs_saved) 914 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) 915 if (TEST_HARD_REG_BIT (hard_regs_saved, regno)) 916 regno += insert_restore (chain, JUMP_P (insn), 917 regno, MOVE_MAX_WORDS, save_mode); 918 } 919 } 920 } 921 922 /* Here from note_stores, or directly from save_call_clobbered_regs, when 923 an insn stores a value in a register. 924 Set the proper bit or bits in this_insn_sets. All pseudos that have 925 been assigned hard regs have had their register number changed already, 926 so we can ignore pseudos. */ 927 static void 928 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data) 929 { 930 int regno, endregno, i; 931 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data; 932 933 if (GET_CODE (reg) == SUBREG) 934 { 935 rtx inner = SUBREG_REG (reg); 936 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER) 937 return; 938 regno = subreg_regno (reg); 939 endregno = regno + subreg_nregs (reg); 940 } 941 else if (REG_P (reg) 942 && REGNO (reg) < FIRST_PSEUDO_REGISTER) 943 { 944 regno = REGNO (reg); 945 endregno = END_HARD_REGNO (reg); 946 } 947 else 948 return; 949 950 for (i = regno; i < endregno; i++) 951 SET_HARD_REG_BIT (*this_insn_sets, i); 952 } 953 954 /* Here from note_stores when an insn stores a value in a register. 955 Set the proper bit or bits in the passed regset. All pseudos that have 956 been assigned hard regs have had their register number changed already, 957 so we can ignore pseudos. */ 958 static void 959 add_stored_regs (rtx reg, const_rtx setter, void *data) 960 { 961 int regno, endregno, i; 962 enum machine_mode mode = GET_MODE (reg); 963 int offset = 0; 964 965 if (GET_CODE (setter) == CLOBBER) 966 return; 967 968 if (GET_CODE (reg) == SUBREG 969 && REG_P (SUBREG_REG (reg)) 970 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER) 971 { 972 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)), 973 GET_MODE (SUBREG_REG (reg)), 974 SUBREG_BYTE (reg), 975 GET_MODE (reg)); 976 regno = REGNO (SUBREG_REG (reg)) + offset; 977 endregno = regno + subreg_nregs (reg); 978 } 979 else 980 { 981 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER) 982 return; 983 984 regno = REGNO (reg) + offset; 985 endregno = end_hard_regno (mode, regno); 986 } 987 988 for (i = regno; i < endregno; i++) 989 SET_REGNO_REG_SET ((regset) data, i); 990 } 991 992 /* Walk X and record all referenced registers in REFERENCED_REGS. */ 993 static void 994 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg) 995 { 996 enum rtx_code code = GET_CODE (*loc); 997 const char *fmt; 998 int i, j; 999 1000 if (code == SET) 1001 mark_referenced_regs (&SET_SRC (*loc), mark, arg); 1002 if (code == SET || code == CLOBBER) 1003 { 1004 loc = &SET_DEST (*loc); 1005 code = GET_CODE (*loc); 1006 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER) 1007 || code == PC || code == CC0 1008 || (code == SUBREG && REG_P (SUBREG_REG (*loc)) 1009 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER 1010 /* If we're setting only part of a multi-word register, 1011 we shall mark it as referenced, because the words 1012 that are not being set should be restored. */ 1013 && ((GET_MODE_SIZE (GET_MODE (*loc)) 1014 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))) 1015 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))) 1016 <= UNITS_PER_WORD)))) 1017 return; 1018 } 1019 if (code == MEM || code == SUBREG) 1020 { 1021 loc = &XEXP (*loc, 0); 1022 code = GET_CODE (*loc); 1023 } 1024 1025 if (code == REG) 1026 { 1027 int regno = REGNO (*loc); 1028 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno 1029 : reg_renumber[regno]); 1030 1031 if (hardregno >= 0) 1032 mark (loc, GET_MODE (*loc), hardregno, arg); 1033 else if (arg) 1034 /* ??? Will we ever end up with an equiv expression in a debug 1035 insn, that would have required restoring a reg, or will 1036 reload take care of it for us? */ 1037 return; 1038 /* If this is a pseudo that did not get a hard register, scan its 1039 memory location, since it might involve the use of another 1040 register, which might be saved. */ 1041 else if (reg_equiv_mem[regno] != 0) 1042 mark_referenced_regs (&XEXP (reg_equiv_mem[regno], 0), mark, arg); 1043 else if (reg_equiv_address[regno] != 0) 1044 mark_referenced_regs (®_equiv_address[regno], mark, arg); 1045 return; 1046 } 1047 1048 fmt = GET_RTX_FORMAT (code); 1049 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) 1050 { 1051 if (fmt[i] == 'e') 1052 mark_referenced_regs (&XEXP (*loc, i), mark, arg); 1053 else if (fmt[i] == 'E') 1054 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--) 1055 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg); 1056 } 1057 } 1058 1059 /* Parameter function for mark_referenced_regs() that adds registers 1060 present in the insn and in equivalent mems and addresses to 1061 referenced_regs. */ 1062 1063 static void 1064 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED, 1065 enum machine_mode mode, 1066 int hardregno, 1067 void *arg ATTRIBUTE_UNUSED) 1068 { 1069 add_to_hard_reg_set (&referenced_regs, mode, hardregno); 1070 } 1071 1072 /* Parameter function for mark_referenced_regs() that replaces 1073 registers referenced in a debug_insn that would have been restored, 1074 should it be a non-debug_insn, with their save locations. */ 1075 1076 static void 1077 replace_reg_with_saved_mem (rtx *loc, 1078 enum machine_mode mode, 1079 int regno, 1080 void *arg) 1081 { 1082 unsigned int i, nregs = hard_regno_nregs [regno][mode]; 1083 rtx mem; 1084 enum machine_mode *save_mode = (enum machine_mode *)arg; 1085 1086 for (i = 0; i < nregs; i++) 1087 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) 1088 break; 1089 1090 /* If none of the registers in the range would need restoring, we're 1091 all set. */ 1092 if (i == nregs) 1093 return; 1094 1095 while (++i < nregs) 1096 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) 1097 break; 1098 1099 if (i == nregs 1100 && regno_save_mem[regno][nregs]) 1101 { 1102 mem = copy_rtx (regno_save_mem[regno][nregs]); 1103 1104 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]]) 1105 mem = adjust_address_nv (mem, save_mode[regno], 0); 1106 1107 if (GET_MODE (mem) != mode) 1108 { 1109 /* This is gen_lowpart_if_possible(), but without validating 1110 the newly-formed address. */ 1111 int offset = 0; 1112 1113 if (WORDS_BIG_ENDIAN) 1114 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD) 1115 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD)); 1116 if (BYTES_BIG_ENDIAN) 1117 /* Adjust the address so that the address-after-the-data is 1118 unchanged. */ 1119 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode)) 1120 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem)))); 1121 1122 mem = adjust_address_nv (mem, mode, offset); 1123 } 1124 } 1125 else 1126 { 1127 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs)); 1128 for (i = 0; i < nregs; i++) 1129 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i)) 1130 { 1131 gcc_assert (regno_save_mem[regno + i][1]); 1132 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]); 1133 } 1134 else 1135 { 1136 gcc_assert (save_mode[regno] != VOIDmode); 1137 XVECEXP (mem, 0, i) = gen_rtx_REG (save_mode [regno], 1138 regno + i); 1139 } 1140 } 1141 1142 gcc_assert (GET_MODE (mem) == mode); 1143 *loc = mem; 1144 } 1145 1146 1147 /* Insert a sequence of insns to restore. Place these insns in front of 1148 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is 1149 the maximum number of registers which should be restored during this call. 1150 It should never be less than 1 since we only work with entire registers. 1151 1152 Note that we have verified in init_caller_save that we can do this 1153 with a simple SET, so use it. Set INSN_CODE to what we save there 1154 since the address might not be valid so the insn might not be recognized. 1155 These insns will be reloaded and have register elimination done by 1156 find_reload, so we need not worry about that here. 1157 1158 Return the extra number of registers saved. */ 1159 1160 static int 1161 insert_restore (struct insn_chain *chain, int before_p, int regno, 1162 int maxrestore, enum machine_mode *save_mode) 1163 { 1164 int i, k; 1165 rtx pat = NULL_RTX; 1166 int code; 1167 unsigned int numregs = 0; 1168 struct insn_chain *new_chain; 1169 rtx mem; 1170 1171 /* A common failure mode if register status is not correct in the 1172 RTL is for this routine to be called with a REGNO we didn't 1173 expect to save. That will cause us to write an insn with a (nil) 1174 SET_DEST or SET_SRC. Instead of doing so and causing a crash 1175 later, check for this common case here instead. This will remove 1176 one step in debugging such problems. */ 1177 gcc_assert (regno_save_mem[regno][1]); 1178 1179 /* Get the pattern to emit and update our status. 1180 1181 See if we can restore `maxrestore' registers at once. Work 1182 backwards to the single register case. */ 1183 for (i = maxrestore; i > 0; i--) 1184 { 1185 int j; 1186 int ok = 1; 1187 1188 if (regno_save_mem[regno][i] == 0) 1189 continue; 1190 1191 for (j = 0; j < i; j++) 1192 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) 1193 { 1194 ok = 0; 1195 break; 1196 } 1197 /* Must do this one restore at a time. */ 1198 if (! ok) 1199 continue; 1200 1201 numregs = i; 1202 break; 1203 } 1204 1205 mem = regno_save_mem [regno][numregs]; 1206 if (save_mode [regno] != VOIDmode 1207 && save_mode [regno] != GET_MODE (mem) 1208 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] 1209 /* Check that insn to restore REGNO in save_mode[regno] is 1210 correct. */ 1211 && reg_save_code (regno, save_mode[regno]) >= 0) 1212 mem = adjust_address_nv (mem, save_mode[regno], 0); 1213 else 1214 mem = copy_rtx (mem); 1215 1216 /* Verify that the alignment of spill space is equal to or greater 1217 than required. */ 1218 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, 1219 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); 1220 1221 pat = gen_rtx_SET (VOIDmode, 1222 gen_rtx_REG (GET_MODE (mem), 1223 regno), mem); 1224 code = reg_restore_code (regno, GET_MODE (mem)); 1225 new_chain = insert_one_insn (chain, before_p, code, pat); 1226 1227 /* Clear status for all registers we restored. */ 1228 for (k = 0; k < i; k++) 1229 { 1230 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k); 1231 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); 1232 n_regs_saved--; 1233 } 1234 1235 /* Tell our callers how many extra registers we saved/restored. */ 1236 return numregs - 1; 1237 } 1238 1239 /* Like insert_restore above, but save registers instead. */ 1240 1241 static int 1242 insert_save (struct insn_chain *chain, int before_p, int regno, 1243 HARD_REG_SET (*to_save), enum machine_mode *save_mode) 1244 { 1245 int i; 1246 unsigned int k; 1247 rtx pat = NULL_RTX; 1248 int code; 1249 unsigned int numregs = 0; 1250 struct insn_chain *new_chain; 1251 rtx mem; 1252 1253 /* A common failure mode if register status is not correct in the 1254 RTL is for this routine to be called with a REGNO we didn't 1255 expect to save. That will cause us to write an insn with a (nil) 1256 SET_DEST or SET_SRC. Instead of doing so and causing a crash 1257 later, check for this common case here. This will remove one 1258 step in debugging such problems. */ 1259 gcc_assert (regno_save_mem[regno][1]); 1260 1261 /* Get the pattern to emit and update our status. 1262 1263 See if we can save several registers with a single instruction. 1264 Work backwards to the single register case. */ 1265 for (i = MOVE_MAX_WORDS; i > 0; i--) 1266 { 1267 int j; 1268 int ok = 1; 1269 if (regno_save_mem[regno][i] == 0) 1270 continue; 1271 1272 for (j = 0; j < i; j++) 1273 if (! TEST_HARD_REG_BIT (*to_save, regno + j)) 1274 { 1275 ok = 0; 1276 break; 1277 } 1278 /* Must do this one save at a time. */ 1279 if (! ok) 1280 continue; 1281 1282 numregs = i; 1283 break; 1284 } 1285 1286 mem = regno_save_mem [regno][numregs]; 1287 if (save_mode [regno] != VOIDmode 1288 && save_mode [regno] != GET_MODE (mem) 1289 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]] 1290 /* Check that insn to save REGNO in save_mode[regno] is 1291 correct. */ 1292 && reg_save_code (regno, save_mode[regno]) >= 0) 1293 mem = adjust_address_nv (mem, save_mode[regno], 0); 1294 else 1295 mem = copy_rtx (mem); 1296 1297 /* Verify that the alignment of spill space is equal to or greater 1298 than required. */ 1299 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT, 1300 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem)); 1301 1302 pat = gen_rtx_SET (VOIDmode, mem, 1303 gen_rtx_REG (GET_MODE (mem), 1304 regno)); 1305 code = reg_save_code (regno, GET_MODE (mem)); 1306 new_chain = insert_one_insn (chain, before_p, code, pat); 1307 1308 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */ 1309 for (k = 0; k < numregs; k++) 1310 { 1311 SET_HARD_REG_BIT (hard_regs_saved, regno + k); 1312 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k); 1313 n_regs_saved++; 1314 } 1315 1316 /* Tell our callers how many extra registers we saved/restored. */ 1317 return numregs - 1; 1318 } 1319 1320 /* A for_each_rtx callback used by add_used_regs. Add the hard-register 1321 equivalent of each REG to regset DATA. */ 1322 1323 static int 1324 add_used_regs_1 (rtx *loc, void *data) 1325 { 1326 int regno, i; 1327 regset live; 1328 rtx x; 1329 1330 x = *loc; 1331 live = (regset) data; 1332 if (REG_P (x)) 1333 { 1334 regno = REGNO (x); 1335 if (!HARD_REGISTER_NUM_P (regno)) 1336 regno = reg_renumber[regno]; 1337 if (regno >= 0) 1338 for (i = hard_regno_nregs[regno][GET_MODE (x)] - 1; i >= 0; i--) 1339 SET_REGNO_REG_SET (live, regno + i); 1340 } 1341 return 0; 1342 } 1343 1344 /* A note_uses callback used by insert_one_insn. Add the hard-register 1345 equivalent of each REG to regset DATA. */ 1346 1347 static void 1348 add_used_regs (rtx *loc, void *data) 1349 { 1350 for_each_rtx (loc, add_used_regs_1, data); 1351 } 1352 1353 /* Emit a new caller-save insn and set the code. */ 1354 static struct insn_chain * 1355 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat) 1356 { 1357 rtx insn = chain->insn; 1358 struct insn_chain *new_chain; 1359 1360 #ifdef HAVE_cc0 1361 /* If INSN references CC0, put our insns in front of the insn that sets 1362 CC0. This is always safe, since the only way we could be passed an 1363 insn that references CC0 is for a restore, and doing a restore earlier 1364 isn't a problem. We do, however, assume here that CALL_INSNs don't 1365 reference CC0. Guard against non-INSN's like CODE_LABEL. */ 1366 1367 if ((NONJUMP_INSN_P (insn) || JUMP_P (insn)) 1368 && before_p 1369 && reg_referenced_p (cc0_rtx, PATTERN (insn))) 1370 chain = chain->prev, insn = chain->insn; 1371 #endif 1372 1373 new_chain = new_insn_chain (); 1374 if (before_p) 1375 { 1376 rtx link; 1377 1378 new_chain->prev = chain->prev; 1379 if (new_chain->prev != 0) 1380 new_chain->prev->next = new_chain; 1381 else 1382 reload_insn_chain = new_chain; 1383 1384 chain->prev = new_chain; 1385 new_chain->next = chain; 1386 new_chain->insn = emit_insn_before (pat, insn); 1387 /* ??? It would be nice if we could exclude the already / still saved 1388 registers from the live sets. */ 1389 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); 1390 note_uses (&PATTERN (chain->insn), add_used_regs, 1391 &new_chain->live_throughout); 1392 /* If CHAIN->INSN is a call, then the registers which contain 1393 the arguments to the function are live in the new insn. */ 1394 if (CALL_P (chain->insn)) 1395 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn); 1396 link != NULL_RTX; 1397 link = XEXP (link, 1)) 1398 note_uses (&XEXP (link, 0), add_used_regs, 1399 &new_chain->live_throughout); 1400 1401 CLEAR_REG_SET (&new_chain->dead_or_set); 1402 if (chain->insn == BB_HEAD (BASIC_BLOCK (chain->block))) 1403 BB_HEAD (BASIC_BLOCK (chain->block)) = new_chain->insn; 1404 } 1405 else 1406 { 1407 new_chain->next = chain->next; 1408 if (new_chain->next != 0) 1409 new_chain->next->prev = new_chain; 1410 chain->next = new_chain; 1411 new_chain->prev = chain; 1412 new_chain->insn = emit_insn_after (pat, insn); 1413 /* ??? It would be nice if we could exclude the already / still saved 1414 registers from the live sets, and observe REG_UNUSED notes. */ 1415 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout); 1416 /* Registers that are set in CHAIN->INSN live in the new insn. 1417 (Unless there is a REG_UNUSED note for them, but we don't 1418 look for them here.) */ 1419 note_stores (PATTERN (chain->insn), add_stored_regs, 1420 &new_chain->live_throughout); 1421 CLEAR_REG_SET (&new_chain->dead_or_set); 1422 if (chain->insn == BB_END (BASIC_BLOCK (chain->block))) 1423 BB_END (BASIC_BLOCK (chain->block)) = new_chain->insn; 1424 } 1425 new_chain->block = chain->block; 1426 new_chain->is_caller_save_insn = 1; 1427 1428 INSN_CODE (new_chain->insn) = code; 1429 return new_chain; 1430 } 1431 #include "gt-caller-save.h" 1432