1 /* Disassembler interface for targets using CGEN. -*- C -*- 2 CGEN: Cpu tools GENerator 3 4 THIS FILE IS MACHINE GENERATED WITH CGEN. 5 - the resultant file is machine generated, cgen-dis.in isn't 6 7 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005, 2007, 8 2008, 2010 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 27 Keep that in mind. */ 28 29 #include "sysdep.h" 30 #include <stdio.h> 31 #include "ansidecl.h" 32 #include "dis-asm.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "libiberty.h" 36 #include "mt-desc.h" 37 #include "mt-opc.h" 38 #include "opintl.h" 39 40 /* Default text to print if an instruction isn't recognized. */ 41 #define UNKNOWN_INSN_MSG _("*unknown*") 42 43 static void print_normal 44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); 45 static void print_address 46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; 47 static void print_keyword 48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; 49 static void print_insn_normal 50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); 51 static int print_insn 52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); 53 static int default_print_insn 54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; 55 static int read_insn 56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, 57 unsigned long *); 58 59 /* -- disassembler routines inserted here. */ 60 61 /* -- dis.c */ 62 static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); 63 static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int); 64 65 static void 66 print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 67 void * dis_info, 68 long value, 69 unsigned int attrs ATTRIBUTE_UNUSED, 70 bfd_vma pc ATTRIBUTE_UNUSED, 71 int length ATTRIBUTE_UNUSED) 72 { 73 disassemble_info *info = (disassemble_info *) dis_info; 74 75 info->fprintf_func (info->stream, "$%lx", value & 0xffffffff); 76 77 if (0) 78 print_normal (cd, dis_info, value, attrs, pc, length); 79 } 80 81 static void 82 print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 83 void * dis_info, 84 long value, 85 unsigned int attrs ATTRIBUTE_UNUSED, 86 bfd_vma pc ATTRIBUTE_UNUSED, 87 int length ATTRIBUTE_UNUSED) 88 { 89 print_address (cd, dis_info, value + pc, attrs, pc, length); 90 } 91 92 /* -- */ 93 94 void mt_cgen_print_operand 95 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); 96 97 /* Main entry point for printing operands. 98 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement 99 of dis-asm.h on cgen.h. 100 101 This function is basically just a big switch statement. Earlier versions 102 used tables to look up the function to use, but 103 - if the table contains both assembler and disassembler functions then 104 the disassembler contains much of the assembler and vice-versa, 105 - there's a lot of inlining possibilities as things grow, 106 - using a switch statement avoids the function call overhead. 107 108 This function could be moved into `print_insn_normal', but keeping it 109 separate makes clear the interface between `print_insn_normal' and each of 110 the handlers. */ 111 112 void 113 mt_cgen_print_operand (CGEN_CPU_DESC cd, 114 int opindex, 115 void * xinfo, 116 CGEN_FIELDS *fields, 117 void const *attrs ATTRIBUTE_UNUSED, 118 bfd_vma pc, 119 int length) 120 { 121 disassemble_info *info = (disassemble_info *) xinfo; 122 123 switch (opindex) 124 { 125 case MT_OPERAND_A23 : 126 print_dollarhex (cd, info, fields->f_a23, 0, pc, length); 127 break; 128 case MT_OPERAND_BALL : 129 print_dollarhex (cd, info, fields->f_ball, 0, pc, length); 130 break; 131 case MT_OPERAND_BALL2 : 132 print_dollarhex (cd, info, fields->f_ball2, 0, pc, length); 133 break; 134 case MT_OPERAND_BANKADDR : 135 print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length); 136 break; 137 case MT_OPERAND_BRC : 138 print_dollarhex (cd, info, fields->f_brc, 0, pc, length); 139 break; 140 case MT_OPERAND_BRC2 : 141 print_dollarhex (cd, info, fields->f_brc2, 0, pc, length); 142 break; 143 case MT_OPERAND_CB1INCR : 144 print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 145 break; 146 case MT_OPERAND_CB1SEL : 147 print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length); 148 break; 149 case MT_OPERAND_CB2INCR : 150 print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 151 break; 152 case MT_OPERAND_CB2SEL : 153 print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length); 154 break; 155 case MT_OPERAND_CBRB : 156 print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length); 157 break; 158 case MT_OPERAND_CBS : 159 print_dollarhex (cd, info, fields->f_cbs, 0, pc, length); 160 break; 161 case MT_OPERAND_CBX : 162 print_dollarhex (cd, info, fields->f_cbx, 0, pc, length); 163 break; 164 case MT_OPERAND_CCB : 165 print_dollarhex (cd, info, fields->f_ccb, 0, pc, length); 166 break; 167 case MT_OPERAND_CDB : 168 print_dollarhex (cd, info, fields->f_cdb, 0, pc, length); 169 break; 170 case MT_OPERAND_CELL : 171 print_dollarhex (cd, info, fields->f_cell, 0, pc, length); 172 break; 173 case MT_OPERAND_COLNUM : 174 print_dollarhex (cd, info, fields->f_colnum, 0, pc, length); 175 break; 176 case MT_OPERAND_CONTNUM : 177 print_dollarhex (cd, info, fields->f_contnum, 0, pc, length); 178 break; 179 case MT_OPERAND_CR : 180 print_dollarhex (cd, info, fields->f_cr, 0, pc, length); 181 break; 182 case MT_OPERAND_CTXDISP : 183 print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length); 184 break; 185 case MT_OPERAND_DUP : 186 print_dollarhex (cd, info, fields->f_dup, 0, pc, length); 187 break; 188 case MT_OPERAND_FBDISP : 189 print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length); 190 break; 191 case MT_OPERAND_FBINCR : 192 print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length); 193 break; 194 case MT_OPERAND_FRDR : 195 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 196 break; 197 case MT_OPERAND_FRDRRR : 198 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 199 break; 200 case MT_OPERAND_FRSR1 : 201 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 202 break; 203 case MT_OPERAND_FRSR2 : 204 print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR)); 205 break; 206 case MT_OPERAND_ID : 207 print_dollarhex (cd, info, fields->f_id, 0, pc, length); 208 break; 209 case MT_OPERAND_IMM16 : 210 print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length); 211 break; 212 case MT_OPERAND_IMM16L : 213 print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length); 214 break; 215 case MT_OPERAND_IMM16O : 216 print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 217 break; 218 case MT_OPERAND_IMM16Z : 219 print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length); 220 break; 221 case MT_OPERAND_INCAMT : 222 print_dollarhex (cd, info, fields->f_incamt, 0, pc, length); 223 break; 224 case MT_OPERAND_INCR : 225 print_dollarhex (cd, info, fields->f_incr, 0, pc, length); 226 break; 227 case MT_OPERAND_LENGTH : 228 print_dollarhex (cd, info, fields->f_length, 0, pc, length); 229 break; 230 case MT_OPERAND_LOOPSIZE : 231 print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 232 break; 233 case MT_OPERAND_MASK : 234 print_dollarhex (cd, info, fields->f_mask, 0, pc, length); 235 break; 236 case MT_OPERAND_MASK1 : 237 print_dollarhex (cd, info, fields->f_mask1, 0, pc, length); 238 break; 239 case MT_OPERAND_MODE : 240 print_dollarhex (cd, info, fields->f_mode, 0, pc, length); 241 break; 242 case MT_OPERAND_PERM : 243 print_dollarhex (cd, info, fields->f_perm, 0, pc, length); 244 break; 245 case MT_OPERAND_RBBC : 246 print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length); 247 break; 248 case MT_OPERAND_RC : 249 print_dollarhex (cd, info, fields->f_rc, 0, pc, length); 250 break; 251 case MT_OPERAND_RC1 : 252 print_dollarhex (cd, info, fields->f_rc1, 0, pc, length); 253 break; 254 case MT_OPERAND_RC2 : 255 print_dollarhex (cd, info, fields->f_rc2, 0, pc, length); 256 break; 257 case MT_OPERAND_RC3 : 258 print_dollarhex (cd, info, fields->f_rc3, 0, pc, length); 259 break; 260 case MT_OPERAND_RCNUM : 261 print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length); 262 break; 263 case MT_OPERAND_RDA : 264 print_dollarhex (cd, info, fields->f_rda, 0, pc, length); 265 break; 266 case MT_OPERAND_ROWNUM : 267 print_dollarhex (cd, info, fields->f_rownum, 0, pc, length); 268 break; 269 case MT_OPERAND_ROWNUM1 : 270 print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length); 271 break; 272 case MT_OPERAND_ROWNUM2 : 273 print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length); 274 break; 275 case MT_OPERAND_SIZE : 276 print_dollarhex (cd, info, fields->f_size, 0, pc, length); 277 break; 278 case MT_OPERAND_TYPE : 279 print_dollarhex (cd, info, fields->f_type, 0, pc, length); 280 break; 281 case MT_OPERAND_WR : 282 print_dollarhex (cd, info, fields->f_wr, 0, pc, length); 283 break; 284 case MT_OPERAND_XMODE : 285 print_dollarhex (cd, info, fields->f_xmode, 0, pc, length); 286 break; 287 288 default : 289 /* xgettext:c-format */ 290 fprintf (stderr, _("Unrecognized field %d while printing insn.\n"), 291 opindex); 292 abort (); 293 } 294 } 295 296 cgen_print_fn * const mt_cgen_print_handlers[] = 297 { 298 print_insn_normal, 299 }; 300 301 302 void 303 mt_cgen_init_dis (CGEN_CPU_DESC cd) 304 { 305 mt_cgen_init_opcode_table (cd); 306 mt_cgen_init_ibld_table (cd); 307 cd->print_handlers = & mt_cgen_print_handlers[0]; 308 cd->print_operand = mt_cgen_print_operand; 309 } 310 311 312 /* Default print handler. */ 313 314 static void 315 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 316 void *dis_info, 317 long value, 318 unsigned int attrs, 319 bfd_vma pc ATTRIBUTE_UNUSED, 320 int length ATTRIBUTE_UNUSED) 321 { 322 disassemble_info *info = (disassemble_info *) dis_info; 323 324 /* Print the operand as directed by the attributes. */ 325 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 326 ; /* nothing to do */ 327 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 328 (*info->fprintf_func) (info->stream, "%ld", value); 329 else 330 (*info->fprintf_func) (info->stream, "0x%lx", value); 331 } 332 333 /* Default address handler. */ 334 335 static void 336 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 337 void *dis_info, 338 bfd_vma value, 339 unsigned int attrs, 340 bfd_vma pc ATTRIBUTE_UNUSED, 341 int length ATTRIBUTE_UNUSED) 342 { 343 disassemble_info *info = (disassemble_info *) dis_info; 344 345 /* Print the operand as directed by the attributes. */ 346 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 347 ; /* Nothing to do. */ 348 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 349 (*info->print_address_func) (value, info); 350 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 351 (*info->print_address_func) (value, info); 352 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 353 (*info->fprintf_func) (info->stream, "%ld", (long) value); 354 else 355 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 356 } 357 358 /* Keyword print handler. */ 359 360 static void 361 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 362 void *dis_info, 363 CGEN_KEYWORD *keyword_table, 364 long value, 365 unsigned int attrs ATTRIBUTE_UNUSED) 366 { 367 disassemble_info *info = (disassemble_info *) dis_info; 368 const CGEN_KEYWORD_ENTRY *ke; 369 370 ke = cgen_keyword_lookup_value (keyword_table, value); 371 if (ke != NULL) 372 (*info->fprintf_func) (info->stream, "%s", ke->name); 373 else 374 (*info->fprintf_func) (info->stream, "???"); 375 } 376 377 /* Default insn printer. 378 379 DIS_INFO is defined as `void *' so the disassembler needn't know anything 380 about disassemble_info. */ 381 382 static void 383 print_insn_normal (CGEN_CPU_DESC cd, 384 void *dis_info, 385 const CGEN_INSN *insn, 386 CGEN_FIELDS *fields, 387 bfd_vma pc, 388 int length) 389 { 390 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 391 disassemble_info *info = (disassemble_info *) dis_info; 392 const CGEN_SYNTAX_CHAR_TYPE *syn; 393 394 CGEN_INIT_PRINT (cd); 395 396 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 397 { 398 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 399 { 400 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 401 continue; 402 } 403 if (CGEN_SYNTAX_CHAR_P (*syn)) 404 { 405 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 406 continue; 407 } 408 409 /* We have an operand. */ 410 mt_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 411 fields, CGEN_INSN_ATTRS (insn), pc, length); 412 } 413 } 414 415 /* Subroutine of print_insn. Reads an insn into the given buffers and updates 416 the extract info. 417 Returns 0 if all is well, non-zero otherwise. */ 418 419 static int 420 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 421 bfd_vma pc, 422 disassemble_info *info, 423 bfd_byte *buf, 424 int buflen, 425 CGEN_EXTRACT_INFO *ex_info, 426 unsigned long *insn_value) 427 { 428 int status = (*info->read_memory_func) (pc, buf, buflen, info); 429 430 if (status != 0) 431 { 432 (*info->memory_error_func) (status, pc, info); 433 return -1; 434 } 435 436 ex_info->dis_info = info; 437 ex_info->valid = (1 << buflen) - 1; 438 ex_info->insn_bytes = buf; 439 440 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 441 return 0; 442 } 443 444 /* Utility to print an insn. 445 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 446 The result is the size of the insn in bytes or zero for an unknown insn 447 or -1 if an error occurs fetching data (memory_error_func will have 448 been called). */ 449 450 static int 451 print_insn (CGEN_CPU_DESC cd, 452 bfd_vma pc, 453 disassemble_info *info, 454 bfd_byte *buf, 455 unsigned int buflen) 456 { 457 CGEN_INSN_INT insn_value; 458 const CGEN_INSN_LIST *insn_list; 459 CGEN_EXTRACT_INFO ex_info; 460 int basesize; 461 462 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 463 basesize = cd->base_insn_bitsize < buflen * 8 ? 464 cd->base_insn_bitsize : buflen * 8; 465 insn_value = cgen_get_insn_value (cd, buf, basesize); 466 467 468 /* Fill in ex_info fields like read_insn would. Don't actually call 469 read_insn, since the incoming buffer is already read (and possibly 470 modified a la m32r). */ 471 ex_info.valid = (1 << buflen) - 1; 472 ex_info.dis_info = info; 473 ex_info.insn_bytes = buf; 474 475 /* The instructions are stored in hash lists. 476 Pick the first one and keep trying until we find the right one. */ 477 478 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); 479 while (insn_list != NULL) 480 { 481 const CGEN_INSN *insn = insn_list->insn; 482 CGEN_FIELDS fields; 483 int length; 484 unsigned long insn_value_cropped; 485 486 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 487 /* Not needed as insn shouldn't be in hash lists if not supported. */ 488 /* Supported by this cpu? */ 489 if (! mt_cgen_insn_supported (cd, insn)) 490 { 491 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 492 continue; 493 } 494 #endif 495 496 /* Basic bit mask must be correct. */ 497 /* ??? May wish to allow target to defer this check until the extract 498 handler. */ 499 500 /* Base size may exceed this instruction's size. Extract the 501 relevant part from the buffer. */ 502 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 503 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 504 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 505 info->endian == BFD_ENDIAN_BIG); 506 else 507 insn_value_cropped = insn_value; 508 509 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 510 == CGEN_INSN_BASE_VALUE (insn)) 511 { 512 /* Printing is handled in two passes. The first pass parses the 513 machine insn and extracts the fields. The second pass prints 514 them. */ 515 516 /* Make sure the entire insn is loaded into insn_value, if it 517 can fit. */ 518 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 519 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 520 { 521 unsigned long full_insn_value; 522 int rc = read_insn (cd, pc, info, buf, 523 CGEN_INSN_BITSIZE (insn) / 8, 524 & ex_info, & full_insn_value); 525 if (rc != 0) 526 return rc; 527 length = CGEN_EXTRACT_FN (cd, insn) 528 (cd, insn, &ex_info, full_insn_value, &fields, pc); 529 } 530 else 531 length = CGEN_EXTRACT_FN (cd, insn) 532 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 533 534 /* Length < 0 -> error. */ 535 if (length < 0) 536 return length; 537 if (length > 0) 538 { 539 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 540 /* Length is in bits, result is in bytes. */ 541 return length / 8; 542 } 543 } 544 545 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 546 } 547 548 return 0; 549 } 550 551 /* Default value for CGEN_PRINT_INSN. 552 The result is the size of the insn in bytes or zero for an unknown insn 553 or -1 if an error occured fetching bytes. */ 554 555 #ifndef CGEN_PRINT_INSN 556 #define CGEN_PRINT_INSN default_print_insn 557 #endif 558 559 static int 560 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) 561 { 562 bfd_byte buf[CGEN_MAX_INSN_SIZE]; 563 int buflen; 564 int status; 565 566 /* Attempt to read the base part of the insn. */ 567 buflen = cd->base_insn_bitsize / 8; 568 status = (*info->read_memory_func) (pc, buf, buflen, info); 569 570 /* Try again with the minimum part, if min < base. */ 571 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 572 { 573 buflen = cd->min_insn_bitsize / 8; 574 status = (*info->read_memory_func) (pc, buf, buflen, info); 575 } 576 577 if (status != 0) 578 { 579 (*info->memory_error_func) (status, pc, info); 580 return -1; 581 } 582 583 return print_insn (cd, pc, info, buf, buflen); 584 } 585 586 /* Main entry point. 587 Print one instruction from PC on INFO->STREAM. 588 Return the size of the instruction (in bytes). */ 589 590 typedef struct cpu_desc_list 591 { 592 struct cpu_desc_list *next; 593 CGEN_BITSET *isa; 594 int mach; 595 int endian; 596 CGEN_CPU_DESC cd; 597 } cpu_desc_list; 598 599 int 600 print_insn_mt (bfd_vma pc, disassemble_info *info) 601 { 602 static cpu_desc_list *cd_list = 0; 603 cpu_desc_list *cl = 0; 604 static CGEN_CPU_DESC cd = 0; 605 static CGEN_BITSET *prev_isa; 606 static int prev_mach; 607 static int prev_endian; 608 int length; 609 CGEN_BITSET *isa; 610 int mach; 611 int endian = (info->endian == BFD_ENDIAN_BIG 612 ? CGEN_ENDIAN_BIG 613 : CGEN_ENDIAN_LITTLE); 614 enum bfd_architecture arch; 615 616 /* ??? gdb will set mach but leave the architecture as "unknown" */ 617 #ifndef CGEN_BFD_ARCH 618 #define CGEN_BFD_ARCH bfd_arch_mt 619 #endif 620 arch = info->arch; 621 if (arch == bfd_arch_unknown) 622 arch = CGEN_BFD_ARCH; 623 624 /* There's no standard way to compute the machine or isa number 625 so we leave it to the target. */ 626 #ifdef CGEN_COMPUTE_MACH 627 mach = CGEN_COMPUTE_MACH (info); 628 #else 629 mach = info->mach; 630 #endif 631 632 #ifdef CGEN_COMPUTE_ISA 633 { 634 static CGEN_BITSET *permanent_isa; 635 636 if (!permanent_isa) 637 permanent_isa = cgen_bitset_create (MAX_ISAS); 638 isa = permanent_isa; 639 cgen_bitset_clear (isa); 640 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); 641 } 642 #else 643 isa = info->insn_sets; 644 #endif 645 646 /* If we've switched cpu's, try to find a handle we've used before */ 647 if (cd 648 && (cgen_bitset_compare (isa, prev_isa) != 0 649 || mach != prev_mach 650 || endian != prev_endian)) 651 { 652 cd = 0; 653 for (cl = cd_list; cl; cl = cl->next) 654 { 655 if (cgen_bitset_compare (cl->isa, isa) == 0 && 656 cl->mach == mach && 657 cl->endian == endian) 658 { 659 cd = cl->cd; 660 prev_isa = cd->isas; 661 break; 662 } 663 } 664 } 665 666 /* If we haven't initialized yet, initialize the opcode table. */ 667 if (! cd) 668 { 669 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 670 const char *mach_name; 671 672 if (!arch_type) 673 abort (); 674 mach_name = arch_type->printable_name; 675 676 prev_isa = cgen_bitset_copy (isa); 677 prev_mach = mach; 678 prev_endian = endian; 679 cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 680 CGEN_CPU_OPEN_BFDMACH, mach_name, 681 CGEN_CPU_OPEN_ENDIAN, prev_endian, 682 CGEN_CPU_OPEN_END); 683 if (!cd) 684 abort (); 685 686 /* Save this away for future reference. */ 687 cl = xmalloc (sizeof (struct cpu_desc_list)); 688 cl->cd = cd; 689 cl->isa = prev_isa; 690 cl->mach = mach; 691 cl->endian = endian; 692 cl->next = cd_list; 693 cd_list = cl; 694 695 mt_cgen_init_dis (cd); 696 } 697 698 /* We try to have as much common code as possible. 699 But at this point some targets need to take over. */ 700 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 701 but if not possible try to move this hook elsewhere rather than 702 have two hooks. */ 703 length = CGEN_PRINT_INSN (cd, pc, info); 704 if (length > 0) 705 return length; 706 if (length < 0) 707 return -1; 708 709 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 710 return cd->default_insn_bitsize / 8; 711 } 712