1 /* Print Motorola 68k instructions. 2 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007 4 Free Software Foundation, Inc. 5 6 This file is part of the GNU opcodes library. 7 8 This library is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 It is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this program; if not, write to the Free Software 20 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "sysdep.h" 24 #include "dis-asm.h" 25 #include "floatformat.h" 26 #include "libiberty.h" 27 #include "opintl.h" 28 29 #include "opcode/m68k.h" 30 31 /* Local function prototypes. */ 32 33 const char * const fpcr_names[] = 34 { 35 "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr", 36 "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr" 37 }; 38 39 static char *const reg_names[] = 40 { 41 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 42 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", 43 "%ps", "%pc" 44 }; 45 46 /* Name of register halves for MAC/EMAC. 47 Seperate from reg_names since 'spu', 'fpl' look weird. */ 48 static char *const reg_half_names[] = 49 { 50 "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", 51 "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7", 52 "%ps", "%pc" 53 }; 54 55 /* Sign-extend an (unsigned char). */ 56 #if __STDC__ == 1 57 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch)) 58 #else 59 #define COERCE_SIGNED_CHAR(ch) ((int) (((ch) ^ 0x80) & 0xFF) - 128) 60 #endif 61 62 /* Get a 1 byte signed integer. */ 63 #define NEXTBYTE(p, val) \ 64 do \ 65 { \ 66 p += 2; \ 67 if (!FETCH_DATA (info, p)) \ 68 return -3; \ 69 val = COERCE_SIGNED_CHAR (p[-1]); \ 70 } \ 71 while (0) 72 73 /* Get a 2 byte signed integer. */ 74 #define COERCE16(x) ((int) (((x) ^ 0x8000) - 0x8000)) 75 76 #define NEXTWORD(p, val, ret_val) \ 77 do \ 78 { \ 79 p += 2; \ 80 if (!FETCH_DATA (info, p)) \ 81 return ret_val; \ 82 val = COERCE16 ((p[-2] << 8) + p[-1]); \ 83 } \ 84 while (0) 85 86 /* Get a 4 byte signed integer. */ 87 #define COERCE32(x) ((bfd_signed_vma) ((x) ^ 0x80000000) - 0x80000000) 88 89 #define NEXTLONG(p, val, ret_val) \ 90 do \ 91 { \ 92 p += 4; \ 93 if (!FETCH_DATA (info, p)) \ 94 return ret_val; \ 95 val = COERCE32 ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \ 96 } \ 97 while (0) 98 99 /* Get a 4 byte unsigned integer. */ 100 #define NEXTULONG(p, val) \ 101 do \ 102 { \ 103 p += 4; \ 104 if (!FETCH_DATA (info, p)) \ 105 return -3; \ 106 val = (unsigned int) ((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1]); \ 107 } \ 108 while (0) 109 110 /* Get a single precision float. */ 111 #define NEXTSINGLE(val, p) \ 112 do \ 113 { \ 114 p += 4; \ 115 if (!FETCH_DATA (info, p)) \ 116 return -3; \ 117 floatformat_to_double (& floatformat_ieee_single_big, \ 118 (char *) p - 4, & val); \ 119 } \ 120 while (0) 121 122 /* Get a double precision float. */ 123 #define NEXTDOUBLE(val, p) \ 124 do \ 125 { \ 126 p += 8; \ 127 if (!FETCH_DATA (info, p)) \ 128 return -3; \ 129 floatformat_to_double (& floatformat_ieee_double_big, \ 130 (char *) p - 8, & val); \ 131 } \ 132 while (0) 133 134 /* Get an extended precision float. */ 135 #define NEXTEXTEND(val, p) \ 136 do \ 137 { \ 138 p += 12; \ 139 if (!FETCH_DATA (info, p)) \ 140 return -3; \ 141 floatformat_to_double (& floatformat_m68881_ext, \ 142 (char *) p - 12, & val); \ 143 } \ 144 while (0) 145 146 /* Need a function to convert from packed to double 147 precision. Actually, it's easier to print a 148 packed number than a double anyway, so maybe 149 there should be a special case to handle this... */ 150 #define NEXTPACKED(p, val) \ 151 do \ 152 { \ 153 p += 12; \ 154 if (!FETCH_DATA (info, p)) \ 155 return -3; \ 156 val = 0.0; \ 157 } \ 158 while (0) 159 160 161 /* Maximum length of an instruction. */ 162 #define MAXLEN 22 163 164 #include <setjmp.h> 165 166 struct private 167 { 168 /* Points to first byte not fetched. */ 169 bfd_byte *max_fetched; 170 bfd_byte the_buffer[MAXLEN]; 171 bfd_vma insn_start; 172 }; 173 174 /* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive) 175 to ADDR (exclusive) are valid. Returns 1 for success, 0 on error. */ 176 #define FETCH_DATA(info, addr) \ 177 ((addr) <= ((struct private *) (info->private_data))->max_fetched \ 178 ? 1 : fetch_data ((info), (addr))) 179 180 static int 181 fetch_data (struct disassemble_info *info, bfd_byte *addr) 182 { 183 int status; 184 struct private *priv = (struct private *)info->private_data; 185 bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer); 186 187 status = (*info->read_memory_func) (start, 188 priv->max_fetched, 189 addr - priv->max_fetched, 190 info); 191 if (status != 0) 192 { 193 (*info->memory_error_func) (status, start, info); 194 return 0; 195 } 196 else 197 priv->max_fetched = addr; 198 return 1; 199 } 200 201 /* This function is used to print to the bit-bucket. */ 202 static int 203 dummy_printer (FILE *file ATTRIBUTE_UNUSED, 204 const char *format ATTRIBUTE_UNUSED, 205 ...) 206 { 207 return 0; 208 } 209 210 static void 211 dummy_print_address (bfd_vma vma ATTRIBUTE_UNUSED, 212 struct disassemble_info *info ATTRIBUTE_UNUSED) 213 { 214 } 215 216 /* Fetch BITS bits from a position in the instruction specified by CODE. 217 CODE is a "place to put an argument", or 'x' for a destination 218 that is a general address (mode and register). 219 BUFFER contains the instruction. 220 Returns -1 on failure. */ 221 222 static int 223 fetch_arg (unsigned char *buffer, 224 int code, 225 int bits, 226 disassemble_info *info) 227 { 228 int val = 0; 229 230 switch (code) 231 { 232 case '/': /* MAC/EMAC mask bit. */ 233 val = buffer[3] >> 5; 234 break; 235 236 case 'G': /* EMAC ACC load. */ 237 val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1); 238 break; 239 240 case 'H': /* EMAC ACC !load. */ 241 val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1); 242 break; 243 244 case ']': /* EMAC ACCEXT bit. */ 245 val = buffer[0] >> 2; 246 break; 247 248 case 'I': /* MAC/EMAC scale factor. */ 249 val = buffer[2] >> 1; 250 break; 251 252 case 'F': /* EMAC ACCx. */ 253 val = buffer[0] >> 1; 254 break; 255 256 case 'f': 257 val = buffer[1]; 258 break; 259 260 case 's': 261 val = buffer[1]; 262 break; 263 264 case 'd': /* Destination, for register or quick. */ 265 val = (buffer[0] << 8) + buffer[1]; 266 val >>= 9; 267 break; 268 269 case 'x': /* Destination, for general arg. */ 270 val = (buffer[0] << 8) + buffer[1]; 271 val >>= 6; 272 break; 273 274 case 'k': 275 if (! FETCH_DATA (info, buffer + 3)) 276 return -1; 277 val = (buffer[3] >> 4); 278 break; 279 280 case 'C': 281 if (! FETCH_DATA (info, buffer + 3)) 282 return -1; 283 val = buffer[3]; 284 break; 285 286 case '1': 287 if (! FETCH_DATA (info, buffer + 3)) 288 return -1; 289 val = (buffer[2] << 8) + buffer[3]; 290 val >>= 12; 291 break; 292 293 case '2': 294 if (! FETCH_DATA (info, buffer + 3)) 295 return -1; 296 val = (buffer[2] << 8) + buffer[3]; 297 val >>= 6; 298 break; 299 300 case '3': 301 case 'j': 302 if (! FETCH_DATA (info, buffer + 3)) 303 return -1; 304 val = (buffer[2] << 8) + buffer[3]; 305 break; 306 307 case '4': 308 if (! FETCH_DATA (info, buffer + 5)) 309 return -1; 310 val = (buffer[4] << 8) + buffer[5]; 311 val >>= 12; 312 break; 313 314 case '5': 315 if (! FETCH_DATA (info, buffer + 5)) 316 return -1; 317 val = (buffer[4] << 8) + buffer[5]; 318 val >>= 6; 319 break; 320 321 case '6': 322 if (! FETCH_DATA (info, buffer + 5)) 323 return -1; 324 val = (buffer[4] << 8) + buffer[5]; 325 break; 326 327 case '7': 328 if (! FETCH_DATA (info, buffer + 3)) 329 return -1; 330 val = (buffer[2] << 8) + buffer[3]; 331 val >>= 7; 332 break; 333 334 case '8': 335 if (! FETCH_DATA (info, buffer + 3)) 336 return -1; 337 val = (buffer[2] << 8) + buffer[3]; 338 val >>= 10; 339 break; 340 341 case '9': 342 if (! FETCH_DATA (info, buffer + 3)) 343 return -1; 344 val = (buffer[2] << 8) + buffer[3]; 345 val >>= 5; 346 break; 347 348 case 'e': 349 val = (buffer[1] >> 6); 350 break; 351 352 case 'E': 353 if (! FETCH_DATA (info, buffer + 3)) 354 return -1; 355 val = (buffer[2] >> 1); 356 break; 357 358 case 'm': 359 val = (buffer[1] & 0x40 ? 0x8 : 0) 360 | ((buffer[0] >> 1) & 0x7) 361 | (buffer[3] & 0x80 ? 0x10 : 0); 362 break; 363 364 case 'n': 365 val = (buffer[1] & 0x40 ? 0x8 : 0) | ((buffer[0] >> 1) & 0x7); 366 break; 367 368 case 'o': 369 val = (buffer[2] >> 4) | (buffer[3] & 0x80 ? 0x10 : 0); 370 break; 371 372 case 'M': 373 val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 374 break; 375 376 case 'N': 377 val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); 378 break; 379 380 case 'h': 381 val = buffer[2] >> 2; 382 break; 383 384 default: 385 abort (); 386 } 387 388 /* bits is never too big. */ 389 return val & ((1 << bits) - 1); 390 } 391 392 /* Check if an EA is valid for a particular code. This is required 393 for the EMAC instructions since the type of source address determines 394 if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it 395 is a non-load EMAC instruction and the bits mean register Ry. 396 A similar case exists for the movem instructions where the register 397 mask is interpreted differently for different EAs. */ 398 399 static bfd_boolean 400 m68k_valid_ea (char code, int val) 401 { 402 int mode, mask; 403 #define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \ 404 (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \ 405 | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11) 406 407 switch (code) 408 { 409 case '*': 410 mask = M (1,1,1,1,1,1,1,1,1,1,1,1); 411 break; 412 case '~': 413 mask = M (0,0,1,1,1,1,1,1,1,0,0,0); 414 break; 415 case '%': 416 mask = M (1,1,1,1,1,1,1,1,1,0,0,0); 417 break; 418 case ';': 419 mask = M (1,0,1,1,1,1,1,1,1,1,1,1); 420 break; 421 case '@': 422 mask = M (1,0,1,1,1,1,1,1,1,1,1,0); 423 break; 424 case '!': 425 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 426 break; 427 case '&': 428 mask = M (0,0,1,0,0,1,1,1,1,0,0,0); 429 break; 430 case '$': 431 mask = M (1,0,1,1,1,1,1,1,1,0,0,0); 432 break; 433 case '?': 434 mask = M (1,0,1,0,0,1,1,1,1,0,0,0); 435 break; 436 case '/': 437 mask = M (1,0,1,0,0,1,1,1,1,1,1,0); 438 break; 439 case '|': 440 mask = M (0,0,1,0,0,1,1,1,1,1,1,0); 441 break; 442 case '>': 443 mask = M (0,0,1,0,1,1,1,1,1,0,0,0); 444 break; 445 case '<': 446 mask = M (0,0,1,1,0,1,1,1,1,1,1,0); 447 break; 448 case 'm': 449 mask = M (1,1,1,1,1,0,0,0,0,0,0,0); 450 break; 451 case 'n': 452 mask = M (0,0,0,0,0,1,0,0,0,1,0,0); 453 break; 454 case 'o': 455 mask = M (0,0,0,0,0,0,1,1,1,0,1,1); 456 break; 457 case 'p': 458 mask = M (1,1,1,1,1,1,0,0,0,0,0,0); 459 break; 460 case 'q': 461 mask = M (1,0,1,1,1,1,0,0,0,0,0,0); 462 break; 463 case 'v': 464 mask = M (1,0,1,1,1,1,0,1,1,0,0,0); 465 break; 466 case 'b': 467 mask = M (1,0,1,1,1,1,0,0,0,1,0,0); 468 break; 469 case 'w': 470 mask = M (0,0,1,1,1,1,0,0,0,1,0,0); 471 break; 472 case 'y': 473 mask = M (0,0,1,0,0,1,0,0,0,0,0,0); 474 break; 475 case 'z': 476 mask = M (0,0,1,0,0,1,0,0,0,1,0,0); 477 break; 478 case '4': 479 mask = M (0,0,1,1,1,1,0,0,0,0,0,0); 480 break; 481 default: 482 abort (); 483 } 484 #undef M 485 486 mode = (val >> 3) & 7; 487 if (mode == 7) 488 mode += val & 7; 489 return (mask & (1 << mode)) != 0; 490 } 491 492 /* Print a base register REGNO and displacement DISP, on INFO->STREAM. 493 REGNO = -1 for pc, -2 for none (suppressed). */ 494 495 static void 496 print_base (int regno, bfd_vma disp, disassemble_info *info) 497 { 498 if (regno == -1) 499 { 500 (*info->fprintf_func) (info->stream, "%%pc@("); 501 (*info->print_address_func) (disp, info); 502 } 503 else 504 { 505 char buf[50]; 506 507 if (regno == -2) 508 (*info->fprintf_func) (info->stream, "@("); 509 else if (regno == -3) 510 (*info->fprintf_func) (info->stream, "%%zpc@("); 511 else 512 (*info->fprintf_func) (info->stream, "%s@(", reg_names[regno]); 513 514 sprintf_vma (buf, disp); 515 (*info->fprintf_func) (info->stream, "%s", buf); 516 } 517 } 518 519 /* Print an indexed argument. The base register is BASEREG (-1 for pc). 520 P points to extension word, in buffer. 521 ADDR is the nominal core address of that extension word. 522 Returns NULL upon error. */ 523 524 static unsigned char * 525 print_indexed (int basereg, 526 unsigned char *p, 527 bfd_vma addr, 528 disassemble_info *info) 529 { 530 int word; 531 static char *const scales[] = { "", ":2", ":4", ":8" }; 532 bfd_vma base_disp; 533 bfd_vma outer_disp; 534 char buf[40]; 535 char vmabuf[50]; 536 537 NEXTWORD (p, word, NULL); 538 539 /* Generate the text for the index register. 540 Where this will be output is not yet determined. */ 541 sprintf (buf, "%s:%c%s", 542 reg_names[(word >> 12) & 0xf], 543 (word & 0x800) ? 'l' : 'w', 544 scales[(word >> 9) & 3]); 545 546 /* Handle the 68000 style of indexing. */ 547 548 if ((word & 0x100) == 0) 549 { 550 base_disp = word & 0xff; 551 if ((base_disp & 0x80) != 0) 552 base_disp -= 0x100; 553 if (basereg == -1) 554 base_disp += addr; 555 print_base (basereg, base_disp, info); 556 (*info->fprintf_func) (info->stream, ",%s)", buf); 557 return p; 558 } 559 560 /* Handle the generalized kind. */ 561 /* First, compute the displacement to add to the base register. */ 562 if (word & 0200) 563 { 564 if (basereg == -1) 565 basereg = -3; 566 else 567 basereg = -2; 568 } 569 if (word & 0100) 570 buf[0] = '\0'; 571 base_disp = 0; 572 switch ((word >> 4) & 3) 573 { 574 case 2: 575 NEXTWORD (p, base_disp, NULL); 576 break; 577 case 3: 578 NEXTLONG (p, base_disp, NULL); 579 } 580 if (basereg == -1) 581 base_disp += addr; 582 583 /* Handle single-level case (not indirect). */ 584 if ((word & 7) == 0) 585 { 586 print_base (basereg, base_disp, info); 587 if (buf[0] != '\0') 588 (*info->fprintf_func) (info->stream, ",%s", buf); 589 (*info->fprintf_func) (info->stream, ")"); 590 return p; 591 } 592 593 /* Two level. Compute displacement to add after indirection. */ 594 outer_disp = 0; 595 switch (word & 3) 596 { 597 case 2: 598 NEXTWORD (p, outer_disp, NULL); 599 break; 600 case 3: 601 NEXTLONG (p, outer_disp, NULL); 602 } 603 604 print_base (basereg, base_disp, info); 605 if ((word & 4) == 0 && buf[0] != '\0') 606 { 607 (*info->fprintf_func) (info->stream, ",%s", buf); 608 buf[0] = '\0'; 609 } 610 sprintf_vma (vmabuf, outer_disp); 611 (*info->fprintf_func) (info->stream, ")@(%s", vmabuf); 612 if (buf[0] != '\0') 613 (*info->fprintf_func) (info->stream, ",%s", buf); 614 (*info->fprintf_func) (info->stream, ")"); 615 616 return p; 617 } 618 619 #define FETCH_ARG(size, val) \ 620 do \ 621 { \ 622 val = fetch_arg (buffer, place, size, info); \ 623 if (val < 0) \ 624 return -3; \ 625 } \ 626 while (0) 627 628 /* Returns number of bytes "eaten" by the operand, or 629 return -1 if an invalid operand was found, or -2 if 630 an opcode tabe error was found or -3 to simply abort. 631 ADDR is the pc for this arg to be relative to. */ 632 633 static int 634 print_insn_arg (const char *d, 635 unsigned char *buffer, 636 unsigned char *p0, 637 bfd_vma addr, 638 disassemble_info *info) 639 { 640 int val = 0; 641 int place = d[1]; 642 unsigned char *p = p0; 643 int regno; 644 const char *regname; 645 unsigned char *p1; 646 double flval; 647 int flt_p; 648 bfd_signed_vma disp; 649 unsigned int uval; 650 651 switch (*d) 652 { 653 case 'c': /* Cache identifier. */ 654 { 655 static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" }; 656 FETCH_ARG (2, val); 657 (*info->fprintf_func) (info->stream, cacheFieldName[val]); 658 break; 659 } 660 661 case 'a': /* Address register indirect only. Cf. case '+'. */ 662 { 663 FETCH_ARG (3, val); 664 (*info->fprintf_func) (info->stream, "%s@", reg_names[val + 8]); 665 break; 666 } 667 668 case '_': /* 32-bit absolute address for move16. */ 669 { 670 NEXTULONG (p, uval); 671 (*info->print_address_func) (uval, info); 672 break; 673 } 674 675 case 'C': 676 (*info->fprintf_func) (info->stream, "%%ccr"); 677 break; 678 679 case 'S': 680 (*info->fprintf_func) (info->stream, "%%sr"); 681 break; 682 683 case 'U': 684 (*info->fprintf_func) (info->stream, "%%usp"); 685 break; 686 687 case 'E': 688 (*info->fprintf_func) (info->stream, "%%acc"); 689 break; 690 691 case 'G': 692 (*info->fprintf_func) (info->stream, "%%macsr"); 693 break; 694 695 case 'H': 696 (*info->fprintf_func) (info->stream, "%%mask"); 697 break; 698 699 case 'J': 700 { 701 /* FIXME: There's a problem here, different m68k processors call the 702 same address different names. This table can't get it right 703 because it doesn't know which processor it's disassembling for. */ 704 static const struct { char *name; int value; } names[] 705 = {{"%sfc", 0x000}, {"%dfc", 0x001}, {"%cacr", 0x002}, 706 {"%tc", 0x003}, {"%itt0",0x004}, {"%itt1", 0x005}, 707 {"%dtt0",0x006}, {"%dtt1",0x007}, {"%buscr",0x008}, 708 {"%usp", 0x800}, {"%vbr", 0x801}, {"%caar", 0x802}, 709 {"%msp", 0x803}, {"%isp", 0x804}, 710 /* reg c04 is sometimes called flashbar or rambar. 711 rec c05 is also sometimes called rambar. */ 712 {"%rambar0", 0xc04}, {"%rambar1", 0xc05}, 713 714 /* Should we be calling this psr like we do in case 'Y'? */ 715 {"%mmusr",0x805}, 716 717 {"%urp", 0x806}, {"%srp", 0x807}, {"%pcr", 0x808}, 718 719 /* Fido added these. */ 720 {"%cac", 0xffe}, {"%mbo", 0xfff}}; 721 722 FETCH_ARG (12, val); 723 for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--) 724 if (names[regno].value == val) 725 { 726 (*info->fprintf_func) (info->stream, "%s", names[regno].name); 727 break; 728 } 729 if (regno < 0) 730 (*info->fprintf_func) (info->stream, "%d", val); 731 } 732 break; 733 734 case 'Q': 735 FETCH_ARG (3, val); 736 /* 0 means 8, except for the bkpt instruction... */ 737 if (val == 0 && d[1] != 's') 738 val = 8; 739 (*info->fprintf_func) (info->stream, "#%d", val); 740 break; 741 742 case 'x': 743 FETCH_ARG (3, val); 744 /* 0 means -1. */ 745 if (val == 0) 746 val = -1; 747 (*info->fprintf_func) (info->stream, "#%d", val); 748 break; 749 750 case 'j': 751 FETCH_ARG (3, val); 752 (*info->fprintf_func) (info->stream, "#%d", val+1); 753 break; 754 755 case 'K': 756 FETCH_ARG (9, val); 757 (*info->fprintf_func) (info->stream, "#%d", val); 758 break; 759 760 case 'M': 761 if (place == 'h') 762 { 763 static char *const scalefactor_name[] = { "<<", ">>" }; 764 765 FETCH_ARG (1, val); 766 (*info->fprintf_func) (info->stream, scalefactor_name[val]); 767 } 768 else 769 { 770 FETCH_ARG (8, val); 771 if (val & 0x80) 772 val = val - 0x100; 773 (*info->fprintf_func) (info->stream, "#%d", val); 774 } 775 break; 776 777 case 'T': 778 FETCH_ARG (4, val); 779 (*info->fprintf_func) (info->stream, "#%d", val); 780 break; 781 782 case 'D': 783 FETCH_ARG (3, val); 784 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 785 break; 786 787 case 'A': 788 FETCH_ARG (3, val); 789 (*info->fprintf_func) (info->stream, "%s", reg_names[val + 010]); 790 break; 791 792 case 'R': 793 FETCH_ARG (4, val); 794 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 795 break; 796 797 case 'r': 798 FETCH_ARG (4, regno); 799 if (regno > 7) 800 (*info->fprintf_func) (info->stream, "%s@", reg_names[regno]); 801 else 802 (*info->fprintf_func) (info->stream, "@(%s)", reg_names[regno]); 803 break; 804 805 case 'F': 806 FETCH_ARG (3, val); 807 (*info->fprintf_func) (info->stream, "%%fp%d", val); 808 break; 809 810 case 'O': 811 FETCH_ARG (6, val); 812 if (val & 0x20) 813 (*info->fprintf_func) (info->stream, "%s", reg_names[val & 7]); 814 else 815 (*info->fprintf_func) (info->stream, "%d", val); 816 break; 817 818 case '+': 819 FETCH_ARG (3, val); 820 (*info->fprintf_func) (info->stream, "%s@+", reg_names[val + 8]); 821 break; 822 823 case '-': 824 FETCH_ARG (3, val); 825 (*info->fprintf_func) (info->stream, "%s@-", reg_names[val + 8]); 826 break; 827 828 case 'k': 829 if (place == 'k') 830 { 831 FETCH_ARG (3, val); 832 (*info->fprintf_func) (info->stream, "{%s}", reg_names[val]); 833 } 834 else if (place == 'C') 835 { 836 FETCH_ARG (7, val); 837 if (val > 63) /* This is a signed constant. */ 838 val -= 128; 839 (*info->fprintf_func) (info->stream, "{#%d}", val); 840 } 841 else 842 return -1; 843 break; 844 845 case '#': 846 case '^': 847 p1 = buffer + (*d == '#' ? 2 : 4); 848 if (place == 's') 849 FETCH_ARG (4, val); 850 else if (place == 'C') 851 FETCH_ARG (7, val); 852 else if (place == '8') 853 FETCH_ARG (3, val); 854 else if (place == '3') 855 FETCH_ARG (8, val); 856 else if (place == 'b') 857 NEXTBYTE (p1, val); 858 else if (place == 'w' || place == 'W') 859 NEXTWORD (p1, val, -3); 860 else if (place == 'l') 861 NEXTLONG (p1, val, -3); 862 else 863 return -2; 864 865 (*info->fprintf_func) (info->stream, "#%d", val); 866 break; 867 868 case 'B': 869 if (place == 'b') 870 NEXTBYTE (p, disp); 871 else if (place == 'B') 872 disp = COERCE_SIGNED_CHAR (buffer[1]); 873 else if (place == 'w' || place == 'W') 874 NEXTWORD (p, disp, -3); 875 else if (place == 'l' || place == 'L' || place == 'C') 876 NEXTLONG (p, disp, -3); 877 else if (place == 'g') 878 { 879 NEXTBYTE (buffer, disp); 880 if (disp == 0) 881 NEXTWORD (p, disp, -3); 882 else if (disp == -1) 883 NEXTLONG (p, disp, -3); 884 } 885 else if (place == 'c') 886 { 887 if (buffer[1] & 0x40) /* If bit six is one, long offset. */ 888 NEXTLONG (p, disp, -3); 889 else 890 NEXTWORD (p, disp, -3); 891 } 892 else 893 return -2; 894 895 (*info->print_address_func) (addr + disp, info); 896 break; 897 898 case 'd': 899 { 900 int val1; 901 902 NEXTWORD (p, val, -3); 903 FETCH_ARG (3, val1); 904 (*info->fprintf_func) (info->stream, "%s@(%d)", reg_names[val1 + 8], val); 905 break; 906 } 907 908 case 's': 909 FETCH_ARG (3, val); 910 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]); 911 break; 912 913 case 'e': 914 FETCH_ARG (2, val); 915 (*info->fprintf_func) (info->stream, "%%acc%d", val); 916 break; 917 918 case 'g': 919 FETCH_ARG (1, val); 920 (*info->fprintf_func) (info->stream, "%%accext%s", val == 0 ? "01" : "23"); 921 break; 922 923 case 'i': 924 FETCH_ARG (2, val); 925 if (val == 1) 926 (*info->fprintf_func) (info->stream, "<<"); 927 else if (val == 3) 928 (*info->fprintf_func) (info->stream, ">>"); 929 else 930 return -1; 931 break; 932 933 case 'I': 934 /* Get coprocessor ID... */ 935 val = fetch_arg (buffer, 'd', 3, info); 936 if (val < 0) 937 return -3; 938 if (val != 1) /* Unusual coprocessor ID? */ 939 (*info->fprintf_func) (info->stream, "(cpid=%d) ", val); 940 break; 941 942 case '4': 943 case '*': 944 case '~': 945 case '%': 946 case ';': 947 case '@': 948 case '!': 949 case '$': 950 case '?': 951 case '/': 952 case '&': 953 case '|': 954 case '<': 955 case '>': 956 case 'm': 957 case 'n': 958 case 'o': 959 case 'p': 960 case 'q': 961 case 'v': 962 case 'b': 963 case 'w': 964 case 'y': 965 case 'z': 966 if (place == 'd') 967 { 968 val = fetch_arg (buffer, 'x', 6, info); 969 if (val < 0) 970 return -3; 971 val = ((val & 7) << 3) + ((val >> 3) & 7); 972 } 973 else 974 { 975 val = fetch_arg (buffer, 's', 6, info); 976 if (val < 0) 977 return -3; 978 } 979 980 /* If the <ea> is invalid for *d, then reject this match. */ 981 if (!m68k_valid_ea (*d, val)) 982 return -1; 983 984 /* Get register number assuming address register. */ 985 regno = (val & 7) + 8; 986 regname = reg_names[regno]; 987 switch (val >> 3) 988 { 989 case 0: 990 (*info->fprintf_func) (info->stream, "%s", reg_names[val]); 991 break; 992 993 case 1: 994 (*info->fprintf_func) (info->stream, "%s", regname); 995 break; 996 997 case 2: 998 (*info->fprintf_func) (info->stream, "%s@", regname); 999 break; 1000 1001 case 3: 1002 (*info->fprintf_func) (info->stream, "%s@+", regname); 1003 break; 1004 1005 case 4: 1006 (*info->fprintf_func) (info->stream, "%s@-", regname); 1007 break; 1008 1009 case 5: 1010 NEXTWORD (p, val, -3); 1011 (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val); 1012 break; 1013 1014 case 6: 1015 p = print_indexed (regno, p, addr, info); 1016 if (p == NULL) 1017 return -3; 1018 break; 1019 1020 case 7: 1021 switch (val & 7) 1022 { 1023 case 0: 1024 NEXTWORD (p, val, -3); 1025 (*info->print_address_func) (val, info); 1026 break; 1027 1028 case 1: 1029 NEXTULONG (p, uval); 1030 (*info->print_address_func) (uval, info); 1031 break; 1032 1033 case 2: 1034 NEXTWORD (p, val, -3); 1035 (*info->fprintf_func) (info->stream, "%%pc@("); 1036 (*info->print_address_func) (addr + val, info); 1037 (*info->fprintf_func) (info->stream, ")"); 1038 break; 1039 1040 case 3: 1041 p = print_indexed (-1, p, addr, info); 1042 if (p == NULL) 1043 return -3; 1044 break; 1045 1046 case 4: 1047 flt_p = 1; /* Assume it's a float... */ 1048 switch (place) 1049 { 1050 case 'b': 1051 NEXTBYTE (p, val); 1052 flt_p = 0; 1053 break; 1054 1055 case 'w': 1056 NEXTWORD (p, val, -3); 1057 flt_p = 0; 1058 break; 1059 1060 case 'l': 1061 NEXTLONG (p, val, -3); 1062 flt_p = 0; 1063 break; 1064 1065 case 'f': 1066 NEXTSINGLE (flval, p); 1067 break; 1068 1069 case 'F': 1070 NEXTDOUBLE (flval, p); 1071 break; 1072 1073 case 'x': 1074 NEXTEXTEND (flval, p); 1075 break; 1076 1077 case 'p': 1078 NEXTPACKED (p, flval); 1079 break; 1080 1081 default: 1082 return -1; 1083 } 1084 if (flt_p) /* Print a float? */ 1085 (*info->fprintf_func) (info->stream, "#%g", flval); 1086 else 1087 (*info->fprintf_func) (info->stream, "#%d", val); 1088 break; 1089 1090 default: 1091 return -1; 1092 } 1093 } 1094 1095 /* If place is '/', then this is the case of the mask bit for 1096 mac/emac loads. Now that the arg has been printed, grab the 1097 mask bit and if set, add a '&' to the arg. */ 1098 if (place == '/') 1099 { 1100 FETCH_ARG (1, val); 1101 if (val) 1102 info->fprintf_func (info->stream, "&"); 1103 } 1104 break; 1105 1106 case 'L': 1107 case 'l': 1108 if (place == 'w') 1109 { 1110 char doneany; 1111 p1 = buffer + 2; 1112 NEXTWORD (p1, val, -3); 1113 /* Move the pointer ahead if this point is farther ahead 1114 than the last. */ 1115 p = p1 > p ? p1 : p; 1116 if (val == 0) 1117 { 1118 (*info->fprintf_func) (info->stream, "#0"); 1119 break; 1120 } 1121 if (*d == 'l') 1122 { 1123 int newval = 0; 1124 1125 for (regno = 0; regno < 16; ++regno) 1126 if (val & (0x8000 >> regno)) 1127 newval |= 1 << regno; 1128 val = newval; 1129 } 1130 val &= 0xffff; 1131 doneany = 0; 1132 for (regno = 0; regno < 16; ++regno) 1133 if (val & (1 << regno)) 1134 { 1135 int first_regno; 1136 1137 if (doneany) 1138 (*info->fprintf_func) (info->stream, "/"); 1139 doneany = 1; 1140 (*info->fprintf_func) (info->stream, "%s", reg_names[regno]); 1141 first_regno = regno; 1142 while (val & (1 << (regno + 1))) 1143 ++regno; 1144 if (regno > first_regno) 1145 (*info->fprintf_func) (info->stream, "-%s", 1146 reg_names[regno]); 1147 } 1148 } 1149 else if (place == '3') 1150 { 1151 /* `fmovem' insn. */ 1152 char doneany; 1153 1154 FETCH_ARG (8, val); 1155 if (val == 0) 1156 { 1157 (*info->fprintf_func) (info->stream, "#0"); 1158 break; 1159 } 1160 if (*d == 'l') 1161 { 1162 int newval = 0; 1163 1164 for (regno = 0; regno < 8; ++regno) 1165 if (val & (0x80 >> regno)) 1166 newval |= 1 << regno; 1167 val = newval; 1168 } 1169 val &= 0xff; 1170 doneany = 0; 1171 for (regno = 0; regno < 8; ++regno) 1172 if (val & (1 << regno)) 1173 { 1174 int first_regno; 1175 if (doneany) 1176 (*info->fprintf_func) (info->stream, "/"); 1177 doneany = 1; 1178 (*info->fprintf_func) (info->stream, "%%fp%d", regno); 1179 first_regno = regno; 1180 while (val & (1 << (regno + 1))) 1181 ++regno; 1182 if (regno > first_regno) 1183 (*info->fprintf_func) (info->stream, "-%%fp%d", regno); 1184 } 1185 } 1186 else if (place == '8') 1187 { 1188 FETCH_ARG (3, val); 1189 /* fmoveml for FP status registers. */ 1190 (*info->fprintf_func) (info->stream, "%s", fpcr_names[val]); 1191 } 1192 else 1193 return -2; 1194 break; 1195 1196 case 'X': 1197 place = '8'; 1198 case 'Y': 1199 case 'Z': 1200 case 'W': 1201 case '0': 1202 case '1': 1203 case '2': 1204 case '3': 1205 { 1206 int val; 1207 char *name = 0; 1208 1209 FETCH_ARG (5, val); 1210 switch (val) 1211 { 1212 case 2: name = "%tt0"; break; 1213 case 3: name = "%tt1"; break; 1214 case 0x10: name = "%tc"; break; 1215 case 0x11: name = "%drp"; break; 1216 case 0x12: name = "%srp"; break; 1217 case 0x13: name = "%crp"; break; 1218 case 0x14: name = "%cal"; break; 1219 case 0x15: name = "%val"; break; 1220 case 0x16: name = "%scc"; break; 1221 case 0x17: name = "%ac"; break; 1222 case 0x18: name = "%psr"; break; 1223 case 0x19: name = "%pcsr"; break; 1224 case 0x1c: 1225 case 0x1d: 1226 { 1227 int break_reg = ((buffer[3] >> 2) & 7); 1228 1229 (*info->fprintf_func) 1230 (info->stream, val == 0x1c ? "%%bad%d" : "%%bac%d", 1231 break_reg); 1232 } 1233 break; 1234 default: 1235 (*info->fprintf_func) (info->stream, "<mmu register %d>", val); 1236 } 1237 if (name) 1238 (*info->fprintf_func) (info->stream, "%s", name); 1239 } 1240 break; 1241 1242 case 'f': 1243 { 1244 int fc; 1245 1246 FETCH_ARG (5, fc); 1247 if (fc == 1) 1248 (*info->fprintf_func) (info->stream, "%%dfc"); 1249 else if (fc == 0) 1250 (*info->fprintf_func) (info->stream, "%%sfc"); 1251 else 1252 /* xgettext:c-format */ 1253 (*info->fprintf_func) (info->stream, _("<function code %d>"), fc); 1254 } 1255 break; 1256 1257 case 'V': 1258 (*info->fprintf_func) (info->stream, "%%val"); 1259 break; 1260 1261 case 't': 1262 { 1263 int level; 1264 1265 FETCH_ARG (3, level); 1266 (*info->fprintf_func) (info->stream, "%d", level); 1267 } 1268 break; 1269 1270 case 'u': 1271 { 1272 short is_upper = 0; 1273 int reg; 1274 1275 FETCH_ARG (5, reg); 1276 if (reg & 0x10) 1277 { 1278 is_upper = 1; 1279 reg &= 0xf; 1280 } 1281 (*info->fprintf_func) (info->stream, "%s%s", 1282 reg_half_names[reg], 1283 is_upper ? "u" : "l"); 1284 } 1285 break; 1286 1287 default: 1288 return -2; 1289 } 1290 1291 return p - p0; 1292 } 1293 1294 /* Try to match the current instruction to best and if so, return the 1295 number of bytes consumed from the instruction stream, else zero. */ 1296 1297 static int 1298 match_insn_m68k (bfd_vma memaddr, 1299 disassemble_info * info, 1300 const struct m68k_opcode * best) 1301 { 1302 unsigned char *save_p; 1303 unsigned char *p; 1304 const char *d; 1305 const char *args = best->args; 1306 1307 struct private *priv = (struct private *) info->private_data; 1308 bfd_byte *buffer = priv->the_buffer; 1309 fprintf_ftype save_printer = info->fprintf_func; 1310 void (* save_print_address) (bfd_vma, struct disassemble_info *) 1311 = info->print_address_func; 1312 1313 if (*args == '.') 1314 args++; 1315 1316 /* Point at first word of argument data, 1317 and at descriptor for first argument. */ 1318 p = buffer + 2; 1319 1320 /* Figure out how long the fixed-size portion of the instruction is. 1321 The only place this is stored in the opcode table is 1322 in the arguments--look for arguments which specify fields in the 2nd 1323 or 3rd words of the instruction. */ 1324 for (d = args; *d; d += 2) 1325 { 1326 /* I don't think it is necessary to be checking d[0] here; 1327 I suspect all this could be moved to the case statement below. */ 1328 if (d[0] == '#') 1329 { 1330 if (d[1] == 'l' && p - buffer < 6) 1331 p = buffer + 6; 1332 else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8') 1333 p = buffer + 4; 1334 } 1335 1336 if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4) 1337 p = buffer + 4; 1338 1339 switch (d[1]) 1340 { 1341 case '1': 1342 case '2': 1343 case '3': 1344 case '7': 1345 case '8': 1346 case '9': 1347 case 'i': 1348 if (p - buffer < 4) 1349 p = buffer + 4; 1350 break; 1351 case '4': 1352 case '5': 1353 case '6': 1354 if (p - buffer < 6) 1355 p = buffer + 6; 1356 break; 1357 default: 1358 break; 1359 } 1360 } 1361 1362 /* pflusha is an exceptions. It takes no arguments but is two words 1363 long. Recognize it by looking at the lower 16 bits of the mask. */ 1364 if (p - buffer < 4 && (best->match & 0xFFFF) != 0) 1365 p = buffer + 4; 1366 1367 /* lpstop is another exception. It takes a one word argument but is 1368 three words long. */ 1369 if (p - buffer < 6 1370 && (best->match & 0xffff) == 0xffff 1371 && args[0] == '#' 1372 && args[1] == 'w') 1373 { 1374 /* Copy the one word argument into the usual location for a one 1375 word argument, to simplify printing it. We can get away with 1376 this because we know exactly what the second word is, and we 1377 aren't going to print anything based on it. */ 1378 p = buffer + 6; 1379 FETCH_DATA (info, p); 1380 buffer[2] = buffer[4]; 1381 buffer[3] = buffer[5]; 1382 } 1383 1384 FETCH_DATA (info, p); 1385 1386 save_p = p; 1387 info->print_address_func = dummy_print_address; 1388 info->fprintf_func = (fprintf_ftype) dummy_printer; 1389 1390 /* We scan the operands twice. The first time we don't print anything, 1391 but look for errors. */ 1392 for (d = args; *d; d += 2) 1393 { 1394 int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1395 1396 if (eaten >= 0) 1397 p += eaten; 1398 else if (eaten == -1 || eaten == -3) 1399 { 1400 info->fprintf_func = save_printer; 1401 info->print_address_func = save_print_address; 1402 return 0; 1403 } 1404 else 1405 { 1406 /* We must restore the print functions before trying to print the 1407 error message. */ 1408 info->fprintf_func = save_printer; 1409 info->print_address_func = save_print_address; 1410 info->fprintf_func (info->stream, 1411 /* xgettext:c-format */ 1412 _("<internal error in opcode table: %s %s>\n"), 1413 best->name, best->args); 1414 return 2; 1415 } 1416 } 1417 1418 p = save_p; 1419 info->fprintf_func = save_printer; 1420 info->print_address_func = save_print_address; 1421 1422 d = args; 1423 1424 info->fprintf_func (info->stream, "%s", best->name); 1425 1426 if (*d) 1427 info->fprintf_func (info->stream, " "); 1428 1429 while (*d) 1430 { 1431 p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); 1432 d += 2; 1433 1434 if (*d && *(d - 2) != 'I' && *d != 'k') 1435 info->fprintf_func (info->stream, ","); 1436 } 1437 1438 return p - buffer; 1439 } 1440 1441 /* Try to interpret the instruction at address MEMADDR as one that 1442 can execute on a processor with the features given by ARCH_MASK. 1443 If successful, print the instruction to INFO->STREAM and return 1444 its length in bytes. Return 0 otherwise. */ 1445 1446 static int 1447 m68k_scan_mask (bfd_vma memaddr, disassemble_info *info, 1448 unsigned int arch_mask) 1449 { 1450 int i; 1451 const char *d; 1452 static const struct m68k_opcode **opcodes[16]; 1453 static int numopcodes[16]; 1454 int val; 1455 int major_opcode; 1456 1457 struct private *priv = (struct private *) info->private_data; 1458 bfd_byte *buffer = priv->the_buffer; 1459 1460 if (!opcodes[0]) 1461 { 1462 /* Speed up the matching by sorting the opcode 1463 table on the upper four bits of the opcode. */ 1464 const struct m68k_opcode **opc_pointer[16]; 1465 1466 /* First count how many opcodes are in each of the sixteen buckets. */ 1467 for (i = 0; i < m68k_numopcodes; i++) 1468 numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++; 1469 1470 /* Then create a sorted table of pointers 1471 that point into the unsorted table. */ 1472 opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *) 1473 * m68k_numopcodes); 1474 opcodes[0] = opc_pointer[0]; 1475 1476 for (i = 1; i < 16; i++) 1477 { 1478 opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1]; 1479 opcodes[i] = opc_pointer[i]; 1480 } 1481 1482 for (i = 0; i < m68k_numopcodes; i++) 1483 *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i]; 1484 } 1485 1486 FETCH_DATA (info, buffer + 2); 1487 major_opcode = (buffer[0] >> 4) & 15; 1488 1489 for (i = 0; i < numopcodes[major_opcode]; i++) 1490 { 1491 const struct m68k_opcode *opc = opcodes[major_opcode][i]; 1492 unsigned long opcode = opc->opcode; 1493 unsigned long match = opc->match; 1494 const char *args = opc->args; 1495 1496 if (*args == '.') 1497 args++; 1498 1499 if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24))) 1500 && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16))) 1501 /* Only fetch the next two bytes if we need to. */ 1502 && (((0xffff & match) == 0) 1503 || 1504 (FETCH_DATA (info, buffer + 4) 1505 && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8))) 1506 && ((0xff & buffer[3] & match) == (0xff & opcode))) 1507 ) 1508 && (opc->arch & arch_mask) != 0) 1509 { 1510 /* Don't use for printout the variants of divul and divsl 1511 that have the same register number in two places. 1512 The more general variants will match instead. */ 1513 for (d = args; *d; d += 2) 1514 if (d[1] == 'D') 1515 break; 1516 1517 /* Don't use for printout the variants of most floating 1518 point coprocessor instructions which use the same 1519 register number in two places, as above. */ 1520 if (*d == '\0') 1521 for (d = args; *d; d += 2) 1522 if (d[1] == 't') 1523 break; 1524 1525 /* Don't match fmovel with more than one register; 1526 wait for fmoveml. */ 1527 if (*d == '\0') 1528 { 1529 for (d = args; *d; d += 2) 1530 { 1531 if (d[0] == 's' && d[1] == '8') 1532 { 1533 val = fetch_arg (buffer, d[1], 3, info); 1534 if (val < 0) 1535 return 0; 1536 if ((val & (val - 1)) != 0) 1537 break; 1538 } 1539 } 1540 } 1541 1542 /* Don't match FPU insns with non-default coprocessor ID. */ 1543 if (*d == '\0') 1544 { 1545 for (d = args; *d; d += 2) 1546 { 1547 if (d[0] == 'I') 1548 { 1549 val = fetch_arg (buffer, 'd', 3, info); 1550 if (val != 1) 1551 break; 1552 } 1553 } 1554 } 1555 1556 if (*d == '\0') 1557 if ((val = match_insn_m68k (memaddr, info, opc))) 1558 return val; 1559 } 1560 } 1561 return 0; 1562 } 1563 1564 /* Print the m68k instruction at address MEMADDR in debugged memory, 1565 on INFO->STREAM. Returns length of the instruction, in bytes. */ 1566 1567 int 1568 print_insn_m68k (bfd_vma memaddr, disassemble_info *info) 1569 { 1570 unsigned int arch_mask; 1571 struct private priv; 1572 int val; 1573 1574 bfd_byte *buffer = priv.the_buffer; 1575 1576 info->private_data = & priv; 1577 /* Tell objdump to use two bytes per chunk 1578 and six bytes per line for displaying raw data. */ 1579 info->bytes_per_chunk = 2; 1580 info->bytes_per_line = 6; 1581 info->display_endian = BFD_ENDIAN_BIG; 1582 priv.max_fetched = priv.the_buffer; 1583 priv.insn_start = memaddr; 1584 1585 arch_mask = bfd_m68k_mach_to_features (info->mach); 1586 if (!arch_mask) 1587 { 1588 /* First try printing an m680x0 instruction. Try printing a Coldfire 1589 one if that fails. */ 1590 val = m68k_scan_mask (memaddr, info, m68k_mask); 1591 if (val == 0) 1592 val = m68k_scan_mask (memaddr, info, mcf_mask); 1593 } 1594 else 1595 { 1596 val = m68k_scan_mask (memaddr, info, arch_mask); 1597 } 1598 1599 if (val == 0) 1600 /* Handle undefined instructions. */ 1601 info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]); 1602 1603 return val ? val : 2; 1604 } 1605