xref: /netbsd-src/external/gpl3/binutils/dist/opcodes/ChangeLog (revision d90047b5d07facf36e6c01dcc0bded8997ce9cc2)
12020-02-01  Nick Clifton  <nickc@redhat.com>
2
3	Binutils 2.34 release.
4
52020-01-27  Tamar Christina  <tamar.christina@arm.com>
6
7	Backport from mainline.
8	2020-01-27  Tamar Christina  <tamar.christina@arm.com>
9
10	PR 25403
11	* aarch64-tbl.h (struct aarch64_opcode): Re-order cfinv.
12	* aarch64-asm-2.c: Regenerate
13	* aarch64-dis-2.c: Likewise.
14	* aarch64-opc-2.c: Likewise.
15
162020-01-21  Jan Beulich  <jbeulich@suse.com>
17
18	* i386-opc.tbl (vcvtneps2bf16x): Add Broadcast, Xmmword, and
19	Dword.
20	(vcvtneps2bf16y): Add Broadcast, Ymmword, and Dword.
21	* i386-tbl.h: Re-generate.
22
232020-01-20  Nick Clifton  <nickc@redhat.com>
24
25	* po/de.po: Updated German translation.
26	* po/pt_BR.po: Updated Brazilian Portuguese translation.
27	* po/uk.po: Updated Ukranian translation.
28
292020-01-18  Nick Clifton  <nickc@redhat.com>
30
31	* configure: Regenerate.
32	* po/opcodes.pot: Regenerate.
33
342020-01-18  Nick Clifton  <nickc@redhat.com>
35
36	Binutils 2.34 branch created.
37
382020-01-17  Christian Biesinger  <cbiesinger@google.com>
39
40	* opintl.h: Fix spelling error (seperate).
41
422020-01-17  H.J. Lu  <hongjiu.lu@intel.com>
43
44	* i386-opc.tbl: Add {vex} pseudo prefix.
45	* i386-tbl.h: Regenerated.
46
472020-01-16  Andre Vieira  <andre.simoesdiasvieira@arm.com>
48
49	PR 25376
50	* opcodes/arm-dis.c (coprocessor_opcodes): Use CORE_HIGH for MVE bits.
51	(neon_opcodes): Likewise.
52	(select_arm_features): Make sure we enable MVE bits when selecting
53	armv8.1-m.main.  Make sure we do not enable MVE bits when not selecting
54	any architecture.
55
562020-01-16  Jan Beulich  <jbeulich@suse.com>
57
58	* i386-opc.tbl: Drop stale comment from XOP section.
59
602020-01-16  Jan Beulich  <jbeulich@suse.com>
61
62	* i386-opc.tbl (movq): Add VexWIG to SSE2AVX XMM->XMM forms.
63	(extractps): Add VexWIG to SSE2AVX forms.
64	* i386-tbl.h: Re-generate.
65
662020-01-16  Jan Beulich  <jbeulich@suse.com>
67
68	* i386-opc.tbl (pextrq, pinsrq): Drop IgnoreSize and Qword. Drop
69	Size64 from and use VexW1 on SSE2AVX forms.
70	(vpextrq, vpinsrq): Drop IgnoreSize and Qword. Drop Size64 from
71	VEX-encoded forms. Add Cpu64 to EVEX-encoded forms. Use VexW1.
72	* i386-tbl.h: Re-generate.
73
742020-01-15  Alan Modra  <amodra@gmail.com>
75
76	* tic4x-dis.c (tic4x_version): Make unsigned long.
77	(optab, optab_special, registernames): New file scope vars.
78	(tic4x_print_register): Set up registernames rather than
79	malloc'd registertable.
80	(tic4x_disassemble): Delete optable and optable_special.  Use
81	optab and optab_special instead.  Throw away old optab,
82	optab_special and registernames when info->mach changes.
83
842020-01-14  Sergey Belyashov  <sergey.belyashov@gmail.com>
85
86	PR 25377
87	* z80-dis.c (suffix): Use .db instruction to generate double
88	prefix.
89
902020-01-14  Alan Modra  <amodra@gmail.com>
91
92	* z8k-dis.c (unpack_instr): Formatting.  Cast unsigned short
93	values to unsigned before shifting.
94
952020-01-13  Thomas Troeger  <tstroege@gmx.de>
96
97	* arm-dis.c (print_insn_arm): Fill in insn info fields for control
98	flow instructions.
99	(print_insn_thumb16, print_insn_thumb32): Likewise.
100	(print_insn): Initialize the insn info.
101	* i386-dis.c (print_insn): Initialize the insn info fields, and
102	detect jumps.
103
1042012-01-13  Claudiu Zissulescu <claziss@gmail.com>
105
106	* arc-opc.c (C_NE): Make it required.
107
1082012-01-13  Claudiu Zissulescu <claziss@gmail.com>
109
110        * opcode/arc-dis.c (regnames): Correct ACCL/ACCH naming, fix typo
111	reserved register name.
112
1132020-01-13  Alan Modra  <amodra@gmail.com>
114
115	* ns32k-dis.c (Is_gen): Use strchr, add 'f'.
116	(print_insn_ns32k): Adjust ioffset for 'f' index_offset.
117
1182020-01-13  Alan Modra  <amodra@gmail.com>
119
120	* wasm32-dis.c (print_insn_wasm32): Localise variables.  Store
121	result of wasm_read_leb128 in a uint64_t and check that bits
122	are not lost when copying to other locals.  Use uint32_t for
123	most locals.  Use PRId64 when printing int64_t.
124
1252020-01-13  Alan Modra  <amodra@gmail.com>
126
127	* score-dis.c: Formatting.
128	* score7-dis.c: Formatting.
129
1302020-01-13  Alan Modra  <amodra@gmail.com>
131
132	* score-dis.c (print_insn_score48): Use unsigned variables for
133	unsigned values.  Don't left shift negative values.
134	(print_insn_score32): Likewise.
135	* score7-dis.c (print_insn_score32, print_insn_score16): Likewise.
136
1372020-01-13  Alan Modra  <amodra@gmail.com>
138
139	* tic4x-dis.c (tic4x_print_register): Remove dead code.
140
1412020-01-13  Alan Modra  <amodra@gmail.com>
142
143	* fr30-ibld.c: Regenerate.
144
1452020-01-13  Alan Modra  <amodra@gmail.com>
146
147	* xgate-dis.c (print_insn): Don't left shift signed value.
148	(ripBits): Formatting, use 1u.
149
1502020-01-10  Alan Modra  <amodra@gmail.com>
151
152	* tilepro-opc.c (parse_insn_tilepro): Make opval unsigned.
153	* tilegx-opc.c (parse_insn_tilegx): Likewise.  Delete raw_opval.
154
1552020-01-10  Alan Modra  <amodra@gmail.com>
156
157	* m10300-dis.c (disassemble): Move extraction of DREG, AREG, RREG,
158	and XRREG value earlier to avoid a shift with negative exponent.
159	* m10200-dis.c (disassemble): Similarly.
160
1612020-01-09  Nick Clifton  <nickc@redhat.com>
162
163	PR 25224
164	* z80-dis.c (ld_ii_ii): Use correct cast.
165
1662020-01-03  Sergey Belyashov  <sergey.belyashov@gmail.com>
167
168	PR 25224
169	* z80-dis.c (ld_ii_ii): Use character constant when checking
170	opcode byte value.
171
1722020-01-09  Jan Beulich  <jbeulich@suse.com>
173
174	* i386-dis.c (SEP_Fixup): New.
175	(SEP): Define.
176	(dis386_twobyte): Use it for sysenter/sysexit.
177	(enum x86_64_isa): Change amd64 enumerator to value 1.
178	(OP_J): Compare isa64 against intel64 instead of amd64.
179	* i386-opc.tbl (sysenter, sysexit): Split into AMD64 and Intel64
180	forms.
181	* i386-tbl.h: Re-generate.
182
1832020-01-08  Alan Modra  <amodra@gmail.com>
184
185	* z8k-dis.c: Include libiberty.h
186	(instr_data_s): Make max_fetched unsigned.
187	(z8k_lookup_instr): Make nibl_index and tabl_index unsigned.
188	Don't exceed byte_info bounds.
189	(output_instr): Make num_bytes unsigned.
190	(unpack_instr): Likewise for nibl_count and loop.
191	* z8kgen.c (gas <opcode_entry_type>): Make noperands, length and
192	idx unsigned.
193	* z8k-opc.h: Regenerate.
194
1952020-01-07  Shahab Vahedi  <shahab@synopsys.com>
196
197	* arc-tbl.h (llock): Use 'LLOCK' as class.
198	(llockd): Likewise.
199	(scond): Use 'SCOND' as class.
200	(scondd): Likewise.
201	(llockd): Set data_size_mode to 'C_ZZ_D' which is 64-bit.
202	(scondd): Likewise.
203
2042020-01-06  Alan Modra  <amodra@gmail.com>
205
206	* m32c-ibld.c: Regenerate.
207
2082020-01-06  Alan Modra  <amodra@gmail.com>
209
210	PR 25344
211	* z80-dis.c (suffix): Don't use a local struct buffer copy.
212	Peek at next byte to prevent recursion on repeated prefix bytes.
213	Ensure uninitialised "mybuf" is not accessed.
214	(print_insn_z80): Don't zero n_fetch and n_used here,..
215	(print_insn_z80_buf): ..do it here instead.
216
2172020-01-04  Alan Modra  <amodra@gmail.com>
218
219	* m32r-ibld.c: Regenerate.
220
2212020-01-04  Alan Modra  <amodra@gmail.com>
222
223	* cr16-dis.c (cr16_match_opcode): Avoid shift left of signed value.
224
2252020-01-04  Alan Modra  <amodra@gmail.com>
226
227	* crx-dis.c (match_opcode): Avoid shift left of signed value.
228
2292020-01-04  Alan Modra  <amodra@gmail.com>
230
231	* d30v-dis.c (print_insn): Avoid signed overflow in left shift.
232
2332020-01-03  Jan Beulich  <jbeulich@suse.com>
234
235	* aarch64-tbl.h (aarch64_opcode_table): Use
236	SVE_ADDR_RX_LSL{1,2,3} for LD1RO{H,W,D}.
237
2382020-01-03  Jan Beulich  <jbeulich@suse.com>
239
240	* aarch64-tbl.h (aarch64_opcode_table): Correct SIMD
241	forms of SUDOT and USDOT.
242
2432020-01-03  Jan Beulich  <jbeulich@suse.com>
244
245	* aarch64-tbl.h (aarch64_opcode_table): Drop 'i' from
246	uzip{1,2}.
247	* opcodes/aarch64-dis-2.c: Re-generate.
248
2492020-01-03  Jan Beulich  <jbeulich@suse.com>
250
251	* aarch64-tbl.h (aarch64_opcode_table): Correct 64-bit
252	FMMLA encoding.
253	* opcodes/aarch64-dis-2.c: Re-generate.
254
2552020-01-02  Sergey Belyashov  <sergey.belyashov@gmail.com>
256
257	* z80-dis.c: Add support for eZ80 and Z80 instructions.
258
2592020-01-01  Alan Modra  <amodra@gmail.com>
260
261	Update year range in copyright notice of all files.
262
263For older changes see ChangeLog-2019
264
265Copyright (C) 2020 Free Software Foundation, Inc.
266
267Copying and distribution of this file, with or without modification,
268are permitted in any medium without royalty provided the copyright
269notice and this notice are preserved.
270
271Local Variables:
272mode: change-log
273left-margin: 8
274fill-column: 74
275version-control: never
276End:
277