1 /* bfin.h -- Header file for ADI Blackfin opcode table 2 Copyright 2005, 2010 Free Software Foundation, Inc. 3 4 This file is part of GDB, GAS, and the GNU binutils. 5 6 GDB, GAS, and the GNU binutils are free software; you can redistribute 7 them and/or modify them under the terms of the GNU General Public 8 License as published by the Free Software Foundation; either version 3, 9 or (at your option) any later version. 10 11 GDB, GAS, and the GNU binutils are distributed in the hope that they 12 will be useful, but WITHOUT ANY WARRANTY; without even the implied 13 warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See 14 the GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this file; see the file COPYING3. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 /* Common to all DSP32 instructions. */ 22 #define BIT_MULTI_INS 0x0800 23 24 /* This just sets the multi instruction bit of a DSP32 instruction. */ 25 #define SET_MULTI_INSTRUCTION_BIT(x) x->value |= BIT_MULTI_INS; 26 27 28 /* DSP instructions (32 bit) */ 29 30 /* dsp32mac 31 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 32 | 1 | 1 | 0 | 0 |.M.| 0 | 0 |.mmod..........|.MM|.P.|.w1|.op1...| 33 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| 34 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 35 */ 36 37 typedef struct 38 { 39 unsigned long opcode; 40 int bits_src1; 41 int mask_src1; 42 int bits_src0; 43 int mask_src0; 44 int bits_dst; 45 int mask_dst; 46 int bits_h10; 47 int mask_h10; 48 int bits_h00; 49 int mask_h00; 50 int bits_op0; 51 int mask_op0; 52 int bits_w0; 53 int mask_w0; 54 int bits_h11; 55 int mask_h11; 56 int bits_h01; 57 int mask_h01; 58 int bits_op1; 59 int mask_op1; 60 int bits_w1; 61 int mask_w1; 62 int bits_P; 63 int mask_P; 64 int bits_MM; 65 int mask_MM; 66 int bits_mmod; 67 int mask_mmod; 68 int bits_code2; 69 int mask_code2; 70 int bits_M; 71 int mask_M; 72 int bits_code; 73 int mask_code; 74 } DSP32Mac; 75 76 #define DSP32Mac_opcode 0xc0000000 77 #define DSP32Mac_src1_bits 0 78 #define DSP32Mac_src1_mask 0x7 79 #define DSP32Mac_src0_bits 3 80 #define DSP32Mac_src0_mask 0x7 81 #define DSP32Mac_dst_bits 6 82 #define DSP32Mac_dst_mask 0x7 83 #define DSP32Mac_h10_bits 9 84 #define DSP32Mac_h10_mask 0x1 85 #define DSP32Mac_h00_bits 10 86 #define DSP32Mac_h00_mask 0x1 87 #define DSP32Mac_op0_bits 11 88 #define DSP32Mac_op0_mask 0x3 89 #define DSP32Mac_w0_bits 13 90 #define DSP32Mac_w0_mask 0x1 91 #define DSP32Mac_h11_bits 14 92 #define DSP32Mac_h11_mask 0x1 93 #define DSP32Mac_h01_bits 15 94 #define DSP32Mac_h01_mask 0x1 95 #define DSP32Mac_op1_bits 16 96 #define DSP32Mac_op1_mask 0x3 97 #define DSP32Mac_w1_bits 18 98 #define DSP32Mac_w1_mask 0x1 99 #define DSP32Mac_p_bits 19 100 #define DSP32Mac_p_mask 0x1 101 #define DSP32Mac_MM_bits 20 102 #define DSP32Mac_MM_mask 0x1 103 #define DSP32Mac_mmod_bits 21 104 #define DSP32Mac_mmod_mask 0xf 105 #define DSP32Mac_code2_bits 25 106 #define DSP32Mac_code2_mask 0x3 107 #define DSP32Mac_M_bits 27 108 #define DSP32Mac_M_mask 0x1 109 #define DSP32Mac_code_bits 28 110 #define DSP32Mac_code_mask 0xf 111 112 #define init_DSP32Mac \ 113 { \ 114 DSP32Mac_opcode, \ 115 DSP32Mac_src1_bits, DSP32Mac_src1_mask, \ 116 DSP32Mac_src0_bits, DSP32Mac_src0_mask, \ 117 DSP32Mac_dst_bits, DSP32Mac_dst_mask, \ 118 DSP32Mac_h10_bits, DSP32Mac_h10_mask, \ 119 DSP32Mac_h00_bits, DSP32Mac_h00_mask, \ 120 DSP32Mac_op0_bits, DSP32Mac_op0_mask, \ 121 DSP32Mac_w0_bits, DSP32Mac_w0_mask, \ 122 DSP32Mac_h11_bits, DSP32Mac_h11_mask, \ 123 DSP32Mac_h01_bits, DSP32Mac_h01_mask, \ 124 DSP32Mac_op1_bits, DSP32Mac_op1_mask, \ 125 DSP32Mac_w1_bits, DSP32Mac_w1_mask, \ 126 DSP32Mac_p_bits, DSP32Mac_p_mask, \ 127 DSP32Mac_MM_bits, DSP32Mac_MM_mask, \ 128 DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \ 129 DSP32Mac_code2_bits, DSP32Mac_code2_mask, \ 130 DSP32Mac_M_bits, DSP32Mac_M_mask, \ 131 DSP32Mac_code_bits, DSP32Mac_code_mask \ 132 }; 133 134 /* dsp32mult 135 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 136 | 1 | 1 | 0 | 0 |.M.| 0 | 1 |.mmod..........|.MM|.P.|.w1|.op1...| 137 |.h01|.h11|.w0|.op0...|.h00|.h10|.dst.......|.src0......|.src1......| 138 +----+----+---+---|---+----+----+---|---+---+---+---|---+---+---+---+ 139 */ 140 141 typedef DSP32Mac DSP32Mult; 142 #define DSP32Mult_opcode 0xc2000000 143 144 #define init_DSP32Mult \ 145 { \ 146 DSP32Mult_opcode, \ 147 DSP32Mac_src1_bits, DSP32Mac_src1_mask, \ 148 DSP32Mac_src0_bits, DSP32Mac_src0_mask, \ 149 DSP32Mac_dst_bits, DSP32Mac_dst_mask, \ 150 DSP32Mac_h10_bits, DSP32Mac_h10_mask, \ 151 DSP32Mac_h00_bits, DSP32Mac_h00_mask, \ 152 DSP32Mac_op0_bits, DSP32Mac_op0_mask, \ 153 DSP32Mac_w0_bits, DSP32Mac_w0_mask, \ 154 DSP32Mac_h11_bits, DSP32Mac_h11_mask, \ 155 DSP32Mac_h01_bits, DSP32Mac_h01_mask, \ 156 DSP32Mac_op1_bits, DSP32Mac_op1_mask, \ 157 DSP32Mac_w1_bits, DSP32Mac_w1_mask, \ 158 DSP32Mac_p_bits, DSP32Mac_p_mask, \ 159 DSP32Mac_MM_bits, DSP32Mac_MM_mask, \ 160 DSP32Mac_mmod_bits, DSP32Mac_mmod_mask, \ 161 DSP32Mac_code2_bits, DSP32Mac_code2_mask, \ 162 DSP32Mac_M_bits, DSP32Mac_M_mask, \ 163 DSP32Mac_code_bits, DSP32Mac_code_mask \ 164 }; 165 166 /* dsp32alu 167 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 168 | 1 | 1 | 0 | 0 |.M.| 1 | 0 | - | - | - |.HL|.aopcde............| 169 |.aop...|.s.|.x.|.dst0......|.dst1......|.src0......|.src1......| 170 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 171 */ 172 173 typedef struct 174 { 175 unsigned long opcode; 176 int bits_src1; 177 int mask_src1; 178 int bits_src0; 179 int mask_src0; 180 int bits_dst1; 181 int mask_dst1; 182 int bits_dst0; 183 int mask_dst0; 184 int bits_x; 185 int mask_x; 186 int bits_s; 187 int mask_s; 188 int bits_aop; 189 int mask_aop; 190 int bits_aopcde; 191 int mask_aopcde; 192 int bits_HL; 193 int mask_HL; 194 int bits_dontcare; 195 int mask_dontcare; 196 int bits_code2; 197 int mask_code2; 198 int bits_M; 199 int mask_M; 200 int bits_code; 201 int mask_code; 202 } DSP32Alu; 203 204 #define DSP32Alu_opcode 0xc4000000 205 #define DSP32Alu_src1_bits 0 206 #define DSP32Alu_src1_mask 0x7 207 #define DSP32Alu_src0_bits 3 208 #define DSP32Alu_src0_mask 0x7 209 #define DSP32Alu_dst1_bits 6 210 #define DSP32Alu_dst1_mask 0x7 211 #define DSP32Alu_dst0_bits 9 212 #define DSP32Alu_dst0_mask 0x7 213 #define DSP32Alu_x_bits 12 214 #define DSP32Alu_x_mask 0x1 215 #define DSP32Alu_s_bits 13 216 #define DSP32Alu_s_mask 0x1 217 #define DSP32Alu_aop_bits 14 218 #define DSP32Alu_aop_mask 0x3 219 #define DSP32Alu_aopcde_bits 16 220 #define DSP32Alu_aopcde_mask 0x1f 221 #define DSP32Alu_HL_bits 21 222 #define DSP32Alu_HL_mask 0x1 223 #define DSP32Alu_dontcare_bits 22 224 #define DSP32Alu_dontcare_mask 0x7 225 #define DSP32Alu_code2_bits 25 226 #define DSP32Alu_code2_mask 0x3 227 #define DSP32Alu_M_bits 27 228 #define DSP32Alu_M_mask 0x1 229 #define DSP32Alu_code_bits 28 230 #define DSP32Alu_code_mask 0xf 231 232 #define init_DSP32Alu \ 233 { \ 234 DSP32Alu_opcode, \ 235 DSP32Alu_src1_bits, DSP32Alu_src1_mask, \ 236 DSP32Alu_src0_bits, DSP32Alu_src0_mask, \ 237 DSP32Alu_dst1_bits, DSP32Alu_dst1_mask, \ 238 DSP32Alu_dst0_bits, DSP32Alu_dst0_mask, \ 239 DSP32Alu_x_bits, DSP32Alu_x_mask, \ 240 DSP32Alu_s_bits, DSP32Alu_s_mask, \ 241 DSP32Alu_aop_bits, DSP32Alu_aop_mask, \ 242 DSP32Alu_aopcde_bits, DSP32Alu_aopcde_mask, \ 243 DSP32Alu_HL_bits, DSP32Alu_HL_mask, \ 244 DSP32Alu_dontcare_bits, DSP32Alu_dontcare_mask, \ 245 DSP32Alu_code2_bits, DSP32Alu_code2_mask, \ 246 DSP32Alu_M_bits, DSP32Alu_M_mask, \ 247 DSP32Alu_code_bits, DSP32Alu_code_mask \ 248 }; 249 250 /* dsp32shift 251 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 252 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 0 | - | - |.sopcde............| 253 |.sop...|.HLs...|.dst0......| - | - | - |.src0......|.src1......| 254 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 255 */ 256 257 typedef struct 258 { 259 unsigned long opcode; 260 int bits_src1; 261 int mask_src1; 262 int bits_src0; 263 int mask_src0; 264 int bits_dst1; 265 int mask_dst1; 266 int bits_dst0; 267 int mask_dst0; 268 int bits_HLs; 269 int mask_HLs; 270 int bits_sop; 271 int mask_sop; 272 int bits_sopcde; 273 int mask_sopcde; 274 int bits_dontcare; 275 int mask_dontcare; 276 int bits_code2; 277 int mask_code2; 278 int bits_M; 279 int mask_M; 280 int bits_code; 281 int mask_code; 282 } DSP32Shift; 283 284 #define DSP32Shift_opcode 0xc6000000 285 #define DSP32Shift_src1_bits 0 286 #define DSP32Shift_src1_mask 0x7 287 #define DSP32Shift_src0_bits 3 288 #define DSP32Shift_src0_mask 0x7 289 #define DSP32Shift_dst1_bits 6 290 #define DSP32Shift_dst1_mask 0x7 291 #define DSP32Shift_dst0_bits 9 292 #define DSP32Shift_dst0_mask 0x7 293 #define DSP32Shift_HLs_bits 12 294 #define DSP32Shift_HLs_mask 0x3 295 #define DSP32Shift_sop_bits 14 296 #define DSP32Shift_sop_mask 0x3 297 #define DSP32Shift_sopcde_bits 16 298 #define DSP32Shift_sopcde_mask 0x1f 299 #define DSP32Shift_dontcare_bits 21 300 #define DSP32Shift_dontcare_mask 0x3 301 #define DSP32Shift_code2_bits 23 302 #define DSP32Shift_code2_mask 0xf 303 #define DSP32Shift_M_bits 27 304 #define DSP32Shift_M_mask 0x1 305 #define DSP32Shift_code_bits 28 306 #define DSP32Shift_code_mask 0xf 307 308 #define init_DSP32Shift \ 309 { \ 310 DSP32Shift_opcode, \ 311 DSP32Shift_src1_bits, DSP32Shift_src1_mask, \ 312 DSP32Shift_src0_bits, DSP32Shift_src0_mask, \ 313 DSP32Shift_dst1_bits, DSP32Shift_dst1_mask, \ 314 DSP32Shift_dst0_bits, DSP32Shift_dst0_mask, \ 315 DSP32Shift_HLs_bits, DSP32Shift_HLs_mask, \ 316 DSP32Shift_sop_bits, DSP32Shift_sop_mask, \ 317 DSP32Shift_sopcde_bits, DSP32Shift_sopcde_mask, \ 318 DSP32Shift_dontcare_bits, DSP32Shift_dontcare_mask, \ 319 DSP32Shift_code2_bits, DSP32Shift_code2_mask, \ 320 DSP32Shift_M_bits, DSP32Shift_M_mask, \ 321 DSP32Shift_code_bits, DSP32Shift_code_mask \ 322 }; 323 324 /* dsp32shiftimm 325 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 326 | 1 | 1 | 0 | 0 |.M.| 1 | 1 | 0 | 1 | - | - |.sopcde............| 327 |.sop...|.HLs...|.dst0......|.immag.................|.src1......| 328 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 329 */ 330 331 typedef struct 332 { 333 unsigned long opcode; 334 int bits_src1; 335 int mask_src1; 336 int bits_immag; 337 int mask_immag; 338 int bits_dst0; 339 int mask_dst0; 340 int bits_HLs; 341 int mask_HLs; 342 int bits_sop; 343 int mask_sop; 344 int bits_sopcde; 345 int mask_sopcde; 346 int bits_dontcare; 347 int mask_dontcare; 348 int bits_code2; 349 int mask_code2; 350 int bits_M; 351 int mask_M; 352 int bits_code; 353 int mask_code; 354 } DSP32ShiftImm; 355 356 #define DSP32ShiftImm_opcode 0xc6800000 357 #define DSP32ShiftImm_src1_bits 0 358 #define DSP32ShiftImm_src1_mask 0x7 359 #define DSP32ShiftImm_immag_bits 3 360 #define DSP32ShiftImm_immag_mask 0x3f 361 #define DSP32ShiftImm_dst0_bits 9 362 #define DSP32ShiftImm_dst0_mask 0x7 363 #define DSP32ShiftImm_HLs_bits 12 364 #define DSP32ShiftImm_HLs_mask 0x3 365 #define DSP32ShiftImm_sop_bits 14 366 #define DSP32ShiftImm_sop_mask 0x3 367 #define DSP32ShiftImm_sopcde_bits 16 368 #define DSP32ShiftImm_sopcde_mask 0x1f 369 #define DSP32ShiftImm_dontcare_bits 21 370 #define DSP32ShiftImm_dontcare_mask 0x3 371 #define DSP32ShiftImm_code2_bits 23 372 #define DSP32ShiftImm_code2_mask 0xf 373 #define DSP32ShiftImm_M_bits 27 374 #define DSP32ShiftImm_M_mask 0x1 375 #define DSP32ShiftImm_code_bits 28 376 #define DSP32ShiftImm_code_mask 0xf 377 378 #define init_DSP32ShiftImm \ 379 { \ 380 DSP32ShiftImm_opcode, \ 381 DSP32ShiftImm_src1_bits, DSP32ShiftImm_src1_mask, \ 382 DSP32ShiftImm_immag_bits, DSP32ShiftImm_immag_mask, \ 383 DSP32ShiftImm_dst0_bits, DSP32ShiftImm_dst0_mask, \ 384 DSP32ShiftImm_HLs_bits, DSP32ShiftImm_HLs_mask, \ 385 DSP32ShiftImm_sop_bits, DSP32ShiftImm_sop_mask, \ 386 DSP32ShiftImm_sopcde_bits, DSP32ShiftImm_sopcde_mask, \ 387 DSP32ShiftImm_dontcare_bits, DSP32ShiftImm_dontcare_mask, \ 388 DSP32ShiftImm_code2_bits, DSP32ShiftImm_code2_mask, \ 389 DSP32ShiftImm_M_bits, DSP32ShiftImm_M_mask, \ 390 DSP32ShiftImm_code_bits, DSP32ShiftImm_code_mask \ 391 }; 392 393 /* LOAD / STORE */ 394 395 /* LDSTidxI 396 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 397 | 1 | 1 | 1 | 0 | 0 | 1 |.W.|.Z.|.sz....|.ptr.......|.reg.......| 398 |.offset........................................................| 399 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 400 */ 401 402 typedef struct 403 { 404 unsigned long opcode; 405 int bits_offset; 406 int mask_offset; 407 int bits_reg; 408 int mask_reg; 409 int bits_ptr; 410 int mask_ptr; 411 int bits_sz; 412 int mask_sz; 413 int bits_Z; 414 int mask_Z; 415 int bits_W; 416 int mask_W; 417 int bits_code; 418 int mask_code; 419 } LDSTidxI; 420 421 #define LDSTidxI_opcode 0xe4000000 422 #define LDSTidxI_offset_bits 0 423 #define LDSTidxI_offset_mask 0xffff 424 #define LDSTidxI_reg_bits 16 425 #define LDSTidxI_reg_mask 0x7 426 #define LDSTidxI_ptr_bits 19 427 #define LDSTidxI_ptr_mask 0x7 428 #define LDSTidxI_sz_bits 22 429 #define LDSTidxI_sz_mask 0x3 430 #define LDSTidxI_Z_bits 24 431 #define LDSTidxI_Z_mask 0x1 432 #define LDSTidxI_W_bits 25 433 #define LDSTidxI_W_mask 0x1 434 #define LDSTidxI_code_bits 26 435 #define LDSTidxI_code_mask 0x3f 436 437 #define init_LDSTidxI \ 438 { \ 439 LDSTidxI_opcode, \ 440 LDSTidxI_offset_bits, LDSTidxI_offset_mask, \ 441 LDSTidxI_reg_bits, LDSTidxI_reg_mask, \ 442 LDSTidxI_ptr_bits, LDSTidxI_ptr_mask, \ 443 LDSTidxI_sz_bits, LDSTidxI_sz_mask, \ 444 LDSTidxI_Z_bits, LDSTidxI_Z_mask, \ 445 LDSTidxI_W_bits, LDSTidxI_W_mask, \ 446 LDSTidxI_code_bits, LDSTidxI_code_mask \ 447 }; 448 449 450 /* LDST 451 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 452 | 1 | 0 | 0 | 1 |.sz....|.W.|.aop...|.Z.|.ptr.......|.reg.......| 453 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 454 */ 455 456 typedef struct 457 { 458 unsigned short opcode; 459 int bits_reg; 460 int mask_reg; 461 int bits_ptr; 462 int mask_ptr; 463 int bits_Z; 464 int mask_Z; 465 int bits_aop; 466 int mask_aop; 467 int bits_W; 468 int mask_W; 469 int bits_sz; 470 int mask_sz; 471 int bits_code; 472 int mask_code; 473 } LDST; 474 475 #define LDST_opcode 0x9000 476 #define LDST_reg_bits 0 477 #define LDST_reg_mask 0x7 478 #define LDST_ptr_bits 3 479 #define LDST_ptr_mask 0x7 480 #define LDST_Z_bits 6 481 #define LDST_Z_mask 0x1 482 #define LDST_aop_bits 7 483 #define LDST_aop_mask 0x3 484 #define LDST_W_bits 9 485 #define LDST_W_mask 0x1 486 #define LDST_sz_bits 10 487 #define LDST_sz_mask 0x3 488 #define LDST_code_bits 12 489 #define LDST_code_mask 0xf 490 491 #define init_LDST \ 492 { \ 493 LDST_opcode, \ 494 LDST_reg_bits, LDST_reg_mask, \ 495 LDST_ptr_bits, LDST_ptr_mask, \ 496 LDST_Z_bits, LDST_Z_mask, \ 497 LDST_aop_bits, LDST_aop_mask, \ 498 LDST_W_bits, LDST_W_mask, \ 499 LDST_sz_bits, LDST_sz_mask, \ 500 LDST_code_bits, LDST_code_mask \ 501 }; 502 503 /* LDSTii 504 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 505 | 1 | 0 | 1 |.W.|.op....|.offset........|.ptr.......|.reg.......| 506 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 507 */ 508 509 typedef struct 510 { 511 unsigned short opcode; 512 int bits_reg; 513 int mask_reg; 514 int bits_ptr; 515 int mask_ptr; 516 int bits_offset; 517 int mask_offset; 518 int bits_op; 519 int mask_op; 520 int bits_W; 521 int mask_W; 522 int bits_code; 523 int mask_code; 524 } LDSTii; 525 526 #define LDSTii_opcode 0xa000 527 #define LDSTii_reg_bit 0 528 #define LDSTii_reg_mask 0x7 529 #define LDSTii_ptr_bit 3 530 #define LDSTii_ptr_mask 0x7 531 #define LDSTii_offset_bit 6 532 #define LDSTii_offset_mask 0xf 533 #define LDSTii_op_bit 10 534 #define LDSTii_op_mask 0x3 535 #define LDSTii_W_bit 12 536 #define LDSTii_W_mask 0x1 537 #define LDSTii_code_bit 13 538 #define LDSTii_code_mask 0x7 539 540 #define init_LDSTii \ 541 { \ 542 LDSTii_opcode, \ 543 LDSTii_reg_bit, LDSTii_reg_mask, \ 544 LDSTii_ptr_bit, LDSTii_ptr_mask, \ 545 LDSTii_offset_bit, LDSTii_offset_mask, \ 546 LDSTii_op_bit, LDSTii_op_mask, \ 547 LDSTii_W_bit, LDSTii_W_mask, \ 548 LDSTii_code_bit, LDSTii_code_mask \ 549 }; 550 551 552 /* LDSTiiFP 553 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 554 | 1 | 0 | 1 | 1 | 1 | 0 |.W.|.offset............|.reg...........| 555 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 556 */ 557 558 typedef struct 559 { 560 unsigned short opcode; 561 int bits_reg; 562 int mask_reg; 563 int bits_offset; 564 int mask_offset; 565 int bits_W; 566 int mask_W; 567 int bits_code; 568 int mask_code; 569 } LDSTiiFP; 570 571 #define LDSTiiFP_opcode 0xb800 572 #define LDSTiiFP_reg_bits 0 573 #define LDSTiiFP_reg_mask 0xf 574 #define LDSTiiFP_offset_bits 4 575 #define LDSTiiFP_offset_mask 0x1f 576 #define LDSTiiFP_W_bits 9 577 #define LDSTiiFP_W_mask 0x1 578 #define LDSTiiFP_code_bits 10 579 #define LDSTiiFP_code_mask 0x3f 580 581 #define init_LDSTiiFP \ 582 { \ 583 LDSTiiFP_opcode, \ 584 LDSTiiFP_reg_bits, LDSTiiFP_reg_mask, \ 585 LDSTiiFP_offset_bits, LDSTiiFP_offset_mask, \ 586 LDSTiiFP_W_bits, LDSTiiFP_W_mask, \ 587 LDSTiiFP_code_bits, LDSTiiFP_code_mask \ 588 }; 589 590 /* dspLDST 591 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 592 | 1 | 0 | 0 | 1 | 1 | 1 |.W.|.aop...|.m.....|.i.....|.reg.......| 593 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 594 */ 595 596 typedef struct 597 { 598 unsigned short opcode; 599 int bits_reg; 600 int mask_reg; 601 int bits_i; 602 int mask_i; 603 int bits_m; 604 int mask_m; 605 int bits_aop; 606 int mask_aop; 607 int bits_W; 608 int mask_W; 609 int bits_code; 610 int mask_code; 611 } DspLDST; 612 613 #define DspLDST_opcode 0x9c00 614 #define DspLDST_reg_bits 0 615 #define DspLDST_reg_mask 0x7 616 #define DspLDST_i_bits 3 617 #define DspLDST_i_mask 0x3 618 #define DspLDST_m_bits 5 619 #define DspLDST_m_mask 0x3 620 #define DspLDST_aop_bits 7 621 #define DspLDST_aop_mask 0x3 622 #define DspLDST_W_bits 9 623 #define DspLDST_W_mask 0x1 624 #define DspLDST_code_bits 10 625 #define DspLDST_code_mask 0x3f 626 627 #define init_DspLDST \ 628 { \ 629 DspLDST_opcode, \ 630 DspLDST_reg_bits, DspLDST_reg_mask, \ 631 DspLDST_i_bits, DspLDST_i_mask, \ 632 DspLDST_m_bits, DspLDST_m_mask, \ 633 DspLDST_aop_bits, DspLDST_aop_mask, \ 634 DspLDST_W_bits, DspLDST_W_mask, \ 635 DspLDST_code_bits, DspLDST_code_mask \ 636 }; 637 638 639 /* LDSTpmod 640 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 641 | 1 | 0 | 0 | 0 |.W.|.aop...|.reg.......|.idx.......|.ptr.......| 642 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 643 */ 644 645 typedef struct 646 { 647 unsigned short opcode; 648 int bits_ptr; 649 int mask_ptr; 650 int bits_idx; 651 int mask_idx; 652 int bits_reg; 653 int mask_reg; 654 int bits_aop; 655 int mask_aop; 656 int bits_W; 657 int mask_W; 658 int bits_code; 659 int mask_code; 660 } LDSTpmod; 661 662 #define LDSTpmod_opcode 0x8000 663 #define LDSTpmod_ptr_bits 0 664 #define LDSTpmod_ptr_mask 0x7 665 #define LDSTpmod_idx_bits 3 666 #define LDSTpmod_idx_mask 0x7 667 #define LDSTpmod_reg_bits 6 668 #define LDSTpmod_reg_mask 0x7 669 #define LDSTpmod_aop_bits 9 670 #define LDSTpmod_aop_mask 0x3 671 #define LDSTpmod_W_bits 11 672 #define LDSTpmod_W_mask 0x1 673 #define LDSTpmod_code_bits 12 674 #define LDSTpmod_code_mask 0xf 675 676 #define init_LDSTpmod \ 677 { \ 678 LDSTpmod_opcode, \ 679 LDSTpmod_ptr_bits, LDSTpmod_ptr_mask, \ 680 LDSTpmod_idx_bits, LDSTpmod_idx_mask, \ 681 LDSTpmod_reg_bits, LDSTpmod_reg_mask, \ 682 LDSTpmod_aop_bits, LDSTpmod_aop_mask, \ 683 LDSTpmod_W_bits, LDSTpmod_W_mask, \ 684 LDSTpmod_code_bits, LDSTpmod_code_mask \ 685 }; 686 687 688 /* LOGI2op 689 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 690 | 0 | 1 | 0 | 0 | 1 |.opc.......|.src...............|.dst.......| 691 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 692 */ 693 694 typedef struct 695 { 696 unsigned short opcode; 697 int bits_dst; 698 int mask_dst; 699 int bits_src; 700 int mask_src; 701 int bits_opc; 702 int mask_opc; 703 int bits_code; 704 int mask_code; 705 } LOGI2op; 706 707 #define LOGI2op_opcode 0x4800 708 #define LOGI2op_dst_bits 0 709 #define LOGI2op_dst_mask 0x7 710 #define LOGI2op_src_bits 3 711 #define LOGI2op_src_mask 0x1f 712 #define LOGI2op_opc_bits 8 713 #define LOGI2op_opc_mask 0x7 714 #define LOGI2op_code_bits 11 715 #define LOGI2op_code_mask 0x1f 716 717 #define init_LOGI2op \ 718 { \ 719 LOGI2op_opcode, \ 720 LOGI2op_dst_bits, LOGI2op_dst_mask, \ 721 LOGI2op_src_bits, LOGI2op_src_mask, \ 722 LOGI2op_opc_bits, LOGI2op_opc_mask, \ 723 LOGI2op_code_bits, LOGI2op_code_mask \ 724 }; 725 726 727 /* ALU2op 728 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 729 | 0 | 1 | 0 | 0 | 0 | 0 |.opc...........|.src.......|.dst.......| 730 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 731 */ 732 733 typedef struct 734 { 735 unsigned short opcode; 736 int bits_dst; 737 int mask_dst; 738 int bits_src; 739 int mask_src; 740 int bits_opc; 741 int mask_opc; 742 int bits_code; 743 int mask_code; 744 } ALU2op; 745 746 #define ALU2op_opcode 0x4000 747 #define ALU2op_dst_bits 0 748 #define ALU2op_dst_mask 0x7 749 #define ALU2op_src_bits 3 750 #define ALU2op_src_mask 0x7 751 #define ALU2op_opc_bits 6 752 #define ALU2op_opc_mask 0xf 753 #define ALU2op_code_bits 10 754 #define ALU2op_code_mask 0x3f 755 756 #define init_ALU2op \ 757 { \ 758 ALU2op_opcode, \ 759 ALU2op_dst_bits, ALU2op_dst_mask, \ 760 ALU2op_src_bits, ALU2op_src_mask, \ 761 ALU2op_opc_bits, ALU2op_opc_mask, \ 762 ALU2op_code_bits, ALU2op_code_mask \ 763 }; 764 765 766 /* BRCC 767 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 768 | 0 | 0 | 0 | 1 |.T.|.B.|.offset................................| 769 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 770 */ 771 772 typedef struct 773 { 774 unsigned short opcode; 775 int bits_offset; 776 int mask_offset; 777 int bits_B; 778 int mask_B; 779 int bits_T; 780 int mask_T; 781 int bits_code; 782 int mask_code; 783 } BRCC; 784 785 #define BRCC_opcode 0x1000 786 #define BRCC_offset_bits 0 787 #define BRCC_offset_mask 0x3ff 788 #define BRCC_B_bits 10 789 #define BRCC_B_mask 0x1 790 #define BRCC_T_bits 11 791 #define BRCC_T_mask 0x1 792 #define BRCC_code_bits 12 793 #define BRCC_code_mask 0xf 794 795 #define init_BRCC \ 796 { \ 797 BRCC_opcode, \ 798 BRCC_offset_bits, BRCC_offset_mask, \ 799 BRCC_B_bits, BRCC_B_mask, \ 800 BRCC_T_bits, BRCC_T_mask, \ 801 BRCC_code_bits, BRCC_code_mask \ 802 }; 803 804 805 /* UJUMP 806 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 807 | 0 | 0 | 1 | 0 |.offset........................................| 808 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 809 */ 810 811 typedef struct 812 { 813 unsigned short opcode; 814 int bits_offset; 815 int mask_offset; 816 int bits_code; 817 int mask_code; 818 } UJump; 819 820 #define UJump_opcode 0x2000 821 #define UJump_offset_bits 0 822 #define UJump_offset_mask 0xfff 823 #define UJump_code_bits 12 824 #define UJump_code_mask 0xf 825 826 #define init_UJump \ 827 { \ 828 UJump_opcode, \ 829 UJump_offset_bits, UJump_offset_mask, \ 830 UJump_code_bits, UJump_code_mask \ 831 }; 832 833 834 /* ProgCtrl 835 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 836 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.prgfunc.......|.poprnd........| 837 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 838 */ 839 840 typedef struct 841 { 842 unsigned short opcode; 843 int bits_poprnd; 844 int mask_poprnd; 845 int bits_prgfunc; 846 int mask_prgfunc; 847 int bits_code; 848 int mask_code; 849 } ProgCtrl; 850 851 #define ProgCtrl_opcode 0x0000 852 #define ProgCtrl_poprnd_bits 0 853 #define ProgCtrl_poprnd_mask 0xf 854 #define ProgCtrl_prgfunc_bits 4 855 #define ProgCtrl_prgfunc_mask 0xf 856 #define ProgCtrl_code_bits 8 857 #define ProgCtrl_code_mask 0xff 858 859 #define init_ProgCtrl \ 860 { \ 861 ProgCtrl_opcode, \ 862 ProgCtrl_poprnd_bits, ProgCtrl_poprnd_mask, \ 863 ProgCtrl_prgfunc_bits, ProgCtrl_prgfunc_mask, \ 864 ProgCtrl_code_bits, ProgCtrl_code_mask \ 865 }; 866 867 /* CALLa 868 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 869 | 1 | 1 | 1 | 0 | 0 | 0 | 1 |.S.|.msw...........................| 870 |.lsw...........................................................| 871 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 872 */ 873 874 875 typedef struct 876 { 877 unsigned long opcode; 878 int bits_addr; 879 int mask_addr; 880 int bits_S; 881 int mask_S; 882 int bits_code; 883 int mask_code; 884 } CALLa; 885 886 #define CALLa_opcode 0xe2000000 887 #define CALLa_addr_bits 0 888 #define CALLa_addr_mask 0xffffff 889 #define CALLa_S_bits 24 890 #define CALLa_S_mask 0x1 891 #define CALLa_code_bits 25 892 #define CALLa_code_mask 0x7f 893 894 #define init_CALLa \ 895 { \ 896 CALLa_opcode, \ 897 CALLa_addr_bits, CALLa_addr_mask, \ 898 CALLa_S_bits, CALLa_S_mask, \ 899 CALLa_code_bits, CALLa_code_mask \ 900 }; 901 902 903 /* pseudoDEBUG 904 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 905 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 0 |.fn....|.grp.......|.reg.......| 906 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 907 */ 908 909 typedef struct 910 { 911 unsigned short opcode; 912 int bits_reg; 913 int mask_reg; 914 int bits_grp; 915 int mask_grp; 916 int bits_fn; 917 int mask_fn; 918 int bits_code; 919 int mask_code; 920 } PseudoDbg; 921 922 #define PseudoDbg_opcode 0xf800 923 #define PseudoDbg_reg_bits 0 924 #define PseudoDbg_reg_mask 0x7 925 #define PseudoDbg_grp_bits 3 926 #define PseudoDbg_grp_mask 0x7 927 #define PseudoDbg_fn_bits 6 928 #define PseudoDbg_fn_mask 0x3 929 #define PseudoDbg_code_bits 8 930 #define PseudoDbg_code_mask 0xff 931 932 #define init_PseudoDbg \ 933 { \ 934 PseudoDbg_opcode, \ 935 PseudoDbg_reg_bits, PseudoDbg_reg_mask, \ 936 PseudoDbg_grp_bits, PseudoDbg_grp_mask, \ 937 PseudoDbg_fn_bits, PseudoDbg_fn_mask, \ 938 PseudoDbg_code_bits, PseudoDbg_code_mask \ 939 }; 940 941 /* PseudoDbg_assert 942 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 943 | 1 | 1 | 1 | 1 | 0 | - | - | - | dbgop |.grp.......|.regtest...| 944 |.expected......................................................| 945 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 946 */ 947 948 typedef struct 949 { 950 unsigned long opcode; 951 int bits_expected; 952 int mask_expected; 953 int bits_regtest; 954 int mask_regtest; 955 int bits_grp; 956 int mask_grp; 957 int bits_dbgop; 958 int mask_dbgop; 959 int bits_dontcare; 960 int mask_dontcare; 961 int bits_code; 962 int mask_code; 963 } PseudoDbg_Assert; 964 965 #define PseudoDbg_Assert_opcode 0xf0000000 966 #define PseudoDbg_Assert_expected_bits 0 967 #define PseudoDbg_Assert_expected_mask 0xffff 968 #define PseudoDbg_Assert_regtest_bits 16 969 #define PseudoDbg_Assert_regtest_mask 0x7 970 #define PseudoDbg_Assert_grp_bits 19 971 #define PseudoDbg_Assert_grp_mask 0x7 972 #define PseudoDbg_Assert_dbgop_bits 22 973 #define PseudoDbg_Assert_dbgop_mask 0x3 974 #define PseudoDbg_Assert_dontcare_bits 24 975 #define PseudoDbg_Assert_dontcare_mask 0x7 976 #define PseudoDbg_Assert_code_bits 27 977 #define PseudoDbg_Assert_code_mask 0x1f 978 979 #define init_PseudoDbg_Assert \ 980 { \ 981 PseudoDbg_Assert_opcode, \ 982 PseudoDbg_Assert_expected_bits, PseudoDbg_Assert_expected_mask, \ 983 PseudoDbg_Assert_regtest_bits, PseudoDbg_Assert_regtest_mask, \ 984 PseudoDbg_Assert_grp_bits, PseudoDbg_Assert_grp_mask, \ 985 PseudoDbg_Assert_dbgop_bits, PseudoDbg_Assert_dbgop_mask, \ 986 PseudoDbg_Assert_dontcare_bits, PseudoDbg_Assert_dontcare_mask, \ 987 PseudoDbg_Assert_code_bits, PseudoDbg_Assert_code_mask \ 988 }; 989 990 /* pseudoChr 991 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 992 | 1 | 1 | 1 | 1 | 1 | 0 | 0 | 1 |.ch............................| 993 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 994 */ 995 996 typedef struct 997 { 998 unsigned short opcode; 999 int bits_ch; 1000 int mask_ch; 1001 int bits_code; 1002 int mask_code; 1003 } PseudoChr; 1004 1005 #define PseudoChr_opcode 0xf900 1006 #define PseudoChr_ch_bits 0 1007 #define PseudoChr_ch_mask 0xff 1008 #define PseudoChr_code_bits 8 1009 #define PseudoChr_code_mask 0xff 1010 1011 #define init_PseudoChr \ 1012 { \ 1013 PseudoChr_opcode, \ 1014 PseudoChr_ch_bits, PseudoChr_ch_mask, \ 1015 PseudoChr_code_bits, PseudoChr_code_mask \ 1016 }; 1017 1018 /* CaCTRL 1019 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1020 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1 |.a.|.op....|.reg.......| 1021 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1022 */ 1023 1024 typedef struct 1025 { 1026 unsigned short opcode; 1027 int bits_reg; 1028 int mask_reg; 1029 int bits_op; 1030 int mask_op; 1031 int bits_a; 1032 int mask_a; 1033 int bits_code; 1034 int mask_code; 1035 } CaCTRL; 1036 1037 #define CaCTRL_opcode 0x0240 1038 #define CaCTRL_reg_bits 0 1039 #define CaCTRL_reg_mask 0x7 1040 #define CaCTRL_op_bits 3 1041 #define CaCTRL_op_mask 0x3 1042 #define CaCTRL_a_bits 5 1043 #define CaCTRL_a_mask 0x1 1044 #define CaCTRL_code_bits 6 1045 #define CaCTRL_code_mask 0x3fff 1046 1047 #define init_CaCTRL \ 1048 { \ 1049 CaCTRL_opcode, \ 1050 CaCTRL_reg_bits, CaCTRL_reg_mask, \ 1051 CaCTRL_op_bits, CaCTRL_op_mask, \ 1052 CaCTRL_a_bits, CaCTRL_a_mask, \ 1053 CaCTRL_code_bits, CaCTRL_code_mask \ 1054 }; 1055 1056 /* PushPopMultiple 1057 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1058 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.d.|.p.|.W.|.dr........|.pr........| 1059 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1060 */ 1061 1062 typedef struct 1063 { 1064 unsigned short opcode; 1065 int bits_pr; 1066 int mask_pr; 1067 int bits_dr; 1068 int mask_dr; 1069 int bits_W; 1070 int mask_W; 1071 int bits_p; 1072 int mask_p; 1073 int bits_d; 1074 int mask_d; 1075 int bits_code; 1076 int mask_code; 1077 } PushPopMultiple; 1078 1079 #define PushPopMultiple_opcode 0x0400 1080 #define PushPopMultiple_pr_bits 0 1081 #define PushPopMultiple_pr_mask 0x7 1082 #define PushPopMultiple_dr_bits 3 1083 #define PushPopMultiple_dr_mask 0x7 1084 #define PushPopMultiple_W_bits 6 1085 #define PushPopMultiple_W_mask 0x1 1086 #define PushPopMultiple_p_bits 7 1087 #define PushPopMultiple_p_mask 0x1 1088 #define PushPopMultiple_d_bits 8 1089 #define PushPopMultiple_d_mask 0x1 1090 #define PushPopMultiple_code_bits 8 1091 #define PushPopMultiple_code_mask 0x1 1092 1093 #define init_PushPopMultiple \ 1094 { \ 1095 PushPopMultiple_opcode, \ 1096 PushPopMultiple_pr_bits, PushPopMultiple_pr_mask, \ 1097 PushPopMultiple_dr_bits, PushPopMultiple_dr_mask, \ 1098 PushPopMultiple_W_bits, PushPopMultiple_W_mask, \ 1099 PushPopMultiple_p_bits, PushPopMultiple_p_mask, \ 1100 PushPopMultiple_d_bits, PushPopMultiple_d_mask, \ 1101 PushPopMultiple_code_bits, PushPopMultiple_code_mask \ 1102 }; 1103 1104 /* PushPopReg 1105 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1106 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 |.W.|.grp.......|.reg.......| 1107 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1108 */ 1109 1110 typedef struct 1111 { 1112 unsigned short opcode; 1113 int bits_reg; 1114 int mask_reg; 1115 int bits_grp; 1116 int mask_grp; 1117 int bits_W; 1118 int mask_W; 1119 int bits_code; 1120 int mask_code; 1121 } PushPopReg; 1122 1123 #define PushPopReg_opcode 0x0100 1124 #define PushPopReg_reg_bits 0 1125 #define PushPopReg_reg_mask 0x7 1126 #define PushPopReg_grp_bits 3 1127 #define PushPopReg_grp_mask 0x7 1128 #define PushPopReg_W_bits 6 1129 #define PushPopReg_W_mask 0x1 1130 #define PushPopReg_code_bits 7 1131 #define PushPopReg_code_mask 0x1ff 1132 1133 #define init_PushPopReg \ 1134 { \ 1135 PushPopReg_opcode, \ 1136 PushPopReg_reg_bits, PushPopReg_reg_mask, \ 1137 PushPopReg_grp_bits, PushPopReg_grp_mask, \ 1138 PushPopReg_W_bits, PushPopReg_W_mask, \ 1139 PushPopReg_code_bits, PushPopReg_code_mask, \ 1140 }; 1141 1142 /* linkage 1143 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1144 | 1 | 1 | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |.R.| 1145 |.framesize.....................................................| 1146 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1147 */ 1148 1149 typedef struct 1150 { 1151 unsigned long opcode; 1152 int bits_framesize; 1153 int mask_framesize; 1154 int bits_R; 1155 int mask_R; 1156 int bits_code; 1157 int mask_code; 1158 } Linkage; 1159 1160 #define Linkage_opcode 0xe8000000 1161 #define Linkage_framesize_bits 0 1162 #define Linkage_framesize_mask 0xffff 1163 #define Linkage_R_bits 16 1164 #define Linkage_R_mask 0x1 1165 #define Linkage_code_bits 17 1166 #define Linkage_code_mask 0x7fff 1167 1168 #define init_Linkage \ 1169 { \ 1170 Linkage_opcode, \ 1171 Linkage_framesize_bits, Linkage_framesize_mask, \ 1172 Linkage_R_bits, Linkage_R_mask, \ 1173 Linkage_code_bits, Linkage_code_mask \ 1174 }; 1175 1176 /* LoopSetup 1177 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1178 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 1 |.rop...|.c.|.soffset.......| 1179 |.reg...........| - | - |.eoffset...............................| 1180 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1181 */ 1182 1183 typedef struct 1184 { 1185 unsigned long opcode; 1186 int bits_eoffset; 1187 int mask_eoffset; 1188 int bits_dontcare; 1189 int mask_dontcare; 1190 int bits_reg; 1191 int mask_reg; 1192 int bits_soffset; 1193 int mask_soffset; 1194 int bits_c; 1195 int mask_c; 1196 int bits_rop; 1197 int mask_rop; 1198 int bits_code; 1199 int mask_code; 1200 } LoopSetup; 1201 1202 #define LoopSetup_opcode 0xe0800000 1203 #define LoopSetup_eoffset_bits 0 1204 #define LoopSetup_eoffset_mask 0x3ff 1205 #define LoopSetup_dontcare_bits 10 1206 #define LoopSetup_dontcare_mask 0x3 1207 #define LoopSetup_reg_bits 12 1208 #define LoopSetup_reg_mask 0xf 1209 #define LoopSetup_soffset_bits 16 1210 #define LoopSetup_soffset_mask 0xf 1211 #define LoopSetup_c_bits 20 1212 #define LoopSetup_c_mask 0x1 1213 #define LoopSetup_rop_bits 21 1214 #define LoopSetup_rop_mask 0x3 1215 #define LoopSetup_code_bits 23 1216 #define LoopSetup_code_mask 0x1ff 1217 1218 #define init_LoopSetup \ 1219 { \ 1220 LoopSetup_opcode, \ 1221 LoopSetup_eoffset_bits, LoopSetup_eoffset_mask, \ 1222 LoopSetup_dontcare_bits, LoopSetup_dontcare_mask, \ 1223 LoopSetup_reg_bits, LoopSetup_reg_mask, \ 1224 LoopSetup_soffset_bits, LoopSetup_soffset_mask, \ 1225 LoopSetup_c_bits, LoopSetup_c_mask, \ 1226 LoopSetup_rop_bits, LoopSetup_rop_mask, \ 1227 LoopSetup_code_bits, LoopSetup_code_mask \ 1228 }; 1229 1230 /* LDIMMhalf 1231 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1232 | 1 | 1 | 1 | 0 | 0 | 0 | 0 | 1 |.Z.|.H.|.S.|.grp...|.reg.......| 1233 |.hword.........................................................| 1234 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1235 */ 1236 1237 typedef struct 1238 { 1239 unsigned long opcode; 1240 int bits_hword; 1241 int mask_hword; 1242 int bits_reg; 1243 int mask_reg; 1244 int bits_grp; 1245 int mask_grp; 1246 int bits_S; 1247 int mask_S; 1248 int bits_H; 1249 int mask_H; 1250 int bits_Z; 1251 int mask_Z; 1252 int bits_code; 1253 int mask_code; 1254 } LDIMMhalf; 1255 1256 #define LDIMMhalf_opcode 0xe1000000 1257 #define LDIMMhalf_hword_bits 0 1258 #define LDIMMhalf_hword_mask 0xffff 1259 #define LDIMMhalf_reg_bits 16 1260 #define LDIMMhalf_reg_mask 0x7 1261 #define LDIMMhalf_grp_bits 19 1262 #define LDIMMhalf_grp_mask 0x3 1263 #define LDIMMhalf_S_bits 21 1264 #define LDIMMhalf_S_mask 0x1 1265 #define LDIMMhalf_H_bits 22 1266 #define LDIMMhalf_H_mask 0x1 1267 #define LDIMMhalf_Z_bits 23 1268 #define LDIMMhalf_Z_mask 0x1 1269 #define LDIMMhalf_code_bits 24 1270 #define LDIMMhalf_code_mask 0xff 1271 1272 #define init_LDIMMhalf \ 1273 { \ 1274 LDIMMhalf_opcode, \ 1275 LDIMMhalf_hword_bits, LDIMMhalf_hword_mask, \ 1276 LDIMMhalf_reg_bits, LDIMMhalf_reg_mask, \ 1277 LDIMMhalf_grp_bits, LDIMMhalf_grp_mask, \ 1278 LDIMMhalf_S_bits, LDIMMhalf_S_mask, \ 1279 LDIMMhalf_H_bits, LDIMMhalf_H_mask, \ 1280 LDIMMhalf_Z_bits, LDIMMhalf_Z_mask, \ 1281 LDIMMhalf_code_bits, LDIMMhalf_code_mask \ 1282 }; 1283 1284 1285 /* CC2dreg 1286 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1287 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 |.op....|.reg.......| 1288 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1289 */ 1290 1291 typedef struct 1292 { 1293 unsigned short opcode; 1294 int bits_reg; 1295 int mask_reg; 1296 int bits_op; 1297 int mask_op; 1298 int bits_code; 1299 int mask_code; 1300 } CC2dreg; 1301 1302 #define CC2dreg_opcode 0x0200 1303 #define CC2dreg_reg_bits 0 1304 #define CC2dreg_reg_mask 0x7 1305 #define CC2dreg_op_bits 3 1306 #define CC2dreg_op_mask 0x3 1307 #define CC2dreg_code_bits 5 1308 #define CC2dreg_code_mask 0x7fff 1309 1310 #define init_CC2dreg \ 1311 { \ 1312 CC2dreg_opcode, \ 1313 CC2dreg_reg_bits, CC2dreg_reg_mask, \ 1314 CC2dreg_op_bits, CC2dreg_op_mask, \ 1315 CC2dreg_code_bits, CC2dreg_code_mask \ 1316 }; 1317 1318 1319 /* PTR2op 1320 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1321 | 0 | 1 | 0 | 0 | 0 | 1 | 0 |.opc.......|.src.......|.dst.......| 1322 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1323 */ 1324 1325 typedef struct 1326 { 1327 unsigned short opcode; 1328 int bits_dst; 1329 int mask_dst; 1330 int bits_src; 1331 int mask_src; 1332 int bits_opc; 1333 int mask_opc; 1334 int bits_code; 1335 int mask_code; 1336 } PTR2op; 1337 1338 #define PTR2op_opcode 0x4400 1339 #define PTR2op_dst_bits 0 1340 #define PTR2op_dst_mask 0x7 1341 #define PTR2op_src_bits 3 1342 #define PTR2op_src_mask 0x7 1343 #define PTR2op_opc_bits 6 1344 #define PTR2op_opc_mask 0x7 1345 #define PTR2op_code_bits 9 1346 #define PTR2op_code_mask 0x7f 1347 1348 #define init_PTR2op \ 1349 { \ 1350 PTR2op_opcode, \ 1351 PTR2op_dst_bits, PTR2op_dst_mask, \ 1352 PTR2op_src_bits, PTR2op_src_mask, \ 1353 PTR2op_opc_bits, PTR2op_opc_mask, \ 1354 PTR2op_code_bits, PTR2op_code_mask \ 1355 }; 1356 1357 1358 /* COMP3op 1359 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1360 | 0 | 1 | 0 | 1 |.opc.......|.dst.......|.src1......|.src0......| 1361 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1362 */ 1363 1364 typedef struct 1365 { 1366 unsigned short opcode; 1367 int bits_src0; 1368 int mask_src0; 1369 int bits_src1; 1370 int mask_src1; 1371 int bits_dst; 1372 int mask_dst; 1373 int bits_opc; 1374 int mask_opc; 1375 int bits_code; 1376 int mask_code; 1377 } COMP3op; 1378 1379 #define COMP3op_opcode 0x5000 1380 #define COMP3op_src0_bits 0 1381 #define COMP3op_src0_mask 0x7 1382 #define COMP3op_src1_bits 3 1383 #define COMP3op_src1_mask 0x7 1384 #define COMP3op_dst_bits 6 1385 #define COMP3op_dst_mask 0x7 1386 #define COMP3op_opc_bits 9 1387 #define COMP3op_opc_mask 0x7 1388 #define COMP3op_code_bits 12 1389 #define COMP3op_code_mask 0xf 1390 1391 #define init_COMP3op \ 1392 { \ 1393 COMP3op_opcode, \ 1394 COMP3op_src0_bits, COMP3op_src0_mask, \ 1395 COMP3op_src1_bits, COMP3op_src1_mask, \ 1396 COMP3op_dst_bits, COMP3op_dst_mask, \ 1397 COMP3op_opc_bits, COMP3op_opc_mask, \ 1398 COMP3op_code_bits, COMP3op_code_mask \ 1399 }; 1400 1401 /* ccMV 1402 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1403 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.T.|.d.|.s.|.dst.......|.src.......| 1404 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1405 */ 1406 1407 typedef struct 1408 { 1409 unsigned short opcode; 1410 int bits_src; 1411 int mask_src; 1412 int bits_dst; 1413 int mask_dst; 1414 int bits_s; 1415 int mask_s; 1416 int bits_d; 1417 int mask_d; 1418 int bits_T; 1419 int mask_T; 1420 int bits_code; 1421 int mask_code; 1422 } CCmv; 1423 1424 #define CCmv_opcode 0x0600 1425 #define CCmv_src_bits 0 1426 #define CCmv_src_mask 0x7 1427 #define CCmv_dst_bits 3 1428 #define CCmv_dst_mask 0x7 1429 #define CCmv_s_bits 6 1430 #define CCmv_s_mask 0x1 1431 #define CCmv_d_bits 7 1432 #define CCmv_d_mask 0x1 1433 #define CCmv_T_bits 8 1434 #define CCmv_T_mask 0x1 1435 #define CCmv_code_bits 9 1436 #define CCmv_code_mask 0x7f 1437 1438 #define init_CCmv \ 1439 { \ 1440 CCmv_opcode, \ 1441 CCmv_src_bits, CCmv_src_mask, \ 1442 CCmv_dst_bits, CCmv_dst_mask, \ 1443 CCmv_s_bits, CCmv_s_mask, \ 1444 CCmv_d_bits, CCmv_d_mask, \ 1445 CCmv_T_bits, CCmv_T_mask, \ 1446 CCmv_code_bits, CCmv_code_mask \ 1447 }; 1448 1449 1450 /* CCflag 1451 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1452 | 0 | 0 | 0 | 0 | 1 |.I.|.opc.......|.G.|.y.........|.x.........| 1453 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1454 */ 1455 1456 typedef struct 1457 { 1458 unsigned short opcode; 1459 int bits_x; 1460 int mask_x; 1461 int bits_y; 1462 int mask_y; 1463 int bits_G; 1464 int mask_G; 1465 int bits_opc; 1466 int mask_opc; 1467 int bits_I; 1468 int mask_I; 1469 int bits_code; 1470 int mask_code; 1471 } CCflag; 1472 1473 #define CCflag_opcode 0x0800 1474 #define CCflag_x_bits 0 1475 #define CCflag_x_mask 0x7 1476 #define CCflag_y_bits 3 1477 #define CCflag_y_mask 0x7 1478 #define CCflag_G_bits 6 1479 #define CCflag_G_mask 0x1 1480 #define CCflag_opc_bits 7 1481 #define CCflag_opc_mask 0x7 1482 #define CCflag_I_bits 10 1483 #define CCflag_I_mask 0x1 1484 #define CCflag_code_bits 11 1485 #define CCflag_code_mask 0x1f 1486 1487 #define init_CCflag \ 1488 { \ 1489 CCflag_opcode, \ 1490 CCflag_x_bits, CCflag_x_mask, \ 1491 CCflag_y_bits, CCflag_y_mask, \ 1492 CCflag_G_bits, CCflag_G_mask, \ 1493 CCflag_opc_bits, CCflag_opc_mask, \ 1494 CCflag_I_bits, CCflag_I_mask, \ 1495 CCflag_code_bits, CCflag_code_mask, \ 1496 }; 1497 1498 1499 /* CC2stat 1500 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1501 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |.D.|.op....|.cbit..............| 1502 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1503 */ 1504 1505 typedef struct 1506 { 1507 unsigned short opcode; 1508 int bits_cbit; 1509 int mask_cbit; 1510 int bits_op; 1511 int mask_op; 1512 int bits_D; 1513 int mask_D; 1514 int bits_code; 1515 int mask_code; 1516 } CC2stat; 1517 1518 #define CC2stat_opcode 0x0300 1519 #define CC2stat_cbit_bits 0 1520 #define CC2stat_cbit_mask 0x1f 1521 #define CC2stat_op_bits 5 1522 #define CC2stat_op_mask 0x3 1523 #define CC2stat_D_bits 7 1524 #define CC2stat_D_mask 0x1 1525 #define CC2stat_code_bits 8 1526 #define CC2stat_code_mask 0xff 1527 1528 #define init_CC2stat \ 1529 { \ 1530 CC2stat_opcode, \ 1531 CC2stat_cbit_bits, CC2stat_cbit_mask, \ 1532 CC2stat_op_bits, CC2stat_op_mask, \ 1533 CC2stat_D_bits, CC2stat_D_mask, \ 1534 CC2stat_code_bits, CC2stat_code_mask \ 1535 }; 1536 1537 1538 /* REGMV 1539 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1540 | 0 | 0 | 1 | 1 |.gd........|.gs........|.dst.......|.src.......| 1541 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1542 */ 1543 1544 typedef struct 1545 { 1546 unsigned short opcode; 1547 int bits_src; 1548 int mask_src; 1549 int bits_dst; 1550 int mask_dst; 1551 int bits_gs; 1552 int mask_gs; 1553 int bits_gd; 1554 int mask_gd; 1555 int bits_code; 1556 int mask_code; 1557 } RegMv; 1558 1559 #define RegMv_opcode 0x3000 1560 #define RegMv_src_bits 0 1561 #define RegMv_src_mask 0x7 1562 #define RegMv_dst_bits 3 1563 #define RegMv_dst_mask 0x7 1564 #define RegMv_gs_bits 6 1565 #define RegMv_gs_mask 0x7 1566 #define RegMv_gd_bits 9 1567 #define RegMv_gd_mask 0x7 1568 #define RegMv_code_bits 12 1569 #define RegMv_code_mask 0xf 1570 1571 #define init_RegMv \ 1572 { \ 1573 RegMv_opcode, \ 1574 RegMv_src_bits, RegMv_src_mask, \ 1575 RegMv_dst_bits, RegMv_dst_mask, \ 1576 RegMv_gs_bits, RegMv_gs_mask, \ 1577 RegMv_gd_bits, RegMv_gd_mask, \ 1578 RegMv_code_bits, RegMv_code_mask \ 1579 }; 1580 1581 1582 /* COMPI2opD 1583 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1584 | 0 | 1 | 1 | 0 | 0 |.op|.isrc......................|.dst.......| 1585 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1586 */ 1587 1588 typedef struct 1589 { 1590 unsigned short opcode; 1591 int bits_dst; 1592 int mask_dst; 1593 int bits_src; 1594 int mask_src; 1595 int bits_op; 1596 int mask_op; 1597 int bits_code; 1598 int mask_code; 1599 } COMPI2opD; 1600 1601 #define COMPI2opD_opcode 0x6000 1602 #define COMPI2opD_dst_bits 0 1603 #define COMPI2opD_dst_mask 0x7 1604 #define COMPI2opD_src_bits 3 1605 #define COMPI2opD_src_mask 0x7f 1606 #define COMPI2opD_op_bits 10 1607 #define COMPI2opD_op_mask 0x1 1608 #define COMPI2opD_code_bits 11 1609 #define COMPI2opD_code_mask 0x1f 1610 1611 #define init_COMPI2opD \ 1612 { \ 1613 COMPI2opD_opcode, \ 1614 COMPI2opD_dst_bits, COMPI2opD_dst_mask, \ 1615 COMPI2opD_src_bits, COMPI2opD_src_mask, \ 1616 COMPI2opD_op_bits, COMPI2opD_op_mask, \ 1617 COMPI2opD_code_bits, COMPI2opD_code_mask \ 1618 }; 1619 1620 /* COMPI2opP 1621 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1622 | 0 | 1 | 1 | 0 | 1 |.op|.src.......................|.dst.......| 1623 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1624 */ 1625 1626 typedef COMPI2opD COMPI2opP; 1627 1628 #define COMPI2opP_opcode 0x6800 1629 #define COMPI2opP_dst_bits 0 1630 #define COMPI2opP_dst_mask 0x7 1631 #define COMPI2opP_src_bits 3 1632 #define COMPI2opP_src_mask 0x7f 1633 #define COMPI2opP_op_bits 10 1634 #define COMPI2opP_op_mask 0x1 1635 #define COMPI2opP_code_bits 11 1636 #define COMPI2opP_code_mask 0x1f 1637 1638 #define init_COMPI2opP \ 1639 { \ 1640 COMPI2opP_opcode, \ 1641 COMPI2opP_dst_bits, COMPI2opP_dst_mask, \ 1642 COMPI2opP_src_bits, COMPI2opP_src_mask, \ 1643 COMPI2opP_op_bits, COMPI2opP_op_mask, \ 1644 COMPI2opP_code_bits, COMPI2opP_code_mask \ 1645 }; 1646 1647 1648 /* dagMODim 1649 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1650 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 0 |.br| 1 | 1 |.op|.m.....|.i.....| 1651 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1652 */ 1653 1654 typedef struct 1655 { 1656 unsigned short opcode; 1657 int bits_i; 1658 int mask_i; 1659 int bits_m; 1660 int mask_m; 1661 int bits_op; 1662 int mask_op; 1663 int bits_code2; 1664 int mask_code2; 1665 int bits_br; 1666 int mask_br; 1667 int bits_code; 1668 int mask_code; 1669 } DagMODim; 1670 1671 #define DagMODim_opcode 0x9e60 1672 #define DagMODim_i_bits 0 1673 #define DagMODim_i_mask 0x3 1674 #define DagMODim_m_bits 2 1675 #define DagMODim_m_mask 0x3 1676 #define DagMODim_op_bits 4 1677 #define DagMODim_op_mask 0x1 1678 #define DagMODim_code2_bits 5 1679 #define DagMODim_code2_mask 0x3 1680 #define DagMODim_br_bits 7 1681 #define DagMODim_br_mask 0x1 1682 #define DagMODim_code_bits 8 1683 #define DagMODim_code_mask 0xff 1684 1685 #define init_DagMODim \ 1686 { \ 1687 DagMODim_opcode, \ 1688 DagMODim_i_bits, DagMODim_i_mask, \ 1689 DagMODim_m_bits, DagMODim_m_mask, \ 1690 DagMODim_op_bits, DagMODim_op_mask, \ 1691 DagMODim_code2_bits, DagMODim_code2_mask, \ 1692 DagMODim_br_bits, DagMODim_br_mask, \ 1693 DagMODim_code_bits, DagMODim_code_mask \ 1694 }; 1695 1696 /* dagMODik 1697 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1698 | 1 | 0 | 0 | 1 | 1 | 1 | 1 | 1 | 0 | 1 | 1 | 0 |.op....|.i.....| 1699 +---+---+---+---|---+---+---+---|---+---+---+---|---+---+---+---+ 1700 */ 1701 1702 typedef struct 1703 { 1704 unsigned short opcode; 1705 int bits_i; 1706 int mask_i; 1707 int bits_op; 1708 int mask_op; 1709 int bits_code; 1710 int mask_code; 1711 } DagMODik; 1712 1713 #define DagMODik_opcode 0x9f60 1714 #define DagMODik_i_bits 0 1715 #define DagMODik_i_mask 0x3 1716 #define DagMODik_op_bits 2 1717 #define DagMODik_op_mask 0x3 1718 #define DagMODik_code_bits 3 1719 #define DagMODik_code_mask 0xfff 1720 1721 #define init_DagMODik \ 1722 { \ 1723 DagMODik_opcode, \ 1724 DagMODik_i_bits, DagMODik_i_mask, \ 1725 DagMODik_op_bits, DagMODik_op_mask, \ 1726 DagMODik_code_bits, DagMODik_code_mask \ 1727 }; 1728