1@c Copyright 2008, 2011 2@c Free Software Foundation, Inc. 3@c This is part of the GAS manual. 4@c For copying conditions, see the file as.texinfo. 5 6@ifset GENERIC 7@page 8@node LM32-Dependent 9@chapter LM32 Dependent Features 10@end ifset 11 12@ifclear GENERIC 13@node Machine Dependencies 14@chapter LM�" Dependent Features 15@end ifclear 16 17@cindex LM32 support 18@menu 19* LM32 Options:: Options 20* LM32 Syntax:: Syntax 21* LM32 Opcodes:: Opcodes 22@end menu 23 24@node LM32 Options 25@section Options 26@cindex LM32 options (none) 27@cindex options for LM32 (none) 28 29@table @code 30 31@cindex @code{-mmultiply-enabled} command line option, LM32 32@item -mmultiply-enabled 33Enable multiply instructions. 34 35@cindex @code{-mdivide-enabled} command line option, LM32 36@item -mdivide-enabled 37Enable divide instructions. 38 39@cindex @code{-mbarrel-shift-enabled} command line option, LM32 40@item -mbarrel-shift-enabled 41Enable barrel-shift instructions. 42 43@cindex @code{-msign-extend-enabled} command line option, LM32 44@item -msign-extend-enabled 45Enable sign extend instructions. 46 47@cindex @code{-muser-enabled} command line option, LM32 48@item -muser-enabled 49Enable user defined instructions. 50 51@cindex @code{-micache-enabled} command line option, LM32 52@item -micache-enabled 53Enable instruction cache related CSRs. 54 55@cindex @code{-mdcache-enabled} command line option, LM32 56@item -mdcache-enabled 57Enable data cache related CSRs. 58 59@cindex @code{-mbreak-enabled} command line option, LM32 60@item -mbreak-enabled 61Enable break instructions. 62 63@cindex @code{-mall-enabled} command line option, LM32 64@item -mall-enabled 65Enable all instructions and CSRs. 66 67@end table 68 69 70@node LM32 Syntax 71@section Syntax 72@menu 73* LM32-Regs:: Register Names 74* LM32-Modifiers:: Relocatable Expression Modifiers 75* LM32-Chars:: Special Characters 76@end menu 77 78@node LM32-Regs 79@subsection Register Names 80 81@cindex LM32 register names 82@cindex register names, LM32 83 84LM32 has 32 x 32-bit general purpose registers @samp{r0}, 85@samp{r1}, ... @samp{r31}. 86 87The following aliases are defined: @samp{gp} - @samp{r26}, 88@samp{fp} - @samp{r27}, @samp{sp} - @samp{r28}, 89@samp{ra} - @samp{r29}, @samp{ea} - @samp{r30}, 90@samp{ba} - @samp{r31}. 91 92LM32 has the following Control and Status Registers (CSRs). 93 94@table @code 95@item IE 96Interrupt enable. 97@item IM 98Interrupt mask. 99@item IP 100Interrupt pending. 101@item ICC 102Instruction cache control. 103@item DCC 104Data cache control. 105@item CC 106Cycle counter. 107@item CFG 108Configuration. 109@item EBA 110Exception base address. 111@item DC 112Debug control. 113@item DEBA 114Debug exception base address. 115@item JTX 116JTAG transmit. 117@item JRX 118JTAG receive. 119@item BP0 120Breakpoint 0. 121@item BP1 122Breakpoint 1. 123@item BP2 124Breakpoint 2. 125@item BP3 126Breakpoint 3. 127@item WP0 128Watchpoint 0. 129@item WP1 130Watchpoint 1. 131@item WP2 132Watchpoint 2. 133@item WP3 134Watchpoint 3. 135@end table 136 137@node LM32-Modifiers 138@subsection Relocatable Expression Modifiers 139 140@cindex LM32 modifiers 141@cindex syntax, LM32 142 143The assembler supports several modifiers when using relocatable addresses 144in LM32 instruction operands. The general syntax is the following: 145 146@smallexample 147modifier(relocatable-expression) 148@end smallexample 149 150@table @code 151@cindex symbol modifiers 152 153@item lo 154 155This modifier allows you to use bits 0 through 15 of 156an address expression as 16 bit relocatable expression. 157 158@item hi 159 160This modifier allows you to use bits 16 through 23 of an address expression 161as 16 bit relocatable expression. 162 163For example 164 165@smallexample 166ori r4, r4, lo(sym+10) 167orhi r4, r4, hi(sym+10) 168@end smallexample 169 170@item gp 171 172This modified creates a 16-bit relocatable expression that is 173the offset of the symbol from the global pointer. 174 175@smallexample 176mva r4, gp(sym) 177@end smallexample 178 179@item got 180 181This modifier places a symbol in the GOT and creates a 16-bit 182relocatable expression that is the offset into the GOT of this 183symbol. 184 185@smallexample 186lw r4, (gp+got(sym)) 187@end smallexample 188 189@item gotofflo16 190 191This modifier allows you to use the bits 0 through 15 of an 192address which is an offset from the GOT. 193 194@item gotoffhi16 195 196This modifier allows you to use the bits 16 through 31 of an 197address which is an offset from the GOT. 198 199@smallexample 200orhi r4, r4, gotoffhi16(lsym) 201addi r4, r4, gotofflo16(lsym) 202@end smallexample 203 204@end table 205 206@node LM32-Chars 207@subsection Special Characters 208 209@cindex line comment character, LM32 210@cindex LM32 line comment character 211The presence of a @samp{#} on a line indicates the start of a comment 212that extends to the end of the current line. Note that if a line 213starts with a @samp{#} character then it can also be a logical line 214number directive (@pxref{Comments}) or a preprocessor 215control command (@pxref{Preprocessing}). 216 217@cindex line separator, LM32 218@cindex statement separator, LM32 219@cindex LM32 line separator 220A semicolon (@samp{;}) can be used to separate multiple statements on 221the same line. 222 223@node LM32 Opcodes 224@section Opcodes 225 226@cindex LM32 opcode summary 227@cindex opcode summary, LM32 228@cindex mnemonics, LM32 229@cindex instruction summary, LM32 230For detailed information on the LM32 machine instruction set, see 231@url{http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/}. 232 233@code{@value{AS}} implements all the standard LM32 opcodes. 234