1@c Copyright 2006 2@c Free Software Foundation, Inc. 3@c This is part of the GAS manual. 4@c For copying conditions, see the file as.texinfo. 5 6@ifset GENERIC 7@page 8@node AVR-Dependent 9@chapter AVR Dependent Features 10@end ifset 11 12@ifclear GENERIC 13@node Machine Dependencies 14@chapter AVR Dependent Features 15@end ifclear 16 17@cindex AVR support 18@menu 19* AVR Options:: Options 20* AVR Syntax:: Syntax 21* AVR Opcodes:: Opcodes 22@end menu 23 24@node AVR Options 25@section Options 26@cindex AVR options (none) 27@cindex options for AVR (none) 28 29@table @code 30 31@cindex @code{-mmcu=} command line option, AVR 32@item -mmcu=@var{mcu} 33Specify ATMEL AVR instruction set or MCU type. 34 35Instruction set avr1 is for the minimal AVR core, not supported by the C 36compiler, only for assembler programs (MCU types: at90s1200, 37attiny11, attiny12, attiny15, attiny28). 38 39Instruction set avr2 (default) is for the classic AVR core with up to 408K program memory space (MCU types: at90s2313, at90s2323, at90s2333, at90s2343, 41attiny22, attiny26, at90s4414, at90s4433, at90s4434, at90s8515, at90c8534, 42at90s8535). 43 44Instruction set avr25 is for the classic AVR core with up to 8K program memory 45space plus the MOVW instruction (MCU types: attiny13, attiny13a, attiny2313, 46attiny24, attiny44, attiny84, attiny25, attiny45, attiny85, attiny261, 47attiny461, attiny861, attiny43u, attiny48, attiny88, at86rf401). 48 49Instruction set avr3 is for the classic AVR core with up to 128K program 50memory space (MCU types: at43usb355, at76c711). 51 52Instruction set avr31 is for the classic AVR core with exactly 128K program 53memory space (MCU types: atmega103, at43usb320). 54 55Instruction set avr35 is for classic AVR core plus MOVW, CALL, and JMP 56instructions (MCU types: attiny167, at90usb82, at90usb162). 57 58Instruction set avr4 is for the enhanced AVR core with up to 8K program 59memory space (MCU types: atmega48, atmega48p,atmega8, atmega88, atmega88p, 60atmega8515, atmega8535, atmega8hva, at90pwm1, at90pwm2, at90pwm2b, 61at90pwm3, at90pwm3b). 62 63Instruction set avr5 is for the enhanced AVR core with up to 128K program 64memory space (MCU types: atmega16, atmega161, atmega162, atmega163, atmega164p, 65atmega165, atmega165p, atmega168, atmega168p, atmega169, atmega169p, atmega32, 66atmega323, atmega324p, atmega325, atmega325p, atmega3250, atmega3250p, 67atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, atmega406, atmega64, 68atmega640, atmega644, atmega644p, atmega645, atmega6450, atmega649, atmega6490, 69atmega16hva, at90can32, at90can64, at90pwm216, at90pwm316, atmega16u4, 70atmega32c1, atmega32m1, atmega32u4, at90usb646, at90usb647, at94k). 71 72Instruction set avr51 is for the enhanced AVR core with exactly 128K program 73memory space (MCU types: atmega128, atmega1280, atmega1281, atmega1284p, 74at90can128, at90usb1286, at90usb1287). 75 76Instruction set avr6 is for the enhanced AVR core with a 3-byte PC (MCU types: 77atmega2560, atmega2561). 78 79@cindex @code{-mall-opcodes} command line option, AVR 80@item -mall-opcodes 81Accept all AVR opcodes, even if not supported by @code{-mmcu}. 82 83@cindex @code{-mno-skip-bug} command line option, AVR 84@item -mno-skip-bug 85This option disable warnings for skipping two-word instructions. 86 87@cindex @code{-mno-wrap} command line option, AVR 88@item -mno-wrap 89This option reject @code{rjmp/rcall} instructions with 8K wrap-around. 90 91@end table 92 93 94@node AVR Syntax 95@section Syntax 96@menu 97* AVR-Chars:: Special Characters 98* AVR-Regs:: Register Names 99* AVR-Modifiers:: Relocatable Expression Modifiers 100@end menu 101 102@node AVR-Chars 103@subsection Special Characters 104 105@cindex line comment character, AVR 106@cindex AVR line comment character 107 108The presence of a @samp{;} on a line indicates the start of a comment 109that extends to the end of the current line. If a @samp{#} appears as 110the first character of a line, the whole line is treated as a comment. 111 112@cindex line separator, AVR 113@cindex statement separator, AVR 114@cindex AVR line separator 115 116The @samp{$} character can be used instead of a newline to separate 117statements. 118 119@node AVR-Regs 120@subsection Register Names 121 122@cindex AVR register names 123@cindex register names, AVR 124 125The AVR has 32 x 8-bit general purpose working registers @samp{r0}, 126@samp{r1}, ... @samp{r31}. 127Six of the 32 registers can be used as three 16-bit indirect address 128register pointers for Data Space addressing. One of the these address 129pointers can also be used as an address pointer for look up tables in 130Flash program memory. These added function registers are the 16-bit 131@samp{X}, @samp{Y} and @samp{Z} - registers. 132 133@smallexample 134X = @r{r26:r27} 135Y = @r{r28:r29} 136Z = @r{r30:r31} 137@end smallexample 138 139@node AVR-Modifiers 140@subsection Relocatable Expression Modifiers 141 142@cindex AVR modifiers 143@cindex syntax, AVR 144 145The assembler supports several modifiers when using relocatable addresses 146in AVR instruction operands. The general syntax is the following: 147 148@smallexample 149modifier(relocatable-expression) 150@end smallexample 151 152@table @code 153@cindex symbol modifiers 154 155@item lo8 156 157This modifier allows you to use bits 0 through 7 of 158an address expression as 8 bit relocatable expression. 159 160@item hi8 161 162This modifier allows you to use bits 7 through 15 of an address expression 163as 8 bit relocatable expression. This is useful with, for example, the 164AVR @samp{ldi} instruction and @samp{lo8} modifier. 165 166For example 167 168@smallexample 169ldi r26, lo8(sym+10) 170ldi r27, hi8(sym+10) 171@end smallexample 172 173@item hh8 174 175This modifier allows you to use bits 16 through 23 of 176an address expression as 8 bit relocatable expression. 177Also, can be useful for loading 32 bit constants. 178 179@item hlo8 180 181Synonym of @samp{hh8}. 182 183@item hhi8 184 185This modifier allows you to use bits 24 through 31 of 186an expression as 8 bit expression. This is useful with, for example, the 187AVR @samp{ldi} instruction and @samp{lo8}, @samp{hi8}, @samp{hlo8}, 188@samp{hhi8}, modifier. 189 190For example 191 192@smallexample 193ldi r26, lo8(285774925) 194ldi r27, hi8(285774925) 195ldi r28, hlo8(285774925) 196ldi r29, hhi8(285774925) 197; r29,r28,r27,r26 = 285774925 198@end smallexample 199 200@item pm_lo8 201 202This modifier allows you to use bits 0 through 7 of 203an address expression as 8 bit relocatable expression. 204This modifier useful for addressing data or code from 205Flash/Program memory. The using of @samp{pm_lo8} similar 206to @samp{lo8}. 207 208@item pm_hi8 209 210This modifier allows you to use bits 8 through 15 of 211an address expression as 8 bit relocatable expression. 212This modifier useful for addressing data or code from 213Flash/Program memory. 214 215@item pm_hh8 216 217This modifier allows you to use bits 15 through 23 of 218an address expression as 8 bit relocatable expression. 219This modifier useful for addressing data or code from 220Flash/Program memory. 221 222@end table 223 224@node AVR Opcodes 225@section Opcodes 226 227@cindex AVR opcode summary 228@cindex opcode summary, AVR 229@cindex mnemonics, AVR 230@cindex instruction summary, AVR 231For detailed information on the AVR machine instruction set, see 232@url{www.atmel.com/products/AVR}. 233 234@code{@value{AS}} implements all the standard AVR opcodes. 235The following table summarizes the AVR opcodes, and their arguments. 236 237@smallexample 238@i{Legend:} 239 r @r{any register} 240 d @r{`ldi' register (r16-r31)} 241 v @r{`movw' even register (r0, r2, ..., r28, r30)} 242 a @r{`fmul' register (r16-r23)} 243 w @r{`adiw' register (r24,r26,r28,r30)} 244 e @r{pointer registers (X,Y,Z)} 245 b @r{base pointer register and displacement ([YZ]+disp)} 246 z @r{Z pointer register (for [e]lpm Rd,Z[+])} 247 M @r{immediate value from 0 to 255} 248 n @r{immediate value from 0 to 255 ( n = ~M ). Relocation impossible} 249 s @r{immediate value from 0 to 7} 250 P @r{Port address value from 0 to 63. (in, out)} 251 p @r{Port address value from 0 to 31. (cbi, sbi, sbic, sbis)} 252 K @r{immediate value from 0 to 63 (used in `adiw', `sbiw')} 253 i @r{immediate value} 254 l @r{signed pc relative offset from -64 to 63} 255 L @r{signed pc relative offset from -2048 to 2047} 256 h @r{absolute code address (call, jmp)} 257 S @r{immediate value from 0 to 7 (S = s << 4)} 258 ? @r{use this opcode entry if no parameters, else use next opcode entry} 259 2601001010010001000 clc 2611001010011011000 clh 2621001010011111000 cli 2631001010010101000 cln 2641001010011001000 cls 2651001010011101000 clt 2661001010010111000 clv 2671001010010011000 clz 2681001010000001000 sec 2691001010001011000 seh 2701001010001111000 sei 2711001010000101000 sen 2721001010001001000 ses 2731001010001101000 set 2741001010000111000 sev 2751001010000011000 sez 276100101001SSS1000 bclr S 277100101000SSS1000 bset S 2781001010100001001 icall 2791001010000001001 ijmp 2801001010111001000 lpm ? 2811001000ddddd010+ lpm r,z 2821001010111011000 elpm ? 2831001000ddddd011+ elpm r,z 2840000000000000000 nop 2851001010100001000 ret 2861001010100011000 reti 2871001010110001000 sleep 2881001010110011000 break 2891001010110101000 wdr 2901001010111101000 spm 291000111rdddddrrrr adc r,r 292000011rdddddrrrr add r,r 293001000rdddddrrrr and r,r 294000101rdddddrrrr cp r,r 295000001rdddddrrrr cpc r,r 296000100rdddddrrrr cpse r,r 297001001rdddddrrrr eor r,r 298001011rdddddrrrr mov r,r 299100111rdddddrrrr mul r,r 300001010rdddddrrrr or r,r 301000010rdddddrrrr sbc r,r 302000110rdddddrrrr sub r,r 303001001rdddddrrrr clr r 304000011rdddddrrrr lsl r 305000111rdddddrrrr rol r 306001000rdddddrrrr tst r 3070111KKKKddddKKKK andi d,M 3080111KKKKddddKKKK cbr d,n 3091110KKKKddddKKKK ldi d,M 31011101111dddd1111 ser d 3110110KKKKddddKKKK ori d,M 3120110KKKKddddKKKK sbr d,M 3130011KKKKddddKKKK cpi d,M 3140100KKKKddddKKKK sbci d,M 3150101KKKKddddKKKK subi d,M 3161111110rrrrr0sss sbrc r,s 3171111111rrrrr0sss sbrs r,s 3181111100ddddd0sss bld r,s 3191111101ddddd0sss bst r,s 32010110PPdddddPPPP in r,P 32110111PPrrrrrPPPP out P,r 32210010110KKddKKKK adiw w,K 32310010111KKddKKKK sbiw w,K 32410011000pppppsss cbi p,s 32510011010pppppsss sbi p,s 32610011001pppppsss sbic p,s 32710011011pppppsss sbis p,s 328111101lllllll000 brcc l 329111100lllllll000 brcs l 330111100lllllll001 breq l 331111101lllllll100 brge l 332111101lllllll101 brhc l 333111100lllllll101 brhs l 334111101lllllll111 brid l 335111100lllllll111 brie l 336111100lllllll000 brlo l 337111100lllllll100 brlt l 338111100lllllll010 brmi l 339111101lllllll001 brne l 340111101lllllll010 brpl l 341111101lllllll000 brsh l 342111101lllllll110 brtc l 343111100lllllll110 brts l 344111101lllllll011 brvc l 345111100lllllll011 brvs l 346111101lllllllsss brbc s,l 347111100lllllllsss brbs s,l 3481101LLLLLLLLLLLL rcall L 3491100LLLLLLLLLLLL rjmp L 3501001010hhhhh111h call h 3511001010hhhhh110h jmp h 3521001010rrrrr0101 asr r 3531001010rrrrr0000 com r 3541001010rrrrr1010 dec r 3551001010rrrrr0011 inc r 3561001010rrrrr0110 lsr r 3571001010rrrrr0001 neg r 3581001000rrrrr1111 pop r 3591001001rrrrr1111 push r 3601001010rrrrr0111 ror r 3611001010rrrrr0010 swap r 36200000001ddddrrrr movw v,v 36300000010ddddrrrr muls d,d 364000000110ddd0rrr mulsu a,a 365000000110ddd1rrr fmul a,a 366000000111ddd0rrr fmuls a,a 367000000111ddd1rrr fmulsu a,a 3681001001ddddd0000 sts i,r 3691001000ddddd0000 lds r,i 37010o0oo0dddddbooo ldd r,b 371100!000dddddee-+ ld r,e 37210o0oo1rrrrrbooo std b,r 373100!001rrrrree-+ st e,r 3741001010100011001 eicall 3751001010000011001 eijmp 376@end smallexample 377