1This is as.info, produced by makeinfo version 4.8 from as.texinfo. 2 3START-INFO-DIR-ENTRY 4* As: (as). The GNU assembler. 5* Gas: (as). The GNU assembler. 6END-INFO-DIR-ENTRY 7 8 This file documents the GNU Assembler "as". 9 10 Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002, 112006, 2007 Free Software Foundation, Inc. 12 13 Permission is granted to copy, distribute and/or modify this document 14under the terms of the GNU Free Documentation License, Version 1.1 or 15any later version published by the Free Software Foundation; with no 16Invariant Sections, with no Front-Cover Texts, and with no Back-Cover 17Texts. A copy of the license is included in the section entitled "GNU 18Free Documentation License". 19 20 21File: as.info, Node: Top, Next: Overview, Up: (dir) 22 23Using as 24******** 25 26This file is a user guide to the GNU assembler `as' (GNU Binutils) 27version 2.19.1. 28 29 This document is distributed under the terms of the GNU Free 30Documentation License. A copy of the license is included in the 31section entitled "GNU Free Documentation License". 32 33* Menu: 34 35* Overview:: Overview 36* Invoking:: Command-Line Options 37* Syntax:: Syntax 38* Sections:: Sections and Relocation 39* Symbols:: Symbols 40* Expressions:: Expressions 41* Pseudo Ops:: Assembler Directives 42 43* Object Attributes:: Object Attributes 44* Machine Dependencies:: Machine Dependent Features 45* Reporting Bugs:: Reporting Bugs 46* Acknowledgements:: Who Did What 47* GNU Free Documentation License:: GNU Free Documentation License 48* AS Index:: AS Index 49 50 51File: as.info, Node: Overview, Next: Invoking, Prev: Top, Up: Top 52 531 Overview 54********** 55 56Here is a brief summary of how to invoke `as'. For details, see *Note 57Command-Line Options: Invoking. 58 59 as [-a[cdghlns][=FILE]] [-alternate] [-D] 60 [-debug-prefix-map OLD=NEW] 61 [-defsym SYM=VAL] [-f] [-g] [-gstabs] 62 [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J] 63 [-K] [-L] [-listing-lhs-width=NUM] 64 [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM] 65 [-listing-cont-lines=NUM] [-keep-locals] [-o 66 OBJFILE] [-R] [-reduce-memory-overheads] [-statistics] 67 [-v] [-version] [-version] [-W] [-warn] 68 [-fatal-warnings] [-w] [-x] [-Z] [@FILE] 69 [-target-help] [TARGET-OPTIONS] 70 [-|FILES ...] 71 72 _Target Alpha options:_ 73 [-mCPU] 74 [-mdebug | -no-mdebug] 75 [-relax] [-g] [-GSIZE] 76 [-F] [-32addr] 77 78 _Target ARC options:_ 79 [-marc[5|6|7|8]] 80 [-EB|-EL] 81 82 _Target ARM options:_ 83 [-mcpu=PROCESSOR[+EXTENSION...]] 84 [-march=ARCHITECTURE[+EXTENSION...]] 85 [-mfpu=FLOATING-POINT-FORMAT] 86 [-mfloat-abi=ABI] 87 [-meabi=VER] 88 [-mthumb] 89 [-EB|-EL] 90 [-mapcs-32|-mapcs-26|-mapcs-float| 91 -mapcs-reentrant] 92 [-mthumb-interwork] [-k] 93 94 _Target CRIS options:_ 95 [-underscore | -no-underscore] 96 [-pic] [-N] 97 [-emulation=criself | -emulation=crisaout] 98 [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32] 99 100 _Target D10V options:_ 101 [-O] 102 103 _Target D30V options:_ 104 [-O|-n|-N] 105 106 _Target H8/300 options:_ 107 [-h-tick-hex] 108 109 _Target i386 options:_ 110 [-32|-64] [-n] 111 [-march=CPU[+EXTENSION...]] [-mtune=CPU] 112 113 _Target i960 options:_ 114 [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB| 115 -AKC|-AMC] 116 [-b] [-no-relax] 117 118 _Target IA-64 options:_ 119 [-mconstant-gp|-mauto-pic] 120 [-milp32|-milp64|-mlp64|-mp64] 121 [-mle|mbe] 122 [-mtune=itanium1|-mtune=itanium2] 123 [-munwind-check=warning|-munwind-check=error] 124 [-mhint.b=ok|-mhint.b=warning|-mhint.b=error] 125 [-x|-xexplicit] [-xauto] [-xdebug] 126 127 _Target IP2K options:_ 128 [-mip2022|-mip2022ext] 129 130 _Target M32C options:_ 131 [-m32c|-m16c] [-relax] [-h-tick-hex] 132 133 _Target M32R options:_ 134 [-m32rx|-[no-]warn-explicit-parallel-conflicts| 135 -W[n]p] 136 137 _Target M680X0 options:_ 138 [-l] [-m68000|-m68010|-m68020|...] 139 140 _Target M68HC11 options:_ 141 [-m68hc11|-m68hc12|-m68hcs12] 142 [-mshort|-mlong] 143 [-mshort-double|-mlong-double] 144 [-force-long-branches] [-short-branches] 145 [-strict-direct-mode] [-print-insn-syntax] 146 [-print-opcodes] [-generate-example] 147 148 _Target MCORE options:_ 149 [-jsri2bsr] [-sifilter] [-relax] 150 [-mcpu=[210|340]] 151 152 _Target MIPS options:_ 153 [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]] 154 [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared] 155 [-non_shared] [-xgot [-mvxworks-pic] 156 [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32] 157 [-march=CPU] [-mtune=CPU] [-mips1] [-mips2] 158 [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2] 159 [-mips64] [-mips64r2] 160 [-construct-floats] [-no-construct-floats] 161 [-trap] [-no-break] [-break] [-no-trap] 162 [-mfix7000] [-mno-fix7000] 163 [-mips16] [-no-mips16] 164 [-msmartmips] [-mno-smartmips] 165 [-mips3d] [-no-mips3d] 166 [-mdmx] [-no-mdmx] 167 [-mdsp] [-mno-dsp] 168 [-mdspr2] [-mno-dspr2] 169 [-mmt] [-mno-mt] 170 [-mdebug] [-no-mdebug] 171 [-mpdr] [-mno-pdr] 172 173 _Target MMIX options:_ 174 [-fixed-special-register-names] [-globalize-symbols] 175 [-gnu-syntax] [-relax] [-no-predefined-symbols] 176 [-no-expand] [-no-merge-gregs] [-x] 177 [-linker-allocated-gregs] 178 179 _Target PDP11 options:_ 180 [-mpic|-mno-pic] [-mall] [-mno-extensions] 181 [-mEXTENSION|-mno-EXTENSION] 182 [-mCPU] [-mMACHINE] 183 184 _Target picoJava options:_ 185 [-mb|-me] 186 187 _Target PowerPC options:_ 188 [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604| 189 -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke] 190 [-mcom|-many|-maltivec|-mvsx] [-memb] 191 [-mregnames|-mno-regnames] 192 [-mrelocatable|-mrelocatable-lib] 193 [-mlittle|-mlittle-endian|-mbig|-mbig-endian] 194 [-msolaris|-mno-solaris] 195 196 _Target SPARC options:_ 197 [-Av6|-Av7|-Av8|-Asparclet|-Asparclite 198 -Av8plus|-Av8plusa|-Av9|-Av9a] 199 [-xarch=v8plus|-xarch=v8plusa] [-bump] 200 [-32|-64] 201 202 _Target TIC54X options:_ 203 [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf] 204 [-merrors-to-file <FILENAME>|-me <FILENAME>] 205 206 207 _Target Z80 options:_ 208 [-z80] [-r800] 209 [ -ignore-undocumented-instructions] [-Wnud] 210 [ -ignore-unportable-instructions] [-Wnup] 211 [ -warn-undocumented-instructions] [-Wud] 212 [ -warn-unportable-instructions] [-Wup] 213 [ -forbid-undocumented-instructions] [-Fud] 214 [ -forbid-unportable-instructions] [-Fup] 215 216 217 _Target Xtensa options:_ 218 [-[no-]text-section-literals] [-[no-]absolute-literals] 219 [-[no-]target-align] [-[no-]longcalls] 220 [-[no-]transform] 221 [-rename-section OLDNAME=NEWNAME] 222 223`@FILE' 224 Read command-line options from FILE. The options read are 225 inserted in place of the original @FILE option. If FILE does not 226 exist, or cannot be read, then the option will be treated 227 literally, and not removed. 228 229 Options in FILE are separated by whitespace. A whitespace 230 character may be included in an option by surrounding the entire 231 option in either single or double quotes. Any character 232 (including a backslash) may be included by prefixing the character 233 to be included with a backslash. The FILE may itself contain 234 additional @FILE options; any such options will be processed 235 recursively. 236 237`-a[cdghlmns]' 238 Turn on listings, in any of a variety of ways: 239 240 `-ac' 241 omit false conditionals 242 243 `-ad' 244 omit debugging directives 245 246 `-ag' 247 include general information, like as version and options 248 passed 249 250 `-ah' 251 include high-level source 252 253 `-al' 254 include assembly 255 256 `-am' 257 include macro expansions 258 259 `-an' 260 omit forms processing 261 262 `-as' 263 include symbols 264 265 `=file' 266 set the name of the listing file 267 268 You may combine these options; for example, use `-aln' for assembly 269 listing without forms processing. The `=file' option, if used, 270 must be the last one. By itself, `-a' defaults to `-ahls'. 271 272`--alternate' 273 Begin in alternate macro mode. *Note `.altmacro': Altmacro. 274 275`-D' 276 Ignored. This option is accepted for script compatibility with 277 calls to other assemblers. 278 279`--debug-prefix-map OLD=NEW' 280 When assembling files in directory `OLD', record debugging 281 information describing them as in `NEW' instead. 282 283`--defsym SYM=VALUE' 284 Define the symbol SYM to be VALUE before assembling the input file. 285 VALUE must be an integer constant. As in C, a leading `0x' 286 indicates a hexadecimal value, and a leading `0' indicates an octal 287 value. The value of the symbol can be overridden inside a source 288 file via the use of a `.set' pseudo-op. 289 290`-f' 291 "fast"--skip whitespace and comment preprocessing (assume source is 292 compiler output). 293 294`-g' 295`--gen-debug' 296 Generate debugging information for each assembler source line 297 using whichever debug format is preferred by the target. This 298 currently means either STABS, ECOFF or DWARF2. 299 300`--gstabs' 301 Generate stabs debugging information for each assembler line. This 302 may help debugging assembler code, if the debugger can handle it. 303 304`--gstabs+' 305 Generate stabs debugging information for each assembler line, with 306 GNU extensions that probably only gdb can handle, and that could 307 make other debuggers crash or refuse to read your program. This 308 may help debugging assembler code. Currently the only GNU 309 extension is the location of the current working directory at 310 assembling time. 311 312`--gdwarf-2' 313 Generate DWARF2 debugging information for each assembler line. 314 This may help debugging assembler code, if the debugger can handle 315 it. Note--this option is only supported by some targets, not all 316 of them. 317 318`--help' 319 Print a summary of the command line options and exit. 320 321`--target-help' 322 Print a summary of all target specific options and exit. 323 324`-I DIR' 325 Add directory DIR to the search list for `.include' directives. 326 327`-J' 328 Don't warn about signed overflow. 329 330`-K' 331 Issue warnings when difference tables altered for long 332 displacements. 333 334`-L' 335`--keep-locals' 336 Keep (in the symbol table) local symbols. These symbols start with 337 system-specific local label prefixes, typically `.L' for ELF 338 systems or `L' for traditional a.out systems. *Note Symbol 339 Names::. 340 341`--listing-lhs-width=NUMBER' 342 Set the maximum width, in words, of the output data column for an 343 assembler listing to NUMBER. 344 345`--listing-lhs-width2=NUMBER' 346 Set the maximum width, in words, of the output data column for 347 continuation lines in an assembler listing to NUMBER. 348 349`--listing-rhs-width=NUMBER' 350 Set the maximum width of an input source line, as displayed in a 351 listing, to NUMBER bytes. 352 353`--listing-cont-lines=NUMBER' 354 Set the maximum number of lines printed in a listing for a single 355 line of input to NUMBER + 1. 356 357`-o OBJFILE' 358 Name the object-file output from `as' OBJFILE. 359 360`-R' 361 Fold the data section into the text section. 362 363 Set the default size of GAS's hash tables to a prime number close 364 to NUMBER. Increasing this value can reduce the length of time it 365 takes the assembler to perform its tasks, at the expense of 366 increasing the assembler's memory requirements. Similarly 367 reducing this value can reduce the memory requirements at the 368 expense of speed. 369 370`--reduce-memory-overheads' 371 This option reduces GAS's memory requirements, at the expense of 372 making the assembly processes slower. Currently this switch is a 373 synonym for `--hash-size=4051', but in the future it may have 374 other effects as well. 375 376`--statistics' 377 Print the maximum space (in bytes) and total time (in seconds) 378 used by assembly. 379 380`--strip-local-absolute' 381 Remove local absolute symbols from the outgoing symbol table. 382 383`-v' 384`-version' 385 Print the `as' version. 386 387`--version' 388 Print the `as' version and exit. 389 390`-W' 391`--no-warn' 392 Suppress warning messages. 393 394`--fatal-warnings' 395 Treat warnings as errors. 396 397`--warn' 398 Don't suppress warning messages or treat them as errors. 399 400`-w' 401 Ignored. 402 403`-x' 404 Ignored. 405 406`-Z' 407 Generate an object file even after errors. 408 409`-- | FILES ...' 410 Standard input, or source files to assemble. 411 412 413 The following options are available when as is configured for an ARC 414processor. 415 416`-marc[5|6|7|8]' 417 This option selects the core processor variant. 418 419`-EB | -EL' 420 Select either big-endian (-EB) or little-endian (-EL) output. 421 422 The following options are available when as is configured for the ARM 423processor family. 424 425`-mcpu=PROCESSOR[+EXTENSION...]' 426 Specify which ARM processor variant is the target. 427 428`-march=ARCHITECTURE[+EXTENSION...]' 429 Specify which ARM architecture variant is used by the target. 430 431`-mfpu=FLOATING-POINT-FORMAT' 432 Select which Floating Point architecture is the target. 433 434`-mfloat-abi=ABI' 435 Select which floating point ABI is in use. 436 437`-mthumb' 438 Enable Thumb only instruction decoding. 439 440`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant' 441 Select which procedure calling convention is in use. 442 443`-EB | -EL' 444 Select either big-endian (-EB) or little-endian (-EL) output. 445 446`-mthumb-interwork' 447 Specify that the code has been generated with interworking between 448 Thumb and ARM code in mind. 449 450`-k' 451 Specify that PIC code has been generated. 452 453 See the info pages for documentation of the CRIS-specific options. 454 455 The following options are available when as is configured for a D10V 456processor. 457`-O' 458 Optimize output by parallelizing instructions. 459 460 The following options are available when as is configured for a D30V 461processor. 462`-O' 463 Optimize output by parallelizing instructions. 464 465`-n' 466 Warn when nops are generated. 467 468`-N' 469 Warn when a nop after a 32-bit multiply instruction is generated. 470 471 The following options are available when as is configured for the 472Intel 80960 processor. 473 474`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 475 Specify which variant of the 960 architecture is the target. 476 477`-b' 478 Add code to collect statistics about branches taken. 479 480`-no-relax' 481 Do not alter compare-and-branch instructions for long 482 displacements; error if necessary. 483 484 485 The following options are available when as is configured for the 486Ubicom IP2K series. 487 488`-mip2022ext' 489 Specifies that the extended IP2022 instructions are allowed. 490 491`-mip2022' 492 Restores the default behaviour, which restricts the permitted 493 instructions to just the basic IP2022 ones. 494 495 496 The following options are available when as is configured for the 497Renesas M32C and M16C processors. 498 499`-m32c' 500 Assemble M32C instructions. 501 502`-m16c' 503 Assemble M16C instructions (the default). 504 505`-relax' 506 Enable support for link-time relaxations. 507 508`-h-tick-hex' 509 Support H'00 style hex constants in addition to 0x00 style. 510 511 512 The following options are available when as is configured for the 513Renesas M32R (formerly Mitsubishi M32R) series. 514 515`--m32rx' 516 Specify which processor in the M32R family is the target. The 517 default is normally the M32R, but this option changes it to the 518 M32RX. 519 520`--warn-explicit-parallel-conflicts or --Wp' 521 Produce warning messages when questionable parallel constructs are 522 encountered. 523 524`--no-warn-explicit-parallel-conflicts or --Wnp' 525 Do not produce warning messages when questionable parallel 526 constructs are encountered. 527 528 529 The following options are available when as is configured for the 530Motorola 68000 series. 531 532`-l' 533 Shorten references to undefined symbols, to one word instead of 534 two. 535 536`-m68000 | -m68008 | -m68010 | -m68020 | -m68030' 537`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332' 538`| -m68333 | -m68340 | -mcpu32 | -m5200' 539 Specify what processor in the 68000 family is the target. The 540 default is normally the 68020, but this can be changed at 541 configuration time. 542 543`-m68881 | -m68882 | -mno-68881 | -mno-68882' 544 The target machine does (or does not) have a floating-point 545 coprocessor. The default is to assume a coprocessor for 68020, 546 68030, and cpu32. Although the basic 68000 is not compatible with 547 the 68881, a combination of the two can be specified, since it's 548 possible to do emulation of the coprocessor instructions with the 549 main processor. 550 551`-m68851 | -mno-68851' 552 The target machine does (or does not) have a memory-management 553 unit coprocessor. The default is to assume an MMU for 68020 and 554 up. 555 556 557 For details about the PDP-11 machine dependent features options, see 558*Note PDP-11-Options::. 559 560`-mpic | -mno-pic' 561 Generate position-independent (or position-dependent) code. The 562 default is `-mpic'. 563 564`-mall' 565`-mall-extensions' 566 Enable all instruction set extensions. This is the default. 567 568`-mno-extensions' 569 Disable all instruction set extensions. 570 571`-mEXTENSION | -mno-EXTENSION' 572 Enable (or disable) a particular instruction set extension. 573 574`-mCPU' 575 Enable the instruction set extensions supported by a particular 576 CPU, and disable all other extensions. 577 578`-mMACHINE' 579 Enable the instruction set extensions supported by a particular 580 machine model, and disable all other extensions. 581 582 The following options are available when as is configured for a 583picoJava processor. 584 585`-mb' 586 Generate "big endian" format output. 587 588`-ml' 589 Generate "little endian" format output. 590 591 592 The following options are available when as is configured for the 593Motorola 68HC11 or 68HC12 series. 594 595`-m68hc11 | -m68hc12 | -m68hcs12' 596 Specify what processor is the target. The default is defined by 597 the configuration option when building the assembler. 598 599`-mshort' 600 Specify to use the 16-bit integer ABI. 601 602`-mlong' 603 Specify to use the 32-bit integer ABI. 604 605`-mshort-double' 606 Specify to use the 32-bit double ABI. 607 608`-mlong-double' 609 Specify to use the 64-bit double ABI. 610 611`--force-long-branches' 612 Relative branches are turned into absolute ones. This concerns 613 conditional branches, unconditional branches and branches to a sub 614 routine. 615 616`-S | --short-branches' 617 Do not turn relative branches into absolute ones when the offset 618 is out of range. 619 620`--strict-direct-mode' 621 Do not turn the direct addressing mode into extended addressing 622 mode when the instruction does not support direct addressing mode. 623 624`--print-insn-syntax' 625 Print the syntax of instruction in case of error. 626 627`--print-opcodes' 628 print the list of instructions with syntax and then exit. 629 630`--generate-example' 631 print an example of instruction for each possible instruction and 632 then exit. This option is only useful for testing `as'. 633 634 635 The following options are available when `as' is configured for the 636SPARC architecture: 637 638`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 639`-Av8plus | -Av8plusa | -Av9 | -Av9a' 640 Explicitly select a variant of the SPARC architecture. 641 642 `-Av8plus' and `-Av8plusa' select a 32 bit environment. `-Av9' 643 and `-Av9a' select a 64 bit environment. 644 645 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 646 UltraSPARC extensions. 647 648`-xarch=v8plus | -xarch=v8plusa' 649 For compatibility with the Solaris v9 assembler. These options are 650 equivalent to -Av8plus and -Av8plusa, respectively. 651 652`-bump' 653 Warn when the assembler switches to another architecture. 654 655 The following options are available when as is configured for the 656'c54x architecture. 657 658`-mfar-mode' 659 Enable extended addressing mode. All addresses and relocations 660 will assume extended addressing (usually 23 bits). 661 662`-mcpu=CPU_VERSION' 663 Sets the CPU version being compiled for. 664 665`-merrors-to-file FILENAME' 666 Redirect error output to a file, for broken systems which don't 667 support such behaviour in the shell. 668 669 The following options are available when as is configured for a MIPS 670processor. 671 672`-G NUM' 673 This option sets the largest size of an object that can be 674 referenced implicitly with the `gp' register. It is only accepted 675 for targets that use ECOFF format, such as a DECstation running 676 Ultrix. The default value is 8. 677 678`-EB' 679 Generate "big endian" format output. 680 681`-EL' 682 Generate "little endian" format output. 683 684`-mips1' 685`-mips2' 686`-mips3' 687`-mips4' 688`-mips5' 689`-mips32' 690`-mips32r2' 691`-mips64' 692`-mips64r2' 693 Generate code for a particular MIPS Instruction Set Architecture 694 level. `-mips1' is an alias for `-march=r3000', `-mips2' is an 695 alias for `-march=r6000', `-mips3' is an alias for `-march=r4000' 696 and `-mips4' is an alias for `-march=r8000'. `-mips5', `-mips32', 697 `-mips32r2', `-mips64', and `-mips64r2' correspond to generic 698 `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64 699 Release 2' ISA processors, respectively. 700 701`-march=CPU' 702 Generate code for a particular MIPS cpu. 703 704`-mtune=CPU' 705 Schedule and tune for a particular MIPS cpu. 706 707`-mfix7000' 708`-mno-fix7000' 709 Cause nops to be inserted if the read of the destination register 710 of an mfhi or mflo instruction occurs in the following two 711 instructions. 712 713`-mdebug' 714`-no-mdebug' 715 Cause stabs-style debugging output to go into an ECOFF-style 716 .mdebug section instead of the standard ELF .stabs sections. 717 718`-mpdr' 719`-mno-pdr' 720 Control generation of `.pdr' sections. 721 722`-mgp32' 723`-mfp32' 724 The register sizes are normally inferred from the ISA and ABI, but 725 these flags force a certain group of registers to be treated as 32 726 bits wide at all times. `-mgp32' controls the size of 727 general-purpose registers and `-mfp32' controls the size of 728 floating-point registers. 729 730`-mips16' 731`-no-mips16' 732 Generate code for the MIPS 16 processor. This is equivalent to 733 putting `.set mips16' at the start of the assembly file. 734 `-no-mips16' turns off this option. 735 736`-msmartmips' 737`-mno-smartmips' 738 Enables the SmartMIPS extension to the MIPS32 instruction set. 739 This is equivalent to putting `.set smartmips' at the start of the 740 assembly file. `-mno-smartmips' turns off this option. 741 742`-mips3d' 743`-no-mips3d' 744 Generate code for the MIPS-3D Application Specific Extension. 745 This tells the assembler to accept MIPS-3D instructions. 746 `-no-mips3d' turns off this option. 747 748`-mdmx' 749`-no-mdmx' 750 Generate code for the MDMX Application Specific Extension. This 751 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 752 off this option. 753 754`-mdsp' 755`-mno-dsp' 756 Generate code for the DSP Release 1 Application Specific Extension. 757 This tells the assembler to accept DSP Release 1 instructions. 758 `-mno-dsp' turns off this option. 759 760`-mdspr2' 761`-mno-dspr2' 762 Generate code for the DSP Release 2 Application Specific Extension. 763 This option implies -mdsp. This tells the assembler to accept DSP 764 Release 2 instructions. `-mno-dspr2' turns off this option. 765 766`-mmt' 767`-mno-mt' 768 Generate code for the MT Application Specific Extension. This 769 tells the assembler to accept MT instructions. `-mno-mt' turns 770 off this option. 771 772`--construct-floats' 773`--no-construct-floats' 774 The `--no-construct-floats' option disables the construction of 775 double width floating point constants by loading the two halves of 776 the value into the two single width floating point registers that 777 make up the double width register. By default 778 `--construct-floats' is selected, allowing construction of these 779 floating point constants. 780 781`--emulation=NAME' 782 This option causes `as' to emulate `as' configured for some other 783 target, in all respects, including output format (choosing between 784 ELF and ECOFF only), handling of pseudo-opcodes which may generate 785 debugging information or store symbol table information, and 786 default endianness. The available configuration names are: 787 `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf', 788 `mipsbelf'. The first two do not alter the default endianness 789 from that of the primary target for which the assembler was 790 configured; the others change the default to little- or big-endian 791 as indicated by the `b' or `l' in the name. Using `-EB' or `-EL' 792 will override the endianness selection in any case. 793 794 This option is currently supported only when the primary target 795 `as' is configured for is a MIPS ELF or ECOFF target. 796 Furthermore, the primary target or others specified with 797 `--enable-targets=...' at configuration time must include support 798 for the other format, if both are to be available. For example, 799 the Irix 5 configuration includes support for both. 800 801 Eventually, this option will support more configurations, with more 802 fine-grained control over the assembler's behavior, and will be 803 supported for more processors. 804 805`-nocpp' 806 `as' ignores this option. It is accepted for compatibility with 807 the native tools. 808 809`--trap' 810`--no-trap' 811`--break' 812`--no-break' 813 Control how to deal with multiplication overflow and division by 814 zero. `--trap' or `--no-break' (which are synonyms) take a trap 815 exception (and only work for Instruction Set Architecture level 2 816 and higher); `--break' or `--no-trap' (also synonyms, and the 817 default) take a break exception. 818 819`-n' 820 When this option is used, `as' will issue a warning every time it 821 generates a nop instruction from a macro. 822 823 The following options are available when as is configured for an 824MCore processor. 825 826`-jsri2bsr' 827`-nojsri2bsr' 828 Enable or disable the JSRI to BSR transformation. By default this 829 is enabled. The command line option `-nojsri2bsr' can be used to 830 disable it. 831 832`-sifilter' 833`-nosifilter' 834 Enable or disable the silicon filter behaviour. By default this 835 is disabled. The default can be overridden by the `-sifilter' 836 command line option. 837 838`-relax' 839 Alter jump instructions for long displacements. 840 841`-mcpu=[210|340]' 842 Select the cpu type on the target hardware. This controls which 843 instructions can be assembled. 844 845`-EB' 846 Assemble for a big endian target. 847 848`-EL' 849 Assemble for a little endian target. 850 851 852 See the info pages for documentation of the MMIX-specific options. 853 854 The following options are available when as is configured for an 855Xtensa processor. 856 857`--text-section-literals | --no-text-section-literals' 858 With `--text-section-literals', literal pools are interspersed in 859 the text section. The default is `--no-text-section-literals', 860 which places literals in a separate section in the output file. 861 These options only affect literals referenced via PC-relative 862 `L32R' instructions; literals for absolute mode `L32R' 863 instructions are handled separately. 864 865`--absolute-literals | --no-absolute-literals' 866 Indicate to the assembler whether `L32R' instructions use absolute 867 or PC-relative addressing. The default is to assume absolute 868 addressing if the Xtensa processor includes the absolute `L32R' 869 addressing option. Otherwise, only the PC-relative `L32R' mode 870 can be used. 871 872`--target-align | --no-target-align' 873 Enable or disable automatic alignment to reduce branch penalties 874 at the expense of some code density. The default is 875 `--target-align'. 876 877`--longcalls | --no-longcalls' 878 Enable or disable transformation of call instructions to allow 879 calls across a greater range of addresses. The default is 880 `--no-longcalls'. 881 882`--transform | --no-transform' 883 Enable or disable all assembler transformations of Xtensa 884 instructions. The default is `--transform'; `--no-transform' 885 should be used only in the rare cases when the instructions must 886 be exactly as specified in the assembly source. 887 888`--rename-section OLDNAME=NEWNAME' 889 When generating output sections, rename the OLDNAME section to 890 NEWNAME. 891 892 The following options are available when as is configured for a Z80 893family processor. 894`-z80' 895 Assemble for Z80 processor. 896 897`-r800' 898 Assemble for R800 processor. 899 900`-ignore-undocumented-instructions' 901`-Wnud' 902 Assemble undocumented Z80 instructions that also work on R800 903 without warning. 904 905`-ignore-unportable-instructions' 906`-Wnup' 907 Assemble all undocumented Z80 instructions without warning. 908 909`-warn-undocumented-instructions' 910`-Wud' 911 Issue a warning for undocumented Z80 instructions that also work 912 on R800. 913 914`-warn-unportable-instructions' 915`-Wup' 916 Issue a warning for undocumented Z80 instructions that do not work 917 on R800. 918 919`-forbid-undocumented-instructions' 920`-Fud' 921 Treat all undocumented instructions as errors. 922 923`-forbid-unportable-instructions' 924`-Fup' 925 Treat undocumented Z80 instructions that do not work on R800 as 926 errors. 927 928* Menu: 929 930* Manual:: Structure of this Manual 931* GNU Assembler:: The GNU Assembler 932* Object Formats:: Object File Formats 933* Command Line:: Command Line 934* Input Files:: Input Files 935* Object:: Output (Object) File 936* Errors:: Error and Warning Messages 937 938 939File: as.info, Node: Manual, Next: GNU Assembler, Up: Overview 940 9411.1 Structure of this Manual 942============================ 943 944This manual is intended to describe what you need to know to use GNU 945`as'. We cover the syntax expected in source files, including notation 946for symbols, constants, and expressions; the directives that `as' 947understands; and of course how to invoke `as'. 948 949 This manual also describes some of the machine-dependent features of 950various flavors of the assembler. 951 952 On the other hand, this manual is _not_ intended as an introduction 953to programming in assembly language--let alone programming in general! 954In a similar vein, we make no attempt to introduce the machine 955architecture; we do _not_ describe the instruction set, standard 956mnemonics, registers or addressing modes that are standard to a 957particular architecture. You may want to consult the manufacturer's 958machine architecture manual for this information. 959 960 961File: as.info, Node: GNU Assembler, Next: Object Formats, Prev: Manual, Up: Overview 962 9631.2 The GNU Assembler 964===================== 965 966GNU `as' is really a family of assemblers. If you use (or have used) 967the GNU assembler on one architecture, you should find a fairly similar 968environment when you use it on another architecture. Each version has 969much in common with the others, including object file formats, most 970assembler directives (often called "pseudo-ops") and assembler syntax. 971 972 `as' is primarily intended to assemble the output of the GNU C 973compiler `gcc' for use by the linker `ld'. Nevertheless, we've tried 974to make `as' assemble correctly everything that other assemblers for 975the same machine would assemble. Any exceptions are documented 976explicitly (*note Machine Dependencies::). This doesn't mean `as' 977always uses the same syntax as another assembler for the same 978architecture; for example, we know of several incompatible versions of 979680x0 assembly language syntax. 980 981 Unlike older assemblers, `as' is designed to assemble a source 982program in one pass of the source file. This has a subtle impact on the 983`.org' directive (*note `.org': Org.). 984 985 986File: as.info, Node: Object Formats, Next: Command Line, Prev: GNU Assembler, Up: Overview 987 9881.3 Object File Formats 989======================= 990 991The GNU assembler can be configured to produce several alternative 992object file formats. For the most part, this does not affect how you 993write assembly language programs; but directives for debugging symbols 994are typically different in different file formats. *Note Symbol 995Attributes: Symbol Attributes. 996 997 998File: as.info, Node: Command Line, Next: Input Files, Prev: Object Formats, Up: Overview 999 10001.4 Command Line 1001================ 1002 1003After the program name `as', the command line may contain options and 1004file names. Options may appear in any order, and may be before, after, 1005or between file names. The order of file names is significant. 1006 1007 `--' (two hyphens) by itself names the standard input file 1008explicitly, as one of the files for `as' to assemble. 1009 1010 Except for `--' any command line argument that begins with a hyphen 1011(`-') is an option. Each option changes the behavior of `as'. No 1012option changes the way another option works. An option is a `-' 1013followed by one or more letters; the case of the letter is important. 1014All options are optional. 1015 1016 Some options expect exactly one file name to follow them. The file 1017name may either immediately follow the option's letter (compatible with 1018older assemblers) or it may be the next command argument (GNU 1019standard). These two command lines are equivalent: 1020 1021 as -o my-object-file.o mumble.s 1022 as -omy-object-file.o mumble.s 1023 1024 1025File: as.info, Node: Input Files, Next: Object, Prev: Command Line, Up: Overview 1026 10271.5 Input Files 1028=============== 1029 1030We use the phrase "source program", abbreviated "source", to describe 1031the program input to one run of `as'. The program may be in one or 1032more files; how the source is partitioned into files doesn't change the 1033meaning of the source. 1034 1035 The source program is a concatenation of the text in all the files, 1036in the order specified. 1037 1038 Each time you run `as' it assembles exactly one source program. The 1039source program is made up of one or more files. (The standard input is 1040also a file.) 1041 1042 You give `as' a command line that has zero or more input file names. 1043The input files are read (from left file name to right). A command 1044line argument (in any position) that has no special meaning is taken to 1045be an input file name. 1046 1047 If you give `as' no file names it attempts to read one input file 1048from the `as' standard input, which is normally your terminal. You may 1049have to type <ctl-D> to tell `as' there is no more program to assemble. 1050 1051 Use `--' if you need to explicitly name the standard input file in 1052your command line. 1053 1054 If the source is empty, `as' produces a small, empty object file. 1055 1056Filenames and Line-numbers 1057-------------------------- 1058 1059There are two ways of locating a line in the input file (or files) and 1060either may be used in reporting error messages. One way refers to a 1061line number in a physical file; the other refers to a line number in a 1062"logical" file. *Note Error and Warning Messages: Errors. 1063 1064 "Physical files" are those files named in the command line given to 1065`as'. 1066 1067 "Logical files" are simply names declared explicitly by assembler 1068directives; they bear no relation to physical files. Logical file 1069names help error messages reflect the original source file, when `as' 1070source is itself synthesized from other files. `as' understands the 1071`#' directives emitted by the `gcc' preprocessor. See also *Note 1072`.file': File. 1073 1074 1075File: as.info, Node: Object, Next: Errors, Prev: Input Files, Up: Overview 1076 10771.6 Output (Object) File 1078======================== 1079 1080Every time you run `as' it produces an output file, which is your 1081assembly language program translated into numbers. This file is the 1082object file. Its default name is `a.out'. You can give it another 1083name by using the `-o' option. Conventionally, object file names end 1084with `.o'. The default name is used for historical reasons: older 1085assemblers were capable of assembling self-contained programs directly 1086into a runnable program. (For some formats, this isn't currently 1087possible, but it can be done for the `a.out' format.) 1088 1089 The object file is meant for input to the linker `ld'. It contains 1090assembled program code, information to help `ld' integrate the 1091assembled program into a runnable file, and (optionally) symbolic 1092information for the debugger. 1093 1094 1095File: as.info, Node: Errors, Prev: Object, Up: Overview 1096 10971.7 Error and Warning Messages 1098============================== 1099 1100`as' may write warnings and error messages to the standard error file 1101(usually your terminal). This should not happen when a compiler runs 1102`as' automatically. Warnings report an assumption made so that `as' 1103could keep assembling a flawed program; errors report a grave problem 1104that stops the assembly. 1105 1106 Warning messages have the format 1107 1108 file_name:NNN:Warning Message Text 1109 1110(where NNN is a line number). If a logical file name has been given 1111(*note `.file': File.) it is used for the filename, otherwise the name 1112of the current input file is used. If a logical line number was given 1113(*note `.line': Line.) then it is used to calculate the number printed, 1114otherwise the actual line in the current source file is printed. The 1115message text is intended to be self explanatory (in the grand Unix 1116tradition). 1117 1118 Error messages have the format 1119 file_name:NNN:FATAL:Error Message Text 1120 The file name and line number are derived as for warning messages. 1121The actual message text may be rather less explanatory because many of 1122them aren't supposed to happen. 1123 1124 1125File: as.info, Node: Invoking, Next: Syntax, Prev: Overview, Up: Top 1126 11272 Command-Line Options 1128********************** 1129 1130This chapter describes command-line options available in _all_ versions 1131of the GNU assembler; see *Note Machine Dependencies::, for options 1132specific to particular machine architectures. 1133 1134 If you are invoking `as' via the GNU C compiler, you can use the 1135`-Wa' option to pass arguments through to the assembler. The assembler 1136arguments must be separated from each other (and the `-Wa') by commas. 1137For example: 1138 1139 gcc -c -g -O -Wa,-alh,-L file.c 1140 1141This passes two options to the assembler: `-alh' (emit a listing to 1142standard output with high-level and assembly source) and `-L' (retain 1143local symbols in the symbol table). 1144 1145 Usually you do not need to use this `-Wa' mechanism, since many 1146compiler command-line options are automatically passed to the assembler 1147by the compiler. (You can call the GNU compiler driver with the `-v' 1148option to see precisely what options it passes to each compilation 1149pass, including the assembler.) 1150 1151* Menu: 1152 1153* a:: -a[cdghlns] enable listings 1154* alternate:: --alternate enable alternate macro syntax 1155* D:: -D for compatibility 1156* f:: -f to work faster 1157* I:: -I for .include search path 1158 1159* K:: -K for difference tables 1160 1161* L:: -L to retain local symbols 1162* listing:: --listing-XXX to configure listing output 1163* M:: -M or --mri to assemble in MRI compatibility mode 1164* MD:: --MD for dependency tracking 1165* o:: -o to name the object file 1166* R:: -R to join data and text sections 1167* statistics:: --statistics to see statistics about assembly 1168* traditional-format:: --traditional-format for compatible output 1169* v:: -v to announce version 1170* W:: -W, --no-warn, --warn, --fatal-warnings to control warnings 1171* Z:: -Z to make object file even after errors 1172 1173 1174File: as.info, Node: a, Next: alternate, Up: Invoking 1175 11762.1 Enable Listings: `-a[cdghlns]' 1177================================== 1178 1179These options enable listing output from the assembler. By itself, 1180`-a' requests high-level, assembly, and symbols listing. You can use 1181other letters to select specific options for the list: `-ah' requests a 1182high-level language listing, `-al' requests an output-program assembly 1183listing, and `-as' requests a symbol table listing. High-level 1184listings require that a compiler debugging option like `-g' be used, 1185and that assembly listings (`-al') be requested also. 1186 1187 Use the `-ag' option to print a first section with general assembly 1188information, like as version, switches passed, or time stamp. 1189 1190 Use the `-ac' option to omit false conditionals from a listing. Any 1191lines which are not assembled because of a false `.if' (or `.ifdef', or 1192any other conditional), or a true `.if' followed by an `.else', will be 1193omitted from the listing. 1194 1195 Use the `-ad' option to omit debugging directives from the listing. 1196 1197 Once you have specified one of these options, you can further control 1198listing output and its appearance using the directives `.list', 1199`.nolist', `.psize', `.eject', `.title', and `.sbttl'. The `-an' 1200option turns off all forms processing. If you do not request listing 1201output with one of the `-a' options, the listing-control directives 1202have no effect. 1203 1204 The letters after `-a' may be combined into one option, _e.g._, 1205`-aln'. 1206 1207 Note if the assembler source is coming from the standard input (e.g., 1208because it is being created by `gcc' and the `-pipe' command line switch 1209is being used) then the listing will not contain any comments or 1210preprocessor directives. This is because the listing code buffers 1211input source lines from stdin only after they have been preprocessed by 1212the assembler. This reduces memory usage and makes the code more 1213efficient. 1214 1215 1216File: as.info, Node: alternate, Next: D, Prev: a, Up: Invoking 1217 12182.2 `--alternate' 1219================= 1220 1221Begin in alternate macro mode, see *Note `.altmacro': Altmacro. 1222 1223 1224File: as.info, Node: D, Next: f, Prev: alternate, Up: Invoking 1225 12262.3 `-D' 1227======== 1228 1229This option has no effect whatsoever, but it is accepted to make it more 1230likely that scripts written for other assemblers also work with `as'. 1231 1232 1233File: as.info, Node: f, Next: I, Prev: D, Up: Invoking 1234 12352.4 Work Faster: `-f' 1236===================== 1237 1238`-f' should only be used when assembling programs written by a 1239(trusted) compiler. `-f' stops the assembler from doing whitespace and 1240comment preprocessing on the input file(s) before assembling them. 1241*Note Preprocessing: Preprocessing. 1242 1243 _Warning:_ if you use `-f' when the files actually need to be 1244 preprocessed (if they contain comments, for example), `as' does 1245 not work correctly. 1246 1247 1248File: as.info, Node: I, Next: K, Prev: f, Up: Invoking 1249 12502.5 `.include' Search Path: `-I' PATH 1251===================================== 1252 1253Use this option to add a PATH to the list of directories `as' searches 1254for files specified in `.include' directives (*note `.include': 1255Include.). You may use `-I' as many times as necessary to include a 1256variety of paths. The current working directory is always searched 1257first; after that, `as' searches any `-I' directories in the same order 1258as they were specified (left to right) on the command line. 1259 1260 1261File: as.info, Node: K, Next: L, Prev: I, Up: Invoking 1262 12632.6 Difference Tables: `-K' 1264=========================== 1265 1266`as' sometimes alters the code emitted for directives of the form 1267`.word SYM1-SYM2'. *Note `.word': Word. You can use the `-K' option 1268if you want a warning issued when this is done. 1269 1270 1271File: as.info, Node: L, Next: listing, Prev: K, Up: Invoking 1272 12732.7 Include Local Symbols: `-L' 1274=============================== 1275 1276Symbols beginning with system-specific local label prefixes, typically 1277`.L' for ELF systems or `L' for traditional a.out systems, are called 1278"local symbols". *Note Symbol Names::. Normally you do not see such 1279symbols when debugging, because they are intended for the use of 1280programs (like compilers) that compose assembler programs, not for your 1281notice. Normally both `as' and `ld' discard such symbols, so you do 1282not normally debug with them. 1283 1284 This option tells `as' to retain those local symbols in the object 1285file. Usually if you do this you also tell the linker `ld' to preserve 1286those symbols. 1287 1288 1289File: as.info, Node: listing, Next: M, Prev: L, Up: Invoking 1290 12912.8 Configuring listing output: `--listing' 1292=========================================== 1293 1294The listing feature of the assembler can be enabled via the command 1295line switch `-a' (*note a::). This feature combines the input source 1296file(s) with a hex dump of the corresponding locations in the output 1297object file, and displays them as a listing file. The format of this 1298listing can be controlled by directives inside the assembler source 1299(i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl' 1300(*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::) 1301and also by the following switches: 1302 1303`--listing-lhs-width=`number'' 1304 Sets the maximum width, in words, of the first line of the hex 1305 byte dump. This dump appears on the left hand side of the listing 1306 output. 1307 1308`--listing-lhs-width2=`number'' 1309 Sets the maximum width, in words, of any further lines of the hex 1310 byte dump for a given input source line. If this value is not 1311 specified, it defaults to being the same as the value specified 1312 for `--listing-lhs-width'. If neither switch is used the default 1313 is to one. 1314 1315`--listing-rhs-width=`number'' 1316 Sets the maximum width, in characters, of the source line that is 1317 displayed alongside the hex dump. The default value for this 1318 parameter is 100. The source line is displayed on the right hand 1319 side of the listing output. 1320 1321`--listing-cont-lines=`number'' 1322 Sets the maximum number of continuation lines of hex dump that 1323 will be displayed for a given single line of source input. The 1324 default value is 4. 1325 1326 1327File: as.info, Node: M, Next: MD, Prev: listing, Up: Invoking 1328 13292.9 Assemble in MRI Compatibility Mode: `-M' 1330============================================ 1331 1332The `-M' or `--mri' option selects MRI compatibility mode. This 1333changes the syntax and pseudo-op handling of `as' to make it compatible 1334with the `ASM68K' or the `ASM960' (depending upon the configured 1335target) assembler from Microtec Research. The exact nature of the MRI 1336syntax will not be documented here; see the MRI manuals for more 1337information. Note in particular that the handling of macros and macro 1338arguments is somewhat different. The purpose of this option is to 1339permit assembling existing MRI assembler code using `as'. 1340 1341 The MRI compatibility is not complete. Certain operations of the 1342MRI assembler depend upon its object file format, and can not be 1343supported using other object file formats. Supporting these would 1344require enhancing each object file format individually. These are: 1345 1346 * global symbols in common section 1347 1348 The m68k MRI assembler supports common sections which are merged 1349 by the linker. Other object file formats do not support this. 1350 `as' handles common sections by treating them as a single common 1351 symbol. It permits local symbols to be defined within a common 1352 section, but it can not support global symbols, since it has no 1353 way to describe them. 1354 1355 * complex relocations 1356 1357 The MRI assemblers support relocations against a negated section 1358 address, and relocations which combine the start addresses of two 1359 or more sections. These are not support by other object file 1360 formats. 1361 1362 * `END' pseudo-op specifying start address 1363 1364 The MRI `END' pseudo-op permits the specification of a start 1365 address. This is not supported by other object file formats. The 1366 start address may instead be specified using the `-e' option to 1367 the linker, or in a linker script. 1368 1369 * `IDNT', `.ident' and `NAME' pseudo-ops 1370 1371 The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module 1372 name to the output file. This is not supported by other object 1373 file formats. 1374 1375 * `ORG' pseudo-op 1376 1377 The m68k MRI `ORG' pseudo-op begins an absolute section at a given 1378 address. This differs from the usual `as' `.org' pseudo-op, which 1379 changes the location within the current section. Absolute 1380 sections are not supported by other object file formats. The 1381 address of a section may be assigned within a linker script. 1382 1383 There are some other features of the MRI assembler which are not 1384supported by `as', typically either because they are difficult or 1385because they seem of little consequence. Some of these may be 1386supported in future releases. 1387 1388 * EBCDIC strings 1389 1390 EBCDIC strings are not supported. 1391 1392 * packed binary coded decimal 1393 1394 Packed binary coded decimal is not supported. This means that the 1395 `DC.P' and `DCB.P' pseudo-ops are not supported. 1396 1397 * `FEQU' pseudo-op 1398 1399 The m68k `FEQU' pseudo-op is not supported. 1400 1401 * `NOOBJ' pseudo-op 1402 1403 The m68k `NOOBJ' pseudo-op is not supported. 1404 1405 * `OPT' branch control options 1406 1407 The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL', 1408 and `BRW'--are ignored. `as' automatically relaxes all branches, 1409 whether forward or backward, to an appropriate size, so these 1410 options serve no purpose. 1411 1412 * `OPT' list control options 1413 1414 The following m68k `OPT' list control options are ignored: `C', 1415 `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'. 1416 1417 * other `OPT' options 1418 1419 The following m68k `OPT' options are ignored: `NEST', `O', `OLD', 1420 `OP', `P', `PCO', `PCR', `PCS', `R'. 1421 1422 * `OPT' `D' option is default 1423 1424 The m68k `OPT' `D' option is the default, unlike the MRI assembler. 1425 `OPT NOD' may be used to turn it off. 1426 1427 * `XREF' pseudo-op. 1428 1429 The m68k `XREF' pseudo-op is ignored. 1430 1431 * `.debug' pseudo-op 1432 1433 The i960 `.debug' pseudo-op is not supported. 1434 1435 * `.extended' pseudo-op 1436 1437 The i960 `.extended' pseudo-op is not supported. 1438 1439 * `.list' pseudo-op. 1440 1441 The various options of the i960 `.list' pseudo-op are not 1442 supported. 1443 1444 * `.optimize' pseudo-op 1445 1446 The i960 `.optimize' pseudo-op is not supported. 1447 1448 * `.output' pseudo-op 1449 1450 The i960 `.output' pseudo-op is not supported. 1451 1452 * `.setreal' pseudo-op 1453 1454 The i960 `.setreal' pseudo-op is not supported. 1455 1456 1457 1458File: as.info, Node: MD, Next: o, Prev: M, Up: Invoking 1459 14602.10 Dependency Tracking: `--MD' 1461================================ 1462 1463`as' can generate a dependency file for the file it creates. This file 1464consists of a single rule suitable for `make' describing the 1465dependencies of the main source file. 1466 1467 The rule is written to the file named in its argument. 1468 1469 This feature is used in the automatic updating of makefiles. 1470 1471 1472File: as.info, Node: o, Next: R, Prev: MD, Up: Invoking 1473 14742.11 Name the Object File: `-o' 1475=============================== 1476 1477There is always one object file output when you run `as'. By default 1478it has the name `a.out' (or `b.out', for Intel 960 targets only). You 1479use this option (which takes exactly one filename) to give the object 1480file a different name. 1481 1482 Whatever the object file is called, `as' overwrites any existing 1483file of the same name. 1484 1485 1486File: as.info, Node: R, Next: statistics, Prev: o, Up: Invoking 1487 14882.12 Join Data and Text Sections: `-R' 1489====================================== 1490 1491`-R' tells `as' to write the object file as if all data-section data 1492lives in the text section. This is only done at the very last moment: 1493your binary data are the same, but data section parts are relocated 1494differently. The data section part of your object file is zero bytes 1495long because all its bytes are appended to the text section. (*Note 1496Sections and Relocation: Sections.) 1497 1498 When you specify `-R' it would be possible to generate shorter 1499address displacements (because we do not have to cross between text and 1500data section). We refrain from doing this simply for compatibility with 1501older versions of `as'. In future, `-R' may work this way. 1502 1503 When `as' is configured for COFF or ELF output, this option is only 1504useful if you use sections named `.text' and `.data'. 1505 1506 `-R' is not supported for any of the HPPA targets. Using `-R' 1507generates a warning from `as'. 1508 1509 1510File: as.info, Node: statistics, Next: traditional-format, Prev: R, Up: Invoking 1511 15122.13 Display Assembly Statistics: `--statistics' 1513================================================ 1514 1515Use `--statistics' to display two statistics about the resources used by 1516`as': the maximum amount of space allocated during the assembly (in 1517bytes), and the total execution time taken for the assembly (in CPU 1518seconds). 1519 1520 1521File: as.info, Node: traditional-format, Next: v, Prev: statistics, Up: Invoking 1522 15232.14 Compatible Output: `--traditional-format' 1524============================================== 1525 1526For some targets, the output of `as' is different in some ways from the 1527output of some existing assembler. This switch requests `as' to use 1528the traditional format instead. 1529 1530 For example, it disables the exception frame optimizations which 1531`as' normally does by default on `gcc' output. 1532 1533 1534File: as.info, Node: v, Next: W, Prev: traditional-format, Up: Invoking 1535 15362.15 Announce Version: `-v' 1537=========================== 1538 1539You can find out what version of as is running by including the option 1540`-v' (which you can also spell as `-version') on the command line. 1541 1542 1543File: as.info, Node: W, Next: Z, Prev: v, Up: Invoking 1544 15452.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings' 1546====================================================================== 1547 1548`as' should never give a warning or error message when assembling 1549compiler output. But programs written by people often cause `as' to 1550give a warning that a particular assumption was made. All such 1551warnings are directed to the standard error file. 1552 1553 If you use the `-W' and `--no-warn' options, no warnings are issued. 1554This only affects the warning messages: it does not change any 1555particular of how `as' assembles your file. Errors, which stop the 1556assembly, are still reported. 1557 1558 If you use the `--fatal-warnings' option, `as' considers files that 1559generate warnings to be in error. 1560 1561 You can switch these options off again by specifying `--warn', which 1562causes warnings to be output as usual. 1563 1564 1565File: as.info, Node: Z, Prev: W, Up: Invoking 1566 15672.17 Generate Object File in Spite of Errors: `-Z' 1568================================================== 1569 1570After an error message, `as' normally produces no output. If for some 1571reason you are interested in object file output even after `as' gives 1572an error message on your program, use the `-Z' option. If there are 1573any errors, `as' continues anyways, and writes an object file after a 1574final warning message of the form `N errors, M warnings, generating bad 1575object file.' 1576 1577 1578File: as.info, Node: Syntax, Next: Sections, Prev: Invoking, Up: Top 1579 15803 Syntax 1581******** 1582 1583This chapter describes the machine-independent syntax allowed in a 1584source file. `as' syntax is similar to what many other assemblers use; 1585it is inspired by the BSD 4.2 assembler, except that `as' does not 1586assemble Vax bit-fields. 1587 1588* Menu: 1589 1590* Preprocessing:: Preprocessing 1591* Whitespace:: Whitespace 1592* Comments:: Comments 1593* Symbol Intro:: Symbols 1594* Statements:: Statements 1595* Constants:: Constants 1596 1597 1598File: as.info, Node: Preprocessing, Next: Whitespace, Up: Syntax 1599 16003.1 Preprocessing 1601================= 1602 1603The `as' internal preprocessor: 1604 * adjusts and removes extra whitespace. It leaves one space or tab 1605 before the keywords on a line, and turns any other whitespace on 1606 the line into a single space. 1607 1608 * removes all comments, replacing them with a single space, or an 1609 appropriate number of newlines. 1610 1611 * converts character constants into the appropriate numeric values. 1612 1613 It does not do macro processing, include file handling, or anything 1614else you may get from your C compiler's preprocessor. You can do 1615include file processing with the `.include' directive (*note 1616`.include': Include.). You can use the GNU C compiler driver to get 1617other "CPP" style preprocessing by giving the input file a `.S' suffix. 1618*Note Options Controlling the Kind of Output: (gcc.info)Overall 1619Options. 1620 1621 Excess whitespace, comments, and character constants cannot be used 1622in the portions of the input text that are not preprocessed. 1623 1624 If the first line of an input file is `#NO_APP' or if you use the 1625`-f' option, whitespace and comments are not removed from the input 1626file. Within an input file, you can ask for whitespace and comment 1627removal in specific portions of the by putting a line that says `#APP' 1628before the text that may contain whitespace or comments, and putting a 1629line that says `#NO_APP' after this text. This feature is mainly 1630intend to support `asm' statements in compilers whose output is 1631otherwise free of comments and whitespace. 1632 1633 1634File: as.info, Node: Whitespace, Next: Comments, Prev: Preprocessing, Up: Syntax 1635 16363.2 Whitespace 1637============== 1638 1639"Whitespace" is one or more blanks or tabs, in any order. Whitespace 1640is used to separate symbols, and to make programs neater for people to 1641read. Unless within character constants (*note Character Constants: 1642Characters.), any whitespace means the same as exactly one space. 1643 1644 1645File: as.info, Node: Comments, Next: Symbol Intro, Prev: Whitespace, Up: Syntax 1646 16473.3 Comments 1648============ 1649 1650There are two ways of rendering comments to `as'. In both cases the 1651comment is equivalent to one space. 1652 1653 Anything from `/*' through the next `*/' is a comment. This means 1654you may not nest these comments. 1655 1656 /* 1657 The only way to include a newline ('\n') in a comment 1658 is to use this sort of comment. 1659 */ 1660 1661 /* This sort of comment does not nest. */ 1662 1663 Anything from the "line comment" character to the next newline is 1664considered a comment and is ignored. The line comment character is `;' 1665on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA; 1666`#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;' 1667for picoJava; `#' for Motorola PowerPC; `!' for the Renesas / SuperH SH; 1668`!' on the SPARC; `#' on the ip2k; `#' on the m32c; `#' on the m32r; 1669`|' on the 680x0; `#' on the 68HC11 and 68HC12; `#' on the Vax; `;' for 1670the Z80; `!' for the Z8000; `#' on the V850; `#' for Xtensa systems; 1671see *Note Machine Dependencies::. 1672 1673 On some machines there are two different line comment characters. 1674One character only begins a comment if it is the first non-whitespace 1675character on a line, while the other always begins a comment. 1676 1677 The V850 assembler also supports a double dash as starting a comment 1678that extends to the end of the line. 1679 1680 `--'; 1681 1682 To be compatible with past assemblers, lines that begin with `#' 1683have a special interpretation. Following the `#' should be an absolute 1684expression (*note Expressions::): the logical line number of the _next_ 1685line. Then a string (*note Strings: Strings.) is allowed: if present 1686it is a new logical file name. The rest of the line, if any, should be 1687whitespace. 1688 1689 If the first non-whitespace characters on the line are not numeric, 1690the line is ignored. (Just like a comment.) 1691 1692 # This is an ordinary comment. 1693 # 42-6 "new_file_name" # New logical file name 1694 # This is logical line # 36. 1695 This feature is deprecated, and may disappear from future versions 1696of `as'. 1697 1698 1699File: as.info, Node: Symbol Intro, Next: Statements, Prev: Comments, Up: Syntax 1700 17013.4 Symbols 1702=========== 1703 1704A "symbol" is one or more characters chosen from the set of all letters 1705(both upper and lower case), digits and the three characters `_.$'. On 1706most machines, you can also use `$' in symbol names; exceptions are 1707noted in *Note Machine Dependencies::. No symbol may begin with a 1708digit. Case is significant. There is no length limit: all characters 1709are significant. Symbols are delimited by characters not in that set, 1710or by the beginning of a file (since the source program must end with a 1711newline, the end of a file is not a possible symbol delimiter). *Note 1712Symbols::. 1713 1714 1715File: as.info, Node: Statements, Next: Constants, Prev: Symbol Intro, Up: Syntax 1716 17173.5 Statements 1718============== 1719 1720A "statement" ends at a newline character (`\n') or line separator 1721character. (The line separator is usually `;', unless this conflicts 1722with the comment character; see *Note Machine Dependencies::.) The 1723newline or separator character is considered part of the preceding 1724statement. Newlines and separators within character constants are an 1725exception: they do not end statements. 1726 1727It is an error to end any statement with end-of-file: the last 1728character of any input file should be a newline. 1729 1730 An empty statement is allowed, and may include whitespace. It is 1731ignored. 1732 1733 A statement begins with zero or more labels, optionally followed by a 1734key symbol which determines what kind of statement it is. The key 1735symbol determines the syntax of the rest of the statement. If the 1736symbol begins with a dot `.' then the statement is an assembler 1737directive: typically valid for any computer. If the symbol begins with 1738a letter the statement is an assembly language "instruction": it 1739assembles into a machine language instruction. Different versions of 1740`as' for different computers recognize different instructions. In 1741fact, the same symbol may represent a different instruction in a 1742different computer's assembly language. 1743 1744 A label is a symbol immediately followed by a colon (`:'). 1745Whitespace before a label or after a colon is permitted, but you may not 1746have whitespace between a label's symbol and its colon. *Note Labels::. 1747 1748 For HPPA targets, labels need not be immediately followed by a 1749colon, but the definition of a label must begin in column zero. This 1750also implies that only one label may be defined on each line. 1751 1752 label: .directive followed by something 1753 another_label: # This is an empty statement. 1754 instruction operand_1, operand_2, ... 1755 1756 1757File: as.info, Node: Constants, Prev: Statements, Up: Syntax 1758 17593.6 Constants 1760============= 1761 1762A constant is a number, written so that its value is known by 1763inspection, without knowing any context. Like this: 1764 .byte 74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value. 1765 .ascii "Ring the bell\7" # A string constant. 1766 .octa 0x123456789abcdef0123456789ABCDEF0 # A bignum. 1767 .float 0f-314159265358979323846264338327\ 1768 95028841971.693993751E-40 # - pi, a flonum. 1769 1770* Menu: 1771 1772* Characters:: Character Constants 1773* Numbers:: Number Constants 1774 1775 1776File: as.info, Node: Characters, Next: Numbers, Up: Constants 1777 17783.6.1 Character Constants 1779------------------------- 1780 1781There are two kinds of character constants. A "character" stands for 1782one character in one byte and its value may be used in numeric 1783expressions. String constants (properly called string _literals_) are 1784potentially many bytes and their values may not be used in arithmetic 1785expressions. 1786 1787* Menu: 1788 1789* Strings:: Strings 1790* Chars:: Characters 1791 1792 1793File: as.info, Node: Strings, Next: Chars, Up: Characters 1794 17953.6.1.1 Strings 1796............... 1797 1798A "string" is written between double-quotes. It may contain 1799double-quotes or null characters. The way to get special characters 1800into a string is to "escape" these characters: precede them with a 1801backslash `\' character. For example `\\' represents one backslash: 1802the first `\' is an escape which tells `as' to interpret the second 1803character literally as a backslash (which prevents `as' from 1804recognizing the second `\' as an escape character). The complete list 1805of escapes follows. 1806 1807`\b' 1808 Mnemonic for backspace; for ASCII this is octal code 010. 1809 1810`\f' 1811 Mnemonic for FormFeed; for ASCII this is octal code 014. 1812 1813`\n' 1814 Mnemonic for newline; for ASCII this is octal code 012. 1815 1816`\r' 1817 Mnemonic for carriage-Return; for ASCII this is octal code 015. 1818 1819`\t' 1820 Mnemonic for horizontal Tab; for ASCII this is octal code 011. 1821 1822`\ DIGIT DIGIT DIGIT' 1823 An octal character code. The numeric code is 3 octal digits. For 1824 compatibility with other Unix systems, 8 and 9 are accepted as 1825 digits: for example, `\008' has the value 010, and `\009' the 1826 value 011. 1827 1828`\`x' HEX-DIGITS...' 1829 A hex character code. All trailing hex digits are combined. 1830 Either upper or lower case `x' works. 1831 1832`\\' 1833 Represents one `\' character. 1834 1835`\"' 1836 Represents one `"' character. Needed in strings to represent this 1837 character, because an unescaped `"' would end the string. 1838 1839`\ ANYTHING-ELSE' 1840 Any other character when escaped by `\' gives a warning, but 1841 assembles as if the `\' was not present. The idea is that if you 1842 used an escape sequence you clearly didn't want the literal 1843 interpretation of the following character. However `as' has no 1844 other interpretation, so `as' knows it is giving you the wrong 1845 code and warns you of the fact. 1846 1847 Which characters are escapable, and what those escapes represent, 1848varies widely among assemblers. The current set is what we think the 1849BSD 4.2 assembler recognizes, and is a subset of what most C compilers 1850recognize. If you are in doubt, do not use an escape sequence. 1851 1852 1853File: as.info, Node: Chars, Prev: Strings, Up: Characters 1854 18553.6.1.2 Characters 1856.................. 1857 1858A single character may be written as a single quote immediately 1859followed by that character. The same escapes apply to characters as to 1860strings. So if you want to write the character backslash, you must 1861write `'\\' where the first `\' escapes the second `\'. As you can 1862see, the quote is an acute accent, not a grave accent. A newline 1863immediately following an acute accent is taken as a literal character 1864and does not count as the end of a statement. The value of a character 1865constant in a numeric expression is the machine's byte-wide code for 1866that character. `as' assumes your character code is ASCII: `'A' means 186765, `'B' means 66, and so on. 1868 1869 1870File: as.info, Node: Numbers, Prev: Characters, Up: Constants 1871 18723.6.2 Number Constants 1873---------------------- 1874 1875`as' distinguishes three kinds of numbers according to how they are 1876stored in the target machine. _Integers_ are numbers that would fit 1877into an `int' in the C language. _Bignums_ are integers, but they are 1878stored in more than 32 bits. _Flonums_ are floating point numbers, 1879described below. 1880 1881* Menu: 1882 1883* Integers:: Integers 1884* Bignums:: Bignums 1885* Flonums:: Flonums 1886 1887 1888File: as.info, Node: Integers, Next: Bignums, Up: Numbers 1889 18903.6.2.1 Integers 1891................ 1892 1893A binary integer is `0b' or `0B' followed by zero or more of the binary 1894digits `01'. 1895 1896 An octal integer is `0' followed by zero or more of the octal digits 1897(`01234567'). 1898 1899 A decimal integer starts with a non-zero digit followed by zero or 1900more digits (`0123456789'). 1901 1902 A hexadecimal integer is `0x' or `0X' followed by one or more 1903hexadecimal digits chosen from `0123456789abcdefABCDEF'. 1904 1905 Integers have the usual values. To denote a negative integer, use 1906the prefix operator `-' discussed under expressions (*note Prefix 1907Operators: Prefix Ops.). 1908 1909 1910File: as.info, Node: Bignums, Next: Flonums, Prev: Integers, Up: Numbers 1911 19123.6.2.2 Bignums 1913............... 1914 1915A "bignum" has the same syntax and semantics as an integer except that 1916the number (or its negative) takes more than 32 bits to represent in 1917binary. The distinction is made because in some places integers are 1918permitted while bignums are not. 1919 1920 1921File: as.info, Node: Flonums, Prev: Bignums, Up: Numbers 1922 19233.6.2.3 Flonums 1924............... 1925 1926A "flonum" represents a floating point number. The translation is 1927indirect: a decimal floating point number from the text is converted by 1928`as' to a generic binary floating point number of more than sufficient 1929precision. This generic floating point number is converted to a 1930particular computer's floating point format (or formats) by a portion 1931of `as' specialized to that computer. 1932 1933 A flonum is written by writing (in order) 1934 * The digit `0'. (`0' is optional on the HPPA.) 1935 1936 * A letter, to tell `as' the rest of the number is a flonum. `e' is 1937 recommended. Case is not important. 1938 1939 On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the 1940 letter must be one of the letters `DFPRSX' (in upper or lower 1941 case). 1942 1943 On the ARC, the letter must be one of the letters `DFRS' (in upper 1944 or lower case). 1945 1946 On the Intel 960 architecture, the letter must be one of the 1947 letters `DFT' (in upper or lower case). 1948 1949 On the HPPA architecture, the letter must be `E' (upper case only). 1950 1951 * An optional sign: either `+' or `-'. 1952 1953 * An optional "integer part": zero or more decimal digits. 1954 1955 * An optional "fractional part": `.' followed by zero or more 1956 decimal digits. 1957 1958 * An optional exponent, consisting of: 1959 1960 * An `E' or `e'. 1961 1962 * Optional sign: either `+' or `-'. 1963 1964 * One or more decimal digits. 1965 1966 1967 At least one of the integer part or the fractional part must be 1968present. The floating point number has the usual base-10 value. 1969 1970 `as' does all processing using integers. Flonums are computed 1971independently of any floating point hardware in the computer running 1972`as'. 1973 1974 1975File: as.info, Node: Sections, Next: Symbols, Prev: Syntax, Up: Top 1976 19774 Sections and Relocation 1978************************* 1979 1980* Menu: 1981 1982* Secs Background:: Background 1983* Ld Sections:: Linker Sections 1984* As Sections:: Assembler Internal Sections 1985* Sub-Sections:: Sub-Sections 1986* bss:: bss Section 1987 1988 1989File: as.info, Node: Secs Background, Next: Ld Sections, Up: Sections 1990 19914.1 Background 1992============== 1993 1994Roughly, a section is a range of addresses, with no gaps; all data "in" 1995those addresses is treated the same for some particular purpose. For 1996example there may be a "read only" section. 1997 1998 The linker `ld' reads many object files (partial programs) and 1999combines their contents to form a runnable program. When `as' emits an 2000object file, the partial program is assumed to start at address 0. 2001`ld' assigns the final addresses for the partial program, so that 2002different partial programs do not overlap. This is actually an 2003oversimplification, but it suffices to explain how `as' uses sections. 2004 2005 `ld' moves blocks of bytes of your program to their run-time 2006addresses. These blocks slide to their run-time addresses as rigid 2007units; their length does not change and neither does the order of bytes 2008within them. Such a rigid unit is called a _section_. Assigning 2009run-time addresses to sections is called "relocation". It includes the 2010task of adjusting mentions of object-file addresses so they refer to 2011the proper run-time addresses. For the H8/300, and for the Renesas / 2012SuperH SH, `as' pads sections if needed to ensure they end on a word 2013(sixteen bit) boundary. 2014 2015 An object file written by `as' has at least three sections, any of 2016which may be empty. These are named "text", "data" and "bss" sections. 2017 2018 When it generates COFF or ELF output, `as' can also generate 2019whatever other named sections you specify using the `.section' 2020directive (*note `.section': Section.). If you do not use any 2021directives that place output in the `.text' or `.data' sections, these 2022sections still exist, but are empty. 2023 2024 When `as' generates SOM or ELF output for the HPPA, `as' can also 2025generate whatever other named sections you specify using the `.space' 2026and `.subspace' directives. See `HP9000 Series 800 Assembly Language 2027Reference Manual' (HP 92432-90001) for details on the `.space' and 2028`.subspace' assembler directives. 2029 2030 Additionally, `as' uses different names for the standard text, data, 2031and bss sections when generating SOM output. Program text is placed 2032into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'. 2033 2034 Within the object file, the text section starts at address `0', the 2035data section follows, and the bss section follows the data section. 2036 2037 When generating either SOM or ELF output files on the HPPA, the text 2038section starts at address `0', the data section at address `0x4000000', 2039and the bss section follows the data section. 2040 2041 To let `ld' know which data changes when the sections are relocated, 2042and how to change that data, `as' also writes to the object file 2043details of the relocation needed. To perform relocation `ld' must 2044know, each time an address in the object file is mentioned: 2045 * Where in the object file is the beginning of this reference to an 2046 address? 2047 2048 * How long (in bytes) is this reference? 2049 2050 * Which section does the address refer to? What is the numeric 2051 value of 2052 (ADDRESS) - (START-ADDRESS OF SECTION)? 2053 2054 * Is the reference to an address "Program-Counter relative"? 2055 2056 In fact, every address `as' ever uses is expressed as 2057 (SECTION) + (OFFSET INTO SECTION) 2058 Further, most expressions `as' computes have this section-relative 2059nature. (For some object formats, such as SOM for the HPPA, some 2060expressions are symbol-relative instead.) 2061 2062 In this manual we use the notation {SECNAME N} to mean "offset N 2063into section SECNAME." 2064 2065 Apart from text, data and bss sections you need to know about the 2066"absolute" section. When `ld' mixes partial programs, addresses in the 2067absolute section remain unchanged. For example, address `{absolute 0}' 2068is "relocated" to run-time address 0 by `ld'. Although the linker 2069never arranges two partial programs' data sections with overlapping 2070addresses after linking, _by definition_ their absolute sections must 2071overlap. Address `{absolute 239}' in one part of a program is always 2072the same address when the program is running as address `{absolute 2073239}' in any other part of the program. 2074 2075 The idea of sections is extended to the "undefined" section. Any 2076address whose section is unknown at assembly time is by definition 2077rendered {undefined U}--where U is filled in later. Since numbers are 2078always defined, the only way to generate an undefined address is to 2079mention an undefined symbol. A reference to a named common block would 2080be such a symbol: its value is unknown at assembly time so it has 2081section _undefined_. 2082 2083 By analogy the word _section_ is used to describe groups of sections 2084in the linked program. `ld' puts all partial programs' text sections 2085in contiguous addresses in the linked program. It is customary to 2086refer to the _text section_ of a program, meaning all the addresses of 2087all partial programs' text sections. Likewise for data and bss 2088sections. 2089 2090 Some sections are manipulated by `ld'; others are invented for use 2091of `as' and have no meaning except during assembly. 2092 2093 2094File: as.info, Node: Ld Sections, Next: As Sections, Prev: Secs Background, Up: Sections 2095 20964.2 Linker Sections 2097=================== 2098 2099`ld' deals with just four kinds of sections, summarized below. 2100 2101*named sections* 2102*text section* 2103*data section* 2104 These sections hold your program. `as' and `ld' treat them as 2105 separate but equal sections. Anything you can say of one section 2106 is true of another. When the program is running, however, it is 2107 customary for the text section to be unalterable. The text 2108 section is often shared among processes: it contains instructions, 2109 constants and the like. The data section of a running program is 2110 usually alterable: for example, C variables would be stored in the 2111 data section. 2112 2113*bss section* 2114 This section contains zeroed bytes when your program begins 2115 running. It is used to hold uninitialized variables or common 2116 storage. The length of each partial program's bss section is 2117 important, but because it starts out containing zeroed bytes there 2118 is no need to store explicit zero bytes in the object file. The 2119 bss section was invented to eliminate those explicit zeros from 2120 object files. 2121 2122*absolute section* 2123 Address 0 of this section is always "relocated" to runtime address 2124 0. This is useful if you want to refer to an address that `ld' 2125 must not change when relocating. In this sense we speak of 2126 absolute addresses being "unrelocatable": they do not change 2127 during relocation. 2128 2129*undefined section* 2130 This "section" is a catch-all for address references to objects 2131 not in the preceding sections. 2132 2133 An idealized example of three relocatable sections follows. The 2134example uses the traditional section names `.text' and `.data'. Memory 2135addresses are on the horizontal axis. 2136 2137 +-----+----+--+ 2138 partial program # 1: |ttttt|dddd|00| 2139 +-----+----+--+ 2140 2141 text data bss 2142 seg. seg. seg. 2143 2144 +---+---+---+ 2145 partial program # 2: |TTT|DDD|000| 2146 +---+---+---+ 2147 2148 +--+---+-----+--+----+---+-----+~~ 2149 linked program: | |TTT|ttttt| |dddd|DDD|00000| 2150 +--+---+-----+--+----+---+-----+~~ 2151 2152 addresses: 0 ... 2153 2154 2155File: as.info, Node: As Sections, Next: Sub-Sections, Prev: Ld Sections, Up: Sections 2156 21574.3 Assembler Internal Sections 2158=============================== 2159 2160These sections are meant only for the internal use of `as'. They have 2161no meaning at run-time. You do not really need to know about these 2162sections for most purposes; but they can be mentioned in `as' warning 2163messages, so it might be helpful to have an idea of their meanings to 2164`as'. These sections are used to permit the value of every expression 2165in your assembly language program to be a section-relative address. 2166 2167ASSEMBLER-INTERNAL-LOGIC-ERROR! 2168 An internal assembler logic error has been found. This means 2169 there is a bug in the assembler. 2170 2171expr section 2172 The assembler stores complex expression internally as combinations 2173 of symbols. When it needs to represent an expression as a symbol, 2174 it puts it in the expr section. 2175 2176 2177File: as.info, Node: Sub-Sections, Next: bss, Prev: As Sections, Up: Sections 2178 21794.4 Sub-Sections 2180================ 2181 2182Assembled bytes conventionally fall into two sections: text and data. 2183You may have separate groups of data in named sections that you want to 2184end up near to each other in the object file, even though they are not 2185contiguous in the assembler source. `as' allows you to use 2186"subsections" for this purpose. Within each section, there can be 2187numbered subsections with values from 0 to 8192. Objects assembled 2188into the same subsection go into the object file together with other 2189objects in the same subsection. For example, a compiler might want to 2190store constants in the text section, but might not want to have them 2191interspersed with the program being assembled. In this case, the 2192compiler could issue a `.text 0' before each section of code being 2193output, and a `.text 1' before each group of constants being output. 2194 2195Subsections are optional. If you do not use subsections, everything 2196goes in subsection number zero. 2197 2198 Each subsection is zero-padded up to a multiple of four bytes. 2199(Subsections may be padded a different amount on different flavors of 2200`as'.) 2201 2202 Subsections appear in your object file in numeric order, lowest 2203numbered to highest. (All this to be compatible with other people's 2204assemblers.) The object file contains no representation of 2205subsections; `ld' and other programs that manipulate object files see 2206no trace of them. They just see all your text subsections as a text 2207section, and all your data subsections as a data section. 2208 2209 To specify which subsection you want subsequent statements assembled 2210into, use a numeric argument to specify it, in a `.text EXPRESSION' or 2211a `.data EXPRESSION' statement. When generating COFF output, you can 2212also use an extra subsection argument with arbitrary named sections: 2213`.section NAME, EXPRESSION'. When generating ELF output, you can also 2214use the `.subsection' directive (*note SubSection::) to specify a 2215subsection: `.subsection EXPRESSION'. EXPRESSION should be an absolute 2216expression (*note Expressions::). If you just say `.text' then `.text 22170' is assumed. Likewise `.data' means `.data 0'. Assembly begins in 2218`text 0'. For instance: 2219 .text 0 # The default subsection is text 0 anyway. 2220 .ascii "This lives in the first text subsection. *" 2221 .text 1 2222 .ascii "But this lives in the second text subsection." 2223 .data 0 2224 .ascii "This lives in the data section," 2225 .ascii "in the first data subsection." 2226 .text 0 2227 .ascii "This lives in the first text section," 2228 .ascii "immediately following the asterisk (*)." 2229 2230 Each section has a "location counter" incremented by one for every 2231byte assembled into that section. Because subsections are merely a 2232convenience restricted to `as' there is no concept of a subsection 2233location counter. There is no way to directly manipulate a location 2234counter--but the `.align' directive changes it, and any label 2235definition captures its current value. The location counter of the 2236section where statements are being assembled is said to be the "active" 2237location counter. 2238 2239 2240File: as.info, Node: bss, Prev: Sub-Sections, Up: Sections 2241 22424.5 bss Section 2243=============== 2244 2245The bss section is used for local common variable storage. You may 2246allocate address space in the bss section, but you may not dictate data 2247to load into it before your program executes. When your program starts 2248running, all the contents of the bss section are zeroed bytes. 2249 2250 The `.lcomm' pseudo-op defines a symbol in the bss section; see 2251*Note `.lcomm': Lcomm. 2252 2253 The `.comm' pseudo-op may be used to declare a common symbol, which 2254is another form of uninitialized symbol; see *Note `.comm': Comm. 2255 2256 When assembling for a target which supports multiple sections, such 2257as ELF or COFF, you may switch into the `.bss' section and define 2258symbols as usual; see *Note `.section': Section. You may only assemble 2259zero values into the section. Typically the section will only contain 2260symbol definitions and `.skip' directives (*note `.skip': Skip.). 2261 2262 2263File: as.info, Node: Symbols, Next: Expressions, Prev: Sections, Up: Top 2264 22655 Symbols 2266********* 2267 2268Symbols are a central concept: the programmer uses symbols to name 2269things, the linker uses symbols to link, and the debugger uses symbols 2270to debug. 2271 2272 _Warning:_ `as' does not place symbols in the object file in the 2273 same order they were declared. This may break some debuggers. 2274 2275* Menu: 2276 2277* Labels:: Labels 2278* Setting Symbols:: Giving Symbols Other Values 2279* Symbol Names:: Symbol Names 2280* Dot:: The Special Dot Symbol 2281* Symbol Attributes:: Symbol Attributes 2282 2283 2284File: as.info, Node: Labels, Next: Setting Symbols, Up: Symbols 2285 22865.1 Labels 2287========== 2288 2289A "label" is written as a symbol immediately followed by a colon `:'. 2290The symbol then represents the current value of the active location 2291counter, and is, for example, a suitable instruction operand. You are 2292warned if you use the same symbol to represent two different locations: 2293the first definition overrides any other definitions. 2294 2295 On the HPPA, the usual form for a label need not be immediately 2296followed by a colon, but instead must start in column zero. Only one 2297label may be defined on a single line. To work around this, the HPPA 2298version of `as' also provides a special directive `.label' for defining 2299labels more flexibly. 2300 2301 2302File: as.info, Node: Setting Symbols, Next: Symbol Names, Prev: Labels, Up: Symbols 2303 23045.2 Giving Symbols Other Values 2305=============================== 2306 2307A symbol can be given an arbitrary value by writing a symbol, followed 2308by an equals sign `=', followed by an expression (*note Expressions::). 2309This is equivalent to using the `.set' directive. *Note `.set': Set. 2310In the same way, using a double equals sign `='`=' here represents an 2311equivalent of the `.eqv' directive. *Note `.eqv': Eqv. 2312 2313 2314File: as.info, Node: Symbol Names, Next: Dot, Prev: Setting Symbols, Up: Symbols 2315 23165.3 Symbol Names 2317================ 2318 2319Symbol names begin with a letter or with one of `._'. On most 2320machines, you can also use `$' in symbol names; exceptions are noted in 2321*Note Machine Dependencies::. That character may be followed by any 2322string of digits, letters, dollar signs (unless otherwise noted for a 2323particular target machine), and underscores. 2324 2325Case of letters is significant: `foo' is a different symbol name than 2326`Foo'. 2327 2328 Each symbol has exactly one name. Each name in an assembly language 2329program refers to exactly one symbol. You may use that symbol name any 2330number of times in a program. 2331 2332Local Symbol Names 2333------------------ 2334 2335A local symbol is any symbol beginning with certain local label 2336prefixes. By default, the local label prefix is `.L' for ELF systems or 2337`L' for traditional a.out systems, but each target may have its own set 2338of local label prefixes. On the HPPA local symbols begin with `L$'. 2339 2340 Local symbols are defined and used within the assembler, but they are 2341normally not saved in object files. Thus, they are not visible when 2342debugging. You may use the `-L' option (*note Include Local Symbols: 2343`-L': L.) to retain the local symbols in the object files. 2344 2345Local Labels 2346------------ 2347 2348Local labels help compilers and programmers use names temporarily. 2349They create symbols which are guaranteed to be unique over the entire 2350scope of the input source code and which can be referred to by a simple 2351notation. To define a local label, write a label of the form `N:' 2352(where N represents any positive integer). To refer to the most recent 2353previous definition of that label write `Nb', using the same number as 2354when you defined the label. To refer to the next definition of a local 2355label, write `Nf'--the `b' stands for "backwards" and the `f' stands 2356for "forwards". 2357 2358 There is no restriction on how you can use these labels, and you can 2359reuse them too. So that it is possible to repeatedly define the same 2360local label (using the same number `N'), although you can only refer to 2361the most recently defined local label of that number (for a backwards 2362reference) or the next definition of a specific local label for a 2363forward reference. It is also worth noting that the first 10 local 2364labels (`0:'...`9:') are implemented in a slightly more efficient 2365manner than the others. 2366 2367 Here is an example: 2368 2369 1: branch 1f 2370 2: branch 1b 2371 1: branch 2f 2372 2: branch 1b 2373 2374 Which is the equivalent of: 2375 2376 label_1: branch label_3 2377 label_2: branch label_1 2378 label_3: branch label_4 2379 label_4: branch label_3 2380 2381 Local label names are only a notational device. They are immediately 2382transformed into more conventional symbol names before the assembler 2383uses them. The symbol names are stored in the symbol table, appear in 2384error messages, and are optionally emitted to the object file. The 2385names are constructed using these parts: 2386 2387`_local label prefix_' 2388 All local symbols begin with the system-specific local label 2389 prefix. Normally both `as' and `ld' forget symbols that start 2390 with the local label prefix. These labels are used for symbols 2391 you are never intended to see. If you use the `-L' option then 2392 `as' retains these symbols in the object file. If you also 2393 instruct `ld' to retain these symbols, you may use them in 2394 debugging. 2395 2396`NUMBER' 2397 This is the number that was used in the local label definition. 2398 So if the label is written `55:' then the number is `55'. 2399 2400`C-B' 2401 This unusual character is included so you do not accidentally 2402 invent a symbol of the same name. The character has ASCII value 2403 of `\002' (control-B). 2404 2405`_ordinal number_' 2406 This is a serial number to keep the labels distinct. The first 2407 definition of `0:' gets the number `1'. The 15th definition of 2408 `0:' gets the number `15', and so on. Likewise the first 2409 definition of `1:' gets the number `1' and its 15th definition 2410 gets `15' as well. 2411 2412 So for example, the first `1:' may be named `.L1C-B1', and the 44th 2413`3:' may be named `.L3C-B44'. 2414 2415Dollar Local Labels 2416------------------- 2417 2418`as' also supports an even more local form of local labels called 2419dollar labels. These labels go out of scope (i.e., they become 2420undefined) as soon as a non-local label is defined. Thus they remain 2421valid for only a small region of the input source code. Normal local 2422labels, by contrast, remain in scope for the entire file, or until they 2423are redefined by another occurrence of the same local label. 2424 2425 Dollar labels are defined in exactly the same way as ordinary local 2426labels, except that instead of being terminated by a colon, they are 2427terminated by a dollar sign, e.g., `55$'. 2428 2429 They can also be distinguished from ordinary local labels by their 2430transformed names which use ASCII character `\001' (control-A) as the 2431magic character to distinguish them from ordinary labels. For example, 2432the fifth definition of `6$' may be named `.L6C-A5'. 2433 2434 2435File: as.info, Node: Dot, Next: Symbol Attributes, Prev: Symbol Names, Up: Symbols 2436 24375.4 The Special Dot Symbol 2438========================== 2439 2440The special symbol `.' refers to the current address that `as' is 2441assembling into. Thus, the expression `melvin: .long .' defines 2442`melvin' to contain its own address. Assigning a value to `.' is 2443treated the same as a `.org' directive. Thus, the expression `.=.+4' 2444is the same as saying `.space 4'. 2445 2446 2447File: as.info, Node: Symbol Attributes, Prev: Dot, Up: Symbols 2448 24495.5 Symbol Attributes 2450===================== 2451 2452Every symbol has, as well as its name, the attributes "Value" and 2453"Type". Depending on output format, symbols can also have auxiliary 2454attributes. 2455 2456 If you use a symbol without defining it, `as' assumes zero for all 2457these attributes, and probably won't warn you. This makes the symbol 2458an externally defined symbol, which is generally what you would want. 2459 2460* Menu: 2461 2462* Symbol Value:: Value 2463* Symbol Type:: Type 2464 2465 2466* a.out Symbols:: Symbol Attributes: `a.out' 2467 2468* COFF Symbols:: Symbol Attributes for COFF 2469 2470* SOM Symbols:: Symbol Attributes for SOM 2471 2472 2473File: as.info, Node: Symbol Value, Next: Symbol Type, Up: Symbol Attributes 2474 24755.5.1 Value 2476----------- 2477 2478The value of a symbol is (usually) 32 bits. For a symbol which labels a 2479location in the text, data, bss or absolute sections the value is the 2480number of addresses from the start of that section to the label. 2481Naturally for text, data and bss sections the value of a symbol changes 2482as `ld' changes section base addresses during linking. Absolute 2483symbols' values do not change during linking: that is why they are 2484called absolute. 2485 2486 The value of an undefined symbol is treated in a special way. If it 2487is 0 then the symbol is not defined in this assembler source file, and 2488`ld' tries to determine its value from other files linked into the same 2489program. You make this kind of symbol simply by mentioning a symbol 2490name without defining it. A non-zero value represents a `.comm' common 2491declaration. The value is how much common storage to reserve, in bytes 2492(addresses). The symbol refers to the first address of the allocated 2493storage. 2494 2495 2496File: as.info, Node: Symbol Type, Next: a.out Symbols, Prev: Symbol Value, Up: Symbol Attributes 2497 24985.5.2 Type 2499---------- 2500 2501The type attribute of a symbol contains relocation (section) 2502information, any flag settings indicating that a symbol is external, and 2503(optionally), other information for linkers and debuggers. The exact 2504format depends on the object-code output format in use. 2505 2506 2507File: as.info, Node: a.out Symbols, Next: COFF Symbols, Prev: Symbol Type, Up: Symbol Attributes 2508 25095.5.3 Symbol Attributes: `a.out' 2510-------------------------------- 2511 2512* Menu: 2513 2514* Symbol Desc:: Descriptor 2515* Symbol Other:: Other 2516 2517 2518File: as.info, Node: Symbol Desc, Next: Symbol Other, Up: a.out Symbols 2519 25205.5.3.1 Descriptor 2521.................. 2522 2523This is an arbitrary 16-bit value. You may establish a symbol's 2524descriptor value by using a `.desc' statement (*note `.desc': Desc.). 2525A descriptor value means nothing to `as'. 2526 2527 2528File: as.info, Node: Symbol Other, Prev: Symbol Desc, Up: a.out Symbols 2529 25305.5.3.2 Other 2531............. 2532 2533This is an arbitrary 8-bit value. It means nothing to `as'. 2534 2535 2536File: as.info, Node: COFF Symbols, Next: SOM Symbols, Prev: a.out Symbols, Up: Symbol Attributes 2537 25385.5.4 Symbol Attributes for COFF 2539-------------------------------- 2540 2541The COFF format supports a multitude of auxiliary symbol attributes; 2542like the primary symbol attributes, they are set between `.def' and 2543`.endef' directives. 2544 25455.5.4.1 Primary Attributes 2546.......................... 2547 2548The symbol name is set with `.def'; the value and type, respectively, 2549with `.val' and `.type'. 2550 25515.5.4.2 Auxiliary Attributes 2552............................ 2553 2554The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and 2555`.weak' can generate auxiliary symbol table information for COFF. 2556 2557 2558File: as.info, Node: SOM Symbols, Prev: COFF Symbols, Up: Symbol Attributes 2559 25605.5.5 Symbol Attributes for SOM 2561------------------------------- 2562 2563The SOM format for the HPPA supports a multitude of symbol attributes 2564set with the `.EXPORT' and `.IMPORT' directives. 2565 2566 The attributes are described in `HP9000 Series 800 Assembly Language 2567Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT' 2568assembler directive documentation. 2569 2570 2571File: as.info, Node: Expressions, Next: Pseudo Ops, Prev: Symbols, Up: Top 2572 25736 Expressions 2574************* 2575 2576An "expression" specifies an address or numeric value. Whitespace may 2577precede and/or follow an expression. 2578 2579 The result of an expression must be an absolute number, or else an 2580offset into a particular section. If an expression is not absolute, 2581and there is not enough information when `as' sees the expression to 2582know its section, a second pass over the source program might be 2583necessary to interpret the expression--but the second pass is currently 2584not implemented. `as' aborts with an error message in this situation. 2585 2586* Menu: 2587 2588* Empty Exprs:: Empty Expressions 2589* Integer Exprs:: Integer Expressions 2590 2591 2592File: as.info, Node: Empty Exprs, Next: Integer Exprs, Up: Expressions 2593 25946.1 Empty Expressions 2595===================== 2596 2597An empty expression has no value: it is just whitespace or null. 2598Wherever an absolute expression is required, you may omit the 2599expression, and `as' assumes a value of (absolute) 0. This is 2600compatible with other assemblers. 2601 2602 2603File: as.info, Node: Integer Exprs, Prev: Empty Exprs, Up: Expressions 2604 26056.2 Integer Expressions 2606======================= 2607 2608An "integer expression" is one or more _arguments_ delimited by 2609_operators_. 2610 2611* Menu: 2612 2613* Arguments:: Arguments 2614* Operators:: Operators 2615* Prefix Ops:: Prefix Operators 2616* Infix Ops:: Infix Operators 2617 2618 2619File: as.info, Node: Arguments, Next: Operators, Up: Integer Exprs 2620 26216.2.1 Arguments 2622--------------- 2623 2624"Arguments" are symbols, numbers or subexpressions. In other contexts 2625arguments are sometimes called "arithmetic operands". In this manual, 2626to avoid confusing them with the "instruction operands" of the machine 2627language, we use the term "argument" to refer to parts of expressions 2628only, reserving the word "operand" to refer only to machine instruction 2629operands. 2630 2631 Symbols are evaluated to yield {SECTION NNN} where SECTION is one of 2632text, data, bss, absolute, or undefined. NNN is a signed, 2's 2633complement 32 bit integer. 2634 2635 Numbers are usually integers. 2636 2637 A number can be a flonum or bignum. In this case, you are warned 2638that only the low order 32 bits are used, and `as' pretends these 32 2639bits are an integer. You may write integer-manipulating instructions 2640that act on exotic constants, compatible with other assemblers. 2641 2642 Subexpressions are a left parenthesis `(' followed by an integer 2643expression, followed by a right parenthesis `)'; or a prefix operator 2644followed by an argument. 2645 2646 2647File: as.info, Node: Operators, Next: Prefix Ops, Prev: Arguments, Up: Integer Exprs 2648 26496.2.2 Operators 2650--------------- 2651 2652"Operators" are arithmetic functions, like `+' or `%'. Prefix 2653operators are followed by an argument. Infix operators appear between 2654their arguments. Operators may be preceded and/or followed by 2655whitespace. 2656 2657 2658File: as.info, Node: Prefix Ops, Next: Infix Ops, Prev: Operators, Up: Integer Exprs 2659 26606.2.3 Prefix Operator 2661--------------------- 2662 2663`as' has the following "prefix operators". They each take one 2664argument, which must be absolute. 2665 2666`-' 2667 "Negation". Two's complement negation. 2668 2669`~' 2670 "Complementation". Bitwise not. 2671 2672 2673File: as.info, Node: Infix Ops, Prev: Prefix Ops, Up: Integer Exprs 2674 26756.2.4 Infix Operators 2676--------------------- 2677 2678"Infix operators" take two arguments, one on either side. Operators 2679have precedence, but operations with equal precedence are performed left 2680to right. Apart from `+' or `-', both arguments must be absolute, and 2681the result is absolute. 2682 2683 1. Highest Precedence 2684 2685 `*' 2686 "Multiplication". 2687 2688 `/' 2689 "Division". Truncation is the same as the C operator `/' 2690 2691 `%' 2692 "Remainder". 2693 2694 `<<' 2695 "Shift Left". Same as the C operator `<<'. 2696 2697 `>>' 2698 "Shift Right". Same as the C operator `>>'. 2699 2700 2. Intermediate precedence 2701 2702 `|' 2703 "Bitwise Inclusive Or". 2704 2705 `&' 2706 "Bitwise And". 2707 2708 `^' 2709 "Bitwise Exclusive Or". 2710 2711 `!' 2712 "Bitwise Or Not". 2713 2714 3. Low Precedence 2715 2716 `+' 2717 "Addition". If either argument is absolute, the result has 2718 the section of the other argument. You may not add together 2719 arguments from different sections. 2720 2721 `-' 2722 "Subtraction". If the right argument is absolute, the result 2723 has the section of the left argument. If both arguments are 2724 in the same section, the result is absolute. You may not 2725 subtract arguments from different sections. 2726 2727 `==' 2728 "Is Equal To" 2729 2730 `<>' 2731 `!=' 2732 "Is Not Equal To" 2733 2734 `<' 2735 "Is Less Than" 2736 2737 `>' 2738 "Is Greater Than" 2739 2740 `>=' 2741 "Is Greater Than Or Equal To" 2742 2743 `<=' 2744 "Is Less Than Or Equal To" 2745 2746 The comparison operators can be used as infix operators. A 2747 true results has a value of -1 whereas a false result has a 2748 value of 0. Note, these operators perform signed 2749 comparisons. 2750 2751 4. Lowest Precedence 2752 2753 `&&' 2754 "Logical And". 2755 2756 `||' 2757 "Logical Or". 2758 2759 These two logical operations can be used to combine the 2760 results of sub expressions. Note, unlike the comparison 2761 operators a true result returns a value of 1 but a false 2762 results does still return 0. Also note that the logical or 2763 operator has a slightly lower precedence than logical and. 2764 2765 2766 In short, it's only meaningful to add or subtract the _offsets_ in an 2767address; you can only have a defined section in one of the two 2768arguments. 2769 2770 2771File: as.info, Node: Pseudo Ops, Next: Object Attributes, Prev: Expressions, Up: Top 2772 27737 Assembler Directives 2774********************** 2775 2776All assembler directives have names that begin with a period (`.'). 2777The rest of the name is letters, usually in lower case. 2778 2779 This chapter discusses directives that are available regardless of 2780the target machine configuration for the GNU assembler. Some machine 2781configurations provide additional directives. *Note Machine 2782Dependencies::. 2783 2784* Menu: 2785 2786* Abort:: `.abort' 2787 2788* ABORT (COFF):: `.ABORT' 2789 2790* Align:: `.align ABS-EXPR , ABS-EXPR' 2791* Altmacro:: `.altmacro' 2792* Ascii:: `.ascii "STRING"'... 2793* Asciz:: `.asciz "STRING"'... 2794* Balign:: `.balign ABS-EXPR , ABS-EXPR' 2795* Byte:: `.byte EXPRESSIONS' 2796* Comm:: `.comm SYMBOL , LENGTH ' 2797 2798* CFI directives:: `.cfi_startproc [simple]', `.cfi_endproc', etc. 2799 2800* Data:: `.data SUBSECTION' 2801 2802* Def:: `.def NAME' 2803 2804* Desc:: `.desc SYMBOL, ABS-EXPRESSION' 2805 2806* Dim:: `.dim' 2807 2808* Double:: `.double FLONUMS' 2809* Eject:: `.eject' 2810* Else:: `.else' 2811* Elseif:: `.elseif' 2812* End:: `.end' 2813 2814* Endef:: `.endef' 2815 2816* Endfunc:: `.endfunc' 2817* Endif:: `.endif' 2818* Equ:: `.equ SYMBOL, EXPRESSION' 2819* Equiv:: `.equiv SYMBOL, EXPRESSION' 2820* Eqv:: `.eqv SYMBOL, EXPRESSION' 2821* Err:: `.err' 2822* Error:: `.error STRING' 2823* Exitm:: `.exitm' 2824* Extern:: `.extern' 2825* Fail:: `.fail' 2826 2827* File:: `.file STRING' 2828 2829* Fill:: `.fill REPEAT , SIZE , VALUE' 2830* Float:: `.float FLONUMS' 2831* Func:: `.func' 2832* Global:: `.global SYMBOL', `.globl SYMBOL' 2833 2834* Gnu_attribute:: `.gnu_attribute TAG,VALUE' 2835* Hidden:: `.hidden NAMES' 2836 2837* hword:: `.hword EXPRESSIONS' 2838* Ident:: `.ident' 2839* If:: `.if ABSOLUTE EXPRESSION' 2840* Incbin:: `.incbin "FILE"[,SKIP[,COUNT]]' 2841* Include:: `.include "FILE"' 2842* Int:: `.int EXPRESSIONS' 2843 2844* Internal:: `.internal NAMES' 2845 2846* Irp:: `.irp SYMBOL,VALUES'... 2847* Irpc:: `.irpc SYMBOL,VALUES'... 2848* Lcomm:: `.lcomm SYMBOL , LENGTH' 2849* Lflags:: `.lflags' 2850 2851* Line:: `.line LINE-NUMBER' 2852 2853* Linkonce:: `.linkonce [TYPE]' 2854* List:: `.list' 2855* Ln:: `.ln LINE-NUMBER' 2856 2857* LNS directives:: `.file', `.loc', etc. 2858 2859* Long:: `.long EXPRESSIONS' 2860 2861* Macro:: `.macro NAME ARGS'... 2862* MRI:: `.mri VAL' 2863* Noaltmacro:: `.noaltmacro' 2864* Nolist:: `.nolist' 2865* Octa:: `.octa BIGNUMS' 2866* Org:: `.org NEW-LC, FILL' 2867* P2align:: `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2868 2869* PopSection:: `.popsection' 2870* Previous:: `.previous' 2871 2872* Print:: `.print STRING' 2873 2874* Protected:: `.protected NAMES' 2875 2876* Psize:: `.psize LINES, COLUMNS' 2877* Purgem:: `.purgem NAME' 2878 2879* PushSection:: `.pushsection NAME' 2880 2881* Quad:: `.quad BIGNUMS' 2882* Reloc:: `.reloc OFFSET, RELOC_NAME[, EXPRESSION]' 2883* Rept:: `.rept COUNT' 2884* Sbttl:: `.sbttl "SUBHEADING"' 2885 2886* Scl:: `.scl CLASS' 2887 2888* Section:: `.section NAME[, FLAGS]' 2889 2890* Set:: `.set SYMBOL, EXPRESSION' 2891* Short:: `.short EXPRESSIONS' 2892* Single:: `.single FLONUMS' 2893 2894* Size:: `.size [NAME , EXPRESSION]' 2895 2896* Skip:: `.skip SIZE , FILL' 2897* Sleb128:: `.sleb128 EXPRESSIONS' 2898* Space:: `.space SIZE , FILL' 2899 2900* Stab:: `.stabd, .stabn, .stabs' 2901 2902* String:: `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"' 2903* Struct:: `.struct EXPRESSION' 2904 2905* SubSection:: `.subsection' 2906* Symver:: `.symver NAME,NAME2@NODENAME' 2907 2908 2909* Tag:: `.tag STRUCTNAME' 2910 2911* Text:: `.text SUBSECTION' 2912* Title:: `.title "HEADING"' 2913 2914* Type:: `.type <INT | NAME , TYPE DESCRIPTION>' 2915 2916* Uleb128:: `.uleb128 EXPRESSIONS' 2917 2918* Val:: `.val ADDR' 2919 2920 2921* Version:: `.version "STRING"' 2922* VTableEntry:: `.vtable_entry TABLE, OFFSET' 2923* VTableInherit:: `.vtable_inherit CHILD, PARENT' 2924 2925* Warning:: `.warning STRING' 2926* Weak:: `.weak NAMES' 2927* Weakref:: `.weakref ALIAS, SYMBOL' 2928* Word:: `.word EXPRESSIONS' 2929* Deprecated:: Deprecated Directives 2930 2931 2932File: as.info, Node: Abort, Next: ABORT (COFF), Up: Pseudo Ops 2933 29347.1 `.abort' 2935============ 2936 2937This directive stops the assembly immediately. It is for compatibility 2938with other assemblers. The original idea was that the assembly 2939language source would be piped into the assembler. If the sender of 2940the source quit, it could use this directive tells `as' to quit also. 2941One day `.abort' will not be supported. 2942 2943 2944File: as.info, Node: ABORT (COFF), Next: Align, Prev: Abort, Up: Pseudo Ops 2945 29467.2 `.ABORT' (COFF) 2947=================== 2948 2949When producing COFF output, `as' accepts this directive as a synonym 2950for `.abort'. 2951 2952 2953File: as.info, Node: Align, Next: Altmacro, Prev: ABORT (COFF), Up: Pseudo Ops 2954 29557.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR' 2956========================================= 2957 2958Pad the location counter (in the current subsection) to a particular 2959storage boundary. The first expression (which must be absolute) is the 2960alignment required, as described below. 2961 2962 The second expression (also absolute) gives the fill value to be 2963stored in the padding bytes. It (and the comma) may be omitted. If it 2964is omitted, the padding bytes are normally zero. However, on some 2965systems, if the section is marked as containing code and the fill value 2966is omitted, the space is filled with no-op instructions. 2967 2968 The third expression is also absolute, and is also optional. If it 2969is present, it is the maximum number of bytes that should be skipped by 2970this alignment directive. If doing the alignment would require 2971skipping more bytes than the specified maximum, then the alignment is 2972not done at all. You can omit the fill value (the second argument) 2973entirely by simply using two commas after the required alignment; this 2974can be useful if you want the alignment to be filled with no-op 2975instructions when appropriate. 2976 2977 The way the required alignment is specified varies from system to 2978system. For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32, 2979s390, sparc, tic4x, tic80 and xtensa, the first expression is the 2980alignment request in bytes. For example `.align 8' advances the 2981location counter until it is a multiple of 8. If the location counter 2982is already a multiple of 8, no change is needed. For the tic54x, the 2983first expression is the alignment request in words. 2984 2985 For other systems, including ppc, i386 using a.out format, arm and 2986strongarm, it is the number of low-order zero bits the location counter 2987must have after advancement. For example `.align 3' advances the 2988location counter until it a multiple of 8. If the location counter is 2989already a multiple of 8, no change is needed. 2990 2991 This inconsistency is due to the different behaviors of the various 2992native assemblers for these systems which GAS must emulate. GAS also 2993provides `.balign' and `.p2align' directives, described later, which 2994have a consistent behavior across all architectures (but are specific 2995to GAS). 2996 2997 2998File: as.info, Node: Ascii, Next: Asciz, Prev: Altmacro, Up: Pseudo Ops 2999 30007.4 `.ascii "STRING"'... 3001======================== 3002 3003`.ascii' expects zero or more string literals (*note Strings::) 3004separated by commas. It assembles each string (with no automatic 3005trailing zero byte) into consecutive addresses. 3006 3007 3008File: as.info, Node: Asciz, Next: Balign, Prev: Ascii, Up: Pseudo Ops 3009 30107.5 `.asciz "STRING"'... 3011======================== 3012 3013`.asciz' is just like `.ascii', but each string is followed by a zero 3014byte. The "z" in `.asciz' stands for "zero". 3015 3016 3017File: as.info, Node: Balign, Next: Byte, Prev: Asciz, Up: Pseudo Ops 3018 30197.6 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 3020============================================== 3021 3022Pad the location counter (in the current subsection) to a particular 3023storage boundary. The first expression (which must be absolute) is the 3024alignment request in bytes. For example `.balign 8' advances the 3025location counter until it is a multiple of 8. If the location counter 3026is already a multiple of 8, no change is needed. 3027 3028 The second expression (also absolute) gives the fill value to be 3029stored in the padding bytes. It (and the comma) may be omitted. If it 3030is omitted, the padding bytes are normally zero. However, on some 3031systems, if the section is marked as containing code and the fill value 3032is omitted, the space is filled with no-op instructions. 3033 3034 The third expression is also absolute, and is also optional. If it 3035is present, it is the maximum number of bytes that should be skipped by 3036this alignment directive. If doing the alignment would require 3037skipping more bytes than the specified maximum, then the alignment is 3038not done at all. You can omit the fill value (the second argument) 3039entirely by simply using two commas after the required alignment; this 3040can be useful if you want the alignment to be filled with no-op 3041instructions when appropriate. 3042 3043 The `.balignw' and `.balignl' directives are variants of the 3044`.balign' directive. The `.balignw' directive treats the fill pattern 3045as a two byte word value. The `.balignl' directives treats the fill 3046pattern as a four byte longword value. For example, `.balignw 30474,0x368d' will align to a multiple of 4. If it skips two bytes, they 3048will be filled in with the value 0x368d (the exact placement of the 3049bytes depends upon the endianness of the processor). If it skips 1 or 30503 bytes, the fill value is undefined. 3051 3052 3053File: as.info, Node: Byte, Next: Comm, Prev: Balign, Up: Pseudo Ops 3054 30557.7 `.byte EXPRESSIONS' 3056======================= 3057 3058`.byte' expects zero or more expressions, separated by commas. Each 3059expression is assembled into the next byte. 3060 3061 3062File: as.info, Node: Comm, Next: CFI directives, Prev: Byte, Up: Pseudo Ops 3063 30647.8 `.comm SYMBOL , LENGTH ' 3065============================ 3066 3067`.comm' declares a common symbol named SYMBOL. When linking, a common 3068symbol in one object file may be merged with a defined or common symbol 3069of the same name in another object file. If `ld' does not see a 3070definition for the symbol-just one or more common symbols-then it will 3071allocate LENGTH bytes of uninitialized memory. LENGTH must be an 3072absolute expression. If `ld' sees multiple common symbols with the 3073same name, and they do not all have the same size, it will allocate 3074space using the largest size. 3075 3076 When using ELF, the `.comm' directive takes an optional third 3077argument. This is the desired alignment of the symbol, specified as a 3078byte boundary (for example, an alignment of 16 means that the least 3079significant 4 bits of the address should be zero). The alignment must 3080be an absolute expression, and it must be a power of two. If `ld' 3081allocates uninitialized memory for the common symbol, it will use the 3082alignment when placing the symbol. If no alignment is specified, `as' 3083will set the alignment to the largest power of two less than or equal 3084to the size of the symbol, up to a maximum of 16. 3085 3086 The syntax for `.comm' differs slightly on the HPPA. The syntax is 3087`SYMBOL .comm, LENGTH'; SYMBOL is optional. 3088 3089 3090File: as.info, Node: CFI directives, Next: Data, Prev: Comm, Up: Pseudo Ops 3091 30927.9 `.cfi_startproc [simple]' 3093============================= 3094 3095`.cfi_startproc' is used at the beginning of each function that should 3096have an entry in `.eh_frame'. It initializes some internal data 3097structures. Don't forget to close the function by `.cfi_endproc'. 3098 3099 Unless `.cfi_startproc' is used along with parameter `simple' it 3100also emits some architecture dependent initial CFI instructions. 3101 31027.10 `.cfi_endproc' 3103=================== 3104 3105`.cfi_endproc' is used at the end of a function where it closes its 3106unwind entry previously opened by `.cfi_startproc', and emits it to 3107`.eh_frame'. 3108 31097.11 `.cfi_personality ENCODING [, EXP]' 3110======================================== 3111 3112`.cfi_personality' defines personality routine and its encoding. 3113ENCODING must be a constant determining how the personality should be 3114encoded. If it is 255 (`DW_EH_PE_omit'), second argument is not 3115present, otherwise second argument should be a constant or a symbol 3116name. When using indirect encodings, the symbol provided should be the 3117location where personality can be loaded from, not the personality 3118routine itself. The default after `.cfi_startproc' is 3119`.cfi_personality 0xff', no personality routine. 3120 31217.12 `.cfi_lsda ENCODING [, EXP]' 3122================================= 3123 3124`.cfi_lsda' defines LSDA and its encoding. ENCODING must be a constant 3125determining how the LSDA should be encoded. If it is 255 3126(`DW_EH_PE_omit'), second argument is not present, otherwise second 3127argument should be a constant or a symbol name. The default after 3128`.cfi_startproc' is `.cfi_lsda 0xff', no LSDA. 3129 31307.13 `.cfi_def_cfa REGISTER, OFFSET' 3131==================================== 3132 3133`.cfi_def_cfa' defines a rule for computing CFA as: take address from 3134REGISTER and add OFFSET to it. 3135 31367.14 `.cfi_def_cfa_register REGISTER' 3137===================================== 3138 3139`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on 3140REGISTER will be used instead of the old one. Offset remains the same. 3141 31427.15 `.cfi_def_cfa_offset OFFSET' 3143================================= 3144 3145`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register 3146remains the same, but OFFSET is new. Note that it is the absolute 3147offset that will be added to a defined register to compute CFA address. 3148 31497.16 `.cfi_adjust_cfa_offset OFFSET' 3150==================================== 3151 3152Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is 3153added/substracted from the previous offset. 3154 31557.17 `.cfi_offset REGISTER, OFFSET' 3156=================================== 3157 3158Previous value of REGISTER is saved at offset OFFSET from CFA. 3159 31607.18 `.cfi_rel_offset REGISTER, OFFSET' 3161======================================= 3162 3163Previous value of REGISTER is saved at offset OFFSET from the current 3164CFA register. This is transformed to `.cfi_offset' using the known 3165displacement of the CFA register from the CFA. This is often easier to 3166use, because the number will match the code it's annotating. 3167 31687.19 `.cfi_register REGISTER1, REGISTER2' 3169========================================= 3170 3171Previous value of REGISTER1 is saved in register REGISTER2. 3172 31737.20 `.cfi_restore REGISTER' 3174============================ 3175 3176`.cfi_restore' says that the rule for REGISTER is now the same as it 3177was at the beginning of the function, after all initial instruction 3178added by `.cfi_startproc' were executed. 3179 31807.21 `.cfi_undefined REGISTER' 3181============================== 3182 3183From now on the previous value of REGISTER can't be restored anymore. 3184 31857.22 `.cfi_same_value REGISTER' 3186=============================== 3187 3188Current value of REGISTER is the same like in the previous frame, i.e. 3189no restoration needed. 3190 31917.23 `.cfi_remember_state', 3192=========================== 3193 3194First save all current rules for all registers by `.cfi_remember_state', 3195then totally screw them up by subsequent `.cfi_*' directives and when 3196everything is hopelessly bad, use `.cfi_restore_state' to restore the 3197previous saved state. 3198 31997.24 `.cfi_return_column REGISTER' 3200================================== 3201 3202Change return column REGISTER, i.e. the return address is either 3203directly in REGISTER or can be accessed by rules for REGISTER. 3204 32057.25 `.cfi_signal_frame' 3206======================== 3207 3208Mark current function as signal trampoline. 3209 32107.26 `.cfi_window_save' 3211======================= 3212 3213SPARC register window has been saved. 3214 32157.27 `.cfi_escape' EXPRESSION[, ...] 3216==================================== 3217 3218Allows the user to add arbitrary bytes to the unwind info. One might 3219use this to add OS-specific CFI opcodes, or generic CFI opcodes that 3220GAS does not yet support. 3221 32227.28 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL' 3223====================================================== 3224 3225The current value of REGISTER is LABEL. The value of LABEL will be 3226encoded in the output file according to ENCODING; see the description 3227of `.cfi_personality' for details on this encoding. 3228 3229 The usefulness of equating a register to a fixed label is probably 3230limited to the return address register. Here, it can be useful to mark 3231a code segment that has only one return address which is reached by a 3232direct branch and no copy of the return address exists in memory or 3233another register. 3234 3235 3236File: as.info, Node: LNS directives, Next: Long, Prev: Ln, Up: Pseudo Ops 3237 32387.29 `.file FILENO FILENAME' 3239============================ 3240 3241When emitting dwarf2 line number information `.file' assigns filenames 3242to the `.debug_line' file name table. The FILENO operand should be a 3243unique positive integer to use as the index of the entry in the table. 3244The FILENAME operand is a C string literal. 3245 3246 The detail of filename indices is exposed to the user because the 3247filename table is shared with the `.debug_info' section of the dwarf2 3248debugging information, and thus the user must know the exact indices 3249that table entries will have. 3250 32517.30 `.loc FILENO LINENO [COLUMN] [OPTIONS]' 3252============================================ 3253 3254The `.loc' directive will add row to the `.debug_line' line number 3255matrix corresponding to the immediately following assembly instruction. 3256The FILENO, LINENO, and optional COLUMN arguments will be applied to 3257the `.debug_line' state machine before the row is added. 3258 3259 The OPTIONS are a sequence of the following tokens in any order: 3260 3261`basic_block' 3262 This option will set the `basic_block' register in the 3263 `.debug_line' state machine to `true'. 3264 3265`prologue_end' 3266 This option will set the `prologue_end' register in the 3267 `.debug_line' state machine to `true'. 3268 3269`epilogue_begin' 3270 This option will set the `epilogue_begin' register in the 3271 `.debug_line' state machine to `true'. 3272 3273`is_stmt VALUE' 3274 This option will set the `is_stmt' register in the `.debug_line' 3275 state machine to `value', which must be either 0 or 1. 3276 3277`isa VALUE' 3278 This directive will set the `isa' register in the `.debug_line' 3279 state machine to VALUE, which must be an unsigned integer. 3280 3281 32827.31 `.loc_mark_labels ENABLE' 3283============================== 3284 3285The `.loc_mark_labels' directive makes the assembler emit an entry to 3286the `.debug_line' line number matrix with the `basic_block' register in 3287the state machine set whenever a code label is seen. The ENABLE 3288argument should be either 1 or 0, to enable or disable this function 3289respectively. 3290 3291 3292File: as.info, Node: Data, Next: Def, Prev: CFI directives, Up: Pseudo Ops 3293 32947.32 `.data SUBSECTION' 3295======================= 3296 3297`.data' tells `as' to assemble the following statements onto the end of 3298the data subsection numbered SUBSECTION (which is an absolute 3299expression). If SUBSECTION is omitted, it defaults to zero. 3300 3301 3302File: as.info, Node: Def, Next: Desc, Prev: Data, Up: Pseudo Ops 3303 33047.33 `.def NAME' 3305================ 3306 3307Begin defining debugging information for a symbol NAME; the definition 3308extends until the `.endef' directive is encountered. 3309 3310 3311File: as.info, Node: Desc, Next: Dim, Prev: Def, Up: Pseudo Ops 3312 33137.34 `.desc SYMBOL, ABS-EXPRESSION' 3314=================================== 3315 3316This directive sets the descriptor of the symbol (*note Symbol 3317Attributes::) to the low 16 bits of an absolute expression. 3318 3319 The `.desc' directive is not available when `as' is configured for 3320COFF output; it is only for `a.out' or `b.out' object format. For the 3321sake of compatibility, `as' accepts it, but produces no output, when 3322configured for COFF. 3323 3324 3325File: as.info, Node: Dim, Next: Double, Prev: Desc, Up: Pseudo Ops 3326 33277.35 `.dim' 3328=========== 3329 3330This directive is generated by compilers to include auxiliary debugging 3331information in the symbol table. It is only permitted inside 3332`.def'/`.endef' pairs. 3333 3334 3335File: as.info, Node: Double, Next: Eject, Prev: Dim, Up: Pseudo Ops 3336 33377.36 `.double FLONUMS' 3338====================== 3339 3340`.double' expects zero or more flonums, separated by commas. It 3341assembles floating point numbers. The exact kind of floating point 3342numbers emitted depends on how `as' is configured. *Note Machine 3343Dependencies::. 3344 3345 3346File: as.info, Node: Eject, Next: Else, Prev: Double, Up: Pseudo Ops 3347 33487.37 `.eject' 3349============= 3350 3351Force a page break at this point, when generating assembly listings. 3352 3353 3354File: as.info, Node: Else, Next: Elseif, Prev: Eject, Up: Pseudo Ops 3355 33567.38 `.else' 3357============ 3358 3359`.else' is part of the `as' support for conditional assembly; see *Note 3360`.if': If. It marks the beginning of a section of code to be assembled 3361if the condition for the preceding `.if' was false. 3362 3363 3364File: as.info, Node: Elseif, Next: End, Prev: Else, Up: Pseudo Ops 3365 33667.39 `.elseif' 3367============== 3368 3369`.elseif' is part of the `as' support for conditional assembly; see 3370*Note `.if': If. It is shorthand for beginning a new `.if' block that 3371would otherwise fill the entire `.else' section. 3372 3373 3374File: as.info, Node: End, Next: Endef, Prev: Elseif, Up: Pseudo Ops 3375 33767.40 `.end' 3377=========== 3378 3379`.end' marks the end of the assembly file. `as' does not process 3380anything in the file past the `.end' directive. 3381 3382 3383File: as.info, Node: Endef, Next: Endfunc, Prev: End, Up: Pseudo Ops 3384 33857.41 `.endef' 3386============= 3387 3388This directive flags the end of a symbol definition begun with `.def'. 3389 3390 3391File: as.info, Node: Endfunc, Next: Endif, Prev: Endef, Up: Pseudo Ops 3392 33937.42 `.endfunc' 3394=============== 3395 3396`.endfunc' marks the end of a function specified with `.func'. 3397 3398 3399File: as.info, Node: Endif, Next: Equ, Prev: Endfunc, Up: Pseudo Ops 3400 34017.43 `.endif' 3402============= 3403 3404`.endif' is part of the `as' support for conditional assembly; it marks 3405the end of a block of code that is only assembled conditionally. *Note 3406`.if': If. 3407 3408 3409File: as.info, Node: Equ, Next: Equiv, Prev: Endif, Up: Pseudo Ops 3410 34117.44 `.equ SYMBOL, EXPRESSION' 3412============================== 3413 3414This directive sets the value of SYMBOL to EXPRESSION. It is 3415synonymous with `.set'; see *Note `.set': Set. 3416 3417 The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'. 3418 3419 The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'. On the 3420Z80 it is an eror if SYMBOL is already defined, but the symbol is not 3421protected from later redefinition. Compare *Note Equiv::. 3422 3423 3424File: as.info, Node: Equiv, Next: Eqv, Prev: Equ, Up: Pseudo Ops 3425 34267.45 `.equiv SYMBOL, EXPRESSION' 3427================================ 3428 3429The `.equiv' directive is like `.equ' and `.set', except that the 3430assembler will signal an error if SYMBOL is already defined. Note a 3431symbol which has been referenced but not actually defined is considered 3432to be undefined. 3433 3434 Except for the contents of the error message, this is roughly 3435equivalent to 3436 .ifdef SYM 3437 .err 3438 .endif 3439 .equ SYM,VAL 3440 plus it protects the symbol from later redefinition. 3441 3442 3443File: as.info, Node: Eqv, Next: Err, Prev: Equiv, Up: Pseudo Ops 3444 34457.46 `.eqv SYMBOL, EXPRESSION' 3446============================== 3447 3448The `.eqv' directive is like `.equiv', but no attempt is made to 3449evaluate the expression or any part of it immediately. Instead each 3450time the resulting symbol is used in an expression, a snapshot of its 3451current value is taken. 3452 3453 3454File: as.info, Node: Err, Next: Error, Prev: Eqv, Up: Pseudo Ops 3455 34567.47 `.err' 3457=========== 3458 3459If `as' assembles a `.err' directive, it will print an error message 3460and, unless the `-Z' option was used, it will not generate an object 3461file. This can be used to signal an error in conditionally compiled 3462code. 3463 3464 3465File: as.info, Node: Error, Next: Exitm, Prev: Err, Up: Pseudo Ops 3466 34677.48 `.error "STRING"' 3468====================== 3469 3470Similarly to `.err', this directive emits an error, but you can specify 3471a string that will be emitted as the error message. If you don't 3472specify the message, it defaults to `".error directive invoked in 3473source file"'. *Note Error and Warning Messages: Errors. 3474 3475 .error "This code has not been assembled and tested." 3476 3477 3478File: as.info, Node: Exitm, Next: Extern, Prev: Error, Up: Pseudo Ops 3479 34807.49 `.exitm' 3481============= 3482 3483Exit early from the current macro definition. *Note Macro::. 3484 3485 3486File: as.info, Node: Extern, Next: Fail, Prev: Exitm, Up: Pseudo Ops 3487 34887.50 `.extern' 3489============== 3490 3491`.extern' is accepted in the source program--for compatibility with 3492other assemblers--but it is ignored. `as' treats all undefined symbols 3493as external. 3494 3495 3496File: as.info, Node: Fail, Next: File, Prev: Extern, Up: Pseudo Ops 3497 34987.51 `.fail EXPRESSION' 3499======================= 3500 3501Generates an error or a warning. If the value of the EXPRESSION is 500 3502or more, `as' will print a warning message. If the value is less than 3503500, `as' will print an error message. The message will include the 3504value of EXPRESSION. This can occasionally be useful inside complex 3505nested macros or conditional assembly. 3506 3507 3508File: as.info, Node: File, Next: Fill, Prev: Fail, Up: Pseudo Ops 3509 35107.52 `.file STRING' 3511=================== 3512 3513`.file' tells `as' that we are about to start a new logical file. 3514STRING is the new file name. In general, the filename is recognized 3515whether or not it is surrounded by quotes `"'; but if you wish to 3516specify an empty file name, you must give the quotes-`""'. This 3517statement may go away in future: it is only recognized to be compatible 3518with old `as' programs. 3519 3520 3521File: as.info, Node: Fill, Next: Float, Prev: File, Up: Pseudo Ops 3522 35237.53 `.fill REPEAT , SIZE , VALUE' 3524================================== 3525 3526REPEAT, SIZE and VALUE are absolute expressions. This emits REPEAT 3527copies of SIZE bytes. REPEAT may be zero or more. SIZE may be zero or 3528more, but if it is more than 8, then it is deemed to have the value 8, 3529compatible with other people's assemblers. The contents of each REPEAT 3530bytes is taken from an 8-byte number. The highest order 4 bytes are 3531zero. The lowest order 4 bytes are VALUE rendered in the byte-order of 3532an integer on the computer `as' is assembling for. Each SIZE bytes in 3533a repetition is taken from the lowest order SIZE bytes of this number. 3534Again, this bizarre behavior is compatible with other people's 3535assemblers. 3536 3537 SIZE and VALUE are optional. If the second comma and VALUE are 3538absent, VALUE is assumed zero. If the first comma and following tokens 3539are absent, SIZE is assumed to be 1. 3540 3541 3542File: as.info, Node: Float, Next: Func, Prev: Fill, Up: Pseudo Ops 3543 35447.54 `.float FLONUMS' 3545===================== 3546 3547This directive assembles zero or more flonums, separated by commas. It 3548has the same effect as `.single'. The exact kind of floating point 3549numbers emitted depends on how `as' is configured. *Note Machine 3550Dependencies::. 3551 3552 3553File: as.info, Node: Func, Next: Global, Prev: Float, Up: Pseudo Ops 3554 35557.55 `.func NAME[,LABEL]' 3556========================= 3557 3558`.func' emits debugging information to denote function NAME, and is 3559ignored unless the file is assembled with debugging enabled. Only 3560`--gstabs[+]' is currently supported. LABEL is the entry point of the 3561function and if omitted NAME prepended with the `leading char' is used. 3562`leading char' is usually `_' or nothing, depending on the target. All 3563functions are currently defined to have `void' return type. The 3564function must be terminated with `.endfunc'. 3565 3566 3567File: as.info, Node: Global, Next: Gnu_attribute, Prev: Func, Up: Pseudo Ops 3568 35697.56 `.global SYMBOL', `.globl SYMBOL' 3570====================================== 3571 3572`.global' makes the symbol visible to `ld'. If you define SYMBOL in 3573your partial program, its value is made available to other partial 3574programs that are linked with it. Otherwise, SYMBOL takes its 3575attributes from a symbol of the same name from another file linked into 3576the same program. 3577 3578 Both spellings (`.globl' and `.global') are accepted, for 3579compatibility with other assemblers. 3580 3581 On the HPPA, `.global' is not always enough to make it accessible to 3582other partial programs. You may need the HPPA-only `.EXPORT' directive 3583as well. *Note HPPA Assembler Directives: HPPA Directives. 3584 3585 3586File: as.info, Node: Gnu_attribute, Next: Hidden, Prev: Global, Up: Pseudo Ops 3587 35887.57 `.gnu_attribute TAG,VALUE' 3589=============================== 3590 3591Record a GNU object attribute for this file. *Note Object Attributes::. 3592 3593 3594File: as.info, Node: Hidden, Next: hword, Prev: Gnu_attribute, Up: Pseudo Ops 3595 35967.58 `.hidden NAMES' 3597==================== 3598 3599This is one of the ELF visibility directives. The other two are 3600`.internal' (*note `.internal': Internal.) and `.protected' (*note 3601`.protected': Protected.). 3602 3603 This directive overrides the named symbols default visibility (which 3604is set by their binding: local, global or weak). The directive sets 3605the visibility to `hidden' which means that the symbols are not visible 3606to other components. Such symbols are always considered to be 3607`protected' as well. 3608 3609 3610File: as.info, Node: hword, Next: Ident, Prev: Hidden, Up: Pseudo Ops 3611 36127.59 `.hword EXPRESSIONS' 3613========================= 3614 3615This expects zero or more EXPRESSIONS, and emits a 16 bit number for 3616each. 3617 3618 This directive is a synonym for `.short'; depending on the target 3619architecture, it may also be a synonym for `.word'. 3620 3621 3622File: as.info, Node: Ident, Next: If, Prev: hword, Up: Pseudo Ops 3623 36247.60 `.ident' 3625============= 3626 3627This directive is used by some assemblers to place tags in object 3628files. The behavior of this directive varies depending on the target. 3629When using the a.out object file format, `as' simply accepts the 3630directive for source-file compatibility with existing assemblers, but 3631does not emit anything for it. When using COFF, comments are emitted 3632to the `.comment' or `.rdata' section, depending on the target. When 3633using ELF, comments are emitted to the `.comment' section. 3634 3635 3636File: as.info, Node: If, Next: Incbin, Prev: Ident, Up: Pseudo Ops 3637 36387.61 `.if ABSOLUTE EXPRESSION' 3639============================== 3640 3641`.if' marks the beginning of a section of code which is only considered 3642part of the source program being assembled if the argument (which must 3643be an ABSOLUTE EXPRESSION) is non-zero. The end of the conditional 3644section of code must be marked by `.endif' (*note `.endif': Endif.); 3645optionally, you may include code for the alternative condition, flagged 3646by `.else' (*note `.else': Else.). If you have several conditions to 3647check, `.elseif' may be used to avoid nesting blocks if/else within 3648each subsequent `.else' block. 3649 3650 The following variants of `.if' are also supported: 3651`.ifdef SYMBOL' 3652 Assembles the following section of code if the specified SYMBOL 3653 has been defined. Note a symbol which has been referenced but not 3654 yet defined is considered to be undefined. 3655 3656`.ifb TEXT' 3657 Assembles the following section of code if the operand is blank 3658 (empty). 3659 3660`.ifc STRING1,STRING2' 3661 Assembles the following section of code if the two strings are the 3662 same. The strings may be optionally quoted with single quotes. 3663 If they are not quoted, the first string stops at the first comma, 3664 and the second string stops at the end of the line. Strings which 3665 contain whitespace should be quoted. The string comparison is 3666 case sensitive. 3667 3668`.ifeq ABSOLUTE EXPRESSION' 3669 Assembles the following section of code if the argument is zero. 3670 3671`.ifeqs STRING1,STRING2' 3672 Another form of `.ifc'. The strings must be quoted using double 3673 quotes. 3674 3675`.ifge ABSOLUTE EXPRESSION' 3676 Assembles the following section of code if the argument is greater 3677 than or equal to zero. 3678 3679`.ifgt ABSOLUTE EXPRESSION' 3680 Assembles the following section of code if the argument is greater 3681 than zero. 3682 3683`.ifle ABSOLUTE EXPRESSION' 3684 Assembles the following section of code if the argument is less 3685 than or equal to zero. 3686 3687`.iflt ABSOLUTE EXPRESSION' 3688 Assembles the following section of code if the argument is less 3689 than zero. 3690 3691`.ifnb TEXT' 3692 Like `.ifb', but the sense of the test is reversed: this assembles 3693 the following section of code if the operand is non-blank 3694 (non-empty). 3695 3696`.ifnc STRING1,STRING2.' 3697 Like `.ifc', but the sense of the test is reversed: this assembles 3698 the following section of code if the two strings are not the same. 3699 3700`.ifndef SYMBOL' 3701`.ifnotdef SYMBOL' 3702 Assembles the following section of code if the specified SYMBOL 3703 has not been defined. Both spelling variants are equivalent. 3704 Note a symbol which has been referenced but not yet defined is 3705 considered to be undefined. 3706 3707`.ifne ABSOLUTE EXPRESSION' 3708 Assembles the following section of code if the argument is not 3709 equal to zero (in other words, this is equivalent to `.if'). 3710 3711`.ifnes STRING1,STRING2' 3712 Like `.ifeqs', but the sense of the test is reversed: this 3713 assembles the following section of code if the two strings are not 3714 the same. 3715 3716 3717File: as.info, Node: Incbin, Next: Include, Prev: If, Up: Pseudo Ops 3718 37197.62 `.incbin "FILE"[,SKIP[,COUNT]]' 3720==================================== 3721 3722The `incbin' directive includes FILE verbatim at the current location. 3723You can control the search paths used with the `-I' command-line option 3724(*note Command-Line Options: Invoking.). Quotation marks are required 3725around FILE. 3726 3727 The SKIP argument skips a number of bytes from the start of the 3728FILE. The COUNT argument indicates the maximum number of bytes to 3729read. Note that the data is not aligned in any way, so it is the user's 3730responsibility to make sure that proper alignment is provided both 3731before and after the `incbin' directive. 3732 3733 3734File: as.info, Node: Include, Next: Int, Prev: Incbin, Up: Pseudo Ops 3735 37367.63 `.include "FILE"' 3737====================== 3738 3739This directive provides a way to include supporting files at specified 3740points in your source program. The code from FILE is assembled as if 3741it followed the point of the `.include'; when the end of the included 3742file is reached, assembly of the original file continues. You can 3743control the search paths used with the `-I' command-line option (*note 3744Command-Line Options: Invoking.). Quotation marks are required around 3745FILE. 3746 3747 3748File: as.info, Node: Int, Next: Internal, Prev: Include, Up: Pseudo Ops 3749 37507.64 `.int EXPRESSIONS' 3751======================= 3752 3753Expect zero or more EXPRESSIONS, of any section, separated by commas. 3754For each expression, emit a number that, at run time, is the value of 3755that expression. The byte order and bit size of the number depends on 3756what kind of target the assembly is for. 3757 3758 3759File: as.info, Node: Internal, Next: Irp, Prev: Int, Up: Pseudo Ops 3760 37617.65 `.internal NAMES' 3762====================== 3763 3764This is one of the ELF visibility directives. The other two are 3765`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note 3766`.protected': Protected.). 3767 3768 This directive overrides the named symbols default visibility (which 3769is set by their binding: local, global or weak). The directive sets 3770the visibility to `internal' which means that the symbols are 3771considered to be `hidden' (i.e., not visible to other components), and 3772that some extra, processor specific processing must also be performed 3773upon the symbols as well. 3774 3775 3776File: as.info, Node: Irp, Next: Irpc, Prev: Internal, Up: Pseudo Ops 3777 37787.66 `.irp SYMBOL,VALUES'... 3779============================ 3780 3781Evaluate a sequence of statements assigning different values to SYMBOL. 3782The sequence of statements starts at the `.irp' directive, and is 3783terminated by an `.endr' directive. For each VALUE, SYMBOL is set to 3784VALUE, and the sequence of statements is assembled. If no VALUE is 3785listed, the sequence of statements is assembled once, with SYMBOL set 3786to the null string. To refer to SYMBOL within the sequence of 3787statements, use \SYMBOL. 3788 3789 For example, assembling 3790 3791 .irp param,1,2,3 3792 move d\param,sp@- 3793 .endr 3794 3795 is equivalent to assembling 3796 3797 move d1,sp@- 3798 move d2,sp@- 3799 move d3,sp@- 3800 3801 For some caveats with the spelling of SYMBOL, see also *Note Macro::. 3802 3803 3804File: as.info, Node: Irpc, Next: Lcomm, Prev: Irp, Up: Pseudo Ops 3805 38067.67 `.irpc SYMBOL,VALUES'... 3807============================= 3808 3809Evaluate a sequence of statements assigning different values to SYMBOL. 3810The sequence of statements starts at the `.irpc' directive, and is 3811terminated by an `.endr' directive. For each character in VALUE, 3812SYMBOL is set to the character, and the sequence of statements is 3813assembled. If no VALUE is listed, the sequence of statements is 3814assembled once, with SYMBOL set to the null string. To refer to SYMBOL 3815within the sequence of statements, use \SYMBOL. 3816 3817 For example, assembling 3818 3819 .irpc param,123 3820 move d\param,sp@- 3821 .endr 3822 3823 is equivalent to assembling 3824 3825 move d1,sp@- 3826 move d2,sp@- 3827 move d3,sp@- 3828 3829 For some caveats with the spelling of SYMBOL, see also the discussion 3830at *Note Macro::. 3831 3832 3833File: as.info, Node: Lcomm, Next: Lflags, Prev: Irpc, Up: Pseudo Ops 3834 38357.68 `.lcomm SYMBOL , LENGTH' 3836============================= 3837 3838Reserve LENGTH (an absolute expression) bytes for a local common 3839denoted by SYMBOL. The section and value of SYMBOL are those of the 3840new local common. The addresses are allocated in the bss section, so 3841that at run-time the bytes start off zeroed. SYMBOL is not declared 3842global (*note `.global': Global.), so is normally not visible to `ld'. 3843 3844 Some targets permit a third argument to be used with `.lcomm'. This 3845argument specifies the desired alignment of the symbol in the bss 3846section. 3847 3848 The syntax for `.lcomm' differs slightly on the HPPA. The syntax is 3849`SYMBOL .lcomm, LENGTH'; SYMBOL is optional. 3850 3851 3852File: as.info, Node: Lflags, Next: Line, Prev: Lcomm, Up: Pseudo Ops 3853 38547.69 `.lflags' 3855============== 3856 3857`as' accepts this directive, for compatibility with other assemblers, 3858but ignores it. 3859 3860 3861File: as.info, Node: Line, Next: Linkonce, Prev: Lflags, Up: Pseudo Ops 3862 38637.70 `.line LINE-NUMBER' 3864======================== 3865 3866 Change the logical line number. LINE-NUMBER must be an absolute 3867expression. The next line has that logical line number. Therefore any 3868other statements on the current line (after a statement separator 3869character) are reported as on logical line number LINE-NUMBER - 1. One 3870day `as' will no longer support this directive: it is recognized only 3871for compatibility with existing assembler programs. 3872 3873 Even though this is a directive associated with the `a.out' or 3874`b.out' object-code formats, `as' still recognizes it when producing 3875COFF output, and treats `.line' as though it were the COFF `.ln' _if_ 3876it is found outside a `.def'/`.endef' pair. 3877 3878 Inside a `.def', `.line' is, instead, one of the directives used by 3879compilers to generate auxiliary symbol information for debugging. 3880 3881 3882File: as.info, Node: Linkonce, Next: List, Prev: Line, Up: Pseudo Ops 3883 38847.71 `.linkonce [TYPE]' 3885======================= 3886 3887Mark the current section so that the linker only includes a single copy 3888of it. This may be used to include the same section in several 3889different object files, but ensure that the linker will only include it 3890once in the final output file. The `.linkonce' pseudo-op must be used 3891for each instance of the section. Duplicate sections are detected 3892based on the section name, so it should be unique. 3893 3894 This directive is only supported by a few object file formats; as of 3895this writing, the only object file format which supports it is the 3896Portable Executable format used on Windows NT. 3897 3898 The TYPE argument is optional. If specified, it must be one of the 3899following strings. For example: 3900 .linkonce same_size 3901 Not all types may be supported on all object file formats. 3902 3903`discard' 3904 Silently discard duplicate sections. This is the default. 3905 3906`one_only' 3907 Warn if there are duplicate sections, but still keep only one copy. 3908 3909`same_size' 3910 Warn if any of the duplicates have different sizes. 3911 3912`same_contents' 3913 Warn if any of the duplicates do not have exactly the same 3914 contents. 3915 3916 3917File: as.info, Node: Ln, Next: LNS directives, Prev: List, Up: Pseudo Ops 3918 39197.72 `.ln LINE-NUMBER' 3920====================== 3921 3922`.ln' is a synonym for `.line'. 3923 3924 3925File: as.info, Node: MRI, Next: Noaltmacro, Prev: Macro, Up: Pseudo Ops 3926 39277.73 `.mri VAL' 3928=============== 3929 3930If VAL is non-zero, this tells `as' to enter MRI mode. If VAL is zero, 3931this tells `as' to exit MRI mode. This change affects code assembled 3932until the next `.mri' directive, or until the end of the file. *Note 3933MRI mode: M. 3934 3935 3936File: as.info, Node: List, Next: Ln, Prev: Linkonce, Up: Pseudo Ops 3937 39387.74 `.list' 3939============ 3940 3941Control (in conjunction with the `.nolist' directive) whether or not 3942assembly listings are generated. These two directives maintain an 3943internal counter (which is zero initially). `.list' increments the 3944counter, and `.nolist' decrements it. Assembly listings are generated 3945whenever the counter is greater than zero. 3946 3947 By default, listings are disabled. When you enable them (with the 3948`-a' command line option; *note Command-Line Options: Invoking.), the 3949initial value of the listing counter is one. 3950 3951 3952File: as.info, Node: Long, Next: Macro, Prev: LNS directives, Up: Pseudo Ops 3953 39547.75 `.long EXPRESSIONS' 3955======================== 3956 3957`.long' is the same as `.int'. *Note `.int': Int. 3958 3959 3960File: as.info, Node: Macro, Next: MRI, Prev: Long, Up: Pseudo Ops 3961 39627.76 `.macro' 3963============= 3964 3965The commands `.macro' and `.endm' allow you to define macros that 3966generate assembly output. For example, this definition specifies a 3967macro `sum' that puts a sequence of numbers into memory: 3968 3969 .macro sum from=0, to=5 3970 .long \from 3971 .if \to-\from 3972 sum "(\from+1)",\to 3973 .endif 3974 .endm 3975 3976With that definition, `SUM 0,5' is equivalent to this assembly input: 3977 3978 .long 0 3979 .long 1 3980 .long 2 3981 .long 3 3982 .long 4 3983 .long 5 3984 3985`.macro MACNAME' 3986`.macro MACNAME MACARGS ...' 3987 Begin the definition of a macro called MACNAME. If your macro 3988 definition requires arguments, specify their names after the macro 3989 name, separated by commas or spaces. You can qualify the macro 3990 argument to indicate whether all invocations must specify a 3991 non-blank value (through `:`req''), or whether it takes all of the 3992 remaining arguments (through `:`vararg''). You can supply a 3993 default value for any macro argument by following the name with 3994 `=DEFLT'. You cannot define two macros with the same MACNAME 3995 unless it has been subject to the `.purgem' directive (*note 3996 Purgem::) between the two definitions. For example, these are all 3997 valid `.macro' statements: 3998 3999 `.macro comm' 4000 Begin the definition of a macro called `comm', which takes no 4001 arguments. 4002 4003 `.macro plus1 p, p1' 4004 `.macro plus1 p p1' 4005 Either statement begins the definition of a macro called 4006 `plus1', which takes two arguments; within the macro 4007 definition, write `\p' or `\p1' to evaluate the arguments. 4008 4009 `.macro reserve_str p1=0 p2' 4010 Begin the definition of a macro called `reserve_str', with two 4011 arguments. The first argument has a default value, but not 4012 the second. After the definition is complete, you can call 4013 the macro either as `reserve_str A,B' (with `\p1' evaluating 4014 to A and `\p2' evaluating to B), or as `reserve_str ,B' (with 4015 `\p1' evaluating as the default, in this case `0', and `\p2' 4016 evaluating to B). 4017 4018 `.macro m p1:req, p2=0, p3:vararg' 4019 Begin the definition of a macro called `m', with at least 4020 three arguments. The first argument must always have a value 4021 specified, but not the second, which instead has a default 4022 value. The third formal will get assigned all remaining 4023 arguments specified at invocation time. 4024 4025 When you call a macro, you can specify the argument values 4026 either by position, or by keyword. For example, `sum 9,17' 4027 is equivalent to `sum to=17, from=9'. 4028 4029 4030 Note that since each of the MACARGS can be an identifier exactly 4031 as any other one permitted by the target architecture, there may be 4032 occasional problems if the target hand-crafts special meanings to 4033 certain characters when they occur in a special position. For 4034 example, if the colon (`:') is generally permitted to be part of a 4035 symbol name, but the architecture specific code special-cases it 4036 when occurring as the final character of a symbol (to denote a 4037 label), then the macro parameter replacement code will have no way 4038 of knowing that and consider the whole construct (including the 4039 colon) an identifier, and check only this identifier for being the 4040 subject to parameter substitution. So for example this macro 4041 definition: 4042 4043 .macro label l 4044 \l: 4045 .endm 4046 4047 might not work as expected. Invoking `label foo' might not create 4048 a label called `foo' but instead just insert the text `\l:' into 4049 the assembler source, probably generating an error about an 4050 unrecognised identifier. 4051 4052 Similarly problems might occur with the period character (`.') 4053 which is often allowed inside opcode names (and hence identifier 4054 names). So for example constructing a macro to build an opcode 4055 from a base name and a length specifier like this: 4056 4057 .macro opcode base length 4058 \base.\length 4059 .endm 4060 4061 and invoking it as `opcode store l' will not create a `store.l' 4062 instruction but instead generate some kind of error as the 4063 assembler tries to interpret the text `\base.\length'. 4064 4065 There are several possible ways around this problem: 4066 4067 `Insert white space' 4068 If it is possible to use white space characters then this is 4069 the simplest solution. eg: 4070 4071 .macro label l 4072 \l : 4073 .endm 4074 4075 `Use `\()'' 4076 The string `\()' can be used to separate the end of a macro 4077 argument from the following text. eg: 4078 4079 .macro opcode base length 4080 \base\().\length 4081 .endm 4082 4083 `Use the alternate macro syntax mode' 4084 In the alternative macro syntax mode the ampersand character 4085 (`&') can be used as a separator. eg: 4086 4087 .altmacro 4088 .macro label l 4089 l&: 4090 .endm 4091 4092 Note: this problem of correctly identifying string parameters to 4093 pseudo ops also applies to the identifiers used in `.irp' (*note 4094 Irp::) and `.irpc' (*note Irpc::) as well. 4095 4096`.endm' 4097 Mark the end of a macro definition. 4098 4099`.exitm' 4100 Exit early from the current macro definition. 4101 4102`\@' 4103 `as' maintains a counter of how many macros it has executed in 4104 this pseudo-variable; you can copy that number to your output with 4105 `\@', but _only within a macro definition_. 4106 4107`LOCAL NAME [ , ... ]' 4108 _Warning: `LOCAL' is only available if you select "alternate macro 4109 syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro': 4110 Altmacro. 4111 4112 4113File: as.info, Node: Altmacro, Next: Ascii, Prev: Align, Up: Pseudo Ops 4114 41157.77 `.altmacro' 4116================ 4117 4118Enable alternate macro mode, enabling: 4119 4120`LOCAL NAME [ , ... ]' 4121 One additional directive, `LOCAL', is available. It is used to 4122 generate a string replacement for each of the NAME arguments, and 4123 replace any instances of NAME in each macro expansion. The 4124 replacement string is unique in the assembly, and different for 4125 each separate macro expansion. `LOCAL' allows you to write macros 4126 that define symbols, without fear of conflict between separate 4127 macro expansions. 4128 4129`String delimiters' 4130 You can write strings delimited in these other ways besides 4131 `"STRING"': 4132 4133 `'STRING'' 4134 You can delimit strings with single-quote characters. 4135 4136 `<STRING>' 4137 You can delimit strings with matching angle brackets. 4138 4139`single-character string escape' 4140 To include any single character literally in a string (even if the 4141 character would otherwise have some special meaning), you can 4142 prefix the character with `!' (an exclamation mark). For example, 4143 you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 > 4144 5.4!'. 4145 4146`Expression results as strings' 4147 You can write `%EXPR' to evaluate the expression EXPR and use the 4148 result as a string. 4149 4150 4151File: as.info, Node: Noaltmacro, Next: Nolist, Prev: MRI, Up: Pseudo Ops 4152 41537.78 `.noaltmacro' 4154================== 4155 4156Disable alternate macro mode. *Note Altmacro::. 4157 4158 4159File: as.info, Node: Nolist, Next: Octa, Prev: Noaltmacro, Up: Pseudo Ops 4160 41617.79 `.nolist' 4162============== 4163 4164Control (in conjunction with the `.list' directive) whether or not 4165assembly listings are generated. These two directives maintain an 4166internal counter (which is zero initially). `.list' increments the 4167counter, and `.nolist' decrements it. Assembly listings are generated 4168whenever the counter is greater than zero. 4169 4170 4171File: as.info, Node: Octa, Next: Org, Prev: Nolist, Up: Pseudo Ops 4172 41737.80 `.octa BIGNUMS' 4174==================== 4175 4176This directive expects zero or more bignums, separated by commas. For 4177each bignum, it emits a 16-byte integer. 4178 4179 The term "octa" comes from contexts in which a "word" is two bytes; 4180hence _octa_-word for 16 bytes. 4181 4182 4183File: as.info, Node: Org, Next: P2align, Prev: Octa, Up: Pseudo Ops 4184 41857.81 `.org NEW-LC , FILL' 4186========================= 4187 4188Advance the location counter of the current section to NEW-LC. NEW-LC 4189is either an absolute expression or an expression with the same section 4190as the current subsection. That is, you can't use `.org' to cross 4191sections: if NEW-LC has the wrong section, the `.org' directive is 4192ignored. To be compatible with former assemblers, if the section of 4193NEW-LC is absolute, `as' issues a warning, then pretends the section of 4194NEW-LC is the same as the current subsection. 4195 4196 `.org' may only increase the location counter, or leave it 4197unchanged; you cannot use `.org' to move the location counter backwards. 4198 4199 Because `as' tries to assemble programs in one pass, NEW-LC may not 4200be undefined. If you really detest this restriction we eagerly await a 4201chance to share your improved assembler. 4202 4203 Beware that the origin is relative to the start of the section, not 4204to the start of the subsection. This is compatible with other people's 4205assemblers. 4206 4207 When the location counter (of the current subsection) is advanced, 4208the intervening bytes are filled with FILL which should be an absolute 4209expression. If the comma and FILL are omitted, FILL defaults to zero. 4210 4211 4212File: as.info, Node: P2align, Next: PopSection, Prev: Org, Up: Pseudo Ops 4213 42147.82 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR' 4215================================================ 4216 4217Pad the location counter (in the current subsection) to a particular 4218storage boundary. The first expression (which must be absolute) is the 4219number of low-order zero bits the location counter must have after 4220advancement. For example `.p2align 3' advances the location counter 4221until it a multiple of 8. If the location counter is already a 4222multiple of 8, no change is needed. 4223 4224 The second expression (also absolute) gives the fill value to be 4225stored in the padding bytes. It (and the comma) may be omitted. If it 4226is omitted, the padding bytes are normally zero. However, on some 4227systems, if the section is marked as containing code and the fill value 4228is omitted, the space is filled with no-op instructions. 4229 4230 The third expression is also absolute, and is also optional. If it 4231is present, it is the maximum number of bytes that should be skipped by 4232this alignment directive. If doing the alignment would require 4233skipping more bytes than the specified maximum, then the alignment is 4234not done at all. You can omit the fill value (the second argument) 4235entirely by simply using two commas after the required alignment; this 4236can be useful if you want the alignment to be filled with no-op 4237instructions when appropriate. 4238 4239 The `.p2alignw' and `.p2alignl' directives are variants of the 4240`.p2align' directive. The `.p2alignw' directive treats the fill 4241pattern as a two byte word value. The `.p2alignl' directives treats the 4242fill pattern as a four byte longword value. For example, `.p2alignw 42432,0x368d' will align to a multiple of 4. If it skips two bytes, they 4244will be filled in with the value 0x368d (the exact placement of the 4245bytes depends upon the endianness of the processor). If it skips 1 or 42463 bytes, the fill value is undefined. 4247 4248 4249File: as.info, Node: Previous, Next: Print, Prev: PopSection, Up: Pseudo Ops 4250 42517.83 `.previous' 4252================ 4253 4254This is one of the ELF section stack manipulation directives. The 4255others are `.section' (*note Section::), `.subsection' (*note 4256SubSection::), `.pushsection' (*note PushSection::), and `.popsection' 4257(*note PopSection::). 4258 4259 This directive swaps the current section (and subsection) with most 4260recently referenced section/subsection pair prior to this one. Multiple 4261`.previous' directives in a row will flip between two sections (and 4262their subsections). For example: 4263 4264 .section A 4265 .subsection 1 4266 .word 0x1234 4267 .subsection 2 4268 .word 0x5678 4269 .previous 4270 .word 0x9abc 4271 4272 Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into 4273subsection 2 of section A. Whilst: 4274 4275 .section A 4276 .subsection 1 4277 # Now in section A subsection 1 4278 .word 0x1234 4279 .section B 4280 .subsection 0 4281 # Now in section B subsection 0 4282 .word 0x5678 4283 .subsection 1 4284 # Now in section B subsection 1 4285 .word 0x9abc 4286 .previous 4287 # Now in section B subsection 0 4288 .word 0xdef0 4289 4290 Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection 42910 of section B and 0x9abc into subsection 1 of section B. 4292 4293 In terms of the section stack, this directive swaps the current 4294section with the top section on the section stack. 4295 4296 4297File: as.info, Node: PopSection, Next: Previous, Prev: P2align, Up: Pseudo Ops 4298 42997.84 `.popsection' 4300================== 4301 4302This is one of the ELF section stack manipulation directives. The 4303others are `.section' (*note Section::), `.subsection' (*note 4304SubSection::), `.pushsection' (*note PushSection::), and `.previous' 4305(*note Previous::). 4306 4307 This directive replaces the current section (and subsection) with 4308the top section (and subsection) on the section stack. This section is 4309popped off the stack. 4310 4311 4312File: as.info, Node: Print, Next: Protected, Prev: Previous, Up: Pseudo Ops 4313 43147.85 `.print STRING' 4315==================== 4316 4317`as' will print STRING on the standard output during assembly. You 4318must put STRING in double quotes. 4319 4320 4321File: as.info, Node: Protected, Next: Psize, Prev: Print, Up: Pseudo Ops 4322 43237.86 `.protected NAMES' 4324======================= 4325 4326This is one of the ELF visibility directives. The other two are 4327`.hidden' (*note Hidden::) and `.internal' (*note Internal::). 4328 4329 This directive overrides the named symbols default visibility (which 4330is set by their binding: local, global or weak). The directive sets 4331the visibility to `protected' which means that any references to the 4332symbols from within the components that defines them must be resolved 4333to the definition in that component, even if a definition in another 4334component would normally preempt this. 4335 4336 4337File: as.info, Node: Psize, Next: Purgem, Prev: Protected, Up: Pseudo Ops 4338 43397.87 `.psize LINES , COLUMNS' 4340============================= 4341 4342Use this directive to declare the number of lines--and, optionally, the 4343number of columns--to use for each page, when generating listings. 4344 4345 If you do not use `.psize', listings use a default line-count of 60. 4346You may omit the comma and COLUMNS specification; the default width is 4347200 columns. 4348 4349 `as' generates formfeeds whenever the specified number of lines is 4350exceeded (or whenever you explicitly request one, using `.eject'). 4351 4352 If you specify LINES as `0', no formfeeds are generated save those 4353explicitly specified with `.eject'. 4354 4355 4356File: as.info, Node: Purgem, Next: PushSection, Prev: Psize, Up: Pseudo Ops 4357 43587.88 `.purgem NAME' 4359=================== 4360 4361Undefine the macro NAME, so that later uses of the string will not be 4362expanded. *Note Macro::. 4363 4364 4365File: as.info, Node: PushSection, Next: Quad, Prev: Purgem, Up: Pseudo Ops 4366 43677.89 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]' 4368======================================================================== 4369 4370This is one of the ELF section stack manipulation directives. The 4371others are `.section' (*note Section::), `.subsection' (*note 4372SubSection::), `.popsection' (*note PopSection::), and `.previous' 4373(*note Previous::). 4374 4375 This directive pushes the current section (and subsection) onto the 4376top of the section stack, and then replaces the current section and 4377subsection with `name' and `subsection'. The optional `flags', `type' 4378and `arguments' are treated the same as in the `.section' (*note 4379Section::) directive. 4380 4381 4382File: as.info, Node: Quad, Next: Reloc, Prev: PushSection, Up: Pseudo Ops 4383 43847.90 `.quad BIGNUMS' 4385==================== 4386 4387`.quad' expects zero or more bignums, separated by commas. For each 4388bignum, it emits an 8-byte integer. If the bignum won't fit in 8 4389bytes, it prints a warning message; and just takes the lowest order 8 4390bytes of the bignum. 4391 4392 The term "quad" comes from contexts in which a "word" is two bytes; 4393hence _quad_-word for 8 bytes. 4394 4395 4396File: as.info, Node: Reloc, Next: Rept, Prev: Quad, Up: Pseudo Ops 4397 43987.91 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]' 4399============================================== 4400 4401Generate a relocation at OFFSET of type RELOC_NAME with value 4402EXPRESSION. If OFFSET is a number, the relocation is generated in the 4403current section. If OFFSET is an expression that resolves to a symbol 4404plus offset, the relocation is generated in the given symbol's section. 4405EXPRESSION, if present, must resolve to a symbol plus addend or to an 4406absolute value, but note that not all targets support an addend. e.g. 4407ELF REL targets such as i386 store an addend in the section contents 4408rather than in the relocation. This low level interface does not 4409support addends stored in the section. 4410 4411 4412File: as.info, Node: Rept, Next: Sbttl, Prev: Reloc, Up: Pseudo Ops 4413 44147.92 `.rept COUNT' 4415================== 4416 4417Repeat the sequence of lines between the `.rept' directive and the next 4418`.endr' directive COUNT times. 4419 4420 For example, assembling 4421 4422 .rept 3 4423 .long 0 4424 .endr 4425 4426 is equivalent to assembling 4427 4428 .long 0 4429 .long 0 4430 .long 0 4431 4432 4433File: as.info, Node: Sbttl, Next: Scl, Prev: Rept, Up: Pseudo Ops 4434 44357.93 `.sbttl "SUBHEADING"' 4436========================== 4437 4438Use SUBHEADING as the title (third line, immediately after the title 4439line) when generating assembly listings. 4440 4441 This directive affects subsequent pages, as well as the current page 4442if it appears within ten lines of the top of a page. 4443 4444 4445File: as.info, Node: Scl, Next: Section, Prev: Sbttl, Up: Pseudo Ops 4446 44477.94 `.scl CLASS' 4448================= 4449 4450Set the storage-class value for a symbol. This directive may only be 4451used inside a `.def'/`.endef' pair. Storage class may flag whether a 4452symbol is static or external, or it may record further symbolic 4453debugging information. 4454 4455 4456File: as.info, Node: Section, Next: Set, Prev: Scl, Up: Pseudo Ops 4457 44587.95 `.section NAME' 4459==================== 4460 4461Use the `.section' directive to assemble the following code into a 4462section named NAME. 4463 4464 This directive is only supported for targets that actually support 4465arbitrarily named sections; on `a.out' targets, for example, it is not 4466accepted, even with a standard `a.out' section name. 4467 4468COFF Version 4469------------ 4470 4471 For COFF targets, the `.section' directive is used in one of the 4472following ways: 4473 4474 .section NAME[, "FLAGS"] 4475 .section NAME[, SUBSECTION] 4476 4477 If the optional argument is quoted, it is taken as flags to use for 4478the section. Each flag is a single character. The following flags are 4479recognized: 4480`b' 4481 bss section (uninitialized data) 4482 4483`n' 4484 section is not loaded 4485 4486`w' 4487 writable section 4488 4489`d' 4490 data section 4491 4492`r' 4493 read-only section 4494 4495`x' 4496 executable section 4497 4498`s' 4499 shared section (meaningful for PE targets) 4500 4501`a' 4502 ignored. (For compatibility with the ELF version) 4503 4504 If no flags are specified, the default flags depend upon the section 4505name. If the section name is not recognized, the default will be for 4506the section to be loaded and writable. Note the `n' and `w' flags 4507remove attributes from the section, rather than adding them, so if they 4508are used on their own it will be as if no flags had been specified at 4509all. 4510 4511 If the optional argument to the `.section' directive is not quoted, 4512it is taken as a subsection number (*note Sub-Sections::). 4513 4514ELF Version 4515----------- 4516 4517 This is one of the ELF section stack manipulation directives. The 4518others are `.subsection' (*note SubSection::), `.pushsection' (*note 4519PushSection::), `.popsection' (*note PopSection::), and `.previous' 4520(*note Previous::). 4521 4522 For ELF targets, the `.section' directive is used like this: 4523 4524 .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]] 4525 4526 The optional FLAGS argument is a quoted string which may contain any 4527combination of the following characters: 4528`a' 4529 section is allocatable 4530 4531`w' 4532 section is writable 4533 4534`x' 4535 section is executable 4536 4537`M' 4538 section is mergeable 4539 4540`S' 4541 section contains zero terminated strings 4542 4543`G' 4544 section is a member of a section group 4545 4546`T' 4547 section is used for thread-local-storage 4548 4549 The optional TYPE argument may contain one of the following 4550constants: 4551`@progbits' 4552 section contains data 4553 4554`@nobits' 4555 section does not contain data (i.e., section only occupies space) 4556 4557`@note' 4558 section contains data which is used by things other than the 4559 program 4560 4561`@init_array' 4562 section contains an array of pointers to init functions 4563 4564`@fini_array' 4565 section contains an array of pointers to finish functions 4566 4567`@preinit_array' 4568 section contains an array of pointers to pre-init functions 4569 4570 Many targets only support the first three section types. 4571 4572 Note on targets where the `@' character is the start of a comment (eg 4573ARM) then another character is used instead. For example the ARM port 4574uses the `%' character. 4575 4576 If FLAGS contains the `M' symbol then the TYPE argument must be 4577specified as well as an extra argument--ENTSIZE--like this: 4578 4579 .section NAME , "FLAGS"M, @TYPE, ENTSIZE 4580 4581 Sections with the `M' flag but not `S' flag must contain fixed size 4582constants, each ENTSIZE octets long. Sections with both `M' and `S' 4583must contain zero terminated strings where each character is ENTSIZE 4584bytes long. The linker may remove duplicates within sections with the 4585same name, same entity size and same flags. ENTSIZE must be an 4586absolute expression. 4587 4588 If FLAGS contains the `G' symbol then the TYPE argument must be 4589present along with an additional field like this: 4590 4591 .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE] 4592 4593 The GROUPNAME field specifies the name of the section group to which 4594this particular section belongs. The optional linkage field can 4595contain: 4596`comdat' 4597 indicates that only one copy of this section should be retained 4598 4599`.gnu.linkonce' 4600 an alias for comdat 4601 4602 Note: if both the M and G flags are present then the fields for the 4603Merge flag should come first, like this: 4604 4605 .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE] 4606 4607 If no flags are specified, the default flags depend upon the section 4608name. If the section name is not recognized, the default will be for 4609the section to have none of the above flags: it will not be allocated 4610in memory, nor writable, nor executable. The section will contain data. 4611 4612 For ELF targets, the assembler supports another type of `.section' 4613directive for compatibility with the Solaris assembler: 4614 4615 .section "NAME"[, FLAGS...] 4616 4617 Note that the section name is quoted. There may be a sequence of 4618comma separated flags: 4619`#alloc' 4620 section is allocatable 4621 4622`#write' 4623 section is writable 4624 4625`#execinstr' 4626 section is executable 4627 4628`#tls' 4629 section is used for thread local storage 4630 4631 This directive replaces the current section and subsection. See the 4632contents of the gas testsuite directory `gas/testsuite/gas/elf' for 4633some examples of how this directive and the other section stack 4634directives work. 4635 4636 4637File: as.info, Node: Set, Next: Short, Prev: Section, Up: Pseudo Ops 4638 46397.96 `.set SYMBOL, EXPRESSION' 4640============================== 4641 4642Set the value of SYMBOL to EXPRESSION. This changes SYMBOL's value and 4643type to conform to EXPRESSION. If SYMBOL was flagged as external, it 4644remains flagged (*note Symbol Attributes::). 4645 4646 You may `.set' a symbol many times in the same assembly. 4647 4648 If you `.set' a global symbol, the value stored in the object file 4649is the last value stored into it. 4650 4651 The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'. 4652 4653 On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION' 4654instead. 4655 4656 4657File: as.info, Node: Short, Next: Single, Prev: Set, Up: Pseudo Ops 4658 46597.97 `.short EXPRESSIONS' 4660========================= 4661 4662`.short' is normally the same as `.word'. *Note `.word': Word. 4663 4664 In some configurations, however, `.short' and `.word' generate 4665numbers of different lengths. *Note Machine Dependencies::. 4666 4667 4668File: as.info, Node: Single, Next: Size, Prev: Short, Up: Pseudo Ops 4669 46707.98 `.single FLONUMS' 4671====================== 4672 4673This directive assembles zero or more flonums, separated by commas. It 4674has the same effect as `.float'. The exact kind of floating point 4675numbers emitted depends on how `as' is configured. *Note Machine 4676Dependencies::. 4677 4678 4679File: as.info, Node: Size, Next: Skip, Prev: Single, Up: Pseudo Ops 4680 46817.99 `.size' 4682============ 4683 4684This directive is used to set the size associated with a symbol. 4685 4686COFF Version 4687------------ 4688 4689 For COFF targets, the `.size' directive is only permitted inside 4690`.def'/`.endef' pairs. It is used like this: 4691 4692 .size EXPRESSION 4693 4694ELF Version 4695----------- 4696 4697 For ELF targets, the `.size' directive is used like this: 4698 4699 .size NAME , EXPRESSION 4700 4701 This directive sets the size associated with a symbol NAME. The 4702size in bytes is computed from EXPRESSION which can make use of label 4703arithmetic. This directive is typically used to set the size of 4704function symbols. 4705 4706 4707File: as.info, Node: Sleb128, Next: Space, Prev: Skip, Up: Pseudo Ops 4708 47097.100 `.sleb128 EXPRESSIONS' 4710============================ 4711 4712SLEB128 stands for "signed little endian base 128." This is a compact, 4713variable length representation of numbers used by the DWARF symbolic 4714debugging format. *Note `.uleb128': Uleb128. 4715 4716 4717File: as.info, Node: Skip, Next: Sleb128, Prev: Size, Up: Pseudo Ops 4718 47197.101 `.skip SIZE , FILL' 4720========================= 4721 4722This directive emits SIZE bytes, each of value FILL. Both SIZE and 4723FILL are absolute expressions. If the comma and FILL are omitted, FILL 4724is assumed to be zero. This is the same as `.space'. 4725 4726 4727File: as.info, Node: Space, Next: Stab, Prev: Sleb128, Up: Pseudo Ops 4728 47297.102 `.space SIZE , FILL' 4730========================== 4731 4732This directive emits SIZE bytes, each of value FILL. Both SIZE and 4733FILL are absolute expressions. If the comma and FILL are omitted, FILL 4734is assumed to be zero. This is the same as `.skip'. 4735 4736 _Warning:_ `.space' has a completely different meaning for HPPA 4737 targets; use `.block' as a substitute. See `HP9000 Series 800 4738 Assembly Language Reference Manual' (HP 92432-90001) for the 4739 meaning of the `.space' directive. *Note HPPA Assembler 4740 Directives: HPPA Directives, for a summary. 4741 4742 4743File: as.info, Node: Stab, Next: String, Prev: Space, Up: Pseudo Ops 4744 47457.103 `.stabd, .stabn, .stabs' 4746============================== 4747 4748There are three directives that begin `.stab'. All emit symbols (*note 4749Symbols::), for use by symbolic debuggers. The symbols are not entered 4750in the `as' hash table: they cannot be referenced elsewhere in the 4751source file. Up to five fields are required: 4752 4753STRING 4754 This is the symbol's name. It may contain any character except 4755 `\000', so is more general than ordinary symbol names. Some 4756 debuggers used to code arbitrarily complex structures into symbol 4757 names using this field. 4758 4759TYPE 4760 An absolute expression. The symbol's type is set to the low 8 4761 bits of this expression. Any bit pattern is permitted, but `ld' 4762 and debuggers choke on silly bit patterns. 4763 4764OTHER 4765 An absolute expression. The symbol's "other" attribute is set to 4766 the low 8 bits of this expression. 4767 4768DESC 4769 An absolute expression. The symbol's descriptor is set to the low 4770 16 bits of this expression. 4771 4772VALUE 4773 An absolute expression which becomes the symbol's value. 4774 4775 If a warning is detected while reading a `.stabd', `.stabn', or 4776`.stabs' statement, the symbol has probably already been created; you 4777get a half-formed symbol in your object file. This is compatible with 4778earlier assemblers! 4779 4780`.stabd TYPE , OTHER , DESC' 4781 The "name" of the symbol generated is not even an empty string. 4782 It is a null pointer, for compatibility. Older assemblers used a 4783 null pointer so they didn't waste space in object files with empty 4784 strings. 4785 4786 The symbol's value is set to the location counter, relocatably. 4787 When your program is linked, the value of this symbol is the 4788 address of the location counter when the `.stabd' was assembled. 4789 4790`.stabn TYPE , OTHER , DESC , VALUE' 4791 The name of the symbol is set to the empty string `""'. 4792 4793`.stabs STRING , TYPE , OTHER , DESC , VALUE' 4794 All five fields are specified. 4795 4796 4797File: as.info, Node: String, Next: Struct, Prev: Stab, Up: Pseudo Ops 4798 47997.104 `.string' "STR", `.string8' "STR", `.string16' 4800==================================================== 4801 4802"STR", `.string32' "STR", `.string64' "STR" 4803 4804 Copy the characters in STR to the object file. You may specify more 4805than one string to copy, separated by commas. Unless otherwise 4806specified for a particular machine, the assembler marks the end of each 4807string with a 0 byte. You can use any of the escape sequences 4808described in *Note Strings: Strings. 4809 4810 The variants `string16', `string32' and `string64' differ from the 4811`string' pseudo opcode in that each 8-bit character from STR is copied 4812and expanded to 16, 32 or 64 bits respectively. The expanded characters 4813are stored in target endianness byte order. 4814 4815 Example: 4816 .string32 "BYE" 4817 expands to: 4818 .string "B\0\0\0Y\0\0\0E\0\0\0" /* On little endian targets. */ 4819 .string "\0\0\0B\0\0\0Y\0\0\0E" /* On big endian targets. */ 4820 4821 4822File: as.info, Node: Struct, Next: SubSection, Prev: String, Up: Pseudo Ops 4823 48247.105 `.struct EXPRESSION' 4825========================== 4826 4827Switch to the absolute section, and set the section offset to 4828EXPRESSION, which must be an absolute expression. You might use this 4829as follows: 4830 .struct 0 4831 field1: 4832 .struct field1 + 4 4833 field2: 4834 .struct field2 + 4 4835 field3: 4836 This would define the symbol `field1' to have the value 0, the symbol 4837`field2' to have the value 4, and the symbol `field3' to have the value 48388. Assembly would be left in the absolute section, and you would need 4839to use a `.section' directive of some sort to change to some other 4840section before further assembly. 4841 4842 4843File: as.info, Node: SubSection, Next: Symver, Prev: Struct, Up: Pseudo Ops 4844 48457.106 `.subsection NAME' 4846======================== 4847 4848This is one of the ELF section stack manipulation directives. The 4849others are `.section' (*note Section::), `.pushsection' (*note 4850PushSection::), `.popsection' (*note PopSection::), and `.previous' 4851(*note Previous::). 4852 4853 This directive replaces the current subsection with `name'. The 4854current section is not changed. The replaced subsection is put onto 4855the section stack in place of the then current top of stack subsection. 4856 4857 4858File: as.info, Node: Symver, Next: Tag, Prev: SubSection, Up: Pseudo Ops 4859 48607.107 `.symver' 4861=============== 4862 4863Use the `.symver' directive to bind symbols to specific version nodes 4864within a source file. This is only supported on ELF platforms, and is 4865typically used when assembling files to be linked into a shared library. 4866There are cases where it may make sense to use this in objects to be 4867bound into an application itself so as to override a versioned symbol 4868from a shared library. 4869 4870 For ELF targets, the `.symver' directive can be used like this: 4871 .symver NAME, NAME2@NODENAME 4872 If the symbol NAME is defined within the file being assembled, the 4873`.symver' directive effectively creates a symbol alias with the name 4874NAME2@NODENAME, and in fact the main reason that we just don't try and 4875create a regular alias is that the @ character isn't permitted in 4876symbol names. The NAME2 part of the name is the actual name of the 4877symbol by which it will be externally referenced. The name NAME itself 4878is merely a name of convenience that is used so that it is possible to 4879have definitions for multiple versions of a function within a single 4880source file, and so that the compiler can unambiguously know which 4881version of a function is being mentioned. The NODENAME portion of the 4882alias should be the name of a node specified in the version script 4883supplied to the linker when building a shared library. If you are 4884attempting to override a versioned symbol from a shared library, then 4885NODENAME should correspond to the nodename of the symbol you are trying 4886to override. 4887 4888 If the symbol NAME is not defined within the file being assembled, 4889all references to NAME will be changed to NAME2@NODENAME. If no 4890reference to NAME is made, NAME2@NODENAME will be removed from the 4891symbol table. 4892 4893 Another usage of the `.symver' directive is: 4894 .symver NAME, NAME2@@NODENAME 4895 In this case, the symbol NAME must exist and be defined within the 4896file being assembled. It is similar to NAME2@NODENAME. The difference 4897is NAME2@@NODENAME will also be used to resolve references to NAME2 by 4898the linker. 4899 4900 The third usage of the `.symver' directive is: 4901 .symver NAME, NAME2@@@NODENAME 4902 When NAME is not defined within the file being assembled, it is 4903treated as NAME2@NODENAME. When NAME is defined within the file being 4904assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME. 4905 4906 4907File: as.info, Node: Tag, Next: Text, Prev: Symver, Up: Pseudo Ops 4908 49097.108 `.tag STRUCTNAME' 4910======================= 4911 4912This directive is generated by compilers to include auxiliary debugging 4913information in the symbol table. It is only permitted inside 4914`.def'/`.endef' pairs. Tags are used to link structure definitions in 4915the symbol table with instances of those structures. 4916 4917 4918File: as.info, Node: Text, Next: Title, Prev: Tag, Up: Pseudo Ops 4919 49207.109 `.text SUBSECTION' 4921======================== 4922 4923Tells `as' to assemble the following statements onto the end of the 4924text subsection numbered SUBSECTION, which is an absolute expression. 4925If SUBSECTION is omitted, subsection number zero is used. 4926 4927 4928File: as.info, Node: Title, Next: Type, Prev: Text, Up: Pseudo Ops 4929 49307.110 `.title "HEADING"' 4931======================== 4932 4933Use HEADING as the title (second line, immediately after the source 4934file name and pagenumber) when generating assembly listings. 4935 4936 This directive affects subsequent pages, as well as the current page 4937if it appears within ten lines of the top of a page. 4938 4939 4940File: as.info, Node: Type, Next: Uleb128, Prev: Title, Up: Pseudo Ops 4941 49427.111 `.type' 4943============= 4944 4945This directive is used to set the type of a symbol. 4946 4947COFF Version 4948------------ 4949 4950 For COFF targets, this directive is permitted only within 4951`.def'/`.endef' pairs. It is used like this: 4952 4953 .type INT 4954 4955 This records the integer INT as the type attribute of a symbol table 4956entry. 4957 4958ELF Version 4959----------- 4960 4961 For ELF targets, the `.type' directive is used like this: 4962 4963 .type NAME , TYPE DESCRIPTION 4964 4965 This sets the type of symbol NAME to be either a function symbol or 4966an object symbol. There are five different syntaxes supported for the 4967TYPE DESCRIPTION field, in order to provide compatibility with various 4968other assemblers. 4969 4970 Because some of the characters used in these syntaxes (such as `@' 4971and `#') are comment characters for some architectures, some of the 4972syntaxes below do not work on all architectures. The first variant 4973will be accepted by the GNU assembler on all architectures so that 4974variant should be used for maximum portability, if you do not need to 4975assemble your code with other assemblers. 4976 4977 The syntaxes supported are: 4978 4979 .type <name> STT_<TYPE_IN_UPPER_CASE> 4980 .type <name>,#<type> 4981 .type <name>,@<type> 4982 .type <name>,%>type> 4983 .type <name>,"<type>" 4984 4985 The types supported are: 4986 4987`STT_FUNC' 4988`function' 4989 Mark the symbol as being a function name. 4990 4991`STT_OBJECT' 4992`object' 4993 Mark the symbol as being a data object. 4994 4995`STT_TLS' 4996`tls_object' 4997 Mark the symbol as being a thead-local data object. 4998 4999`STT_COMMON' 5000`common' 5001 Mark the symbol as being a common data object. 5002 5003 Note: Some targets support extra types in addition to those listed 5004above. 5005 5006 5007File: as.info, Node: Uleb128, Next: Val, Prev: Type, Up: Pseudo Ops 5008 50097.112 `.uleb128 EXPRESSIONS' 5010============================ 5011 5012ULEB128 stands for "unsigned little endian base 128." This is a 5013compact, variable length representation of numbers used by the DWARF 5014symbolic debugging format. *Note `.sleb128': Sleb128. 5015 5016 5017File: as.info, Node: Val, Next: Version, Prev: Uleb128, Up: Pseudo Ops 5018 50197.113 `.val ADDR' 5020================= 5021 5022This directive, permitted only within `.def'/`.endef' pairs, records 5023the address ADDR as the value attribute of a symbol table entry. 5024 5025 5026File: as.info, Node: Version, Next: VTableEntry, Prev: Val, Up: Pseudo Ops 5027 50287.114 `.version "STRING"' 5029========================= 5030 5031This directive creates a `.note' section and places into it an ELF 5032formatted note of type NT_VERSION. The note's name is set to `string'. 5033 5034 5035File: as.info, Node: VTableEntry, Next: VTableInherit, Prev: Version, Up: Pseudo Ops 5036 50377.115 `.vtable_entry TABLE, OFFSET' 5038=================================== 5039 5040This directive finds or creates a symbol `table' and creates a 5041`VTABLE_ENTRY' relocation for it with an addend of `offset'. 5042 5043 5044File: as.info, Node: VTableInherit, Next: Warning, Prev: VTableEntry, Up: Pseudo Ops 5045 50467.116 `.vtable_inherit CHILD, PARENT' 5047===================================== 5048 5049This directive finds the symbol `child' and finds or creates the symbol 5050`parent' and then creates a `VTABLE_INHERIT' relocation for the parent 5051whose addend is the value of the child symbol. As a special case the 5052parent name of `0' is treated as referring to the `*ABS*' section. 5053 5054 5055File: as.info, Node: Warning, Next: Weak, Prev: VTableInherit, Up: Pseudo Ops 5056 50577.117 `.warning "STRING"' 5058========================= 5059 5060Similar to the directive `.error' (*note `.error "STRING"': Error.), 5061but just emits a warning. 5062 5063 5064File: as.info, Node: Weak, Next: Weakref, Prev: Warning, Up: Pseudo Ops 5065 50667.118 `.weak NAMES' 5067=================== 5068 5069This directive sets the weak attribute on the comma separated list of 5070symbol `names'. If the symbols do not already exist, they will be 5071created. 5072 5073 On COFF targets other than PE, weak symbols are a GNU extension. 5074This directive sets the weak attribute on the comma separated list of 5075symbol `names'. If the symbols do not already exist, they will be 5076created. 5077 5078 On the PE target, weak symbols are supported natively as weak 5079aliases. When a weak symbol is created that is not an alias, GAS 5080creates an alternate symbol to hold the default value. 5081 5082 5083File: as.info, Node: Weakref, Next: Word, Prev: Weak, Up: Pseudo Ops 5084 50857.119 `.weakref ALIAS, TARGET' 5086============================== 5087 5088This directive creates an alias to the target symbol that enables the 5089symbol to be referenced with weak-symbol semantics, but without 5090actually making it weak. If direct references or definitions of the 5091symbol are present, then the symbol will not be weak, but if all 5092references to it are through weak references, the symbol will be marked 5093as weak in the symbol table. 5094 5095 The effect is equivalent to moving all references to the alias to a 5096separate assembly source file, renaming the alias to the symbol in it, 5097declaring the symbol as weak there, and running a reloadable link to 5098merge the object files resulting from the assembly of the new source 5099file and the old source file that had the references to the alias 5100removed. 5101 5102 The alias itself never makes to the symbol table, and is entirely 5103handled within the assembler. 5104 5105 5106File: as.info, Node: Word, Next: Deprecated, Prev: Weakref, Up: Pseudo Ops 5107 51087.120 `.word EXPRESSIONS' 5109========================= 5110 5111This directive expects zero or more EXPRESSIONS, of any section, 5112separated by commas. 5113 5114 The size of the number emitted, and its byte order, depend on what 5115target computer the assembly is for. 5116 5117 _Warning: Special Treatment to support Compilers_ 5118 5119 Machines with a 32-bit address space, but that do less than 32-bit 5120addressing, require the following special treatment. If the machine of 5121interest to you does 32-bit addressing (or doesn't require it; *note 5122Machine Dependencies::), you can ignore this issue. 5123 5124 In order to assemble compiler output into something that works, `as' 5125occasionally does strange things to `.word' directives. Directives of 5126the form `.word sym1-sym2' are often emitted by compilers as part of 5127jump tables. Therefore, when `as' assembles a directive of the form 5128`.word sym1-sym2', and the difference between `sym1' and `sym2' does 5129not fit in 16 bits, `as' creates a "secondary jump table", immediately 5130before the next label. This secondary jump table is preceded by a 5131short-jump to the first byte after the secondary table. This 5132short-jump prevents the flow of control from accidentally falling into 5133the new table. Inside the table is a long-jump to `sym2'. The 5134original `.word' contains `sym1' minus the address of the long-jump to 5135`sym2'. 5136 5137 If there were several occurrences of `.word sym1-sym2' before the 5138secondary jump table, all of them are adjusted. If there was a `.word 5139sym3-sym4', that also did not fit in sixteen bits, a long-jump to 5140`sym4' is included in the secondary jump table, and the `.word' 5141directives are adjusted to contain `sym3' minus the address of the 5142long-jump to `sym4'; and so on, for as many entries in the original 5143jump table as necessary. 5144 5145 5146File: as.info, Node: Deprecated, Prev: Word, Up: Pseudo Ops 5147 51487.121 Deprecated Directives 5149=========================== 5150 5151One day these directives won't work. They are included for 5152compatibility with older assemblers. 5153.abort 5154 5155.line 5156 5157 5158File: as.info, Node: Object Attributes, Next: Machine Dependencies, Prev: Pseudo Ops, Up: Top 5159 51608 Object Attributes 5161******************* 5162 5163`as' assembles source files written for a specific architecture into 5164object files for that architecture. But not all object files are alike. 5165Many architectures support incompatible variations. For instance, 5166floating point arguments might be passed in floating point registers if 5167the object file requires hardware floating point support--or floating 5168point arguments might be passed in integer registers if the object file 5169supports processors with no hardware floating point unit. Or, if two 5170objects are built for different generations of the same architecture, 5171the combination may require the newer generation at run-time. 5172 5173 This information is useful during and after linking. At link time, 5174`ld' can warn about incompatible object files. After link time, tools 5175like `gdb' can use it to process the linked file correctly. 5176 5177 Compatibility information is recorded as a series of object 5178attributes. Each attribute has a "vendor", "tag", and "value". The 5179vendor is a string, and indicates who sets the meaning of the tag. The 5180tag is an integer, and indicates what property the attribute describes. 5181The value may be a string or an integer, and indicates how the 5182property affects this object. Missing attributes are the same as 5183attributes with a zero value or empty string value. 5184 5185 Object attributes were developed as part of the ABI for the ARM 5186Architecture. The file format is documented in `ELF for the ARM 5187Architecture'. 5188 5189* Menu: 5190 5191* GNU Object Attributes:: GNU Object Attributes 5192* Defining New Object Attributes:: Defining New Object Attributes 5193 5194 5195File: as.info, Node: GNU Object Attributes, Next: Defining New Object Attributes, Up: Object Attributes 5196 51978.1 GNU Object Attributes 5198========================= 5199 5200The `.gnu_attribute' directive records an object attribute with vendor 5201`gnu'. 5202 5203 Except for `Tag_compatibility', which has both an integer and a 5204string for its value, GNU attributes have a string value if the tag 5205number is odd and an integer value if the tag number is even. The 5206second bit (`TAG & 2' is set for architecture-independent attributes 5207and clear for architecture-dependent ones. 5208 52098.1.1 Common GNU attributes 5210--------------------------- 5211 5212These attributes are valid on all architectures. 5213 5214Tag_compatibility (32) 5215 The compatibility attribute takes an integer flag value and a 5216 vendor name. If the flag value is 0, the file is compatible with 5217 other toolchains. If it is 1, then the file is only compatible 5218 with the named toolchain. If it is greater than 1, the file can 5219 only be processed by other toolchains under some private 5220 arrangement indicated by the flag value and the vendor name. 5221 52228.1.2 MIPS Attributes 5223--------------------- 5224 5225Tag_GNU_MIPS_ABI_FP (4) 5226 The floating-point ABI used by this object file. The value will 5227 be: 5228 5229 * 0 for files not affected by the floating-point ABI. 5230 5231 * 1 for files using the hardware floating-point with a standard 5232 double-precision FPU. 5233 5234 * 2 for files using the hardware floating-point ABI with a 5235 single-precision FPU. 5236 5237 * 3 for files using the software floating-point ABI. 5238 5239 * 4 for files using the hardware floating-point ABI with 64-bit 5240 wide double-precision floating-point registers and 32-bit 5241 wide general purpose registers. 5242 52438.1.3 PowerPC Attributes 5244------------------------ 5245 5246Tag_GNU_Power_ABI_FP (4) 5247 The floating-point ABI used by this object file. The value will 5248 be: 5249 5250 * 0 for files not affected by the floating-point ABI. 5251 5252 * 1 for files using double-precision hardware floating-point 5253 ABI. 5254 5255 * 2 for files using the software floating-point ABI. 5256 5257 * 3 for files using single-precision hardware floating-point 5258 ABI. 5259 5260Tag_GNU_Power_ABI_Vector (8) 5261 The vector ABI used by this object file. The value will be: 5262 5263 * 0 for files not affected by the vector ABI. 5264 5265 * 1 for files using general purpose registers to pass vectors. 5266 5267 * 2 for files using AltiVec registers to pass vectors. 5268 5269 * 3 for files using SPE registers to pass vectors. 5270 5271 5272File: as.info, Node: Defining New Object Attributes, Prev: GNU Object Attributes, Up: Object Attributes 5273 52748.2 Defining New Object Attributes 5275================================== 5276 5277If you want to define a new GNU object attribute, here are the places 5278you will need to modify. New attributes should be discussed on the 5279`binutils' mailing list. 5280 5281 * This manual, which is the official register of attributes. 5282 5283 * The header for your architecture `include/elf', to define the tag. 5284 5285 * The `bfd' support file for your architecture, to merge the 5286 attribute and issue any appropriate link warnings. 5287 5288 * Test cases in `ld/testsuite' for merging and link warnings. 5289 5290 * `binutils/readelf.c' to display your attribute. 5291 5292 * GCC, if you want the compiler to mark the attribute automatically. 5293 5294 5295File: as.info, Node: Machine Dependencies, Next: Reporting Bugs, Prev: Object Attributes, Up: Top 5296 52979 Machine Dependent Features 5298**************************** 5299 5300The machine instruction sets are (almost by definition) different on 5301each machine where `as' runs. Floating point representations vary as 5302well, and `as' often supports a few additional directives or 5303command-line options for compatibility with other assemblers on a 5304particular platform. Finally, some versions of `as' support special 5305pseudo-instructions for branch optimization. 5306 5307 This chapter discusses most of these differences, though it does not 5308include details on any machine's instruction set. For details on that 5309subject, see the hardware manufacturer's manual. 5310 5311* Menu: 5312 5313 5314* Alpha-Dependent:: Alpha Dependent Features 5315 5316* ARC-Dependent:: ARC Dependent Features 5317 5318* ARM-Dependent:: ARM Dependent Features 5319 5320* AVR-Dependent:: AVR Dependent Features 5321 5322* BFIN-Dependent:: BFIN Dependent Features 5323 5324* CR16-Dependent:: CR16 Dependent Features 5325 5326* CRIS-Dependent:: CRIS Dependent Features 5327 5328* D10V-Dependent:: D10V Dependent Features 5329 5330* D30V-Dependent:: D30V Dependent Features 5331 5332* H8/300-Dependent:: Renesas H8/300 Dependent Features 5333 5334* HPPA-Dependent:: HPPA Dependent Features 5335 5336* ESA/390-Dependent:: IBM ESA/390 Dependent Features 5337 5338* i386-Dependent:: Intel 80386 and AMD x86-64 Dependent Features 5339 5340* i860-Dependent:: Intel 80860 Dependent Features 5341 5342* i960-Dependent:: Intel 80960 Dependent Features 5343 5344* IA-64-Dependent:: Intel IA-64 Dependent Features 5345 5346* IP2K-Dependent:: IP2K Dependent Features 5347 5348* M32C-Dependent:: M32C Dependent Features 5349 5350* M32R-Dependent:: M32R Dependent Features 5351 5352* M68K-Dependent:: M680x0 Dependent Features 5353 5354* M68HC11-Dependent:: M68HC11 and 68HC12 Dependent Features 5355 5356* MIPS-Dependent:: MIPS Dependent Features 5357 5358* MMIX-Dependent:: MMIX Dependent Features 5359 5360* MSP430-Dependent:: MSP430 Dependent Features 5361 5362* SH-Dependent:: Renesas / SuperH SH Dependent Features 5363* SH64-Dependent:: SuperH SH64 Dependent Features 5364 5365* PDP-11-Dependent:: PDP-11 Dependent Features 5366 5367* PJ-Dependent:: picoJava Dependent Features 5368 5369* PPC-Dependent:: PowerPC Dependent Features 5370 5371* Sparc-Dependent:: SPARC Dependent Features 5372 5373* TIC54X-Dependent:: TI TMS320C54x Dependent Features 5374 5375* V850-Dependent:: V850 Dependent Features 5376 5377* Xtensa-Dependent:: Xtensa Dependent Features 5378 5379* Z80-Dependent:: Z80 Dependent Features 5380 5381* Z8000-Dependent:: Z8000 Dependent Features 5382 5383* Vax-Dependent:: VAX Dependent Features 5384 5385 5386File: as.info, Node: Alpha-Dependent, Next: ARC-Dependent, Up: Machine Dependencies 5387 53889.1 Alpha Dependent Features 5389============================ 5390 5391* Menu: 5392 5393* Alpha Notes:: Notes 5394* Alpha Options:: Options 5395* Alpha Syntax:: Syntax 5396* Alpha Floating Point:: Floating Point 5397* Alpha Directives:: Alpha Machine Directives 5398* Alpha Opcodes:: Opcodes 5399 5400 5401File: as.info, Node: Alpha Notes, Next: Alpha Options, Up: Alpha-Dependent 5402 54039.1.1 Notes 5404----------- 5405 5406The documentation here is primarily for the ELF object format. `as' 5407also supports the ECOFF and EVAX formats, but features specific to 5408these formats are not yet documented. 5409 5410 5411File: as.info, Node: Alpha Options, Next: Alpha Syntax, Prev: Alpha Notes, Up: Alpha-Dependent 5412 54139.1.2 Options 5414------------- 5415 5416`-mCPU' 5417 This option specifies the target processor. If an attempt is made 5418 to assemble an instruction which will not execute on the target 5419 processor, the assembler may either expand the instruction as a 5420 macro or issue an error message. This option is equivalent to the 5421 `.arch' directive. 5422 5423 The following processor names are recognized: `21064', `21064a', 5424 `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a', 5425 `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6', 5426 `ev67', `ev68'. The special name `all' may be used to allow the 5427 assembler to accept instructions valid for any Alpha processor. 5428 5429 In order to support existing practice in OSF/1 with respect to 5430 `.arch', and existing practice within `MILO' (the Linux ARC 5431 bootloader), the numbered processor names (e.g. 21064) enable the 5432 processor-specific PALcode instructions, while the 5433 "electro-vlasic" names (e.g. `ev4') do not. 5434 5435`-mdebug' 5436`-no-mdebug' 5437 Enables or disables the generation of `.mdebug' encapsulation for 5438 stabs directives and procedure descriptors. The default is to 5439 automatically enable `.mdebug' when the first stabs directive is 5440 seen. 5441 5442`-relax' 5443 This option forces all relocations to be put into the object file, 5444 instead of saving space and resolving some relocations at assembly 5445 time. Note that this option does not propagate all symbol 5446 arithmetic into the object file, because not all symbol arithmetic 5447 can be represented. However, the option can still be useful in 5448 specific applications. 5449 5450`-g' 5451 This option is used when the compiler generates debug information. 5452 When `gcc' is using `mips-tfile' to generate debug information 5453 for ECOFF, local labels must be passed through to the object file. 5454 Otherwise this option has no effect. 5455 5456`-GSIZE' 5457 A local common symbol larger than SIZE is placed in `.bss', while 5458 smaller symbols are placed in `.sbss'. 5459 5460`-F' 5461`-32addr' 5462 These options are ignored for backward compatibility. 5463 5464 5465File: as.info, Node: Alpha Syntax, Next: Alpha Floating Point, Prev: Alpha Options, Up: Alpha-Dependent 5466 54679.1.3 Syntax 5468------------ 5469 5470The assembler syntax closely follow the Alpha Reference Manual; 5471assembler directives and general syntax closely follow the OSF/1 and 5472OpenVMS syntax, with a few differences for ELF. 5473 5474* Menu: 5475 5476* Alpha-Chars:: Special Characters 5477* Alpha-Regs:: Register Names 5478* Alpha-Relocs:: Relocations 5479 5480 5481File: as.info, Node: Alpha-Chars, Next: Alpha-Regs, Up: Alpha Syntax 5482 54839.1.3.1 Special Characters 5484.......................... 5485 5486`#' is the line comment character. 5487 5488 `;' can be used instead of a newline to separate statements. 5489 5490 5491File: as.info, Node: Alpha-Regs, Next: Alpha-Relocs, Prev: Alpha-Chars, Up: Alpha Syntax 5492 54939.1.3.2 Register Names 5494...................... 5495 5496The 32 integer registers are referred to as `$N' or `$rN'. In 5497addition, registers 15, 28, 29, and 30 may be referred to by the 5498symbols `$fp', `$at', `$gp', and `$sp' respectively. 5499 5500 The 32 floating-point registers are referred to as `$fN'. 5501 5502 5503File: as.info, Node: Alpha-Relocs, Prev: Alpha-Regs, Up: Alpha Syntax 5504 55059.1.3.3 Relocations 5506................... 5507 5508Some of these relocations are available for ECOFF, but mostly only for 5509ELF. They are modeled after the relocation format introduced in 5510Digital Unix 4.0, but there are additions. 5511 5512 The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the 5513relocation. In some cases NUMBER is used to relate specific 5514instructions. 5515 5516 The relocation is placed at the end of the instruction like so: 5517 5518 ldah $0,a($29) !gprelhigh 5519 lda $0,a($0) !gprellow 5520 ldq $1,b($29) !literal!100 5521 ldl $2,0($1) !lituse_base!100 5522 5523`!literal' 5524`!literal!N' 5525 Used with an `ldq' instruction to load the address of a symbol 5526 from the GOT. 5527 5528 A sequence number N is optional, and if present is used to pair 5529 `lituse' relocations with this `literal' relocation. The `lituse' 5530 relocations are used by the linker to optimize the code based on 5531 the final location of the symbol. 5532 5533 Note that these optimizations are dependent on the data flow of the 5534 program. Therefore, if _any_ `lituse' is paired with a `literal' 5535 relocation, then _all_ uses of the register set by the `literal' 5536 instruction must also be marked with `lituse' relocations. This 5537 is because the original `literal' instruction may be deleted or 5538 transformed into another instruction. 5539 5540 Also note that there may be a one-to-many relationship between 5541 `literal' and `lituse', but not a many-to-one. That is, if there 5542 are two code paths that load up the same address and feed the 5543 value to a single use, then the use may not use a `lituse' 5544 relocation. 5545 5546`!lituse_base!N' 5547 Used with any memory format instruction (e.g. `ldl') to indicate 5548 that the literal is used for an address load. The offset field of 5549 the instruction must be zero. During relaxation, the code may be 5550 altered to use a gp-relative load. 5551 5552`!lituse_jsr!N' 5553 Used with a register branch format instruction (e.g. `jsr') to 5554 indicate that the literal is used for a call. During relaxation, 5555 the code may be altered to use a direct branch (e.g. `bsr'). 5556 5557`!lituse_jsrdirect!N' 5558 Similar to `lituse_jsr', but also that this call cannot be vectored 5559 through a PLT entry. This is useful for functions with special 5560 calling conventions which do not allow the normal call-clobbered 5561 registers to be clobbered. 5562 5563`!lituse_bytoff!N' 5564 Used with a byte mask instruction (e.g. `extbl') to indicate that 5565 only the low 3 bits of the address are relevant. During 5566 relaxation, the code may be altered to use an immediate instead of 5567 a register shift. 5568 5569`!lituse_addr!N' 5570 Used with any other instruction to indicate that the original 5571 address is in fact used, and the original `ldq' instruction may 5572 not be altered or deleted. This is useful in conjunction with 5573 `lituse_jsr' to test whether a weak symbol is defined. 5574 5575 ldq $27,foo($29) !literal!1 5576 beq $27,is_undef !lituse_addr!1 5577 jsr $26,($27),foo !lituse_jsr!1 5578 5579`!lituse_tlsgd!N' 5580 Used with a register branch format instruction to indicate that the 5581 literal is the call to `__tls_get_addr' used to compute the 5582 address of the thread-local storage variable whose descriptor was 5583 loaded with `!tlsgd!N'. 5584 5585`!lituse_tlsldm!N' 5586 Used with a register branch format instruction to indicate that the 5587 literal is the call to `__tls_get_addr' used to compute the 5588 address of the base of the thread-local storage block for the 5589 current module. The descriptor for the module must have been 5590 loaded with `!tlsldm!N'. 5591 5592`!gpdisp!N' 5593 Used with `ldah' and `lda' to load the GP from the current 5594 address, a-la the `ldgp' macro. The source register for the 5595 `ldah' instruction must contain the address of the `ldah' 5596 instruction. There must be exactly one `lda' instruction paired 5597 with the `ldah' instruction, though it may appear anywhere in the 5598 instruction stream. The immediate operands must be zero. 5599 5600 bsr $26,foo 5601 ldah $29,0($26) !gpdisp!1 5602 lda $29,0($29) !gpdisp!1 5603 5604`!gprelhigh' 5605 Used with an `ldah' instruction to add the high 16 bits of a 5606 32-bit displacement from the GP. 5607 5608`!gprellow' 5609 Used with any memory format instruction to add the low 16 bits of a 5610 32-bit displacement from the GP. 5611 5612`!gprel' 5613 Used with any memory format instruction to add a 16-bit 5614 displacement from the GP. 5615 5616`!samegp' 5617 Used with any branch format instruction to skip the GP load at the 5618 target address. The referenced symbol must have the same GP as the 5619 source object file, and it must be declared to either not use `$27' 5620 or perform a standard GP load in the first two instructions via the 5621 `.prologue' directive. 5622 5623`!tlsgd' 5624`!tlsgd!N' 5625 Used with an `lda' instruction to load the address of a TLS 5626 descriptor for a symbol in the GOT. 5627 5628 The sequence number N is optional, and if present it used to pair 5629 the descriptor load with both the `literal' loading the address of 5630 the `__tls_get_addr' function and the `lituse_tlsgd' marking the 5631 call to that function. 5632 5633 For proper relaxation, both the `tlsgd', `literal' and `lituse' 5634 relocations must be in the same extended basic block. That is, 5635 the relocation with the lowest address must be executed first at 5636 runtime. 5637 5638`!tlsldm' 5639`!tlsldm!N' 5640 Used with an `lda' instruction to load the address of a TLS 5641 descriptor for the current module in the GOT. 5642 5643 Similar in other respects to `tlsgd'. 5644 5645`!gotdtprel' 5646 Used with an `ldq' instruction to load the offset of the TLS 5647 symbol within its module's thread-local storage block. Also known 5648 as the dynamic thread pointer offset or dtp-relative offset. 5649 5650`!dtprelhi' 5651`!dtprello' 5652`!dtprel' 5653 Like `gprel' relocations except they compute dtp-relative offsets. 5654 5655`!gottprel' 5656 Used with an `ldq' instruction to load the offset of the TLS 5657 symbol from the thread pointer. Also known as the tp-relative 5658 offset. 5659 5660`!tprelhi' 5661`!tprello' 5662`!tprel' 5663 Like `gprel' relocations except they compute tp-relative offsets. 5664 5665 5666File: as.info, Node: Alpha Floating Point, Next: Alpha Directives, Prev: Alpha Syntax, Up: Alpha-Dependent 5667 56689.1.4 Floating Point 5669-------------------- 5670 5671The Alpha family uses both IEEE and VAX floating-point numbers. 5672 5673 5674File: as.info, Node: Alpha Directives, Next: Alpha Opcodes, Prev: Alpha Floating Point, Up: Alpha-Dependent 5675 56769.1.5 Alpha Assembler Directives 5677-------------------------------- 5678 5679`as' for the Alpha supports many additional directives for 5680compatibility with the native assembler. This section describes them 5681only briefly. 5682 5683 These are the additional directives in `as' for the Alpha: 5684 5685`.arch CPU' 5686 Specifies the target processor. This is equivalent to the `-mCPU' 5687 command-line option. *Note Options: Alpha Options, for a list of 5688 values for CPU. 5689 5690`.ent FUNCTION[, N]' 5691 Mark the beginning of FUNCTION. An optional number may follow for 5692 compatibility with the OSF/1 assembler, but is ignored. When 5693 generating `.mdebug' information, this will create a procedure 5694 descriptor for the function. In ELF, it will mark the symbol as a 5695 function a-la the generic `.type' directive. 5696 5697`.end FUNCTION' 5698 Mark the end of FUNCTION. In ELF, it will set the size of the 5699 symbol a-la the generic `.size' directive. 5700 5701`.mask MASK, OFFSET' 5702 Indicate which of the integer registers are saved in the current 5703 function's stack frame. MASK is interpreted a bit mask in which 5704 bit N set indicates that register N is saved. The registers are 5705 saved in a block located OFFSET bytes from the "canonical frame 5706 address" (CFA) which is the value of the stack pointer on entry to 5707 the function. The registers are saved sequentially, except that 5708 the return address register (normally `$26') is saved first. 5709 5710 This and the other directives that describe the stack frame are 5711 currently only used when generating `.mdebug' information. They 5712 may in the future be used to generate DWARF2 `.debug_frame' unwind 5713 information for hand written assembly. 5714 5715`.fmask MASK, OFFSET' 5716 Indicate which of the floating-point registers are saved in the 5717 current stack frame. The MASK and OFFSET parameters are 5718 interpreted as with `.mask'. 5719 5720`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]' 5721 Describes the shape of the stack frame. The frame pointer in use 5722 is FRAMEREG; normally this is either `$fp' or `$sp'. The frame 5723 pointer is FRAMEOFFSET bytes below the CFA. The return address is 5724 initially located in RETREG until it is saved as indicated in 5725 `.mask'. For compatibility with OSF/1 an optional ARGOFFSET 5726 parameter is accepted and ignored. It is believed to indicate the 5727 offset from the CFA to the saved argument registers. 5728 5729`.prologue N' 5730 Indicate that the stack frame is set up and all registers have been 5731 spilled. The argument N indicates whether and how the function 5732 uses the incoming "procedure vector" (the address of the called 5733 function) in `$27'. 0 indicates that `$27' is not used; 1 5734 indicates that the first two instructions of the function use `$27' 5735 to perform a load of the GP register; 2 indicates that `$27' is 5736 used in some non-standard way and so the linker cannot elide the 5737 load of the procedure vector during relaxation. 5738 5739`.usepv FUNCTION, WHICH' 5740 Used to indicate the use of the `$27' register, similar to 5741 `.prologue', but without the other semantics of needing to be 5742 inside an open `.ent'/`.end' block. 5743 5744 The WHICH argument should be either `no', indicating that `$27' is 5745 not used, or `std', indicating that the first two instructions of 5746 the function perform a GP load. 5747 5748 One might use this directive instead of `.prologue' if you are 5749 also using dwarf2 CFI directives. 5750 5751`.gprel32 EXPRESSION' 5752 Computes the difference between the address in EXPRESSION and the 5753 GP for the current object file, and stores it in 4 bytes. In 5754 addition to being smaller than a full 8 byte address, this also 5755 does not require a dynamic relocation when used in a shared 5756 library. 5757 5758`.t_floating EXPRESSION' 5759 Stores EXPRESSION as an IEEE double precision value. 5760 5761`.s_floating EXPRESSION' 5762 Stores EXPRESSION as an IEEE single precision value. 5763 5764`.f_floating EXPRESSION' 5765 Stores EXPRESSION as a VAX F format value. 5766 5767`.g_floating EXPRESSION' 5768 Stores EXPRESSION as a VAX G format value. 5769 5770`.d_floating EXPRESSION' 5771 Stores EXPRESSION as a VAX D format value. 5772 5773`.set FEATURE' 5774 Enables or disables various assembler features. Using the positive 5775 name of the feature enables while using `noFEATURE' disables. 5776 5777 `at' 5778 Indicates that macro expansions may clobber the "assembler 5779 temporary" (`$at' or `$28') register. Some macros may not be 5780 expanded without this and will generate an error message if 5781 `noat' is in effect. When `at' is in effect, a warning will 5782 be generated if `$at' is used by the programmer. 5783 5784 `macro' 5785 Enables the expansion of macro instructions. Note that 5786 variants of real instructions, such as `br label' vs `br 5787 $31,label' are considered alternate forms and not macros. 5788 5789 `move' 5790 `reorder' 5791 `volatile' 5792 These control whether and how the assembler may re-order 5793 instructions. Accepted for compatibility with the OSF/1 5794 assembler, but `as' does not do instruction scheduling, so 5795 these features are ignored. 5796 5797 The following directives are recognized for compatibility with the 5798OSF/1 assembler but are ignored. 5799 5800 .proc .aproc 5801 .reguse .livereg 5802 .option .aent 5803 .ugen .eflag 5804 .alias .noalias 5805 5806 5807File: as.info, Node: Alpha Opcodes, Prev: Alpha Directives, Up: Alpha-Dependent 5808 58099.1.6 Opcodes 5810------------- 5811 5812For detailed information on the Alpha machine instruction set, see the 5813Alpha Architecture Handbook 5814(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf). 5815 5816 5817File: as.info, Node: ARC-Dependent, Next: ARM-Dependent, Prev: Alpha-Dependent, Up: Machine Dependencies 5818 58199.2 ARC Dependent Features 5820========================== 5821 5822* Menu: 5823 5824* ARC Options:: Options 5825* ARC Syntax:: Syntax 5826* ARC Floating Point:: Floating Point 5827* ARC Directives:: ARC Machine Directives 5828* ARC Opcodes:: Opcodes 5829 5830 5831File: as.info, Node: ARC Options, Next: ARC Syntax, Up: ARC-Dependent 5832 58339.2.1 Options 5834------------- 5835 5836`-marc[5|6|7|8]' 5837 This option selects the core processor variant. Using `-marc' is 5838 the same as `-marc6', which is also the default. 5839 5840 `arc5' 5841 Base instruction set. 5842 5843 `arc6' 5844 Jump-and-link (jl) instruction. No requirement of an 5845 instruction between setting flags and conditional jump. For 5846 example: 5847 5848 mov.f r0,r1 5849 beq foo 5850 5851 `arc7' 5852 Break (brk) and sleep (sleep) instructions. 5853 5854 `arc8' 5855 Software interrupt (swi) instruction. 5856 5857 5858 Note: the `.option' directive can to be used to select a core 5859 variant from within assembly code. 5860 5861`-EB' 5862 This option specifies that the output generated by the assembler 5863 should be marked as being encoded for a big-endian processor. 5864 5865`-EL' 5866 This option specifies that the output generated by the assembler 5867 should be marked as being encoded for a little-endian processor - 5868 this is the default. 5869 5870 5871 5872File: as.info, Node: ARC Syntax, Next: ARC Floating Point, Prev: ARC Options, Up: ARC-Dependent 5873 58749.2.2 Syntax 5875------------ 5876 5877* Menu: 5878 5879* ARC-Chars:: Special Characters 5880* ARC-Regs:: Register Names 5881 5882 5883File: as.info, Node: ARC-Chars, Next: ARC-Regs, Up: ARC Syntax 5884 58859.2.2.1 Special Characters 5886.......................... 5887 5888*TODO* 5889 5890 5891File: as.info, Node: ARC-Regs, Prev: ARC-Chars, Up: ARC Syntax 5892 58939.2.2.2 Register Names 5894...................... 5895 5896*TODO* 5897 5898 5899File: as.info, Node: ARC Floating Point, Next: ARC Directives, Prev: ARC Syntax, Up: ARC-Dependent 5900 59019.2.3 Floating Point 5902-------------------- 5903 5904The ARC core does not currently have hardware floating point support. 5905Software floating point support is provided by `GCC' and uses IEEE 5906floating-point numbers. 5907 5908 5909File: as.info, Node: ARC Directives, Next: ARC Opcodes, Prev: ARC Floating Point, Up: ARC-Dependent 5910 59119.2.4 ARC Machine Directives 5912---------------------------- 5913 5914The ARC version of `as' supports the following additional machine 5915directives: 5916 5917`.2byte EXPRESSIONS' 5918 *TODO* 5919 5920`.3byte EXPRESSIONS' 5921 *TODO* 5922 5923`.4byte EXPRESSIONS' 5924 *TODO* 5925 5926`.extAuxRegister NAME,ADDRESS,MODE' 5927 The ARCtangent A4 has extensible auxiliary register space. The 5928 auxiliary registers can be defined in the assembler source code by 5929 using this directive. The first parameter is the NAME of the new 5930 auxiallry register. The second parameter is the ADDRESS of the 5931 register in the auxiliary register memory map for the variant of 5932 the ARC. The third parameter specifies the MODE in which the 5933 register can be operated is and it can be one of: 5934 5935 `r (readonly)' 5936 5937 `w (write only)' 5938 5939 `r|w (read or write)' 5940 5941 For example: 5942 5943 .extAuxRegister mulhi,0x12,w 5944 5945 This specifies an extension auxiliary register called _mulhi_ 5946 which is at address 0x12 in the memory space and which is only 5947 writable. 5948 5949`.extCondCode SUFFIX,VALUE' 5950 The condition codes on the ARCtangent A4 are extensible and can be 5951 specified by means of this assembler directive. They are specified 5952 by the suffix and the value for the condition code. They can be 5953 used to specify extra condition codes with any values. For 5954 example: 5955 5956 .extCondCode is_busy,0x14 5957 5958 add.is_busy r1,r2,r3 5959 bis_busy _main 5960 5961`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT' 5962 Specifies an extension core register NAME for the application. 5963 This allows a register NAME with a valid REGNUM between 0 and 60, 5964 with the following as valid values for MODE 5965 5966 `_r_ (readonly)' 5967 5968 `_w_ (write only)' 5969 5970 `_r|w_ (read or write)' 5971 5972 The other parameter gives a description of the register having a 5973 SHORTCUT in the pipeline. The valid values are: 5974 5975 `can_shortcut' 5976 5977 `cannot_shortcut' 5978 5979 For example: 5980 5981 .extCoreRegister mlo,57,r,can_shortcut 5982 5983 This defines an extension core register mlo with the value 57 which 5984 can shortcut the pipeline. 5985 5986`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS' 5987 The ARCtangent A4 allows the user to specify extension 5988 instructions. The extension instructions are not macros. The 5989 assembler creates encodings for use of these instructions 5990 according to the specification by the user. The parameters are: 5991 5992 *NAME 5993 Name of the extension instruction 5994 5995 *OPCODE 5996 Opcode to be used. (Bits 27:31 in the encoding). Valid values 5997 0x10-0x1f or 0x03 5998 5999 *SUBOPCODE 6000 Subopcode to be used. Valid values are from 0x09-0x3f. 6001 However the correct value also depends on SYNTAXCLASS 6002 6003 *SUFFIXCLASS 6004 Determines the kinds of suffixes to be allowed. Valid values 6005 are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which 6006 indicates the absence or presence of conditional suffixes and 6007 flag setting by the extension instruction. It is also 6008 possible to specify that an instruction sets the flags and is 6009 conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'. 6010 6011 *SYNTAXCLASS 6012 Determines the syntax class for the instruction. It can have 6013 the following values: 6014 6015 ``SYNTAX_2OP':' 6016 2 Operand Instruction 6017 6018 ``SYNTAX_3OP':' 6019 3 Operand Instruction 6020 6021 In addition there could be modifiers for the syntax class as 6022 described below: 6023 6024 Syntax Class Modifiers are: 6025 6026 - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP, 6027 specifying that the first operand of a three-operand 6028 instruction must be an immediate (i.e., the result is 6029 discarded). OP1_MUST_BE_IMM is used by bitwise ORing it 6030 with SYNTAX_3OP as given in the example below. This 6031 could usually be used to set the flags using specific 6032 instructions and not retain results. 6033 6034 - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it 6035 specifies that there is an implied immediate destination 6036 operand which does not appear in the syntax. For 6037 example, if the source code contains an instruction like: 6038 6039 inst r1,r2 6040 6041 it really means that the first argument is an implied 6042 immediate (that is, the result is discarded). This is 6043 the same as though the source code were: inst 0,r1,r2. 6044 You use OP1_IMM_IMPLIED by bitwise ORing it with 6045 SYNTAX_20P. 6046 6047 6048 For example, defining 64-bit multiplier with immediate operands: 6049 6050 .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG , 6051 SYNTAX_3OP|OP1_MUST_BE_IMM 6052 6053 The above specifies an extension instruction called mp64 which has 6054 3 operands, sets the flags, can be used with a condition code, for 6055 which the first operand is an immediate. (Equivalent to 6056 discarding the result of the operation). 6057 6058 .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED 6059 6060 This describes a 2 operand instruction with an implicit first 6061 immediate operand. The result of this operation would be 6062 discarded. 6063 6064`.half EXPRESSIONS' 6065 *TODO* 6066 6067`.long EXPRESSIONS' 6068 *TODO* 6069 6070`.option ARC|ARC5|ARC6|ARC7|ARC8' 6071 The `.option' directive must be followed by the desired core 6072 version. Again `arc' is an alias for `arc6'. 6073 6074 Note: the `.option' directive overrides the command line option 6075 `-marc'; a warning is emitted when the version is not consistent 6076 between the two - even for the implicit default core version 6077 (arc6). 6078 6079`.short EXPRESSIONS' 6080 *TODO* 6081 6082`.word EXPRESSIONS' 6083 *TODO* 6084 6085 6086 6087File: as.info, Node: ARC Opcodes, Prev: ARC Directives, Up: ARC-Dependent 6088 60899.2.5 Opcodes 6090------------- 6091 6092For information on the ARC instruction set, see `ARC Programmers 6093Reference Manual', ARC International (www.arc.com) 6094 6095 6096File: as.info, Node: ARM-Dependent, Next: AVR-Dependent, Prev: ARC-Dependent, Up: Machine Dependencies 6097 60989.3 ARM Dependent Features 6099========================== 6100 6101* Menu: 6102 6103* ARM Options:: Options 6104* ARM Syntax:: Syntax 6105* ARM Floating Point:: Floating Point 6106* ARM Directives:: ARM Machine Directives 6107* ARM Opcodes:: Opcodes 6108* ARM Mapping Symbols:: Mapping Symbols 6109* ARM Unwinding Tutorial:: Unwinding 6110 6111 6112File: as.info, Node: ARM Options, Next: ARM Syntax, Up: ARM-Dependent 6113 61149.3.1 Options 6115------------- 6116 6117`-mcpu=PROCESSOR[+EXTENSION...]' 6118 This option specifies the target processor. The assembler will 6119 issue an error message if an attempt is made to assemble an 6120 instruction which will not execute on the target processor. The 6121 following processor names are recognized: `arm1', `arm2', `arm250', 6122 `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7', 6123 `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700', 6124 `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t', 6125 `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi', 6126 `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1', 6127 `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920', 6128 `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday 6129 FA526 processor), `fa626' (Faraday FA626 processor), `arm9e', 6130 `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s', 6131 `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t', 6132 `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e', 6133 `arm1022e', `arm1026ej-s', `fa626te' (Faraday FA626TE processor), 6134 `fa726te' (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s', 6135 `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', 6136 `mpcore', `mpcorenovfp', `cortex-a8', `cortex-a9', `cortex-r4', 6137 `cortex-m3', `ep9312' (ARM920 with Cirrus Maverick coprocessor), 6138 `i80200' (Intel XScale processor) `iwmmxt' (Intel(r) XScale 6139 processor with Wireless MMX(tm) technology coprocessor) and 6140 `xscale'. The special name `all' may be used to allow the 6141 assembler to accept instructions valid for any ARM processor. 6142 6143 In addition to the basic instruction set, the assembler can be 6144 told to accept various extension mnemonics that extend the 6145 processor using the co-processor instruction space. For example, 6146 `-mcpu=arm920+maverick' is equivalent to specifying 6147 `-mcpu=ep9312'. The following extensions are currently supported: 6148 `+maverick' `+iwmmxt' and `+xscale'. 6149 6150`-march=ARCHITECTURE[+EXTENSION...]' 6151 This option specifies the target architecture. The assembler will 6152 issue an error message if an attempt is made to assemble an 6153 instruction which will not execute on the target architecture. 6154 The following architecture names are recognized: `armv1', `armv2', 6155 `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm', 6156 `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te', 6157 `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk', 6158 `armv7', `armv7-a', `armv7-r', `armv7-m', `iwmmxt' and `xscale'. 6159 If both `-mcpu' and `-march' are specified, the assembler will use 6160 the setting for `-mcpu'. 6161 6162 The architecture option can be extended with the same instruction 6163 set extension options as the `-mcpu' option. 6164 6165`-mfpu=FLOATING-POINT-FORMAT' 6166 This option specifies the floating point format to assemble for. 6167 The assembler will issue an error message if an attempt is made to 6168 assemble an instruction which will not execute on the target 6169 floating point unit. The following format options are recognized: 6170 `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11', 6171 `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0', 6172 `vfp9', `vfpxd', `vfpv2' `vfpv3' `vfpv3-d16' `arm1020t', 6173 `arm1020e', `arm1136jf-s', `maverick' and `neon'. 6174 6175 In addition to determining which instructions are assembled, this 6176 option also affects the way in which the `.double' assembler 6177 directive behaves when assembling little-endian code. 6178 6179 The default is dependent on the processor selected. For 6180 Architecture 5 or later, the default is to assembler for VFP 6181 instructions; for earlier architectures the default is to assemble 6182 for FPA instructions. 6183 6184`-mthumb' 6185 This option specifies that the assembler should start assembling 6186 Thumb instructions; that is, it should behave as though the file 6187 starts with a `.code 16' directive. 6188 6189`-mthumb-interwork' 6190 This option specifies that the output generated by the assembler 6191 should be marked as supporting interworking. 6192 6193`-mapcs `[26|32]'' 6194 This option specifies that the output generated by the assembler 6195 should be marked as supporting the indicated version of the Arm 6196 Procedure. Calling Standard. 6197 6198`-matpcs' 6199 This option specifies that the output generated by the assembler 6200 should be marked as supporting the Arm/Thumb Procedure Calling 6201 Standard. If enabled this option will cause the assembler to 6202 create an empty debugging section in the object file called 6203 .arm.atpcs. Debuggers can use this to determine the ABI being 6204 used by. 6205 6206`-mapcs-float' 6207 This indicates the floating point variant of the APCS should be 6208 used. In this variant floating point arguments are passed in FP 6209 registers rather than integer registers. 6210 6211`-mapcs-reentrant' 6212 This indicates that the reentrant variant of the APCS should be 6213 used. This variant supports position independent code. 6214 6215`-mfloat-abi=ABI' 6216 This option specifies that the output generated by the assembler 6217 should be marked as using specified floating point ABI. The 6218 following values are recognized: `soft', `softfp' and `hard'. 6219 6220`-meabi=VER' 6221 This option specifies which EABI version the produced object files 6222 should conform to. The following values are recognized: `gnu', `4' 6223 and `5'. 6224 6225`-EB' 6226 This option specifies that the output generated by the assembler 6227 should be marked as being encoded for a big-endian processor. 6228 6229`-EL' 6230 This option specifies that the output generated by the assembler 6231 should be marked as being encoded for a little-endian processor. 6232 6233`-k' 6234 This option specifies that the output of the assembler should be 6235 marked as position-independent code (PIC). 6236 6237`--fix-v4bx' 6238 Allow `BX' instructions in ARMv4 code. This is intended for use 6239 with the linker option of the same name. 6240 6241 6242 6243File: as.info, Node: ARM Syntax, Next: ARM Floating Point, Prev: ARM Options, Up: ARM-Dependent 6244 62459.3.2 Syntax 6246------------ 6247 6248* Menu: 6249 6250* ARM-Chars:: Special Characters 6251* ARM-Regs:: Register Names 6252* ARM-Relocations:: Relocations 6253 6254 6255File: as.info, Node: ARM-Chars, Next: ARM-Regs, Up: ARM Syntax 6256 62579.3.2.1 Special Characters 6258.......................... 6259 6260The presence of a `@' on a line indicates the start of a comment that 6261extends to the end of the current line. If a `#' appears as the first 6262character of a line, the whole line is treated as a comment. 6263 6264 The `;' character can be used instead of a newline to separate 6265statements. 6266 6267 Either `#' or `$' can be used to indicate immediate operands. 6268 6269 *TODO* Explain about /data modifier on symbols. 6270 6271 6272File: as.info, Node: ARM-Regs, Next: ARM-Relocations, Prev: ARM-Chars, Up: ARM Syntax 6273 62749.3.2.2 Register Names 6275...................... 6276 6277*TODO* Explain about ARM register naming, and the predefined names. 6278 6279 6280File: as.info, Node: ARM Floating Point, Next: ARM Directives, Prev: ARM Syntax, Up: ARM-Dependent 6281 62829.3.3 Floating Point 6283-------------------- 6284 6285The ARM family uses IEEE floating-point numbers. 6286 6287 6288File: as.info, Node: ARM-Relocations, Prev: ARM-Regs, Up: ARM Syntax 6289 62909.3.3.1 ARM relocation generation 6291................................. 6292 6293Specific data relocations can be generated by putting the relocation 6294name in parentheses after the symbol name. For example: 6295 6296 .word foo(TARGET1) 6297 6298 This will generate an `R_ARM_TARGET1' relocation against the symbol 6299FOO. The following relocations are supported: `GOT', `GOTOFF', 6300`TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `GOTTPOFF' 6301and `TPOFF'. 6302 6303 For compatibility with older toolchains the assembler also accepts 6304`(PLT)' after branch targets. This will generate the deprecated 6305`R_ARM_PLT32' relocation. 6306 6307 Relocations for `MOVW' and `MOVT' instructions can be generated by 6308prefixing the value with `#:lower16:' and `#:upper16' respectively. 6309For example to load the 32-bit address of foo into r0: 6310 6311 MOVW r0, #:lower16:foo 6312 MOVT r0, #:upper16:foo 6313 6314 6315File: as.info, Node: ARM Directives, Next: ARM Opcodes, Prev: ARM Floating Point, Up: ARM-Dependent 6316 63179.3.4 ARM Machine Directives 6318---------------------------- 6319 6320`.align EXPRESSION [, EXPRESSION]' 6321 This is the generic .ALIGN directive. For the ARM however if the 6322 first argument is zero (ie no alignment is needed) the assembler 6323 will behave as if the argument had been 2 (ie pad to the next four 6324 byte boundary). This is for compatibility with ARM's own 6325 assembler. 6326 6327`NAME .req REGISTER NAME' 6328 This creates an alias for REGISTER NAME called NAME. For example: 6329 6330 foo .req r0 6331 6332`.unreq ALIAS-NAME' 6333 This undefines a register alias which was previously defined using 6334 the `req', `dn' or `qn' directives. For example: 6335 6336 foo .req r0 6337 .unreq foo 6338 6339 An error occurs if the name is undefined. Note - this pseudo op 6340 can be used to delete builtin in register name aliases (eg 'r0'). 6341 This should only be done if it is really necessary. 6342 6343`NAME .dn REGISTER NAME [.TYPE] [[INDEX]]' 6344 6345`NAME .qn REGISTER NAME [.TYPE] [[INDEX]]' 6346 The `dn' and `qn' directives are used to create typed and/or 6347 indexed register aliases for use in Advanced SIMD Extension (Neon) 6348 instructions. The former should be used to create aliases of 6349 double-precision registers, and the latter to create aliases of 6350 quad-precision registers. 6351 6352 If these directives are used to create typed aliases, those 6353 aliases can be used in Neon instructions instead of writing types 6354 after the mnemonic or after each operand. For example: 6355 6356 x .dn d2.f32 6357 y .dn d3.f32 6358 z .dn d4.f32[1] 6359 vmul x,y,z 6360 6361 This is equivalent to writing the following: 6362 6363 vmul.f32 d2,d3,d4[1] 6364 6365 Aliases created using `dn' or `qn' can be destroyed using `unreq'. 6366 6367`.code `[16|32]'' 6368 This directive selects the instruction set being generated. The 6369 value 16 selects Thumb, with the value 32 selecting ARM. 6370 6371`.thumb' 6372 This performs the same action as .CODE 16. 6373 6374`.arm' 6375 This performs the same action as .CODE 32. 6376 6377`.force_thumb' 6378 This directive forces the selection of Thumb instructions, even if 6379 the target processor does not support those instructions 6380 6381`.thumb_func' 6382 This directive specifies that the following symbol is the name of a 6383 Thumb encoded function. This information is necessary in order to 6384 allow the assembler and linker to generate correct code for 6385 interworking between Arm and Thumb instructions and should be used 6386 even if interworking is not going to be performed. The presence 6387 of this directive also implies `.thumb' 6388 6389 This directive is not neccessary when generating EABI objects. On 6390 these targets the encoding is implicit when generating Thumb code. 6391 6392`.thumb_set' 6393 This performs the equivalent of a `.set' directive in that it 6394 creates a symbol which is an alias for another symbol (possibly 6395 not yet defined). This directive also has the added property in 6396 that it marks the aliased symbol as being a thumb function entry 6397 point, in the same way that the `.thumb_func' directive does. 6398 6399`.ltorg' 6400 This directive causes the current contents of the literal pool to 6401 be dumped into the current section (which is assumed to be the 6402 .text section) at the current location (aligned to a word 6403 boundary). `GAS' maintains a separate literal pool for each 6404 section and each sub-section. The `.ltorg' directive will only 6405 affect the literal pool of the current section and sub-section. 6406 At the end of assembly all remaining, un-empty literal pools will 6407 automatically be dumped. 6408 6409 Note - older versions of `GAS' would dump the current literal pool 6410 any time a section change occurred. This is no longer done, since 6411 it prevents accurate control of the placement of literal pools. 6412 6413`.pool' 6414 This is a synonym for .ltorg. 6415 6416`.fnstart' 6417 Marks the start of a function with an unwind table entry. 6418 6419`.fnend' 6420 Marks the end of a function with an unwind table entry. The 6421 unwind index table entry is created when this directive is 6422 processed. 6423 6424 If no personality routine has been specified then standard 6425 personality routine 0 or 1 will be used, depending on the number 6426 of unwind opcodes required. 6427 6428`.cantunwind' 6429 Prevents unwinding through the current function. No personality 6430 routine or exception table data is required or permitted. 6431 6432`.personality NAME' 6433 Sets the personality routine for the current function to NAME. 6434 6435`.personalityindex INDEX' 6436 Sets the personality routine for the current function to the EABI 6437 standard routine number INDEX 6438 6439`.handlerdata' 6440 Marks the end of the current function, and the start of the 6441 exception table entry for that function. Anything between this 6442 directive and the `.fnend' directive will be added to the 6443 exception table entry. 6444 6445 Must be preceded by a `.personality' or `.personalityindex' 6446 directive. 6447 6448`.save REGLIST' 6449 Generate unwinder annotations to restore the registers in REGLIST. 6450 The format of REGLIST is the same as the corresponding 6451 store-multiple instruction. 6452 6453 _core registers_ 6454 .save {r4, r5, r6, lr} 6455 stmfd sp!, {r4, r5, r6, lr} 6456 _FPA registers_ 6457 .save f4, 2 6458 sfmfd f4, 2, [sp]! 6459 _VFP registers_ 6460 .save {d8, d9, d10} 6461 fstmdx sp!, {d8, d9, d10} 6462 _iWMMXt registers_ 6463 .save {wr10, wr11} 6464 wstrd wr11, [sp, #-8]! 6465 wstrd wr10, [sp, #-8]! 6466 or 6467 .save wr11 6468 wstrd wr11, [sp, #-8]! 6469 .save wr10 6470 wstrd wr10, [sp, #-8]! 6471 6472`.vsave VFP-REGLIST' 6473 Generate unwinder annotations to restore the VFP registers in 6474 VFP-REGLIST using FLDMD. Also works for VFPv3 registers that are 6475 to be restored using VLDM. The format of VFP-REGLIST is the same 6476 as the corresponding store-multiple instruction. 6477 6478 _VFP registers_ 6479 .vsave {d8, d9, d10} 6480 fstmdd sp!, {d8, d9, d10} 6481 _VFPv3 registers_ 6482 .vsave {d15, d16, d17} 6483 vstm sp!, {d15, d16, d17} 6484 6485 Since FLDMX and FSTMX are now deprecated, this directive should be 6486 used in favour of `.save' for saving VFP registers for ARMv6 and 6487 above. 6488 6489`.pad #COUNT' 6490 Generate unwinder annotations for a stack adjustment of COUNT 6491 bytes. A positive value indicates the function prologue allocated 6492 stack space by decrementing the stack pointer. 6493 6494`.movsp REG [, #OFFSET]' 6495 Tell the unwinder that REG contains an offset from the current 6496 stack pointer. If OFFSET is not specified then it is assumed to be 6497 zero. 6498 6499`.setfp FPREG, SPREG [, #OFFSET]' 6500 Make all unwinder annotations relaive to a frame pointer. Without 6501 this the unwinder will use offsets from the stack pointer. 6502 6503 The syntax of this directive is the same as the `sub' or `mov' 6504 instruction used to set the frame pointer. SPREG must be either 6505 `sp' or mentioned in a previous `.movsp' directive. 6506 6507 .movsp ip 6508 mov ip, sp 6509 ... 6510 .setfp fp, ip, #4 6511 sub fp, ip, #4 6512 6513`.raw OFFSET, BYTE1, ...' 6514 Insert one of more arbitary unwind opcode bytes, which are known 6515 to adjust the stack pointer by OFFSET bytes. 6516 6517 For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save 6518 {r0}' 6519 6520`.cpu NAME' 6521 Select the target processor. Valid values for NAME are the same as 6522 for the `-mcpu' commandline option. 6523 6524`.arch NAME' 6525 Select the target architecture. Valid values for NAME are the 6526 same as for the `-march' commandline option. 6527 6528`.object_arch NAME' 6529 Override the architecture recorded in the EABI object attribute 6530 section. Valid values for NAME are the same as for the `.arch' 6531 directive. Typically this is useful when code uses runtime 6532 detection of CPU features. 6533 6534`.fpu NAME' 6535 Select the floating point unit to assemble for. Valid values for 6536 NAME are the same as for the `-mfpu' commandline option. 6537 6538`.eabi_attribute TAG, VALUE' 6539 Set the EABI object attribute number TAG to VALUE. The value is 6540 either a `number', `"string"', or `number, "string"' depending on 6541 the tag. 6542 6543 6544 6545File: as.info, Node: ARM Opcodes, Next: ARM Mapping Symbols, Prev: ARM Directives, Up: ARM-Dependent 6546 65479.3.5 Opcodes 6548------------- 6549 6550`as' implements all the standard ARM opcodes. It also implements 6551several pseudo opcodes, including several synthetic load instructions. 6552 6553`NOP' 6554 nop 6555 6556 This pseudo op will always evaluate to a legal ARM instruction 6557 that does nothing. Currently it will evaluate to MOV r0, r0. 6558 6559`LDR' 6560 ldr <register> , = <expression> 6561 6562 If expression evaluates to a numeric constant then a MOV or MVN 6563 instruction will be used in place of the LDR instruction, if the 6564 constant can be generated by either of these instructions. 6565 Otherwise the constant will be placed into the nearest literal 6566 pool (if it not already there) and a PC relative LDR instruction 6567 will be generated. 6568 6569`ADR' 6570 adr <register> <label> 6571 6572 This instruction will load the address of LABEL into the indicated 6573 register. The instruction will evaluate to a PC relative ADD or 6574 SUB instruction depending upon where the label is located. If the 6575 label is out of range, or if it is not defined in the same file 6576 (and section) as the ADR instruction, then an error will be 6577 generated. This instruction will not make use of the literal pool. 6578 6579`ADRL' 6580 adrl <register> <label> 6581 6582 This instruction will load the address of LABEL into the indicated 6583 register. The instruction will evaluate to one or two PC relative 6584 ADD or SUB instructions depending upon where the label is located. 6585 If a second instruction is not needed a NOP instruction will be 6586 generated in its place, so that this instruction is always 8 bytes 6587 long. 6588 6589 If the label is out of range, or if it is not defined in the same 6590 file (and section) as the ADRL instruction, then an error will be 6591 generated. This instruction will not make use of the literal pool. 6592 6593 6594 For information on the ARM or Thumb instruction sets, see `ARM 6595Software Development Toolkit Reference Manual', Advanced RISC Machines 6596Ltd. 6597 6598 6599File: as.info, Node: ARM Mapping Symbols, Next: ARM Unwinding Tutorial, Prev: ARM Opcodes, Up: ARM-Dependent 6600 66019.3.6 Mapping Symbols 6602--------------------- 6603 6604The ARM ELF specification requires that special symbols be inserted 6605into object files to mark certain features: 6606 6607`$a' 6608 At the start of a region of code containing ARM instructions. 6609 6610`$t' 6611 At the start of a region of code containing THUMB instructions. 6612 6613`$d' 6614 At the start of a region of data. 6615 6616 6617 The assembler will automatically insert these symbols for you - there 6618is no need to code them yourself. Support for tagging symbols ($b, $f, 6619$p and $m) which is also mentioned in the current ARM ELF specification 6620is not implemented. This is because they have been dropped from the 6621new EABI and so tools cannot rely upon their presence. 6622 6623 6624File: as.info, Node: ARM Unwinding Tutorial, Prev: ARM Mapping Symbols, Up: ARM-Dependent 6625 66269.3.7 Unwinding 6627--------------- 6628 6629The ABI for the ARM Architecture specifies a standard format for 6630exception unwind information. This information is used when an 6631exception is thrown to determine where control should be transferred. 6632In particular, the unwind information is used to determine which 6633function called the function that threw the exception, and which 6634function called that one, and so forth. This information is also used 6635to restore the values of callee-saved registers in the function 6636catching the exception. 6637 6638 If you are writing functions in assembly code, and those functions 6639call other functions that throw exceptions, you must use assembly 6640pseudo ops to ensure that appropriate exception unwind information is 6641generated. Otherwise, if one of the functions called by your assembly 6642code throws an exception, the run-time library will be unable to unwind 6643the stack through your assembly code and your program will not behave 6644correctly. 6645 6646 To illustrate the use of these pseudo ops, we will examine the code 6647that G++ generates for the following C++ input: 6648 6649 6650void callee (int *); 6651 6652int 6653caller () 6654{ 6655 int i; 6656 callee (&i); 6657 return i; 6658} 6659 6660 This example does not show how to throw or catch an exception from 6661assembly code. That is a much more complex operation and should always 6662be done in a high-level language, such as C++, that directly supports 6663exceptions. 6664 6665 The code generated by one particular version of G++ when compiling 6666the example above is: 6667 6668 6669_Z6callerv: 6670 .fnstart 6671.LFB2: 6672 @ Function supports interworking. 6673 @ args = 0, pretend = 0, frame = 8 6674 @ frame_needed = 1, uses_anonymous_args = 0 6675 stmfd sp!, {fp, lr} 6676 .save {fp, lr} 6677.LCFI0: 6678 .setfp fp, sp, #4 6679 add fp, sp, #4 6680.LCFI1: 6681 .pad #8 6682 sub sp, sp, #8 6683.LCFI2: 6684 sub r3, fp, #8 6685 mov r0, r3 6686 bl _Z6calleePi 6687 ldr r3, [fp, #-8] 6688 mov r0, r3 6689 sub sp, fp, #4 6690 ldmfd sp!, {fp, lr} 6691 bx lr 6692.LFE2: 6693 .fnend 6694 6695 Of course, the sequence of instructions varies based on the options 6696you pass to GCC and on the version of GCC in use. The exact 6697instructions are not important since we are focusing on the pseudo ops 6698that are used to generate unwind information. 6699 6700 An important assumption made by the unwinder is that the stack frame 6701does not change during the body of the function. In particular, since 6702we assume that the assembly code does not itself throw an exception, 6703the only point where an exception can be thrown is from a call, such as 6704the `bl' instruction above. At each call site, the same saved 6705registers (including `lr', which indicates the return address) must be 6706located in the same locations relative to the frame pointer. 6707 6708 The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op 6709appears immediately before the first instruction of the function while 6710the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears 6711immediately after the last instruction of the function. These pseudo 6712ops specify the range of the function. 6713 6714 Only the order of the other pseudos ops (e.g., `.setfp' or `.pad') 6715matters; their exact locations are irrelevant. In the example above, 6716the compiler emits the pseudo ops with particular instructions. That 6717makes it easier to understand the code, but it is not required for 6718correctness. It would work just as well to emit all of the pseudo ops 6719other than `.fnend' in the same order, but immediately after `.fnstart'. 6720 6721 The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates 6722registers that have been saved to the stack so that they can be 6723restored before the function returns. The argument to the `.save' 6724pseudo op is a list of registers to save. If a register is 6725"callee-saved" (as specified by the ABI) and is modified by the 6726function you are writing, then your code must save the value before it 6727is modified and restore the original value before the function returns. 6728If an exception is thrown, the run-time library restores the values of 6729these registers from their locations on the stack before returning 6730control to the exception handler. (Of course, if an exception is not 6731thrown, the function that contains the `.save' pseudo op restores these 6732registers in the function epilogue, as is done with the `ldmfd' 6733instruction above.) 6734 6735 You do not have to save callee-saved registers at the very beginning 6736of the function and you do not need to use the `.save' pseudo op 6737immediately following the point at which the registers are saved. 6738However, if you modify a callee-saved register, you must save it on the 6739stack before modifying it and before calling any functions which might 6740throw an exception. And, you must use the `.save' pseudo op to 6741indicate that you have done so. 6742 6743 The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification 6744of the stack pointer that does not save any registers. The argument is 6745the number of bytes (in decimal) that are subtracted from the stack 6746pointer. (On ARM CPUs, the stack grows downwards, so subtracting from 6747the stack pointer increases the size of the stack.) 6748 6749 The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op 6750indicates the register that contains the frame pointer. The first 6751argument is the register that is set, which is typically `fp'. The 6752second argument indicates the register from which the frame pointer 6753takes its value. The third argument, if present, is the value (in 6754decimal) added to the register specified by the second argument to 6755compute the value of the frame pointer. You should not modify the 6756frame pointer in the body of the function. 6757 6758 If you do not use a frame pointer, then you should not use the 6759`.setfp' pseudo op. If you do not use a frame pointer, then you should 6760avoid modifying the stack pointer outside of the function prologue. 6761Otherwise, the run-time library will be unable to find saved registers 6762when it is unwinding the stack. 6763 6764 The pseudo ops described above are sufficient for writing assembly 6765code that calls functions which may throw exceptions. If you need to 6766know more about the object-file format used to represent unwind 6767information, you may consult the `Exception Handling ABI for the ARM 6768Architecture' available from `http://infocenter.arm.com'. 6769 6770 6771File: as.info, Node: AVR-Dependent, Next: BFIN-Dependent, Prev: ARM-Dependent, Up: Machine Dependencies 6772 67739.4 AVR Dependent Features 6774========================== 6775 6776* Menu: 6777 6778* AVR Options:: Options 6779* AVR Syntax:: Syntax 6780* AVR Opcodes:: Opcodes 6781 6782 6783File: as.info, Node: AVR Options, Next: AVR Syntax, Up: AVR-Dependent 6784 67859.4.1 Options 6786------------- 6787 6788`-mmcu=MCU' 6789 Specify ATMEL AVR instruction set or MCU type. 6790 6791 Instruction set avr1 is for the minimal AVR core, not supported by 6792 the C compiler, only for assembler programs (MCU types: at90s1200, 6793 attiny11, attiny12, attiny15, attiny28). 6794 6795 Instruction set avr2 (default) is for the classic AVR core with up 6796 to 8K program memory space (MCU types: at90s2313, at90s2323, 6797 at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433, 6798 at90s4434, at90s8515, at90c8534, at90s8535). 6799 6800 Instruction set avr25 is for the classic AVR core with up to 8K 6801 program memory space plus the MOVW instruction (MCU types: 6802 attiny13, attiny13a, attiny2313, attiny24, attiny44, attiny84, 6803 attiny25, attiny45, attiny85, attiny261, attiny461, attiny861, 6804 attiny43u, attiny48, attiny88, at86rf401). 6805 6806 Instruction set avr3 is for the classic AVR core with up to 128K 6807 program memory space (MCU types: at43usb355, at76c711). 6808 6809 Instruction set avr31 is for the classic AVR core with exactly 6810 128K program memory space (MCU types: atmega103, at43usb320). 6811 6812 Instruction set avr35 is for classic AVR core plus MOVW, CALL, and 6813 JMP instructions (MCU types: attiny167, at90usb82, at90usb162). 6814 6815 Instruction set avr4 is for the enhanced AVR core with up to 8K 6816 program memory space (MCU types: atmega48, atmega48p,atmega8, 6817 atmega88, atmega88p, atmega8515, atmega8535, atmega8hva, at90pwm1, 6818 at90pwm2, at90pwm2b, at90pwm3, at90pwm3b). 6819 6820 Instruction set avr5 is for the enhanced AVR core with up to 128K 6821 program memory space (MCU types: atmega16, atmega161, atmega162, 6822 atmega163, atmega164p, atmega165, atmega165p, atmega168, 6823 atmega168p, atmega169, atmega169p, atmega32, atmega323, 6824 atmega324p, atmega325, atmega325p, atmega3250, atmega3250p, 6825 atmega328p, atmega329, atmega329p, atmega3290, atmega3290p, 6826 atmega406, atmega64, atmega640, atmega644, atmega644p, atmega645, 6827 atmega6450, atmega649, atmega6490, atmega16hva, at90can32, 6828 at90can64, at90pwm216, at90pwm316, atmega16u4, atmega32c1, 6829 atmega32m1, atmega32u4, at90usb646, at90usb647, at94k). 6830 6831 Instruction set avr51 is for the enhanced AVR core with exactly 6832 128K program memory space (MCU types: atmega128, atmega1280, 6833 atmega1281, atmega1284p, at90can128, at90usb1286, at90usb1287). 6834 6835 Instruction set avr6 is for the enhanced AVR core with a 3-byte PC 6836 (MCU types: atmega2560, atmega2561). 6837 6838`-mall-opcodes' 6839 Accept all AVR opcodes, even if not supported by `-mmcu'. 6840 6841`-mno-skip-bug' 6842 This option disable warnings for skipping two-word instructions. 6843 6844`-mno-wrap' 6845 This option reject `rjmp/rcall' instructions with 8K wrap-around. 6846 6847 6848 6849File: as.info, Node: AVR Syntax, Next: AVR Opcodes, Prev: AVR Options, Up: AVR-Dependent 6850 68519.4.2 Syntax 6852------------ 6853 6854* Menu: 6855 6856* AVR-Chars:: Special Characters 6857* AVR-Regs:: Register Names 6858* AVR-Modifiers:: Relocatable Expression Modifiers 6859 6860 6861File: as.info, Node: AVR-Chars, Next: AVR-Regs, Up: AVR Syntax 6862 68639.4.2.1 Special Characters 6864.......................... 6865 6866The presence of a `;' on a line indicates the start of a comment that 6867extends to the end of the current line. If a `#' appears as the first 6868character of a line, the whole line is treated as a comment. 6869 6870 The `$' character can be used instead of a newline to separate 6871statements. 6872 6873 6874File: as.info, Node: AVR-Regs, Next: AVR-Modifiers, Prev: AVR-Chars, Up: AVR Syntax 6875 68769.4.2.2 Register Names 6877...................... 6878 6879The AVR has 32 x 8-bit general purpose working registers `r0', `r1', 6880... `r31'. Six of the 32 registers can be used as three 16-bit 6881indirect address register pointers for Data Space addressing. One of 6882the these address pointers can also be used as an address pointer for 6883look up tables in Flash program memory. These added function registers 6884are the 16-bit `X', `Y' and `Z' - registers. 6885 6886 X = r26:r27 6887 Y = r28:r29 6888 Z = r30:r31 6889 6890 6891File: as.info, Node: AVR-Modifiers, Prev: AVR-Regs, Up: AVR Syntax 6892 68939.4.2.3 Relocatable Expression Modifiers 6894........................................ 6895 6896The assembler supports several modifiers when using relocatable 6897addresses in AVR instruction operands. The general syntax is the 6898following: 6899 6900 modifier(relocatable-expression) 6901 6902`lo8' 6903 This modifier allows you to use bits 0 through 7 of an address 6904 expression as 8 bit relocatable expression. 6905 6906`hi8' 6907 This modifier allows you to use bits 7 through 15 of an address 6908 expression as 8 bit relocatable expression. This is useful with, 6909 for example, the AVR `ldi' instruction and `lo8' modifier. 6910 6911 For example 6912 6913 ldi r26, lo8(sym+10) 6914 ldi r27, hi8(sym+10) 6915 6916`hh8' 6917 This modifier allows you to use bits 16 through 23 of an address 6918 expression as 8 bit relocatable expression. Also, can be useful 6919 for loading 32 bit constants. 6920 6921`hlo8' 6922 Synonym of `hh8'. 6923 6924`hhi8' 6925 This modifier allows you to use bits 24 through 31 of an 6926 expression as 8 bit expression. This is useful with, for example, 6927 the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8', 6928 modifier. 6929 6930 For example 6931 6932 ldi r26, lo8(285774925) 6933 ldi r27, hi8(285774925) 6934 ldi r28, hlo8(285774925) 6935 ldi r29, hhi8(285774925) 6936 ; r29,r28,r27,r26 = 285774925 6937 6938`pm_lo8' 6939 This modifier allows you to use bits 0 through 7 of an address 6940 expression as 8 bit relocatable expression. This modifier useful 6941 for addressing data or code from Flash/Program memory. The using 6942 of `pm_lo8' similar to `lo8'. 6943 6944`pm_hi8' 6945 This modifier allows you to use bits 8 through 15 of an address 6946 expression as 8 bit relocatable expression. This modifier useful 6947 for addressing data or code from Flash/Program memory. 6948 6949`pm_hh8' 6950 This modifier allows you to use bits 15 through 23 of an address 6951 expression as 8 bit relocatable expression. This modifier useful 6952 for addressing data or code from Flash/Program memory. 6953 6954 6955 6956File: as.info, Node: AVR Opcodes, Prev: AVR Syntax, Up: AVR-Dependent 6957 69589.4.3 Opcodes 6959------------- 6960 6961For detailed information on the AVR machine instruction set, see 6962`www.atmel.com/products/AVR'. 6963 6964 `as' implements all the standard AVR opcodes. The following table 6965summarizes the AVR opcodes, and their arguments. 6966 6967 Legend: 6968 r any register 6969 d `ldi' register (r16-r31) 6970 v `movw' even register (r0, r2, ..., r28, r30) 6971 a `fmul' register (r16-r23) 6972 w `adiw' register (r24,r26,r28,r30) 6973 e pointer registers (X,Y,Z) 6974 b base pointer register and displacement ([YZ]+disp) 6975 z Z pointer register (for [e]lpm Rd,Z[+]) 6976 M immediate value from 0 to 255 6977 n immediate value from 0 to 255 ( n = ~M ). Relocation impossible 6978 s immediate value from 0 to 7 6979 P Port address value from 0 to 63. (in, out) 6980 p Port address value from 0 to 31. (cbi, sbi, sbic, sbis) 6981 K immediate value from 0 to 63 (used in `adiw', `sbiw') 6982 i immediate value 6983 l signed pc relative offset from -64 to 63 6984 L signed pc relative offset from -2048 to 2047 6985 h absolute code address (call, jmp) 6986 S immediate value from 0 to 7 (S = s << 4) 6987 ? use this opcode entry if no parameters, else use next opcode entry 6988 6989 1001010010001000 clc 6990 1001010011011000 clh 6991 1001010011111000 cli 6992 1001010010101000 cln 6993 1001010011001000 cls 6994 1001010011101000 clt 6995 1001010010111000 clv 6996 1001010010011000 clz 6997 1001010000001000 sec 6998 1001010001011000 seh 6999 1001010001111000 sei 7000 1001010000101000 sen 7001 1001010001001000 ses 7002 1001010001101000 set 7003 1001010000111000 sev 7004 1001010000011000 sez 7005 100101001SSS1000 bclr S 7006 100101000SSS1000 bset S 7007 1001010100001001 icall 7008 1001010000001001 ijmp 7009 1001010111001000 lpm ? 7010 1001000ddddd010+ lpm r,z 7011 1001010111011000 elpm ? 7012 1001000ddddd011+ elpm r,z 7013 0000000000000000 nop 7014 1001010100001000 ret 7015 1001010100011000 reti 7016 1001010110001000 sleep 7017 1001010110011000 break 7018 1001010110101000 wdr 7019 1001010111101000 spm 7020 000111rdddddrrrr adc r,r 7021 000011rdddddrrrr add r,r 7022 001000rdddddrrrr and r,r 7023 000101rdddddrrrr cp r,r 7024 000001rdddddrrrr cpc r,r 7025 000100rdddddrrrr cpse r,r 7026 001001rdddddrrrr eor r,r 7027 001011rdddddrrrr mov r,r 7028 100111rdddddrrrr mul r,r 7029 001010rdddddrrrr or r,r 7030 000010rdddddrrrr sbc r,r 7031 000110rdddddrrrr sub r,r 7032 001001rdddddrrrr clr r 7033 000011rdddddrrrr lsl r 7034 000111rdddddrrrr rol r 7035 001000rdddddrrrr tst r 7036 0111KKKKddddKKKK andi d,M 7037 0111KKKKddddKKKK cbr d,n 7038 1110KKKKddddKKKK ldi d,M 7039 11101111dddd1111 ser d 7040 0110KKKKddddKKKK ori d,M 7041 0110KKKKddddKKKK sbr d,M 7042 0011KKKKddddKKKK cpi d,M 7043 0100KKKKddddKKKK sbci d,M 7044 0101KKKKddddKKKK subi d,M 7045 1111110rrrrr0sss sbrc r,s 7046 1111111rrrrr0sss sbrs r,s 7047 1111100ddddd0sss bld r,s 7048 1111101ddddd0sss bst r,s 7049 10110PPdddddPPPP in r,P 7050 10111PPrrrrrPPPP out P,r 7051 10010110KKddKKKK adiw w,K 7052 10010111KKddKKKK sbiw w,K 7053 10011000pppppsss cbi p,s 7054 10011010pppppsss sbi p,s 7055 10011001pppppsss sbic p,s 7056 10011011pppppsss sbis p,s 7057 111101lllllll000 brcc l 7058 111100lllllll000 brcs l 7059 111100lllllll001 breq l 7060 111101lllllll100 brge l 7061 111101lllllll101 brhc l 7062 111100lllllll101 brhs l 7063 111101lllllll111 brid l 7064 111100lllllll111 brie l 7065 111100lllllll000 brlo l 7066 111100lllllll100 brlt l 7067 111100lllllll010 brmi l 7068 111101lllllll001 brne l 7069 111101lllllll010 brpl l 7070 111101lllllll000 brsh l 7071 111101lllllll110 brtc l 7072 111100lllllll110 brts l 7073 111101lllllll011 brvc l 7074 111100lllllll011 brvs l 7075 111101lllllllsss brbc s,l 7076 111100lllllllsss brbs s,l 7077 1101LLLLLLLLLLLL rcall L 7078 1100LLLLLLLLLLLL rjmp L 7079 1001010hhhhh111h call h 7080 1001010hhhhh110h jmp h 7081 1001010rrrrr0101 asr r 7082 1001010rrrrr0000 com r 7083 1001010rrrrr1010 dec r 7084 1001010rrrrr0011 inc r 7085 1001010rrrrr0110 lsr r 7086 1001010rrrrr0001 neg r 7087 1001000rrrrr1111 pop r 7088 1001001rrrrr1111 push r 7089 1001010rrrrr0111 ror r 7090 1001010rrrrr0010 swap r 7091 00000001ddddrrrr movw v,v 7092 00000010ddddrrrr muls d,d 7093 000000110ddd0rrr mulsu a,a 7094 000000110ddd1rrr fmul a,a 7095 000000111ddd0rrr fmuls a,a 7096 000000111ddd1rrr fmulsu a,a 7097 1001001ddddd0000 sts i,r 7098 1001000ddddd0000 lds r,i 7099 10o0oo0dddddbooo ldd r,b 7100 100!000dddddee-+ ld r,e 7101 10o0oo1rrrrrbooo std b,r 7102 100!001rrrrree-+ st e,r 7103 1001010100011001 eicall 7104 1001010000011001 eijmp 7105 7106 7107File: as.info, Node: BFIN-Dependent, Next: CR16-Dependent, Prev: AVR-Dependent, Up: Machine Dependencies 7108 71099.5 Blackfin Dependent Features 7110=============================== 7111 7112* Menu: 7113 7114* BFIN Syntax:: BFIN Syntax 7115* BFIN Directives:: BFIN Directives 7116 7117 7118File: as.info, Node: BFIN Syntax, Next: BFIN Directives, Up: BFIN-Dependent 7119 71209.5.1 Syntax 7121------------ 7122 7123`Special Characters' 7124 Assembler input is free format and may appear anywhere on the line. 7125 One instruction may extend across multiple lines or more than one 7126 instruction may appear on the same line. White space (space, tab, 7127 comments or newline) may appear anywhere between tokens. A token 7128 must not have embedded spaces. Tokens include numbers, register 7129 names, keywords, user identifiers, and also some multicharacter 7130 special symbols like "+=", "/*" or "||". 7131 7132`Instruction Delimiting' 7133 A semicolon must terminate every instruction. Sometimes a complete 7134 instruction will consist of more than one operation. There are two 7135 cases where this occurs. The first is when two general operations 7136 are combined. Normally a comma separates the different parts, as 7137 in 7138 7139 a0= r3.h * r2.l, a1 = r3.l * r2.h ; 7140 7141 The second case occurs when a general instruction is combined with 7142 one or two memory references for joint issue. The latter portions 7143 are set off by a "||" token. 7144 7145 a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++]; 7146 7147`Register Names' 7148 The assembler treats register names and instruction keywords in a 7149 case insensitive manner. User identifiers are case sensitive. 7150 Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the 7151 assembler. 7152 7153 Register names are reserved and may not be used as program 7154 identifiers. 7155 7156 Some operations (such as "Move Register") require a register pair. 7157 Register pairs are always data registers and are denoted using a 7158 colon, eg., R3:2. The larger number must be written firsts. Note 7159 that the hardware only supports odd-even pairs, eg., R7:6, R5:4, 7160 R3:2, and R1:0. 7161 7162 Some instructions (such as -SP (Push Multiple)) require a group of 7163 adjacent registers. Adjacent registers are denoted in the syntax 7164 by the range enclosed in parentheses and separated by a colon, 7165 eg., (R7:3). Again, the larger number appears first. 7166 7167 Portions of a particular register may be individually specified. 7168 This is written with a dot (".") following the register name and 7169 then a letter denoting the desired portion. For 32-bit registers, 7170 ".H" denotes the most significant ("High") portion. ".L" denotes 7171 the least-significant portion. The subdivisions of the 40-bit 7172 registers are described later. 7173 7174`Accumulators' 7175 The set of 40-bit registers A1 and A0 that normally contain data 7176 that is being manipulated. Each accumulator can be accessed in 7177 four ways. 7178 7179 `one 40-bit register' 7180 The register will be referred to as A1 or A0. 7181 7182 `one 32-bit register' 7183 The registers are designated as A1.W or A0.W. 7184 7185 `two 16-bit registers' 7186 The registers are designated as A1.H, A1.L, A0.H or A0.L. 7187 7188 `one 8-bit register' 7189 The registers are designated as A1.X or A0.X for the bits that 7190 extend beyond bit 31. 7191 7192`Data Registers' 7193 The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7) 7194 that normally contain data for manipulation. These are 7195 abbreviated as D-register or Dreg. Data registers can be accessed 7196 as 32-bit registers or as two independent 16-bit registers. The 7197 least significant 16 bits of each register is called the "low" 7198 half and is designated with ".L" following the register name. The 7199 most significant 16 bits are called the "high" half and is 7200 designated with ".H" following the name. 7201 7202 R7.L, r2.h, r4.L, R0.H 7203 7204`Pointer Registers' 7205 The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP) 7206 that normally contain byte addresses of data structures. These are 7207 abbreviated as P-register or Preg. 7208 7209 p2, p5, fp, sp 7210 7211`Stack Pointer SP' 7212 The stack pointer contains the 32-bit address of the last occupied 7213 byte location in the stack. The stack grows by decrementing the 7214 stack pointer. 7215 7216`Frame Pointer FP' 7217 The frame pointer contains the 32-bit address of the previous frame 7218 pointer in the stack. It is located at the top of a frame. 7219 7220`Loop Top' 7221 LT0 and LT1. These registers contain the 32-bit address of the 7222 top of a zero overhead loop. 7223 7224`Loop Count' 7225 LC0 and LC1. These registers contain the 32-bit counter of the 7226 zero overhead loop executions. 7227 7228`Loop Bottom' 7229 LB0 and LB1. These registers contain the 32-bit address of the 7230 bottom of a zero overhead loop. 7231 7232`Index Registers' 7233 The set of 32-bit registers (I0, I1, I2, I3) that normally contain 7234 byte addresses of data structures. Abbreviated I-register or Ireg. 7235 7236`Modify Registers' 7237 The set of 32-bit registers (M0, M1, M2, M3) that normally contain 7238 offset values that are added and subracted to one of the index 7239 registers. Abbreviated as Mreg. 7240 7241`Length Registers' 7242 The set of 32-bit registers (L0, L1, L2, L3) that normally contain 7243 the length in bytes of the circular buffer. Abbreviated as Lreg. 7244 Clear the Lreg to disable circular addressing for the 7245 corresponding Ireg. 7246 7247`Base Registers' 7248 The set of 32-bit registers (B0, B1, B2, B3) that normally contain 7249 the base address in bytes of the circular buffer. Abbreviated as 7250 Breg. 7251 7252`Floating Point' 7253 The Blackfin family has no hardware floating point but the .float 7254 directive generates ieee floating point numbers for use with 7255 software floating point libraries. 7256 7257`Blackfin Opcodes' 7258 For detailed information on the Blackfin machine instruction set, 7259 see the Blackfin(r) Processor Instruction Set Reference. 7260 7261 7262 7263File: as.info, Node: BFIN Directives, Prev: BFIN Syntax, Up: BFIN-Dependent 7264 72659.5.2 Directives 7266---------------- 7267 7268The following directives are provided for compatibility with the VDSP 7269assembler. 7270 7271`.byte2' 7272 Initializes a four byte data object. 7273 7274`.byte4' 7275 Initializes a two byte data object. 7276 7277`.db' 7278 TBD 7279 7280`.dd' 7281 TBD 7282 7283`.dw' 7284 TBD 7285 7286`.var' 7287 Define and initialize a 32 bit data object. 7288 7289 7290File: as.info, Node: CR16-Dependent, Next: CRIS-Dependent, Prev: BFIN-Dependent, Up: Machine Dependencies 7291 72929.6 CR16 Dependent Features 7293=========================== 7294 7295* Menu: 7296 7297* CR16 Operand Qualifiers:: CR16 Machine Operand Qualifiers 7298 7299 7300File: as.info, Node: CR16 Operand Qualifiers, Up: CR16-Dependent 7301 73029.6.1 CR16 Operand Qualifiers 7303----------------------------- 7304 7305The National Semiconductor CR16 target of `as' has a few machine 7306dependent operand qualifiers. 7307 7308 Operand expression type qualifier is an optional field in the 7309instruction operand, to determines the type of the expression field of 7310an operand. The `@' is required. CR16 architecture uses one of the 7311following expression qualifiers: 7312 7313`s' 7314 - `Specifies expression operand type as small' 7315 7316`m' 7317 - `Specifies expression operand type as medium' 7318 7319`l' 7320 - `Specifies expression operand type as large' 7321 7322`c' 7323 - `Specifies the CR16 Assembler generates a relocation entry for 7324 the operand, where pc has implied bit, the expression is adjusted 7325 accordingly. The linker uses the relocation entry to update the 7326 operand address at link time.' 7327 7328 CR16 target operand qualifiers and its size (in bits): 7329 7330`Immediate Operand' 7331 - s --- 4 bits 7332 7333`' 7334 - m --- 16 bits, for movb and movw instructions. 7335 7336`' 7337 - m --- 20 bits, movd instructions. 7338 7339`' 7340 - l --- 32 bits 7341 7342`Absolute Operand' 7343 - s --- Illegal specifier for this operand. 7344 7345`' 7346 - m --- 20 bits, movd instructions. 7347 7348`Displacement Operand' 7349 - s --- 8 bits 7350 7351`' 7352 - m --- 16 bits 7353 7354`' 7355 - l --- 24 bits 7356 7357 For example: 7358 1 `movw $_myfun@c,r1' 7359 7360 This loads the address of _myfun, shifted right by 1, into r1. 7361 7362 2 `movd $_myfun@c,(r2,r1)' 7363 7364 This loads the address of _myfun, shifted right by 1, into register-pair r2-r1. 7365 7366 3 `_myfun_ptr:' 7367 `.long _myfun@c' 7368 `loadd _myfun_ptr, (r1,r0)' 7369 `jal (r1,r0)' 7370 7371 This .long directive, the address of _myfunc, shifted right by 1 at link time. 7372 7373 7374File: as.info, Node: CRIS-Dependent, Next: D10V-Dependent, Prev: CR16-Dependent, Up: Machine Dependencies 7375 73769.7 CRIS Dependent Features 7377=========================== 7378 7379* Menu: 7380 7381* CRIS-Opts:: Command-line Options 7382* CRIS-Expand:: Instruction expansion 7383* CRIS-Symbols:: Symbols 7384* CRIS-Syntax:: Syntax 7385 7386 7387File: as.info, Node: CRIS-Opts, Next: CRIS-Expand, Up: CRIS-Dependent 7388 73899.7.1 Command-line Options 7390-------------------------- 7391 7392The CRIS version of `as' has these machine-dependent command-line 7393options. 7394 7395 The format of the generated object files can be either ELF or a.out, 7396specified by the command-line options `--emulation=crisaout' and 7397`--emulation=criself'. The default is ELF (criself), unless `as' has 7398been configured specifically for a.out by using the configuration name 7399`cris-axis-aout'. 7400 7401 There are two different link-incompatible ELF object file variants 7402for CRIS, for use in environments where symbols are expected to be 7403prefixed by a leading `_' character and for environments without such a 7404symbol prefix. The variant used for GNU/Linux port has no symbol 7405prefix. Which variant to produce is specified by either of the options 7406`--underscore' and `--no-underscore'. The default is `--underscore'. 7407Since symbols in CRIS a.out objects are expected to have a `_' prefix, 7408specifying `--no-underscore' when generating a.out objects is an error. 7409Besides the object format difference, the effect of this option is to 7410parse register names differently (*note crisnous::). The 7411`--no-underscore' option makes a `$' register prefix mandatory. 7412 7413 The option `--pic' must be passed to `as' in order to recognize the 7414symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note 7415crispic::). This will also affect expansion of instructions. The 7416expansion with `--pic' will use PC-relative rather than (slightly 7417faster) absolute addresses in those expansions. 7418 7419 The option `--march=ARCHITECTURE' specifies the recognized 7420instruction set and recognized register names. It also controls the 7421architecture type of the object file. Valid values for ARCHITECTURE 7422are: 7423`v0_v10' 7424 All instructions and register names for any architecture variant 7425 in the set v0...v10 are recognized. This is the default if the 7426 target is configured as cris-*. 7427 7428`v10' 7429 Only instructions and register names for CRIS v10 (as found in 7430 ETRAX 100 LX) are recognized. This is the default if the target 7431 is configured as crisv10-*. 7432 7433`v32' 7434 Only instructions and register names for CRIS v32 (code name 7435 Guinness) are recognized. This is the default if the target is 7436 configured as crisv32-*. This value implies `--no-mul-bug-abort'. 7437 (A subsequent `--mul-bug-abort' will turn it back on.) 7438 7439`common_v10_v32' 7440 Only instructions with register names and addressing modes with 7441 opcodes common to the v10 and v32 are recognized. 7442 7443 When `-N' is specified, `as' will emit a warning when a 16-bit 7444branch instruction is expanded into a 32-bit multiple-instruction 7445construct (*note CRIS-Expand::). 7446 7447 Some versions of the CRIS v10, for example in the Etrax 100 LX, 7448contain a bug that causes destabilizing memory accesses when a multiply 7449instruction is executed with certain values in the first operand just 7450before a cache-miss. When the `--mul-bug-abort' command line option is 7451active (the default value), `as' will refuse to assemble a file 7452containing a multiply instruction at a dangerous offset, one that could 7453be the last on a cache-line, or is in a section with insufficient 7454alignment. This placement checking does not catch any case where the 7455multiply instruction is dangerously placed because it is located in a 7456delay-slot. The `--mul-bug-abort' command line option turns off the 7457checking. 7458 7459 7460File: as.info, Node: CRIS-Expand, Next: CRIS-Symbols, Prev: CRIS-Opts, Up: CRIS-Dependent 7461 74629.7.2 Instruction expansion 7463--------------------------- 7464 7465`as' will silently choose an instruction that fits the operand size for 7466`[register+constant]' operands. For example, the offset `127' in 7467`move.d [r3+127],r4' fits in an instruction using a signed-byte offset. 7468Similarly, `move.d [r2+32767],r1' will generate an instruction using a 746916-bit offset. For symbolic expressions and constants that do not fit 7470in 16 bits including the sign bit, a 32-bit offset is generated. 7471 7472 For branches, `as' will expand from a 16-bit branch instruction into 7473a sequence of instructions that can reach a full 32-bit address. Since 7474this does not correspond to a single instruction, such expansions can 7475optionally be warned about. *Note CRIS-Opts::. 7476 7477 If the operand is found to fit the range, a `lapc' mnemonic will 7478translate to a `lapcq' instruction. Use `lapc.d' to force the 32-bit 7479`lapc' instruction. 7480 7481 Similarly, the `addo' mnemonic will translate to the shortest 7482fitting instruction of `addoq', `addo.w' and `addo.d', when used with a 7483operand that is a constant known at assembly time. 7484 7485 7486File: as.info, Node: CRIS-Symbols, Next: CRIS-Syntax, Prev: CRIS-Expand, Up: CRIS-Dependent 7487 74889.7.3 Symbols 7489------------- 7490 7491Some symbols are defined by the assembler. They're intended to be used 7492in conditional assembly, for example: 7493 .if ..asm.arch.cris.v32 7494 CODE FOR CRIS V32 7495 .elseif ..asm.arch.cris.common_v10_v32 7496 CODE COMMON TO CRIS V32 AND CRIS V10 7497 .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10 7498 CODE FOR V10 7499 .else 7500 .error "Code needs to be added here." 7501 .endif 7502 7503 These symbols are defined in the assembler, reflecting command-line 7504options, either when specified or the default. They are always 7505defined, to 0 or 1. 7506`..asm.arch.cris.any_v0_v10' 7507 This symbol is non-zero when `--march=v0_v10' is specified or the 7508 default. 7509 7510`..asm.arch.cris.common_v10_v32' 7511 Set according to the option `--march=common_v10_v32'. 7512 7513`..asm.arch.cris.v10' 7514 Reflects the option `--march=v10'. 7515 7516`..asm.arch.cris.v32' 7517 Corresponds to `--march=v10'. 7518 7519 Speaking of symbols, when a symbol is used in code, it can have a 7520suffix modifying its value for use in position-independent code. *Note 7521CRIS-Pic::. 7522 7523 7524File: as.info, Node: CRIS-Syntax, Prev: CRIS-Symbols, Up: CRIS-Dependent 7525 75269.7.4 Syntax 7527------------ 7528 7529There are different aspects of the CRIS assembly syntax. 7530 7531* Menu: 7532 7533* CRIS-Chars:: Special Characters 7534* CRIS-Pic:: Position-Independent Code Symbols 7535* CRIS-Regs:: Register Names 7536* CRIS-Pseudos:: Assembler Directives 7537 7538 7539File: as.info, Node: CRIS-Chars, Next: CRIS-Pic, Up: CRIS-Syntax 7540 75419.7.4.1 Special Characters 7542.......................... 7543 7544The character `#' is a line comment character. It starts a comment if 7545and only if it is placed at the beginning of a line. 7546 7547 A `;' character starts a comment anywhere on the line, causing all 7548characters up to the end of the line to be ignored. 7549 7550 A `@' character is handled as a line separator equivalent to a 7551logical new-line character (except in a comment), so separate 7552instructions can be specified on a single line. 7553 7554 7555File: as.info, Node: CRIS-Pic, Next: CRIS-Regs, Prev: CRIS-Chars, Up: CRIS-Syntax 7556 75579.7.4.2 Symbols in position-independent code 7558............................................ 7559 7560When generating position-independent code (SVR4 PIC) for use in 7561cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol 7562suffixes are used to specify what kind of run-time symbol lookup will 7563be used, expressed in the object as different _relocation types_. 7564Usually, all absolute symbol values must be located in a table, the 7565_global offset table_, leaving the code position-independent; 7566independent of values of global symbols and independent of the address 7567of the code. The suffix modifies the value of the symbol, into for 7568example an index into the global offset table where the real symbol 7569value is entered, or a PC-relative value, or a value relative to the 7570start of the global offset table. All symbol suffixes start with the 7571character `:' (omitted in the list below). Every symbol use in code or 7572a read-only section must therefore have a PIC suffix to enable a useful 7573shared library to be created. Usually, these constructs must not be 7574used with an additive constant offset as is usually allowed, i.e. no 4 7575as in `symbol + 4' is allowed. This restriction is checked at 7576link-time, not at assembly-time. 7577 7578`GOT' 7579 Attaching this suffix to a symbol in an instruction causes the 7580 symbol to be entered into the global offset table. The value is a 7581 32-bit index for that symbol into the global offset table. The 7582 name of the corresponding relocation is `R_CRIS_32_GOT'. Example: 7583 `move.d [$r0+extsym:GOT],$r9' 7584 7585`GOT16' 7586 Same as for `GOT', but the value is a 16-bit index into the global 7587 offset table. The corresponding relocation is `R_CRIS_16_GOT'. 7588 Example: `move.d [$r0+asymbol:GOT16],$r10' 7589 7590`PLT' 7591 This suffix is used for function symbols. It causes a _procedure 7592 linkage table_, an array of code stubs, to be created at the time 7593 the shared object is created or linked against, together with a 7594 global offset table entry. The value is a pc-relative offset to 7595 the corresponding stub code in the procedure linkage table. This 7596 arrangement causes the run-time symbol resolver to be called to 7597 look up and set the value of the symbol the first time the 7598 function is called (at latest; depending environment variables). 7599 It is only safe to leave the symbol unresolved this way if all 7600 references are function calls. The name of the relocation is 7601 `R_CRIS_32_PLT_PCREL'. Example: `add.d fnname:PLT,$pc' 7602 7603`PLTG' 7604 Like PLT, but the value is relative to the beginning of the global 7605 offset table. The relocation is `R_CRIS_32_PLT_GOTREL'. Example: 7606 `move.d fnname:PLTG,$r3' 7607 7608`GOTPLT' 7609 Similar to `PLT', but the value of the symbol is a 32-bit index 7610 into the global offset table. This is somewhat of a mix between 7611 the effect of the `GOT' and the `PLT' suffix; the difference to 7612 `GOT' is that there will be a procedure linkage table entry 7613 created, and that the symbol is assumed to be a function entry and 7614 will be resolved by the run-time resolver as with `PLT'. The 7615 relocation is `R_CRIS_32_GOTPLT'. Example: `jsr 7616 [$r0+fnname:GOTPLT]' 7617 7618`GOTPLT16' 7619 A variant of `GOTPLT' giving a 16-bit value. Its relocation name 7620 is `R_CRIS_16_GOTPLT'. Example: `jsr [$r0+fnname:GOTPLT16]' 7621 7622`GOTOFF' 7623 This suffix must only be attached to a local symbol, but may be 7624 used in an expression adding an offset. The value is the address 7625 of the symbol relative to the start of the global offset table. 7626 The relocation name is `R_CRIS_32_GOTREL'. Example: `move.d 7627 [$r0+localsym:GOTOFF],r3' 7628 7629 7630File: as.info, Node: CRIS-Regs, Next: CRIS-Pseudos, Prev: CRIS-Pic, Up: CRIS-Syntax 7631 76329.7.4.3 Register names 7633...................... 7634 7635A `$' character may always prefix a general or special register name in 7636an instruction operand but is mandatory when the option 7637`--no-underscore' is specified or when the `.syntax register_prefix' 7638directive is in effect (*note crisnous::). Register names are 7639case-insensitive. 7640 7641 7642File: as.info, Node: CRIS-Pseudos, Prev: CRIS-Regs, Up: CRIS-Syntax 7643 76449.7.4.4 Assembler Directives 7645............................ 7646 7647There are a few CRIS-specific pseudo-directives in addition to the 7648generic ones. *Note Pseudo Ops::. Constants emitted by 7649pseudo-directives are in little-endian order for CRIS. There is no 7650support for floating-point-specific directives for CRIS. 7651 7652`.dword EXPRESSIONS' 7653 The `.dword' directive is a synonym for `.int', expecting zero or 7654 more EXPRESSIONS, separated by commas. For each expression, a 7655 32-bit little-endian constant is emitted. 7656 7657`.syntax ARGUMENT' 7658 The `.syntax' directive takes as ARGUMENT one of the following 7659 case-sensitive choices. 7660 7661 `no_register_prefix' 7662 The `.syntax no_register_prefix' directive makes a `$' 7663 character prefix on all registers optional. It overrides a 7664 previous setting, including the corresponding effect of the 7665 option `--no-underscore'. If this directive is used when 7666 ordinary symbols do not have a `_' character prefix, care 7667 must be taken to avoid ambiguities whether an operand is a 7668 register or a symbol; using symbols with names the same as 7669 general or special registers then invoke undefined behavior. 7670 7671 `register_prefix' 7672 This directive makes a `$' character prefix on all registers 7673 mandatory. It overrides a previous setting, including the 7674 corresponding effect of the option `--underscore'. 7675 7676 `leading_underscore' 7677 This is an assertion directive, emitting an error if the 7678 `--no-underscore' option is in effect. 7679 7680 `no_leading_underscore' 7681 This is the opposite of the `.syntax leading_underscore' 7682 directive and emits an error if the option `--underscore' is 7683 in effect. 7684 7685`.arch ARGUMENT' 7686 This is an assertion directive, giving an error if the specified 7687 ARGUMENT is not the same as the specified or default value for the 7688 `--march=ARCHITECTURE' option (*note march-option::). 7689 7690 7691 7692File: as.info, Node: D10V-Dependent, Next: D30V-Dependent, Prev: CRIS-Dependent, Up: Machine Dependencies 7693 76949.8 D10V Dependent Features 7695=========================== 7696 7697* Menu: 7698 7699* D10V-Opts:: D10V Options 7700* D10V-Syntax:: Syntax 7701* D10V-Float:: Floating Point 7702* D10V-Opcodes:: Opcodes 7703 7704 7705File: as.info, Node: D10V-Opts, Next: D10V-Syntax, Up: D10V-Dependent 7706 77079.8.1 D10V Options 7708------------------ 7709 7710The Mitsubishi D10V version of `as' has a few machine dependent options. 7711 7712`-O' 7713 The D10V can often execute two sub-instructions in parallel. When 7714 this option is used, `as' will attempt to optimize its output by 7715 detecting when instructions can be executed in parallel. 7716 7717`--nowarnswap' 7718 To optimize execution performance, `as' will sometimes swap the 7719 order of instructions. Normally this generates a warning. When 7720 this option is used, no warning will be generated when 7721 instructions are swapped. 7722 7723`--gstabs-packing' 7724 7725`--no-gstabs-packing' 7726 `as' packs adjacent short instructions into a single packed 7727 instruction. `--no-gstabs-packing' turns instruction packing off if 7728 `--gstabs' is specified as well; `--gstabs-packing' (the default) 7729 turns instruction packing on even when `--gstabs' is specified. 7730 7731 7732File: as.info, Node: D10V-Syntax, Next: D10V-Float, Prev: D10V-Opts, Up: D10V-Dependent 7733 77349.8.2 Syntax 7735------------ 7736 7737The D10V syntax is based on the syntax in Mitsubishi's D10V 7738architecture manual. The differences are detailed below. 7739 7740* Menu: 7741 7742* D10V-Size:: Size Modifiers 7743* D10V-Subs:: Sub-Instructions 7744* D10V-Chars:: Special Characters 7745* D10V-Regs:: Register Names 7746* D10V-Addressing:: Addressing Modes 7747* D10V-Word:: @WORD Modifier 7748 7749 7750File: as.info, Node: D10V-Size, Next: D10V-Subs, Up: D10V-Syntax 7751 77529.8.2.1 Size Modifiers 7753...................... 7754 7755The D10V version of `as' uses the instruction names in the D10V 7756Architecture Manual. However, the names in the manual are sometimes 7757ambiguous. There are instruction names that can assemble to a short or 7758long form opcode. How does the assembler pick the correct form? `as' 7759will always pick the smallest form if it can. When dealing with a 7760symbol that is not defined yet when a line is being assembled, it will 7761always use the long form. If you need to force the assembler to use 7762either the short or long form of the instruction, you can append either 7763`.s' (short) or `.l' (long) to it. For example, if you are writing an 7764assembly program and you want to do a branch to a symbol that is 7765defined later in your program, you can write `bra.s foo'. Objdump 7766and GDB will always append `.s' or `.l' to instructions which have both 7767short and long forms. 7768 7769 7770File: as.info, Node: D10V-Subs, Next: D10V-Chars, Prev: D10V-Size, Up: D10V-Syntax 7771 77729.8.2.2 Sub-Instructions 7773........................ 7774 7775The D10V assembler takes as input a series of instructions, either 7776one-per-line, or in the special two-per-line format described in the 7777next section. Some of these instructions will be short-form or 7778sub-instructions. These sub-instructions can be packed into a single 7779instruction. The assembler will do this automatically. It will also 7780detect when it should not pack instructions. For example, when a label 7781is defined, the next instruction will never be packaged with the 7782previous one. Whenever a branch and link instruction is called, it 7783will not be packaged with the next instruction so the return address 7784will be valid. Nops are automatically inserted when necessary. 7785 7786 If you do not want the assembler automatically making these 7787decisions, you can control the packaging and execution type (parallel 7788or sequential) with the special execution symbols described in the next 7789section. 7790 7791 7792File: as.info, Node: D10V-Chars, Next: D10V-Regs, Prev: D10V-Subs, Up: D10V-Syntax 7793 77949.8.2.3 Special Characters 7795.......................... 7796 7797`;' and `#' are the line comment characters. Sub-instructions may be 7798executed in order, in reverse-order, or in parallel. Instructions 7799listed in the standard one-per-line format will be executed 7800sequentially. To specify the executing order, use the following 7801symbols: 7802`->' 7803 Sequential with instruction on the left first. 7804 7805`<-' 7806 Sequential with instruction on the right first. 7807 7808`||' 7809 Parallel 7810 The D10V syntax allows either one instruction per line, one 7811instruction per line with the execution symbol, or two instructions per 7812line. For example 7813`abs a1 -> abs r0' 7814 Execute these sequentially. The instruction on the right is in 7815 the right container and is executed second. 7816 7817`abs r0 <- abs a1' 7818 Execute these reverse-sequentially. The instruction on the right 7819 is in the right container, and is executed first. 7820 7821`ld2w r2,@r8+ || mac a0,r0,r7' 7822 Execute these in parallel. 7823 7824`ld2w r2,@r8+ ||' 7825`mac a0,r0,r7' 7826 Two-line format. Execute these in parallel. 7827 7828`ld2w r2,@r8+' 7829`mac a0,r0,r7' 7830 Two-line format. Execute these sequentially. Assembler will put 7831 them in the proper containers. 7832 7833`ld2w r2,@r8+ ->' 7834`mac a0,r0,r7' 7835 Two-line format. Execute these sequentially. Same as above but 7836 second instruction will always go into right container. 7837 Since `$' has no special meaning, you may use it in symbol names. 7838 7839 7840File: as.info, Node: D10V-Regs, Next: D10V-Addressing, Prev: D10V-Chars, Up: D10V-Syntax 7841 78429.8.2.4 Register Names 7843...................... 7844 7845You can use the predefined symbols `r0' through `r15' to refer to the 7846D10V registers. You can also use `sp' as an alias for `r15'. The 7847accumulators are `a0' and `a1'. There are special register-pair names 7848that may optionally be used in opcodes that require even-numbered 7849registers. Register names are not case sensitive. 7850 7851 Register Pairs 7852`r0-r1' 7853 7854`r2-r3' 7855 7856`r4-r5' 7857 7858`r6-r7' 7859 7860`r8-r9' 7861 7862`r10-r11' 7863 7864`r12-r13' 7865 7866`r14-r15' 7867 7868 The D10V also has predefined symbols for these control registers and 7869status bits: 7870`psw' 7871 Processor Status Word 7872 7873`bpsw' 7874 Backup Processor Status Word 7875 7876`pc' 7877 Program Counter 7878 7879`bpc' 7880 Backup Program Counter 7881 7882`rpt_c' 7883 Repeat Count 7884 7885`rpt_s' 7886 Repeat Start address 7887 7888`rpt_e' 7889 Repeat End address 7890 7891`mod_s' 7892 Modulo Start address 7893 7894`mod_e' 7895 Modulo End address 7896 7897`iba' 7898 Instruction Break Address 7899 7900`f0' 7901 Flag 0 7902 7903`f1' 7904 Flag 1 7905 7906`c' 7907 Carry flag 7908 7909 7910File: as.info, Node: D10V-Addressing, Next: D10V-Word, Prev: D10V-Regs, Up: D10V-Syntax 7911 79129.8.2.5 Addressing Modes 7913........................ 7914 7915`as' understands the following addressing modes for the D10V. `RN' in 7916the following refers to any of the numbered registers, but _not_ the 7917control registers. 7918`RN' 7919 Register direct 7920 7921`@RN' 7922 Register indirect 7923 7924`@RN+' 7925 Register indirect with post-increment 7926 7927`@RN-' 7928 Register indirect with post-decrement 7929 7930`@-SP' 7931 Register indirect with pre-decrement 7932 7933`@(DISP, RN)' 7934 Register indirect with displacement 7935 7936`ADDR' 7937 PC relative address (for branch or rep). 7938 7939`#IMM' 7940 Immediate data (the `#' is optional and ignored) 7941 7942 7943File: as.info, Node: D10V-Word, Prev: D10V-Addressing, Up: D10V-Syntax 7944 79459.8.2.6 @WORD Modifier 7946...................... 7947 7948Any symbol followed by `@word' will be replaced by the symbol's value 7949shifted right by 2. This is used in situations such as loading a 7950register with the address of a function (or any other code fragment). 7951For example, if you want to load a register with the location of the 7952function `main' then jump to that function, you could do it as follows: 7953 ldi r2, main@word 7954 jmp r2 7955 7956 7957File: as.info, Node: D10V-Float, Next: D10V-Opcodes, Prev: D10V-Syntax, Up: D10V-Dependent 7958 79599.8.3 Floating Point 7960-------------------- 7961 7962The D10V has no hardware floating point, but the `.float' and `.double' 7963directives generates IEEE floating-point numbers for compatibility with 7964other development tools. 7965 7966 7967File: as.info, Node: D10V-Opcodes, Prev: D10V-Float, Up: D10V-Dependent 7968 79699.8.4 Opcodes 7970------------- 7971 7972For detailed information on the D10V machine instruction set, see `D10V 7973Architecture: A VLIW Microprocessor for Multimedia Applications' 7974(Mitsubishi Electric Corp.). `as' implements all the standard D10V 7975opcodes. The only changes are those described in the section on size 7976modifiers 7977 7978 7979File: as.info, Node: D30V-Dependent, Next: H8/300-Dependent, Prev: D10V-Dependent, Up: Machine Dependencies 7980 79819.9 D30V Dependent Features 7982=========================== 7983 7984* Menu: 7985 7986* D30V-Opts:: D30V Options 7987* D30V-Syntax:: Syntax 7988* D30V-Float:: Floating Point 7989* D30V-Opcodes:: Opcodes 7990 7991 7992File: as.info, Node: D30V-Opts, Next: D30V-Syntax, Up: D30V-Dependent 7993 79949.9.1 D30V Options 7995------------------ 7996 7997The Mitsubishi D30V version of `as' has a few machine dependent options. 7998 7999`-O' 8000 The D30V can often execute two sub-instructions in parallel. When 8001 this option is used, `as' will attempt to optimize its output by 8002 detecting when instructions can be executed in parallel. 8003 8004`-n' 8005 When this option is used, `as' will issue a warning every time it 8006 adds a nop instruction. 8007 8008`-N' 8009 When this option is used, `as' will issue a warning if it needs to 8010 insert a nop after a 32-bit multiply before a load or 16-bit 8011 multiply instruction. 8012 8013 8014File: as.info, Node: D30V-Syntax, Next: D30V-Float, Prev: D30V-Opts, Up: D30V-Dependent 8015 80169.9.2 Syntax 8017------------ 8018 8019The D30V syntax is based on the syntax in Mitsubishi's D30V 8020architecture manual. The differences are detailed below. 8021 8022* Menu: 8023 8024* D30V-Size:: Size Modifiers 8025* D30V-Subs:: Sub-Instructions 8026* D30V-Chars:: Special Characters 8027* D30V-Guarded:: Guarded Execution 8028* D30V-Regs:: Register Names 8029* D30V-Addressing:: Addressing Modes 8030 8031 8032File: as.info, Node: D30V-Size, Next: D30V-Subs, Up: D30V-Syntax 8033 80349.9.2.1 Size Modifiers 8035...................... 8036 8037The D30V version of `as' uses the instruction names in the D30V 8038Architecture Manual. However, the names in the manual are sometimes 8039ambiguous. There are instruction names that can assemble to a short or 8040long form opcode. How does the assembler pick the correct form? `as' 8041will always pick the smallest form if it can. When dealing with a 8042symbol that is not defined yet when a line is being assembled, it will 8043always use the long form. If you need to force the assembler to use 8044either the short or long form of the instruction, you can append either 8045`.s' (short) or `.l' (long) to it. For example, if you are writing an 8046assembly program and you want to do a branch to a symbol that is 8047defined later in your program, you can write `bra.s foo'. Objdump and 8048GDB will always append `.s' or `.l' to instructions which have both 8049short and long forms. 8050 8051 8052File: as.info, Node: D30V-Subs, Next: D30V-Chars, Prev: D30V-Size, Up: D30V-Syntax 8053 80549.9.2.2 Sub-Instructions 8055........................ 8056 8057The D30V assembler takes as input a series of instructions, either 8058one-per-line, or in the special two-per-line format described in the 8059next section. Some of these instructions will be short-form or 8060sub-instructions. These sub-instructions can be packed into a single 8061instruction. The assembler will do this automatically. It will also 8062detect when it should not pack instructions. For example, when a label 8063is defined, the next instruction will never be packaged with the 8064previous one. Whenever a branch and link instruction is called, it 8065will not be packaged with the next instruction so the return address 8066will be valid. Nops are automatically inserted when necessary. 8067 8068 If you do not want the assembler automatically making these 8069decisions, you can control the packaging and execution type (parallel 8070or sequential) with the special execution symbols described in the next 8071section. 8072 8073 8074File: as.info, Node: D30V-Chars, Next: D30V-Guarded, Prev: D30V-Subs, Up: D30V-Syntax 8075 80769.9.2.3 Special Characters 8077.......................... 8078 8079`;' and `#' are the line comment characters. Sub-instructions may be 8080executed in order, in reverse-order, or in parallel. Instructions 8081listed in the standard one-per-line format will be executed 8082sequentially unless you use the `-O' option. 8083 8084 To specify the executing order, use the following symbols: 8085`->' 8086 Sequential with instruction on the left first. 8087 8088`<-' 8089 Sequential with instruction on the right first. 8090 8091`||' 8092 Parallel 8093 8094 The D30V syntax allows either one instruction per line, one 8095instruction per line with the execution symbol, or two instructions per 8096line. For example 8097`abs r2,r3 -> abs r4,r5' 8098 Execute these sequentially. The instruction on the right is in 8099 the right container and is executed second. 8100 8101`abs r2,r3 <- abs r4,r5' 8102 Execute these reverse-sequentially. The instruction on the right 8103 is in the right container, and is executed first. 8104 8105`abs r2,r3 || abs r4,r5' 8106 Execute these in parallel. 8107 8108`ldw r2,@(r3,r4) ||' 8109`mulx r6,r8,r9' 8110 Two-line format. Execute these in parallel. 8111 8112`mulx a0,r8,r9' 8113`stw r2,@(r3,r4)' 8114 Two-line format. Execute these sequentially unless `-O' option is 8115 used. If the `-O' option is used, the assembler will determine if 8116 the instructions could be done in parallel (the above two 8117 instructions can be done in parallel), and if so, emit them as 8118 parallel instructions. The assembler will put them in the proper 8119 containers. In the above example, the assembler will put the 8120 `stw' instruction in left container and the `mulx' instruction in 8121 the right container. 8122 8123`stw r2,@(r3,r4) ->' 8124`mulx a0,r8,r9' 8125 Two-line format. Execute the `stw' instruction followed by the 8126 `mulx' instruction sequentially. The first instruction goes in the 8127 left container and the second instruction goes into right 8128 container. The assembler will give an error if the machine 8129 ordering constraints are violated. 8130 8131`stw r2,@(r3,r4) <-' 8132`mulx a0,r8,r9' 8133 Same as previous example, except that the `mulx' instruction is 8134 executed before the `stw' instruction. 8135 8136 Since `$' has no special meaning, you may use it in symbol names. 8137 8138 8139File: as.info, Node: D30V-Guarded, Next: D30V-Regs, Prev: D30V-Chars, Up: D30V-Syntax 8140 81419.9.2.4 Guarded Execution 8142......................... 8143 8144`as' supports the full range of guarded execution directives for each 8145instruction. Just append the directive after the instruction proper. 8146The directives are: 8147 8148`/tx' 8149 Execute the instruction if flag f0 is true. 8150 8151`/fx' 8152 Execute the instruction if flag f0 is false. 8153 8154`/xt' 8155 Execute the instruction if flag f1 is true. 8156 8157`/xf' 8158 Execute the instruction if flag f1 is false. 8159 8160`/tt' 8161 Execute the instruction if both flags f0 and f1 are true. 8162 8163`/tf' 8164 Execute the instruction if flag f0 is true and flag f1 is false. 8165 8166 8167File: as.info, Node: D30V-Regs, Next: D30V-Addressing, Prev: D30V-Guarded, Up: D30V-Syntax 8168 81699.9.2.5 Register Names 8170...................... 8171 8172You can use the predefined symbols `r0' through `r63' to refer to the 8173D30V registers. You can also use `sp' as an alias for `r63' and `link' 8174as an alias for `r62'. The accumulators are `a0' and `a1'. 8175 8176 The D30V also has predefined symbols for these control registers and 8177status bits: 8178`psw' 8179 Processor Status Word 8180 8181`bpsw' 8182 Backup Processor Status Word 8183 8184`pc' 8185 Program Counter 8186 8187`bpc' 8188 Backup Program Counter 8189 8190`rpt_c' 8191 Repeat Count 8192 8193`rpt_s' 8194 Repeat Start address 8195 8196`rpt_e' 8197 Repeat End address 8198 8199`mod_s' 8200 Modulo Start address 8201 8202`mod_e' 8203 Modulo End address 8204 8205`iba' 8206 Instruction Break Address 8207 8208`f0' 8209 Flag 0 8210 8211`f1' 8212 Flag 1 8213 8214`f2' 8215 Flag 2 8216 8217`f3' 8218 Flag 3 8219 8220`f4' 8221 Flag 4 8222 8223`f5' 8224 Flag 5 8225 8226`f6' 8227 Flag 6 8228 8229`f7' 8230 Flag 7 8231 8232`s' 8233 Same as flag 4 (saturation flag) 8234 8235`v' 8236 Same as flag 5 (overflow flag) 8237 8238`va' 8239 Same as flag 6 (sticky overflow flag) 8240 8241`c' 8242 Same as flag 7 (carry/borrow flag) 8243 8244`b' 8245 Same as flag 7 (carry/borrow flag) 8246 8247 8248File: as.info, Node: D30V-Addressing, Prev: D30V-Regs, Up: D30V-Syntax 8249 82509.9.2.6 Addressing Modes 8251........................ 8252 8253`as' understands the following addressing modes for the D30V. `RN' in 8254the following refers to any of the numbered registers, but _not_ the 8255control registers. 8256`RN' 8257 Register direct 8258 8259`@RN' 8260 Register indirect 8261 8262`@RN+' 8263 Register indirect with post-increment 8264 8265`@RN-' 8266 Register indirect with post-decrement 8267 8268`@-SP' 8269 Register indirect with pre-decrement 8270 8271`@(DISP, RN)' 8272 Register indirect with displacement 8273 8274`ADDR' 8275 PC relative address (for branch or rep). 8276 8277`#IMM' 8278 Immediate data (the `#' is optional and ignored) 8279 8280 8281File: as.info, Node: D30V-Float, Next: D30V-Opcodes, Prev: D30V-Syntax, Up: D30V-Dependent 8282 82839.9.3 Floating Point 8284-------------------- 8285 8286The D30V has no hardware floating point, but the `.float' and `.double' 8287directives generates IEEE floating-point numbers for compatibility with 8288other development tools. 8289 8290 8291File: as.info, Node: D30V-Opcodes, Prev: D30V-Float, Up: D30V-Dependent 8292 82939.9.4 Opcodes 8294------------- 8295 8296For detailed information on the D30V machine instruction set, see `D30V 8297Architecture: A VLIW Microprocessor for Multimedia Applications' 8298(Mitsubishi Electric Corp.). `as' implements all the standard D30V 8299opcodes. The only changes are those described in the section on size 8300modifiers 8301 8302 8303File: as.info, Node: H8/300-Dependent, Next: HPPA-Dependent, Prev: D30V-Dependent, Up: Machine Dependencies 8304 83059.10 H8/300 Dependent Features 8306============================== 8307 8308* Menu: 8309 8310* H8/300 Options:: Options 8311* H8/300 Syntax:: Syntax 8312* H8/300 Floating Point:: Floating Point 8313* H8/300 Directives:: H8/300 Machine Directives 8314* H8/300 Opcodes:: Opcodes 8315 8316 8317File: as.info, Node: H8/300 Options, Next: H8/300 Syntax, Up: H8/300-Dependent 8318 83199.10.1 Options 8320-------------- 8321 8322The Renesas H8/300 version of `as' has one machine-dependent option: 8323 8324`-h-tick-hex' 8325 Support H'00 style hex constants in addition to 0x00 style. 8326 8327 8328 8329File: as.info, Node: H8/300 Syntax, Next: H8/300 Floating Point, Prev: H8/300 Options, Up: H8/300-Dependent 8330 83319.10.2 Syntax 8332------------- 8333 8334* Menu: 8335 8336* H8/300-Chars:: Special Characters 8337* H8/300-Regs:: Register Names 8338* H8/300-Addressing:: Addressing Modes 8339 8340 8341File: as.info, Node: H8/300-Chars, Next: H8/300-Regs, Up: H8/300 Syntax 8342 83439.10.2.1 Special Characters 8344........................... 8345 8346`;' is the line comment character. 8347 8348 `$' can be used instead of a newline to separate statements. 8349Therefore _you may not use `$' in symbol names_ on the H8/300. 8350 8351 8352File: as.info, Node: H8/300-Regs, Next: H8/300-Addressing, Prev: H8/300-Chars, Up: H8/300 Syntax 8353 83549.10.2.2 Register Names 8355....................... 8356 8357You can use predefined symbols of the form `rNh' and `rNl' to refer to 8358the H8/300 registers as sixteen 8-bit general-purpose registers. N is 8359a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid 8360register names. 8361 8362 You can also use the eight predefined symbols `rN' to refer to the 8363H8/300 registers as 16-bit registers (you must use this form for 8364addressing). 8365 8366 On the H8/300H, you can also use the eight predefined symbols `erN' 8367(`er0' ... `er7') to refer to the 32-bit general purpose registers. 8368 8369 The two control registers are called `pc' (program counter; a 16-bit 8370register, except on the H8/300H where it is 24 bits) and `ccr' 8371(condition code register; an 8-bit register). `r7' is used as the 8372stack pointer, and can also be called `sp'. 8373 8374 8375File: as.info, Node: H8/300-Addressing, Prev: H8/300-Regs, Up: H8/300 Syntax 8376 83779.10.2.3 Addressing Modes 8378......................... 8379 8380as understands the following addressing modes for the H8/300: 8381`rN' 8382 Register direct 8383 8384`@rN' 8385 Register indirect 8386 8387`@(D, rN)' 8388`@(D:16, rN)' 8389`@(D:24, rN)' 8390 Register indirect: 16-bit or 24-bit displacement D from register 8391 N. (24-bit displacements are only meaningful on the H8/300H.) 8392 8393`@rN+' 8394 Register indirect with post-increment 8395 8396`@-rN' 8397 Register indirect with pre-decrement 8398 8399``@'AA' 8400``@'AA:8' 8401``@'AA:16' 8402``@'AA:24' 8403 Absolute address `aa'. (The address size `:24' only makes sense 8404 on the H8/300H.) 8405 8406`#XX' 8407`#XX:8' 8408`#XX:16' 8409`#XX:32' 8410 Immediate data XX. You may specify the `:8', `:16', or `:32' for 8411 clarity, if you wish; but `as' neither requires this nor uses 8412 it--the data size required is taken from context. 8413 8414``@'`@'AA' 8415``@'`@'AA:8' 8416 Memory indirect. You may specify the `:8' for clarity, if you 8417 wish; but `as' neither requires this nor uses it. 8418 8419 8420File: as.info, Node: H8/300 Floating Point, Next: H8/300 Directives, Prev: H8/300 Syntax, Up: H8/300-Dependent 8421 84229.10.3 Floating Point 8423--------------------- 8424 8425The H8/300 family has no hardware floating point, but the `.float' 8426directive generates IEEE floating-point numbers for compatibility with 8427other development tools. 8428 8429 8430File: as.info, Node: H8/300 Directives, Next: H8/300 Opcodes, Prev: H8/300 Floating Point, Up: H8/300-Dependent 8431 84329.10.4 H8/300 Machine Directives 8433-------------------------------- 8434 8435`as' has the following machine-dependent directives for the H8/300: 8436 8437`.h8300h' 8438 Recognize and emit additional instructions for the H8/300H 8439 variant, and also make `.int' emit 32-bit numbers rather than the 8440 usual (16-bit) for the H8/300 family. 8441 8442`.h8300s' 8443 Recognize and emit additional instructions for the H8S variant, and 8444 also make `.int' emit 32-bit numbers rather than the usual (16-bit) 8445 for the H8/300 family. 8446 8447`.h8300hn' 8448 Recognize and emit additional instructions for the H8/300H variant 8449 in normal mode, and also make `.int' emit 32-bit numbers rather 8450 than the usual (16-bit) for the H8/300 family. 8451 8452`.h8300sn' 8453 Recognize and emit additional instructions for the H8S variant in 8454 normal mode, and also make `.int' emit 32-bit numbers rather than 8455 the usual (16-bit) for the H8/300 family. 8456 8457 On the H8/300 family (including the H8/300H) `.word' directives 8458generate 16-bit numbers. 8459 8460 8461File: as.info, Node: H8/300 Opcodes, Prev: H8/300 Directives, Up: H8/300-Dependent 8462 84639.10.5 Opcodes 8464-------------- 8465 8466For detailed information on the H8/300 machine instruction set, see 8467`H8/300 Series Programming Manual'. For information specific to the 8468H8/300H, see `H8/300H Series Programming Manual' (Renesas). 8469 8470 `as' implements all the standard H8/300 opcodes. No additional 8471pseudo-instructions are needed on this family. 8472 8473 The following table summarizes the H8/300 opcodes, and their 8474arguments. Entries marked `*' are opcodes used only on the H8/300H. 8475 8476 Legend: 8477 Rs source register 8478 Rd destination register 8479 abs absolute address 8480 imm immediate data 8481 disp:N N-bit displacement from a register 8482 pcrel:N N-bit displacement relative to program counter 8483 8484 add.b #imm,rd * andc #imm,ccr 8485 add.b rs,rd band #imm,rd 8486 add.w rs,rd band #imm,@rd 8487 * add.w #imm,rd band #imm,@abs:8 8488 * add.l rs,rd bra pcrel:8 8489 * add.l #imm,rd * bra pcrel:16 8490 adds #imm,rd bt pcrel:8 8491 addx #imm,rd * bt pcrel:16 8492 addx rs,rd brn pcrel:8 8493 and.b #imm,rd * brn pcrel:16 8494 and.b rs,rd bf pcrel:8 8495 * and.w rs,rd * bf pcrel:16 8496 * and.w #imm,rd bhi pcrel:8 8497 * and.l #imm,rd * bhi pcrel:16 8498 * and.l rs,rd bls pcrel:8 8499 8500 * bls pcrel:16 bld #imm,rd 8501 bcc pcrel:8 bld #imm,@rd 8502 * bcc pcrel:16 bld #imm,@abs:8 8503 bhs pcrel:8 bnot #imm,rd 8504 * bhs pcrel:16 bnot #imm,@rd 8505 bcs pcrel:8 bnot #imm,@abs:8 8506 * bcs pcrel:16 bnot rs,rd 8507 blo pcrel:8 bnot rs,@rd 8508 * blo pcrel:16 bnot rs,@abs:8 8509 bne pcrel:8 bor #imm,rd 8510 * bne pcrel:16 bor #imm,@rd 8511 beq pcrel:8 bor #imm,@abs:8 8512 * beq pcrel:16 bset #imm,rd 8513 bvc pcrel:8 bset #imm,@rd 8514 * bvc pcrel:16 bset #imm,@abs:8 8515 bvs pcrel:8 bset rs,rd 8516 * bvs pcrel:16 bset rs,@rd 8517 bpl pcrel:8 bset rs,@abs:8 8518 * bpl pcrel:16 bsr pcrel:8 8519 bmi pcrel:8 bsr pcrel:16 8520 * bmi pcrel:16 bst #imm,rd 8521 bge pcrel:8 bst #imm,@rd 8522 * bge pcrel:16 bst #imm,@abs:8 8523 blt pcrel:8 btst #imm,rd 8524 * blt pcrel:16 btst #imm,@rd 8525 bgt pcrel:8 btst #imm,@abs:8 8526 * bgt pcrel:16 btst rs,rd 8527 ble pcrel:8 btst rs,@rd 8528 * ble pcrel:16 btst rs,@abs:8 8529 bclr #imm,rd bxor #imm,rd 8530 bclr #imm,@rd bxor #imm,@rd 8531 bclr #imm,@abs:8 bxor #imm,@abs:8 8532 bclr rs,rd cmp.b #imm,rd 8533 bclr rs,@rd cmp.b rs,rd 8534 bclr rs,@abs:8 cmp.w rs,rd 8535 biand #imm,rd cmp.w rs,rd 8536 biand #imm,@rd * cmp.w #imm,rd 8537 biand #imm,@abs:8 * cmp.l #imm,rd 8538 bild #imm,rd * cmp.l rs,rd 8539 bild #imm,@rd daa rs 8540 bild #imm,@abs:8 das rs 8541 bior #imm,rd dec.b rs 8542 bior #imm,@rd * dec.w #imm,rd 8543 bior #imm,@abs:8 * dec.l #imm,rd 8544 bist #imm,rd divxu.b rs,rd 8545 bist #imm,@rd * divxu.w rs,rd 8546 bist #imm,@abs:8 * divxs.b rs,rd 8547 bixor #imm,rd * divxs.w rs,rd 8548 bixor #imm,@rd eepmov 8549 bixor #imm,@abs:8 * eepmovw 8550 8551 * exts.w rd mov.w rs,@abs:16 8552 * exts.l rd * mov.l #imm,rd 8553 * extu.w rd * mov.l rs,rd 8554 * extu.l rd * mov.l @rs,rd 8555 inc rs * mov.l @(disp:16,rs),rd 8556 * inc.w #imm,rd * mov.l @(disp:24,rs),rd 8557 * inc.l #imm,rd * mov.l @rs+,rd 8558 jmp @rs * mov.l @abs:16,rd 8559 jmp abs * mov.l @abs:24,rd 8560 jmp @@abs:8 * mov.l rs,@rd 8561 jsr @rs * mov.l rs,@(disp:16,rd) 8562 jsr abs * mov.l rs,@(disp:24,rd) 8563 jsr @@abs:8 * mov.l rs,@-rd 8564 ldc #imm,ccr * mov.l rs,@abs:16 8565 ldc rs,ccr * mov.l rs,@abs:24 8566 * ldc @abs:16,ccr movfpe @abs:16,rd 8567 * ldc @abs:24,ccr movtpe rs,@abs:16 8568 * ldc @(disp:16,rs),ccr mulxu.b rs,rd 8569 * ldc @(disp:24,rs),ccr * mulxu.w rs,rd 8570 * ldc @rs+,ccr * mulxs.b rs,rd 8571 * ldc @rs,ccr * mulxs.w rs,rd 8572 * mov.b @(disp:24,rs),rd neg.b rs 8573 * mov.b rs,@(disp:24,rd) * neg.w rs 8574 mov.b @abs:16,rd * neg.l rs 8575 mov.b rs,rd nop 8576 mov.b @abs:8,rd not.b rs 8577 mov.b rs,@abs:8 * not.w rs 8578 mov.b rs,rd * not.l rs 8579 mov.b #imm,rd or.b #imm,rd 8580 mov.b @rs,rd or.b rs,rd 8581 mov.b @(disp:16,rs),rd * or.w #imm,rd 8582 mov.b @rs+,rd * or.w rs,rd 8583 mov.b @abs:8,rd * or.l #imm,rd 8584 mov.b rs,@rd * or.l rs,rd 8585 mov.b rs,@(disp:16,rd) orc #imm,ccr 8586 mov.b rs,@-rd pop.w rs 8587 mov.b rs,@abs:8 * pop.l rs 8588 mov.w rs,@rd push.w rs 8589 * mov.w @(disp:24,rs),rd * push.l rs 8590 * mov.w rs,@(disp:24,rd) rotl.b rs 8591 * mov.w @abs:24,rd * rotl.w rs 8592 * mov.w rs,@abs:24 * rotl.l rs 8593 mov.w rs,rd rotr.b rs 8594 mov.w #imm,rd * rotr.w rs 8595 mov.w @rs,rd * rotr.l rs 8596 mov.w @(disp:16,rs),rd rotxl.b rs 8597 mov.w @rs+,rd * rotxl.w rs 8598 mov.w @abs:16,rd * rotxl.l rs 8599 mov.w rs,@(disp:16,rd) rotxr.b rs 8600 mov.w rs,@-rd * rotxr.w rs 8601 8602 * rotxr.l rs * stc ccr,@(disp:24,rd) 8603 bpt * stc ccr,@-rd 8604 rte * stc ccr,@abs:16 8605 rts * stc ccr,@abs:24 8606 shal.b rs sub.b rs,rd 8607 * shal.w rs sub.w rs,rd 8608 * shal.l rs * sub.w #imm,rd 8609 shar.b rs * sub.l rs,rd 8610 * shar.w rs * sub.l #imm,rd 8611 * shar.l rs subs #imm,rd 8612 shll.b rs subx #imm,rd 8613 * shll.w rs subx rs,rd 8614 * shll.l rs * trapa #imm 8615 shlr.b rs xor #imm,rd 8616 * shlr.w rs xor rs,rd 8617 * shlr.l rs * xor.w #imm,rd 8618 sleep * xor.w rs,rd 8619 stc ccr,rd * xor.l #imm,rd 8620 * stc ccr,@rs * xor.l rs,rd 8621 * stc ccr,@(disp:16,rd) xorc #imm,ccr 8622 8623 Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined 8624with variants using the suffixes `.b', `.w', and `.l' to specify the 8625size of a memory operand. `as' supports these suffixes, but does not 8626require them; since one of the operands is always a register, `as' can 8627deduce the correct size. 8628 8629 For example, since `r0' refers to a 16-bit register, 8630 mov r0,@foo 8631is equivalent to 8632 mov.w r0,@foo 8633 8634 If you use the size suffixes, `as' issues a warning when the suffix 8635and the register size do not match. 8636 8637 8638File: as.info, Node: HPPA-Dependent, Next: ESA/390-Dependent, Prev: H8/300-Dependent, Up: Machine Dependencies 8639 86409.11 HPPA Dependent Features 8641============================ 8642 8643* Menu: 8644 8645* HPPA Notes:: Notes 8646* HPPA Options:: Options 8647* HPPA Syntax:: Syntax 8648* HPPA Floating Point:: Floating Point 8649* HPPA Directives:: HPPA Machine Directives 8650* HPPA Opcodes:: Opcodes 8651 8652 8653File: as.info, Node: HPPA Notes, Next: HPPA Options, Up: HPPA-Dependent 8654 86559.11.1 Notes 8656------------ 8657 8658As a back end for GNU CC `as' has been throughly tested and should work 8659extremely well. We have tested it only minimally on hand written 8660assembly code and no one has tested it much on the assembly output from 8661the HP compilers. 8662 8663 The format of the debugging sections has changed since the original 8664`as' port (version 1.3X) was released; therefore, you must rebuild all 8665HPPA objects and libraries with the new assembler so that you can debug 8666the final executable. 8667 8668 The HPPA `as' port generates a small subset of the relocations 8669available in the SOM and ELF object file formats. Additional relocation 8670support will be added as it becomes necessary. 8671 8672 8673File: as.info, Node: HPPA Options, Next: HPPA Syntax, Prev: HPPA Notes, Up: HPPA-Dependent 8674 86759.11.2 Options 8676-------------- 8677 8678`as' has no machine-dependent command-line options for the HPPA. 8679 8680 8681File: as.info, Node: HPPA Syntax, Next: HPPA Floating Point, Prev: HPPA Options, Up: HPPA-Dependent 8682 86839.11.3 Syntax 8684------------- 8685 8686The assembler syntax closely follows the HPPA instruction set reference 8687manual; assembler directives and general syntax closely follow the HPPA 8688assembly language reference manual, with a few noteworthy differences. 8689 8690 First, a colon may immediately follow a label definition. This is 8691simply for compatibility with how most assembly language programmers 8692write code. 8693 8694 Some obscure expression parsing problems may affect hand written 8695code which uses the `spop' instructions, or code which makes significant 8696use of the `!' line separator. 8697 8698 `as' is much less forgiving about missing arguments and other 8699similar oversights than the HP assembler. `as' notifies you of missing 8700arguments as syntax errors; this is regarded as a feature, not a bug. 8701 8702 Finally, `as' allows you to use an external symbol without 8703explicitly importing the symbol. _Warning:_ in the future this will be 8704an error for HPPA targets. 8705 8706 Special characters for HPPA targets include: 8707 8708 `;' is the line comment character. 8709 8710 `!' can be used instead of a newline to separate statements. 8711 8712 Since `$' has no special meaning, you may use it in symbol names. 8713 8714 8715File: as.info, Node: HPPA Floating Point, Next: HPPA Directives, Prev: HPPA Syntax, Up: HPPA-Dependent 8716 87179.11.4 Floating Point 8718--------------------- 8719 8720The HPPA family uses IEEE floating-point numbers. 8721 8722 8723File: as.info, Node: HPPA Directives, Next: HPPA Opcodes, Prev: HPPA Floating Point, Up: HPPA-Dependent 8724 87259.11.5 HPPA Assembler Directives 8726-------------------------------- 8727 8728`as' for the HPPA supports many additional directives for compatibility 8729with the native assembler. This section describes them only briefly. 8730For detailed information on HPPA-specific assembler directives, see 8731`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001). 8732 8733 `as' does _not_ support the following assembler directives described 8734in the HP manual: 8735 8736 .endm .liston 8737 .enter .locct 8738 .leave .macro 8739 .listoff 8740 8741 Beyond those implemented for compatibility, `as' supports one 8742additional assembler directive for the HPPA: `.param'. It conveys 8743register argument locations for static functions. Its syntax closely 8744follows the `.export' directive. 8745 8746 These are the additional directives in `as' for the HPPA: 8747 8748`.block N' 8749`.blockz N' 8750 Reserve N bytes of storage, and initialize them to zero. 8751 8752`.call' 8753 Mark the beginning of a procedure call. Only the special case 8754 with _no arguments_ is allowed. 8755 8756`.callinfo [ PARAM=VALUE, ... ] [ FLAG, ... ]' 8757 Specify a number of parameters and flags that define the 8758 environment for a procedure. 8759 8760 PARAM may be any of `frame' (frame size), `entry_gr' (end of 8761 general register range), `entry_fr' (end of float register range), 8762 `entry_sr' (end of space register range). 8763 8764 The values for FLAG are `calls' or `caller' (proc has 8765 subroutines), `no_calls' (proc does not call subroutines), 8766 `save_rp' (preserve return pointer), `save_sp' (proc preserves 8767 stack pointer), `no_unwind' (do not unwind this proc), `hpux_int' 8768 (proc is interrupt routine). 8769 8770`.code' 8771 Assemble into the standard section called `$TEXT$', subsection 8772 `$CODE$'. 8773 8774`.copyright "STRING"' 8775 In the SOM object format, insert STRING into the object code, 8776 marked as a copyright string. 8777 8778`.copyright "STRING"' 8779 In the ELF object format, insert STRING into the object code, 8780 marked as a version string. 8781 8782`.enter' 8783 Not yet supported; the assembler rejects programs containing this 8784 directive. 8785 8786`.entry' 8787 Mark the beginning of a procedure. 8788 8789`.exit' 8790 Mark the end of a procedure. 8791 8792`.export NAME [ ,TYP ] [ ,PARAM=R ]' 8793 Make a procedure NAME available to callers. TYP, if present, must 8794 be one of `absolute', `code' (ELF only, not SOM), `data', `entry', 8795 `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'. 8796 8797 PARAM, if present, provides either relocation information for the 8798 procedure arguments and result, or a privilege level. PARAM may be 8799 `argwN' (where N ranges from `0' to `3', and indicates one of four 8800 one-word arguments); `rtnval' (the procedure's result); or 8801 `priv_lev' (privilege level). For arguments or the result, R 8802 specifies how to relocate, and must be one of `no' (not 8803 relocatable), `gr' (argument is in general register), `fr' (in 8804 floating point register), or `fu' (upper half of float register). 8805 For `priv_lev', R is an integer. 8806 8807`.half N' 8808 Define a two-byte integer constant N; synonym for the portable 8809 `as' directive `.short'. 8810 8811`.import NAME [ ,TYP ]' 8812 Converse of `.export'; make a procedure available to call. The 8813 arguments use the same conventions as the first two arguments for 8814 `.export'. 8815 8816`.label NAME' 8817 Define NAME as a label for the current assembly location. 8818 8819`.leave' 8820 Not yet supported; the assembler rejects programs containing this 8821 directive. 8822 8823`.origin LC' 8824 Advance location counter to LC. Synonym for the `as' portable 8825 directive `.org'. 8826 8827`.param NAME [ ,TYP ] [ ,PARAM=R ]' 8828 Similar to `.export', but used for static procedures. 8829 8830`.proc' 8831 Use preceding the first statement of a procedure. 8832 8833`.procend' 8834 Use following the last statement of a procedure. 8835 8836`LABEL .reg EXPR' 8837 Synonym for `.equ'; define LABEL with the absolute expression EXPR 8838 as its value. 8839 8840`.space SECNAME [ ,PARAMS ]' 8841 Switch to section SECNAME, creating a new section by that name if 8842 necessary. You may only use PARAMS when creating a new section, 8843 not when switching to an existing one. SECNAME may identify a 8844 section by number rather than by name. 8845 8846 If specified, the list PARAMS declares attributes of the section, 8847 identified by keywords. The keywords recognized are `spnum=EXP' 8848 (identify this section by the number EXP, an absolute expression), 8849 `sort=EXP' (order sections according to this sort key when linking; 8850 EXP is an absolute expression), `unloadable' (section contains no 8851 loadable data), `notdefined' (this section defined elsewhere), and 8852 `private' (data in this section not available to other programs). 8853 8854`.spnum SECNAM' 8855 Allocate four bytes of storage, and initialize them with the 8856 section number of the section named SECNAM. (You can define the 8857 section number with the HPPA `.space' directive.) 8858 8859`.string "STR"' 8860 Copy the characters in the string STR to the object file. *Note 8861 Strings: Strings, for information on escape sequences you can use 8862 in `as' strings. 8863 8864 _Warning!_ The HPPA version of `.string' differs from the usual 8865 `as' definition: it does _not_ write a zero byte after copying STR. 8866 8867`.stringz "STR"' 8868 Like `.string', but appends a zero byte after copying STR to object 8869 file. 8870 8871`.subspa NAME [ ,PARAMS ]' 8872`.nsubspa NAME [ ,PARAMS ]' 8873 Similar to `.space', but selects a subsection NAME within the 8874 current section. You may only specify PARAMS when you create a 8875 subsection (in the first instance of `.subspa' for this NAME). 8876 8877 If specified, the list PARAMS declares attributes of the 8878 subsection, identified by keywords. The keywords recognized are 8879 `quad=EXPR' ("quadrant" for this subsection), `align=EXPR' 8880 (alignment for beginning of this subsection; a power of two), 8881 `access=EXPR' (value for "access rights" field), `sort=EXPR' 8882 (sorting order for this subspace in link), `code_only' (subsection 8883 contains only code), `unloadable' (subsection cannot be loaded 8884 into memory), `comdat' (subsection is comdat), `common' 8885 (subsection is common block), `dup_comm' (subsection may have 8886 duplicate names), or `zero' (subsection is all zeros, do not write 8887 in object file). 8888 8889 `.nsubspa' always creates a new subspace with the given name, even 8890 if one with the same name already exists. 8891 8892 `comdat', `common' and `dup_comm' can be used to implement various 8893 flavors of one-only support when using the SOM linker. The SOM 8894 linker only supports specific combinations of these flags. The 8895 details are not documented. A brief description is provided here. 8896 8897 `comdat' provides a form of linkonce support. It is useful for 8898 both code and data subspaces. A `comdat' subspace has a key symbol 8899 marked by the `is_comdat' flag or `ST_COMDAT'. Only the first 8900 subspace for any given key is selected. The key symbol becomes 8901 universal in shared links. This is similar to the behavior of 8902 `secondary_def' symbols. 8903 8904 `common' provides Fortran named common support. It is only useful 8905 for data subspaces. Symbols with the flag `is_common' retain this 8906 flag in shared links. Referencing a `is_common' symbol in a shared 8907 library from outside the library doesn't work. Thus, `is_common' 8908 symbols must be output whenever they are needed. 8909 8910 `common' and `dup_comm' together provide Cobol common support. 8911 The subspaces in this case must all be the same length. 8912 Otherwise, this support is similar to the Fortran common support. 8913 8914 `dup_comm' by itself provides a type of one-only support for code. 8915 Only the first `dup_comm' subspace is selected. There is a rather 8916 complex algorithm to compare subspaces. Code symbols marked with 8917 the `dup_common' flag are hidden. This support was intended for 8918 "C++ duplicate inlines". 8919 8920 A simplified technique is used to mark the flags of symbols based 8921 on the flags of their subspace. A symbol with the scope 8922 SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with 8923 the corresponding settings of `comdat', `common' and `dup_comm' 8924 from the subspace, respectively. This avoids having to introduce 8925 additional directives to mark these symbols. The HP assembler 8926 sets `is_common' from `common'. However, it doesn't set the 8927 `dup_common' from `dup_comm'. It doesn't have `comdat' support. 8928 8929`.version "STR"' 8930 Write STR as version identifier in object code. 8931 8932 8933File: as.info, Node: HPPA Opcodes, Prev: HPPA Directives, Up: HPPA-Dependent 8934 89359.11.6 Opcodes 8936-------------- 8937 8938For detailed information on the HPPA machine instruction set, see 8939`PA-RISC Architecture and Instruction Set Reference Manual' (HP 894009740-90039). 8941 8942 8943File: as.info, Node: ESA/390-Dependent, Next: i386-Dependent, Prev: HPPA-Dependent, Up: Machine Dependencies 8944 89459.12 ESA/390 Dependent Features 8946=============================== 8947 8948* Menu: 8949 8950* ESA/390 Notes:: Notes 8951* ESA/390 Options:: Options 8952* ESA/390 Syntax:: Syntax 8953* ESA/390 Floating Point:: Floating Point 8954* ESA/390 Directives:: ESA/390 Machine Directives 8955* ESA/390 Opcodes:: Opcodes 8956 8957 8958File: as.info, Node: ESA/390 Notes, Next: ESA/390 Options, Up: ESA/390-Dependent 8959 89609.12.1 Notes 8961------------ 8962 8963The ESA/390 `as' port is currently intended to be a back-end for the 8964GNU CC compiler. It is not HLASM compatible, although it does support 8965a subset of some of the HLASM directives. The only supported binary 8966file format is ELF; none of the usual MVS/VM/OE/USS object file 8967formats, such as ESD or XSD, are supported. 8968 8969 When used with the GNU CC compiler, the ESA/390 `as' will produce 8970correct, fully relocated, functional binaries, and has been used to 8971compile and execute large projects. However, many aspects should still 8972be considered experimental; these include shared library support, 8973dynamically loadable objects, and any relocation other than the 31-bit 8974relocation. 8975 8976 8977File: as.info, Node: ESA/390 Options, Next: ESA/390 Syntax, Prev: ESA/390 Notes, Up: ESA/390-Dependent 8978 89799.12.2 Options 8980-------------- 8981 8982`as' has no machine-dependent command-line options for the ESA/390. 8983 8984 8985File: as.info, Node: ESA/390 Syntax, Next: ESA/390 Floating Point, Prev: ESA/390 Options, Up: ESA/390-Dependent 8986 89879.12.3 Syntax 8988------------- 8989 8990The opcode/operand syntax follows the ESA/390 Principles of Operation 8991manual; assembler directives and general syntax are loosely based on the 8992prevailing AT&T/SVR4/ELF/Solaris style notation. HLASM-style directives 8993are _not_ supported for the most part, with the exception of those 8994described herein. 8995 8996 A leading dot in front of directives is optional, and the case of 8997directives is ignored; thus for example, .using and USING have the same 8998effect. 8999 9000 A colon may immediately follow a label definition. This is simply 9001for compatibility with how most assembly language programmers write 9002code. 9003 9004 `#' is the line comment character. 9005 9006 `;' can be used instead of a newline to separate statements. 9007 9008 Since `$' has no special meaning, you may use it in symbol names. 9009 9010 Registers can be given the symbolic names r0..r15, fp0, fp2, fp4, 9011fp6. By using thesse symbolic names, `as' can detect simple syntax 9012errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for 9013r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base 9014for r3 and rpgt or r.pgt for r4. 9015 9016 `*' is the current location counter. Unlike `.' it is always 9017relative to the last USING directive. Note that this means that 9018expressions cannot use multiplication, as any occurrence of `*' will be 9019interpreted as a location counter. 9020 9021 All labels are relative to the last USING. Thus, branches to a label 9022always imply the use of base+displacement. 9023 9024 Many of the usual forms of address constants / address literals are 9025supported. Thus, 9026 .using *,r3 9027 L r15,=A(some_routine) 9028 LM r6,r7,=V(some_longlong_extern) 9029 A r1,=F'12' 9030 AH r0,=H'42' 9031 ME r6,=E'3.1416' 9032 MD r6,=D'3.14159265358979' 9033 O r6,=XL4'cacad0d0' 9034 .ltorg 9035 should all behave as expected: that is, an entry in the literal pool 9036will be created (or reused if it already exists), and the instruction 9037operands will be the displacement into the literal pool using the 9038current base register (as last declared with the `.using' directive). 9039 9040 9041File: as.info, Node: ESA/390 Floating Point, Next: ESA/390 Directives, Prev: ESA/390 Syntax, Up: ESA/390-Dependent 9042 90439.12.4 Floating Point 9044--------------------- 9045 9046The assembler generates only IEEE floating-point numbers. The older 9047floating point formats are not supported. 9048 9049 9050File: as.info, Node: ESA/390 Directives, Next: ESA/390 Opcodes, Prev: ESA/390 Floating Point, Up: ESA/390-Dependent 9051 90529.12.5 ESA/390 Assembler Directives 9053----------------------------------- 9054 9055`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler 9056directives that are documented in the main part of this documentation. 9057Several additional directives are supported in order to implement the 9058ESA/390 addressing model. The most important of these are `.using' and 9059`.ltorg' 9060 9061 These are the additional directives in `as' for the ESA/390: 9062 9063`.dc' 9064 A small subset of the usual DC directive is supported. 9065 9066`.drop REGNO' 9067 Stop using REGNO as the base register. The REGNO must have been 9068 previously declared with a `.using' directive in the same section 9069 as the current section. 9070 9071`.ebcdic STRING' 9072 Emit the EBCDIC equivalent of the indicated string. The emitted 9073 string will be null terminated. Note that the directives 9074 `.string' etc. emit ascii strings by default. 9075 9076`EQU' 9077 The standard HLASM-style EQU directive is not supported; however, 9078 the standard `as' directive .equ can be used to the same effect. 9079 9080`.ltorg' 9081 Dump the literal pool accumulated so far; begin a new literal pool. 9082 The literal pool will be written in the current section; in order 9083 to generate correct assembly, a `.using' must have been previously 9084 specified in the same section. 9085 9086`.using EXPR,REGNO' 9087 Use REGNO as the base register for all subsequent RX, RS, and SS 9088 form instructions. The EXPR will be evaluated to obtain the base 9089 address; usually, EXPR will merely be `*'. 9090 9091 This assembler allows two `.using' directives to be simultaneously 9092 outstanding, one in the `.text' section, and one in another section 9093 (typically, the `.data' section). This feature allows dynamically 9094 loaded objects to be implemented in a relatively straightforward 9095 way. A `.using' directive must always be specified in the `.text' 9096 section; this will specify the base register that will be used for 9097 branches in the `.text' section. A second `.using' may be 9098 specified in another section; this will specify the base register 9099 that is used for non-label address literals. When a second 9100 `.using' is specified, then the subsequent `.ltorg' must be put in 9101 the same section; otherwise an error will result. 9102 9103 Thus, for example, the following code uses `r3' to address branch 9104 targets and `r4' to address the literal pool, which has been 9105 written to the `.data' section. The is, the constants 9106 `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in 9107 the `.data' section. 9108 9109 .data 9110 .using LITPOOL,r4 9111 .text 9112 BASR r3,0 9113 .using *,r3 9114 B START 9115 .long LITPOOL 9116 START: 9117 L r4,4(,r3) 9118 L r15,=A(some_routine) 9119 LTR r15,r15 9120 BNE LABEL 9121 AH r0,=H'42' 9122 LABEL: 9123 ME r6,=E'3.1416' 9124 .data 9125 LITPOOL: 9126 .ltorg 9127 9128 Note that this dual-`.using' directive semantics extends and is 9129 not compatible with HLASM semantics. Note that this assembler 9130 directive does not support the full range of HLASM semantics. 9131 9132 9133 9134File: as.info, Node: ESA/390 Opcodes, Prev: ESA/390 Directives, Up: ESA/390-Dependent 9135 91369.12.6 Opcodes 9137-------------- 9138 9139For detailed information on the ESA/390 machine instruction set, see 9140`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004). 9141 9142 9143File: as.info, Node: i386-Dependent, Next: i860-Dependent, Prev: ESA/390-Dependent, Up: Machine Dependencies 9144 91459.13 80386 Dependent Features 9146============================= 9147 9148 The i386 version `as' supports both the original Intel 386 9149architecture in both 16 and 32-bit mode as well as AMD x86-64 9150architecture extending the Intel architecture to 64-bits. 9151 9152* Menu: 9153 9154* i386-Options:: Options 9155* i386-Directives:: X86 specific directives 9156* i386-Syntax:: AT&T Syntax versus Intel Syntax 9157* i386-Mnemonics:: Instruction Naming 9158* i386-Regs:: Register Naming 9159* i386-Prefixes:: Instruction Prefixes 9160* i386-Memory:: Memory References 9161* i386-Jumps:: Handling of Jump Instructions 9162* i386-Float:: Floating Point 9163* i386-SIMD:: Intel's MMX and AMD's 3DNow! SIMD Operations 9164* i386-16bit:: Writing 16-bit Code 9165* i386-Arch:: Specifying an x86 CPU architecture 9166* i386-Bugs:: AT&T Syntax bugs 9167* i386-Notes:: Notes 9168 9169 9170File: as.info, Node: i386-Options, Next: i386-Directives, Up: i386-Dependent 9171 91729.13.1 Options 9173-------------- 9174 9175The i386 version of `as' has a few machine dependent options: 9176 9177`--32 | --64' 9178 Select the word size, either 32 bits or 64 bits. Selecting 32-bit 9179 implies Intel i386 architecture, while 64-bit implies AMD x86-64 9180 architecture. 9181 9182 These options are only available with the ELF object file format, 9183 and require that the necessary BFD support has been included (on a 9184 32-bit platform you have to add -enable-64-bit-bfd to configure 9185 enable 64-bit usage and use x86-64 as target platform). 9186 9187`-n' 9188 By default, x86 GAS replaces multiple nop instructions used for 9189 alignment within code sections with multi-byte nop instructions 9190 such as leal 0(%esi,1),%esi. This switch disables the 9191 optimization. 9192 9193`--divide' 9194 On SVR4-derived platforms, the character `/' is treated as a 9195 comment character, which means that it cannot be used in 9196 expressions. The `--divide' option turns `/' into a normal 9197 character. This does not disable `/' at the beginning of a line 9198 starting a comment, or affect using `#' for starting a comment. 9199 9200`-march=CPU[+EXTENSION...]' 9201 This option specifies the target processor. The assembler will 9202 issue an error message if an attempt is made to assemble an 9203 instruction which will not execute on the target processor. The 9204 following processor names are recognized: `i8086', `i186', `i286', 9205 `i386', `i486', `i586', `i686', `pentium', `pentiumpro', 9206 `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona', 9207 `core', `core2', `k6', `k6_2', `athlon', `opteron', `k8', 9208 `amdfam10', `generic32' and `generic64'. 9209 9210 In addition to the basic instruction set, the assembler can be 9211 told to accept various extension mnemonics. For example, 9212 `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX. The 9213 following extensions are currently supported: `mmx', `sse', `sse2', 9214 `sse3', `ssse3', `sse4.1', `sse4.2', `sse4', `avx', `vmx', `smx', 9215 `xsave', `aes', `pclmul', `fma', `movbe', `ept', `3dnow', `3dnowa', 9216 `sse4a', `sse5', `svme', `abm' and `padlock'. 9217 9218 When the `.arch' directive is used with `-march', the `.arch' 9219 directive will take precedent. 9220 9221`-mtune=CPU' 9222 This option specifies a processor to optimize for. When used in 9223 conjunction with the `-march' option, only instructions of the 9224 processor specified by the `-march' option will be generated. 9225 9226 Valid CPU values are identical to the processor list of 9227 `-march=CPU'. 9228 9229`-msse2avx' 9230 This option specifies that the assembler should encode SSE 9231 instructions with VEX prefix. 9232 9233`-msse-check=NONE' 9234 9235`-msse-check=WARNING' 9236 9237`-msse-check=ERROR' 9238 These options control if the assembler should check SSE 9239 intructions. `-msse-check=NONE' will make the assembler not to 9240 check SSE instructions, which is the default. 9241 `-msse-check=WARNING' will make the assembler issue a warning for 9242 any SSE intruction. `-msse-check=ERROR' will make the assembler 9243 issue an error for any SSE intruction. 9244 9245`-mmnemonic=ATT' 9246 9247`-mmnemonic=INTEL' 9248 This option specifies instruction mnemonic for matching 9249 instructions. The `.att_mnemonic' and `.intel_mnemonic' 9250 directives will take precedent. 9251 9252`-msyntax=ATT' 9253 9254`-msyntax=INTEL' 9255 This option specifies instruction syntax when processing 9256 instructions. The `.att_syntax' and `.intel_syntax' directives 9257 will take precedent. 9258 9259`-mnaked-reg' 9260 This opetion specifies that registers don't require a `%' prefix. 9261 The `.att_syntax' and `.intel_syntax' directives will take 9262 precedent. 9263 9264 9265 9266File: as.info, Node: i386-Directives, Next: i386-Syntax, Prev: i386-Options, Up: i386-Dependent 9267 92689.13.2 x86 specific Directives 9269------------------------------ 9270 9271`.lcomm SYMBOL , LENGTH[, ALIGNMENT]' 9272 Reserve LENGTH (an absolute expression) bytes for a local common 9273 denoted by SYMBOL. The section and value of SYMBOL are those of 9274 the new local common. The addresses are allocated in the bss 9275 section, so that at run-time the bytes start off zeroed. Since 9276 SYMBOL is not declared global, it is normally not visible to `ld'. 9277 The optional third parameter, ALIGNMENT, specifies the desired 9278 alignment of the symbol in the bss section. 9279 9280 This directive is only available for COFF based x86 targets. 9281 9282 9283 9284File: as.info, Node: i386-Syntax, Next: i386-Mnemonics, Prev: i386-Directives, Up: i386-Dependent 9285 92869.13.3 AT&T Syntax versus Intel Syntax 9287-------------------------------------- 9288 9289`as' now supports assembly using Intel assembler syntax. 9290`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to 9291the usual AT&T mode for compatibility with the output of `gcc'. Either 9292of these directives may have an optional argument, `prefix', or 9293`noprefix' specifying whether registers require a `%' prefix. AT&T 9294System V/386 assembler syntax is quite different from Intel syntax. We 9295mention these differences because almost all 80386 documents use Intel 9296syntax. Notable differences between the two syntaxes are: 9297 9298 * AT&T immediate operands are preceded by `$'; Intel immediate 9299 operands are undelimited (Intel `push 4' is AT&T `pushl $4'). 9300 AT&T register operands are preceded by `%'; Intel register operands 9301 are undelimited. AT&T absolute (as opposed to PC relative) 9302 jump/call operands are prefixed by `*'; they are undelimited in 9303 Intel syntax. 9304 9305 * AT&T and Intel syntax use the opposite order for source and 9306 destination operands. Intel `add eax, 4' is `addl $4, %eax'. The 9307 `source, dest' convention is maintained for compatibility with 9308 previous Unix assemblers. Note that `bound', `invlpga', and 9309 instructions with 2 immediate operands, such as the `enter' 9310 instruction, do _not_ have reversed order. *Note i386-Bugs::. 9311 9312 * In AT&T syntax the size of memory operands is determined from the 9313 last character of the instruction mnemonic. Mnemonic suffixes of 9314 `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long 9315 (32-bit) and quadruple word (64-bit) memory references. Intel 9316 syntax accomplishes this by prefixing memory operands (_not_ the 9317 instruction mnemonics) with `byte ptr', `word ptr', `dword ptr' 9318 and `qword ptr'. Thus, Intel `mov al, byte ptr FOO' is `movb FOO, 9319 %al' in AT&T syntax. 9320 9321 * Immediate form long jumps and calls are `lcall/ljmp $SECTION, 9322 $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far 9323 SECTION:OFFSET'. Also, the far return instruction is `lret 9324 $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far 9325 STACK-ADJUST'. 9326 9327 * The AT&T assembler does not provide support for multiple section 9328 programs. Unix style systems expect all programs to be single 9329 sections. 9330 9331 9332File: as.info, Node: i386-Mnemonics, Next: i386-Regs, Prev: i386-Syntax, Up: i386-Dependent 9333 93349.13.4 Instruction Naming 9335------------------------- 9336 9337Instruction mnemonics are suffixed with one character modifiers which 9338specify the size of operands. The letters `b', `w', `l' and `q' 9339specify byte, word, long and quadruple word operands. If no suffix is 9340specified by an instruction then `as' tries to fill in the missing 9341suffix based on the destination register operand (the last one by 9342convention). Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx'; 9343also, `mov $1, %bx' is equivalent to `movw $1, bx'. Note that this is 9344incompatible with the AT&T Unix assembler which assumes that a missing 9345mnemonic suffix implies long operand size. (This incompatibility does 9346not affect compiler output since compilers always explicitly specify 9347the mnemonic suffix.) 9348 9349 Almost all instructions have the same names in AT&T and Intel format. 9350There are a few exceptions. The sign extend and zero extend 9351instructions need two sizes to specify them. They need a size to 9352sign/zero extend _from_ and a size to zero extend _to_. This is 9353accomplished by using two instruction mnemonic suffixes in AT&T syntax. 9354Base names for sign extend and zero extend are `movs...' and `movz...' 9355in AT&T syntax (`movsx' and `movzx' in Intel syntax). The instruction 9356mnemonic suffixes are tacked on to this base name, the _from_ suffix 9357before the _to_ suffix. Thus, `movsbl %al, %edx' is AT&T syntax for 9358"move sign extend _from_ %al _to_ %edx." Possible suffixes, thus, are 9359`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to 9360long), `bq' (from byte to quadruple word), `wq' (from word to quadruple 9361word), and `lq' (from long to quadruple word). 9362 9363 The Intel-syntax conversion instructions 9364 9365 * `cbw' -- sign-extend byte in `%al' to word in `%ax', 9366 9367 * `cwde' -- sign-extend word in `%ax' to long in `%eax', 9368 9369 * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax', 9370 9371 * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax', 9372 9373 * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64 9374 only), 9375 9376 * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax' 9377 (x86-64 only), 9378 9379are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T 9380naming. `as' accepts either naming for these instructions. 9381 9382 Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax, 9383but are `call far' and `jump far' in Intel convention. 9384 93859.13.5 AT&T Mnemonic versus Intel Mnemonic 9386------------------------------------------ 9387 9388`as' supports assembly using Intel mnemonic. `.intel_mnemonic' selects 9389Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to 9390the usual AT&T mnemonic with AT&T syntax for compatibility with the 9391output of `gcc'. Several x87 instructions, `fadd', `fdiv', `fdivp', 9392`fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp', are 9393implemented in AT&T System V/386 assembler with different mnemonics 9394from those in Intel IA32 specification. `gcc' generates those 9395instructions with AT&T mnemonic. 9396 9397 9398File: as.info, Node: i386-Regs, Next: i386-Prefixes, Prev: i386-Mnemonics, Up: i386-Dependent 9399 94009.13.6 Register Naming 9401---------------------- 9402 9403Register operands are always prefixed with `%'. The 80386 registers 9404consist of 9405 9406 * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx', 9407 `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp' 9408 (the stack pointer). 9409 9410 * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di', 9411 `%si', `%bp', and `%sp'. 9412 9413 * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl', 9414 `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax', 9415 `%bx', `%cx', and `%dx') 9416 9417 * the 6 section registers `%cs' (code section), `%ds' (data 9418 section), `%ss' (stack section), `%es', `%fs', and `%gs'. 9419 9420 * the 3 processor control registers `%cr0', `%cr2', and `%cr3'. 9421 9422 * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and 9423 `%db7'. 9424 9425 * the 2 test registers `%tr6' and `%tr7'. 9426 9427 * the 8 floating point register stack `%st' or equivalently 9428 `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)', 9429 `%st(6)', and `%st(7)'. These registers are overloaded by 8 MMX 9430 registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6' 9431 and `%mm7'. 9432 9433 * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3', 9434 `%xmm4', `%xmm5', `%xmm6' and `%xmm7'. 9435 9436 The AMD x86-64 architecture extends the register set by: 9437 9438 * enhancing the 8 32-bit registers to 64-bit: `%rax' (the 9439 accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the 9440 frame pointer), `%rsp' (the stack pointer) 9441 9442 * the 8 extended registers `%r8'-`%r15'. 9443 9444 * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d' 9445 9446 * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w' 9447 9448 * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b' 9449 9450 * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'. 9451 9452 * the 8 debug registers: `%db8'-`%db15'. 9453 9454 * the 8 SSE registers: `%xmm8'-`%xmm15'. 9455 9456 9457File: as.info, Node: i386-Prefixes, Next: i386-Memory, Prev: i386-Regs, Up: i386-Dependent 9458 94599.13.7 Instruction Prefixes 9460--------------------------- 9461 9462Instruction prefixes are used to modify the following instruction. They 9463are used to repeat string instructions, to provide section overrides, to 9464perform bus lock operations, and to change operand and address sizes. 9465(Most instructions that normally operate on 32-bit operands will use 946616-bit operands if the instruction has an "operand size" prefix.) 9467Instruction prefixes are best written on the same line as the 9468instruction they act upon. For example, the `scas' (scan string) 9469instruction is repeated with: 9470 9471 repne scas %es:(%edi),%al 9472 9473 You may also place prefixes on the lines immediately preceding the 9474instruction, but this circumvents checks that `as' does with prefixes, 9475and will not work with all prefixes. 9476 9477 Here is a list of instruction prefixes: 9478 9479 * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'. 9480 These are automatically added by specifying using the 9481 SECTION:MEMORY-OPERAND form for memory references. 9482 9483 * Operand/Address size prefixes `data16' and `addr16' change 32-bit 9484 operands/addresses into 16-bit operands/addresses, while `data32' 9485 and `addr32' change 16-bit ones (in a `.code16' section) into 9486 32-bit operands/addresses. These prefixes _must_ appear on the 9487 same line of code as the instruction they modify. For example, in 9488 a 16-bit `.code16' section, you might write: 9489 9490 addr32 jmpl *(%ebx) 9491 9492 * The bus lock prefix `lock' inhibits interrupts during execution of 9493 the instruction it precedes. (This is only valid with certain 9494 instructions; see a 80386 manual for details). 9495 9496 * The wait for coprocessor prefix `wait' waits for the coprocessor to 9497 complete the current instruction. This should never be needed for 9498 the 80386/80387 combination. 9499 9500 * The `rep', `repe', and `repne' prefixes are added to string 9501 instructions to make them repeat `%ecx' times (`%cx' times if the 9502 current address size is 16-bits). 9503 9504 * The `rex' family of prefixes is used by x86-64 to encode 9505 extensions to i386 instruction set. The `rex' prefix has four 9506 bits -- an operand size overwrite (`64') used to change operand 9507 size from 32-bit to 64-bit and X, Y and Z extensions bits used to 9508 extend the register set. 9509 9510 You may write the `rex' prefixes directly. The `rex64xyz' 9511 instruction emits `rex' prefix with all the bits set. By omitting 9512 the `64', `x', `y' or `z' you may write other prefixes as well. 9513 Normally, there is no need to write the prefixes explicitly, since 9514 gas will automatically generate them based on the instruction 9515 operands. 9516 9517 9518File: as.info, Node: i386-Memory, Next: i386-Jumps, Prev: i386-Prefixes, Up: i386-Dependent 9519 95209.13.8 Memory References 9521------------------------ 9522 9523An Intel syntax indirect memory reference of the form 9524 9525 SECTION:[BASE + INDEX*SCALE + DISP] 9526 9527is translated into the AT&T syntax 9528 9529 SECTION:DISP(BASE, INDEX, SCALE) 9530 9531where BASE and INDEX are the optional 32-bit base and index registers, 9532DISP is the optional displacement, and SCALE, taking the values 1, 2, 95334, and 8, multiplies INDEX to calculate the address of the operand. If 9534no SCALE is specified, SCALE is taken to be 1. SECTION specifies the 9535optional section register for the memory operand, and may override the 9536default section register (see a 80386 manual for section register 9537defaults). Note that section overrides in AT&T syntax _must_ be 9538preceded by a `%'. If you specify a section override which coincides 9539with the default section register, `as' does _not_ output any section 9540register override prefixes to assemble the given instruction. Thus, 9541section overrides can be specified to emphasize which section register 9542is used for a given memory operand. 9543 9544 Here are some examples of Intel and AT&T style memory references: 9545 9546AT&T: `-4(%ebp)', Intel: `[ebp - 4]' 9547 BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default 9548 section is used (`%ss' for addressing with `%ebp' as the base 9549 register). INDEX, SCALE are both missing. 9550 9551AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]' 9552 INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'. All other 9553 fields are missing. The section register here defaults to `%ds'. 9554 9555AT&T: `foo(,1)'; Intel `[foo]' 9556 This uses the value pointed to by `foo' as a memory operand. Note 9557 that BASE and INDEX are both missing, but there is only _one_ `,'. 9558 This is a syntactic exception. 9559 9560AT&T: `%gs:foo'; Intel `gs:foo' 9561 This selects the contents of the variable `foo' with section 9562 register SECTION being `%gs'. 9563 9564 Absolute (as opposed to PC relative) call and jump operands must be 9565prefixed with `*'. If no `*' is specified, `as' always chooses PC 9566relative addressing for jump/call labels. 9567 9568 Any instruction that has a memory operand, but no register operand, 9569_must_ specify its size (byte, word, long, or quadruple) with an 9570instruction mnemonic suffix (`b', `w', `l' or `q', respectively). 9571 9572 The x86-64 architecture adds an RIP (instruction pointer relative) 9573addressing. This addressing mode is specified by using `rip' as a base 9574register. Only constant offsets are valid. For example: 9575 9576AT&T: `1234(%rip)', Intel: `[rip + 1234]' 9577 Points to the address 1234 bytes past the end of the current 9578 instruction. 9579 9580AT&T: `symbol(%rip)', Intel: `[rip + symbol]' 9581 Points to the `symbol' in RIP relative way, this is shorter than 9582 the default absolute addressing. 9583 9584 Other addressing modes remain unchanged in x86-64 architecture, 9585except registers used are 64-bit instead of 32-bit. 9586 9587 9588File: as.info, Node: i386-Jumps, Next: i386-Float, Prev: i386-Memory, Up: i386-Dependent 9589 95909.13.9 Handling of Jump Instructions 9591------------------------------------ 9592 9593Jump instructions are always optimized to use the smallest possible 9594displacements. This is accomplished by using byte (8-bit) displacement 9595jumps whenever the target is sufficiently close. If a byte displacement 9596is insufficient a long displacement is used. We do not support word 9597(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump 9598instruction with the `data16' instruction prefix), since the 80386 9599insists upon masking `%eip' to 16 bits after the word displacement is 9600added. (See also *note i386-Arch::) 9601 9602 Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz' 9603and `loopne' instructions only come in byte displacements, so that if 9604you use these instructions (`gcc' does not use them) you may get an 9605error message (and incorrect code). The AT&T 80386 assembler tries to 9606get around this problem by expanding `jcxz foo' to 9607 9608 jcxz cx_zero 9609 jmp cx_nonzero 9610 cx_zero: jmp foo 9611 cx_nonzero: 9612 9613 9614File: as.info, Node: i386-Float, Next: i386-SIMD, Prev: i386-Jumps, Up: i386-Dependent 9615 96169.13.10 Floating Point 9617---------------------- 9618 9619All 80387 floating point types except packed BCD are supported. (BCD 9620support may be added without much difficulty). These data types are 962116-, 32-, and 64- bit integers, and single (32-bit), double (64-bit), 9622and extended (80-bit) precision floating point. Each supported type 9623has an instruction mnemonic suffix and a constructor associated with 9624it. Instruction mnemonic suffixes specify the operand's data type. 9625Constructors build these data types into memory. 9626 9627 * Floating point constructors are `.float' or `.single', `.double', 9628 and `.tfloat' for 32-, 64-, and 80-bit formats. These correspond 9629 to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for 9630 80-bit (ten byte) real. The 80387 only supports this format via 9631 the `fldt' (load 80-bit real to stack top) and `fstpt' (store 9632 80-bit real and pop stack) instructions. 9633 9634 * Integer constructors are `.word', `.long' or `.int', and `.quad' 9635 for the 16-, 32-, and 64-bit integer formats. The corresponding 9636 instruction mnemonic suffixes are `s' (single), `l' (long), and 9637 `q' (quad). As with the 80-bit real format, the 64-bit `q' format 9638 is only present in the `fildq' (load quad integer to stack top) 9639 and `fistpq' (store quad integer and pop stack) instructions. 9640 9641 Register to register operations should not use instruction mnemonic 9642suffixes. `fstl %st, %st(1)' will give a warning, and be assembled as 9643if you wrote `fst %st, %st(1)', since all register to register 9644operations use 80-bit floating point operands. (Contrast this with 9645`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating 9646point format, then stores the result in the 4 byte location `mem') 9647 9648 9649File: as.info, Node: i386-SIMD, Next: i386-16bit, Prev: i386-Float, Up: i386-Dependent 9650 96519.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations 9652---------------------------------------------------- 9653 9654`as' supports Intel's MMX instruction set (SIMD instructions for 9655integer data), available on Intel's Pentium MMX processors and Pentium 9656II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and 9657probably others. It also supports AMD's 3DNow! instruction set (SIMD 9658instructions for 32-bit floating point data) available on AMD's K6-2 9659processor and possibly others in the future. 9660 9661 Currently, `as' does not support Intel's floating point SIMD, Katmai 9662(KNI). 9663 9664 The eight 64-bit MMX operands, also used by 3DNow!, are called 9665`%mm0', `%mm1', ... `%mm7'. They contain eight 8-bit integers, four 966616-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit 9667floating point values. The MMX registers cannot be used at the same 9668time as the floating point stack. 9669 9670 See Intel and AMD documentation, keeping in mind that the operand 9671order in instructions is reversed from the Intel syntax. 9672 9673 9674File: as.info, Node: i386-16bit, Next: i386-Arch, Prev: i386-SIMD, Up: i386-Dependent 9675 96769.13.12 Writing 16-bit Code 9677--------------------------- 9678 9679While `as' normally writes only "pure" 32-bit i386 code or 64-bit 9680x86-64 code depending on the default configuration, it also supports 9681writing code to run in real mode or in 16-bit protected mode code 9682segments. To do this, put a `.code16' or `.code16gcc' directive before 9683the assembly language instructions to be run in 16-bit mode. You can 9684switch `as' back to writing normal 32-bit code with the `.code32' 9685directive. 9686 9687 `.code16gcc' provides experimental support for generating 16-bit 9688code from gcc, and differs from `.code16' in that `call', `ret', 9689`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf' 9690instructions default to 32-bit size. This is so that the stack pointer 9691is manipulated in the same way over function calls, allowing access to 9692function parameters at the same stack offsets as in 32-bit mode. 9693`.code16gcc' also automatically adds address size prefixes where 9694necessary to use the 32-bit addressing modes that gcc generates. 9695 9696 The code which `as' generates in 16-bit mode will not necessarily 9697run on a 16-bit pre-80386 processor. To write code that runs on such a 9698processor, you must refrain from using _any_ 32-bit constructs which 9699require `as' to output address or operand size prefixes. 9700 9701 Note that writing 16-bit code instructions by explicitly specifying a 9702prefix or an instruction mnemonic suffix within a 32-bit code section 9703generates different machine instructions than those generated for a 970416-bit code segment. In a 32-bit code section, the following code 9705generates the machine opcode bytes `66 6a 04', which pushes the value 9706`4' onto the stack, decrementing `%esp' by 2. 9707 9708 pushw $4 9709 9710 The same code in a 16-bit code section would generate the machine 9711opcode bytes `6a 04' (i.e., without the operand size prefix), which is 9712correct since the processor default operand size is assumed to be 16 9713bits in a 16-bit code section. 9714 9715 9716File: as.info, Node: i386-Bugs, Next: i386-Notes, Prev: i386-Arch, Up: i386-Dependent 9717 97189.13.13 AT&T Syntax bugs 9719------------------------ 9720 9721The UnixWare assembler, and probably other AT&T derived ix86 Unix 9722assemblers, generate floating point instructions with reversed source 9723and destination registers in certain cases. Unfortunately, gcc and 9724possibly many other programs use this reversed syntax, so we're stuck 9725with it. 9726 9727 For example 9728 9729 fsub %st,%st(3) 9730 results in `%st(3)' being updated to `%st - %st(3)' rather than the 9731expected `%st(3) - %st'. This happens with all the non-commutative 9732arithmetic floating point operations with two register operands where 9733the source register is `%st' and the destination register is `%st(i)'. 9734 9735 9736File: as.info, Node: i386-Arch, Next: i386-Bugs, Prev: i386-16bit, Up: i386-Dependent 9737 97389.13.14 Specifying CPU Architecture 9739----------------------------------- 9740 9741`as' may be told to assemble for a particular CPU (sub-)architecture 9742with the `.arch CPU_TYPE' directive. This directive enables a warning 9743when gas detects an instruction that is not supported on the CPU 9744specified. The choices for CPU_TYPE are: 9745 9746`i8086' `i186' `i286' `i386' 9747`i486' `i586' `i686' `pentium' 9748`pentiumpro' `pentiumii' `pentiumiii' `pentium4' 9749`prescott' `nocona' `core' `core2' 9750`k6' `k6_2' `athlon' `k8' 9751`amdfam10' 9752`generic32' `generic64' 9753`.mmx' `.sse' `.sse2' `.sse3' 9754`.ssse3' `.sse4.1' `.sse4.2' `.sse4' 9755`.avx' `.vmx' `.smx' `.xsave' 9756`.aes' `.pclmul' `.fma' `.movbe' 9757`.ept' 9758`.3dnow' `.3dnowa' `.sse4a' `.sse5' 9759`.svme' `.abm' 9760`.padlock' 9761 9762 Apart from the warning, there are only two other effects on `as' 9763operation; Firstly, if you specify a CPU other than `i486', then shift 9764by one instructions such as `sarl $1, %eax' will automatically use a 9765two byte opcode sequence. The larger three byte opcode sequence is 9766used on the 486 (and when no architecture is specified) because it 9767executes faster on the 486. Note that you can explicitly request the 9768two byte opcode by writing `sarl %eax'. Secondly, if you specify 9769`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte 9770offset conditional jumps will be promoted when necessary to a two 9771instruction sequence consisting of a conditional jump of the opposite 9772sense around an unconditional jump to the target. 9773 9774 Following the CPU architecture (but not a sub-architecture, which 9775are those starting with a dot), you may specify `jumps' or `nojumps' to 9776control automatic promotion of conditional jumps. `jumps' is the 9777default, and enables jump promotion; All external jumps will be of the 9778long variety, and file-local jumps will be promoted as necessary. 9779(*note i386-Jumps::) `nojumps' leaves external conditional jumps as 9780byte offset jumps, and warns about file-local conditional jumps that 9781`as' promotes. Unconditional jumps are treated as for `jumps'. 9782 9783 For example 9784 9785 .arch i8086,nojumps 9786 9787 9788File: as.info, Node: i386-Notes, Prev: i386-Bugs, Up: i386-Dependent 9789 97909.13.15 Notes 9791------------- 9792 9793There is some trickery concerning the `mul' and `imul' instructions 9794that deserves mention. The 16-, 32-, 64- and 128-bit expanding 9795multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul') 9796can be output only in the one operand form. Thus, `imul %ebx, %eax' 9797does _not_ select the expanding multiply; the expanding multiply would 9798clobber the `%edx' register, and this would confuse `gcc' output. Use 9799`imul %ebx' to get the 64-bit product in `%edx:%eax'. 9800 9801 We have added a two operand form of `imul' when the first operand is 9802an immediate mode expression and the second operand is a register. 9803This is just a shorthand, so that, multiplying `%eax' by 69, for 9804example, can be done with `imul $69, %eax' rather than `imul $69, %eax, 9805%eax'. 9806 9807 9808File: as.info, Node: i860-Dependent, Next: i960-Dependent, Prev: i386-Dependent, Up: Machine Dependencies 9809 98109.14 Intel i860 Dependent Features 9811================================== 9812 9813* Menu: 9814 9815* Notes-i860:: i860 Notes 9816* Options-i860:: i860 Command-line Options 9817* Directives-i860:: i860 Machine Directives 9818* Opcodes for i860:: i860 Opcodes 9819 9820 9821File: as.info, Node: Notes-i860, Next: Options-i860, Up: i860-Dependent 9822 98239.14.1 i860 Notes 9824----------------- 9825 9826This is a fairly complete i860 assembler which is compatible with the 9827UNIX System V/860 Release 4 assembler. However, it does not currently 9828support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT'). 9829 9830 Like the SVR4/860 assembler, the output object format is ELF32. 9831Currently, this is the only supported object format. If there is 9832sufficient interest, other formats such as COFF may be implemented. 9833 9834 Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter 9835being the default. One difference is that AT&T syntax requires the '%' 9836prefix on register names while Intel syntax does not. Another 9837difference is in the specification of relocatable expressions. The 9838Intel syntax is `ha%expression' whereas the SVR4 syntax is 9839`[expression]@ha' (and similarly for the "l" and "h" selectors). 9840 9841 9842File: as.info, Node: Options-i860, Next: Directives-i860, Prev: Notes-i860, Up: i860-Dependent 9843 98449.14.2 i860 Command-line Options 9845-------------------------------- 9846 98479.14.2.1 SVR4 compatibility options 9848................................... 9849 9850`-V' 9851 Print assembler version. 9852 9853`-Qy' 9854 Ignored. 9855 9856`-Qn' 9857 Ignored. 9858 98599.14.2.2 Other options 9860...................... 9861 9862`-EL' 9863 Select little endian output (this is the default). 9864 9865`-EB' 9866 Select big endian output. Note that the i860 always reads 9867 instructions as little endian data, so this option only effects 9868 data and not instructions. 9869 9870`-mwarn-expand' 9871 Emit a warning message if any pseudo-instruction expansions 9872 occurred. For example, a `or' instruction with an immediate 9873 larger than 16-bits will be expanded into two instructions. This 9874 is a very undesirable feature to rely on, so this flag can help 9875 detect any code where it happens. One use of it, for instance, has 9876 been to find and eliminate any place where `gcc' may emit these 9877 pseudo-instructions. 9878 9879`-mxp' 9880 Enable support for the i860XP instructions and control registers. 9881 By default, this option is disabled so that only the base 9882 instruction set (i.e., i860XR) is supported. 9883 9884`-mintel-syntax' 9885 The i860 assembler defaults to AT&T/SVR4 syntax. This option 9886 enables the Intel syntax. 9887 9888 9889File: as.info, Node: Directives-i860, Next: Opcodes for i860, Prev: Options-i860, Up: i860-Dependent 9890 98919.14.3 i860 Machine Directives 9892------------------------------ 9893 9894`.dual' 9895 Enter dual instruction mode. While this directive is supported, the 9896 preferred way to use dual instruction mode is to explicitly code 9897 the dual bit with the `d.' prefix. 9898 9899`.enddual' 9900 Exit dual instruction mode. While this directive is supported, the 9901 preferred way to use dual instruction mode is to explicitly code 9902 the dual bit with the `d.' prefix. 9903 9904`.atmp' 9905 Change the temporary register used when expanding pseudo 9906 operations. The default register is `r31'. 9907 9908 The `.dual', `.enddual', and `.atmp' directives are available only 9909in the Intel syntax mode. 9910 9911 Both syntaxes allow for the standard `.align' directive. However, 9912the Intel syntax additionally allows keywords for the alignment 9913parameter: "`.align type'", where `type' is one of `.short', `.long', 9914`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4, 9915and 8, respectively. 9916 9917 9918File: as.info, Node: Opcodes for i860, Prev: Directives-i860, Up: i860-Dependent 9919 99209.14.4 i860 Opcodes 9921------------------- 9922 9923All of the Intel i860XR and i860XP machine instructions are supported. 9924Please see either _i860 Microprocessor Programmer's Reference Manual_ 9925or _i860 Microprocessor Architecture_ for more information. 9926 99279.14.4.1 Other instruction support (pseudo-instructions) 9928........................................................ 9929 9930For compatibility with some other i860 assemblers, a number of 9931pseudo-instructions are supported. While these are supported, they are 9932a very undesirable feature that should be avoided - in particular, when 9933they result in an expansion to multiple actual i860 instructions. Below 9934are the pseudo-instructions that result in expansions. 9935 * Load large immediate into general register: 9936 9937 The pseudo-instruction `mov imm,%rn' (where the immediate does not 9938 fit within a signed 16-bit field) will be expanded into: 9939 orh large_imm@h,%r0,%rn 9940 or large_imm@l,%rn,%rn 9941 9942 * Load/store with relocatable address expression: 9943 9944 For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will 9945 be expanded into: 9946 orh addr_exp@ha,%rx,%r31 9947 ld.l addr_exp@l(%r31),%rn 9948 9949 The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x, 9950 fst.x', and `pst.x' as well. 9951 9952 * Signed large immediate with add/subtract: 9953 9954 If any of the arithmetic operations `adds, addu, subs, subu' are 9955 used with an immediate larger than 16-bits (signed), then they 9956 will be expanded. For instance, the pseudo-instruction `adds 9957 large_imm,%rx,%rn' expands to: 9958 orh large_imm@h,%r0,%r31 9959 or large_imm@l,%r31,%r31 9960 adds %r31,%rx,%rn 9961 9962 * Unsigned large immediate with logical operations: 9963 9964 Logical operations (`or, andnot, or, xor') also result in 9965 expansions. The pseudo-instruction `or large_imm,%rx,%rn' results 9966 in: 9967 orh large_imm@h,%rx,%r31 9968 or large_imm@l,%r31,%rn 9969 9970 Similarly for the others, except for `and' which expands to: 9971 andnot (-1 - large_imm)@h,%rx,%r31 9972 andnot (-1 - large_imm)@l,%r31,%rn 9973 9974 9975File: as.info, Node: i960-Dependent, Next: IA-64-Dependent, Prev: i860-Dependent, Up: Machine Dependencies 9976 99779.15 Intel 80960 Dependent Features 9978=================================== 9979 9980* Menu: 9981 9982* Options-i960:: i960 Command-line Options 9983* Floating Point-i960:: Floating Point 9984* Directives-i960:: i960 Machine Directives 9985* Opcodes for i960:: i960 Opcodes 9986 9987 9988File: as.info, Node: Options-i960, Next: Floating Point-i960, Up: i960-Dependent 9989 99909.15.1 i960 Command-line Options 9991-------------------------------- 9992 9993`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC' 9994 Select the 80960 architecture. Instructions or features not 9995 supported by the selected architecture cause fatal errors. 9996 9997 `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'. 9998 Synonyms are provided for compatibility with other tools. 9999 10000 If you do not specify any of these options, `as' generates code 10001 for any instruction or feature that is supported by _some_ version 10002 of the 960 (even if this means mixing architectures!). In 10003 principle, `as' attempts to deduce the minimal sufficient 10004 processor type if none is specified; depending on the object code 10005 format, the processor type may be recorded in the object file. If 10006 it is critical that the `as' output match a specific architecture, 10007 specify that architecture explicitly. 10008 10009`-b' 10010 Add code to collect information about conditional branches taken, 10011 for later optimization using branch prediction bits. (The 10012 conditional branch instructions have branch prediction bits in the 10013 CA, CB, and CC architectures.) If BR represents a conditional 10014 branch instruction, the following represents the code generated by 10015 the assembler when `-b' is specified: 10016 10017 call INCREMENT ROUTINE 10018 .word 0 # pre-counter 10019 Label: BR 10020 call INCREMENT ROUTINE 10021 .word 0 # post-counter 10022 10023 The counter following a branch records the number of times that 10024 branch was _not_ taken; the difference between the two counters is 10025 the number of times the branch _was_ taken. 10026 10027 A table of every such `Label' is also generated, so that the 10028 external postprocessor `gbr960' (supplied by Intel) can locate all 10029 the counters. This table is always labeled `__BRANCH_TABLE__'; 10030 this is a local symbol to permit collecting statistics for many 10031 separate object files. The table is word aligned, and begins with 10032 a two-word header. The first word, initialized to 0, is used in 10033 maintaining linked lists of branch tables. The second word is a 10034 count of the number of entries in the table, which follow 10035 immediately: each is a word, pointing to one of the labels 10036 illustrated above. 10037 10038 +------------+------------+------------+ ... +------------+ 10039 | | | | | | 10040 | *NEXT | COUNT: N | *BRLAB 1 | | *BRLAB N | 10041 | | | | | | 10042 +------------+------------+------------+ ... +------------+ 10043 10044 __BRANCH_TABLE__ layout 10045 10046 The first word of the header is used to locate multiple branch 10047 tables, since each object file may contain one. Normally the links 10048 are maintained with a call to an initialization routine, placed at 10049 the beginning of each function in the file. The GNU C compiler 10050 generates these calls automatically when you give it a `-b' option. 10051 For further details, see the documentation of `gbr960'. 10052 10053`-no-relax' 10054 Normally, Compare-and-Branch instructions with targets that require 10055 displacements greater than 13 bits (or that have external targets) 10056 are replaced with the corresponding compare (or `chkbit') and 10057 branch instructions. You can use the `-no-relax' option to 10058 specify that `as' should generate errors instead, if the target 10059 displacement is larger than 13 bits. 10060 10061 This option does not affect the Compare-and-Jump instructions; the 10062 code emitted for them is _always_ adjusted when necessary 10063 (depending on displacement size), regardless of whether you use 10064 `-no-relax'. 10065 10066 10067File: as.info, Node: Floating Point-i960, Next: Directives-i960, Prev: Options-i960, Up: i960-Dependent 10068 100699.15.2 Floating Point 10070--------------------- 10071 10072`as' generates IEEE floating-point numbers for the directives `.float', 10073`.double', `.extended', and `.single'. 10074 10075 10076File: as.info, Node: Directives-i960, Next: Opcodes for i960, Prev: Floating Point-i960, Up: i960-Dependent 10077 100789.15.3 i960 Machine Directives 10079------------------------------ 10080 10081`.bss SYMBOL, LENGTH, ALIGN' 10082 Reserve LENGTH bytes in the bss section for a local SYMBOL, 10083 aligned to the power of two specified by ALIGN. LENGTH and ALIGN 10084 must be positive absolute expressions. This directive differs 10085 from `.lcomm' only in that it permits you to specify an alignment. 10086 *Note `.lcomm': Lcomm. 10087 10088`.extended FLONUMS' 10089 `.extended' expects zero or more flonums, separated by commas; for 10090 each flonum, `.extended' emits an IEEE extended-format (80-bit) 10091 floating-point number. 10092 10093`.leafproc CALL-LAB, BAL-LAB' 10094 You can use the `.leafproc' directive in conjunction with the 10095 optimized `callj' instruction to enable faster calls of leaf 10096 procedures. If a procedure is known to call no other procedures, 10097 you may define an entry point that skips procedure prolog code 10098 (and that does not depend on system-supplied saved context), and 10099 declare it as the BAL-LAB using `.leafproc'. If the procedure 10100 also has an entry point that goes through the normal prolog, you 10101 can specify that entry point as CALL-LAB. 10102 10103 A `.leafproc' declaration is meant for use in conjunction with the 10104 optimized call instruction `callj'; the directive records the data 10105 needed later to choose between converting the `callj' into a `bal' 10106 or a `call'. 10107 10108 CALL-LAB is optional; if only one argument is present, or if the 10109 two arguments are identical, the single argument is assumed to be 10110 the `bal' entry point. 10111 10112`.sysproc NAME, INDEX' 10113 The `.sysproc' directive defines a name for a system procedure. 10114 After you define it using `.sysproc', you can use NAME to refer to 10115 the system procedure identified by INDEX when calling procedures 10116 with the optimized call instruction `callj'. 10117 10118 Both arguments are required; INDEX must be between 0 and 31 10119 (inclusive). 10120 10121 10122File: as.info, Node: Opcodes for i960, Prev: Directives-i960, Up: i960-Dependent 10123 101249.15.4 i960 Opcodes 10125------------------- 10126 10127All Intel 960 machine instructions are supported; *note i960 10128Command-line Options: Options-i960. for a discussion of selecting the 10129instruction subset for a particular 960 architecture. 10130 10131 Some opcodes are processed beyond simply emitting a single 10132corresponding instruction: `callj', and Compare-and-Branch or 10133Compare-and-Jump instructions with target displacements larger than 13 10134bits. 10135 10136* Menu: 10137 10138* callj-i960:: `callj' 10139* Compare-and-branch-i960:: Compare-and-Branch 10140 10141 10142File: as.info, Node: callj-i960, Next: Compare-and-branch-i960, Up: Opcodes for i960 10143 101449.15.4.1 `callj' 10145................ 10146 10147You can write `callj' to have the assembler or the linker determine the 10148most appropriate form of subroutine call: `call', `bal', or `calls'. 10149If the assembly source contains enough information--a `.leafproc' or 10150`.sysproc' directive defining the operand--then `as' translates the 10151`callj'; if not, it simply emits the `callj', leaving it for the linker 10152to resolve. 10153 10154 10155File: as.info, Node: Compare-and-branch-i960, Prev: callj-i960, Up: Opcodes for i960 10156 101579.15.4.2 Compare-and-Branch 10158........................... 10159 10160The 960 architectures provide combined Compare-and-Branch instructions 10161that permit you to store the branch target in the lower 13 bits of the 10162instruction word itself. However, if you specify a branch target far 10163enough away that its address won't fit in 13 bits, the assembler can 10164either issue an error, or convert your Compare-and-Branch instruction 10165into separate instructions to do the compare and the branch. 10166 10167 Whether `as' gives an error or expands the instruction depends on 10168two choices you can make: whether you use the `-no-relax' option, and 10169whether you use a "Compare and Branch" instruction or a "Compare and 10170Jump" instruction. The "Jump" instructions are _always_ expanded if 10171necessary; the "Branch" instructions are expanded when necessary 10172_unless_ you specify `-no-relax'--in which case `as' gives an error 10173instead. 10174 10175 These are the Compare-and-Branch instructions, their "Jump" variants, 10176and the instruction pairs they may expand into: 10177 10178 Compare and 10179 Branch Jump Expanded to 10180 ------ ------ ------------ 10181 bbc chkbit; bno 10182 bbs chkbit; bo 10183 cmpibe cmpije cmpi; be 10184 cmpibg cmpijg cmpi; bg 10185 cmpibge cmpijge cmpi; bge 10186 cmpibl cmpijl cmpi; bl 10187 cmpible cmpijle cmpi; ble 10188 cmpibno cmpijno cmpi; bno 10189 cmpibne cmpijne cmpi; bne 10190 cmpibo cmpijo cmpi; bo 10191 cmpobe cmpoje cmpo; be 10192 cmpobg cmpojg cmpo; bg 10193 cmpobge cmpojge cmpo; bge 10194 cmpobl cmpojl cmpo; bl 10195 cmpoble cmpojle cmpo; ble 10196 cmpobne cmpojne cmpo; bne 10197 10198 10199File: as.info, Node: IA-64-Dependent, Next: IP2K-Dependent, Prev: i960-Dependent, Up: Machine Dependencies 10200 102019.16 IA-64 Dependent Features 10202============================= 10203 10204* Menu: 10205 10206* IA-64 Options:: Options 10207* IA-64 Syntax:: Syntax 10208* IA-64 Opcodes:: Opcodes 10209 10210 10211File: as.info, Node: IA-64 Options, Next: IA-64 Syntax, Up: IA-64-Dependent 10212 102139.16.1 Options 10214-------------- 10215 10216`-mconstant-gp' 10217 This option instructs the assembler to mark the resulting object 10218 file as using the "constant GP" model. With this model, it is 10219 assumed that the entire program uses a single global pointer (GP) 10220 value. Note that this option does not in any fashion affect the 10221 machine code emitted by the assembler. All it does is turn on the 10222 EF_IA_64_CONS_GP flag in the ELF file header. 10223 10224`-mauto-pic' 10225 This option instructs the assembler to mark the resulting object 10226 file as using the "constant GP without function descriptor" data 10227 model. This model is like the "constant GP" model, except that it 10228 additionally does away with function descriptors. What this means 10229 is that the address of a function refers directly to the 10230 function's code entry-point. Normally, such an address would 10231 refer to a function descriptor, which contains both the code 10232 entry-point and the GP-value needed by the function. Note that 10233 this option does not in any fashion affect the machine code 10234 emitted by the assembler. All it does is turn on the 10235 EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header. 10236 10237`-milp32' 10238 10239`-milp64' 10240 10241`-mlp64' 10242 10243`-mp64' 10244 These options select the data model. The assembler defaults to 10245 `-mlp64' (LP64 data model). 10246 10247`-mle' 10248 10249`-mbe' 10250 These options select the byte order. The `-mle' option selects 10251 little-endian byte order (default) and `-mbe' selects big-endian 10252 byte order. Note that IA-64 machine code always uses 10253 little-endian byte order. 10254 10255`-mtune=itanium1' 10256 10257`-mtune=itanium2' 10258 Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default 10259 is ITANIUM2. 10260 10261`-munwind-check=warning' 10262 10263`-munwind-check=error' 10264 These options control what the assembler will do when performing 10265 consistency checks on unwind directives. `-munwind-check=warning' 10266 will make the assembler issue a warning when an unwind directive 10267 check fails. This is the default. `-munwind-check=error' will 10268 make the assembler issue an error when an unwind directive check 10269 fails. 10270 10271`-mhint.b=ok' 10272 10273`-mhint.b=warning' 10274 10275`-mhint.b=error' 10276 These options control what the assembler will do when the `hint.b' 10277 instruction is used. `-mhint.b=ok' will make the assembler accept 10278 `hint.b'. `-mint.b=warning' will make the assembler issue a 10279 warning when `hint.b' is used. `-mhint.b=error' will make the 10280 assembler treat `hint.b' as an error, which is the default. 10281 10282`-x' 10283 10284`-xexplicit' 10285 These options turn on dependency violation checking. 10286 10287`-xauto' 10288 This option instructs the assembler to automatically insert stop 10289 bits where necessary to remove dependency violations. This is the 10290 default mode. 10291 10292`-xnone' 10293 This option turns off dependency violation checking. 10294 10295`-xdebug' 10296 This turns on debug output intended to help tracking down bugs in 10297 the dependency violation checker. 10298 10299`-xdebugn' 10300 This is a shortcut for -xnone -xdebug. 10301 10302`-xdebugx' 10303 This is a shortcut for -xexplicit -xdebug. 10304 10305 10306 10307File: as.info, Node: IA-64 Syntax, Next: IA-64 Opcodes, Prev: IA-64 Options, Up: IA-64-Dependent 10308 103099.16.2 Syntax 10310------------- 10311 10312The assembler syntax closely follows the IA-64 Assembly Language 10313Reference Guide. 10314 10315* Menu: 10316 10317* IA-64-Chars:: Special Characters 10318* IA-64-Regs:: Register Names 10319* IA-64-Bits:: Bit Names 10320 10321 10322File: as.info, Node: IA-64-Chars, Next: IA-64-Regs, Up: IA-64 Syntax 10323 103249.16.2.1 Special Characters 10325........................... 10326 10327`//' is the line comment token. 10328 10329 `;' can be used instead of a newline to separate statements. 10330 10331 10332File: as.info, Node: IA-64-Regs, Next: IA-64-Bits, Prev: IA-64-Chars, Up: IA-64 Syntax 10333 103349.16.2.2 Register Names 10335....................... 10336 10337The 128 integer registers are referred to as `rN'. The 128 10338floating-point registers are referred to as `fN'. The 128 application 10339registers are referred to as `arN'. The 128 control registers are 10340referred to as `crN'. The 64 one-bit predicate registers are referred 10341to as `pN'. The 8 branch registers are referred to as `bN'. In 10342addition, the assembler defines a number of aliases: `gp' (`r1'), `sp' 10343(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'), 10344`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N'). 10345 10346 For convenience, the assembler also defines aliases for all named 10347application and control registers. For example, `ar.bsp' refers to the 10348register backing store pointer (`ar17'). Similarly, `cr.eoi' refers to 10349the end-of-interrupt register (`cr67'). 10350 10351 10352File: as.info, Node: IA-64-Bits, Prev: IA-64-Regs, Up: IA-64 Syntax 10353 103549.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names 10355........................................................ 10356 10357The assembler defines bit masks for each of the bits in the IA-64 10358processor status register. For example, `psr.ic' corresponds to a 10359value of 0x2000. These masks are primarily intended for use with the 10360`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere 10361else where an integer constant is expected. 10362 10363 10364File: as.info, Node: IA-64 Opcodes, Prev: IA-64 Syntax, Up: IA-64-Dependent 10365 103669.16.3 Opcodes 10367-------------- 10368 10369For detailed information on the IA-64 machine instruction set, see the 10370IA-64 Architecture Handbook 10371(http://developer.intel.com/design/itanium/arch_spec.htm). 10372 10373 10374File: as.info, Node: IP2K-Dependent, Next: M32C-Dependent, Prev: IA-64-Dependent, Up: Machine Dependencies 10375 103769.17 IP2K Dependent Features 10377============================ 10378 10379* Menu: 10380 10381* IP2K-Opts:: IP2K Options 10382 10383 10384File: as.info, Node: IP2K-Opts, Up: IP2K-Dependent 10385 103869.17.1 IP2K Options 10387------------------- 10388 10389The Ubicom IP2K version of `as' has a few machine dependent options: 10390 10391`-mip2022ext' 10392 `as' can assemble the extended IP2022 instructions, but it will 10393 only do so if this is specifically allowed via this command line 10394 option. 10395 10396`-mip2022' 10397 This option restores the assembler's default behaviour of not 10398 permitting the extended IP2022 instructions to be assembled. 10399 10400 10401 10402File: as.info, Node: M32C-Dependent, Next: M32R-Dependent, Prev: IP2K-Dependent, Up: Machine Dependencies 10403 104049.18 M32C Dependent Features 10405============================ 10406 10407 `as' can assemble code for several different members of the Renesas 10408M32C family. Normally the default is to assemble code for the M16C 10409microprocessor. The `-m32c' option may be used to change the default 10410to the M32C microprocessor. 10411 10412* Menu: 10413 10414* M32C-Opts:: M32C Options 10415* M32C-Modifiers:: Symbolic Operand Modifiers 10416 10417 10418File: as.info, Node: M32C-Opts, Next: M32C-Modifiers, Up: M32C-Dependent 10419 104209.18.1 M32C Options 10421------------------- 10422 10423The Renesas M32C version of `as' has these machine-dependent options: 10424 10425`-m32c' 10426 Assemble M32C instructions. 10427 10428`-m16c' 10429 Assemble M16C instructions (default). 10430 10431`-relax' 10432 Enable support for link-time relaxations. 10433 10434`-h-tick-hex' 10435 Support H'00 style hex constants in addition to 0x00 style. 10436 10437 10438 10439File: as.info, Node: M32C-Modifiers, Prev: M32C-Opts, Up: M32C-Dependent 10440 104419.18.2 Symbolic Operand Modifiers 10442--------------------------------- 10443 10444The assembler supports several modifiers when using symbol addresses in 10445M32C instruction operands. The general syntax is the following: 10446 10447 %modifier(symbol) 10448 10449`%dsp8' 10450`%dsp16' 10451 These modifiers override the assembler's assumptions about how big 10452 a symbol's address is. Normally, when it sees an operand like 10453 `sym[a0]' it assumes `sym' may require the widest displacement 10454 field (16 bits for `-m16c', 24 bits for `-m32c'). These modifiers 10455 tell it to assume the address will fit in an 8 or 16 bit 10456 (respectively) unsigned displacement. Note that, of course, if it 10457 doesn't actually fit you will get linker errors. Example: 10458 10459 mov.w %dsp8(sym)[a0],r1 10460 mov.b #0,%dsp8(sym)[a0] 10461 10462`%hi8' 10463 This modifier allows you to load bits 16 through 23 of a 24 bit 10464 address into an 8 bit register. This is useful with, for example, 10465 the M16C `smovf' instruction, which expects a 20 bit address in 10466 `r1h' and `a0'. Example: 10467 10468 mov.b #%hi8(sym),r1h 10469 mov.w #%lo16(sym),a0 10470 smovf.b 10471 10472`%lo16' 10473 Likewise, this modifier allows you to load bits 0 through 15 of a 10474 24 bit address into a 16 bit register. 10475 10476`%hi16' 10477 This modifier allows you to load bits 16 through 31 of a 32 bit 10478 address into a 16 bit register. While the M32C family only has 24 10479 bits of address space, it does support addresses in pairs of 16 bit 10480 registers (like `a1a0' for the `lde' instruction). This modifier 10481 is for loading the upper half in such cases. Example: 10482 10483 mov.w #%hi16(sym),a1 10484 mov.w #%lo16(sym),a0 10485 ... 10486 lde.w [a1a0],r1 10487 10488 10489 10490File: as.info, Node: M32R-Dependent, Next: M68K-Dependent, Prev: M32C-Dependent, Up: Machine Dependencies 10491 104929.19 M32R Dependent Features 10493============================ 10494 10495* Menu: 10496 10497* M32R-Opts:: M32R Options 10498* M32R-Directives:: M32R Directives 10499* M32R-Warnings:: M32R Warnings 10500 10501 10502File: as.info, Node: M32R-Opts, Next: M32R-Directives, Up: M32R-Dependent 10503 105049.19.1 M32R Options 10505------------------- 10506 10507The Renease M32R version of `as' has a few machine dependent options: 10508 10509`-m32rx' 10510 `as' can assemble code for several different members of the 10511 Renesas M32R family. Normally the default is to assemble code for 10512 the M32R microprocessor. This option may be used to change the 10513 default to the M32RX microprocessor, which adds some more 10514 instructions to the basic M32R instruction set, and some 10515 additional parameters to some of the original instructions. 10516 10517`-m32r2' 10518 This option changes the target processor to the the M32R2 10519 microprocessor. 10520 10521`-m32r' 10522 This option can be used to restore the assembler's default 10523 behaviour of assembling for the M32R microprocessor. This can be 10524 useful if the default has been changed by a previous command line 10525 option. 10526 10527`-little' 10528 This option tells the assembler to produce little-endian code and 10529 data. The default is dependent upon how the toolchain was 10530 configured. 10531 10532`-EL' 10533 This is a synonym for _-little_. 10534 10535`-big' 10536 This option tells the assembler to produce big-endian code and 10537 data. 10538 10539`-EB' 10540 This is a synonum for _-big_. 10541 10542`-KPIC' 10543 This option specifies that the output of the assembler should be 10544 marked as position-independent code (PIC). 10545 10546`-parallel' 10547 This option tells the assembler to attempts to combine two 10548 sequential instructions into a single, parallel instruction, where 10549 it is legal to do so. 10550 10551`-no-parallel' 10552 This option disables a previously enabled _-parallel_ option. 10553 10554`-no-bitinst' 10555 This option disables the support for the extended bit-field 10556 instructions provided by the M32R2. If this support needs to be 10557 re-enabled the _-bitinst_ switch can be used to restore it. 10558 10559`-O' 10560 This option tells the assembler to attempt to optimize the 10561 instructions that it produces. This includes filling delay slots 10562 and converting sequential instructions into parallel ones. This 10563 option implies _-parallel_. 10564 10565`-warn-explicit-parallel-conflicts' 10566 Instructs `as' to produce warning messages when questionable 10567 parallel instructions are encountered. This option is enabled by 10568 default, but `gcc' disables it when it invokes `as' directly. 10569 Questionable instructions are those whose behaviour would be 10570 different if they were executed sequentially. For example the 10571 code fragment `mv r1, r2 || mv r3, r1' produces a different result 10572 from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3 10573 and then r2 into r1, whereas the later moves r2 into r1 and r3. 10574 10575`-Wp' 10576 This is a shorter synonym for the 10577 _-warn-explicit-parallel-conflicts_ option. 10578 10579`-no-warn-explicit-parallel-conflicts' 10580 Instructs `as' not to produce warning messages when questionable 10581 parallel instructions are encountered. 10582 10583`-Wnp' 10584 This is a shorter synonym for the 10585 _-no-warn-explicit-parallel-conflicts_ option. 10586 10587`-ignore-parallel-conflicts' 10588 This option tells the assembler's to stop checking parallel 10589 instructions for constraint violations. This ability is provided 10590 for hardware vendors testing chip designs and should not be used 10591 under normal circumstances. 10592 10593`-no-ignore-parallel-conflicts' 10594 This option restores the assembler's default behaviour of checking 10595 parallel instructions to detect constraint violations. 10596 10597`-Ip' 10598 This is a shorter synonym for the _-ignore-parallel-conflicts_ 10599 option. 10600 10601`-nIp' 10602 This is a shorter synonym for the _-no-ignore-parallel-conflicts_ 10603 option. 10604 10605`-warn-unmatched-high' 10606 This option tells the assembler to produce a warning message if a 10607 `.high' pseudo op is encountered without a matching `.low' pseudo 10608 op. The presence of such an unmatched pseudo op usually indicates 10609 a programming error. 10610 10611`-no-warn-unmatched-high' 10612 Disables a previously enabled _-warn-unmatched-high_ option. 10613 10614`-Wuh' 10615 This is a shorter synonym for the _-warn-unmatched-high_ option. 10616 10617`-Wnuh' 10618 This is a shorter synonym for the _-no-warn-unmatched-high_ option. 10619 10620 10621 10622File: as.info, Node: M32R-Directives, Next: M32R-Warnings, Prev: M32R-Opts, Up: M32R-Dependent 10623 106249.19.2 M32R Directives 10625---------------------- 10626 10627The Renease M32R version of `as' has a few architecture specific 10628directives: 10629 10630`low EXPRESSION' 10631 The `low' directive computes the value of its expression and 10632 places the lower 16-bits of the result into the immediate-field of 10633 the instruction. For example: 10634 10635 or3 r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678 10636 add3, r0, r0, #low(fred) ; compute r0 = r0 + low 16-bits of address of fred 10637 10638`high EXPRESSION' 10639 The `high' directive computes the value of its expression and 10640 places the upper 16-bits of the result into the immediate-field of 10641 the instruction. For example: 10642 10643 seth r0, #high(0x12345678) ; compute r0 = 0x12340000 10644 seth, r0, #high(fred) ; compute r0 = upper 16-bits of address of fred 10645 10646`shigh EXPRESSION' 10647 The `shigh' directive is very similar to the `high' directive. It 10648 also computes the value of its expression and places the upper 10649 16-bits of the result into the immediate-field of the instruction. 10650 The difference is that `shigh' also checks to see if the lower 10651 16-bits could be interpreted as a signed number, and if so it 10652 assumes that a borrow will occur from the upper-16 bits. To 10653 compensate for this the `shigh' directive pre-biases the upper 16 10654 bit value by adding one to it. For example: 10655 10656 For example: 10657 10658 seth r0, #shigh(0x12345678) ; compute r0 = 0x12340000 10659 seth r0, #shigh(0x00008000) ; compute r0 = 0x00010000 10660 10661 In the second example the lower 16-bits are 0x8000. If these are 10662 treated as a signed value and sign extended to 32-bits then the 10663 value becomes 0xffff8000. If this value is then added to 10664 0x00010000 then the result is 0x00008000. 10665 10666 This behaviour is to allow for the different semantics of the 10667 `or3' and `add3' instructions. The `or3' instruction treats its 10668 16-bit immediate argument as unsigned whereas the `add3' treats 10669 its 16-bit immediate as a signed value. So for example: 10670 10671 seth r0, #shigh(0x00008000) 10672 add3 r0, r0, #low(0x00008000) 10673 10674 Produces the correct result in r0, whereas: 10675 10676 seth r0, #shigh(0x00008000) 10677 or3 r0, r0, #low(0x00008000) 10678 10679 Stores 0xffff8000 into r0. 10680 10681 Note - the `shigh' directive does not know where in the assembly 10682 source code the lower 16-bits of the value are going set, so it 10683 cannot check to make sure that an `or3' instruction is being used 10684 rather than an `add3' instruction. It is up to the programmer to 10685 make sure that correct directives are used. 10686 10687`.m32r' 10688 The directive performs a similar thing as the _-m32r_ command line 10689 option. It tells the assembler to only accept M32R instructions 10690 from now on. An instructions from later M32R architectures are 10691 refused. 10692 10693`.m32rx' 10694 The directive performs a similar thing as the _-m32rx_ command 10695 line option. It tells the assembler to start accepting the extra 10696 instructions in the M32RX ISA as well as the ordinary M32R ISA. 10697 10698`.m32r2' 10699 The directive performs a similar thing as the _-m32r2_ command 10700 line option. It tells the assembler to start accepting the extra 10701 instructions in the M32R2 ISA as well as the ordinary M32R ISA. 10702 10703`.little' 10704 The directive performs a similar thing as the _-little_ command 10705 line option. It tells the assembler to start producing 10706 little-endian code and data. This option should be used with care 10707 as producing mixed-endian binary files is fraught with danger. 10708 10709`.big' 10710 The directive performs a similar thing as the _-big_ command line 10711 option. It tells the assembler to start producing big-endian code 10712 and data. This option should be used with care as producing 10713 mixed-endian binary files is fraught with danger. 10714 10715 10716 10717File: as.info, Node: M32R-Warnings, Prev: M32R-Directives, Up: M32R-Dependent 10718 107199.19.3 M32R Warnings 10720-------------------- 10721 10722There are several warning and error messages that can be produced by 10723`as' which are specific to the M32R: 10724 10725`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?' 10726 This message is only produced if warnings for explicit parallel 10727 conflicts have been enabled. It indicates that the assembler has 10728 encountered a parallel instruction in which the destination 10729 register of the left hand instruction is used as an input register 10730 in the right hand instruction. For example in this code fragment 10731 `mv r1, r2 || neg r3, r1' register r1 is the destination of the 10732 move instruction and the input to the neg instruction. 10733 10734`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?' 10735 This message is only produced if warnings for explicit parallel 10736 conflicts have been enabled. It indicates that the assembler has 10737 encountered a parallel instruction in which the destination 10738 register of the right hand instruction is used as an input 10739 register in the left hand instruction. For example in this code 10740 fragment `mv r1, r2 || neg r2, r3' register r2 is the destination 10741 of the neg instruction and the input to the move instruction. 10742 10743`instruction `...' is for the M32RX only' 10744 This message is produced when the assembler encounters an 10745 instruction which is only supported by the M32Rx processor, and 10746 the `-m32rx' command line flag has not been specified to allow 10747 assembly of such instructions. 10748 10749`unknown instruction `...'' 10750 This message is produced when the assembler encounters an 10751 instruction which it does not recognize. 10752 10753`only the NOP instruction can be issued in parallel on the m32r' 10754 This message is produced when the assembler encounters a parallel 10755 instruction which does not involve a NOP instruction and the 10756 `-m32rx' command line flag has not been specified. Only the M32Rx 10757 processor is able to execute two instructions in parallel. 10758 10759`instruction `...' cannot be executed in parallel.' 10760 This message is produced when the assembler encounters a parallel 10761 instruction which is made up of one or two instructions which 10762 cannot be executed in parallel. 10763 10764`Instructions share the same execution pipeline' 10765 This message is produced when the assembler encounters a parallel 10766 instruction whoes components both use the same execution pipeline. 10767 10768`Instructions write to the same destination register.' 10769 This message is produced when the assembler encounters a parallel 10770 instruction where both components attempt to modify the same 10771 register. For example these code fragments will produce this 10772 message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2, 10773 @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx 10774 r3, r4' (Both write to the condition bit) 10775 10776 10777 10778File: as.info, Node: M68K-Dependent, Next: M68HC11-Dependent, Prev: M32R-Dependent, Up: Machine Dependencies 10779 107809.20 M680x0 Dependent Features 10781============================== 10782 10783* Menu: 10784 10785* M68K-Opts:: M680x0 Options 10786* M68K-Syntax:: Syntax 10787* M68K-Moto-Syntax:: Motorola Syntax 10788* M68K-Float:: Floating Point 10789* M68K-Directives:: 680x0 Machine Directives 10790* M68K-opcodes:: Opcodes 10791 10792 10793File: as.info, Node: M68K-Opts, Next: M68K-Syntax, Up: M68K-Dependent 10794 107959.20.1 M680x0 Options 10796--------------------- 10797 10798The Motorola 680x0 version of `as' has a few machine dependent options: 10799 10800`-march=ARCHITECTURE' 10801 This option specifies a target architecture. The following 10802 architectures are recognized: `68000', `68010', `68020', `68030', 10803 `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and 10804 `cfv4e'. 10805 10806`-mcpu=CPU' 10807 This option specifies a target cpu. When used in conjunction with 10808 the `-march' option, the cpu must be within the specified 10809 architecture. Also, the generic features of the architecture are 10810 used for instruction generation, rather than those of the specific 10811 chip. 10812 10813`-m[no-]68851' 10814 10815`-m[no-]68881' 10816 10817`-m[no-]div' 10818 10819`-m[no-]usp' 10820 10821`-m[no-]float' 10822 10823`-m[no-]mac' 10824 10825`-m[no-]emac' 10826 Enable or disable various architecture specific features. If a 10827 chip or architecture by default supports an option (for instance 10828 `-march=isaaplus' includes the `-mdiv' option), explicitly 10829 disabling the option will override the default. 10830 10831`-l' 10832 You can use the `-l' option to shorten the size of references to 10833 undefined symbols. If you do not use the `-l' option, references 10834 to undefined symbols are wide enough for a full `long' (32 bits). 10835 (Since `as' cannot know where these symbols end up, `as' can only 10836 allocate space for the linker to fill in later. Since `as' does 10837 not know how far away these symbols are, it allocates as much 10838 space as it can.) If you use this option, the references are only 10839 one word wide (16 bits). This may be useful if you want the 10840 object file to be as small as possible, and you know that the 10841 relevant symbols are always less than 17 bits away. 10842 10843`--register-prefix-optional' 10844 For some configurations, especially those where the compiler 10845 normally does not prepend an underscore to the names of user 10846 variables, the assembler requires a `%' before any use of a 10847 register name. This is intended to let the assembler distinguish 10848 between C variables and functions named `a0' through `a7', and so 10849 on. The `%' is always accepted, but is not required for certain 10850 configurations, notably `sun3'. The `--register-prefix-optional' 10851 option may be used to permit omitting the `%' even for 10852 configurations for which it is normally required. If this is 10853 done, it will generally be impossible to refer to C variables and 10854 functions with the same names as register names. 10855 10856`--bitwise-or' 10857 Normally the character `|' is treated as a comment character, which 10858 means that it can not be used in expressions. The `--bitwise-or' 10859 option turns `|' into a normal character. In this mode, you must 10860 either use C style comments, or start comments with a `#' character 10861 at the beginning of a line. 10862 10863`--base-size-default-16 --base-size-default-32' 10864 If you use an addressing mode with a base register without 10865 specifying the size, `as' will normally use the full 32 bit value. 10866 For example, the addressing mode `%a0@(%d0)' is equivalent to 10867 `%a0@(%d0:l)'. You may use the `--base-size-default-16' option to 10868 tell `as' to default to using the 16 bit value. In this case, 10869 `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'. You may use the 10870 `--base-size-default-32' option to restore the default behaviour. 10871 10872`--disp-size-default-16 --disp-size-default-32' 10873 If you use an addressing mode with a displacement, and the value 10874 of the displacement is not known, `as' will normally assume that 10875 the value is 32 bits. For example, if the symbol `disp' has not 10876 been defined, `as' will assemble the addressing mode 10877 `%a0@(disp,%d0)' as though `disp' is a 32 bit value. You may use 10878 the `--disp-size-default-16' option to tell `as' to instead assume 10879 that the displacement is 16 bits. In this case, `as' will 10880 assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value. You 10881 may use the `--disp-size-default-32' option to restore the default 10882 behaviour. 10883 10884`--pcrel' 10885 Always keep branches PC-relative. In the M680x0 architecture all 10886 branches are defined as PC-relative. However, on some processors 10887 they are limited to word displacements maximum. When `as' needs a 10888 long branch that is not available, it normally emits an absolute 10889 jump instead. This option disables this substitution. When this 10890 option is given and no long branches are available, only word 10891 branches will be emitted. An error message will be generated if a 10892 word branch cannot reach its target. This option has no effect on 10893 68020 and other processors that have long branches. *note Branch 10894 Improvement: M68K-Branch. 10895 10896`-m68000' 10897 `as' can assemble code for several different members of the 10898 Motorola 680x0 family. The default depends upon how `as' was 10899 configured when it was built; normally, the default is to assemble 10900 code for the 68020 microprocessor. The following options may be 10901 used to change the default. These options control which 10902 instructions and addressing modes are permitted. The members of 10903 the 680x0 family are very similar. For detailed information about 10904 the differences, see the Motorola manuals. 10905 10906 `-m68000' 10907 `-m68ec000' 10908 `-m68hc000' 10909 `-m68hc001' 10910 `-m68008' 10911 `-m68302' 10912 `-m68306' 10913 `-m68307' 10914 `-m68322' 10915 `-m68356' 10916 Assemble for the 68000. `-m68008', `-m68302', and so on are 10917 synonyms for `-m68000', since the chips are the same from the 10918 point of view of the assembler. 10919 10920 `-m68010' 10921 Assemble for the 68010. 10922 10923 `-m68020' 10924 `-m68ec020' 10925 Assemble for the 68020. This is normally the default. 10926 10927 `-m68030' 10928 `-m68ec030' 10929 Assemble for the 68030. 10930 10931 `-m68040' 10932 `-m68ec040' 10933 Assemble for the 68040. 10934 10935 `-m68060' 10936 `-m68ec060' 10937 Assemble for the 68060. 10938 10939 `-mcpu32' 10940 `-m68330' 10941 `-m68331' 10942 `-m68332' 10943 `-m68333' 10944 `-m68334' 10945 `-m68336' 10946 `-m68340' 10947 `-m68341' 10948 `-m68349' 10949 `-m68360' 10950 Assemble for the CPU32 family of chips. 10951 10952 `-m5200' 10953 10954 `-m5202' 10955 10956 `-m5204' 10957 10958 `-m5206' 10959 10960 `-m5206e' 10961 10962 `-m521x' 10963 10964 `-m5249' 10965 10966 `-m528x' 10967 10968 `-m5307' 10969 10970 `-m5407' 10971 10972 `-m547x' 10973 10974 `-m548x' 10975 10976 `-mcfv4' 10977 10978 `-mcfv4e' 10979 Assemble for the ColdFire family of chips. 10980 10981 `-m68881' 10982 `-m68882' 10983 Assemble 68881 floating point instructions. This is the 10984 default for the 68020, 68030, and the CPU32. The 68040 and 10985 68060 always support floating point instructions. 10986 10987 `-mno-68881' 10988 Do not assemble 68881 floating point instructions. This is 10989 the default for 68000 and the 68010. The 68040 and 68060 10990 always support floating point instructions, even if this 10991 option is used. 10992 10993 `-m68851' 10994 Assemble 68851 MMU instructions. This is the default for the 10995 68020, 68030, and 68060. The 68040 accepts a somewhat 10996 different set of MMU instructions; `-m68851' and `-m68040' 10997 should not be used together. 10998 10999 `-mno-68851' 11000 Do not assemble 68851 MMU instructions. This is the default 11001 for the 68000, 68010, and the CPU32. The 68040 accepts a 11002 somewhat different set of MMU instructions. 11003 11004 11005File: as.info, Node: M68K-Syntax, Next: M68K-Moto-Syntax, Prev: M68K-Opts, Up: M68K-Dependent 11006 110079.20.2 Syntax 11008------------- 11009 11010This syntax for the Motorola 680x0 was developed at MIT. 11011 11012 The 680x0 version of `as' uses instructions names and syntax 11013compatible with the Sun assembler. Intervening periods are ignored; 11014for example, `movl' is equivalent to `mov.l'. 11015 11016 In the following table APC stands for any of the address registers 11017(`%a0' through `%a7'), the program counter (`%pc'), the zero-address 11018relative to the program counter (`%zpc'), a suppressed address register 11019(`%za0' through `%za7'), or it may be omitted entirely. The use of 11020SIZE means one of `w' or `l', and it may be omitted, along with the 11021leading colon, unless a scale is also specified. The use of SCALE 11022means one of `1', `2', `4', or `8', and it may always be omitted along 11023with the leading colon. 11024 11025 The following addressing modes are understood: 11026"Immediate" 11027 `#NUMBER' 11028 11029"Data Register" 11030 `%d0' through `%d7' 11031 11032"Address Register" 11033 `%a0' through `%a7' 11034 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is 11035 also known as `%fp', the Frame Pointer. 11036 11037"Address Register Indirect" 11038 `%a0@' through `%a7@' 11039 11040"Address Register Postincrement" 11041 `%a0@+' through `%a7@+' 11042 11043"Address Register Predecrement" 11044 `%a0@-' through `%a7@-' 11045 11046"Indirect Plus Offset" 11047 `APC@(NUMBER)' 11048 11049"Index" 11050 `APC@(NUMBER,REGISTER:SIZE:SCALE)' 11051 11052 The NUMBER may be omitted. 11053 11054"Postindex" 11055 `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)' 11056 11057 The ONUMBER or the REGISTER, but not both, may be omitted. 11058 11059"Preindex" 11060 `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)' 11061 11062 The NUMBER may be omitted. Omitting the REGISTER produces the 11063 Postindex addressing mode. 11064 11065"Absolute" 11066 `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'. 11067 11068 11069File: as.info, Node: M68K-Moto-Syntax, Next: M68K-Float, Prev: M68K-Syntax, Up: M68K-Dependent 11070 110719.20.3 Motorola Syntax 11072---------------------- 11073 11074The standard Motorola syntax for this chip differs from the syntax 11075already discussed (*note Syntax: M68K-Syntax.). `as' can accept 11076Motorola syntax for operands, even if MIT syntax is used for other 11077operands in the same instruction. The two kinds of syntax are fully 11078compatible. 11079 11080 In the following table APC stands for any of the address registers 11081(`%a0' through `%a7'), the program counter (`%pc'), the zero-address 11082relative to the program counter (`%zpc'), or a suppressed address 11083register (`%za0' through `%za7'). The use of SIZE means one of `w' or 11084`l', and it may always be omitted along with the leading dot. The use 11085of SCALE means one of `1', `2', `4', or `8', and it may always be 11086omitted along with the leading asterisk. 11087 11088 The following additional addressing modes are understood: 11089 11090"Address Register Indirect" 11091 `(%a0)' through `(%a7)' 11092 `%a7' is also known as `%sp', i.e., the Stack Pointer. `%a6' is 11093 also known as `%fp', the Frame Pointer. 11094 11095"Address Register Postincrement" 11096 `(%a0)+' through `(%a7)+' 11097 11098"Address Register Predecrement" 11099 `-(%a0)' through `-(%a7)' 11100 11101"Indirect Plus Offset" 11102 `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'. 11103 11104 The NUMBER may also appear within the parentheses, as in 11105 `(NUMBER,%A0)'. When used with the PC, the NUMBER may be omitted 11106 (with an address register, omitting the NUMBER produces Address 11107 Register Indirect mode). 11108 11109"Index" 11110 `NUMBER(APC,REGISTER.SIZE*SCALE)' 11111 11112 The NUMBER may be omitted, or it may appear within the 11113 parentheses. The APC may be omitted. The REGISTER and the APC 11114 may appear in either order. If both APC and REGISTER are address 11115 registers, and the SIZE and SCALE are omitted, then the first 11116 register is taken as the base register, and the second as the 11117 index register. 11118 11119"Postindex" 11120 `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)' 11121 11122 The ONUMBER, or the REGISTER, or both, may be omitted. Either the 11123 NUMBER or the APC may be omitted, but not both. 11124 11125"Preindex" 11126 `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)' 11127 11128 The NUMBER, or the APC, or the REGISTER, or any two of them, may 11129 be omitted. The ONUMBER may be omitted. The REGISTER and the APC 11130 may appear in either order. If both APC and REGISTER are address 11131 registers, and the SIZE and SCALE are omitted, then the first 11132 register is taken as the base register, and the second as the 11133 index register. 11134 11135 11136File: as.info, Node: M68K-Float, Next: M68K-Directives, Prev: M68K-Moto-Syntax, Up: M68K-Dependent 11137 111389.20.4 Floating Point 11139--------------------- 11140 11141Packed decimal (P) format floating literals are not supported. Feel 11142free to add the code! 11143 11144 The floating point formats generated by directives are these. 11145 11146`.float' 11147 `Single' precision floating point constants. 11148 11149`.double' 11150 `Double' precision floating point constants. 11151 11152`.extend' 11153`.ldouble' 11154 `Extended' precision (`long double') floating point constants. 11155 11156 11157File: as.info, Node: M68K-Directives, Next: M68K-opcodes, Prev: M68K-Float, Up: M68K-Dependent 11158 111599.20.5 680x0 Machine Directives 11160------------------------------- 11161 11162In order to be compatible with the Sun assembler the 680x0 assembler 11163understands the following directives. 11164 11165`.data1' 11166 This directive is identical to a `.data 1' directive. 11167 11168`.data2' 11169 This directive is identical to a `.data 2' directive. 11170 11171`.even' 11172 This directive is a special case of the `.align' directive; it 11173 aligns the output to an even byte boundary. 11174 11175`.skip' 11176 This directive is identical to a `.space' directive. 11177 11178`.arch NAME' 11179 Select the target architecture and extension features. Valid 11180 values for NAME are the same as for the `-march' command line 11181 option. This directive cannot be specified after any instructions 11182 have been assembled. If it is given multiple times, or in 11183 conjunction with the `-march' option, all uses must be for the 11184 same architecture and extension set. 11185 11186`.cpu NAME' 11187 Select the target cpu. Valid valuse for NAME are the same as for 11188 the `-mcpu' command line option. This directive cannot be 11189 specified after any instructions have been assembled. If it is 11190 given multiple times, or in conjunction with the `-mopt' option, 11191 all uses must be for the same cpu. 11192 11193 11194 11195File: as.info, Node: M68K-opcodes, Prev: M68K-Directives, Up: M68K-Dependent 11196 111979.20.6 Opcodes 11198-------------- 11199 11200* Menu: 11201 11202* M68K-Branch:: Branch Improvement 11203* M68K-Chars:: Special Characters 11204 11205 11206File: as.info, Node: M68K-Branch, Next: M68K-Chars, Up: M68K-opcodes 11207 112089.20.6.1 Branch Improvement 11209........................... 11210 11211Certain pseudo opcodes are permitted for branch instructions. They 11212expand to the shortest branch instruction that reach the target. 11213Generally these mnemonics are made by substituting `j' for `b' at the 11214start of a Motorola mnemonic. 11215 11216 The following table summarizes the pseudo-operations. A `*' flags 11217cases that are more fully described after the table: 11218 11219 Displacement 11220 +------------------------------------------------------------ 11221 | 68020 68000/10, not PC-relative OK 11222 Pseudo-Op |BYTE WORD LONG ABSOLUTE LONG JUMP ** 11223 +------------------------------------------------------------ 11224 jbsr |bsrs bsrw bsrl jsr 11225 jra |bras braw bral jmp 11226 * jXX |bXXs bXXw bXXl bNXs;jmp 11227 * dbXX | N/A dbXXw dbXX;bras;bral dbXX;bras;jmp 11228 fjXX | N/A fbXXw fbXXl N/A 11229 11230 XX: condition 11231 NX: negative of condition XX 11232 `*'--see full description below 11233 `**'--this expansion mode is disallowed by `--pcrel' 11234 11235`jbsr' 11236`jra' 11237 These are the simplest jump pseudo-operations; they always map to 11238 one particular machine instruction, depending on the displacement 11239 to the branch target. This instruction will be a byte or word 11240 branch is that is sufficient. Otherwise, a long branch will be 11241 emitted if available. If no long branches are available and the 11242 `--pcrel' option is not given, an absolute long jump will be 11243 emitted instead. If no long branches are available, the `--pcrel' 11244 option is given, and a word branch cannot reach the target, an 11245 error message is generated. 11246 11247 In addition to standard branch operands, `as' allows these 11248 pseudo-operations to have all operands that are allowed for jsr 11249 and jmp, substituting these instructions if the operand given is 11250 not valid for a branch instruction. 11251 11252`jXX' 11253 Here, `jXX' stands for an entire family of pseudo-operations, 11254 where XX is a conditional branch or condition-code test. The full 11255 list of pseudo-ops in this family is: 11256 jhi jls jcc jcs jne jeq jvc 11257 jvs jpl jmi jge jlt jgt jle 11258 11259 Usually, each of these pseudo-operations expands to a single branch 11260 instruction. However, if a word branch is not sufficient, no long 11261 branches are available, and the `--pcrel' option is not given, `as' 11262 issues a longer code fragment in terms of NX, the opposite 11263 condition to XX. For example, under these conditions: 11264 jXX foo 11265 gives 11266 bNXs oof 11267 jmp foo 11268 oof: 11269 11270`dbXX' 11271 The full family of pseudo-operations covered here is 11272 dbhi dbls dbcc dbcs dbne dbeq dbvc 11273 dbvs dbpl dbmi dbge dblt dbgt dble 11274 dbf dbra dbt 11275 11276 Motorola `dbXX' instructions allow word displacements only. When 11277 a word displacement is sufficient, each of these pseudo-operations 11278 expands to the corresponding Motorola instruction. When a word 11279 displacement is not sufficient and long branches are available, 11280 when the source reads `dbXX foo', `as' emits 11281 dbXX oo1 11282 bras oo2 11283 oo1:bral foo 11284 oo2: 11285 11286 If, however, long branches are not available and the `--pcrel' 11287 option is not given, `as' emits 11288 dbXX oo1 11289 bras oo2 11290 oo1:jmp foo 11291 oo2: 11292 11293`fjXX' 11294 This family includes 11295 fjne fjeq fjge fjlt fjgt fjle fjf 11296 fjt fjgl fjgle fjnge fjngl fjngle fjngt 11297 fjnle fjnlt fjoge fjogl fjogt fjole fjolt 11298 fjor fjseq fjsf fjsne fjst fjueq fjuge 11299 fjugt fjule fjult fjun 11300 11301 Each of these pseudo-operations always expands to a single Motorola 11302 coprocessor branch instruction, word or long. All Motorola 11303 coprocessor branch instructions allow both word and long 11304 displacements. 11305 11306 11307 11308File: as.info, Node: M68K-Chars, Prev: M68K-Branch, Up: M68K-opcodes 11309 113109.20.6.2 Special Characters 11311........................... 11312 11313The immediate character is `#' for Sun compatibility. The line-comment 11314character is `|' (unless the `--bitwise-or' option is used). If a `#' 11315appears at the beginning of a line, it is treated as a comment unless 11316it looks like `# line file', in which case it is treated normally. 11317 11318 11319File: as.info, Node: M68HC11-Dependent, Next: MIPS-Dependent, Prev: M68K-Dependent, Up: Machine Dependencies 11320 113219.21 M68HC11 and M68HC12 Dependent Features 11322=========================================== 11323 11324* Menu: 11325 11326* M68HC11-Opts:: M68HC11 and M68HC12 Options 11327* M68HC11-Syntax:: Syntax 11328* M68HC11-Modifiers:: Symbolic Operand Modifiers 11329* M68HC11-Directives:: Assembler Directives 11330* M68HC11-Float:: Floating Point 11331* M68HC11-opcodes:: Opcodes 11332 11333 11334File: as.info, Node: M68HC11-Opts, Next: M68HC11-Syntax, Up: M68HC11-Dependent 11335 113369.21.1 M68HC11 and M68HC12 Options 11337---------------------------------- 11338 11339The Motorola 68HC11 and 68HC12 version of `as' have a few machine 11340dependent options. 11341 11342`-m68hc11' 11343 This option switches the assembler in the M68HC11 mode. In this 11344 mode, the assembler only accepts 68HC11 operands and mnemonics. It 11345 produces code for the 68HC11. 11346 11347`-m68hc12' 11348 This option switches the assembler in the M68HC12 mode. In this 11349 mode, the assembler also accepts 68HC12 operands and mnemonics. It 11350 produces code for the 68HC12. A few 68HC11 instructions are 11351 replaced by some 68HC12 instructions as recommended by Motorola 11352 specifications. 11353 11354`-m68hcs12' 11355 This option switches the assembler in the M68HCS12 mode. This 11356 mode is similar to `-m68hc12' but specifies to assemble for the 11357 68HCS12 series. The only difference is on the assembling of the 11358 `movb' and `movw' instruction when a PC-relative operand is used. 11359 11360`-mshort' 11361 This option controls the ABI and indicates to use a 16-bit integer 11362 ABI. It has no effect on the assembled instructions. This is the 11363 default. 11364 11365`-mlong' 11366 This option controls the ABI and indicates to use a 32-bit integer 11367 ABI. 11368 11369`-mshort-double' 11370 This option controls the ABI and indicates to use a 32-bit float 11371 ABI. This is the default. 11372 11373`-mlong-double' 11374 This option controls the ABI and indicates to use a 64-bit float 11375 ABI. 11376 11377`--strict-direct-mode' 11378 You can use the `--strict-direct-mode' option to disable the 11379 automatic translation of direct page mode addressing into extended 11380 mode when the instruction does not support direct mode. For 11381 example, the `clr' instruction does not support direct page mode 11382 addressing. When it is used with the direct page mode, `as' will 11383 ignore it and generate an absolute addressing. This option 11384 prevents `as' from doing this, and the wrong usage of the direct 11385 page mode will raise an error. 11386 11387`--short-branches' 11388 The `--short-branches' option turns off the translation of 11389 relative branches into absolute branches when the branch offset is 11390 out of range. By default `as' transforms the relative branch 11391 (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc', 11392 `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch 11393 when the offset is out of the -128 .. 127 range. In that case, 11394 the `bsr' instruction is translated into a `jsr', the `bra' 11395 instruction is translated into a `jmp' and the conditional 11396 branches instructions are inverted and followed by a `jmp'. This 11397 option disables these translations and `as' will generate an error 11398 if a relative branch is out of range. This option does not affect 11399 the optimization associated to the `jbra', `jbsr' and `jbXX' 11400 pseudo opcodes. 11401 11402`--force-long-branches' 11403 The `--force-long-branches' option forces the translation of 11404 relative branches into absolute branches. This option does not 11405 affect the optimization associated to the `jbra', `jbsr' and 11406 `jbXX' pseudo opcodes. 11407 11408`--print-insn-syntax' 11409 You can use the `--print-insn-syntax' option to obtain the syntax 11410 description of the instruction when an error is detected. 11411 11412`--print-opcodes' 11413 The `--print-opcodes' option prints the list of all the 11414 instructions with their syntax. The first item of each line 11415 represents the instruction name and the rest of the line indicates 11416 the possible operands for that instruction. The list is printed in 11417 alphabetical order. Once the list is printed `as' exits. 11418 11419`--generate-example' 11420 The `--generate-example' option is similar to `--print-opcodes' 11421 but it generates an example for each instruction instead. 11422 11423 11424File: as.info, Node: M68HC11-Syntax, Next: M68HC11-Modifiers, Prev: M68HC11-Opts, Up: M68HC11-Dependent 11425 114269.21.2 Syntax 11427------------- 11428 11429In the M68HC11 syntax, the instruction name comes first and it may be 11430followed by one or several operands (up to three). Operands are 11431separated by comma (`,'). In the normal mode, `as' will complain if too 11432many operands are specified for a given instruction. In the MRI mode 11433(turned on with `-M' option), it will treat them as comments. Example: 11434 11435 inx 11436 lda #23 11437 bset 2,x #4 11438 brclr *bot #8 foo 11439 11440 The following addressing modes are understood for 68HC11 and 68HC12: 11441"Immediate" 11442 `#NUMBER' 11443 11444"Address Register" 11445 `NUMBER,X', `NUMBER,Y' 11446 11447 The NUMBER may be omitted in which case 0 is assumed. 11448 11449"Direct Addressing mode" 11450 `*SYMBOL', or `*DIGITS' 11451 11452"Absolute" 11453 `SYMBOL', or `DIGITS' 11454 11455 The M68HC12 has other more complex addressing modes. All of them are 11456supported and they are represented below: 11457 11458"Constant Offset Indexed Addressing Mode" 11459 `NUMBER,REG' 11460 11461 The NUMBER may be omitted in which case 0 is assumed. The 11462 register can be either `X', `Y', `SP' or `PC'. The assembler will 11463 use the smaller post-byte definition according to the constant 11464 value (5-bit constant offset, 9-bit constant offset or 16-bit 11465 constant offset). If the constant is not known by the assembler 11466 it will use the 16-bit constant offset post-byte and the value 11467 will be resolved at link time. 11468 11469"Offset Indexed Indirect" 11470 `[NUMBER,REG]' 11471 11472 The register can be either `X', `Y', `SP' or `PC'. 11473 11474"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement" 11475 `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+' 11476 11477 The number must be in the range `-8'..`+8' and must not be 0. The 11478 register can be either `X', `Y', `SP' or `PC'. 11479 11480"Accumulator Offset" 11481 `ACC,REG' 11482 11483 The accumulator register can be either `A', `B' or `D'. The 11484 register can be either `X', `Y', `SP' or `PC'. 11485 11486"Accumulator D offset indexed-indirect" 11487 `[D,REG]' 11488 11489 The register can be either `X', `Y', `SP' or `PC'. 11490 11491 11492 For example: 11493 11494 ldab 1024,sp 11495 ldd [10,x] 11496 orab 3,+x 11497 stab -2,y- 11498 ldx a,pc 11499 sty [d,sp] 11500 11501 11502File: as.info, Node: M68HC11-Modifiers, Next: M68HC11-Directives, Prev: M68HC11-Syntax, Up: M68HC11-Dependent 11503 115049.21.3 Symbolic Operand Modifiers 11505--------------------------------- 11506 11507The assembler supports several modifiers when using symbol addresses in 1150868HC11 and 68HC12 instruction operands. The general syntax is the 11509following: 11510 11511 %modifier(symbol) 11512 11513`%addr' 11514 This modifier indicates to the assembler and linker to use the 11515 16-bit physical address corresponding to the symbol. This is 11516 intended to be used on memory window systems to map a symbol in 11517 the memory bank window. If the symbol is in a memory expansion 11518 part, the physical address corresponds to the symbol address 11519 within the memory bank window. If the symbol is not in a memory 11520 expansion part, this is the symbol address (using or not using the 11521 %addr modifier has no effect in that case). 11522 11523`%page' 11524 This modifier indicates to use the memory page number corresponding 11525 to the symbol. If the symbol is in a memory expansion part, its 11526 page number is computed by the linker as a number used to map the 11527 page containing the symbol in the memory bank window. If the 11528 symbol is not in a memory expansion part, the page number is 0. 11529 11530`%hi' 11531 This modifier indicates to use the 8-bit high part of the physical 11532 address of the symbol. 11533 11534`%lo' 11535 This modifier indicates to use the 8-bit low part of the physical 11536 address of the symbol. 11537 11538 11539 For example a 68HC12 call to a function `foo_example' stored in 11540memory expansion part could be written as follows: 11541 11542 call %addr(foo_example),%page(foo_example) 11543 11544 and this is equivalent to 11545 11546 call foo_example 11547 11548 And for 68HC11 it could be written as follows: 11549 11550 ldab #%page(foo_example) 11551 stab _page_switch 11552 jsr %addr(foo_example) 11553 11554 11555File: as.info, Node: M68HC11-Directives, Next: M68HC11-Float, Prev: M68HC11-Modifiers, Up: M68HC11-Dependent 11556 115579.21.4 Assembler Directives 11558--------------------------- 11559 11560The 68HC11 and 68HC12 version of `as' have the following specific 11561assembler directives: 11562 11563`.relax' 11564 The relax directive is used by the `GNU Compiler' to emit a 11565 specific relocation to mark a group of instructions for linker 11566 relaxation. The sequence of instructions within the group must be 11567 known to the linker so that relaxation can be performed. 11568 11569`.mode [mshort|mlong|mshort-double|mlong-double]' 11570 This directive specifies the ABI. It overrides the `-mshort', 11571 `-mlong', `-mshort-double' and `-mlong-double' options. 11572 11573`.far SYMBOL' 11574 This directive marks the symbol as a `far' symbol meaning that it 11575 uses a `call/rtc' calling convention as opposed to `jsr/rts'. 11576 During a final link, the linker will identify references to the 11577 `far' symbol and will verify the proper calling convention. 11578 11579`.interrupt SYMBOL' 11580 This directive marks the symbol as an interrupt entry point. This 11581 information is then used by the debugger to correctly unwind the 11582 frame across interrupts. 11583 11584`.xrefb SYMBOL' 11585 This directive is defined for compatibility with the 11586 `Specification for Motorola 8 and 16-Bit Assembly Language Input 11587 Standard' and is ignored. 11588 11589 11590 11591File: as.info, Node: M68HC11-Float, Next: M68HC11-opcodes, Prev: M68HC11-Directives, Up: M68HC11-Dependent 11592 115939.21.5 Floating Point 11594--------------------- 11595 11596Packed decimal (P) format floating literals are not supported. Feel 11597free to add the code! 11598 11599 The floating point formats generated by directives are these. 11600 11601`.float' 11602 `Single' precision floating point constants. 11603 11604`.double' 11605 `Double' precision floating point constants. 11606 11607`.extend' 11608`.ldouble' 11609 `Extended' precision (`long double') floating point constants. 11610 11611 11612File: as.info, Node: M68HC11-opcodes, Prev: M68HC11-Float, Up: M68HC11-Dependent 11613 116149.21.6 Opcodes 11615-------------- 11616 11617* Menu: 11618 11619* M68HC11-Branch:: Branch Improvement 11620 11621 11622File: as.info, Node: M68HC11-Branch, Up: M68HC11-opcodes 11623 116249.21.6.1 Branch Improvement 11625........................... 11626 11627Certain pseudo opcodes are permitted for branch instructions. They 11628expand to the shortest branch instruction that reach the target. 11629Generally these mnemonics are made by prepending `j' to the start of 11630Motorola mnemonic. These pseudo opcodes are not affected by the 11631`--short-branches' or `--force-long-branches' options. 11632 11633 The following table summarizes the pseudo-operations. 11634 11635 Displacement Width 11636 +-------------------------------------------------------------+ 11637 | Options | 11638 | --short-branches --force-long-branches | 11639 +--------------------------+----------------------------------+ 11640 Op |BYTE WORD | BYTE WORD | 11641 +--------------------------+----------------------------------+ 11642 bsr | bsr <pc-rel> <error> | jsr <abs> | 11643 bra | bra <pc-rel> <error> | jmp <abs> | 11644 jbsr | bsr <pc-rel> jsr <abs> | bsr <pc-rel> jsr <abs> | 11645 jbra | bra <pc-rel> jmp <abs> | bra <pc-rel> jmp <abs> | 11646 bXX | bXX <pc-rel> <error> | bNX +3; jmp <abs> | 11647 jbXX | bXX <pc-rel> bNX +3; | bXX <pc-rel> bNX +3; jmp <abs> | 11648 | jmp <abs> | | 11649 +--------------------------+----------------------------------+ 11650 XX: condition 11651 NX: negative of condition XX 11652 11653`jbsr' 11654`jbra' 11655 These are the simplest jump pseudo-operations; they always map to 11656 one particular machine instruction, depending on the displacement 11657 to the branch target. 11658 11659`jbXX' 11660 Here, `jbXX' stands for an entire family of pseudo-operations, 11661 where XX is a conditional branch or condition-code test. The full 11662 list of pseudo-ops in this family is: 11663 jbcc jbeq jbge jbgt jbhi jbvs jbpl jblo 11664 jbcs jbne jblt jble jbls jbvc jbmi 11665 11666 For the cases of non-PC relative displacements and long 11667 displacements, `as' issues a longer code fragment in terms of NX, 11668 the opposite condition to XX. For example, for the non-PC 11669 relative case: 11670 jbXX foo 11671 gives 11672 bNXs oof 11673 jmp foo 11674 oof: 11675 11676 11677 11678File: as.info, Node: MIPS-Dependent, Next: MMIX-Dependent, Prev: M68HC11-Dependent, Up: Machine Dependencies 11679 116809.22 MIPS Dependent Features 11681============================ 11682 11683 GNU `as' for MIPS architectures supports several different MIPS 11684processors, and MIPS ISA levels I through V, MIPS32, and MIPS64. For 11685information about the MIPS instruction set, see `MIPS RISC 11686Architecture', by Kane and Heindrich (Prentice-Hall). For an overview 11687of MIPS assembly conventions, see "Appendix D: Assembly Language 11688Programming" in the same work. 11689 11690* Menu: 11691 11692* MIPS Opts:: Assembler options 11693* MIPS Object:: ECOFF object code 11694* MIPS Stabs:: Directives for debugging information 11695* MIPS ISA:: Directives to override the ISA level 11696* MIPS symbol sizes:: Directives to override the size of symbols 11697* MIPS autoextend:: Directives for extending MIPS 16 bit instructions 11698* MIPS insn:: Directive to mark data as an instruction 11699* MIPS option stack:: Directives to save and restore options 11700* MIPS ASE instruction generation overrides:: Directives to control 11701 generation of MIPS ASE instructions 11702* MIPS floating-point:: Directives to override floating-point options 11703 11704 11705File: as.info, Node: MIPS Opts, Next: MIPS Object, Up: MIPS-Dependent 11706 117079.22.1 Assembler options 11708------------------------ 11709 11710The MIPS configurations of GNU `as' support these special options: 11711 11712`-G NUM' 11713 This option sets the largest size of an object that can be 11714 referenced implicitly with the `gp' register. It is only accepted 11715 for targets that use ECOFF format. The default value is 8. 11716 11717`-EB' 11718`-EL' 11719 Any MIPS configuration of `as' can select big-endian or 11720 little-endian output at run time (unlike the other GNU development 11721 tools, which must be configured for one or the other). Use `-EB' 11722 to select big-endian output, and `-EL' for little-endian. 11723 11724`-KPIC' 11725 Generate SVR4-style PIC. This option tells the assembler to 11726 generate SVR4-style position-independent macro expansions. It 11727 also tells the assembler to mark the output file as PIC. 11728 11729`-mvxworks-pic' 11730 Generate VxWorks PIC. This option tells the assembler to generate 11731 VxWorks-style position-independent macro expansions. 11732 11733`-mips1' 11734`-mips2' 11735`-mips3' 11736`-mips4' 11737`-mips5' 11738`-mips32' 11739`-mips32r2' 11740`-mips64' 11741`-mips64r2' 11742 Generate code for a particular MIPS Instruction Set Architecture 11743 level. `-mips1' corresponds to the R2000 and R3000 processors, 11744 `-mips2' to the R6000 processor, `-mips3' to the R4000 processor, 11745 and `-mips4' to the R8000 and R10000 processors. `-mips5', 11746 `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to 11747 generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64 11748 RELEASE 2 ISA processors, respectively. You can also switch 11749 instruction sets during the assembly; see *Note Directives to 11750 override the ISA level: MIPS ISA. 11751 11752`-mgp32' 11753`-mfp32' 11754 Some macros have different expansions for 32-bit and 64-bit 11755 registers. The register sizes are normally inferred from the ISA 11756 and ABI, but these flags force a certain group of registers to be 11757 treated as 32 bits wide at all times. `-mgp32' controls the size 11758 of general-purpose registers and `-mfp32' controls the size of 11759 floating-point registers. 11760 11761 The `.set gp=32' and `.set fp=32' directives allow the size of 11762 registers to be changed for parts of an object. The default value 11763 is restored by `.set gp=default' and `.set fp=default'. 11764 11765 On some MIPS variants there is a 32-bit mode flag; when this flag 11766 is set, 64-bit instructions generate a trap. Also, some 32-bit 11767 OSes only save the 32-bit registers on a context switch, so it is 11768 essential never to use the 64-bit registers. 11769 11770`-mgp64' 11771`-mfp64' 11772 Assume that 64-bit registers are available. This is provided in 11773 the interests of symmetry with `-mgp32' and `-mfp32'. 11774 11775 The `.set gp=64' and `.set fp=64' directives allow the size of 11776 registers to be changed for parts of an object. The default value 11777 is restored by `.set gp=default' and `.set fp=default'. 11778 11779`-mips16' 11780`-no-mips16' 11781 Generate code for the MIPS 16 processor. This is equivalent to 11782 putting `.set mips16' at the start of the assembly file. 11783 `-no-mips16' turns off this option. 11784 11785`-msmartmips' 11786`-mno-smartmips' 11787 Enables the SmartMIPS extensions to the MIPS32 instruction set, 11788 which provides a number of new instructions which target smartcard 11789 and cryptographic applications. This is equivalent to putting 11790 `.set smartmips' at the start of the assembly file. 11791 `-mno-smartmips' turns off this option. 11792 11793`-mips3d' 11794`-no-mips3d' 11795 Generate code for the MIPS-3D Application Specific Extension. 11796 This tells the assembler to accept MIPS-3D instructions. 11797 `-no-mips3d' turns off this option. 11798 11799`-mdmx' 11800`-no-mdmx' 11801 Generate code for the MDMX Application Specific Extension. This 11802 tells the assembler to accept MDMX instructions. `-no-mdmx' turns 11803 off this option. 11804 11805`-mdsp' 11806`-mno-dsp' 11807 Generate code for the DSP Release 1 Application Specific Extension. 11808 This tells the assembler to accept DSP Release 1 instructions. 11809 `-mno-dsp' turns off this option. 11810 11811`-mdspr2' 11812`-mno-dspr2' 11813 Generate code for the DSP Release 2 Application Specific Extension. 11814 This option implies -mdsp. This tells the assembler to accept DSP 11815 Release 2 instructions. `-mno-dspr2' turns off this option. 11816 11817`-mmt' 11818`-mno-mt' 11819 Generate code for the MT Application Specific Extension. This 11820 tells the assembler to accept MT instructions. `-mno-mt' turns 11821 off this option. 11822 11823`-mfix7000' 11824`-mno-fix7000' 11825 Cause nops to be inserted if the read of the destination register 11826 of an mfhi or mflo instruction occurs in the following two 11827 instructions. 11828 11829`-mfix-vr4120' 11830`-no-mfix-vr4120' 11831 Insert nops to work around certain VR4120 errata. This option is 11832 intended to be used on GCC-generated code: it is not designed to 11833 catch all problems in hand-written assembler code. 11834 11835`-mfix-vr4130' 11836`-no-mfix-vr4130' 11837 Insert nops to work around the VR4130 `mflo'/`mfhi' errata. 11838 11839`-m4010' 11840`-no-m4010' 11841 Generate code for the LSI R4010 chip. This tells the assembler to 11842 accept the R4010 specific instructions (`addciu', `ffc', etc.), 11843 and to not schedule `nop' instructions around accesses to the `HI' 11844 and `LO' registers. `-no-m4010' turns off this option. 11845 11846`-m4650' 11847`-no-m4650' 11848 Generate code for the MIPS R4650 chip. This tells the assembler 11849 to accept the `mad' and `madu' instruction, and to not schedule 11850 `nop' instructions around accesses to the `HI' and `LO' registers. 11851 `-no-m4650' turns off this option. 11852 11853`-m3900' 11854`-no-m3900' 11855`-m4100' 11856`-no-m4100' 11857 For each option `-mNNNN', generate code for the MIPS RNNNN chip. 11858 This tells the assembler to accept instructions specific to that 11859 chip, and to schedule for that chip's hazards. 11860 11861`-march=CPU' 11862 Generate code for a particular MIPS cpu. It is exactly equivalent 11863 to `-mCPU', except that there are more value of CPU understood. 11864 Valid CPU value are: 11865 11866 2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130, 11867 vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231, 11868 rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000, 11869 10000, 12000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem, 4kep, 4ksd, 11870 m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec, 24kef2_1, 11871 24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc, 74kf2_1, 11872 74kf, 74kf1_1, 74kf3_2, 5kc, 5kf, 20kc, 25kf, sb1, sb1a, 11873 loongson2e, loongson2f, octeon 11874 11875 For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms 11876 for `Nf1_1'. These values are deprecated. 11877 11878`-mtune=CPU' 11879 Schedule and tune for a particular MIPS cpu. Valid CPU values are 11880 identical to `-march=CPU'. 11881 11882`-mabi=ABI' 11883 Record which ABI the source code uses. The recognized arguments 11884 are: `32', `n32', `o64', `64' and `eabi'. 11885 11886`-msym32' 11887`-mno-sym32' 11888 Equivalent to adding `.set sym32' or `.set nosym32' to the 11889 beginning of the assembler input. *Note MIPS symbol sizes::. 11890 11891`-nocpp' 11892 This option is ignored. It is accepted for command-line 11893 compatibility with other assemblers, which use it to turn off C 11894 style preprocessing. With GNU `as', there is no need for 11895 `-nocpp', because the GNU assembler itself never runs the C 11896 preprocessor. 11897 11898`-msoft-float' 11899`-mhard-float' 11900 Disable or enable floating-point instructions. Note that by 11901 default floating-point instructions are always allowed even with 11902 CPU targets that don't have support for these instructions. 11903 11904`-msingle-float' 11905`-mdouble-float' 11906 Disable or enable double-precision floating-point operations. Note 11907 that by default double-precision floating-point operations are 11908 always allowed even with CPU targets that don't have support for 11909 these operations. 11910 11911`--construct-floats' 11912`--no-construct-floats' 11913 The `--no-construct-floats' option disables the construction of 11914 double width floating point constants by loading the two halves of 11915 the value into the two single width floating point registers that 11916 make up the double width register. This feature is useful if the 11917 processor support the FR bit in its status register, and this bit 11918 is known (by the programmer) to be set. This bit prevents the 11919 aliasing of the double width register by the single width 11920 registers. 11921 11922 By default `--construct-floats' is selected, allowing construction 11923 of these floating point constants. 11924 11925`--trap' 11926`--no-break' 11927 `as' automatically macro expands certain division and 11928 multiplication instructions to check for overflow and division by 11929 zero. This option causes `as' to generate code to take a trap 11930 exception rather than a break exception when an error is detected. 11931 The trap instructions are only supported at Instruction Set 11932 Architecture level 2 and higher. 11933 11934`--break' 11935`--no-trap' 11936 Generate code to take a break exception rather than a trap 11937 exception when an error is detected. This is the default. 11938 11939`-mpdr' 11940`-mno-pdr' 11941 Control generation of `.pdr' sections. Off by default on IRIX, on 11942 elsewhere. 11943 11944`-mshared' 11945`-mno-shared' 11946 When generating code using the Unix calling conventions (selected 11947 by `-KPIC' or `-mcall_shared'), gas will normally generate code 11948 which can go into a shared library. The `-mno-shared' option 11949 tells gas to generate code which uses the calling convention, but 11950 can not go into a shared library. The resulting code is slightly 11951 more efficient. This option only affects the handling of the 11952 `.cpload' and `.cpsetup' pseudo-ops. 11953 11954 11955File: as.info, Node: MIPS Object, Next: MIPS Stabs, Prev: MIPS Opts, Up: MIPS-Dependent 11956 119579.22.2 MIPS ECOFF object code 11958----------------------------- 11959 11960Assembling for a MIPS ECOFF target supports some additional sections 11961besides the usual `.text', `.data' and `.bss'. The additional sections 11962are `.rdata', used for read-only data, `.sdata', used for small data, 11963and `.sbss', used for small common objects. 11964 11965 When assembling for ECOFF, the assembler uses the `$gp' (`$28') 11966register to form the address of a "small object". Any object in the 11967`.sdata' or `.sbss' sections is considered "small" in this sense. For 11968external objects, or for objects in the `.bss' section, you can use the 11969`gcc' `-G' option to control the size of objects addressed via `$gp'; 11970the default value is 8, meaning that a reference to any object eight 11971bytes or smaller uses `$gp'. Passing `-G 0' to `as' prevents it from 11972using the `$gp' register on the basis of object size (but the assembler 11973uses `$gp' for objects in `.sdata' or `sbss' in any case). The size of 11974an object in the `.bss' section is set by the `.comm' or `.lcomm' 11975directive that defines it. The size of an external object may be set 11976with the `.extern' directive. For example, `.extern sym,4' declares 11977that the object at `sym' is 4 bytes in length, whie leaving `sym' 11978otherwise undefined. 11979 11980 Using small ECOFF objects requires linker support, and assumes that 11981the `$gp' register is correctly initialized (normally done 11982automatically by the startup code). MIPS ECOFF assembly code must not 11983modify the `$gp' register. 11984 11985 11986File: as.info, Node: MIPS Stabs, Next: MIPS ISA, Prev: MIPS Object, Up: MIPS-Dependent 11987 119889.22.3 Directives for debugging information 11989------------------------------------------- 11990 11991MIPS ECOFF `as' supports several directives used for generating 11992debugging information which are not support by traditional MIPS 11993assemblers. These are `.def', `.endef', `.dim', `.file', `.scl', 11994`.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'. 11995The debugging information generated by the three `.stab' directives can 11996only be read by GDB, not by traditional MIPS debuggers (this 11997enhancement is required to fully support C++ debugging). These 11998directives are primarily used by compilers, not assembly language 11999programmers! 12000 12001 12002File: as.info, Node: MIPS symbol sizes, Next: MIPS autoextend, Prev: MIPS ISA, Up: MIPS-Dependent 12003 120049.22.4 Directives to override the size of symbols 12005------------------------------------------------- 12006 12007The n64 ABI allows symbols to have any 64-bit value. Although this 12008provides a great deal of flexibility, it means that some macros have 12009much longer expansions than their 32-bit counterparts. For example, 12010the non-PIC expansion of `dla $4,sym' is usually: 12011 12012 lui $4,%highest(sym) 12013 lui $1,%hi(sym) 12014 daddiu $4,$4,%higher(sym) 12015 daddiu $1,$1,%lo(sym) 12016 dsll32 $4,$4,0 12017 daddu $4,$4,$1 12018 12019 whereas the 32-bit expansion is simply: 12020 12021 lui $4,%hi(sym) 12022 daddiu $4,$4,%lo(sym) 12023 12024 n64 code is sometimes constructed in such a way that all symbolic 12025constants are known to have 32-bit values, and in such cases, it's 12026preferable to use the 32-bit expansion instead of the 64-bit expansion. 12027 12028 You can use the `.set sym32' directive to tell the assembler that, 12029from this point on, all expressions of the form `SYMBOL' or `SYMBOL + 12030OFFSET' have 32-bit values. For example: 12031 12032 .set sym32 12033 dla $4,sym 12034 lw $4,sym+16 12035 sw $4,sym+0x8000($4) 12036 12037 will cause the assembler to treat `sym', `sym+16' and `sym+0x8000' 12038as 32-bit values. The handling of non-symbolic addresses is not 12039affected. 12040 12041 The directive `.set nosym32' ends a `.set sym32' block and reverts 12042to the normal behavior. It is also possible to change the symbol size 12043using the command-line options `-msym32' and `-mno-sym32'. 12044 12045 These options and directives are always accepted, but at present, 12046they have no effect for anything other than n64. 12047 12048 12049File: as.info, Node: MIPS ISA, Next: MIPS symbol sizes, Prev: MIPS Stabs, Up: MIPS-Dependent 12050 120519.22.5 Directives to override the ISA level 12052------------------------------------------- 12053 12054GNU `as' supports an additional directive to change the MIPS 12055Instruction Set Architecture level on the fly: `.set mipsN'. N should 12056be a number from 0 to 5, or 32, 32r2, 64 or 64r2. The values other 12057than 0 make the assembler accept instructions for the corresponding ISA 12058level, from that point on in the assembly. `.set mipsN' affects not 12059only which instructions are permitted, but also how certain macros are 12060expanded. `.set mips0' restores the ISA level to its original level: 12061either the level you selected with command line options, or the default 12062for your configuration. You can use this feature to permit specific 12063MIPS3 instructions while assembling in 32 bit mode. Use this directive 12064with care! 12065 12066 The `.set arch=CPU' directive provides even finer control. It 12067changes the effective CPU target and allows the assembler to use 12068instructions specific to a particular CPU. All CPUs supported by the 12069`-march' command line option are also selectable by this directive. 12070The original value is restored by `.set arch=default'. 12071 12072 The directive `.set mips16' puts the assembler into MIPS 16 mode, in 12073which it will assemble instructions for the MIPS 16 processor. Use 12074`.set nomips16' to return to normal 32 bit mode. 12075 12076 Traditional MIPS assemblers do not support this directive. 12077 12078 12079File: as.info, Node: MIPS autoextend, Next: MIPS insn, Prev: MIPS symbol sizes, Up: MIPS-Dependent 12080 120819.22.6 Directives for extending MIPS 16 bit instructions 12082-------------------------------------------------------- 12083 12084By default, MIPS 16 instructions are automatically extended to 32 bits 12085when necessary. The directive `.set noautoextend' will turn this off. 12086When `.set noautoextend' is in effect, any 32 bit instruction must be 12087explicitly extended with the `.e' modifier (e.g., `li.e $4,1000'). The 12088directive `.set autoextend' may be used to once again automatically 12089extend instructions when necessary. 12090 12091 This directive is only meaningful when in MIPS 16 mode. Traditional 12092MIPS assemblers do not support this directive. 12093 12094 12095File: as.info, Node: MIPS insn, Next: MIPS option stack, Prev: MIPS autoextend, Up: MIPS-Dependent 12096 120979.22.7 Directive to mark data as an instruction 12098----------------------------------------------- 12099 12100The `.insn' directive tells `as' that the following data is actually 12101instructions. This makes a difference in MIPS 16 mode: when loading 12102the address of a label which precedes instructions, `as' automatically 12103adds 1 to the value, so that jumping to the loaded address will do the 12104right thing. 12105 12106 12107File: as.info, Node: MIPS option stack, Next: MIPS ASE instruction generation overrides, Prev: MIPS insn, Up: MIPS-Dependent 12108 121099.22.8 Directives to save and restore options 12110--------------------------------------------- 12111 12112The directives `.set push' and `.set pop' may be used to save and 12113restore the current settings for all the options which are controlled 12114by `.set'. The `.set push' directive saves the current settings on a 12115stack. The `.set pop' directive pops the stack and restores the 12116settings. 12117 12118 These directives can be useful inside an macro which must change an 12119option such as the ISA level or instruction reordering but does not want 12120to change the state of the code which invoked the macro. 12121 12122 Traditional MIPS assemblers do not support these directives. 12123 12124 12125File: as.info, Node: MIPS ASE instruction generation overrides, Next: MIPS floating-point, Prev: MIPS option stack, Up: MIPS-Dependent 12126 121279.22.9 Directives to control generation of MIPS ASE instructions 12128---------------------------------------------------------------- 12129 12130The directive `.set mips3d' makes the assembler accept instructions 12131from the MIPS-3D Application Specific Extension from that point on in 12132the assembly. The `.set nomips3d' directive prevents MIPS-3D 12133instructions from being accepted. 12134 12135 The directive `.set smartmips' makes the assembler accept 12136instructions from the SmartMIPS Application Specific Extension to the 12137MIPS32 ISA from that point on in the assembly. The `.set nosmartmips' 12138directive prevents SmartMIPS instructions from being accepted. 12139 12140 The directive `.set mdmx' makes the assembler accept instructions 12141from the MDMX Application Specific Extension from that point on in the 12142assembly. The `.set nomdmx' directive prevents MDMX instructions from 12143being accepted. 12144 12145 The directive `.set dsp' makes the assembler accept instructions 12146from the DSP Release 1 Application Specific Extension from that point 12147on in the assembly. The `.set nodsp' directive prevents DSP Release 1 12148instructions from being accepted. 12149 12150 The directive `.set dspr2' makes the assembler accept instructions 12151from the DSP Release 2 Application Specific Extension from that point 12152on in the assembly. This dirctive implies `.set dsp'. The `.set 12153nodspr2' directive prevents DSP Release 2 instructions from being 12154accepted. 12155 12156 The directive `.set mt' makes the assembler accept instructions from 12157the MT Application Specific Extension from that point on in the 12158assembly. The `.set nomt' directive prevents MT instructions from 12159being accepted. 12160 12161 Traditional MIPS assemblers do not support these directives. 12162 12163 12164File: as.info, Node: MIPS floating-point, Prev: MIPS ASE instruction generation overrides, Up: MIPS-Dependent 12165 121669.22.10 Directives to override floating-point options 12167----------------------------------------------------- 12168 12169The directives `.set softfloat' and `.set hardfloat' provide finer 12170control of disabling and enabling float-point instructions. These 12171directives always override the default (that hard-float instructions 12172are accepted) or the command-line options (`-msoft-float' and 12173`-mhard-float'). 12174 12175 The directives `.set singlefloat' and `.set doublefloat' provide 12176finer control of disabling and enabling double-precision float-point 12177operations. These directives always override the default (that 12178double-precision operations are accepted) or the command-line options 12179(`-msingle-float' and `-mdouble-float'). 12180 12181 Traditional MIPS assemblers do not support these directives. 12182 12183 12184File: as.info, Node: MMIX-Dependent, Next: MSP430-Dependent, Prev: MIPS-Dependent, Up: Machine Dependencies 12185 121869.23 MMIX Dependent Features 12187============================ 12188 12189* Menu: 12190 12191* MMIX-Opts:: Command-line Options 12192* MMIX-Expand:: Instruction expansion 12193* MMIX-Syntax:: Syntax 12194* MMIX-mmixal:: Differences to `mmixal' syntax and semantics 12195 12196 12197File: as.info, Node: MMIX-Opts, Next: MMIX-Expand, Up: MMIX-Dependent 12198 121999.23.1 Command-line Options 12200--------------------------- 12201 12202The MMIX version of `as' has some machine-dependent options. 12203 12204 When `--fixed-special-register-names' is specified, only the register 12205names specified in *Note MMIX-Regs:: are recognized in the instructions 12206`PUT' and `GET'. 12207 12208 You can use the `--globalize-symbols' to make all symbols global. 12209This option is useful when splitting up a `mmixal' program into several 12210files. 12211 12212 The `--gnu-syntax' turns off most syntax compatibility with 12213`mmixal'. Its usability is currently doubtful. 12214 12215 The `--relax' option is not fully supported, but will eventually make 12216the object file prepared for linker relaxation. 12217 12218 If you want to avoid inadvertently calling a predefined symbol and 12219would rather get an error, for example when using `as' with a compiler 12220or other machine-generated code, specify `--no-predefined-syms'. This 12221turns off built-in predefined definitions of all such symbols, 12222including rounding-mode symbols, segment symbols, `BIT' symbols, and 12223`TRAP' symbols used in `mmix' "system calls". It also turns off 12224predefined special-register names, except when used in `PUT' and `GET' 12225instructions. 12226 12227 By default, some instructions are expanded to fit the size of the 12228operand or an external symbol (*note MMIX-Expand::). By passing 12229`--no-expand', no such expansion will be done, instead causing errors 12230at link time if the operand does not fit. 12231 12232 The `mmixal' documentation (*note mmixsite::) specifies that global 12233registers allocated with the `GREG' directive (*note MMIX-greg::) and 12234initialized to the same non-zero value, will refer to the same global 12235register. This isn't strictly enforceable in `as' since the final 12236addresses aren't known until link-time, but it will do an effort unless 12237the `--no-merge-gregs' option is specified. (Register merging isn't 12238yet implemented in `ld'.) 12239 12240 `as' will warn every time it expands an instruction to fit an 12241operand unless the option `-x' is specified. It is believed that this 12242behaviour is more useful than just mimicking `mmixal''s behaviour, in 12243which instructions are only expanded if the `-x' option is specified, 12244and assembly fails otherwise, when an instruction needs to be expanded. 12245It needs to be kept in mind that `mmixal' is both an assembler and 12246linker, while `as' will expand instructions that at link stage can be 12247contracted. (Though linker relaxation isn't yet implemented in `ld'.) 12248The option `-x' also imples `--linker-allocated-gregs'. 12249 12250 If instruction expansion is enabled, `as' can expand a `PUSHJ' 12251instruction into a series of instructions. The shortest expansion is 12252to not expand it, but just mark the call as redirectable to a stub, 12253which `ld' creates at link-time, but only if the original `PUSHJ' 12254instruction is found not to reach the target. The stub consists of the 12255necessary instructions to form a jump to the target. This happens if 12256`as' can assert that the `PUSHJ' instruction can reach such a stub. 12257The option `--no-pushj-stubs' disables this shorter expansion, and the 12258longer series of instructions is then created at assembly-time. The 12259option `--no-stubs' is a synonym, intended for compatibility with 12260future releases, where generation of stubs for other instructions may 12261be implemented. 12262 12263 Usually a two-operand-expression (*note GREG-base::) without a 12264matching `GREG' directive is treated as an error by `as'. When the 12265option `--linker-allocated-gregs' is in effect, they are instead passed 12266through to the linker, which will allocate as many global registers as 12267is needed. 12268 12269 12270File: as.info, Node: MMIX-Expand, Next: MMIX-Syntax, Prev: MMIX-Opts, Up: MMIX-Dependent 12271 122729.23.2 Instruction expansion 12273---------------------------- 12274 12275When `as' encounters an instruction with an operand that is either not 12276known or does not fit the operand size of the instruction, `as' (and 12277`ld') will expand the instruction into a sequence of instructions 12278semantically equivalent to the operand fitting the instruction. 12279Expansion will take place for the following instructions: 12280 12281`GETA' 12282 Expands to a sequence of four instructions: `SETL', `INCML', 12283 `INCMH' and `INCH'. The operand must be a multiple of four. 12284 12285Conditional branches 12286 A branch instruction is turned into a branch with the complemented 12287 condition and prediction bit over five instructions; four 12288 instructions setting `$255' to the operand value, which like with 12289 `GETA' must be a multiple of four, and a final `GO $255,$255,0'. 12290 12291`PUSHJ' 12292 Similar to expansion for conditional branches; four instructions 12293 set `$255' to the operand value, followed by a `PUSHGO 12294 $255,$255,0'. 12295 12296`JMP' 12297 Similar to conditional branches and `PUSHJ'. The final instruction 12298 is `GO $255,$255,0'. 12299 12300 The linker `ld' is expected to shrink these expansions for code 12301assembled with `--relax' (though not currently implemented). 12302 12303 12304File: as.info, Node: MMIX-Syntax, Next: MMIX-mmixal, Prev: MMIX-Expand, Up: MMIX-Dependent 12305 123069.23.3 Syntax 12307------------- 12308 12309The assembly syntax is supposed to be upward compatible with that 12310described in Sections 1.3 and 1.4 of `The Art of Computer Programming, 12311Volume 1'. Draft versions of those chapters as well as other MMIX 12312information is located at 12313`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'. Most code 12314examples from the mmixal package located there should work unmodified 12315when assembled and linked as single files, with a few noteworthy 12316exceptions (*note MMIX-mmixal::). 12317 12318 Before an instruction is emitted, the current location is aligned to 12319the next four-byte boundary. If a label is defined at the beginning of 12320the line, its value will be the aligned value. 12321 12322 In addition to the traditional hex-prefix `0x', a hexadecimal number 12323can also be specified by the prefix character `#'. 12324 12325 After all operands to an MMIX instruction or directive have been 12326specified, the rest of the line is ignored, treated as a comment. 12327 12328* Menu: 12329 12330* MMIX-Chars:: Special Characters 12331* MMIX-Symbols:: Symbols 12332* MMIX-Regs:: Register Names 12333* MMIX-Pseudos:: Assembler Directives 12334 12335 12336File: as.info, Node: MMIX-Chars, Next: MMIX-Symbols, Up: MMIX-Syntax 12337 123389.23.3.1 Special Characters 12339........................... 12340 12341The characters `*' and `#' are line comment characters; each start a 12342comment at the beginning of a line, but only at the beginning of a 12343line. A `#' prefixes a hexadecimal number if found elsewhere on a line. 12344 12345 Two other characters, `%' and `!', each start a comment anywhere on 12346the line. Thus you can't use the `modulus' and `not' operators in 12347expressions normally associated with these two characters. 12348 12349 A `;' is a line separator, treated as a new-line, so separate 12350instructions can be specified on a single line. 12351 12352 12353File: as.info, Node: MMIX-Symbols, Next: MMIX-Regs, Prev: MMIX-Chars, Up: MMIX-Syntax 12354 123559.23.3.2 Symbols 12356................ 12357 12358The character `:' is permitted in identifiers. There are two 12359exceptions to it being treated as any other symbol character: if a 12360symbol begins with `:', it means that the symbol is in the global 12361namespace and that the current prefix should not be prepended to that 12362symbol (*note MMIX-prefix::). The `:' is then not considered part of 12363the symbol. For a symbol in the label position (first on a line), a `:' 12364at the end of a symbol is silently stripped off. A label is permitted, 12365but not required, to be followed by a `:', as with many other assembly 12366formats. 12367 12368 The character `@' in an expression, is a synonym for `.', the 12369current location. 12370 12371 In addition to the common forward and backward local symbol formats 12372(*note Symbol Names::), they can be specified with upper-case `B' and 12373`F', as in `8B' and `9F'. A local label defined for the current 12374position is written with a `H' appended to the number: 12375 3H LDB $0,$1,2 12376 This and traditional local-label formats cannot be mixed: a label 12377must be defined and referred to using the same format. 12378 12379 There's a minor caveat: just as for the ordinary local symbols, the 12380local symbols are translated into ordinary symbols using control 12381characters are to hide the ordinal number of the symbol. 12382Unfortunately, these symbols are not translated back in error messages. 12383Thus you may see confusing error messages when local symbols are used. 12384Control characters `\003' (control-C) and `\004' (control-D) are used 12385for the MMIX-specific local-symbol syntax. 12386 12387 The symbol `Main' is handled specially; it is always global. 12388 12389 By defining the symbols `__.MMIX.start..text' and 12390`__.MMIX.start..data', the address of respectively the `.text' and 12391`.data' segments of the final program can be defined, though when 12392linking more than one object file, the code or data in the object file 12393containing the symbol is not guaranteed to be start at that position; 12394just the final executable. *Note MMIX-loc::. 12395 12396 12397File: as.info, Node: MMIX-Regs, Next: MMIX-Pseudos, Prev: MMIX-Symbols, Up: MMIX-Syntax 12398 123999.23.3.3 Register names 12400....................... 12401 12402Local and global registers are specified as `$0' to `$255'. The 12403recognized special register names are `rJ', `rA', `rB', `rC', `rD', 12404`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ', 12405`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT', 12406`rWW', `rXX', `rYY' and `rZZ'. A leading `:' is optional for special 12407register names. 12408 12409 Local and global symbols can be equated to register names and used in 12410place of ordinary registers. 12411 12412 Similarly for special registers, local and global symbols can be 12413used. Also, symbols equated from numbers and constant expressions are 12414allowed in place of a special register, except when either of the 12415options `--no-predefined-syms' and `--fixed-special-register-names' are 12416specified. Then only the special register names above are allowed for 12417the instructions having a special register operand; `GET' and `PUT'. 12418 12419 12420File: as.info, Node: MMIX-Pseudos, Prev: MMIX-Regs, Up: MMIX-Syntax 12421 124229.23.3.4 Assembler Directives 12423............................. 12424 12425`LOC' 12426 The `LOC' directive sets the current location to the value of the 12427 operand field, which may include changing sections. If the 12428 operand is a constant, the section is set to either `.data' if the 12429 value is `0x2000000000000000' or larger, else it is set to `.text'. 12430 Within a section, the current location may only be changed to 12431 monotonically higher addresses. A LOC expression must be a 12432 previously defined symbol or a "pure" constant. 12433 12434 An example, which sets the label PREV to the current location, and 12435 updates the current location to eight bytes forward: 12436 prev LOC @+8 12437 12438 When a LOC has a constant as its operand, a symbol 12439 `__.MMIX.start..text' or `__.MMIX.start..data' is defined 12440 depending on the address as mentioned above. Each such symbol is 12441 interpreted as special by the linker, locating the section at that 12442 address. Note that if multiple files are linked, the first object 12443 file with that section will be mapped to that address (not 12444 necessarily the file with the LOC definition). 12445 12446`LOCAL' 12447 Example: 12448 LOCAL external_symbol 12449 LOCAL 42 12450 .local asymbol 12451 12452 This directive-operation generates a link-time assertion that the 12453 operand does not correspond to a global register. The operand is 12454 an expression that at link-time resolves to a register symbol or a 12455 number. A number is treated as the register having that number. 12456 There is one restriction on the use of this directive: the 12457 pseudo-directive must be placed in a section with contents, code 12458 or data. 12459 12460`IS' 12461 The `IS' directive: 12462 asymbol IS an_expression 12463 sets the symbol `asymbol' to `an_expression'. A symbol may not be 12464 set more than once using this directive. Local labels may be set 12465 using this directive, for example: 12466 5H IS @+4 12467 12468`GREG' 12469 This directive reserves a global register, gives it an initial 12470 value and optionally gives it a symbolic name. Some examples: 12471 12472 areg GREG 12473 breg GREG data_value 12474 GREG data_buffer 12475 .greg creg, another_data_value 12476 12477 The symbolic register name can be used in place of a (non-special) 12478 register. If a value isn't provided, it defaults to zero. Unless 12479 the option `--no-merge-gregs' is specified, non-zero registers 12480 allocated with this directive may be eliminated by `as'; another 12481 register with the same value used in its place. Any of the 12482 instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU', 12483 `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW', 12484 `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT', 12485 `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can 12486 have a value nearby an initial value in place of its second and 12487 third operands. Here, "nearby" is defined as within the range 12488 0...255 from the initial value of such an allocated register. 12489 12490 buffer1 BYTE 0,0,0,0,0 12491 buffer2 BYTE 0,0,0,0,0 12492 ... 12493 GREG buffer1 12494 LDOU $42,buffer2 12495 In the example above, the `Y' field of the `LDOUI' instruction 12496 (LDOU with a constant Z) will be replaced with the global register 12497 allocated for `buffer1', and the `Z' field will have the value 5, 12498 the offset from `buffer1' to `buffer2'. The result is equivalent 12499 to this code: 12500 buffer1 BYTE 0,0,0,0,0 12501 buffer2 BYTE 0,0,0,0,0 12502 ... 12503 tmpreg GREG buffer1 12504 LDOU $42,tmpreg,(buffer2-buffer1) 12505 12506 Global registers allocated with this directive are allocated in 12507 order higher-to-lower within a file. Other than that, the exact 12508 order of register allocation and elimination is undefined. For 12509 example, the order is undefined when more than one file with such 12510 directives are linked together. With the options `-x' and 12511 `--linker-allocated-gregs', `GREG' directives for two-operand 12512 cases like the one mentioned above can be omitted. Sufficient 12513 global registers will then be allocated by the linker. 12514 12515`BYTE' 12516 The `BYTE' directive takes a series of operands separated by a 12517 comma. If an operand is a string (*note Strings::), each 12518 character of that string is emitted as a byte. Other operands 12519 must be constant expressions without forward references, in the 12520 range 0...255. If you need operands having expressions with 12521 forward references, use `.byte' (*note Byte::). An operand can be 12522 omitted, defaulting to a zero value. 12523 12524`WYDE' 12525`TETRA' 12526`OCTA' 12527 The directives `WYDE', `TETRA' and `OCTA' emit constants of two, 12528 four and eight bytes size respectively. Before anything else 12529 happens for the directive, the current location is aligned to the 12530 respective constant-size boundary. If a label is defined at the 12531 beginning of the line, its value will be that after the alignment. 12532 A single operand can be omitted, defaulting to a zero value 12533 emitted for the directive. Operands can be expressed as strings 12534 (*note Strings::), in which case each character in the string is 12535 emitted as a separate constant of the size indicated by the 12536 directive. 12537 12538`PREFIX' 12539 The `PREFIX' directive sets a symbol name prefix to be prepended to 12540 all symbols (except local symbols, *note MMIX-Symbols::), that are 12541 not prefixed with `:', until the next `PREFIX' directive. Such 12542 prefixes accumulate. For example, 12543 PREFIX a 12544 PREFIX b 12545 c IS 0 12546 defines a symbol `abc' with the value 0. 12547 12548`BSPEC' 12549`ESPEC' 12550 A pair of `BSPEC' and `ESPEC' directives delimit a section of 12551 special contents (without specified semantics). Example: 12552 BSPEC 42 12553 TETRA 1,2,3 12554 ESPEC 12555 The single operand to `BSPEC' must be number in the range 0...255. 12556 The `BSPEC' number 80 is used by the GNU binutils implementation. 12557 12558 12559File: as.info, Node: MMIX-mmixal, Prev: MMIX-Syntax, Up: MMIX-Dependent 12560 125619.23.4 Differences to `mmixal' 12562------------------------------ 12563 12564The binutils `as' and `ld' combination has a few differences in 12565function compared to `mmixal' (*note mmixsite::). 12566 12567 The replacement of a symbol with a GREG-allocated register (*note 12568GREG-base::) is not handled the exactly same way in `as' as in 12569`mmixal'. This is apparent in the `mmixal' example file `inout.mms', 12570where different registers with different offsets, eventually yielding 12571the same address, are used in the first instruction. This type of 12572difference should however not affect the function of any program unless 12573it has specific assumptions about the allocated register number. 12574 12575 Line numbers (in the `mmo' object format) are currently not 12576supported. 12577 12578 Expression operator precedence is not that of mmixal: operator 12579precedence is that of the C programming language. It's recommended to 12580use parentheses to explicitly specify wanted operator precedence 12581whenever more than one type of operators are used. 12582 12583 The serialize unary operator `&', the fractional division operator 12584`//', the logical not operator `!' and the modulus operator `%' are not 12585available. 12586 12587 Symbols are not global by default, unless the option 12588`--globalize-symbols' is passed. Use the `.global' directive to 12589globalize symbols (*note Global::). 12590 12591 Operand syntax is a bit stricter with `as' than `mmixal'. For 12592example, you can't say `addu 1,2,3', instead you must write `addu 12593$1,$2,3'. 12594 12595 You can't LOC to a lower address than those already visited (i.e., 12596"backwards"). 12597 12598 A LOC directive must come before any emitted code. 12599 12600 Predefined symbols are visible as file-local symbols after use. (In 12601the ELF file, that is--the linked mmo file has no notion of a file-local 12602symbol.) 12603 12604 Some mapping of constant expressions to sections in LOC expressions 12605is attempted, but that functionality is easily confused and should be 12606avoided unless compatibility with `mmixal' is required. A LOC 12607expression to `0x2000000000000000' or higher, maps to the `.data' 12608section and lower addresses map to the `.text' section (*note 12609MMIX-loc::). 12610 12611 The code and data areas are each contiguous. Sparse programs with 12612far-away LOC directives will take up the same amount of space as a 12613contiguous program with zeros filled in the gaps between the LOC 12614directives. If you need sparse programs, you might try and get the 12615wanted effect with a linker script and splitting up the code parts into 12616sections (*note Section::). Assembly code for this, to be compatible 12617with `mmixal', would look something like: 12618 .if 0 12619 LOC away_expression 12620 .else 12621 .section away,"ax" 12622 .fi 12623 `as' will not execute the LOC directive and `mmixal' ignores the 12624lines with `.'. This construct can be used generally to help 12625compatibility. 12626 12627 Symbols can't be defined twice-not even to the same value. 12628 12629 Instruction mnemonics are recognized case-insensitive, though the 12630`IS' and `GREG' pseudo-operations must be specified in upper-case 12631characters. 12632 12633 There's no unicode support. 12634 12635 The following is a list of programs in `mmix.tar.gz', available at 12636`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last 12637checked with the version dated 2001-08-25 (md5sum 12638c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do 12639not assemble with `as': 12640 12641`silly.mms' 12642 LOC to a previous address. 12643 12644`sim.mms' 12645 Redefines symbol `Done'. 12646 12647`test.mms' 12648 Uses the serial operator `&'. 12649 12650 12651File: as.info, Node: MSP430-Dependent, Next: SH-Dependent, Prev: MMIX-Dependent, Up: Machine Dependencies 12652 126539.24 MSP 430 Dependent Features 12654=============================== 12655 12656* Menu: 12657 12658* MSP430 Options:: Options 12659* MSP430 Syntax:: Syntax 12660* MSP430 Floating Point:: Floating Point 12661* MSP430 Directives:: MSP 430 Machine Directives 12662* MSP430 Opcodes:: Opcodes 12663* MSP430 Profiling Capability:: Profiling Capability 12664 12665 12666File: as.info, Node: MSP430 Options, Next: MSP430 Syntax, Up: MSP430-Dependent 12667 126689.24.1 Options 12669-------------- 12670 12671`-m' 12672 select the mpu arch. Currently has no effect. 12673 12674`-mP' 12675 enables polymorph instructions handler. 12676 12677`-mQ' 12678 enables relaxation at assembly time. DANGEROUS! 12679 12680 12681 12682File: as.info, Node: MSP430 Syntax, Next: MSP430 Floating Point, Prev: MSP430 Options, Up: MSP430-Dependent 12683 126849.24.2 Syntax 12685------------- 12686 12687* Menu: 12688 12689* MSP430-Macros:: Macros 12690* MSP430-Chars:: Special Characters 12691* MSP430-Regs:: Register Names 12692* MSP430-Ext:: Assembler Extensions 12693 12694 12695File: as.info, Node: MSP430-Macros, Next: MSP430-Chars, Up: MSP430 Syntax 12696 126979.24.2.1 Macros 12698............... 12699 12700The macro syntax used on the MSP 430 is like that described in the MSP 12701430 Family Assembler Specification. Normal `as' macros should still 12702work. 12703 12704 Additional built-in macros are: 12705 12706`llo(exp)' 12707 Extracts least significant word from 32-bit expression 'exp'. 12708 12709`lhi(exp)' 12710 Extracts most significant word from 32-bit expression 'exp'. 12711 12712`hlo(exp)' 12713 Extracts 3rd word from 64-bit expression 'exp'. 12714 12715`hhi(exp)' 12716 Extracts 4rd word from 64-bit expression 'exp'. 12717 12718 12719 They normally being used as an immediate source operand. 12720 mov #llo(1), r10 ; == mov #1, r10 12721 mov #lhi(1), r10 ; == mov #0, r10 12722 12723 12724File: as.info, Node: MSP430-Chars, Next: MSP430-Regs, Prev: MSP430-Macros, Up: MSP430 Syntax 12725 127269.24.2.2 Special Characters 12727........................... 12728 12729`;' is the line comment character. 12730 12731 The character `$' in jump instructions indicates current location and 12732implemented only for TI syntax compatibility. 12733 12734 12735File: as.info, Node: MSP430-Regs, Next: MSP430-Ext, Prev: MSP430-Chars, Up: MSP430 Syntax 12736 127379.24.2.3 Register Names 12738....................... 12739 12740General-purpose registers are represented by predefined symbols of the 12741form `rN' (for global registers), where N represents a number between 12742`0' and `15'. The leading letters may be in either upper or lower 12743case; for example, `r13' and `R7' are both valid register names. 12744 12745 Register names `PC', `SP' and `SR' cannot be used as register names 12746and will be treated as variables. Use `r0', `r1', and `r2' instead. 12747 12748 12749File: as.info, Node: MSP430-Ext, Prev: MSP430-Regs, Up: MSP430 Syntax 12750 127519.24.2.4 Assembler Extensions 12752............................. 12753 12754`@rN' 12755 As destination operand being treated as `0(rn)' 12756 12757`0(rN)' 12758 As source operand being treated as `@rn' 12759 12760`jCOND +N' 12761 Skips next N bytes followed by jump instruction and equivalent to 12762 `jCOND $+N+2' 12763 12764 12765 Also, there are some instructions, which cannot be found in other 12766assemblers. These are branch instructions, which has different opcodes 12767upon jump distance. They all got PC relative addressing mode. 12768 12769`beq label' 12770 A polymorph instruction which is `jeq label' in case if jump 12771 distance within allowed range for cpu's jump instruction. If not, 12772 this unrolls into a sequence of 12773 jne $+6 12774 br label 12775 12776`bne label' 12777 A polymorph instruction which is `jne label' or `jeq +4; br label' 12778 12779`blt label' 12780 A polymorph instruction which is `jl label' or `jge +4; br label' 12781 12782`bltn label' 12783 A polymorph instruction which is `jn label' or `jn +2; jmp +4; br 12784 label' 12785 12786`bltu label' 12787 A polymorph instruction which is `jlo label' or `jhs +2; br label' 12788 12789`bge label' 12790 A polymorph instruction which is `jge label' or `jl +4; br label' 12791 12792`bgeu label' 12793 A polymorph instruction which is `jhs label' or `jlo +4; br label' 12794 12795`bgt label' 12796 A polymorph instruction which is `jeq +2; jge label' or `jeq +6; 12797 jl +4; br label' 12798 12799`bgtu label' 12800 A polymorph instruction which is `jeq +2; jhs label' or `jeq +6; 12801 jlo +4; br label' 12802 12803`bleu label' 12804 A polymorph instruction which is `jeq label; jlo label' or `jeq 12805 +2; jhs +4; br label' 12806 12807`ble label' 12808 A polymorph instruction which is `jeq label; jl label' or `jeq 12809 +2; jge +4; br label' 12810 12811`jump label' 12812 A polymorph instruction which is `jmp label' or `br label' 12813 12814 12815File: as.info, Node: MSP430 Floating Point, Next: MSP430 Directives, Prev: MSP430 Syntax, Up: MSP430-Dependent 12816 128179.24.3 Floating Point 12818--------------------- 12819 12820The MSP 430 family uses IEEE 32-bit floating-point numbers. 12821 12822 12823File: as.info, Node: MSP430 Directives, Next: MSP430 Opcodes, Prev: MSP430 Floating Point, Up: MSP430-Dependent 12824 128259.24.4 MSP 430 Machine Directives 12826--------------------------------- 12827 12828`.file' 12829 This directive is ignored; it is accepted for compatibility with 12830 other MSP 430 assemblers. 12831 12832 _Warning:_ in other versions of the GNU assembler, `.file' is 12833 used for the directive called `.app-file' in the MSP 430 12834 support. 12835 12836`.line' 12837 This directive is ignored; it is accepted for compatibility with 12838 other MSP 430 assemblers. 12839 12840`.arch' 12841 Currently this directive is ignored; it is accepted for 12842 compatibility with other MSP 430 assemblers. 12843 12844`.profiler' 12845 This directive instructs assembler to add new profile entry to the 12846 object file. 12847 12848 12849 12850File: as.info, Node: MSP430 Opcodes, Next: MSP430 Profiling Capability, Prev: MSP430 Directives, Up: MSP430-Dependent 12851 128529.24.5 Opcodes 12853-------------- 12854 12855`as' implements all the standard MSP 430 opcodes. No additional 12856pseudo-instructions are needed on this family. 12857 12858 For information on the 430 machine instruction set, see `MSP430 12859User's Manual, document slau049d', Texas Instrument, Inc. 12860 12861 12862File: as.info, Node: MSP430 Profiling Capability, Prev: MSP430 Opcodes, Up: MSP430-Dependent 12863 128649.24.6 Profiling Capability 12865--------------------------- 12866 12867It is a performance hit to use gcc's profiling approach for this tiny 12868target. Even more - jtag hardware facility does not perform any 12869profiling functions. However we've got gdb's built-in simulator where 12870we can do anything. 12871 12872 We define new section `.profiler' which holds all profiling 12873information. We define new pseudo operation `.profiler' which will 12874instruct assembler to add new profile entry to the object file. Profile 12875should take place at the present address. 12876 12877 Pseudo operation format: 12878 12879 `.profiler flags,function_to_profile [, cycle_corrector, extra]' 12880 12881 where: 12882 12883 `flags' is a combination of the following characters: 12884 12885 `s' 12886 function entry 12887 12888 `x' 12889 function exit 12890 12891 `i' 12892 function is in init section 12893 12894 `f' 12895 function is in fini section 12896 12897 `l' 12898 library call 12899 12900 `c' 12901 libc standard call 12902 12903 `d' 12904 stack value demand 12905 12906 `I' 12907 interrupt service routine 12908 12909 `P' 12910 prologue start 12911 12912 `p' 12913 prologue end 12914 12915 `E' 12916 epilogue start 12917 12918 `e' 12919 epilogue end 12920 12921 `j' 12922 long jump / sjlj unwind 12923 12924 `a' 12925 an arbitrary code fragment 12926 12927 `t' 12928 extra parameter saved (a constant value like frame size) 12929 12930`function_to_profile' 12931 a function address 12932 12933`cycle_corrector' 12934 a value which should be added to the cycle counter, zero if 12935 omitted. 12936 12937`extra' 12938 any extra parameter, zero if omitted. 12939 12940 12941 For example: 12942 .global fxx 12943 .type fxx,@function 12944 fxx: 12945 .LFrameOffset_fxx=0x08 12946 .profiler "scdP", fxx ; function entry. 12947 ; we also demand stack value to be saved 12948 push r11 12949 push r10 12950 push r9 12951 push r8 12952 .profiler "cdpt",fxx,0, .LFrameOffset_fxx ; check stack value at this point 12953 ; (this is a prologue end) 12954 ; note, that spare var filled with 12955 ; the farme size 12956 mov r15,r8 12957 ... 12958 .profiler cdE,fxx ; check stack 12959 pop r8 12960 pop r9 12961 pop r10 12962 pop r11 12963 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter 12964 ret ; cause 'ret' insn takes 3 cycles 12965 12966 12967File: as.info, Node: PDP-11-Dependent, Next: PJ-Dependent, Prev: SH64-Dependent, Up: Machine Dependencies 12968 129699.25 PDP-11 Dependent Features 12970============================== 12971 12972* Menu: 12973 12974* PDP-11-Options:: Options 12975* PDP-11-Pseudos:: Assembler Directives 12976* PDP-11-Syntax:: DEC Syntax versus BSD Syntax 12977* PDP-11-Mnemonics:: Instruction Naming 12978* PDP-11-Synthetic:: Synthetic Instructions 12979 12980 12981File: as.info, Node: PDP-11-Options, Next: PDP-11-Pseudos, Up: PDP-11-Dependent 12982 129839.25.1 Options 12984-------------- 12985 12986The PDP-11 version of `as' has a rich set of machine dependent options. 12987 129889.25.1.1 Code Generation Options 12989................................ 12990 12991`-mpic | -mno-pic' 12992 Generate position-independent (or position-dependent) code. 12993 12994 The default is to generate position-independent code. 12995 129969.25.1.2 Instruction Set Extension Options 12997.......................................... 12998 12999These options enables or disables the use of extensions over the base 13000line instruction set as introduced by the first PDP-11 CPU: the KA11. 13001Most options come in two variants: a `-m'EXTENSION that enables 13002EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION. 13003 13004 The default is to enable all extensions. 13005 13006`-mall | -mall-extensions' 13007 Enable all instruction set extensions. 13008 13009`-mno-extensions' 13010 Disable all instruction set extensions. 13011 13012`-mcis | -mno-cis' 13013 Enable (or disable) the use of the commercial instruction set, 13014 which consists of these instructions: `ADDNI', `ADDN', `ADDPI', 13015 `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC', 13016 `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI', 13017 `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL', 13018 `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI', 13019 `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC', 13020 `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI', 13021 `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'. 13022 13023`-mcsm | -mno-csm' 13024 Enable (or disable) the use of the `CSM' instruction. 13025 13026`-meis | -mno-eis' 13027 Enable (or disable) the use of the extended instruction set, which 13028 consists of these instructions: `ASHC', `ASH', `DIV', `MARK', 13029 `MUL', `RTT', `SOB' `SXT', and `XOR'. 13030 13031`-mfis | -mkev11' 13032`-mno-fis | -mno-kev11' 13033 Enable (or disable) the use of the KEV11 floating-point 13034 instructions: `FADD', `FDIV', `FMUL', and `FSUB'. 13035 13036`-mfpp | -mfpu | -mfp-11' 13037`-mno-fpp | -mno-fpu | -mno-fp-11' 13038 Enable (or disable) the use of FP-11 floating-point instructions: 13039 `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF', 13040 `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF', 13041 `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST', 13042 `SUBF', and `TSTF'. 13043 13044`-mlimited-eis | -mno-limited-eis' 13045 Enable (or disable) the use of the limited extended instruction 13046 set: `MARK', `RTT', `SOB', `SXT', and `XOR'. 13047 13048 The -mno-limited-eis options also implies -mno-eis. 13049 13050`-mmfpt | -mno-mfpt' 13051 Enable (or disable) the use of the `MFPT' instruction. 13052 13053`-mmultiproc | -mno-multiproc' 13054 Enable (or disable) the use of multiprocessor instructions: 13055 `TSTSET' and `WRTLCK'. 13056 13057`-mmxps | -mno-mxps' 13058 Enable (or disable) the use of the `MFPS' and `MTPS' instructions. 13059 13060`-mspl | -mno-spl' 13061 Enable (or disable) the use of the `SPL' instruction. 13062 13063 Enable (or disable) the use of the microcode instructions: `LDUB', 13064 `MED', and `XFC'. 13065 130669.25.1.3 CPU Model Options 13067.......................... 13068 13069These options enable the instruction set extensions supported by a 13070particular CPU, and disables all other extensions. 13071 13072`-mka11' 13073 KA11 CPU. Base line instruction set only. 13074 13075`-mkb11' 13076 KB11 CPU. Enable extended instruction set and `SPL'. 13077 13078`-mkd11a' 13079 KD11-A CPU. Enable limited extended instruction set. 13080 13081`-mkd11b' 13082 KD11-B CPU. Base line instruction set only. 13083 13084`-mkd11d' 13085 KD11-D CPU. Base line instruction set only. 13086 13087`-mkd11e' 13088 KD11-E CPU. Enable extended instruction set, `MFPS', and `MTPS'. 13089 13090`-mkd11f | -mkd11h | -mkd11q' 13091 KD11-F, KD11-H, or KD11-Q CPU. Enable limited extended 13092 instruction set, `MFPS', and `MTPS'. 13093 13094`-mkd11k' 13095 KD11-K CPU. Enable extended instruction set, `LDUB', `MED', 13096 `MFPS', `MFPT', `MTPS', and `XFC'. 13097 13098`-mkd11z' 13099 KD11-Z CPU. Enable extended instruction set, `CSM', `MFPS', 13100 `MFPT', `MTPS', and `SPL'. 13101 13102`-mf11' 13103 F11 CPU. Enable extended instruction set, `MFPS', `MFPT', and 13104 `MTPS'. 13105 13106`-mj11' 13107 J11 CPU. Enable extended instruction set, `CSM', `MFPS', `MFPT', 13108 `MTPS', `SPL', `TSTSET', and `WRTLCK'. 13109 13110`-mt11' 13111 T11 CPU. Enable limited extended instruction set, `MFPS', and 13112 `MTPS'. 13113 131149.25.1.4 Machine Model Options 13115.............................. 13116 13117These options enable the instruction set extensions supported by a 13118particular machine model, and disables all other extensions. 13119 13120`-m11/03' 13121 Same as `-mkd11f'. 13122 13123`-m11/04' 13124 Same as `-mkd11d'. 13125 13126`-m11/05 | -m11/10' 13127 Same as `-mkd11b'. 13128 13129`-m11/15 | -m11/20' 13130 Same as `-mka11'. 13131 13132`-m11/21' 13133 Same as `-mt11'. 13134 13135`-m11/23 | -m11/24' 13136 Same as `-mf11'. 13137 13138`-m11/34' 13139 Same as `-mkd11e'. 13140 13141`-m11/34a' 13142 Ame as `-mkd11e' `-mfpp'. 13143 13144`-m11/35 | -m11/40' 13145 Same as `-mkd11a'. 13146 13147`-m11/44' 13148 Same as `-mkd11z'. 13149 13150`-m11/45 | -m11/50 | -m11/55 | -m11/70' 13151 Same as `-mkb11'. 13152 13153`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94' 13154 Same as `-mj11'. 13155 13156`-m11/60' 13157 Same as `-mkd11k'. 13158 13159 13160File: as.info, Node: PDP-11-Pseudos, Next: PDP-11-Syntax, Prev: PDP-11-Options, Up: PDP-11-Dependent 13161 131629.25.2 Assembler Directives 13163--------------------------- 13164 13165The PDP-11 version of `as' has a few machine dependent assembler 13166directives. 13167 13168`.bss' 13169 Switch to the `bss' section. 13170 13171`.even' 13172 Align the location counter to an even number. 13173 13174 13175File: as.info, Node: PDP-11-Syntax, Next: PDP-11-Mnemonics, Prev: PDP-11-Pseudos, Up: PDP-11-Dependent 13176 131779.25.3 PDP-11 Assembly Language Syntax 13178-------------------------------------- 13179 13180`as' supports both DEC syntax and BSD syntax. The only difference is 13181that in DEC syntax, a `#' character is used to denote an immediate 13182constants, while in BSD syntax the character for this purpose is `$'. 13183 13184 general-purpose registers are named `r0' through `r7'. Mnemonic 13185alternatives for `r6' and `r7' are `sp' and `pc', respectively. 13186 13187 Floating-point registers are named `ac0' through `ac3', or 13188alternatively `fr0' through `fr3'. 13189 13190 Comments are started with a `#' or a `/' character, and extend to 13191the end of the line. (FIXME: clash with immediates?) 13192 13193 13194File: as.info, Node: PDP-11-Mnemonics, Next: PDP-11-Synthetic, Prev: PDP-11-Syntax, Up: PDP-11-Dependent 13195 131969.25.4 Instruction Naming 13197------------------------- 13198 13199Some instructions have alternative names. 13200 13201`BCC' 13202 `BHIS' 13203 13204`BCS' 13205 `BLO' 13206 13207`L2DR' 13208 `L2D' 13209 13210`L3DR' 13211 `L3D' 13212 13213`SYS' 13214 `TRAP' 13215 13216 13217File: as.info, Node: PDP-11-Synthetic, Prev: PDP-11-Mnemonics, Up: PDP-11-Dependent 13218 132199.25.5 Synthetic Instructions 13220----------------------------- 13221 13222The `JBR' and `J'CC synthetic instructions are not supported yet. 13223 13224 13225File: as.info, Node: PJ-Dependent, Next: PPC-Dependent, Prev: PDP-11-Dependent, Up: Machine Dependencies 13226 132279.26 picoJava Dependent Features 13228================================ 13229 13230* Menu: 13231 13232* PJ Options:: Options 13233 13234 13235File: as.info, Node: PJ Options, Up: PJ-Dependent 13236 132379.26.1 Options 13238-------------- 13239 13240`as' has two additional command-line options for the picoJava 13241architecture. 13242`-ml' 13243 This option selects little endian data output. 13244 13245`-mb' 13246 This option selects big endian data output. 13247 13248 13249File: as.info, Node: PPC-Dependent, Next: Sparc-Dependent, Prev: PJ-Dependent, Up: Machine Dependencies 13250 132519.27 PowerPC Dependent Features 13252=============================== 13253 13254* Menu: 13255 13256* PowerPC-Opts:: Options 13257* PowerPC-Pseudo:: PowerPC Assembler Directives 13258 13259 13260File: as.info, Node: PowerPC-Opts, Next: PowerPC-Pseudo, Up: PPC-Dependent 13261 132629.27.1 Options 13263-------------- 13264 13265The PowerPC chip family includes several successive levels, using the 13266same core instruction set, but including a few additional instructions 13267at each level. There are exceptions to this however. For details on 13268what instructions each variant supports, please see the chip's 13269architecture reference manual. 13270 13271 The following table lists all available PowerPC options. 13272 13273`-mpwrx | -mpwr2' 13274 Generate code for POWER/2 (RIOS2). 13275 13276`-mpwr' 13277 Generate code for POWER (RIOS1) 13278 13279`-m601' 13280 Generate code for PowerPC 601. 13281 13282`-mppc, -mppc32, -m603, -m604' 13283 Generate code for PowerPC 603/604. 13284 13285`-m403, -m405' 13286 Generate code for PowerPC 403/405. 13287 13288`-m440' 13289 Generate code for PowerPC 440. BookE and some 405 instructions. 13290 13291`-m7400, -m7410, -m7450, -m7455' 13292 Generate code for PowerPC 7400/7410/7450/7455. 13293 13294`-m750cl' 13295 Generate code for PowerPC 750CL. 13296 13297`-mppc64, -m620' 13298 Generate code for PowerPC 620/625/630. 13299 13300`-me500, -me500x2' 13301 Generate code for Motorola e500 core complex. 13302 13303`-mspe' 13304 Generate code for Motorola SPE instructions. 13305 13306`-mppc64bridge' 13307 Generate code for PowerPC 64, including bridge insns. 13308 13309`-mbooke' 13310 Generate code for 32-bit BookE. 13311 13312`-me300' 13313 Generate code for PowerPC e300 family. 13314 13315`-maltivec' 13316 Generate code for processors with AltiVec instructions. 13317 13318`-mvsx' 13319 Generate code for processors with Vector-Scalar (VSX) instructions. 13320 13321`-mpower4' 13322 Generate code for Power4 architecture. 13323 13324`-mpower5' 13325 Generate code for Power5 architecture. 13326 13327`-mpower6' 13328 Generate code for Power6 architecture. 13329 13330`-mpower7' 13331 Generate code for Power7 architecture. 13332 13333`-mcell' 13334 Generate code for Cell Broadband Engine architecture. 13335 13336`-mcom' 13337 Generate code Power/PowerPC common instructions. 13338 13339`-many' 13340 Generate code for any architecture (PWR/PWRX/PPC). 13341 13342`-mregnames' 13343 Allow symbolic names for registers. 13344 13345`-mno-regnames' 13346 Do not allow symbolic names for registers. 13347 13348`-mrelocatable' 13349 Support for GCC's -mrelocatable option. 13350 13351`-mrelocatable-lib' 13352 Support for GCC's -mrelocatable-lib option. 13353 13354`-memb' 13355 Set PPC_EMB bit in ELF flags. 13356 13357`-mlittle, -mlittle-endian' 13358 Generate code for a little endian machine. 13359 13360`-mbig, -mbig-endian' 13361 Generate code for a big endian machine. 13362 13363`-msolaris' 13364 Generate code for Solaris. 13365 13366`-mno-solaris' 13367 Do not generate code for Solaris. 13368 13369 13370File: as.info, Node: PowerPC-Pseudo, Prev: PowerPC-Opts, Up: PPC-Dependent 13371 133729.27.2 PowerPC Assembler Directives 13373----------------------------------- 13374 13375A number of assembler directives are available for PowerPC. The 13376following table is far from complete. 13377 13378`.machine "string"' 13379 This directive allows you to change the machine for which code is 13380 generated. `"string"' may be any of the -m cpu selection options 13381 (without the -m) enclosed in double quotes, `"push"', or `"pop"'. 13382 `.machine "push"' saves the currently selected cpu, which may be 13383 restored with `.machine "pop"'. 13384 13385 13386File: as.info, Node: SH-Dependent, Next: SH64-Dependent, Prev: MSP430-Dependent, Up: Machine Dependencies 13387 133889.28 Renesas / SuperH SH Dependent Features 13389=========================================== 13390 13391* Menu: 13392 13393* SH Options:: Options 13394* SH Syntax:: Syntax 13395* SH Floating Point:: Floating Point 13396* SH Directives:: SH Machine Directives 13397* SH Opcodes:: Opcodes 13398 13399 13400File: as.info, Node: SH Options, Next: SH Syntax, Up: SH-Dependent 13401 134029.28.1 Options 13403-------------- 13404 13405`as' has following command-line options for the Renesas (formerly 13406Hitachi) / SuperH SH family. 13407 13408`--little' 13409 Generate little endian code. 13410 13411`--big' 13412 Generate big endian code. 13413 13414`--relax' 13415 Alter jump instructions for long displacements. 13416 13417`--small' 13418 Align sections to 4 byte boundaries, not 16. 13419 13420`--dsp' 13421 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13422 13423`--renesas' 13424 Disable optimization with section symbol for compatibility with 13425 Renesas assembler. 13426 13427`--allow-reg-prefix' 13428 Allow '$' as a register name prefix. 13429 13430`--isa=sh4 | sh4a' 13431 Specify the sh4 or sh4a instruction set. 13432 13433`--isa=dsp' 13434 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13435 13436`--isa=fp' 13437 Enable sh2e, sh3e, sh4, and sh4a insn sets. 13438 13439`--isa=all' 13440 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 13441 13442`-h-tick-hex' 13443 Support H'00 style hex constants in addition to 0x00 style. 13444 13445 13446 13447File: as.info, Node: SH Syntax, Next: SH Floating Point, Prev: SH Options, Up: SH-Dependent 13448 134499.28.2 Syntax 13450------------- 13451 13452* Menu: 13453 13454* SH-Chars:: Special Characters 13455* SH-Regs:: Register Names 13456* SH-Addressing:: Addressing Modes 13457 13458 13459File: as.info, Node: SH-Chars, Next: SH-Regs, Up: SH Syntax 13460 134619.28.2.1 Special Characters 13462........................... 13463 13464`!' is the line comment character. 13465 13466 You can use `;' instead of a newline to separate statements. 13467 13468 Since `$' has no special meaning, you may use it in symbol names. 13469 13470 13471File: as.info, Node: SH-Regs, Next: SH-Addressing, Prev: SH-Chars, Up: SH Syntax 13472 134739.28.2.2 Register Names 13474....................... 13475 13476You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5', 13477`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to 13478refer to the SH registers. 13479 13480 The SH also has these control registers: 13481 13482`pr' 13483 procedure register (holds return address) 13484 13485`pc' 13486 program counter 13487 13488`mach' 13489`macl' 13490 high and low multiply accumulator registers 13491 13492`sr' 13493 status register 13494 13495`gbr' 13496 global base register 13497 13498`vbr' 13499 vector base register (for interrupt vectors) 13500 13501 13502File: as.info, Node: SH-Addressing, Prev: SH-Regs, Up: SH Syntax 13503 135049.28.2.3 Addressing Modes 13505......................... 13506 13507`as' understands the following addressing modes for the SH. `RN' in 13508the following refers to any of the numbered registers, but _not_ the 13509control registers. 13510 13511`RN' 13512 Register direct 13513 13514`@RN' 13515 Register indirect 13516 13517`@-RN' 13518 Register indirect with pre-decrement 13519 13520`@RN+' 13521 Register indirect with post-increment 13522 13523`@(DISP, RN)' 13524 Register indirect with displacement 13525 13526`@(R0, RN)' 13527 Register indexed 13528 13529`@(DISP, GBR)' 13530 `GBR' offset 13531 13532`@(R0, GBR)' 13533 GBR indexed 13534 13535`ADDR' 13536`@(DISP, PC)' 13537 PC relative address (for branch or for addressing memory). The 13538 `as' implementation allows you to use the simpler form ADDR 13539 anywhere a PC relative address is called for; the alternate form 13540 is supported for compatibility with other assemblers. 13541 13542`#IMM' 13543 Immediate data 13544 13545 13546File: as.info, Node: SH Floating Point, Next: SH Directives, Prev: SH Syntax, Up: SH-Dependent 13547 135489.28.3 Floating Point 13549--------------------- 13550 13551SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other 13552SH groups can use `.float' directive to generate IEEE floating-point 13553numbers. 13554 13555 SH2E and SH3E support single-precision floating point calculations as 13556well as entirely PCAPI compatible emulation of double-precision 13557floating point calculations. SH2E and SH3E instructions are a subset of 13558the floating point calculations conforming to the IEEE754 standard. 13559 13560 In addition to single-precision and double-precision floating-point 13561operation capability, the on-chip FPU of SH4 has a 128-bit graphic 13562engine that enables 32-bit floating-point data to be processed 128 bits 13563at a time. It also supports 4 * 4 array operations and inner product 13564operations. Also, a superscalar architecture is employed that enables 13565simultaneous execution of two instructions (including FPU 13566instructions), providing performance of up to twice that of 13567conventional architectures at the same frequency. 13568 13569 13570File: as.info, Node: SH Directives, Next: SH Opcodes, Prev: SH Floating Point, Up: SH-Dependent 13571 135729.28.4 SH Machine Directives 13573---------------------------- 13574 13575`uaword' 13576`ualong' 13577 `as' will issue a warning when a misaligned `.word' or `.long' 13578 directive is used. You may use `.uaword' or `.ualong' to indicate 13579 that the value is intentionally misaligned. 13580 13581 13582File: as.info, Node: SH Opcodes, Prev: SH Directives, Up: SH-Dependent 13583 135849.28.5 Opcodes 13585-------------- 13586 13587For detailed information on the SH machine instruction set, see 13588`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core 13589Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH). 13590 13591 `as' implements all the standard SH opcodes. No additional 13592pseudo-instructions are needed on this family. Note, however, that 13593because `as' supports a simpler form of PC-relative addressing, you may 13594simply write (for example) 13595 13596 mov.l bar,r0 13597 13598where other assemblers might require an explicit displacement to `bar' 13599from the program counter: 13600 13601 mov.l @(DISP, PC) 13602 13603 Here is a summary of SH opcodes: 13604 13605 Legend: 13606 Rn a numbered register 13607 Rm another numbered register 13608 #imm immediate data 13609 disp displacement 13610 disp8 8-bit displacement 13611 disp12 12-bit displacement 13612 13613 add #imm,Rn lds.l @Rn+,PR 13614 add Rm,Rn mac.w @Rm+,@Rn+ 13615 addc Rm,Rn mov #imm,Rn 13616 addv Rm,Rn mov Rm,Rn 13617 and #imm,R0 mov.b Rm,@(R0,Rn) 13618 and Rm,Rn mov.b Rm,@-Rn 13619 and.b #imm,@(R0,GBR) mov.b Rm,@Rn 13620 bf disp8 mov.b @(disp,Rm),R0 13621 bra disp12 mov.b @(disp,GBR),R0 13622 bsr disp12 mov.b @(R0,Rm),Rn 13623 bt disp8 mov.b @Rm+,Rn 13624 clrmac mov.b @Rm,Rn 13625 clrt mov.b R0,@(disp,Rm) 13626 cmp/eq #imm,R0 mov.b R0,@(disp,GBR) 13627 cmp/eq Rm,Rn mov.l Rm,@(disp,Rn) 13628 cmp/ge Rm,Rn mov.l Rm,@(R0,Rn) 13629 cmp/gt Rm,Rn mov.l Rm,@-Rn 13630 cmp/hi Rm,Rn mov.l Rm,@Rn 13631 cmp/hs Rm,Rn mov.l @(disp,Rn),Rm 13632 cmp/pl Rn mov.l @(disp,GBR),R0 13633 cmp/pz Rn mov.l @(disp,PC),Rn 13634 cmp/str Rm,Rn mov.l @(R0,Rm),Rn 13635 div0s Rm,Rn mov.l @Rm+,Rn 13636 div0u mov.l @Rm,Rn 13637 div1 Rm,Rn mov.l R0,@(disp,GBR) 13638 exts.b Rm,Rn mov.w Rm,@(R0,Rn) 13639 exts.w Rm,Rn mov.w Rm,@-Rn 13640 extu.b Rm,Rn mov.w Rm,@Rn 13641 extu.w Rm,Rn mov.w @(disp,Rm),R0 13642 jmp @Rn mov.w @(disp,GBR),R0 13643 jsr @Rn mov.w @(disp,PC),Rn 13644 ldc Rn,GBR mov.w @(R0,Rm),Rn 13645 ldc Rn,SR mov.w @Rm+,Rn 13646 ldc Rn,VBR mov.w @Rm,Rn 13647 ldc.l @Rn+,GBR mov.w R0,@(disp,Rm) 13648 ldc.l @Rn+,SR mov.w R0,@(disp,GBR) 13649 ldc.l @Rn+,VBR mova @(disp,PC),R0 13650 lds Rn,MACH movt Rn 13651 lds Rn,MACL muls Rm,Rn 13652 lds Rn,PR mulu Rm,Rn 13653 lds.l @Rn+,MACH neg Rm,Rn 13654 lds.l @Rn+,MACL negc Rm,Rn 13655 13656 nop stc VBR,Rn 13657 not Rm,Rn stc.l GBR,@-Rn 13658 or #imm,R0 stc.l SR,@-Rn 13659 or Rm,Rn stc.l VBR,@-Rn 13660 or.b #imm,@(R0,GBR) sts MACH,Rn 13661 rotcl Rn sts MACL,Rn 13662 rotcr Rn sts PR,Rn 13663 rotl Rn sts.l MACH,@-Rn 13664 rotr Rn sts.l MACL,@-Rn 13665 rte sts.l PR,@-Rn 13666 rts sub Rm,Rn 13667 sett subc Rm,Rn 13668 shal Rn subv Rm,Rn 13669 shar Rn swap.b Rm,Rn 13670 shll Rn swap.w Rm,Rn 13671 shll16 Rn tas.b @Rn 13672 shll2 Rn trapa #imm 13673 shll8 Rn tst #imm,R0 13674 shlr Rn tst Rm,Rn 13675 shlr16 Rn tst.b #imm,@(R0,GBR) 13676 shlr2 Rn xor #imm,R0 13677 shlr8 Rn xor Rm,Rn 13678 sleep xor.b #imm,@(R0,GBR) 13679 stc GBR,Rn xtrct Rm,Rn 13680 stc SR,Rn 13681 13682 13683File: as.info, Node: SH64-Dependent, Next: PDP-11-Dependent, Prev: SH-Dependent, Up: Machine Dependencies 13684 136859.29 SuperH SH64 Dependent Features 13686=================================== 13687 13688* Menu: 13689 13690* SH64 Options:: Options 13691* SH64 Syntax:: Syntax 13692* SH64 Directives:: SH64 Machine Directives 13693* SH64 Opcodes:: Opcodes 13694 13695 13696File: as.info, Node: SH64 Options, Next: SH64 Syntax, Up: SH64-Dependent 13697 136989.29.1 Options 13699-------------- 13700 13701`-isa=sh4 | sh4a' 13702 Specify the sh4 or sh4a instruction set. 13703 13704`-isa=dsp' 13705 Enable sh-dsp insns, and disable sh3e / sh4 insns. 13706 13707`-isa=fp' 13708 Enable sh2e, sh3e, sh4, and sh4a insn sets. 13709 13710`-isa=all' 13711 Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets. 13712 13713`-isa=shmedia | -isa=shcompact' 13714 Specify the default instruction set. `SHmedia' specifies the 13715 32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes 13716 compatible with previous SH families. The default depends on the 13717 ABI selected; the default for the 64-bit ABI is SHmedia, and the 13718 default for the 32-bit ABI is SHcompact. If neither the ABI nor 13719 the ISA is specified, the default is 32-bit SHcompact. 13720 13721 Note that the `.mode' pseudo-op is not permitted if the ISA is not 13722 specified on the command line. 13723 13724`-abi=32 | -abi=64' 13725 Specify the default ABI. If the ISA is specified and the ABI is 13726 not, the default ABI depends on the ISA, with SHmedia defaulting 13727 to 64-bit and SHcompact defaulting to 32-bit. 13728 13729 Note that the `.abi' pseudo-op is not permitted if the ABI is not 13730 specified on the command line. When the ABI is specified on the 13731 command line, any `.abi' pseudo-ops in the source must match it. 13732 13733`-shcompact-const-crange' 13734 Emit code-range descriptors for constants in SHcompact code 13735 sections. 13736 13737`-no-mix' 13738 Disallow SHmedia code in the same section as constants and 13739 SHcompact code. 13740 13741`-no-expand' 13742 Do not expand MOVI, PT, PTA or PTB instructions. 13743 13744`-expand-pt32' 13745 With -abi=64, expand PT, PTA and PTB instructions to 32 bits only. 13746 13747`-h-tick-hex' 13748 Support H'00 style hex constants in addition to 0x00 style. 13749 13750 13751 13752File: as.info, Node: SH64 Syntax, Next: SH64 Directives, Prev: SH64 Options, Up: SH64-Dependent 13753 137549.29.2 Syntax 13755------------- 13756 13757* Menu: 13758 13759* SH64-Chars:: Special Characters 13760* SH64-Regs:: Register Names 13761* SH64-Addressing:: Addressing Modes 13762 13763 13764File: as.info, Node: SH64-Chars, Next: SH64-Regs, Up: SH64 Syntax 13765 137669.29.2.1 Special Characters 13767........................... 13768 13769`!' is the line comment character. 13770 13771 You can use `;' instead of a newline to separate statements. 13772 13773 Since `$' has no special meaning, you may use it in symbol names. 13774 13775 13776File: as.info, Node: SH64-Regs, Next: SH64-Addressing, Prev: SH64-Chars, Up: SH64 Syntax 13777 137789.29.2.2 Register Names 13779....................... 13780 13781You can use the predefined symbols `r0' through `r63' to refer to the 13782SH64 general registers, `cr0' through `cr63' for control registers, 13783`tr0' through `tr7' for target address registers, `fr0' through `fr63' 13784for single-precision floating point registers, `dr0' through `dr62' 13785(even numbered registers only) for double-precision floating point 13786registers, `fv0' through `fv60' (multiples of four only) for 13787single-precision floating point vectors, `fp0' through `fp62' (even 13788numbered registers only) for single-precision floating point pairs, 13789`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of 13790single-precision floating point registers, `pc' for the program 13791counter, and `fpscr' for the floating point status and control register. 13792 13793 You can also refer to the control registers by the mnemonics `sr', 13794`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc', 13795`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'. 13796 13797 13798File: as.info, Node: SH64-Addressing, Prev: SH64-Regs, Up: SH64 Syntax 13799 138009.29.2.3 Addressing Modes 13801......................... 13802 13803SH64 operands consist of either a register or immediate value. The 13804immediate value can be a constant or label reference (or portion of a 13805label reference), as in this example: 13806 13807 movi 4,r2 13808 pt function, tr4 13809 movi (function >> 16) & 65535,r0 13810 shori function & 65535, r0 13811 ld.l r0,4,r0 13812 13813 Instruction label references can reference labels in either SHmedia 13814or SHcompact. To differentiate between the two, labels in SHmedia 13815sections will always have the least significant bit set (i.e. they will 13816be odd), which SHcompact labels will have the least significant bit 13817reset (i.e. they will be even). If you need to reference the actual 13818address of a label, you can use the `datalabel' modifier, as in this 13819example: 13820 13821 .long function 13822 .long datalabel function 13823 13824 In that example, the first longword may or may not have the least 13825significant bit set depending on whether the label is an SHmedia label 13826or an SHcompact label. The second longword will be the actual address 13827of the label, regardless of what type of label it is. 13828 13829 13830File: as.info, Node: SH64 Directives, Next: SH64 Opcodes, Prev: SH64 Syntax, Up: SH64-Dependent 13831 138329.29.3 SH64 Machine Directives 13833------------------------------ 13834 13835In addition to the SH directives, the SH64 provides the following 13836directives: 13837 13838`.mode [shmedia|shcompact]' 13839`.isa [shmedia|shcompact]' 13840 Specify the ISA for the following instructions (the two directives 13841 are equivalent). Note that programs such as `objdump' rely on 13842 symbolic labels to determine when such mode switches occur (by 13843 checking the least significant bit of the label's address), so 13844 such mode/isa changes should always be followed by a label (in 13845 practice, this is true anyway). Note that you cannot use these 13846 directives if you didn't specify an ISA on the command line. 13847 13848`.abi [32|64]' 13849 Specify the ABI for the following instructions. Note that you 13850 cannot use this directive unless you specified an ABI on the 13851 command line, and the ABIs specified must match. 13852 13853`.uaquad' 13854 Like .uaword and .ualong, this allows you to specify an 13855 intentionally unaligned quadword (64 bit word). 13856 13857 13858 13859File: as.info, Node: SH64 Opcodes, Prev: SH64 Directives, Up: SH64-Dependent 13860 138619.29.4 Opcodes 13862-------------- 13863 13864For detailed information on the SH64 machine instruction set, see 13865`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.). 13866 13867 `as' implements all the standard SH64 opcodes. In addition, the 13868following pseudo-opcodes may be expanded into one or more alternate 13869opcodes: 13870 13871`movi' 13872 If the value doesn't fit into a standard `movi' opcode, `as' will 13873 replace the `movi' with a sequence of `movi' and `shori' opcodes. 13874 13875`pt' 13876 This expands to a sequence of `movi' and `shori' opcode, followed 13877 by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on 13878 the label referenced. 13879 13880 13881 13882File: as.info, Node: Sparc-Dependent, Next: TIC54X-Dependent, Prev: PPC-Dependent, Up: Machine Dependencies 13883 138849.30 SPARC Dependent Features 13885============================= 13886 13887* Menu: 13888 13889* Sparc-Opts:: Options 13890* Sparc-Aligned-Data:: Option to enforce aligned data 13891* Sparc-Syntax:: Syntax 13892* Sparc-Float:: Floating Point 13893* Sparc-Directives:: Sparc Machine Directives 13894 13895 13896File: as.info, Node: Sparc-Opts, Next: Sparc-Aligned-Data, Up: Sparc-Dependent 13897 138989.30.1 Options 13899-------------- 13900 13901The SPARC chip family includes several successive versions, using the 13902same core instruction set, but including a few additional instructions 13903at each version. There are exceptions to this however. For details on 13904what instructions each variant supports, please see the chip's 13905architecture reference manual. 13906 13907 By default, `as' assumes the core instruction set (SPARC v6), but 13908"bumps" the architecture level as needed: it switches to successively 13909higher architectures as it encounters instructions that only exist in 13910the higher levels. 13911 13912 If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump 13913past sparclite by default, an option must be passed to enable the v9 13914instructions. 13915 13916 GAS treats sparclite as being compatible with v8, unless an 13917architecture is explicitly requested. SPARC v9 is always incompatible 13918with sparclite. 13919 13920`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite' 13921`-Av8plus | -Av8plusa | -Av9 | -Av9a' 13922 Use one of the `-A' options to select one of the SPARC 13923 architectures explicitly. If you select an architecture 13924 explicitly, `as' reports a fatal error if it encounters an 13925 instruction or feature requiring an incompatible or higher level. 13926 13927 `-Av8plus' and `-Av8plusa' select a 32 bit environment. 13928 13929 `-Av9' and `-Av9a' select a 64 bit environment and are not 13930 available unless GAS is explicitly configured with 64 bit 13931 environment support. 13932 13933 `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with 13934 UltraSPARC extensions. 13935 13936`-xarch=v8plus | -xarch=v8plusa' 13937 For compatibility with the SunOS v9 assembler. These options are 13938 equivalent to -Av8plus and -Av8plusa, respectively. 13939 13940`-bump' 13941 Warn whenever it is necessary to switch to another level. If an 13942 architecture level is explicitly requested, GAS will not issue 13943 warnings until that level is reached, and will then bump the level 13944 as required (except between incompatible levels). 13945 13946`-32 | -64' 13947 Select the word size, either 32 bits or 64 bits. These options 13948 are only available with the ELF object file format, and require 13949 that the necessary BFD support has been included. 13950 13951 13952File: as.info, Node: Sparc-Aligned-Data, Next: Sparc-Syntax, Prev: Sparc-Opts, Up: Sparc-Dependent 13953 139549.30.2 Enforcing aligned data 13955----------------------------- 13956 13957SPARC GAS normally permits data to be misaligned. For example, it 13958permits the `.long' pseudo-op to be used on a byte boundary. However, 13959the native SunOS assemblers issue an error when they see misaligned 13960data. 13961 13962 You can use the `--enforce-aligned-data' option to make SPARC GAS 13963also issue an error about misaligned data, just as the SunOS assemblers 13964do. 13965 13966 The `--enforce-aligned-data' option is not the default because gcc 13967issues misaligned data pseudo-ops when it initializes certain packed 13968data structures (structures defined using the `packed' attribute). You 13969may have to assemble with GAS in order to initialize packed data 13970structures in your own code. 13971 13972 13973File: as.info, Node: Sparc-Syntax, Next: Sparc-Float, Prev: Sparc-Aligned-Data, Up: Sparc-Dependent 13974 139759.30.3 Sparc Syntax 13976------------------- 13977 13978The assembler syntax closely follows The Sparc Architecture Manual, 13979versions 8 and 9, as well as most extensions defined by Sun for their 13980UltraSPARC and Niagara line of processors. 13981 13982* Menu: 13983 13984* Sparc-Chars:: Special Characters 13985* Sparc-Regs:: Register Names 13986* Sparc-Constants:: Constant Names 13987* Sparc-Relocs:: Relocations 13988* Sparc-Size-Translations:: Size Translations 13989 13990 13991File: as.info, Node: Sparc-Chars, Next: Sparc-Regs, Up: Sparc-Syntax 13992 139939.30.3.1 Special Characters 13994........................... 13995 13996`#' is the line comment character. 13997 13998 `;' can be used instead of a newline to separate statements. 13999 14000 14001File: as.info, Node: Sparc-Regs, Next: Sparc-Constants, Prev: Sparc-Chars, Up: Sparc-Syntax 14002 140039.30.3.2 Register Names 14004....................... 14005 14006The Sparc integer register file is broken down into global, outgoing, 14007local, and incoming. 14008 14009 * The 8 global registers are referred to as `%gN'. 14010 14011 * The 8 outgoing registers are referred to as `%oN'. 14012 14013 * The 8 local registers are referred to as `%lN'. 14014 14015 * The 8 incoming registers are referred to as `%iN'. 14016 14017 * The frame pointer register `%i6' can be referenced using the alias 14018 `%fp'. 14019 14020 * The stack pointer register `%o6' can be referenced using the alias 14021 `%sp'. 14022 14023 Floating point registers are simply referred to as `%fN'. When 14024assembling for pre-V9, only 32 floating point registers are available. 14025For V9 and later there are 64, but there are restrictions when 14026referencing the upper 32 registers. They can only be accessed as 14027double or quad, and thus only even or quad numbered accesses are 14028allowed. For example, `%f34' is a legal floating point register, but 14029`%f35' is not. 14030 14031 Certain V9 instructions allow access to ancillary state registers. 14032Most simply they can be referred to as `%asrN' where N can be from 16 14033to 31. However, there are some aliases defined to reference ASR 14034registers defined for various UltraSPARC processors: 14035 14036 * The tick compare register is referred to as `%tick_cmpr'. 14037 14038 * The system tick register is referred to as `%stick'. An alias, 14039 `%sys_tick', exists but is deprecated and should not be used by 14040 new software. 14041 14042 * The system tick compare register is referred to as `%stick_cmpr'. 14043 An alias, `%sys_tick_cmpr', exists but is deprecated and should 14044 not be used by new software. 14045 14046 * The software interrupt register is referred to as `%softint'. 14047 14048 * The set software interrupt register is referred to as 14049 `%set_softint'. The mnemonic `%softint_set' is provided as an 14050 alias. 14051 14052 * The clear software interrupt register is referred to as 14053 `%clear_softint'. The mnemonic `%softint_clear' is provided as an 14054 alias. 14055 14056 * The performance instrumentation counters register is referred to as 14057 `%pic'. 14058 14059 * The performance control register is referred to as `%pcr'. 14060 14061 * The graphics status register is referred to as `%gsr'. 14062 14063 * The V9 dispatch control register is referred to as `%dcr'. 14064 14065 Various V9 branch and conditional move instructions allow 14066specification of which set of integer condition codes to test. These 14067are referred to as `%xcc' and `%icc'. 14068 14069 In V9, there are 4 sets of floating point condition codes which are 14070referred to as `%fccN'. 14071 14072 Several special privileged and non-privileged registers exist: 14073 14074 * The V9 address space identifier register is referred to as `%asi'. 14075 14076 * The V9 restorable windows register is referred to as `%canrestore'. 14077 14078 * The V9 savable windows register is referred to as `%cansave'. 14079 14080 * The V9 clean windows register is referred to as `%cleanwin'. 14081 14082 * The V9 current window pointer register is referred to as `%cwp'. 14083 14084 * The floating-point queue register is referred to as `%fq'. 14085 14086 * The V8 co-processor queue register is referred to as `%cq'. 14087 14088 * The floating point status register is referred to as `%fsr'. 14089 14090 * The other windows register is referred to as `%otherwin'. 14091 14092 * The V9 program counter register is referred to as `%pc'. 14093 14094 * The V9 next program counter register is referred to as `%npc'. 14095 14096 * The V9 processor interrupt level register is referred to as `%pil'. 14097 14098 * The V9 processor state register is referred to as `%pstate'. 14099 14100 * The trap base address register is referred to as `%tba'. 14101 14102 * The V9 tick register is referred to as `%tick'. 14103 14104 * The V9 trap level is referred to as `%tl'. 14105 14106 * The V9 trap program counter is referred to as `%tpc'. 14107 14108 * The V9 trap next program counter is referred to as `%tnpc'. 14109 14110 * The V9 trap state is referred to as `%tstate'. 14111 14112 * The V9 trap type is referred to as `%tt'. 14113 14114 * The V9 condition codes is referred to as `%ccr'. 14115 14116 * The V9 floating-point registers state is referred to as `%fprs'. 14117 14118 * The V9 version register is referred to as `%ver'. 14119 14120 * The V9 window state register is referred to as `%wstate'. 14121 14122 * The Y register is referred to as `%y'. 14123 14124 * The V8 window invalid mask register is referred to as `%wim'. 14125 14126 * The V8 processor state register is referred to as `%psr'. 14127 14128 * The V9 global register level register is referred to as `%gl'. 14129 14130 Several special register names exist for hypervisor mode code: 14131 14132 * The hyperprivileged processor state register is referred to as 14133 `%hpstate'. 14134 14135 * The hyperprivileged trap state register is referred to as 14136 `%htstate'. 14137 14138 * The hyperprivileged interrupt pending register is referred to as 14139 `%hintp'. 14140 14141 * The hyperprivileged trap base address register is referred to as 14142 `%htba'. 14143 14144 * The hyperprivileged implementation version register is referred to 14145 as `%hver'. 14146 14147 * The hyperprivileged system tick compare register is referred to as 14148 `%hstick_cmpr'. Note that there is no `%hstick' register, the 14149 normal `%stick' is used. 14150 14151 14152File: as.info, Node: Sparc-Constants, Next: Sparc-Relocs, Prev: Sparc-Regs, Up: Sparc-Syntax 14153 141549.30.3.3 Constants 14155.................. 14156 14157Several Sparc instructions take an immediate operand field for which 14158mnemonic names exist. Two such examples are `membar' and `prefetch'. 14159Another example are the set of V9 memory access instruction that allow 14160specification of an address space identifier. 14161 14162 The `membar' instruction specifies a memory barrier that is the 14163defined by the operand which is a bitmask. The supported mask 14164mnemonics are: 14165 14166 * `#Sync' requests that all operations (including nonmemory 14167 reference operations) appearing prior to the `membar' must have 14168 been performed and the effects of any exceptions become visible 14169 before any instructions after the `membar' may be initiated. This 14170 corresponds to `membar' cmask field bit 2. 14171 14172 * `#MemIssue' requests that all memory reference operations 14173 appearing prior to the `membar' must have been performed before 14174 any memory operation after the `membar' may be initiated. This 14175 corresponds to `membar' cmask field bit 1. 14176 14177 * `#Lookaside' requests that a store appearing prior to the `membar' 14178 must complete before any load following the `membar' referencing 14179 the same address can be initiated. This corresponds to `membar' 14180 cmask field bit 0. 14181 14182 * `#StoreStore' defines that the effects of all stores appearing 14183 prior to the `membar' instruction must be visible to all 14184 processors before the effect of any stores following the `membar'. 14185 Equivalent to the deprecated `stbar' instruction. This 14186 corresponds to `membar' mmask field bit 3. 14187 14188 * `#LoadStore' defines all loads appearing prior to the `membar' 14189 instruction must have been performed before the effect of any 14190 stores following the `membar' is visible to any other processor. 14191 This corresponds to `membar' mmask field bit 2. 14192 14193 * `#StoreLoad' defines that the effects of all stores appearing 14194 prior to the `membar' instruction must be visible to all 14195 processors before loads following the `membar' may be performed. 14196 This corresponds to `membar' mmask field bit 1. 14197 14198 * `#LoadLoad' defines that all loads appearing prior to the `membar' 14199 instruction must have been performed before any loads following 14200 the `membar' may be performed. This corresponds to `membar' mmask 14201 field bit 0. 14202 14203 14204 These values can be ored together, for example: 14205 14206 membar #Sync 14207 membar #StoreLoad | #LoadLoad 14208 membar #StoreLoad | #StoreStore 14209 14210 The `prefetch' and `prefetcha' instructions take a prefetch function 14211code. The following prefetch function code constant mnemonics are 14212available: 14213 14214 * `#n_reads' requests a prefetch for several reads, and corresponds 14215 to a prefetch function code of 0. 14216 14217 `#one_read' requests a prefetch for one read, and corresponds to a 14218 prefetch function code of 1. 14219 14220 `#n_writes' requests a prefetch for several writes (and possibly 14221 reads), and corresponds to a prefetch function code of 2. 14222 14223 `#one_write' requests a prefetch for one write, and corresponds to 14224 a prefetch function code of 3. 14225 14226 `#page' requests a prefetch page, and corresponds to a prefetch 14227 function code of 4. 14228 14229 `#invalidate' requests a prefetch invalidate, and corresponds to a 14230 prefetch function code of 16. 14231 14232 `#unified' requests a prefetch to the nearest unified cache, and 14233 corresponds to a prefetch function code of 17. 14234 14235 `#n_reads_strong' requests a strong prefetch for several reads, 14236 and corresponds to a prefetch function code of 20. 14237 14238 `#one_read_strong' requests a strong prefetch for one read, and 14239 corresponds to a prefetch function code of 21. 14240 14241 `#n_writes_strong' requests a strong prefetch for several writes, 14242 and corresponds to a prefetch function code of 22. 14243 14244 `#one_write_strong' requests a strong prefetch for one write, and 14245 corresponds to a prefetch function code of 23. 14246 14247 Onle one prefetch code may be specified. Here are some examples: 14248 14249 prefetch [%l0 + %l2], #one_read 14250 prefetch [%g2 + 8], #n_writes 14251 prefetcha [%g1] 0x8, #unified 14252 prefetcha [%o0 + 0x10] %asi, #n_reads 14253 14254 The actual behavior of a given prefetch function code is processor 14255 specific. If a processor does not implement a given prefetch 14256 function code, it will treat the prefetch instruction as a nop. 14257 14258 For instructions that accept an immediate address space identifier, 14259 `as' provides many mnemonics corresponding to V9 defined as well 14260 as UltraSPARC and Niagara extended values. For example, `#ASI_P' 14261 and `#ASI_BLK_INIT_QUAD_LDD_AIUS'. See the V9 and processor 14262 specific manuals for details. 14263 14264 14265 14266File: as.info, Node: Sparc-Relocs, Next: Sparc-Size-Translations, Prev: Sparc-Constants, Up: Sparc-Syntax 14267 142689.30.3.4 Relocations 14269.................... 14270 14271ELF relocations are available as defined in the 32-bit and 64-bit Sparc 14272ELF specifications. 14273 14274 `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is 14275obtained using `%lo'. Likewise `R_SPARC_HIX22' is obtained from `%hix' 14276and `R_SPARC_LOX10' is obtained using `%lox'. For example: 14277 14278 sethi %hi(symbol), %g1 14279 or %g1, %lo(symbol), %g1 14280 14281 sethi %hix(symbol), %g1 14282 xor %g1, %lox(symbol), %g1 14283 14284 These "high" mnemonics extract bits 31:10 of their operand, and the 14285"low" mnemonics extract bits 9:0 of their operand. 14286 14287 V9 code model relocations can be requested as follows: 14288 14289 * `R_SPARC_HH22' is requested using `%hh'. It can also be generated 14290 using `%uhi'. 14291 14292 * `R_SPARC_HM10' is requested using `%hm'. It can also be generated 14293 using `%ulo'. 14294 14295 * `R_SPARC_LM22' is requested using `%lm'. 14296 14297 * `R_SPARC_H44' is requested using `%h44'. 14298 14299 * `R_SPARC_M44' is requested using `%m44'. 14300 14301 * `R_SPARC_L44' is requested using `%l44'. 14302 14303 The PC relative relocation `R_SPARC_PC22' can be obtained by 14304enclosing an operand inside of `%pc22'. Likewise, the `R_SPARC_PC10' 14305relocation can be obtained using `%pc10'. These are mostly used when 14306assembling PIC code. For example, the standard PIC sequence on Sparc 14307to get the base of the global offset table, PC relative, into a 14308register, can be performed as: 14309 14310 sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7 14311 add %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7 14312 14313 Several relocations exist to allow the link editor to potentially 14314optimize GOT data references. The `R_SPARC_GOTDATA_OP_HIX22' 14315relocation can obtained by enclosing an operand inside of 14316`%gdop_hix22'. The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained 14317by enclosing an operand inside of `%gdop_lox10'. Likewise, 14318`R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of 14319`%gdop'. For example, assuming the GOT base is in register `%l7': 14320 14321 sethi %gdop_hix22(symbol), %l1 14322 xor %l1, %gdop_lox10(symbol), %l1 14323 ld [%l7 + %l1], %l2, %gdop(symbol) 14324 14325 There are many relocations that can be requested for access to 14326thread local storage variables. All of the Sparc TLS mnemonics are 14327supported: 14328 14329 * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'. 14330 14331 * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'. 14332 14333 * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'. 14334 14335 * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'. 14336 14337 * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'. 14338 14339 * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'. 14340 14341 * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'. 14342 14343 * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'. 14344 14345 * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'. 14346 14347 * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'. 14348 14349 * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'. 14350 14351 * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'. 14352 14353 * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'. 14354 14355 * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'. 14356 14357 * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'. 14358 14359 * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'. 14360 14361 * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'. 14362 14363 * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'. 14364 14365 Here are some example TLS model sequences. 14366 14367 First, General Dynamic: 14368 14369 sethi %tgd_hi22(symbol), %l1 14370 add %l1, %tgd_lo10(symbol), %l1 14371 add %l7, %l1, %o0, %tgd_add(symbol) 14372 call __tls_get_addr, %tgd_call(symbol) 14373 nop 14374 14375 Local Dynamic: 14376 14377 sethi %tldm_hi22(symbol), %l1 14378 add %l1, %tldm_lo10(symbol), %l1 14379 add %l7, %l1, %o0, %tldm_add(symbol) 14380 call __tls_get_addr, %tldm_call(symbol) 14381 nop 14382 14383 sethi %tldo_hix22(symbol), %l1 14384 xor %l1, %tldo_lox10(symbol), %l1 14385 add %o0, %l1, %l1, %tldo_add(symbol) 14386 14387 Initial Exec: 14388 14389 sethi %tie_hi22(symbol), %l1 14390 add %l1, %tie_lo10(symbol), %l1 14391 ld [%l7 + %l1], %o0, %tie_ld(symbol) 14392 add %g7, %o0, %o0, %tie_add(symbol) 14393 14394 sethi %tie_hi22(symbol), %l1 14395 add %l1, %tie_lo10(symbol), %l1 14396 ldx [%l7 + %l1], %o0, %tie_ldx(symbol) 14397 add %g7, %o0, %o0, %tie_add(symbol) 14398 14399 And finally, Local Exec: 14400 14401 sethi %tle_hix22(symbol), %l1 14402 add %l1, %tle_lox10(symbol), %l1 14403 add %g7, %l1, %l1 14404 14405 When assembling for 64-bit, and a secondary constant addend is 14406specified in an address expression that would normally generate an 14407`R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10' 14408instead. 14409 14410 14411File: as.info, Node: Sparc-Size-Translations, Prev: Sparc-Relocs, Up: Sparc-Syntax 14412 144139.30.3.5 Size Translations 14414.......................... 14415 14416Often it is desirable to write code in an operand size agnostic manner. 14417`as' provides support for this via operand size opcode translations. 14418Translations are supported for loads, stores, shifts, compare-and-swap 14419atomics, and the `clr' synthetic instruction. 14420 14421 If generating 32-bit code, `as' will generate the 32-bit opcode. 14422Whereas if 64-bit code is being generated, the 64-bit opcode will be 14423emitted. For example `ldn' will be transformed into `ld' for 32-bit 14424code and `ldx' for 64-bit code. 14425 14426 Here is an example meant to demonstrate all the supported opcode 14427translations: 14428 14429 ldn [%o0], %o1 14430 ldna [%o0] %asi, %o2 14431 stn %o1, [%o0] 14432 stna %o2, [%o0] %asi 14433 slln %o3, 3, %o3 14434 srln %o4, 8, %o4 14435 sran %o5, 12, %o5 14436 casn [%o0], %o1, %o2 14437 casna [%o0] %asi, %o1, %o2 14438 clrn %g1 14439 14440 In 32-bit mode `as' will emit: 14441 14442 ld [%o0], %o1 14443 lda [%o0] %asi, %o2 14444 st %o1, [%o0] 14445 sta %o2, [%o0] %asi 14446 sll %o3, 3, %o3 14447 srl %o4, 8, %o4 14448 sra %o5, 12, %o5 14449 cas [%o0], %o1, %o2 14450 casa [%o0] %asi, %o1, %o2 14451 clr %g1 14452 14453 And in 64-bit mode `as' will emit: 14454 14455 ldx [%o0], %o1 14456 ldxa [%o0] %asi, %o2 14457 stx %o1, [%o0] 14458 stxa %o2, [%o0] %asi 14459 sllx %o3, 3, %o3 14460 srlx %o4, 8, %o4 14461 srax %o5, 12, %o5 14462 casx [%o0], %o1, %o2 14463 casxa [%o0] %asi, %o1, %o2 14464 clrx %g1 14465 14466 Finally, the `.nword' translating directive is supported as well. 14467It is documented in the section on Sparc machine directives. 14468 14469 14470File: as.info, Node: Sparc-Float, Next: Sparc-Directives, Prev: Sparc-Syntax, Up: Sparc-Dependent 14471 144729.30.4 Floating Point 14473--------------------- 14474 14475The Sparc uses IEEE floating-point numbers. 14476 14477 14478File: as.info, Node: Sparc-Directives, Prev: Sparc-Float, Up: Sparc-Dependent 14479 144809.30.5 Sparc Machine Directives 14481------------------------------- 14482 14483The Sparc version of `as' supports the following additional machine 14484directives: 14485 14486`.align' 14487 This must be followed by the desired alignment in bytes. 14488 14489`.common' 14490 This must be followed by a symbol name, a positive number, and 14491 `"bss"'. This behaves somewhat like `.comm', but the syntax is 14492 different. 14493 14494`.half' 14495 This is functionally identical to `.short'. 14496 14497`.nword' 14498 On the Sparc, the `.nword' directive produces native word sized 14499 value, ie. if assembling with -32 it is equivalent to `.word', if 14500 assembling with -64 it is equivalent to `.xword'. 14501 14502`.proc' 14503 This directive is ignored. Any text following it on the same line 14504 is also ignored. 14505 14506`.register' 14507 This directive declares use of a global application or system 14508 register. It must be followed by a register name %g2, %g3, %g6 or 14509 %g7, comma and the symbol name for that register. If symbol name 14510 is `#scratch', it is a scratch register, if it is `#ignore', it 14511 just suppresses any errors about using undeclared global register, 14512 but does not emit any information about it into the object file. 14513 This can be useful e.g. if you save the register before use and 14514 restore it after. 14515 14516`.reserve' 14517 This must be followed by a symbol name, a positive number, and 14518 `"bss"'. This behaves somewhat like `.lcomm', but the syntax is 14519 different. 14520 14521`.seg' 14522 This must be followed by `"text"', `"data"', or `"data1"'. It 14523 behaves like `.text', `.data', or `.data 1'. 14524 14525`.skip' 14526 This is functionally identical to the `.space' directive. 14527 14528`.word' 14529 On the Sparc, the `.word' directive produces 32 bit values, 14530 instead of the 16 bit values it produces on many other machines. 14531 14532`.xword' 14533 On the Sparc V9 processor, the `.xword' directive produces 64 bit 14534 values. 14535 14536 14537File: as.info, Node: TIC54X-Dependent, Next: V850-Dependent, Prev: Sparc-Dependent, Up: Machine Dependencies 14538 145399.31 TIC54X Dependent Features 14540============================== 14541 14542* Menu: 14543 14544* TIC54X-Opts:: Command-line Options 14545* TIC54X-Block:: Blocking 14546* TIC54X-Env:: Environment Settings 14547* TIC54X-Constants:: Constants Syntax 14548* TIC54X-Subsyms:: String Substitution 14549* TIC54X-Locals:: Local Label Syntax 14550* TIC54X-Builtins:: Builtin Assembler Math Functions 14551* TIC54X-Ext:: Extended Addressing Support 14552* TIC54X-Directives:: Directives 14553* TIC54X-Macros:: Macro Features 14554* TIC54X-MMRegs:: Memory-mapped Registers 14555 14556 14557File: as.info, Node: TIC54X-Opts, Next: TIC54X-Block, Up: TIC54X-Dependent 14558 145599.31.1 Options 14560-------------- 14561 14562The TMS320C54X version of `as' has a few machine-dependent options. 14563 14564 You can use the `-mfar-mode' option to enable extended addressing 14565mode. All addresses will be assumed to be > 16 bits, and the 14566appropriate relocation types will be used. This option is equivalent 14567to using the `.far_mode' directive in the assembly code. If you do not 14568use the `-mfar-mode' option, all references will be assumed to be 16 14569bits. This option may be abbreviated to `-mf'. 14570 14571 You can use the `-mcpu' option to specify a particular CPU. This 14572option is equivalent to using the `.version' directive in the assembly 14573code. For recognized CPU codes, see *Note `.version': 14574TIC54X-Directives. The default CPU version is `542'. 14575 14576 You can use the `-merrors-to-file' option to redirect error output 14577to a file (this provided for those deficient environments which don't 14578provide adequate output redirection). This option may be abbreviated to 14579`-me'. 14580 14581 14582File: as.info, Node: TIC54X-Block, Next: TIC54X-Env, Prev: TIC54X-Opts, Up: TIC54X-Dependent 14583 145849.31.2 Blocking 14585--------------- 14586 14587A blocked section or memory block is guaranteed not to cross the 14588blocking boundary (usually a page, or 128 words) if it is smaller than 14589the blocking size, or to start on a page boundary if it is larger than 14590the blocking size. 14591 14592 14593File: as.info, Node: TIC54X-Env, Next: TIC54X-Constants, Prev: TIC54X-Block, Up: TIC54X-Dependent 14594 145959.31.3 Environment Settings 14596--------------------------- 14597 14598`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added 14599to the list of directories normally searched for source and include 14600files. `C54XDSP_DIR' will override `A_DIR'. 14601 14602 14603File: as.info, Node: TIC54X-Constants, Next: TIC54X-Subsyms, Prev: TIC54X-Env, Up: TIC54X-Dependent 14604 146059.31.4 Constants Syntax 14606----------------------- 14607 14608The TIC54X version of `as' allows the following additional constant 14609formats, using a suffix to indicate the radix: 14610 14611 Binary `000000B, 011000b' 14612 Octal `10Q, 224q' 14613 Hexadecimal `45h, 0FH' 14614 14615 14616File: as.info, Node: TIC54X-Subsyms, Next: TIC54X-Locals, Prev: TIC54X-Constants, Up: TIC54X-Dependent 14617 146189.31.5 String Substitution 14619-------------------------- 14620 14621A subset of allowable symbols (which we'll call subsyms) may be assigned 14622arbitrary string values. This is roughly equivalent to C preprocessor 14623#define macros. When `as' encounters one of these symbols, the symbol 14624is replaced in the input stream by its string value. Subsym names 14625*must* begin with a letter. 14626 14627 Subsyms may be defined using the `.asg' and `.eval' directives 14628(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives. 14629 14630 Expansion is recursive until a previously encountered symbol is 14631seen, at which point substitution stops. 14632 14633 In this example, x is replaced with SYM2; SYM2 is replaced with 14634SYM1, and SYM1 is replaced with x. At this point, x has already been 14635encountered and the substitution stops. 14636 14637 .asg "x",SYM1 14638 .asg "SYM1",SYM2 14639 .asg "SYM2",x 14640 add x,a ; final code assembled is "add x, a" 14641 14642 Macro parameters are converted to subsyms; a side effect of this is 14643the normal `as' '\ARG' dereferencing syntax is unnecessary. Subsyms 14644defined within a macro will have global scope, unless the `.var' 14645directive is used to identify the subsym as a local macro variable 14646*note `.var': TIC54X-Directives. 14647 14648 Substitution may be forced in situations where replacement might be 14649ambiguous by placing colons on either side of the subsym. The following 14650code: 14651 14652 .eval "10",x 14653 LAB:X: add #x, a 14654 14655 When assembled becomes: 14656 14657 LAB10 add #10, a 14658 14659 Smaller parts of the string assigned to a subsym may be accessed with 14660the following syntax: 14661 14662``:SYMBOL(CHAR_INDEX):'' 14663 Evaluates to a single-character string, the character at 14664 CHAR_INDEX. 14665 14666``:SYMBOL(START,LENGTH):'' 14667 Evaluates to a substring of SYMBOL beginning at START with length 14668 LENGTH. 14669 14670 14671File: as.info, Node: TIC54X-Locals, Next: TIC54X-Builtins, Prev: TIC54X-Subsyms, Up: TIC54X-Dependent 14672 146739.31.6 Local Labels 14674------------------- 14675 14676Local labels may be defined in two ways: 14677 14678 * $N, where N is a decimal number between 0 and 9 14679 14680 * LABEL?, where LABEL is any legal symbol name. 14681 14682 Local labels thus defined may be redefined or automatically 14683generated. The scope of a local label is based on when it may be 14684undefined or reset. This happens when one of the following situations 14685is encountered: 14686 14687 * .newblock directive *note `.newblock': TIC54X-Directives. 14688 14689 * The current section is changed (.sect, .text, or .data) 14690 14691 * Entering or leaving an included file 14692 14693 * The macro scope where the label was defined is exited 14694 14695 14696File: as.info, Node: TIC54X-Builtins, Next: TIC54X-Ext, Prev: TIC54X-Locals, Up: TIC54X-Dependent 14697 146989.31.7 Math Builtins 14699-------------------- 14700 14701The following built-in functions may be used to generate a 14702floating-point value. All return a floating-point value except `$cvi', 14703`$int', and `$sgn', which return an integer value. 14704 14705``$acos(EXPR)'' 14706 Returns the floating point arccosine of EXPR. 14707 14708``$asin(EXPR)'' 14709 Returns the floating point arcsine of EXPR. 14710 14711``$atan(EXPR)'' 14712 Returns the floating point arctangent of EXPR. 14713 14714``$atan2(EXPR1,EXPR2)'' 14715 Returns the floating point arctangent of EXPR1 / EXPR2. 14716 14717``$ceil(EXPR)'' 14718 Returns the smallest integer not less than EXPR as floating point. 14719 14720``$cosh(EXPR)'' 14721 Returns the floating point hyperbolic cosine of EXPR. 14722 14723``$cos(EXPR)'' 14724 Returns the floating point cosine of EXPR. 14725 14726``$cvf(EXPR)'' 14727 Returns the integer value EXPR converted to floating-point. 14728 14729``$cvi(EXPR)'' 14730 Returns the floating point value EXPR converted to integer. 14731 14732``$exp(EXPR)'' 14733 Returns the floating point value e ^ EXPR. 14734 14735``$fabs(EXPR)'' 14736 Returns the floating point absolute value of EXPR. 14737 14738``$floor(EXPR)'' 14739 Returns the largest integer that is not greater than EXPR as 14740 floating point. 14741 14742``$fmod(EXPR1,EXPR2)'' 14743 Returns the floating point remainder of EXPR1 / EXPR2. 14744 14745``$int(EXPR)'' 14746 Returns 1 if EXPR evaluates to an integer, zero otherwise. 14747 14748``$ldexp(EXPR1,EXPR2)'' 14749 Returns the floating point value EXPR1 * 2 ^ EXPR2. 14750 14751``$log10(EXPR)'' 14752 Returns the base 10 logarithm of EXPR. 14753 14754``$log(EXPR)'' 14755 Returns the natural logarithm of EXPR. 14756 14757``$max(EXPR1,EXPR2)'' 14758 Returns the floating point maximum of EXPR1 and EXPR2. 14759 14760``$min(EXPR1,EXPR2)'' 14761 Returns the floating point minimum of EXPR1 and EXPR2. 14762 14763``$pow(EXPR1,EXPR2)'' 14764 Returns the floating point value EXPR1 ^ EXPR2. 14765 14766``$round(EXPR)'' 14767 Returns the nearest integer to EXPR as a floating point number. 14768 14769``$sgn(EXPR)'' 14770 Returns -1, 0, or 1 based on the sign of EXPR. 14771 14772``$sin(EXPR)'' 14773 Returns the floating point sine of EXPR. 14774 14775``$sinh(EXPR)'' 14776 Returns the floating point hyperbolic sine of EXPR. 14777 14778``$sqrt(EXPR)'' 14779 Returns the floating point square root of EXPR. 14780 14781``$tan(EXPR)'' 14782 Returns the floating point tangent of EXPR. 14783 14784``$tanh(EXPR)'' 14785 Returns the floating point hyperbolic tangent of EXPR. 14786 14787``$trunc(EXPR)'' 14788 Returns the integer value of EXPR truncated towards zero as 14789 floating point. 14790 14791 14792 14793File: as.info, Node: TIC54X-Ext, Next: TIC54X-Directives, Prev: TIC54X-Builtins, Up: TIC54X-Dependent 14794 147959.31.8 Extended Addressing 14796-------------------------- 14797 14798The `LDX' pseudo-op is provided for loading the extended addressing bits 14799of a label or address. For example, if an address `_label' resides in 14800extended program memory, the value of `_label' may be loaded as follows: 14801 ldx #_label,16,a ; loads extended bits of _label 14802 or #_label,a ; loads lower 16 bits of _label 14803 bacc a ; full address is in accumulator A 14804 14805 14806File: as.info, Node: TIC54X-Directives, Next: TIC54X-Macros, Prev: TIC54X-Ext, Up: TIC54X-Dependent 14807 148089.31.9 Directives 14809----------------- 14810 14811`.align [SIZE]' 14812`.even' 14813 Align the section program counter on the next boundary, based on 14814 SIZE. SIZE may be any power of 2. `.even' is equivalent to 14815 `.align' with a SIZE of 2. 14816 `1' 14817 Align SPC to word boundary 14818 14819 `2' 14820 Align SPC to longword boundary (same as .even) 14821 14822 `128' 14823 Align SPC to page boundary 14824 14825`.asg STRING, NAME' 14826 Assign NAME the string STRING. String replacement is performed on 14827 STRING before assignment. 14828 14829`.eval STRING, NAME' 14830 Evaluate the contents of string STRING and assign the result as a 14831 string to the subsym NAME. String replacement is performed on 14832 STRING before assignment. 14833 14834`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 14835 Reserve space for SYMBOL in the .bss section. SIZE is in words. 14836 If present, BLOCKING_FLAG indicates the allocated space should be 14837 aligned on a page boundary if it would otherwise cross a page 14838 boundary. If present, ALIGNMENT_FLAG causes the assembler to 14839 allocate SIZE on a long word boundary. 14840 14841`.byte VALUE [,...,VALUE_N]' 14842`.ubyte VALUE [,...,VALUE_N]' 14843`.char VALUE [,...,VALUE_N]' 14844`.uchar VALUE [,...,VALUE_N]' 14845 Place one or more bytes into consecutive words of the current 14846 section. The upper 8 bits of each word is zero-filled. If a 14847 label is used, it points to the word allocated for the first byte 14848 encountered. 14849 14850`.clink ["SECTION_NAME"]' 14851 Set STYP_CLINK flag for this section, which indicates to the 14852 linker that if no symbols from this section are referenced, the 14853 section should not be included in the link. If SECTION_NAME is 14854 omitted, the current section is used. 14855 14856`.c_mode' 14857 TBD. 14858 14859`.copy "FILENAME" | FILENAME' 14860`.include "FILENAME" | FILENAME' 14861 Read source statements from FILENAME. The normal include search 14862 path is used. Normally .copy will cause statements from the 14863 included file to be printed in the assembly listing and .include 14864 will not, but this distinction is not currently implemented. 14865 14866`.data' 14867 Begin assembling code into the .data section. 14868 14869`.double VALUE [,...,VALUE_N]' 14870`.ldouble VALUE [,...,VALUE_N]' 14871`.float VALUE [,...,VALUE_N]' 14872`.xfloat VALUE [,...,VALUE_N]' 14873 Place an IEEE single-precision floating-point representation of 14874 one or more floating-point values into the current section. All 14875 but `.xfloat' align the result on a longword boundary. Values are 14876 stored most-significant word first. 14877 14878`.drlist' 14879`.drnolist' 14880 Control printing of directives to the listing file. Ignored. 14881 14882`.emsg STRING' 14883`.mmsg STRING' 14884`.wmsg STRING' 14885 Emit a user-defined error, message, or warning, respectively. 14886 14887`.far_mode' 14888 Use extended addressing when assembling statements. This should 14889 appear only once per file, and is equivalent to the -mfar-mode 14890 option *note `-mfar-mode': TIC54X-Opts. 14891 14892`.fclist' 14893`.fcnolist' 14894 Control printing of false conditional blocks to the listing file. 14895 14896`.field VALUE [,SIZE]' 14897 Initialize a bitfield of SIZE bits in the current section. If 14898 VALUE is relocatable, then SIZE must be 16. SIZE defaults to 16 14899 bits. If VALUE does not fit into SIZE bits, the value will be 14900 truncated. Successive `.field' directives will pack starting at 14901 the current word, filling the most significant bits first, and 14902 aligning to the start of the next word if the field size does not 14903 fit into the space remaining in the current word. A `.align' 14904 directive with an operand of 1 will force the next `.field' 14905 directive to begin packing into a new word. If a label is used, it 14906 points to the word that contains the specified field. 14907 14908`.global SYMBOL [,...,SYMBOL_N]' 14909`.def SYMBOL [,...,SYMBOL_N]' 14910`.ref SYMBOL [,...,SYMBOL_N]' 14911 `.def' nominally identifies a symbol defined in the current file 14912 and available to other files. `.ref' identifies a symbol used in 14913 the current file but defined elsewhere. Both map to the standard 14914 `.global' directive. 14915 14916`.half VALUE [,...,VALUE_N]' 14917`.uhalf VALUE [,...,VALUE_N]' 14918`.short VALUE [,...,VALUE_N]' 14919`.ushort VALUE [,...,VALUE_N]' 14920`.int VALUE [,...,VALUE_N]' 14921`.uint VALUE [,...,VALUE_N]' 14922`.word VALUE [,...,VALUE_N]' 14923`.uword VALUE [,...,VALUE_N]' 14924 Place one or more values into consecutive words of the current 14925 section. If a label is used, it points to the word allocated for 14926 the first value encountered. 14927 14928`.label SYMBOL' 14929 Define a special SYMBOL to refer to the load time address of the 14930 current section program counter. 14931 14932`.length' 14933`.width' 14934 Set the page length and width of the output listing file. Ignored. 14935 14936`.list' 14937`.nolist' 14938 Control whether the source listing is printed. Ignored. 14939 14940`.long VALUE [,...,VALUE_N]' 14941`.ulong VALUE [,...,VALUE_N]' 14942`.xlong VALUE [,...,VALUE_N]' 14943 Place one or more 32-bit values into consecutive words in the 14944 current section. The most significant word is stored first. 14945 `.long' and `.ulong' align the result on a longword boundary; 14946 `xlong' does not. 14947 14948`.loop [COUNT]' 14949`.break [CONDITION]' 14950`.endloop' 14951 Repeatedly assemble a block of code. `.loop' begins the block, and 14952 `.endloop' marks its termination. COUNT defaults to 1024, and 14953 indicates the number of times the block should be repeated. 14954 `.break' terminates the loop so that assembly begins after the 14955 `.endloop' directive. The optional CONDITION will cause the loop 14956 to terminate only if it evaluates to zero. 14957 14958`MACRO_NAME .macro [PARAM1][,...PARAM_N]' 14959`[.mexit]' 14960`.endm' 14961 See the section on macros for more explanation (*Note 14962 TIC54X-Macros::. 14963 14964`.mlib "FILENAME" | FILENAME' 14965 Load the macro library FILENAME. FILENAME must be an archived 14966 library (BFD ar-compatible) of text files, expected to contain 14967 only macro definitions. The standard include search path is used. 14968 14969`.mlist' 14970 14971`.mnolist' 14972 Control whether to include macro and loop block expansions in the 14973 listing output. Ignored. 14974 14975`.mmregs' 14976 Define global symbolic names for the 'c54x registers. Supposedly 14977 equivalent to executing `.set' directives for each register with 14978 its memory-mapped value, but in reality is provided only for 14979 compatibility and does nothing. 14980 14981`.newblock' 14982 This directive resets any TIC54X local labels currently defined. 14983 Normal `as' local labels are unaffected. 14984 14985`.option OPTION_LIST' 14986 Set listing options. Ignored. 14987 14988`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]' 14989 Designate SECTION_NAME for blocking. Blocking guarantees that a 14990 section will start on a page boundary (128 words) if it would 14991 otherwise cross a page boundary. Only initialized sections may be 14992 designated with this directive. See also *Note TIC54X-Block::. 14993 14994`.sect "SECTION_NAME"' 14995 Define a named initialized section and make it the current section. 14996 14997`SYMBOL .set "VALUE"' 14998`SYMBOL .equ "VALUE"' 14999 Equate a constant VALUE to a SYMBOL, which is placed in the symbol 15000 table. SYMBOL may not be previously defined. 15001 15002`.space SIZE_IN_BITS' 15003`.bes SIZE_IN_BITS' 15004 Reserve the given number of bits in the current section and 15005 zero-fill them. If a label is used with `.space', it points to the 15006 *first* word reserved. With `.bes', the label points to the 15007 *last* word reserved. 15008 15009`.sslist' 15010`.ssnolist' 15011 Controls the inclusion of subsym replacement in the listing 15012 output. Ignored. 15013 15014`.string "STRING" [,...,"STRING_N"]' 15015`.pstring "STRING" [,...,"STRING_N"]' 15016 Place 8-bit characters from STRING into the current section. 15017 `.string' zero-fills the upper 8 bits of each word, while 15018 `.pstring' puts two characters into each word, filling the 15019 most-significant bits first. Unused space is zero-filled. If a 15020 label is used, it points to the first word initialized. 15021 15022`[STAG] .struct [OFFSET]' 15023`[NAME_1] element [COUNT_1]' 15024`[NAME_2] element [COUNT_2]' 15025`[TNAME] .tag STAGX [TCOUNT]' 15026`...' 15027`[NAME_N] element [COUNT_N]' 15028`[SSIZE] .endstruct' 15029`LABEL .tag [STAG]' 15030 Assign symbolic offsets to the elements of a structure. STAG 15031 defines a symbol to use to reference the structure. OFFSET 15032 indicates a starting value to use for the first element 15033 encountered; otherwise it defaults to zero. Each element can have 15034 a named offset, NAME, which is a symbol assigned the value of the 15035 element's offset into the structure. If STAG is missing, these 15036 become global symbols. COUNT adjusts the offset that many times, 15037 as if `element' were an array. `element' may be one of `.byte', 15038 `.word', `.long', `.float', or any equivalent of those, and the 15039 structure offset is adjusted accordingly. `.field' and `.string' 15040 are also allowed; the size of `.field' is one bit, and `.string' 15041 is considered to be one word in size. Only element descriptors, 15042 structure/union tags, `.align' and conditional assembly directives 15043 are allowed within `.struct'/`.endstruct'. `.align' aligns member 15044 offsets to word boundaries only. SSIZE, if provided, will always 15045 be assigned the size of the structure. 15046 15047 The `.tag' directive, in addition to being used to define a 15048 structure/union element within a structure, may be used to apply a 15049 structure to a symbol. Once applied to LABEL, the individual 15050 structure elements may be applied to LABEL to produce the desired 15051 offsets using LABEL as the structure base. 15052 15053`.tab' 15054 Set the tab size in the output listing. Ignored. 15055 15056`[UTAG] .union' 15057`[NAME_1] element [COUNT_1]' 15058`[NAME_2] element [COUNT_2]' 15059`[TNAME] .tag UTAGX[,TCOUNT]' 15060`...' 15061`[NAME_N] element [COUNT_N]' 15062`[USIZE] .endstruct' 15063`LABEL .tag [UTAG]' 15064 Similar to `.struct', but the offset after each element is reset to 15065 zero, and the USIZE is set to the maximum of all defined elements. 15066 Starting offset for the union is always zero. 15067 15068`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]' 15069 Reserve space for variables in a named, uninitialized section 15070 (similar to .bss). `.usect' allows definitions sections 15071 independent of .bss. SYMBOL points to the first location reserved 15072 by this allocation. The symbol may be used as a variable name. 15073 SIZE is the allocated size in words. BLOCKING_FLAG indicates 15074 whether to block this section on a page boundary (128 words) 15075 (*note TIC54X-Block::). ALIGNMENT FLAG indicates whether the 15076 section should be longword-aligned. 15077 15078`.var SYM[,..., SYM_N]' 15079 Define a subsym to be a local variable within a macro. See *Note 15080 TIC54X-Macros::. 15081 15082`.version VERSION' 15083 Set which processor to build instructions for. Though the 15084 following values are accepted, the op is ignored. 15085 `541' 15086 `542' 15087 `543' 15088 `545' 15089 `545LP' 15090 `546LP' 15091 `548' 15092 `549' 15093 15094 15095File: as.info, Node: TIC54X-Macros, Next: TIC54X-MMRegs, Prev: TIC54X-Directives, Up: TIC54X-Dependent 15096 150979.31.10 Macros 15098-------------- 15099 15100Macros do not require explicit dereferencing of arguments (i.e., \ARG). 15101 15102 During macro expansion, the macro parameters are converted to 15103subsyms. If the number of arguments passed the macro invocation 15104exceeds the number of parameters defined, the last parameter is 15105assigned the string equivalent of all remaining arguments. If fewer 15106arguments are given than parameters, the missing parameters are 15107assigned empty strings. To include a comma in an argument, you must 15108enclose the argument in quotes. 15109 15110 The following built-in subsym functions allow examination of the 15111string value of subsyms (or ordinary strings). The arguments are 15112strings unless otherwise indicated (subsyms passed as args will be 15113replaced by the strings they represent). 15114``$symlen(STR)'' 15115 Returns the length of STR. 15116 15117``$symcmp(STR1,STR2)'' 15118 Returns 0 if STR1 == STR2, non-zero otherwise. 15119 15120``$firstch(STR,CH)'' 15121 Returns index of the first occurrence of character constant CH in 15122 STR. 15123 15124``$lastch(STR,CH)'' 15125 Returns index of the last occurrence of character constant CH in 15126 STR. 15127 15128``$isdefed(SYMBOL)'' 15129 Returns zero if the symbol SYMBOL is not in the symbol table, 15130 non-zero otherwise. 15131 15132``$ismember(SYMBOL,LIST)'' 15133 Assign the first member of comma-separated string LIST to SYMBOL; 15134 LIST is reassigned the remainder of the list. Returns zero if 15135 LIST is a null string. Both arguments must be subsyms. 15136 15137``$iscons(EXPR)'' 15138 Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal, 15139 4 if a character, 5 if decimal, and zero if not an integer. 15140 15141``$isname(NAME)'' 15142 Returns 1 if NAME is a valid symbol name, zero otherwise. 15143 15144``$isreg(REG)'' 15145 Returns 1 if REG is a valid predefined register name (AR0-AR7 15146 only). 15147 15148``$structsz(STAG)'' 15149 Returns the size of the structure or union represented by STAG. 15150 15151``$structacc(STAG)'' 15152 Returns the reference point of the structure or union represented 15153 by STAG. Always returns zero. 15154 15155 15156 15157File: as.info, Node: TIC54X-MMRegs, Prev: TIC54X-Macros, Up: TIC54X-Dependent 15158 151599.31.11 Memory-mapped Registers 15160------------------------------- 15161 15162The following symbols are recognized as memory-mapped registers: 15163 15164 15165 15166File: as.info, Node: Z80-Dependent, Next: Z8000-Dependent, Prev: Xtensa-Dependent, Up: Machine Dependencies 15167 151689.32 Z80 Dependent Features 15169=========================== 15170 15171* Menu: 15172 15173* Z80 Options:: Options 15174* Z80 Syntax:: Syntax 15175* Z80 Floating Point:: Floating Point 15176* Z80 Directives:: Z80 Machine Directives 15177* Z80 Opcodes:: Opcodes 15178 15179 15180File: as.info, Node: Z80 Options, Next: Z80 Syntax, Up: Z80-Dependent 15181 151829.32.1 Options 15183-------------- 15184 15185The Zilog Z80 and Ascii R800 version of `as' have a few machine 15186dependent options. 15187`-z80' 15188 Produce code for the Z80 processor. There are additional options to 15189 request warnings and error messages for undocumented instructions. 15190 15191`-ignore-undocumented-instructions' 15192`-Wnud' 15193 Silently assemble undocumented Z80-instructions that have been 15194 adopted as documented R800-instructions. 15195 15196`-ignore-unportable-instructions' 15197`-Wnup' 15198 Silently assemble all undocumented Z80-instructions. 15199 15200`-warn-undocumented-instructions' 15201`-Wud' 15202 Issue warnings for undocumented Z80-instructions that work on 15203 R800, do not assemble other undocumented instructions without 15204 warning. 15205 15206`-warn-unportable-instructions' 15207`-Wup' 15208 Issue warnings for other undocumented Z80-instructions, do not 15209 treat any undocumented instructions as errors. 15210 15211`-forbid-undocumented-instructions' 15212`-Fud' 15213 Treat all undocumented z80-instructions as errors. 15214 15215`-forbid-unportable-instructions' 15216`-Fup' 15217 Treat undocumented z80-instructions that do not work on R800 as 15218 errors. 15219 15220`-r800' 15221 Produce code for the R800 processor. The assembler does not support 15222 undocumented instructions for the R800. In line with common 15223 practice, `as' uses Z80 instruction names for the R800 processor, 15224 as far as they exist. 15225 15226 15227File: as.info, Node: Z80 Syntax, Next: Z80 Floating Point, Prev: Z80 Options, Up: Z80-Dependent 15228 152299.32.2 Syntax 15230------------- 15231 15232The assembler syntax closely follows the 'Z80 family CPU User Manual' by 15233Zilog. In expressions a single `=' may be used as "is equal to" 15234comparison operator. 15235 15236 Suffices can be used to indicate the radix of integer constants; `H' 15237or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o' 15238for octal, and `B' for binary. 15239 15240 The suffix `b' denotes a backreference to local label. 15241 15242* Menu: 15243 15244* Z80-Chars:: Special Characters 15245* Z80-Regs:: Register Names 15246* Z80-Case:: Case Sensitivity 15247 15248 15249File: as.info, Node: Z80-Chars, Next: Z80-Regs, Up: Z80 Syntax 15250 152519.32.2.1 Special Characters 15252........................... 15253 15254The semicolon `;' is the line comment character; 15255 15256 The dollar sign `$' can be used as a prefix for hexadecimal numbers 15257and as a symbol denoting the current location counter. 15258 15259 A backslash `\' is an ordinary character for the Z80 assembler. 15260 15261 The single quote `'' must be followed by a closing quote. If there 15262is one character in between, it is a character constant, otherwise it is 15263a string constant. 15264 15265 15266File: as.info, Node: Z80-Regs, Next: Z80-Case, Prev: Z80-Chars, Up: Z80 Syntax 15267 152689.32.2.2 Register Names 15269....................... 15270 15271The registers are referred to with the letters assigned to them by 15272Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and 15273most significant octet in `ix', and similarly `iyl' and `iyh' as parts 15274of `iy'. 15275 15276 15277File: as.info, Node: Z80-Case, Prev: Z80-Regs, Up: Z80 Syntax 15278 152799.32.2.3 Case Sensitivity 15280......................... 15281 15282Upper and lower case are equivalent in register names, opcodes, 15283condition codes and assembler directives. The case of letters is 15284significant in labels and symbol names. The case is also important to 15285distinguish the suffix `b' for a backward reference to a local label 15286from the suffix `B' for a number in binary notation. 15287 15288 15289File: as.info, Node: Z80 Floating Point, Next: Z80 Directives, Prev: Z80 Syntax, Up: Z80-Dependent 15290 152919.32.3 Floating Point 15292--------------------- 15293 15294Floating-point numbers are not supported. 15295 15296 15297File: as.info, Node: Z80 Directives, Next: Z80 Opcodes, Prev: Z80 Floating Point, Up: Z80-Dependent 15298 152999.32.4 Z80 Assembler Directives 15300------------------------------- 15301 15302`as' for the Z80 supports some additional directives for compatibility 15303with other assemblers. 15304 15305 These are the additional directives in `as' for the Z80: 15306 15307`db EXPRESSION|STRING[,EXPRESSION|STRING...]' 15308`defb EXPRESSION|STRING[,EXPRESSION|STRING...]' 15309 For each STRING the characters are copied to the object file, for 15310 each other EXPRESSION the value is stored in one byte. A warning 15311 is issued in case of an overflow. 15312 15313`dw EXPRESSION[,EXPRESSION...]' 15314`defw EXPRESSION[,EXPRESSION...]' 15315 For each EXPRESSION the value is stored in two bytes, ignoring 15316 overflow. 15317 15318`d24 EXPRESSION[,EXPRESSION...]' 15319`def24 EXPRESSION[,EXPRESSION...]' 15320 For each EXPRESSION the value is stored in three bytes, ignoring 15321 overflow. 15322 15323`d32 EXPRESSION[,EXPRESSION...]' 15324`def32 EXPRESSION[,EXPRESSION...]' 15325 For each EXPRESSION the value is stored in four bytes, ignoring 15326 overflow. 15327 15328`ds COUNT[, VALUE]' 15329`defs COUNT[, VALUE]' 15330 Fill COUNT bytes in the object file with VALUE, if VALUE is 15331 omitted it defaults to zero. 15332 15333`SYMBOL equ EXPRESSION' 15334`SYMBOL defl EXPRESSION' 15335 These directives set the value of SYMBOL to EXPRESSION. If `equ' 15336 is used, it is an error if SYMBOL is already defined. Symbols 15337 defined with `equ' are not protected from redefinition. 15338 15339`set' 15340 This is a normal instruction on Z80, and not an assembler 15341 directive. 15342 15343`psect NAME' 15344 A synonym for *Note Section::, no second argument should be given. 15345 15346 15347 15348File: as.info, Node: Z80 Opcodes, Prev: Z80 Directives, Up: Z80-Dependent 15349 153509.32.5 Opcodes 15351-------------- 15352 15353In line with common practice, Z80 mnemonics are used for both the Z80 15354and the R800. 15355 15356 In many instructions it is possible to use one of the half index 15357registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general 15358purpose register. This yields instructions that are documented on the 15359R800 and undocumented on the Z80. Similarly `in f,(c)' is documented 15360on the R800 and undocumented on the Z80. 15361 15362 The assembler also supports the following undocumented 15363Z80-instructions, that have not been adopted in the R800 instruction 15364set: 15365`out (c),0' 15366 Sends zero to the port pointed to by register c. 15367 15368`sli M' 15369 Equivalent to `M = (M<<1)+1', the operand M can be any operand 15370 that is valid for `sla'. One can use `sll' as a synonym for `sli'. 15371 15372`OP (ix+D), R' 15373 This is equivalent to 15374 15375 ld R, (ix+D) 15376 OPC R 15377 ld (ix+D), R 15378 15379 The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc', 15380 `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R' 15381 may be any of `a', `b', `c', `d', `e', `h' and `l'. 15382 15383`OPC (iy+D), R' 15384 As above, but with `iy' instead of `ix'. 15385 15386 The web site at `http://www.z80.info' is a good starting place to 15387find more information on programming the Z80. 15388 15389 15390File: as.info, Node: Z8000-Dependent, Next: Vax-Dependent, Prev: Z80-Dependent, Up: Machine Dependencies 15391 153929.33 Z8000 Dependent Features 15393============================= 15394 15395 The Z8000 as supports both members of the Z8000 family: the 15396unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with 1539724 bit addresses. 15398 15399 When the assembler is in unsegmented mode (specified with the 15400`unsegm' directive), an address takes up one word (16 bit) sized 15401register. When the assembler is in segmented mode (specified with the 15402`segm' directive), a 24-bit address takes up a long (32 bit) register. 15403*Note Assembler Directives for the Z8000: Z8000 Directives, for a list 15404of other Z8000 specific assembler directives. 15405 15406* Menu: 15407 15408* Z8000 Options:: Command-line options for the Z8000 15409* Z8000 Syntax:: Assembler syntax for the Z8000 15410* Z8000 Directives:: Special directives for the Z8000 15411* Z8000 Opcodes:: Opcodes 15412 15413 15414File: as.info, Node: Z8000 Options, Next: Z8000 Syntax, Up: Z8000-Dependent 15415 154169.33.1 Options 15417-------------- 15418 15419`-z8001' 15420 Generate segmented code by default. 15421 15422`-z8002' 15423 Generate unsegmented code by default. 15424 15425 15426File: as.info, Node: Z8000 Syntax, Next: Z8000 Directives, Prev: Z8000 Options, Up: Z8000-Dependent 15427 154289.33.2 Syntax 15429------------- 15430 15431* Menu: 15432 15433* Z8000-Chars:: Special Characters 15434* Z8000-Regs:: Register Names 15435* Z8000-Addressing:: Addressing Modes 15436 15437 15438File: as.info, Node: Z8000-Chars, Next: Z8000-Regs, Up: Z8000 Syntax 15439 154409.33.2.1 Special Characters 15441........................... 15442 15443`!' is the line comment character. 15444 15445 You can use `;' instead of a newline to separate statements. 15446 15447 15448File: as.info, Node: Z8000-Regs, Next: Z8000-Addressing, Prev: Z8000-Chars, Up: Z8000 Syntax 15449 154509.33.2.2 Register Names 15451....................... 15452 15453The Z8000 has sixteen 16 bit registers, numbered 0 to 15. You can refer 15454to different sized groups of registers by register number, with the 15455prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for 1545664 bit registers. You can also refer to the contents of the first 15457eight (of the sixteen 16 bit registers) by bytes. They are named `rlN' 15458and `rhN'. 15459 15460_byte registers_ 15461 rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3 15462 rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7 15463 15464_word registers_ 15465 r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15 15466 15467_long word registers_ 15468 rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14 15469 15470_quad word registers_ 15471 rq0 rq4 rq8 rq12 15472 15473 15474File: as.info, Node: Z8000-Addressing, Prev: Z8000-Regs, Up: Z8000 Syntax 15475 154769.33.2.3 Addressing Modes 15477......................... 15478 15479as understands the following addressing modes for the Z8000: 15480 15481`rlN' 15482`rhN' 15483`rN' 15484`rrN' 15485`rqN' 15486 Register direct: 8bit, 16bit, 32bit, and 64bit registers. 15487 15488`@rN' 15489`@rrN' 15490 Indirect register: @rrN in segmented mode, @rN in unsegmented 15491 mode. 15492 15493`ADDR' 15494 Direct: the 16 bit or 24 bit address (depending on whether the 15495 assembler is in segmented or unsegmented mode) of the operand is 15496 in the instruction. 15497 15498`address(rN)' 15499 Indexed: the 16 or 24 bit address is added to the 16 bit register 15500 to produce the final address in memory of the operand. 15501 15502`rN(#IMM)' 15503`rrN(#IMM)' 15504 Base Address: the 16 or 24 bit register is added to the 16 bit sign 15505 extended immediate displacement to produce the final address in 15506 memory of the operand. 15507 15508`rN(rM)' 15509`rrN(rM)' 15510 Base Index: the 16 or 24 bit register rN or rrN is added to the 15511 sign extended 16 bit index register rM to produce the final 15512 address in memory of the operand. 15513 15514`#XX' 15515 Immediate data XX. 15516 15517 15518File: as.info, Node: Z8000 Directives, Next: Z8000 Opcodes, Prev: Z8000 Syntax, Up: Z8000-Dependent 15519 155209.33.3 Assembler Directives for the Z8000 15521----------------------------------------- 15522 15523The Z8000 port of as includes additional assembler directives, for 15524compatibility with other Z8000 assemblers. These do not begin with `.' 15525(unlike the ordinary as directives). 15526 15527`segm' 15528`.z8001' 15529 Generate code for the segmented Z8001. 15530 15531`unsegm' 15532`.z8002' 15533 Generate code for the unsegmented Z8002. 15534 15535`name' 15536 Synonym for `.file' 15537 15538`global' 15539 Synonym for `.global' 15540 15541`wval' 15542 Synonym for `.word' 15543 15544`lval' 15545 Synonym for `.long' 15546 15547`bval' 15548 Synonym for `.byte' 15549 15550`sval' 15551 Assemble a string. `sval' expects one string literal, delimited by 15552 single quotes. It assembles each byte of the string into 15553 consecutive addresses. You can use the escape sequence `%XX' 15554 (where XX represents a two-digit hexadecimal number) to represent 15555 the character whose ASCII value is XX. Use this feature to 15556 describe single quote and other characters that may not appear in 15557 string literals as themselves. For example, the C statement 15558 `char *a = "he said \"it's 50% off\"";' is represented in Z8000 15559 assembly language (shown with the assembler output in hex at the 15560 left) as 15561 15562 68652073 sval 'he said %22it%27s 50%25 off%22%00' 15563 61696420 15564 22697427 15565 73203530 15566 25206F66 15567 662200 15568 15569`rsect' 15570 synonym for `.section' 15571 15572`block' 15573 synonym for `.space' 15574 15575`even' 15576 special case of `.align'; aligns output to even byte boundary. 15577 15578 15579File: as.info, Node: Z8000 Opcodes, Prev: Z8000 Directives, Up: Z8000-Dependent 15580 155819.33.4 Opcodes 15582-------------- 15583 15584For detailed information on the Z8000 machine instruction set, see 15585`Z8000 Technical Manual'. 15586 15587 The following table summarizes the opcodes and their arguments: 15588 15589 rs 16 bit source register 15590 rd 16 bit destination register 15591 rbs 8 bit source register 15592 rbd 8 bit destination register 15593 rrs 32 bit source register 15594 rrd 32 bit destination register 15595 rqs 64 bit source register 15596 rqd 64 bit destination register 15597 addr 16/24 bit address 15598 imm immediate data 15599 15600 adc rd,rs clrb addr cpsir @rd,@rs,rr,cc 15601 adcb rbd,rbs clrb addr(rd) cpsirb @rd,@rs,rr,cc 15602 add rd,@rs clrb rbd dab rbd 15603 add rd,addr com @rd dbjnz rbd,disp7 15604 add rd,addr(rs) com addr dec @rd,imm4m1 15605 add rd,imm16 com addr(rd) dec addr(rd),imm4m1 15606 add rd,rs com rd dec addr,imm4m1 15607 addb rbd,@rs comb @rd dec rd,imm4m1 15608 addb rbd,addr comb addr decb @rd,imm4m1 15609 addb rbd,addr(rs) comb addr(rd) decb addr(rd),imm4m1 15610 addb rbd,imm8 comb rbd decb addr,imm4m1 15611 addb rbd,rbs comflg flags decb rbd,imm4m1 15612 addl rrd,@rs cp @rd,imm16 di i2 15613 addl rrd,addr cp addr(rd),imm16 div rrd,@rs 15614 addl rrd,addr(rs) cp addr,imm16 div rrd,addr 15615 addl rrd,imm32 cp rd,@rs div rrd,addr(rs) 15616 addl rrd,rrs cp rd,addr div rrd,imm16 15617 and rd,@rs cp rd,addr(rs) div rrd,rs 15618 and rd,addr cp rd,imm16 divl rqd,@rs 15619 and rd,addr(rs) cp rd,rs divl rqd,addr 15620 and rd,imm16 cpb @rd,imm8 divl rqd,addr(rs) 15621 and rd,rs cpb addr(rd),imm8 divl rqd,imm32 15622 andb rbd,@rs cpb addr,imm8 divl rqd,rrs 15623 andb rbd,addr cpb rbd,@rs djnz rd,disp7 15624 andb rbd,addr(rs) cpb rbd,addr ei i2 15625 andb rbd,imm8 cpb rbd,addr(rs) ex rd,@rs 15626 andb rbd,rbs cpb rbd,imm8 ex rd,addr 15627 bit @rd,imm4 cpb rbd,rbs ex rd,addr(rs) 15628 bit addr(rd),imm4 cpd rd,@rs,rr,cc ex rd,rs 15629 bit addr,imm4 cpdb rbd,@rs,rr,cc exb rbd,@rs 15630 bit rd,imm4 cpdr rd,@rs,rr,cc exb rbd,addr 15631 bit rd,rs cpdrb rbd,@rs,rr,cc exb rbd,addr(rs) 15632 bitb @rd,imm4 cpi rd,@rs,rr,cc exb rbd,rbs 15633 bitb addr(rd),imm4 cpib rbd,@rs,rr,cc ext0e imm8 15634 bitb addr,imm4 cpir rd,@rs,rr,cc ext0f imm8 15635 bitb rbd,imm4 cpirb rbd,@rs,rr,cc ext8e imm8 15636 bitb rbd,rs cpl rrd,@rs ext8f imm8 15637 bpt cpl rrd,addr exts rrd 15638 call @rd cpl rrd,addr(rs) extsb rd 15639 call addr cpl rrd,imm32 extsl rqd 15640 call addr(rd) cpl rrd,rrs halt 15641 calr disp12 cpsd @rd,@rs,rr,cc in rd,@rs 15642 clr @rd cpsdb @rd,@rs,rr,cc in rd,imm16 15643 clr addr cpsdr @rd,@rs,rr,cc inb rbd,@rs 15644 clr addr(rd) cpsdrb @rd,@rs,rr,cc inb rbd,imm16 15645 clr rd cpsi @rd,@rs,rr,cc inc @rd,imm4m1 15646 clrb @rd cpsib @rd,@rs,rr,cc inc addr(rd),imm4m1 15647 inc addr,imm4m1 ldb rbd,rs(rx) mult rrd,addr(rs) 15648 inc rd,imm4m1 ldb rd(imm16),rbs mult rrd,imm16 15649 incb @rd,imm4m1 ldb rd(rx),rbs mult rrd,rs 15650 incb addr(rd),imm4m1 ldctl ctrl,rs multl rqd,@rs 15651 incb addr,imm4m1 ldctl rd,ctrl multl rqd,addr 15652 incb rbd,imm4m1 ldd @rs,@rd,rr multl rqd,addr(rs) 15653 ind @rd,@rs,ra lddb @rs,@rd,rr multl rqd,imm32 15654 indb @rd,@rs,rba lddr @rs,@rd,rr multl rqd,rrs 15655 inib @rd,@rs,ra lddrb @rs,@rd,rr neg @rd 15656 inibr @rd,@rs,ra ldi @rd,@rs,rr neg addr 15657 iret ldib @rd,@rs,rr neg addr(rd) 15658 jp cc,@rd ldir @rd,@rs,rr neg rd 15659 jp cc,addr ldirb @rd,@rs,rr negb @rd 15660 jp cc,addr(rd) ldk rd,imm4 negb addr 15661 jr cc,disp8 ldl @rd,rrs negb addr(rd) 15662 ld @rd,imm16 ldl addr(rd),rrs negb rbd 15663 ld @rd,rs ldl addr,rrs nop 15664 ld addr(rd),imm16 ldl rd(imm16),rrs or rd,@rs 15665 ld addr(rd),rs ldl rd(rx),rrs or rd,addr 15666 ld addr,imm16 ldl rrd,@rs or rd,addr(rs) 15667 ld addr,rs ldl rrd,addr or rd,imm16 15668 ld rd(imm16),rs ldl rrd,addr(rs) or rd,rs 15669 ld rd(rx),rs ldl rrd,imm32 orb rbd,@rs 15670 ld rd,@rs ldl rrd,rrs orb rbd,addr 15671 ld rd,addr ldl rrd,rs(imm16) orb rbd,addr(rs) 15672 ld rd,addr(rs) ldl rrd,rs(rx) orb rbd,imm8 15673 ld rd,imm16 ldm @rd,rs,n orb rbd,rbs 15674 ld rd,rs ldm addr(rd),rs,n out @rd,rs 15675 ld rd,rs(imm16) ldm addr,rs,n out imm16,rs 15676 ld rd,rs(rx) ldm rd,@rs,n outb @rd,rbs 15677 lda rd,addr ldm rd,addr(rs),n outb imm16,rbs 15678 lda rd,addr(rs) ldm rd,addr,n outd @rd,@rs,ra 15679 lda rd,rs(imm16) ldps @rs outdb @rd,@rs,rba 15680 lda rd,rs(rx) ldps addr outib @rd,@rs,ra 15681 ldar rd,disp16 ldps addr(rs) outibr @rd,@rs,ra 15682 ldb @rd,imm8 ldr disp16,rs pop @rd,@rs 15683 ldb @rd,rbs ldr rd,disp16 pop addr(rd),@rs 15684 ldb addr(rd),imm8 ldrb disp16,rbs pop addr,@rs 15685 ldb addr(rd),rbs ldrb rbd,disp16 pop rd,@rs 15686 ldb addr,imm8 ldrl disp16,rrs popl @rd,@rs 15687 ldb addr,rbs ldrl rrd,disp16 popl addr(rd),@rs 15688 ldb rbd,@rs mbit popl addr,@rs 15689 ldb rbd,addr mreq rd popl rrd,@rs 15690 ldb rbd,addr(rs) mres push @rd,@rs 15691 ldb rbd,imm8 mset push @rd,addr 15692 ldb rbd,rbs mult rrd,@rs push @rd,addr(rs) 15693 ldb rbd,rs(imm16) mult rrd,addr push @rd,imm16 15694 push @rd,rs set addr,imm4 subl rrd,imm32 15695 pushl @rd,@rs set rd,imm4 subl rrd,rrs 15696 pushl @rd,addr set rd,rs tcc cc,rd 15697 pushl @rd,addr(rs) setb @rd,imm4 tccb cc,rbd 15698 pushl @rd,rrs setb addr(rd),imm4 test @rd 15699 res @rd,imm4 setb addr,imm4 test addr 15700 res addr(rd),imm4 setb rbd,imm4 test addr(rd) 15701 res addr,imm4 setb rbd,rs test rd 15702 res rd,imm4 setflg imm4 testb @rd 15703 res rd,rs sinb rbd,imm16 testb addr 15704 resb @rd,imm4 sinb rd,imm16 testb addr(rd) 15705 resb addr(rd),imm4 sind @rd,@rs,ra testb rbd 15706 resb addr,imm4 sindb @rd,@rs,rba testl @rd 15707 resb rbd,imm4 sinib @rd,@rs,ra testl addr 15708 resb rbd,rs sinibr @rd,@rs,ra testl addr(rd) 15709 resflg imm4 sla rd,imm8 testl rrd 15710 ret cc slab rbd,imm8 trdb @rd,@rs,rba 15711 rl rd,imm1or2 slal rrd,imm8 trdrb @rd,@rs,rba 15712 rlb rbd,imm1or2 sll rd,imm8 trib @rd,@rs,rbr 15713 rlc rd,imm1or2 sllb rbd,imm8 trirb @rd,@rs,rbr 15714 rlcb rbd,imm1or2 slll rrd,imm8 trtdrb @ra,@rb,rbr 15715 rldb rbb,rba sout imm16,rs trtib @ra,@rb,rr 15716 rr rd,imm1or2 soutb imm16,rbs trtirb @ra,@rb,rbr 15717 rrb rbd,imm1or2 soutd @rd,@rs,ra trtrb @ra,@rb,rbr 15718 rrc rd,imm1or2 soutdb @rd,@rs,rba tset @rd 15719 rrcb rbd,imm1or2 soutib @rd,@rs,ra tset addr 15720 rrdb rbb,rba soutibr @rd,@rs,ra tset addr(rd) 15721 rsvd36 sra rd,imm8 tset rd 15722 rsvd38 srab rbd,imm8 tsetb @rd 15723 rsvd78 sral rrd,imm8 tsetb addr 15724 rsvd7e srl rd,imm8 tsetb addr(rd) 15725 rsvd9d srlb rbd,imm8 tsetb rbd 15726 rsvd9f srll rrd,imm8 xor rd,@rs 15727 rsvdb9 sub rd,@rs xor rd,addr 15728 rsvdbf sub rd,addr xor rd,addr(rs) 15729 sbc rd,rs sub rd,addr(rs) xor rd,imm16 15730 sbcb rbd,rbs sub rd,imm16 xor rd,rs 15731 sc imm8 sub rd,rs xorb rbd,@rs 15732 sda rd,rs subb rbd,@rs xorb rbd,addr 15733 sdab rbd,rs subb rbd,addr xorb rbd,addr(rs) 15734 sdal rrd,rs subb rbd,addr(rs) xorb rbd,imm8 15735 sdl rd,rs subb rbd,imm8 xorb rbd,rbs 15736 sdlb rbd,rs subb rbd,rbs xorb rbd,rbs 15737 sdll rrd,rs subl rrd,@rs 15738 set @rd,imm4 subl rrd,addr 15739 set addr(rd),imm4 subl rrd,addr(rs) 15740 15741 15742File: as.info, Node: Vax-Dependent, Prev: Z8000-Dependent, Up: Machine Dependencies 15743 157449.34 VAX Dependent Features 15745=========================== 15746 15747* Menu: 15748 15749* VAX-Opts:: VAX Command-Line Options 15750* VAX-float:: VAX Floating Point 15751* VAX-directives:: Vax Machine Directives 15752* VAX-opcodes:: VAX Opcodes 15753* VAX-branch:: VAX Branch Improvement 15754* VAX-operands:: VAX Operands 15755* VAX-no:: Not Supported on VAX 15756 15757 15758File: as.info, Node: VAX-Opts, Next: VAX-float, Up: Vax-Dependent 15759 157609.34.1 VAX Command-Line Options 15761------------------------------- 15762 15763The Vax version of `as' accepts any of the following options, gives a 15764warning message that the option was ignored and proceeds. These 15765options are for compatibility with scripts designed for other people's 15766assemblers. 15767 15768``-D' (Debug)' 15769``-S' (Symbol Table)' 15770``-T' (Token Trace)' 15771 These are obsolete options used to debug old assemblers. 15772 15773``-d' (Displacement size for JUMPs)' 15774 This option expects a number following the `-d'. Like options 15775 that expect filenames, the number may immediately follow the `-d' 15776 (old standard) or constitute the whole of the command line 15777 argument that follows `-d' (GNU standard). 15778 15779``-V' (Virtualize Interpass Temporary File)' 15780 Some other assemblers use a temporary file. This option commanded 15781 them to keep the information in active memory rather than in a 15782 disk file. `as' always does this, so this option is redundant. 15783 15784``-J' (JUMPify Longer Branches)' 15785 Many 32-bit computers permit a variety of branch instructions to 15786 do the same job. Some of these instructions are short (and fast) 15787 but have a limited range; others are long (and slow) but can 15788 branch anywhere in virtual memory. Often there are 3 flavors of 15789 branch: short, medium and long. Some other assemblers would emit 15790 short and medium branches, unless told by this option to emit 15791 short and long branches. 15792 15793``-t' (Temporary File Directory)' 15794 Some other assemblers may use a temporary file, and this option 15795 takes a filename being the directory to site the temporary file. 15796 Since `as' does not use a temporary disk file, this option makes 15797 no difference. `-t' needs exactly one filename. 15798 15799 The Vax version of the assembler accepts additional options when 15800compiled for VMS: 15801 15802`-h N' 15803 External symbol or section (used for global variables) names are 15804 not case sensitive on VAX/VMS and always mapped to upper case. 15805 This is contrary to the C language definition which explicitly 15806 distinguishes upper and lower case. To implement a standard 15807 conforming C compiler, names must be changed (mapped) to preserve 15808 the case information. The default mapping is to convert all lower 15809 case characters to uppercase and adding an underscore followed by 15810 a 6 digit hex value, representing a 24 digit binary value. The 15811 one digits in the binary value represent which characters are 15812 uppercase in the original symbol name. 15813 15814 The `-h N' option determines how we map names. This takes several 15815 values. No `-h' switch at all allows case hacking as described 15816 above. A value of zero (`-h0') implies names should be upper 15817 case, and inhibits the case hack. A value of 2 (`-h2') implies 15818 names should be all lower case, with no case hack. A value of 3 15819 (`-h3') implies that case should be preserved. The value 1 is 15820 unused. The `-H' option directs `as' to display every mapped 15821 symbol during assembly. 15822 15823 Symbols whose names include a dollar sign `$' are exceptions to the 15824 general name mapping. These symbols are normally only used to 15825 reference VMS library names. Such symbols are always mapped to 15826 upper case. 15827 15828`-+' 15829 The `-+' option causes `as' to truncate any symbol name larger 15830 than 31 characters. The `-+' option also prevents some code 15831 following the `_main' symbol normally added to make the object 15832 file compatible with Vax-11 "C". 15833 15834`-1' 15835 This option is ignored for backward compatibility with `as' 15836 version 1.x. 15837 15838`-H' 15839 The `-H' option causes `as' to print every symbol which was 15840 changed by case mapping. 15841 15842 15843File: as.info, Node: VAX-float, Next: VAX-directives, Prev: VAX-Opts, Up: Vax-Dependent 15844 158459.34.2 VAX Floating Point 15846------------------------- 15847 15848Conversion of flonums to floating point is correct, and compatible with 15849previous assemblers. Rounding is towards zero if the remainder is 15850exactly half the least significant bit. 15851 15852 `D', `F', `G' and `H' floating point formats are understood. 15853 15854 Immediate floating literals (_e.g._ `S`$6.9') are rendered 15855correctly. Again, rounding is towards zero in the boundary case. 15856 15857 The `.float' directive produces `f' format numbers. The `.double' 15858directive produces `d' format numbers. 15859 15860 15861File: as.info, Node: VAX-directives, Next: VAX-opcodes, Prev: VAX-float, Up: Vax-Dependent 15862 158639.34.3 Vax Machine Directives 15864----------------------------- 15865 15866The Vax version of the assembler supports four directives for 15867generating Vax floating point constants. They are described in the 15868table below. 15869 15870`.dfloat' 15871 This expects zero or more flonums, separated by commas, and 15872 assembles Vax `d' format 64-bit floating point constants. 15873 15874`.ffloat' 15875 This expects zero or more flonums, separated by commas, and 15876 assembles Vax `f' format 32-bit floating point constants. 15877 15878`.gfloat' 15879 This expects zero or more flonums, separated by commas, and 15880 assembles Vax `g' format 64-bit floating point constants. 15881 15882`.hfloat' 15883 This expects zero or more flonums, separated by commas, and 15884 assembles Vax `h' format 128-bit floating point constants. 15885 15886 15887 15888File: as.info, Node: VAX-opcodes, Next: VAX-branch, Prev: VAX-directives, Up: Vax-Dependent 15889 158909.34.4 VAX Opcodes 15891------------------ 15892 15893All DEC mnemonics are supported. Beware that `case...' instructions 15894have exactly 3 operands. The dispatch table that follows the `case...' 15895instruction should be made with `.word' statements. This is compatible 15896with all unix assemblers we know of. 15897 15898 15899File: as.info, Node: VAX-branch, Next: VAX-operands, Prev: VAX-opcodes, Up: Vax-Dependent 15900 159019.34.5 VAX Branch Improvement 15902----------------------------- 15903 15904Certain pseudo opcodes are permitted. They are for branch 15905instructions. They expand to the shortest branch instruction that 15906reaches the target. Generally these mnemonics are made by substituting 15907`j' for `b' at the start of a DEC mnemonic. This feature is included 15908both for compatibility and to help compilers. If you do not need this 15909feature, avoid these opcodes. Here are the mnemonics, and the code 15910they can expand into. 15911 15912`jbsb' 15913 `Jsb' is already an instruction mnemonic, so we chose `jbsb'. 15914 (byte displacement) 15915 `bsbb ...' 15916 15917 (word displacement) 15918 `bsbw ...' 15919 15920 (long displacement) 15921 `jsb ...' 15922 15923`jbr' 15924`jr' 15925 Unconditional branch. 15926 (byte displacement) 15927 `brb ...' 15928 15929 (word displacement) 15930 `brw ...' 15931 15932 (long displacement) 15933 `jmp ...' 15934 15935`jCOND' 15936 COND may be any one of the conditional branches `neq', `nequ', 15937 `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs', 15938 `gequ', `cc', `lssu', `cs'. COND may also be one of the bit tests 15939 `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs', 15940 `lbc'. NOTCOND is the opposite condition to COND. 15941 (byte displacement) 15942 `bCOND ...' 15943 15944 (word displacement) 15945 `bNOTCOND foo ; brw ... ; foo:' 15946 15947 (long displacement) 15948 `bNOTCOND foo ; jmp ... ; foo:' 15949 15950`jacbX' 15951 X may be one of `b d f g h l w'. 15952 (word displacement) 15953 `OPCODE ...' 15954 15955 (long displacement) 15956 OPCODE ..., foo ; 15957 brb bar ; 15958 foo: jmp ... ; 15959 bar: 15960 15961`jaobYYY' 15962 YYY may be one of `lss leq'. 15963 15964`jsobZZZ' 15965 ZZZ may be one of `geq gtr'. 15966 (byte displacement) 15967 `OPCODE ...' 15968 15969 (word displacement) 15970 OPCODE ..., foo ; 15971 brb bar ; 15972 foo: brw DESTINATION ; 15973 bar: 15974 15975 (long displacement) 15976 OPCODE ..., foo ; 15977 brb bar ; 15978 foo: jmp DESTINATION ; 15979 bar: 15980 15981`aobleq' 15982`aoblss' 15983`sobgeq' 15984`sobgtr' 15985 15986 (byte displacement) 15987 `OPCODE ...' 15988 15989 (word displacement) 15990 OPCODE ..., foo ; 15991 brb bar ; 15992 foo: brw DESTINATION ; 15993 bar: 15994 15995 (long displacement) 15996 OPCODE ..., foo ; 15997 brb bar ; 15998 foo: jmp DESTINATION ; 15999 bar: 16000 16001 16002File: as.info, Node: VAX-operands, Next: VAX-no, Prev: VAX-branch, Up: Vax-Dependent 16003 160049.34.6 VAX Operands 16005------------------- 16006 16007The immediate character is `$' for Unix compatibility, not `#' as DEC 16008writes it. 16009 16010 The indirect character is `*' for Unix compatibility, not `@' as DEC 16011writes it. 16012 16013 The displacement sizing character is ``' (an accent grave) for Unix 16014compatibility, not `^' as DEC writes it. The letter preceding ``' may 16015have either case. `G' is not understood, but all other letters (`b i l 16016s w') are understood. 16017 16018 Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'. Upper 16019and lower case letters are equivalent. 16020 16021 For instance 16022 tstb *w`$4(r5) 16023 16024 Any expression is permitted in an operand. Operands are comma 16025separated. 16026 16027 16028File: as.info, Node: VAX-no, Prev: VAX-operands, Up: Vax-Dependent 16029 160309.34.7 Not Supported on VAX 16031--------------------------- 16032 16033Vax bit fields can not be assembled with `as'. Someone can add the 16034required code if they really need it. 16035 16036 16037File: as.info, Node: V850-Dependent, Next: Xtensa-Dependent, Prev: TIC54X-Dependent, Up: Machine Dependencies 16038 160399.35 v850 Dependent Features 16040============================ 16041 16042* Menu: 16043 16044* V850 Options:: Options 16045* V850 Syntax:: Syntax 16046* V850 Floating Point:: Floating Point 16047* V850 Directives:: V850 Machine Directives 16048* V850 Opcodes:: Opcodes 16049 16050 16051File: as.info, Node: V850 Options, Next: V850 Syntax, Up: V850-Dependent 16052 160539.35.1 Options 16054-------------- 16055 16056`as' supports the following additional command-line options for the 16057V850 processor family: 16058 16059`-wsigned_overflow' 16060 Causes warnings to be produced when signed immediate values 16061 overflow the space available for then within their opcodes. By 16062 default this option is disabled as it is possible to receive 16063 spurious warnings due to using exact bit patterns as immediate 16064 constants. 16065 16066`-wunsigned_overflow' 16067 Causes warnings to be produced when unsigned immediate values 16068 overflow the space available for then within their opcodes. By 16069 default this option is disabled as it is possible to receive 16070 spurious warnings due to using exact bit patterns as immediate 16071 constants. 16072 16073`-mv850' 16074 Specifies that the assembled code should be marked as being 16075 targeted at the V850 processor. This allows the linker to detect 16076 attempts to link such code with code assembled for other 16077 processors. 16078 16079`-mv850e' 16080 Specifies that the assembled code should be marked as being 16081 targeted at the V850E processor. This allows the linker to detect 16082 attempts to link such code with code assembled for other 16083 processors. 16084 16085`-mv850e1' 16086 Specifies that the assembled code should be marked as being 16087 targeted at the V850E1 processor. This allows the linker to 16088 detect attempts to link such code with code assembled for other 16089 processors. 16090 16091`-mv850any' 16092 Specifies that the assembled code should be marked as being 16093 targeted at the V850 processor but support instructions that are 16094 specific to the extended variants of the process. This allows the 16095 production of binaries that contain target specific code, but 16096 which are also intended to be used in a generic fashion. For 16097 example libgcc.a contains generic routines used by the code 16098 produced by GCC for all versions of the v850 architecture, 16099 together with support routines only used by the V850E architecture. 16100 16101`-mrelax' 16102 Enables relaxation. This allows the .longcall and .longjump pseudo 16103 ops to be used in the assembler source code. These ops label 16104 sections of code which are either a long function call or a long 16105 branch. The assembler will then flag these sections of code and 16106 the linker will attempt to relax them. 16107 16108 16109 16110File: as.info, Node: V850 Syntax, Next: V850 Floating Point, Prev: V850 Options, Up: V850-Dependent 16111 161129.35.2 Syntax 16113------------- 16114 16115* Menu: 16116 16117* V850-Chars:: Special Characters 16118* V850-Regs:: Register Names 16119 16120 16121File: as.info, Node: V850-Chars, Next: V850-Regs, Up: V850 Syntax 16122 161239.35.2.1 Special Characters 16124........................... 16125 16126`#' is the line comment character. 16127 16128 16129File: as.info, Node: V850-Regs, Prev: V850-Chars, Up: V850 Syntax 16130 161319.35.2.2 Register Names 16132....................... 16133 16134`as' supports the following names for registers: 16135`general register 0' 16136 r0, zero 16137 16138`general register 1' 16139 r1 16140 16141`general register 2' 16142 r2, hp 16143 16144`general register 3' 16145 r3, sp 16146 16147`general register 4' 16148 r4, gp 16149 16150`general register 5' 16151 r5, tp 16152 16153`general register 6' 16154 r6 16155 16156`general register 7' 16157 r7 16158 16159`general register 8' 16160 r8 16161 16162`general register 9' 16163 r9 16164 16165`general register 10' 16166 r10 16167 16168`general register 11' 16169 r11 16170 16171`general register 12' 16172 r12 16173 16174`general register 13' 16175 r13 16176 16177`general register 14' 16178 r14 16179 16180`general register 15' 16181 r15 16182 16183`general register 16' 16184 r16 16185 16186`general register 17' 16187 r17 16188 16189`general register 18' 16190 r18 16191 16192`general register 19' 16193 r19 16194 16195`general register 20' 16196 r20 16197 16198`general register 21' 16199 r21 16200 16201`general register 22' 16202 r22 16203 16204`general register 23' 16205 r23 16206 16207`general register 24' 16208 r24 16209 16210`general register 25' 16211 r25 16212 16213`general register 26' 16214 r26 16215 16216`general register 27' 16217 r27 16218 16219`general register 28' 16220 r28 16221 16222`general register 29' 16223 r29 16224 16225`general register 30' 16226 r30, ep 16227 16228`general register 31' 16229 r31, lp 16230 16231`system register 0' 16232 eipc 16233 16234`system register 1' 16235 eipsw 16236 16237`system register 2' 16238 fepc 16239 16240`system register 3' 16241 fepsw 16242 16243`system register 4' 16244 ecr 16245 16246`system register 5' 16247 psw 16248 16249`system register 16' 16250 ctpc 16251 16252`system register 17' 16253 ctpsw 16254 16255`system register 18' 16256 dbpc 16257 16258`system register 19' 16259 dbpsw 16260 16261`system register 20' 16262 ctbp 16263 16264 16265File: as.info, Node: V850 Floating Point, Next: V850 Directives, Prev: V850 Syntax, Up: V850-Dependent 16266 162679.35.3 Floating Point 16268--------------------- 16269 16270The V850 family uses IEEE floating-point numbers. 16271 16272 16273File: as.info, Node: V850 Directives, Next: V850 Opcodes, Prev: V850 Floating Point, Up: V850-Dependent 16274 162759.35.4 V850 Machine Directives 16276------------------------------ 16277 16278`.offset <EXPRESSION>' 16279 Moves the offset into the current section to the specified amount. 16280 16281`.section "name", <type>' 16282 This is an extension to the standard .section directive. It sets 16283 the current section to be <type> and creates an alias for this 16284 section called "name". 16285 16286`.v850' 16287 Specifies that the assembled code should be marked as being 16288 targeted at the V850 processor. This allows the linker to detect 16289 attempts to link such code with code assembled for other 16290 processors. 16291 16292`.v850e' 16293 Specifies that the assembled code should be marked as being 16294 targeted at the V850E processor. This allows the linker to detect 16295 attempts to link such code with code assembled for other 16296 processors. 16297 16298`.v850e1' 16299 Specifies that the assembled code should be marked as being 16300 targeted at the V850E1 processor. This allows the linker to 16301 detect attempts to link such code with code assembled for other 16302 processors. 16303 16304 16305 16306File: as.info, Node: V850 Opcodes, Prev: V850 Directives, Up: V850-Dependent 16307 163089.35.5 Opcodes 16309-------------- 16310 16311`as' implements all the standard V850 opcodes. 16312 16313 `as' also implements the following pseudo ops: 16314 16315`hi0()' 16316 Computes the higher 16 bits of the given expression and stores it 16317 into the immediate operand field of the given instruction. For 16318 example: 16319 16320 `mulhi hi0(here - there), r5, r6' 16321 16322 computes the difference between the address of labels 'here' and 16323 'there', takes the upper 16 bits of this difference, shifts it 16324 down 16 bits and then multiplies it by the lower 16 bits in 16325 register 5, putting the result into register 6. 16326 16327`lo()' 16328 Computes the lower 16 bits of the given expression and stores it 16329 into the immediate operand field of the given instruction. For 16330 example: 16331 16332 `addi lo(here - there), r5, r6' 16333 16334 computes the difference between the address of labels 'here' and 16335 'there', takes the lower 16 bits of this difference and adds it to 16336 register 5, putting the result into register 6. 16337 16338`hi()' 16339 Computes the higher 16 bits of the given expression and then adds 16340 the value of the most significant bit of the lower 16 bits of the 16341 expression and stores the result into the immediate operand field 16342 of the given instruction. For example the following code can be 16343 used to compute the address of the label 'here' and store it into 16344 register 6: 16345 16346 `movhi hi(here), r0, r6' `movea lo(here), r6, r6' 16347 16348 The reason for this special behaviour is that movea performs a sign 16349 extension on its immediate operand. So for example if the address 16350 of 'here' was 0xFFFFFFFF then without the special behaviour of the 16351 hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6, 16352 then the movea instruction would takes its immediate operand, 16353 0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it 16354 into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E). 16355 With the hi() pseudo op adding in the top bit of the lo() pseudo 16356 op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 = 16357 0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 - 16358 the right value. 16359 16360`hilo()' 16361 Computes the 32 bit value of the given expression and stores it 16362 into the immediate operand field of the given instruction (which 16363 must be a mov instruction). For example: 16364 16365 `mov hilo(here), r6' 16366 16367 computes the absolute address of label 'here' and puts the result 16368 into register 6. 16369 16370`sdaoff()' 16371 Computes the offset of the named variable from the start of the 16372 Small Data Area (whoes address is held in register 4, the GP 16373 register) and stores the result as a 16 bit signed value in the 16374 immediate operand field of the given instruction. For example: 16375 16376 `ld.w sdaoff(_a_variable)[gp],r6' 16377 16378 loads the contents of the location pointed to by the label 16379 '_a_variable' into register 6, provided that the label is located 16380 somewhere within +/- 32K of the address held in the GP register. 16381 [Note the linker assumes that the GP register contains a fixed 16382 address set to the address of the label called '__gp'. This can 16383 either be set up automatically by the linker, or specifically set 16384 by using the `--defsym __gp=<value>' command line option]. 16385 16386`tdaoff()' 16387 Computes the offset of the named variable from the start of the 16388 Tiny Data Area (whoes address is held in register 30, the EP 16389 register) and stores the result as a 4,5, 7 or 8 bit unsigned 16390 value in the immediate operand field of the given instruction. 16391 For example: 16392 16393 `sld.w tdaoff(_a_variable)[ep],r6' 16394 16395 loads the contents of the location pointed to by the label 16396 '_a_variable' into register 6, provided that the label is located 16397 somewhere within +256 bytes of the address held in the EP 16398 register. [Note the linker assumes that the EP register contains 16399 a fixed address set to the address of the label called '__ep'. 16400 This can either be set up automatically by the linker, or 16401 specifically set by using the `--defsym __ep=<value>' command line 16402 option]. 16403 16404`zdaoff()' 16405 Computes the offset of the named variable from address 0 and 16406 stores the result as a 16 bit signed value in the immediate 16407 operand field of the given instruction. For example: 16408 16409 `movea zdaoff(_a_variable),zero,r6' 16410 16411 puts the address of the label '_a_variable' into register 6, 16412 assuming that the label is somewhere within the first 32K of 16413 memory. (Strictly speaking it also possible to access the last 16414 32K of memory as well, as the offsets are signed). 16415 16416`ctoff()' 16417 Computes the offset of the named variable from the start of the 16418 Call Table Area (whoes address is helg in system register 20, the 16419 CTBP register) and stores the result a 6 or 16 bit unsigned value 16420 in the immediate field of then given instruction or piece of data. 16421 For example: 16422 16423 `callt ctoff(table_func1)' 16424 16425 will put the call the function whoes address is held in the call 16426 table at the location labeled 'table_func1'. 16427 16428`.longcall `name'' 16429 Indicates that the following sequence of instructions is a long 16430 call to function `name'. The linker will attempt to shorten this 16431 call sequence if `name' is within a 22bit offset of the call. Only 16432 valid if the `-mrelax' command line switch has been enabled. 16433 16434`.longjump `name'' 16435 Indicates that the following sequence of instructions is a long 16436 jump to label `name'. The linker will attempt to shorten this code 16437 sequence if `name' is within a 22bit offset of the jump. Only 16438 valid if the `-mrelax' command line switch has been enabled. 16439 16440 16441 For information on the V850 instruction set, see `V850 Family 1644232-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC. 16443Ltd. 16444 16445 16446File: as.info, Node: Xtensa-Dependent, Next: Z80-Dependent, Prev: V850-Dependent, Up: Machine Dependencies 16447 164489.36 Xtensa Dependent Features 16449============================== 16450 16451 This chapter covers features of the GNU assembler that are specific 16452to the Xtensa architecture. For details about the Xtensa instruction 16453set, please consult the `Xtensa Instruction Set Architecture (ISA) 16454Reference Manual'. 16455 16456* Menu: 16457 16458* Xtensa Options:: Command-line Options. 16459* Xtensa Syntax:: Assembler Syntax for Xtensa Processors. 16460* Xtensa Optimizations:: Assembler Optimizations. 16461* Xtensa Relaxation:: Other Automatic Transformations. 16462* Xtensa Directives:: Directives for Xtensa Processors. 16463 16464 16465File: as.info, Node: Xtensa Options, Next: Xtensa Syntax, Up: Xtensa-Dependent 16466 164679.36.1 Command Line Options 16468--------------------------- 16469 16470The Xtensa version of the GNU assembler supports these special options: 16471 16472`--text-section-literals | --no-text-section-literals' 16473 Control the treatment of literal pools. The default is 16474 `--no-text-section-literals', which places literals in separate 16475 sections in the output file. This allows the literal pool to be 16476 placed in a data RAM/ROM. With `--text-section-literals', the 16477 literals are interspersed in the text section in order to keep 16478 them as close as possible to their references. This may be 16479 necessary for large assembly files, where the literals would 16480 otherwise be out of range of the `L32R' instructions in the text 16481 section. These options only affect literals referenced via 16482 PC-relative `L32R' instructions; literals for absolute mode `L32R' 16483 instructions are handled separately. *Note literal: Literal 16484 Directive. 16485 16486`--absolute-literals | --no-absolute-literals' 16487 Indicate to the assembler whether `L32R' instructions use absolute 16488 or PC-relative addressing. If the processor includes the absolute 16489 addressing option, the default is to use absolute `L32R' 16490 relocations. Otherwise, only the PC-relative `L32R' relocations 16491 can be used. 16492 16493`--target-align | --no-target-align' 16494 Enable or disable automatic alignment to reduce branch penalties 16495 at some expense in code size. *Note Automatic Instruction 16496 Alignment: Xtensa Automatic Alignment. This optimization is 16497 enabled by default. Note that the assembler will always align 16498 instructions like `LOOP' that have fixed alignment requirements. 16499 16500`--longcalls | --no-longcalls' 16501 Enable or disable transformation of call instructions to allow 16502 calls across a greater range of addresses. *Note Function Call 16503 Relaxation: Xtensa Call Relaxation. This option should be used 16504 when call targets can potentially be out of range. It may degrade 16505 both code size and performance, but the linker can generally 16506 optimize away the unnecessary overhead when a call ends up within 16507 range. The default is `--no-longcalls'. 16508 16509`--transform | --no-transform' 16510 Enable or disable all assembler transformations of Xtensa 16511 instructions, including both relaxation and optimization. The 16512 default is `--transform'; `--no-transform' should only be used in 16513 the rare cases when the instructions must be exactly as specified 16514 in the assembly source. Using `--no-transform' causes out of range 16515 instruction operands to be errors. 16516 16517`--rename-section OLDNAME=NEWNAME' 16518 Rename the OLDNAME section to NEWNAME. This option can be used 16519 multiple times to rename multiple sections. 16520 16521 16522File: as.info, Node: Xtensa Syntax, Next: Xtensa Optimizations, Prev: Xtensa Options, Up: Xtensa-Dependent 16523 165249.36.2 Assembler Syntax 16525----------------------- 16526 16527Block comments are delimited by `/*' and `*/'. End of line comments 16528may be introduced with either `#' or `//'. 16529 16530 Instructions consist of a leading opcode or macro name followed by 16531whitespace and an optional comma-separated list of operands: 16532 16533 OPCODE [OPERAND, ...] 16534 16535 Instructions must be separated by a newline or semicolon. 16536 16537 FLIX instructions, which bundle multiple opcodes together in a single 16538instruction, are specified by enclosing the bundled opcodes inside 16539braces: 16540 16541 { 16542 [FORMAT] 16543 OPCODE0 [OPERANDS] 16544 OPCODE1 [OPERANDS] 16545 OPCODE2 [OPERANDS] 16546 ... 16547 } 16548 16549 The opcodes in a FLIX instruction are listed in the same order as the 16550corresponding instruction slots in the TIE format declaration. 16551Directives and labels are not allowed inside the braces of a FLIX 16552instruction. A particular TIE format name can optionally be specified 16553immediately after the opening brace, but this is usually unnecessary. 16554The assembler will automatically search for a format that can encode the 16555specified opcodes, so the format name need only be specified in rare 16556cases where there is more than one applicable format and where it 16557matters which of those formats is used. A FLIX instruction can also be 16558specified on a single line by separating the opcodes with semicolons: 16559 16560 { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... } 16561 16562 If an opcode can only be encoded in a FLIX instruction but is not 16563specified as part of a FLIX bundle, the assembler will choose the 16564smallest format where the opcode can be encoded and will fill unused 16565instruction slots with no-ops. 16566 16567* Menu: 16568 16569* Xtensa Opcodes:: Opcode Naming Conventions. 16570* Xtensa Registers:: Register Naming. 16571 16572 16573File: as.info, Node: Xtensa Opcodes, Next: Xtensa Registers, Up: Xtensa Syntax 16574 165759.36.2.1 Opcode Names 16576..................... 16577 16578See the `Xtensa Instruction Set Architecture (ISA) Reference Manual' 16579for a complete list of opcodes and descriptions of their semantics. 16580 16581 If an opcode name is prefixed with an underscore character (`_'), 16582`as' will not transform that instruction in any way. The underscore 16583prefix disables both optimization (*note Xtensa Optimizations: Xtensa 16584Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa 16585Relaxation.) for that particular instruction. Only use the underscore 16586prefix when it is essential to select the exact opcode produced by the 16587assembler. Using this feature unnecessarily makes the code less 16588efficient by disabling assembler optimization and less flexible by 16589disabling relaxation. 16590 16591 Note that this special handling of underscore prefixes only applies 16592to Xtensa opcodes, not to either built-in macros or user-defined macros. 16593When an underscore prefix is used with a macro (e.g., `_MOV'), it 16594refers to a different macro. The assembler generally provides built-in 16595macros both with and without the underscore prefix, where the underscore 16596versions behave as if the underscore carries through to the instructions 16597in the macros. For example, `_MOV' may expand to `_MOV.N'. 16598 16599 The underscore prefix only applies to individual instructions, not to 16600series of instructions. For example, if a series of instructions have 16601underscore prefixes, the assembler will not transform the individual 16602instructions, but it may insert other instructions between them (e.g., 16603to align a `LOOP' instruction). To prevent the assembler from 16604modifying a series of instructions as a whole, use the `no-transform' 16605directive. *Note transform: Transform Directive. 16606 16607 16608File: as.info, Node: Xtensa Registers, Prev: Xtensa Opcodes, Up: Xtensa Syntax 16609 166109.36.2.2 Register Names 16611....................... 16612 16613The assembly syntax for a register file entry is the "short" name for a 16614TIE register file followed by the index into that register file. For 16615example, the general-purpose `AR' register file has a short name of 16616`a', so these registers are named `a0'...`a15'. As a special feature, 16617`sp' is also supported as a synonym for `a1'. Additional registers may 16618be added by processor configuration options and by designer-defined TIE 16619extensions. An initial `$' character is optional in all register names. 16620 16621 16622File: as.info, Node: Xtensa Optimizations, Next: Xtensa Relaxation, Prev: Xtensa Syntax, Up: Xtensa-Dependent 16623 166249.36.3 Xtensa Optimizations 16625--------------------------- 16626 16627The optimizations currently supported by `as' are generation of density 16628instructions where appropriate and automatic branch target alignment. 16629 16630* Menu: 16631 16632* Density Instructions:: Using Density Instructions. 16633* Xtensa Automatic Alignment:: Automatic Instruction Alignment. 16634 16635 16636File: as.info, Node: Density Instructions, Next: Xtensa Automatic Alignment, Up: Xtensa Optimizations 16637 166389.36.3.1 Using Density Instructions 16639................................... 16640 16641The Xtensa instruction set has a code density option that provides 1664216-bit versions of some of the most commonly used opcodes. Use of these 16643opcodes can significantly reduce code size. When possible, the 16644assembler automatically translates instructions from the core Xtensa 16645instruction set into equivalent instructions from the Xtensa code 16646density option. This translation can be disabled by using underscore 16647prefixes (*note Opcode Names: Xtensa Opcodes.), by using the 16648`--no-transform' command-line option (*note Command Line Options: 16649Xtensa Options.), or by using the `no-transform' directive (*note 16650transform: Transform Directive.). 16651 16652 It is a good idea _not_ to use the density instructions directly. 16653The assembler will automatically select dense instructions where 16654possible. If you later need to use an Xtensa processor without the code 16655density option, the same assembly code will then work without 16656modification. 16657 16658 16659File: as.info, Node: Xtensa Automatic Alignment, Prev: Density Instructions, Up: Xtensa Optimizations 16660 166619.36.3.2 Automatic Instruction Alignment 16662........................................ 16663 16664The Xtensa assembler will automatically align certain instructions, both 16665to optimize performance and to satisfy architectural requirements. 16666 16667 As an optimization to improve performance, the assembler attempts to 16668align branch targets so they do not cross instruction fetch boundaries. 16669(Xtensa processors can be configured with either 32-bit or 64-bit 16670instruction fetch widths.) An instruction immediately following a call 16671is treated as a branch target in this context, because it will be the 16672target of a return from the call. This alignment has the potential to 16673reduce branch penalties at some expense in code size. This 16674optimization is enabled by default. You can disable it with the 16675`--no-target-align' command-line option (*note Command Line Options: 16676Xtensa Options.). 16677 16678 The target alignment optimization is done without adding instructions 16679that could increase the execution time of the program. If there are 16680density instructions in the code preceding a target, the assembler can 16681change the target alignment by widening some of those instructions to 16682the equivalent 24-bit instructions. Extra bytes of padding can be 16683inserted immediately following unconditional jump and return 16684instructions. This approach is usually successful in aligning many, 16685but not all, branch targets. 16686 16687 The `LOOP' family of instructions must be aligned such that the 16688first instruction in the loop body does not cross an instruction fetch 16689boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be 16690on either a 1 or 2 mod 4 byte boundary). The assembler knows about 16691this restriction and inserts the minimal number of 2 or 3 byte no-op 16692instructions to satisfy it. When no-op instructions are added, any 16693label immediately preceding the original loop will be moved in order to 16694refer to the loop instruction, not the newly generated no-op 16695instruction. To preserve binary compatibility across processors with 16696different fetch widths, the assembler conservatively assumes a 32-bit 16697fetch width when aligning `LOOP' instructions (except if the first 16698instruction in the loop is a 64-bit instruction). 16699 16700 Previous versions of the assembler automatically aligned `ENTRY' 16701instructions to 4-byte boundaries, but that alignment is now the 16702programmer's responsibility. 16703 16704 16705File: as.info, Node: Xtensa Relaxation, Next: Xtensa Directives, Prev: Xtensa Optimizations, Up: Xtensa-Dependent 16706 167079.36.4 Xtensa Relaxation 16708------------------------ 16709 16710When an instruction operand is outside the range allowed for that 16711particular instruction field, `as' can transform the code to use a 16712functionally-equivalent instruction or sequence of instructions. This 16713process is known as "relaxation". This is typically done for branch 16714instructions because the distance of the branch targets is not known 16715until assembly-time. The Xtensa assembler offers branch relaxation and 16716also extends this concept to function calls, `MOVI' instructions and 16717other instructions with immediate fields. 16718 16719* Menu: 16720 16721* Xtensa Branch Relaxation:: Relaxation of Branches. 16722* Xtensa Call Relaxation:: Relaxation of Function Calls. 16723* Xtensa Immediate Relaxation:: Relaxation of other Immediate Fields. 16724 16725 16726File: as.info, Node: Xtensa Branch Relaxation, Next: Xtensa Call Relaxation, Up: Xtensa Relaxation 16727 167289.36.4.1 Conditional Branch Relaxation 16729...................................... 16730 16731When the target of a branch is too far away from the branch itself, 16732i.e., when the offset from the branch to the target is too large to fit 16733in the immediate field of the branch instruction, it may be necessary to 16734replace the branch with a branch around a jump. For example, 16735 16736 beqz a2, L 16737 16738 may result in: 16739 16740 bnez.n a2, M 16741 j L 16742 M: 16743 16744 (The `BNEZ.N' instruction would be used in this example only if the 16745density option is available. Otherwise, `BNEZ' would be used.) 16746 16747 This relaxation works well because the unconditional jump instruction 16748has a much larger offset range than the various conditional branches. 16749However, an error will occur if a branch target is beyond the range of a 16750jump instruction. `as' cannot relax unconditional jumps. Similarly, 16751an error will occur if the original input contains an unconditional 16752jump to a target that is out of range. 16753 16754 Branch relaxation is enabled by default. It can be disabled by using 16755underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the 16756`--no-transform' command-line option (*note Command Line Options: 16757Xtensa Options.), or the `no-transform' directive (*note transform: 16758Transform Directive.). 16759 16760 16761File: as.info, Node: Xtensa Call Relaxation, Next: Xtensa Immediate Relaxation, Prev: Xtensa Branch Relaxation, Up: Xtensa Relaxation 16762 167639.36.4.2 Function Call Relaxation 16764................................. 16765 16766Function calls may require relaxation because the Xtensa immediate call 16767instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a 16768PC-relative offset of only 512 Kbytes in either direction. For larger 16769programs, it may be necessary to use indirect calls (`CALLX0', 16770`CALLX4', `CALLX8' and `CALLX12') where the target address is specified 16771in a register. The Xtensa assembler can automatically relax immediate 16772call instructions into indirect call instructions. This relaxation is 16773done by loading the address of the called function into the callee's 16774return address register and then using a `CALLX' instruction. So, for 16775example: 16776 16777 call8 func 16778 16779 might be relaxed to: 16780 16781 .literal .L1, func 16782 l32r a8, .L1 16783 callx8 a8 16784 16785 Because the addresses of targets of function calls are not generally 16786known until link-time, the assembler must assume the worst and relax all 16787the calls to functions in other source files, not just those that really 16788will be out of range. The linker can recognize calls that were 16789unnecessarily relaxed, and it will remove the overhead introduced by the 16790assembler for those cases where direct calls are sufficient. 16791 16792 Call relaxation is disabled by default because it can have a negative 16793effect on both code size and performance, although the linker can 16794usually eliminate the unnecessary overhead. If a program is too large 16795and some of the calls are out of range, function call relaxation can be 16796enabled using the `--longcalls' command-line option or the `longcalls' 16797directive (*note longcalls: Longcalls Directive.). 16798 16799 16800File: as.info, Node: Xtensa Immediate Relaxation, Prev: Xtensa Call Relaxation, Up: Xtensa Relaxation 16801 168029.36.4.3 Other Immediate Field Relaxation 16803......................................... 16804 16805The assembler normally performs the following other relaxations. They 16806can be disabled by using underscore prefixes (*note Opcode Names: 16807Xtensa Opcodes.), the `--no-transform' command-line option (*note 16808Command Line Options: Xtensa Options.), or the `no-transform' directive 16809(*note transform: Transform Directive.). 16810 16811 The `MOVI' machine instruction can only materialize values in the 16812range from -2048 to 2047. Values outside this range are best 16813materialized with `L32R' instructions. Thus: 16814 16815 movi a0, 100000 16816 16817 is assembled into the following machine code: 16818 16819 .literal .L1, 100000 16820 l32r a0, .L1 16821 16822 The `L8UI' machine instruction can only be used with immediate 16823offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine 16824instructions can only be used with offsets from 0 to 510. The `L32I' 16825machine instruction can only be used with offsets from 0 to 1020. A 16826load offset outside these ranges can be materialized with an `L32R' 16827instruction if the destination register of the load is different than 16828the source address register. For example: 16829 16830 l32i a1, a0, 2040 16831 16832 is translated to: 16833 16834 .literal .L1, 2040 16835 l32r a1, .L1 16836 add a1, a0, a1 16837 l32i a1, a1, 0 16838 16839If the load destination and source address register are the same, an 16840out-of-range offset causes an error. 16841 16842 The Xtensa `ADDI' instruction only allows immediate operands in the 16843range from -128 to 127. There are a number of alternate instruction 16844sequences for the `ADDI' operation. First, if the immediate is 0, the 16845`ADDI' will be turned into a `MOV.N' instruction (or the equivalent 16846`OR' instruction if the code density option is not available). If the 16847`ADDI' immediate is outside of the range -128 to 127, but inside the 16848range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI' 16849sequence will be used. Finally, if the immediate is outside of this 16850range and a free register is available, an `L32R'/`ADD' sequence will 16851be used with a literal allocated from the literal pool. 16852 16853 For example: 16854 16855 addi a5, a6, 0 16856 addi a5, a6, 512 16857 addi a5, a6, 513 16858 addi a5, a6, 50000 16859 16860 is assembled into the following: 16861 16862 .literal .L1, 50000 16863 mov.n a5, a6 16864 addmi a5, a6, 0x200 16865 addmi a5, a6, 0x200 16866 addi a5, a5, 1 16867 l32r a5, .L1 16868 add a5, a6, a5 16869 16870 16871File: as.info, Node: Xtensa Directives, Prev: Xtensa Relaxation, Up: Xtensa-Dependent 16872 168739.36.5 Directives 16874----------------- 16875 16876The Xtensa assembler supports a region-based directive syntax: 16877 16878 .begin DIRECTIVE [OPTIONS] 16879 ... 16880 .end DIRECTIVE 16881 16882 All the Xtensa-specific directives that apply to a region of code use 16883this syntax. 16884 16885 The directive applies to code between the `.begin' and the `.end'. 16886The state of the option after the `.end' reverts to what it was before 16887the `.begin'. A nested `.begin'/`.end' region can further change the 16888state of the directive without having to be aware of its outer state. 16889For example, consider: 16890 16891 .begin no-transform 16892 L: add a0, a1, a2 16893 .begin transform 16894 M: add a0, a1, a2 16895 .end transform 16896 N: add a0, a1, a2 16897 .end no-transform 16898 16899 The `ADD' opcodes at `L' and `N' in the outer `no-transform' region 16900both result in `ADD' machine instructions, but the assembler selects an 16901`ADD.N' instruction for the `ADD' at `M' in the inner `transform' 16902region. 16903 16904 The advantage of this style is that it works well inside macros 16905which can preserve the context of their callers. 16906 16907 The following directives are available: 16908 16909* Menu: 16910 16911* Schedule Directive:: Enable instruction scheduling. 16912* Longcalls Directive:: Use Indirect Calls for Greater Range. 16913* Transform Directive:: Disable All Assembler Transformations. 16914* Literal Directive:: Intermix Literals with Instructions. 16915* Literal Position Directive:: Specify Inline Literal Pool Locations. 16916* Literal Prefix Directive:: Specify Literal Section Name Prefix. 16917* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals. 16918 16919 16920File: as.info, Node: Schedule Directive, Next: Longcalls Directive, Up: Xtensa Directives 16921 169229.36.5.1 schedule 16923................. 16924 16925The `schedule' directive is recognized only for compatibility with 16926Tensilica's assembler. 16927 16928 .begin [no-]schedule 16929 .end [no-]schedule 16930 16931 This directive is ignored and has no effect on `as'. 16932 16933 16934File: as.info, Node: Longcalls Directive, Next: Transform Directive, Prev: Schedule Directive, Up: Xtensa Directives 16935 169369.36.5.2 longcalls 16937.................. 16938 16939The `longcalls' directive enables or disables function call relaxation. 16940*Note Function Call Relaxation: Xtensa Call Relaxation. 16941 16942 .begin [no-]longcalls 16943 .end [no-]longcalls 16944 16945 Call relaxation is disabled by default unless the `--longcalls' 16946command-line option is specified. The `longcalls' directive overrides 16947the default determined by the command-line options. 16948 16949 16950File: as.info, Node: Transform Directive, Next: Literal Directive, Prev: Longcalls Directive, Up: Xtensa Directives 16951 169529.36.5.3 transform 16953.................. 16954 16955This directive enables or disables all assembler transformation, 16956including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and 16957optimization (*note Xtensa Optimizations: Xtensa Optimizations.). 16958 16959 .begin [no-]transform 16960 .end [no-]transform 16961 16962 Transformations are enabled by default unless the `--no-transform' 16963option is used. The `transform' directive overrides the default 16964determined by the command-line options. An underscore opcode prefix, 16965disabling transformation of that opcode, always takes precedence over 16966both directives and command-line flags. 16967 16968 16969File: as.info, Node: Literal Directive, Next: Literal Position Directive, Prev: Transform Directive, Up: Xtensa Directives 16970 169719.36.5.4 literal 16972................ 16973 16974The `.literal' directive is used to define literal pool data, i.e., 16975read-only 32-bit data accessed via `L32R' instructions. 16976 16977 .literal LABEL, VALUE[, VALUE...] 16978 16979 This directive is similar to the standard `.word' directive, except 16980that the actual location of the literal data is determined by the 16981assembler and linker, not by the position of the `.literal' directive. 16982Using this directive gives the assembler freedom to locate the literal 16983data in the most appropriate place and possibly to combine identical 16984literals. For example, the code: 16985 16986 entry sp, 40 16987 .literal .L1, sym 16988 l32r a4, .L1 16989 16990 can be used to load a pointer to the symbol `sym' into register 16991`a4'. The value of `sym' will not be placed between the `ENTRY' and 16992`L32R' instructions; instead, the assembler puts the data in a literal 16993pool. 16994 16995 Literal pools are placed by default in separate literal sections; 16996however, when using the `--text-section-literals' option (*note Command 16997Line Options: Xtensa Options.), the literal pools for PC-relative mode 16998`L32R' instructions are placed in the current section.(1) These text 16999section literal pools are created automatically before `ENTRY' 17000instructions and manually after `.literal_position' directives (*note 17001literal_position: Literal Position Directive.). If there are no 17002preceding `ENTRY' instructions, explicit `.literal_position' directives 17003must be used to place the text section literal pools; otherwise, `as' 17004will report an error. 17005 17006 When literals are placed in separate sections, the literal section 17007names are derived from the names of the sections where the literals are 17008defined. The base literal section names are `.literal' for PC-relative 17009mode `L32R' instructions and `.lit4' for absolute mode `L32R' 17010instructions (*note absolute-literals: Absolute Literals Directive.). 17011These base names are used for literals defined in the default `.text' 17012section. For literals defined in other sections or within the scope of 17013a `literal_prefix' directive (*note literal_prefix: Literal Prefix 17014Directive.), the following rules determine the literal section name: 17015 17016 1. If the current section is a member of a section group, the literal 17017 section name includes the group name as a suffix to the base 17018 `.literal' or `.lit4' name, with a period to separate the base 17019 name and group name. The literal section is also made a member of 17020 the group. 17021 17022 2. If the current section name (or `literal_prefix' value) begins with 17023 "`.gnu.linkonce.KIND.'", the literal section name is formed by 17024 replacing "`.KIND'" with the base `.literal' or `.lit4' name. For 17025 example, for literals defined in a section named 17026 `.gnu.linkonce.t.func', the literal section will be 17027 `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'. 17028 17029 3. If the current section name (or `literal_prefix' value) ends with 17030 `.text', the literal section name is formed by replacing that 17031 suffix with the base `.literal' or `.lit4' name. For example, for 17032 literals defined in a section named `.iram0.text', the literal 17033 section will be `.iram0.literal' or `.iram0.lit4'. 17034 17035 4. If none of the preceding conditions apply, the literal section 17036 name is formed by adding the base `.literal' or `.lit4' name as a 17037 suffix to the current section name (or `literal_prefix' value). 17038 17039 ---------- Footnotes ---------- 17040 17041 (1) Literals for the `.init' and `.fini' sections are always placed 17042in separate sections, even when `--text-section-literals' is enabled. 17043 17044 17045File: as.info, Node: Literal Position Directive, Next: Literal Prefix Directive, Prev: Literal Directive, Up: Xtensa Directives 17046 170479.36.5.5 literal_position 17048......................... 17049 17050When using `--text-section-literals' to place literals inline in the 17051section being assembled, the `.literal_position' directive can be used 17052to mark a potential location for a literal pool. 17053 17054 .literal_position 17055 17056 The `.literal_position' directive is ignored when the 17057`--text-section-literals' option is not used or when `L32R' 17058instructions use the absolute addressing mode. 17059 17060 The assembler will automatically place text section literal pools 17061before `ENTRY' instructions, so the `.literal_position' directive is 17062only needed to specify some other location for a literal pool. You may 17063need to add an explicit jump instruction to skip over an inline literal 17064pool. 17065 17066 For example, an interrupt vector does not begin with an `ENTRY' 17067instruction so the assembler will be unable to automatically find a good 17068place to put a literal pool. Moreover, the code for the interrupt 17069vector must be at a specific starting address, so the literal pool 17070cannot come before the start of the code. The literal pool for the 17071vector must be explicitly positioned in the middle of the vector (before 17072any uses of the literals, due to the negative offsets used by 17073PC-relative `L32R' instructions). The `.literal_position' directive 17074can be used to do this. In the following code, the literal for `M' 17075will automatically be aligned correctly and is placed after the 17076unconditional jump. 17077 17078 .global M 17079 code_start: 17080 j continue 17081 .literal_position 17082 .align 4 17083 continue: 17084 movi a4, M 17085 17086 17087File: as.info, Node: Literal Prefix Directive, Next: Absolute Literals Directive, Prev: Literal Position Directive, Up: Xtensa Directives 17088 170899.36.5.6 literal_prefix 17090....................... 17091 17092The `literal_prefix' directive allows you to override the default 17093literal section names, which are derived from the names of the sections 17094where the literals are defined. 17095 17096 .begin literal_prefix [NAME] 17097 .end literal_prefix 17098 17099 For literals defined within the delimited region, the literal section 17100names are derived from the NAME argument instead of the name of the 17101current section. The rules used to derive the literal section names do 17102not change. *Note literal: Literal Directive. If the NAME argument is 17103omitted, the literal sections revert to the defaults. This directive 17104has no effect when using the `--text-section-literals' option (*note 17105Command Line Options: Xtensa Options.). 17106 17107 17108File: as.info, Node: Absolute Literals Directive, Prev: Literal Prefix Directive, Up: Xtensa Directives 17109 171109.36.5.7 absolute-literals 17111.......................... 17112 17113The `absolute-literals' and `no-absolute-literals' directives control 17114the absolute vs. PC-relative mode for `L32R' instructions. These are 17115relevant only for Xtensa configurations that include the absolute 17116addressing option for `L32R' instructions. 17117 17118 .begin [no-]absolute-literals 17119 .end [no-]absolute-literals 17120 17121 These directives do not change the `L32R' mode--they only cause the 17122assembler to emit the appropriate kind of relocation for `L32R' 17123instructions and to place the literal values in the appropriate section. 17124To change the `L32R' mode, the program must write the `LITBASE' special 17125register. It is the programmer's responsibility to keep track of the 17126mode and indicate to the assembler which mode is used in each region of 17127code. 17128 17129 If the Xtensa configuration includes the absolute `L32R' addressing 17130option, the default is to assume absolute `L32R' addressing unless the 17131`--no-absolute-literals' command-line option is specified. Otherwise, 17132the default is to assume PC-relative `L32R' addressing. The 17133`absolute-literals' directive can then be used to override the default 17134determined by the command-line options. 17135 17136 17137File: as.info, Node: Reporting Bugs, Next: Acknowledgements, Prev: Machine Dependencies, Up: Top 17138 1713910 Reporting Bugs 17140***************** 17141 17142Your bug reports play an essential role in making `as' reliable. 17143 17144 Reporting a bug may help you by bringing a solution to your problem, 17145or it may not. But in any case the principal function of a bug report 17146is to help the entire community by making the next version of `as' work 17147better. Bug reports are your contribution to the maintenance of `as'. 17148 17149 In order for a bug report to serve its purpose, you must include the 17150information that enables us to fix the bug. 17151 17152* Menu: 17153 17154* Bug Criteria:: Have you found a bug? 17155* Bug Reporting:: How to report bugs 17156 17157 17158File: as.info, Node: Bug Criteria, Next: Bug Reporting, Up: Reporting Bugs 17159 1716010.1 Have You Found a Bug? 17161========================== 17162 17163If you are not sure whether you have found a bug, here are some 17164guidelines: 17165 17166 * If the assembler gets a fatal signal, for any input whatever, that 17167 is a `as' bug. Reliable assemblers never crash. 17168 17169 * If `as' produces an error message for valid input, that is a bug. 17170 17171 * If `as' does not produce an error message for invalid input, that 17172 is a bug. However, you should note that your idea of "invalid 17173 input" might be our idea of "an extension" or "support for 17174 traditional practice". 17175 17176 * If you are an experienced user of assemblers, your suggestions for 17177 improvement of `as' are welcome in any case. 17178 17179 17180File: as.info, Node: Bug Reporting, Prev: Bug Criteria, Up: Reporting Bugs 17181 1718210.2 How to Report Bugs 17183======================= 17184 17185A number of companies and individuals offer support for GNU products. 17186If you obtained `as' from a support organization, we recommend you 17187contact that organization first. 17188 17189 You can find contact information for many support companies and 17190individuals in the file `etc/SERVICE' in the GNU Emacs distribution. 17191 17192 In any event, we also recommend that you send bug reports for `as' 17193to `http://www.sourceware.org/bugzilla/'. 17194 17195 The fundamental principle of reporting bugs usefully is this: 17196*report all the facts*. If you are not sure whether to state a fact or 17197leave it out, state it! 17198 17199 Often people omit facts because they think they know what causes the 17200problem and assume that some details do not matter. Thus, you might 17201assume that the name of a symbol you use in an example does not matter. 17202Well, probably it does not, but one cannot be sure. Perhaps the bug 17203is a stray memory reference which happens to fetch from the location 17204where that name is stored in memory; perhaps, if the name were 17205different, the contents of that location would fool the assembler into 17206doing the right thing despite the bug. Play it safe and give a 17207specific, complete example. That is the easiest thing for you to do, 17208and the most helpful. 17209 17210 Keep in mind that the purpose of a bug report is to enable us to fix 17211the bug if it is new to us. Therefore, always write your bug reports 17212on the assumption that the bug has not been reported previously. 17213 17214 Sometimes people give a few sketchy facts and ask, "Does this ring a 17215bell?" This cannot help us fix a bug, so it is basically useless. We 17216respond by asking for enough details to enable us to investigate. You 17217might as well expedite matters by sending them to begin with. 17218 17219 To enable us to fix the bug, you should include all these things: 17220 17221 * The version of `as'. `as' announces it if you start it with the 17222 `--version' argument. 17223 17224 Without this, we will not know whether there is any point in 17225 looking for the bug in the current version of `as'. 17226 17227 * Any patches you may have applied to the `as' source. 17228 17229 * The type of machine you are using, and the operating system name 17230 and version number. 17231 17232 * What compiler (and its version) was used to compile `as'--e.g. 17233 "`gcc-2.7'". 17234 17235 * The command arguments you gave the assembler to assemble your 17236 example and observe the bug. To guarantee you will not omit 17237 something important, list them all. A copy of the Makefile (or 17238 the output from make) is sufficient. 17239 17240 If we were to try to guess the arguments, we would probably guess 17241 wrong and then we might not encounter the bug. 17242 17243 * A complete input file that will reproduce the bug. If the bug is 17244 observed when the assembler is invoked via a compiler, send the 17245 assembler source, not the high level language source. Most 17246 compilers will produce the assembler source when run with the `-S' 17247 option. If you are using `gcc', use the options `-v 17248 --save-temps'; this will save the assembler source in a file with 17249 an extension of `.s', and also show you exactly how `as' is being 17250 run. 17251 17252 * A description of what behavior you observe that you believe is 17253 incorrect. For example, "It gets a fatal signal." 17254 17255 Of course, if the bug is that `as' gets a fatal signal, then we 17256 will certainly notice it. But if the bug is incorrect output, we 17257 might not notice unless it is glaringly wrong. You might as well 17258 not give us a chance to make a mistake. 17259 17260 Even if the problem you experience is a fatal signal, you should 17261 still say so explicitly. Suppose something strange is going on, 17262 such as, your copy of `as' is out of sync, or you have encountered 17263 a bug in the C library on your system. (This has happened!) Your 17264 copy might crash and ours would not. If you told us to expect a 17265 crash, then when ours fails to crash, we would know that the bug 17266 was not happening for us. If you had not told us to expect a 17267 crash, then we would not be able to draw any conclusion from our 17268 observations. 17269 17270 * If you wish to suggest changes to the `as' source, send us context 17271 diffs, as generated by `diff' with the `-u', `-c', or `-p' option. 17272 Always send diffs from the old file to the new file. If you even 17273 discuss something in the `as' source, refer to it by context, not 17274 by line number. 17275 17276 The line numbers in our development sources will not match those 17277 in your sources. Your line numbers would convey no useful 17278 information to us. 17279 17280 Here are some things that are not necessary: 17281 17282 * A description of the envelope of the bug. 17283 17284 Often people who encounter a bug spend a lot of time investigating 17285 which changes to the input file will make the bug go away and which 17286 changes will not affect it. 17287 17288 This is often time consuming and not very useful, because the way 17289 we will find the bug is by running a single example under the 17290 debugger with breakpoints, not by pure deduction from a series of 17291 examples. We recommend that you save your time for something else. 17292 17293 Of course, if you can find a simpler example to report _instead_ 17294 of the original one, that is a convenience for us. Errors in the 17295 output will be easier to spot, running under the debugger will take 17296 less time, and so on. 17297 17298 However, simplification is not vital; if you do not want to do 17299 this, report the bug anyway and send us the entire test case you 17300 used. 17301 17302 * A patch for the bug. 17303 17304 A patch for the bug does help us if it is a good one. But do not 17305 omit the necessary information, such as the test case, on the 17306 assumption that a patch is all we need. We might see problems 17307 with your patch and decide to fix the problem another way, or we 17308 might not understand it at all. 17309 17310 Sometimes with a program as complicated as `as' it is very hard to 17311 construct an example that will make the program follow a certain 17312 path through the code. If you do not send us the example, we will 17313 not be able to construct one, so we will not be able to verify 17314 that the bug is fixed. 17315 17316 And if we cannot understand what bug you are trying to fix, or why 17317 your patch should be an improvement, we will not install it. A 17318 test case will help us to understand. 17319 17320 * A guess about what the bug is or what it depends on. 17321 17322 Such guesses are usually wrong. Even we cannot guess right about 17323 such things without first using the debugger to find the facts. 17324 17325 17326File: as.info, Node: Acknowledgements, Next: GNU Free Documentation License, Prev: Reporting Bugs, Up: Top 17327 1732811 Acknowledgements 17329******************* 17330 17331If you have contributed to GAS and your name isn't listed here, it is 17332not meant as a slight. We just don't know about it. Send mail to the 17333maintainer, and we'll correct the situation. Currently the maintainer 17334is Ken Raeburn (email address `raeburn@cygnus.com'). 17335 17336 Dean Elsner wrote the original GNU assembler for the VAX.(1) 17337 17338 Jay Fenlason maintained GAS for a while, adding support for 17339GDB-specific debug information and the 68k series machines, most of the 17340preprocessing pass, and extensive changes in `messages.c', 17341`input-file.c', `write.c'. 17342 17343 K. Richard Pixley maintained GAS for a while, adding various 17344enhancements and many bug fixes, including merging support for several 17345processors, breaking GAS up to handle multiple object file format back 17346ends (including heavy rewrite, testing, an integration of the coff and 17347b.out back ends), adding configuration including heavy testing and 17348verification of cross assemblers and file splits and renaming, 17349converted GAS to strictly ANSI C including full prototypes, added 17350support for m680[34]0 and cpu32, did considerable work on i960 17351including a COFF port (including considerable amounts of reverse 17352engineering), a SPARC opcode file rewrite, DECstation, rs6000, and 17353hp300hpux host ports, updated "know" assertions and made them work, 17354much other reorganization, cleanup, and lint. 17355 17356 Ken Raeburn wrote the high-level BFD interface code to replace most 17357of the code in format-specific I/O modules. 17358 17359 The original VMS support was contributed by David L. Kashtan. Eric 17360Youngdale has done much work with it since. 17361 17362 The Intel 80386 machine description was written by Eliot Dresselhaus. 17363 17364 Minh Tran-Le at IntelliCorp contributed some AIX 386 support. 17365 17366 The Motorola 88k machine description was contributed by Devon Bowen 17367of Buffalo University and Torbjorn Granlund of the Swedish Institute of 17368Computer Science. 17369 17370 Keith Knowles at the Open Software Foundation wrote the original 17371MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format 17372support (which hasn't been merged in yet). Ralph Campbell worked with 17373the MIPS code to support a.out format. 17374 17375 Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k, 17376tc-h8300), and IEEE 695 object file format (obj-ieee), was written by 17377Steve Chamberlain of Cygnus Support. Steve also modified the COFF back 17378end to use BFD for some low-level operations, for use with the H8/300 17379and AMD 29k targets. 17380 17381 John Gilmore built the AMD 29000 support, added `.include' support, 17382and simplified the configuration of which versions accept which 17383directives. He updated the 68k machine description so that Motorola's 17384opcodes always produced fixed-size instructions (e.g., `jsr'), while 17385synthetic instructions remained shrinkable (`jbsr'). John fixed many 17386bugs, including true tested cross-compilation support, and one bug in 17387relaxation that took a week and required the proverbial one-bit fix. 17388 17389 Ian Lance Taylor of Cygnus Support merged the Motorola and MIT 17390syntax for the 68k, completed support for some COFF targets (68k, i386 17391SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets, 17392wrote the initial RS/6000 and PowerPC assembler, and made a few other 17393minor patches. 17394 17395 Steve Chamberlain made GAS able to generate listings. 17396 17397 Hewlett-Packard contributed support for the HP9000/300. 17398 17399 Jeff Law wrote GAS and BFD support for the native HPPA object format 17400(SOM) along with a fairly extensive HPPA testsuite (for both SOM and 17401ELF object formats). This work was supported by both the Center for 17402Software Science at the University of Utah and Cygnus Support. 17403 17404 Support for ELF format files has been worked on by Mark Eichin of 17405Cygnus Support (original, incomplete implementation for SPARC), Pete 17406Hoogenboom and Jeff Law at the University of Utah (HPPA mainly), 17407Michael Meissner of the Open Software Foundation (i386 mainly), and Ken 17408Raeburn of Cygnus Support (sparc, and some initial 64-bit support). 17409 17410 Linas Vepstas added GAS support for the ESA/390 "IBM 370" 17411architecture. 17412 17413 Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote 17414GAS and BFD support for openVMS/Alpha. 17415 17416 Timothy Wall, Michael Hayes, and Greg Smart contributed to the 17417various tic* flavors. 17418 17419 David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from 17420Tensilica, Inc. added support for Xtensa processors. 17421 17422 Several engineers at Cygnus Support have also provided many small 17423bug fixes and configuration enhancements. 17424 17425 Many others have contributed large or small bugfixes and 17426enhancements. If you have contributed significant work and are not 17427mentioned on this list, and want to be, let us know. Some of the 17428history has been lost; we are not intentionally leaving anyone out. 17429 17430 ---------- Footnotes ---------- 17431 17432 (1) Any more details? 17433 17434 17435File: as.info, Node: GNU Free Documentation License, Next: AS Index, Prev: Acknowledgements, Up: Top 17436 17437Appendix A GNU Free Documentation License 17438***************************************** 17439 17440 Version 1.1, March 2000 17441 17442 Copyright (C) 2000, 2003 Free Software Foundation, Inc. 17443 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 17444 17445 Everyone is permitted to copy and distribute verbatim copies 17446 of this license document, but changing it is not allowed. 17447 17448 17449 0. PREAMBLE 17450 17451 The purpose of this License is to make a manual, textbook, or other 17452 written document "free" in the sense of freedom: to assure everyone 17453 the effective freedom to copy and redistribute it, with or without 17454 modifying it, either commercially or noncommercially. Secondarily, 17455 this License preserves for the author and publisher a way to get 17456 credit for their work, while not being considered responsible for 17457 modifications made by others. 17458 17459 This License is a kind of "copyleft", which means that derivative 17460 works of the document must themselves be free in the same sense. 17461 It complements the GNU General Public License, which is a copyleft 17462 license designed for free software. 17463 17464 We have designed this License in order to use it for manuals for 17465 free software, because free software needs free documentation: a 17466 free program should come with manuals providing the same freedoms 17467 that the software does. But this License is not limited to 17468 software manuals; it can be used for any textual work, regardless 17469 of subject matter or whether it is published as a printed book. 17470 We recommend this License principally for works whose purpose is 17471 instruction or reference. 17472 17473 17474 1. APPLICABILITY AND DEFINITIONS 17475 17476 This License applies to any manual or other work that contains a 17477 notice placed by the copyright holder saying it can be distributed 17478 under the terms of this License. The "Document", below, refers to 17479 any such manual or work. Any member of the public is a licensee, 17480 and is addressed as "you." 17481 17482 A "Modified Version" of the Document means any work containing the 17483 Document or a portion of it, either copied verbatim, or with 17484 modifications and/or translated into another language. 17485 17486 A "Secondary Section" is a named appendix or a front-matter 17487 section of the Document that deals exclusively with the 17488 relationship of the publishers or authors of the Document to the 17489 Document's overall subject (or to related matters) and contains 17490 nothing that could fall directly within that overall subject. 17491 (For example, if the Document is in part a textbook of 17492 mathematics, a Secondary Section may not explain any mathematics.) 17493 The relationship could be a matter of historical connection with 17494 the subject or with related matters, or of legal, commercial, 17495 philosophical, ethical or political position regarding them. 17496 17497 The "Invariant Sections" are certain Secondary Sections whose 17498 titles are designated, as being those of Invariant Sections, in 17499 the notice that says that the Document is released under this 17500 License. 17501 17502 The "Cover Texts" are certain short passages of text that are 17503 listed, as Front-Cover Texts or Back-Cover Texts, in the notice 17504 that says that the Document is released under this License. 17505 17506 A "Transparent" copy of the Document means a machine-readable copy, 17507 represented in a format whose specification is available to the 17508 general public, whose contents can be viewed and edited directly 17509 and straightforwardly with generic text editors or (for images 17510 composed of pixels) generic paint programs or (for drawings) some 17511 widely available drawing editor, and that is suitable for input to 17512 text formatters or for automatic translation to a variety of 17513 formats suitable for input to text formatters. A copy made in an 17514 otherwise Transparent file format whose markup has been designed 17515 to thwart or discourage subsequent modification by readers is not 17516 Transparent. A copy that is not "Transparent" is called "Opaque." 17517 17518 Examples of suitable formats for Transparent copies include plain 17519 ASCII without markup, Texinfo input format, LaTeX input format, 17520 SGML or XML using a publicly available DTD, and 17521 standard-conforming simple HTML designed for human modification. 17522 Opaque formats include PostScript, PDF, proprietary formats that 17523 can be read and edited only by proprietary word processors, SGML 17524 or XML for which the DTD and/or processing tools are not generally 17525 available, and the machine-generated HTML produced by some word 17526 processors for output purposes only. 17527 17528 The "Title Page" means, for a printed book, the title page itself, 17529 plus such following pages as are needed to hold, legibly, the 17530 material this License requires to appear in the title page. For 17531 works in formats which do not have any title page as such, "Title 17532 Page" means the text near the most prominent appearance of the 17533 work's title, preceding the beginning of the body of the text. 17534 17535 2. VERBATIM COPYING 17536 17537 You may copy and distribute the Document in any medium, either 17538 commercially or noncommercially, provided that this License, the 17539 copyright notices, and the license notice saying this License 17540 applies to the Document are reproduced in all copies, and that you 17541 add no other conditions whatsoever to those of this License. You 17542 may not use technical measures to obstruct or control the reading 17543 or further copying of the copies you make or distribute. However, 17544 you may accept compensation in exchange for copies. If you 17545 distribute a large enough number of copies you must also follow 17546 the conditions in section 3. 17547 17548 You may also lend copies, under the same conditions stated above, 17549 and you may publicly display copies. 17550 17551 3. COPYING IN QUANTITY 17552 17553 If you publish printed copies of the Document numbering more than 17554 100, and the Document's license notice requires Cover Texts, you 17555 must enclose the copies in covers that carry, clearly and legibly, 17556 all these Cover Texts: Front-Cover Texts on the front cover, and 17557 Back-Cover Texts on the back cover. Both covers must also clearly 17558 and legibly identify you as the publisher of these copies. The 17559 front cover must present the full title with all words of the 17560 title equally prominent and visible. You may add other material 17561 on the covers in addition. Copying with changes limited to the 17562 covers, as long as they preserve the title of the Document and 17563 satisfy these conditions, can be treated as verbatim copying in 17564 other respects. 17565 17566 If the required texts for either cover are too voluminous to fit 17567 legibly, you should put the first ones listed (as many as fit 17568 reasonably) on the actual cover, and continue the rest onto 17569 adjacent pages. 17570 17571 If you publish or distribute Opaque copies of the Document 17572 numbering more than 100, you must either include a 17573 machine-readable Transparent copy along with each Opaque copy, or 17574 state in or with each Opaque copy a publicly-accessible 17575 computer-network location containing a complete Transparent copy 17576 of the Document, free of added material, which the general 17577 network-using public has access to download anonymously at no 17578 charge using public-standard network protocols. If you use the 17579 latter option, you must take reasonably prudent steps, when you 17580 begin distribution of Opaque copies in quantity, to ensure that 17581 this Transparent copy will remain thus accessible at the stated 17582 location until at least one year after the last time you 17583 distribute an Opaque copy (directly or through your agents or 17584 retailers) of that edition to the public. 17585 17586 It is requested, but not required, that you contact the authors of 17587 the Document well before redistributing any large number of 17588 copies, to give them a chance to provide you with an updated 17589 version of the Document. 17590 17591 4. MODIFICATIONS 17592 17593 You may copy and distribute a Modified Version of the Document 17594 under the conditions of sections 2 and 3 above, provided that you 17595 release the Modified Version under precisely this License, with 17596 the Modified Version filling the role of the Document, thus 17597 licensing distribution and modification of the Modified Version to 17598 whoever possesses a copy of it. In addition, you must do these 17599 things in the Modified Version: 17600 17601 A. Use in the Title Page (and on the covers, if any) a title 17602 distinct from that of the Document, and from those of previous 17603 versions (which should, if there were any, be listed in the 17604 History section of the Document). You may use the same title 17605 as a previous version if the original publisher of that version 17606 gives permission. 17607 B. List on the Title Page, as authors, one or more persons or 17608 entities responsible for authorship of the modifications in the 17609 Modified Version, together with at least five of the principal 17610 authors of the Document (all of its principal authors, if it 17611 has less than five). 17612 C. State on the Title page the name of the publisher of the 17613 Modified Version, as the publisher. 17614 D. Preserve all the copyright notices of the Document. 17615 E. Add an appropriate copyright notice for your modifications 17616 adjacent to the other copyright notices. 17617 F. Include, immediately after the copyright notices, a license 17618 notice giving the public permission to use the Modified Version 17619 under the terms of this License, in the form shown in the 17620 Addendum below. 17621 G. Preserve in that license notice the full lists of Invariant 17622 Sections and required Cover Texts given in the Document's 17623 license notice. 17624 H. Include an unaltered copy of this License. 17625 I. Preserve the section entitled "History", and its title, and add 17626 to it an item stating at least the title, year, new authors, and 17627 publisher of the Modified Version as given on the Title Page. 17628 If there is no section entitled "History" in the Document, 17629 create one stating the title, year, authors, and publisher of 17630 the Document as given on its Title Page, then add an item 17631 describing the Modified Version as stated in the previous 17632 sentence. 17633 J. Preserve the network location, if any, given in the Document for 17634 public access to a Transparent copy of the Document, and 17635 likewise the network locations given in the Document for 17636 previous versions it was based on. These may be placed in the 17637 "History" section. You may omit a network location for a work 17638 that was published at least four years before the Document 17639 itself, or if the original publisher of the version it refers 17640 to gives permission. 17641 K. In any section entitled "Acknowledgements" or "Dedications", 17642 preserve the section's title, and preserve in the section all the 17643 substance and tone of each of the contributor acknowledgements 17644 and/or dedications given therein. 17645 L. Preserve all the Invariant Sections of the Document, 17646 unaltered in their text and in their titles. Section numbers 17647 or the equivalent are not considered part of the section titles. 17648 M. Delete any section entitled "Endorsements." Such a section 17649 may not be included in the Modified Version. 17650 N. Do not retitle any existing section as "Endorsements" or to 17651 conflict in title with any Invariant Section. 17652 17653 If the Modified Version includes new front-matter sections or 17654 appendices that qualify as Secondary Sections and contain no 17655 material copied from the Document, you may at your option 17656 designate some or all of these sections as invariant. To do this, 17657 add their titles to the list of Invariant Sections in the Modified 17658 Version's license notice. These titles must be distinct from any 17659 other section titles. 17660 17661 You may add a section entitled "Endorsements", provided it contains 17662 nothing but endorsements of your Modified Version by various 17663 parties-for example, statements of peer review or that the text has 17664 been approved by an organization as the authoritative definition 17665 of a standard. 17666 17667 You may add a passage of up to five words as a Front-Cover Text, 17668 and a passage of up to 25 words as a Back-Cover Text, to the end 17669 of the list of Cover Texts in the Modified Version. Only one 17670 passage of Front-Cover Text and one of Back-Cover Text may be 17671 added by (or through arrangements made by) any one entity. If the 17672 Document already includes a cover text for the same cover, 17673 previously added by you or by arrangement made by the same entity 17674 you are acting on behalf of, you may not add another; but you may 17675 replace the old one, on explicit permission from the previous 17676 publisher that added the old one. 17677 17678 The author(s) and publisher(s) of the Document do not by this 17679 License give permission to use their names for publicity for or to 17680 assert or imply endorsement of any Modified Version. 17681 17682 5. COMBINING DOCUMENTS 17683 17684 You may combine the Document with other documents released under 17685 this License, under the terms defined in section 4 above for 17686 modified versions, provided that you include in the combination 17687 all of the Invariant Sections of all of the original documents, 17688 unmodified, and list them all as Invariant Sections of your 17689 combined work in its license notice. 17690 17691 The combined work need only contain one copy of this License, and 17692 multiple identical Invariant Sections may be replaced with a single 17693 copy. If there are multiple Invariant Sections with the same name 17694 but different contents, make the title of each such section unique 17695 by adding at the end of it, in parentheses, the name of the 17696 original author or publisher of that section if known, or else a 17697 unique number. Make the same adjustment to the section titles in 17698 the list of Invariant Sections in the license notice of the 17699 combined work. 17700 17701 In the combination, you must combine any sections entitled 17702 "History" in the various original documents, forming one section 17703 entitled "History"; likewise combine any sections entitled 17704 "Acknowledgements", and any sections entitled "Dedications." You 17705 must delete all sections entitled "Endorsements." 17706 17707 6. COLLECTIONS OF DOCUMENTS 17708 17709 You may make a collection consisting of the Document and other 17710 documents released under this License, and replace the individual 17711 copies of this License in the various documents with a single copy 17712 that is included in the collection, provided that you follow the 17713 rules of this License for verbatim copying of each of the 17714 documents in all other respects. 17715 17716 You may extract a single document from such a collection, and 17717 distribute it individually under this License, provided you insert 17718 a copy of this License into the extracted document, and follow 17719 this License in all other respects regarding verbatim copying of 17720 that document. 17721 17722 7. AGGREGATION WITH INDEPENDENT WORKS 17723 17724 A compilation of the Document or its derivatives with other 17725 separate and independent documents or works, in or on a volume of 17726 a storage or distribution medium, does not as a whole count as a 17727 Modified Version of the Document, provided no compilation 17728 copyright is claimed for the compilation. Such a compilation is 17729 called an "aggregate", and this License does not apply to the 17730 other self-contained works thus compiled with the Document, on 17731 account of their being thus compiled, if they are not themselves 17732 derivative works of the Document. 17733 17734 If the Cover Text requirement of section 3 is applicable to these 17735 copies of the Document, then if the Document is less than one 17736 quarter of the entire aggregate, the Document's Cover Texts may be 17737 placed on covers that surround only the Document within the 17738 aggregate. Otherwise they must appear on covers around the whole 17739 aggregate. 17740 17741 8. TRANSLATION 17742 17743 Translation is considered a kind of modification, so you may 17744 distribute translations of the Document under the terms of section 17745 4. Replacing Invariant Sections with translations requires special 17746 permission from their copyright holders, but you may include 17747 translations of some or all Invariant Sections in addition to the 17748 original versions of these Invariant Sections. You may include a 17749 translation of this License provided that you also include the 17750 original English version of this License. In case of a 17751 disagreement between the translation and the original English 17752 version of this License, the original English version will prevail. 17753 17754 9. TERMINATION 17755 17756 You may not copy, modify, sublicense, or distribute the Document 17757 except as expressly provided for under this License. Any other 17758 attempt to copy, modify, sublicense or distribute the Document is 17759 void, and will automatically terminate your rights under this 17760 License. However, parties who have received copies, or rights, 17761 from you under this License will not have their licenses 17762 terminated so long as such parties remain in full compliance. 17763 17764 10. FUTURE REVISIONS OF THIS LICENSE 17765 17766 The Free Software Foundation may publish new, revised versions of 17767 the GNU Free Documentation License from time to time. Such new 17768 versions will be similar in spirit to the present version, but may 17769 differ in detail to address new problems or concerns. See 17770 http://www.gnu.org/copyleft/. 17771 17772 Each version of the License is given a distinguishing version 17773 number. If the Document specifies that a particular numbered 17774 version of this License "or any later version" applies to it, you 17775 have the option of following the terms and conditions either of 17776 that specified version or of any later version that has been 17777 published (not as a draft) by the Free Software Foundation. If 17778 the Document does not specify a version number of this License, 17779 you may choose any version ever published (not as a draft) by the 17780 Free Software Foundation. 17781 17782 17783ADDENDUM: How to use this License for your documents 17784==================================================== 17785 17786To use this License in a document you have written, include a copy of 17787the License in the document and put the following copyright and license 17788notices just after the title page: 17789 17790 Copyright (C) YEAR YOUR NAME. 17791 Permission is granted to copy, distribute and/or modify this document 17792 under the terms of the GNU Free Documentation License, Version 1.1 17793 or any later version published by the Free Software Foundation; 17794 with the Invariant Sections being LIST THEIR TITLES, with the 17795 Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST. 17796 A copy of the license is included in the section entitled "GNU 17797 Free Documentation License." 17798 17799 If you have no Invariant Sections, write "with no Invariant Sections" 17800instead of saying which ones are invariant. If you have no Front-Cover 17801Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being 17802LIST"; likewise for Back-Cover Texts. 17803 17804 If your document contains nontrivial examples of program code, we 17805recommend releasing these examples in parallel under your choice of 17806free software license, such as the GNU General Public License, to 17807permit their use in free software. 17808 17809 17810File: as.info, Node: AS Index, Prev: GNU Free Documentation License, Up: Top 17811 17812AS Index 17813******** 17814 17815�[index�] 17816* Menu: 17817 17818* #: Comments. (line 38) 17819* #APP: Preprocessing. (line 27) 17820* #NO_APP: Preprocessing. (line 27) 17821* $ in symbol names <1>: SH64-Chars. (line 10) 17822* $ in symbol names <2>: SH-Chars. (line 10) 17823* $ in symbol names <3>: D30V-Chars. (line 63) 17824* $ in symbol names: D10V-Chars. (line 46) 17825* $a: ARM Mapping Symbols. (line 9) 17826* $acos math builtin, TIC54X: TIC54X-Builtins. (line 10) 17827* $asin math builtin, TIC54X: TIC54X-Builtins. (line 13) 17828* $atan math builtin, TIC54X: TIC54X-Builtins. (line 16) 17829* $atan2 math builtin, TIC54X: TIC54X-Builtins. (line 19) 17830* $ceil math builtin, TIC54X: TIC54X-Builtins. (line 22) 17831* $cos math builtin, TIC54X: TIC54X-Builtins. (line 28) 17832* $cosh math builtin, TIC54X: TIC54X-Builtins. (line 25) 17833* $cvf math builtin, TIC54X: TIC54X-Builtins. (line 31) 17834* $cvi math builtin, TIC54X: TIC54X-Builtins. (line 34) 17835* $d: ARM Mapping Symbols. (line 15) 17836* $exp math builtin, TIC54X: TIC54X-Builtins. (line 37) 17837* $fabs math builtin, TIC54X: TIC54X-Builtins. (line 40) 17838* $firstch subsym builtin, TIC54X: TIC54X-Macros. (line 26) 17839* $floor math builtin, TIC54X: TIC54X-Builtins. (line 43) 17840* $fmod math builtin, TIC54X: TIC54X-Builtins. (line 47) 17841* $int math builtin, TIC54X: TIC54X-Builtins. (line 50) 17842* $iscons subsym builtin, TIC54X: TIC54X-Macros. (line 43) 17843* $isdefed subsym builtin, TIC54X: TIC54X-Macros. (line 34) 17844* $ismember subsym builtin, TIC54X: TIC54X-Macros. (line 38) 17845* $isname subsym builtin, TIC54X: TIC54X-Macros. (line 47) 17846* $isreg subsym builtin, TIC54X: TIC54X-Macros. (line 50) 17847* $lastch subsym builtin, TIC54X: TIC54X-Macros. (line 30) 17848* $ldexp math builtin, TIC54X: TIC54X-Builtins. (line 53) 17849* $log math builtin, TIC54X: TIC54X-Builtins. (line 59) 17850* $log10 math builtin, TIC54X: TIC54X-Builtins. (line 56) 17851* $max math builtin, TIC54X: TIC54X-Builtins. (line 62) 17852* $min math builtin, TIC54X: TIC54X-Builtins. (line 65) 17853* $pow math builtin, TIC54X: TIC54X-Builtins. (line 68) 17854* $round math builtin, TIC54X: TIC54X-Builtins. (line 71) 17855* $sgn math builtin, TIC54X: TIC54X-Builtins. (line 74) 17856* $sin math builtin, TIC54X: TIC54X-Builtins. (line 77) 17857* $sinh math builtin, TIC54X: TIC54X-Builtins. (line 80) 17858* $sqrt math builtin, TIC54X: TIC54X-Builtins. (line 83) 17859* $structacc subsym builtin, TIC54X: TIC54X-Macros. (line 57) 17860* $structsz subsym builtin, TIC54X: TIC54X-Macros. (line 54) 17861* $symcmp subsym builtin, TIC54X: TIC54X-Macros. (line 23) 17862* $symlen subsym builtin, TIC54X: TIC54X-Macros. (line 20) 17863* $t: ARM Mapping Symbols. (line 12) 17864* $tan math builtin, TIC54X: TIC54X-Builtins. (line 86) 17865* $tanh math builtin, TIC54X: TIC54X-Builtins. (line 89) 17866* $trunc math builtin, TIC54X: TIC54X-Builtins. (line 92) 17867* -+ option, VAX/VMS: VAX-Opts. (line 71) 17868* --: Command Line. (line 10) 17869* --32 option, i386: i386-Options. (line 8) 17870* --32 option, x86-64: i386-Options. (line 8) 17871* --64 option, i386: i386-Options. (line 8) 17872* --64 option, x86-64: i386-Options. (line 8) 17873* --absolute-literals: Xtensa Options. (line 23) 17874* --allow-reg-prefix: SH Options. (line 9) 17875* --alternate: alternate. (line 6) 17876* --base-size-default-16: M68K-Opts. (line 71) 17877* --base-size-default-32: M68K-Opts. (line 71) 17878* --big: SH Options. (line 9) 17879* --bitwise-or option, M680x0: M68K-Opts. (line 64) 17880* --disp-size-default-16: M68K-Opts. (line 80) 17881* --disp-size-default-32: M68K-Opts. (line 80) 17882* --divide option, i386: i386-Options. (line 24) 17883* --dsp: SH Options. (line 9) 17884* --emulation=crisaout command line option, CRIS: CRIS-Opts. (line 9) 17885* --emulation=criself command line option, CRIS: CRIS-Opts. (line 9) 17886* --enforce-aligned-data: Sparc-Aligned-Data. (line 11) 17887* --fatal-warnings: W. (line 16) 17888* --fix-v4bx command line option, ARM: ARM Options. (line 126) 17889* --fixed-special-register-names command line option, MMIX: MMIX-Opts. 17890 (line 8) 17891* --force-long-branches: M68HC11-Opts. (line 69) 17892* --generate-example: M68HC11-Opts. (line 86) 17893* --globalize-symbols command line option, MMIX: MMIX-Opts. (line 12) 17894* --gnu-syntax command line option, MMIX: MMIX-Opts. (line 16) 17895* --hash-size=NUMBER: Overview. (line 313) 17896* --linker-allocated-gregs command line option, MMIX: MMIX-Opts. 17897 (line 67) 17898* --listing-cont-lines: listing. (line 34) 17899* --listing-lhs-width: listing. (line 16) 17900* --listing-lhs-width2: listing. (line 21) 17901* --listing-rhs-width: listing. (line 28) 17902* --little: SH Options. (line 9) 17903* --longcalls: Xtensa Options. (line 37) 17904* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts. (line 33) 17905* --MD: MD. (line 6) 17906* --mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 17907* --no-absolute-literals: Xtensa Options. (line 23) 17908* --no-expand command line option, MMIX: MMIX-Opts. (line 31) 17909* --no-longcalls: Xtensa Options. (line 37) 17910* --no-merge-gregs command line option, MMIX: MMIX-Opts. (line 36) 17911* --no-mul-bug-abort command line option, CRIS: CRIS-Opts. (line 61) 17912* --no-predefined-syms command line option, MMIX: MMIX-Opts. (line 22) 17913* --no-pushj-stubs command line option, MMIX: MMIX-Opts. (line 54) 17914* --no-stubs command line option, MMIX: MMIX-Opts. (line 54) 17915* --no-target-align: Xtensa Options. (line 30) 17916* --no-text-section-literals: Xtensa Options. (line 9) 17917* --no-transform: Xtensa Options. (line 46) 17918* --no-underscore command line option, CRIS: CRIS-Opts. (line 15) 17919* --no-warn: W. (line 11) 17920* --pcrel: M68K-Opts. (line 92) 17921* --pic command line option, CRIS: CRIS-Opts. (line 27) 17922* --print-insn-syntax: M68HC11-Opts. (line 75) 17923* --print-opcodes: M68HC11-Opts. (line 79) 17924* --register-prefix-optional option, M680x0: M68K-Opts. (line 51) 17925* --relax: SH Options. (line 9) 17926* --relax command line option, MMIX: MMIX-Opts. (line 19) 17927* --rename-section: Xtensa Options. (line 54) 17928* --renesas: SH Options. (line 9) 17929* --short-branches: M68HC11-Opts. (line 54) 17930* --small: SH Options. (line 9) 17931* --statistics: statistics. (line 6) 17932* --strict-direct-mode: M68HC11-Opts. (line 44) 17933* --target-align: Xtensa Options. (line 30) 17934* --text-section-literals: Xtensa Options. (line 9) 17935* --traditional-format: traditional-format. (line 6) 17936* --transform: Xtensa Options. (line 46) 17937* --underscore command line option, CRIS: CRIS-Opts. (line 15) 17938* --warn: W. (line 19) 17939* -1 option, VAX/VMS: VAX-Opts. (line 77) 17940* -32addr command line option, Alpha: Alpha Options. (line 50) 17941* -a: a. (line 6) 17942* -A options, i960: Options-i960. (line 6) 17943* -ac: a. (line 6) 17944* -ad: a. (line 6) 17945* -ag: a. (line 6) 17946* -ah: a. (line 6) 17947* -al: a. (line 6) 17948* -an: a. (line 6) 17949* -as: a. (line 6) 17950* -Asparclet: Sparc-Opts. (line 25) 17951* -Asparclite: Sparc-Opts. (line 25) 17952* -Av6: Sparc-Opts. (line 25) 17953* -Av8: Sparc-Opts. (line 25) 17954* -Av9: Sparc-Opts. (line 25) 17955* -Av9a: Sparc-Opts. (line 25) 17956* -b option, i960: Options-i960. (line 22) 17957* -big option, M32R: M32R-Opts. (line 35) 17958* -D: D. (line 6) 17959* -D, ignored on VAX: VAX-Opts. (line 11) 17960* -d, VAX option: VAX-Opts. (line 16) 17961* -eabi= command line option, ARM: ARM Options. (line 109) 17962* -EB command line option, ARC: ARC Options. (line 31) 17963* -EB command line option, ARM: ARM Options. (line 114) 17964* -EB option (MIPS): MIPS Opts. (line 13) 17965* -EB option, M32R: M32R-Opts. (line 39) 17966* -EL command line option, ARC: ARC Options. (line 35) 17967* -EL command line option, ARM: ARM Options. (line 118) 17968* -EL option (MIPS): MIPS Opts. (line 13) 17969* -EL option, M32R: M32R-Opts. (line 32) 17970* -f: f. (line 6) 17971* -F command line option, Alpha: Alpha Options. (line 50) 17972* -g command line option, Alpha: Alpha Options. (line 40) 17973* -G command line option, Alpha: Alpha Options. (line 46) 17974* -G option (MIPS): MIPS Opts. (line 8) 17975* -h option, VAX/VMS: VAX-Opts. (line 45) 17976* -H option, VAX/VMS: VAX-Opts. (line 81) 17977* -I PATH: I. (line 6) 17978* -ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 87) 17979* -Ip option, M32RX: M32R-Opts. (line 97) 17980* -J, ignored on VAX: VAX-Opts. (line 27) 17981* -K: K. (line 6) 17982* -k command line option, ARM: ARM Options. (line 122) 17983* -KPIC option, M32R: M32R-Opts. (line 42) 17984* -KPIC option, MIPS: MIPS Opts. (line 21) 17985* -L: L. (line 6) 17986* -l option, M680x0: M68K-Opts. (line 39) 17987* -little option, M32R: M32R-Opts. (line 27) 17988* -M: M. (line 6) 17989* -m11/03: PDP-11-Options. (line 140) 17990* -m11/04: PDP-11-Options. (line 143) 17991* -m11/05: PDP-11-Options. (line 146) 17992* -m11/10: PDP-11-Options. (line 146) 17993* -m11/15: PDP-11-Options. (line 149) 17994* -m11/20: PDP-11-Options. (line 149) 17995* -m11/21: PDP-11-Options. (line 152) 17996* -m11/23: PDP-11-Options. (line 155) 17997* -m11/24: PDP-11-Options. (line 155) 17998* -m11/34: PDP-11-Options. (line 158) 17999* -m11/34a: PDP-11-Options. (line 161) 18000* -m11/35: PDP-11-Options. (line 164) 18001* -m11/40: PDP-11-Options. (line 164) 18002* -m11/44: PDP-11-Options. (line 167) 18003* -m11/45: PDP-11-Options. (line 170) 18004* -m11/50: PDP-11-Options. (line 170) 18005* -m11/53: PDP-11-Options. (line 173) 18006* -m11/55: PDP-11-Options. (line 170) 18007* -m11/60: PDP-11-Options. (line 176) 18008* -m11/70: PDP-11-Options. (line 170) 18009* -m11/73: PDP-11-Options. (line 173) 18010* -m11/83: PDP-11-Options. (line 173) 18011* -m11/84: PDP-11-Options. (line 173) 18012* -m11/93: PDP-11-Options. (line 173) 18013* -m11/94: PDP-11-Options. (line 173) 18014* -m16c option, M16C: M32C-Opts. (line 12) 18015* -m32c option, M32C: M32C-Opts. (line 9) 18016* -m32r option, M32R: M32R-Opts. (line 21) 18017* -m32rx option, M32R2: M32R-Opts. (line 17) 18018* -m32rx option, M32RX: M32R-Opts. (line 9) 18019* -m68000 and related options: M68K-Opts. (line 104) 18020* -m68hc11: M68HC11-Opts. (line 9) 18021* -m68hc12: M68HC11-Opts. (line 14) 18022* -m68hcs12: M68HC11-Opts. (line 21) 18023* -m[no-]68851 command line option, M680x0: M68K-Opts. (line 21) 18024* -m[no-]68881 command line option, M680x0: M68K-Opts. (line 21) 18025* -m[no-]div command line option, M680x0: M68K-Opts. (line 21) 18026* -m[no-]emac command line option, M680x0: M68K-Opts. (line 21) 18027* -m[no-]float command line option, M680x0: M68K-Opts. (line 21) 18028* -m[no-]mac command line option, M680x0: M68K-Opts. (line 21) 18029* -m[no-]usp command line option, M680x0: M68K-Opts. (line 21) 18030* -mall: PDP-11-Options. (line 26) 18031* -mall-extensions: PDP-11-Options. (line 26) 18032* -mall-opcodes command line option, AVR: AVR Options. (line 56) 18033* -mapcs command line option, ARM: ARM Options. (line 82) 18034* -mapcs-float command line option, ARM: ARM Options. (line 95) 18035* -mapcs-reentrant command line option, ARM: ARM Options. (line 100) 18036* -marc[5|6|7|8] command line option, ARC: ARC Options. (line 6) 18037* -march= command line option, ARM: ARM Options. (line 39) 18038* -march= command line option, M680x0: M68K-Opts. (line 8) 18039* -march= option, i386: i386-Options. (line 31) 18040* -march= option, x86-64: i386-Options. (line 31) 18041* -matpcs command line option, ARM: ARM Options. (line 87) 18042* -mcis: PDP-11-Options. (line 32) 18043* -mconstant-gp command line option, IA-64: IA-64 Options. (line 6) 18044* -mCPU command line option, Alpha: Alpha Options. (line 6) 18045* -mcpu option, cpu: TIC54X-Opts. (line 15) 18046* -mcpu= command line option, ARM: ARM Options. (line 6) 18047* -mcpu= command line option, M680x0: M68K-Opts. (line 14) 18048* -mcsm: PDP-11-Options. (line 43) 18049* -mdebug command line option, Alpha: Alpha Options. (line 25) 18050* -me option, stderr redirect: TIC54X-Opts. (line 20) 18051* -meis: PDP-11-Options. (line 46) 18052* -merrors-to-file option, stderr redirect: TIC54X-Opts. (line 20) 18053* -mf option, far-mode: TIC54X-Opts. (line 8) 18054* -mf11: PDP-11-Options. (line 122) 18055* -mfar-mode option, far-mode: TIC54X-Opts. (line 8) 18056* -mfis: PDP-11-Options. (line 51) 18057* -mfloat-abi= command line option, ARM: ARM Options. (line 104) 18058* -mfp-11: PDP-11-Options. (line 56) 18059* -mfpp: PDP-11-Options. (line 56) 18060* -mfpu: PDP-11-Options. (line 56) 18061* -mfpu= command line option, ARM: ARM Options. (line 54) 18062* -mip2022 option, IP2K: IP2K-Opts. (line 14) 18063* -mip2022ext option, IP2022: IP2K-Opts. (line 9) 18064* -mj11: PDP-11-Options. (line 126) 18065* -mka11: PDP-11-Options. (line 92) 18066* -mkb11: PDP-11-Options. (line 95) 18067* -mkd11a: PDP-11-Options. (line 98) 18068* -mkd11b: PDP-11-Options. (line 101) 18069* -mkd11d: PDP-11-Options. (line 104) 18070* -mkd11e: PDP-11-Options. (line 107) 18071* -mkd11f: PDP-11-Options. (line 110) 18072* -mkd11h: PDP-11-Options. (line 110) 18073* -mkd11k: PDP-11-Options. (line 114) 18074* -mkd11q: PDP-11-Options. (line 110) 18075* -mkd11z: PDP-11-Options. (line 118) 18076* -mkev11: PDP-11-Options. (line 51) 18077* -mlimited-eis: PDP-11-Options. (line 64) 18078* -mlong: M68HC11-Opts. (line 32) 18079* -mlong-double: M68HC11-Opts. (line 40) 18080* -mmcu= command line option, AVR: AVR Options. (line 6) 18081* -mmfpt: PDP-11-Options. (line 70) 18082* -mmicrocode: PDP-11-Options. (line 83) 18083* -mmnemonic= option, i386: i386-Options. (line 76) 18084* -mmnemonic= option, x86-64: i386-Options. (line 76) 18085* -mmutiproc: PDP-11-Options. (line 73) 18086* -mmxps: PDP-11-Options. (line 77) 18087* -mnaked-reg option, i386: i386-Options. (line 90) 18088* -mnaked-reg option, x86-64: i386-Options. (line 90) 18089* -mno-cis: PDP-11-Options. (line 32) 18090* -mno-csm: PDP-11-Options. (line 43) 18091* -mno-eis: PDP-11-Options. (line 46) 18092* -mno-extensions: PDP-11-Options. (line 29) 18093* -mno-fis: PDP-11-Options. (line 51) 18094* -mno-fp-11: PDP-11-Options. (line 56) 18095* -mno-fpp: PDP-11-Options. (line 56) 18096* -mno-fpu: PDP-11-Options. (line 56) 18097* -mno-kev11: PDP-11-Options. (line 51) 18098* -mno-limited-eis: PDP-11-Options. (line 64) 18099* -mno-mfpt: PDP-11-Options. (line 70) 18100* -mno-microcode: PDP-11-Options. (line 83) 18101* -mno-mutiproc: PDP-11-Options. (line 73) 18102* -mno-mxps: PDP-11-Options. (line 77) 18103* -mno-pic: PDP-11-Options. (line 11) 18104* -mno-skip-bug command line option, AVR: AVR Options. (line 59) 18105* -mno-spl: PDP-11-Options. (line 80) 18106* -mno-sym32: MIPS Opts. (line 184) 18107* -mno-wrap command line option, AVR: AVR Options. (line 62) 18108* -mpic: PDP-11-Options. (line 11) 18109* -mrelax command line option, V850: V850 Options. (line 51) 18110* -mshort: M68HC11-Opts. (line 27) 18111* -mshort-double: M68HC11-Opts. (line 36) 18112* -mspl: PDP-11-Options. (line 80) 18113* -msse-check= option, i386: i386-Options. (line 64) 18114* -msse-check= option, x86-64: i386-Options. (line 64) 18115* -msse2avx option, i386: i386-Options. (line 60) 18116* -msse2avx option, x86-64: i386-Options. (line 60) 18117* -msym32: MIPS Opts. (line 184) 18118* -msyntax= option, i386: i386-Options. (line 83) 18119* -msyntax= option, x86-64: i386-Options. (line 83) 18120* -mt11: PDP-11-Options. (line 130) 18121* -mthumb command line option, ARM: ARM Options. (line 73) 18122* -mthumb-interwork command line option, ARM: ARM Options. (line 78) 18123* -mtune= option, i386: i386-Options. (line 52) 18124* -mtune= option, x86-64: i386-Options. (line 52) 18125* -mv850 command line option, V850: V850 Options. (line 23) 18126* -mv850any command line option, V850: V850 Options. (line 41) 18127* -mv850e command line option, V850: V850 Options. (line 29) 18128* -mv850e1 command line option, V850: V850 Options. (line 35) 18129* -mvxworks-pic option, MIPS: MIPS Opts. (line 26) 18130* -N command line option, CRIS: CRIS-Opts. (line 57) 18131* -nIp option, M32RX: M32R-Opts. (line 101) 18132* -no-bitinst, M32R2: M32R-Opts. (line 54) 18133* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts. (line 93) 18134* -no-mdebug command line option, Alpha: Alpha Options. (line 25) 18135* -no-parallel option, M32RX: M32R-Opts. (line 51) 18136* -no-relax option, i960: Options-i960. (line 66) 18137* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. 18138 (line 79) 18139* -no-warn-unmatched-high option, M32R: M32R-Opts. (line 111) 18140* -nocpp ignored (MIPS): MIPS Opts. (line 187) 18141* -o: o. (line 6) 18142* -O option, M32RX: M32R-Opts. (line 59) 18143* -parallel option, M32RX: M32R-Opts. (line 46) 18144* -R: R. (line 6) 18145* -r800 command line option, Z80: Z80 Options. (line 41) 18146* -relax command line option, Alpha: Alpha Options. (line 32) 18147* -S, ignored on VAX: VAX-Opts. (line 11) 18148* -t, ignored on VAX: VAX-Opts. (line 36) 18149* -T, ignored on VAX: VAX-Opts. (line 11) 18150* -v: v. (line 6) 18151* -V, redundant on VAX: VAX-Opts. (line 22) 18152* -version: v. (line 6) 18153* -W: W. (line 11) 18154* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line 65) 18155* -warn-unmatched-high option, M32R: M32R-Opts. (line 105) 18156* -Wnp option, M32RX: M32R-Opts. (line 83) 18157* -Wnuh option, M32RX: M32R-Opts. (line 117) 18158* -Wp option, M32RX: M32R-Opts. (line 75) 18159* -wsigned_overflow command line option, V850: V850 Options. (line 9) 18160* -Wuh option, M32RX: M32R-Opts. (line 114) 18161* -wunsigned_overflow command line option, V850: V850 Options. 18162 (line 16) 18163* -x command line option, MMIX: MMIX-Opts. (line 44) 18164* -z80 command line option, Z80: Z80 Options. (line 8) 18165* -z8001 command line option, Z8000: Z8000 Options. (line 6) 18166* -z8002 command line option, Z8000: Z8000 Options. (line 9) 18167* . (symbol): Dot. (line 6) 18168* .arch directive, ARM: ARM Directives. (line 210) 18169* .big directive, M32RX: M32R-Directives. (line 88) 18170* .cantunwind directive, ARM: ARM Directives. (line 114) 18171* .cpu directive, ARM: ARM Directives. (line 206) 18172* .eabi_attribute directive, ARM: ARM Directives. (line 224) 18173* .fnend directive, ARM: ARM Directives. (line 105) 18174* .fnstart directive, ARM: ARM Directives. (line 102) 18175* .fpu directive, ARM: ARM Directives. (line 220) 18176* .handlerdata directive, ARM: ARM Directives. (line 125) 18177* .insn: MIPS insn. (line 6) 18178* .little directive, M32RX: M32R-Directives. (line 82) 18179* .ltorg directive, ARM: ARM Directives. (line 85) 18180* .m32r directive, M32R: M32R-Directives. (line 66) 18181* .m32r2 directive, M32R2: M32R-Directives. (line 77) 18182* .m32rx directive, M32RX: M32R-Directives. (line 72) 18183* .movsp directive, ARM: ARM Directives. (line 180) 18184* .o: Object. (line 6) 18185* .object_arch directive, ARM: ARM Directives. (line 214) 18186* .pad directive, ARM: ARM Directives. (line 175) 18187* .param on HPPA: HPPA Directives. (line 19) 18188* .personality directive, ARM: ARM Directives. (line 118) 18189* .personalityindex directive, ARM: ARM Directives. (line 121) 18190* .pool directive, ARM: ARM Directives. (line 99) 18191* .save directive, ARM: ARM Directives. (line 134) 18192* .set arch=CPU: MIPS ISA. (line 18) 18193* .set autoextend: MIPS autoextend. (line 6) 18194* .set doublefloat: MIPS floating-point. (line 12) 18195* .set dsp: MIPS ASE instruction generation overrides. 18196 (line 21) 18197* .set dspr2: MIPS ASE instruction generation overrides. 18198 (line 26) 18199* .set hardfloat: MIPS floating-point. (line 6) 18200* .set mdmx: MIPS ASE instruction generation overrides. 18201 (line 16) 18202* .set mips3d: MIPS ASE instruction generation overrides. 18203 (line 6) 18204* .set mipsN: MIPS ISA. (line 6) 18205* .set mt: MIPS ASE instruction generation overrides. 18206 (line 32) 18207* .set noautoextend: MIPS autoextend. (line 6) 18208* .set nodsp: MIPS ASE instruction generation overrides. 18209 (line 21) 18210* .set nodspr2: MIPS ASE instruction generation overrides. 18211 (line 26) 18212* .set nomdmx: MIPS ASE instruction generation overrides. 18213 (line 16) 18214* .set nomips3d: MIPS ASE instruction generation overrides. 18215 (line 6) 18216* .set nomt: MIPS ASE instruction generation overrides. 18217 (line 32) 18218* .set nosmartmips: MIPS ASE instruction generation overrides. 18219 (line 11) 18220* .set nosym32: MIPS symbol sizes. (line 6) 18221* .set pop: MIPS option stack. (line 6) 18222* .set push: MIPS option stack. (line 6) 18223* .set singlefloat: MIPS floating-point. (line 12) 18224* .set smartmips: MIPS ASE instruction generation overrides. 18225 (line 11) 18226* .set softfloat: MIPS floating-point. (line 6) 18227* .set sym32: MIPS symbol sizes. (line 6) 18228* .setfp directive, ARM: ARM Directives. (line 185) 18229* .unwind_raw directive, ARM: ARM Directives. (line 199) 18230* .v850 directive, V850: V850 Directives. (line 14) 18231* .v850e directive, V850: V850 Directives. (line 20) 18232* .v850e1 directive, V850: V850 Directives. (line 26) 18233* .vsave directive, ARM: ARM Directives. (line 158) 18234* .z8001: Z8000 Directives. (line 11) 18235* .z8002: Z8000 Directives. (line 15) 18236* 16-bit code, i386: i386-16bit. (line 6) 18237* 2byte directive, ARC: ARC Directives. (line 9) 18238* 3byte directive, ARC: ARC Directives. (line 12) 18239* 3DNow!, i386: i386-SIMD. (line 6) 18240* 3DNow!, x86-64: i386-SIMD. (line 6) 18241* 430 support: MSP430-Dependent. (line 6) 18242* 4byte directive, ARC: ARC Directives. (line 15) 18243* : (label): Statements. (line 30) 18244* @word modifier, D10V: D10V-Word. (line 6) 18245* \" (doublequote character): Strings. (line 43) 18246* \\ (\ character): Strings. (line 40) 18247* \b (backspace character): Strings. (line 15) 18248* \DDD (octal character code): Strings. (line 30) 18249* \f (formfeed character): Strings. (line 18) 18250* \n (newline character): Strings. (line 21) 18251* \r (carriage return character): Strings. (line 24) 18252* \t (tab): Strings. (line 27) 18253* \XD... (hex character code): Strings. (line 36) 18254* _ opcode prefix: Xtensa Opcodes. (line 9) 18255* a.out: Object. (line 6) 18256* a.out symbol attributes: a.out Symbols. (line 6) 18257* A_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 18258* ABI options, SH64: SH64 Options. (line 29) 18259* abort directive: Abort. (line 6) 18260* ABORT directive: ABORT (COFF). (line 6) 18261* absolute section: Ld Sections. (line 29) 18262* absolute-literals directive: Absolute Literals Directive. 18263 (line 6) 18264* ADDI instructions, relaxation: Xtensa Immediate Relaxation. 18265 (line 43) 18266* addition, permitted arguments: Infix Ops. (line 44) 18267* addresses: Expressions. (line 6) 18268* addresses, format of: Secs Background. (line 68) 18269* addressing modes, D10V: D10V-Addressing. (line 6) 18270* addressing modes, D30V: D30V-Addressing. (line 6) 18271* addressing modes, H8/300: H8/300-Addressing. (line 6) 18272* addressing modes, M680x0: M68K-Syntax. (line 21) 18273* addressing modes, M68HC11: M68HC11-Syntax. (line 17) 18274* addressing modes, SH: SH-Addressing. (line 6) 18275* addressing modes, SH64: SH64-Addressing. (line 6) 18276* addressing modes, Z8000: Z8000-Addressing. (line 6) 18277* ADR reg,<label> pseudo op, ARM: ARM Opcodes. (line 25) 18278* ADRL reg,<label> pseudo op, ARM: ARM Opcodes. (line 35) 18279* advancing location counter: Org. (line 6) 18280* align directive: Align. (line 6) 18281* align directive, ARM: ARM Directives. (line 6) 18282* align directive, SPARC: Sparc-Directives. (line 9) 18283* align directive, TIC54X: TIC54X-Directives. (line 6) 18284* alignment of branch targets: Xtensa Automatic Alignment. 18285 (line 6) 18286* alignment of LOOP instructions: Xtensa Automatic Alignment. 18287 (line 6) 18288* Alpha floating point (IEEE): Alpha Floating Point. 18289 (line 6) 18290* Alpha line comment character: Alpha-Chars. (line 6) 18291* Alpha line separator: Alpha-Chars. (line 8) 18292* Alpha notes: Alpha Notes. (line 6) 18293* Alpha options: Alpha Options. (line 6) 18294* Alpha registers: Alpha-Regs. (line 6) 18295* Alpha relocations: Alpha-Relocs. (line 6) 18296* Alpha support: Alpha-Dependent. (line 6) 18297* Alpha Syntax: Alpha Options. (line 54) 18298* Alpha-only directives: Alpha Directives. (line 10) 18299* altered difference tables: Word. (line 12) 18300* alternate syntax for the 680x0: M68K-Moto-Syntax. (line 6) 18301* ARC floating point (IEEE): ARC Floating Point. (line 6) 18302* ARC machine directives: ARC Directives. (line 6) 18303* ARC opcodes: ARC Opcodes. (line 6) 18304* ARC options (none): ARC Options. (line 6) 18305* ARC register names: ARC-Regs. (line 6) 18306* ARC special characters: ARC-Chars. (line 6) 18307* ARC support: ARC-Dependent. (line 6) 18308* arc5 arc5, ARC: ARC Options. (line 10) 18309* arc6 arc6, ARC: ARC Options. (line 13) 18310* arc7 arc7, ARC: ARC Options. (line 21) 18311* arc8 arc8, ARC: ARC Options. (line 24) 18312* arch directive, i386: i386-Arch. (line 6) 18313* arch directive, M680x0: M68K-Directives. (line 22) 18314* arch directive, x86-64: i386-Arch. (line 6) 18315* architecture options, i960: Options-i960. (line 6) 18316* architecture options, IP2022: IP2K-Opts. (line 9) 18317* architecture options, IP2K: IP2K-Opts. (line 14) 18318* architecture options, M16C: M32C-Opts. (line 12) 18319* architecture options, M32C: M32C-Opts. (line 9) 18320* architecture options, M32R: M32R-Opts. (line 21) 18321* architecture options, M32R2: M32R-Opts. (line 17) 18322* architecture options, M32RX: M32R-Opts. (line 9) 18323* architecture options, M680x0: M68K-Opts. (line 104) 18324* Architecture variant option, CRIS: CRIS-Opts. (line 33) 18325* architectures, PowerPC: PowerPC-Opts. (line 6) 18326* architectures, SPARC: Sparc-Opts. (line 6) 18327* arguments for addition: Infix Ops. (line 44) 18328* arguments for subtraction: Infix Ops. (line 49) 18329* arguments in expressions: Arguments. (line 6) 18330* arithmetic functions: Operators. (line 6) 18331* arithmetic operands: Arguments. (line 6) 18332* ARM data relocations: ARM-Relocations. (line 6) 18333* arm directive, ARM: ARM Directives. (line 60) 18334* ARM floating point (IEEE): ARM Floating Point. (line 6) 18335* ARM identifiers: ARM-Chars. (line 15) 18336* ARM immediate character: ARM-Chars. (line 13) 18337* ARM line comment character: ARM-Chars. (line 6) 18338* ARM line separator: ARM-Chars. (line 10) 18339* ARM machine directives: ARM Directives. (line 6) 18340* ARM opcodes: ARM Opcodes. (line 6) 18341* ARM options (none): ARM Options. (line 6) 18342* ARM register names: ARM-Regs. (line 6) 18343* ARM support: ARM-Dependent. (line 6) 18344* ascii directive: Ascii. (line 6) 18345* asciz directive: Asciz. (line 6) 18346* asg directive, TIC54X: TIC54X-Directives. (line 20) 18347* assembler bugs, reporting: Bug Reporting. (line 6) 18348* assembler crash: Bug Criteria. (line 9) 18349* assembler directive .arch, CRIS: CRIS-Pseudos. (line 45) 18350* assembler directive .dword, CRIS: CRIS-Pseudos. (line 12) 18351* assembler directive .far, M68HC11: M68HC11-Directives. (line 20) 18352* assembler directive .interrupt, M68HC11: M68HC11-Directives. 18353 (line 26) 18354* assembler directive .mode, M68HC11: M68HC11-Directives. (line 16) 18355* assembler directive .relax, M68HC11: M68HC11-Directives. (line 10) 18356* assembler directive .syntax, CRIS: CRIS-Pseudos. (line 17) 18357* assembler directive .xrefb, M68HC11: M68HC11-Directives. (line 31) 18358* assembler directive BSPEC, MMIX: MMIX-Pseudos. (line 131) 18359* assembler directive BYTE, MMIX: MMIX-Pseudos. (line 97) 18360* assembler directive ESPEC, MMIX: MMIX-Pseudos. (line 131) 18361* assembler directive GREG, MMIX: MMIX-Pseudos. (line 50) 18362* assembler directive IS, MMIX: MMIX-Pseudos. (line 42) 18363* assembler directive LOC, MMIX: MMIX-Pseudos. (line 7) 18364* assembler directive LOCAL, MMIX: MMIX-Pseudos. (line 28) 18365* assembler directive OCTA, MMIX: MMIX-Pseudos. (line 108) 18366* assembler directive PREFIX, MMIX: MMIX-Pseudos. (line 120) 18367* assembler directive TETRA, MMIX: MMIX-Pseudos. (line 108) 18368* assembler directive WYDE, MMIX: MMIX-Pseudos. (line 108) 18369* assembler directives, CRIS: CRIS-Pseudos. (line 6) 18370* assembler directives, M68HC11: M68HC11-Directives. (line 6) 18371* assembler directives, M68HC12: M68HC11-Directives. (line 6) 18372* assembler directives, MMIX: MMIX-Pseudos. (line 6) 18373* assembler internal logic error: As Sections. (line 13) 18374* assembler version: v. (line 6) 18375* assembler, and linker: Secs Background. (line 10) 18376* assembly listings, enabling: a. (line 6) 18377* assigning values to symbols <1>: Equ. (line 6) 18378* assigning values to symbols: Setting Symbols. (line 6) 18379* atmp directive, i860: Directives-i860. (line 16) 18380* att_syntax pseudo op, i386: i386-Syntax. (line 6) 18381* att_syntax pseudo op, x86-64: i386-Syntax. (line 6) 18382* attributes, symbol: Symbol Attributes. (line 6) 18383* auxiliary attributes, COFF symbols: COFF Symbols. (line 19) 18384* auxiliary symbol information, COFF: Dim. (line 6) 18385* Av7: Sparc-Opts. (line 25) 18386* AVR line comment character: AVR-Chars. (line 6) 18387* AVR line separator: AVR-Chars. (line 10) 18388* AVR modifiers: AVR-Modifiers. (line 6) 18389* AVR opcode summary: AVR Opcodes. (line 6) 18390* AVR options (none): AVR Options. (line 6) 18391* AVR register names: AVR-Regs. (line 6) 18392* AVR support: AVR-Dependent. (line 6) 18393* backslash (\\): Strings. (line 40) 18394* backspace (\b): Strings. (line 15) 18395* balign directive: Balign. (line 6) 18396* balignl directive: Balign. (line 27) 18397* balignw directive: Balign. (line 27) 18398* bes directive, TIC54X: TIC54X-Directives. (line 197) 18399* BFIN directives: BFIN Directives. (line 6) 18400* BFIN syntax: BFIN Syntax. (line 6) 18401* big endian output, MIPS: Overview. (line 628) 18402* big endian output, PJ: Overview. (line 535) 18403* big-endian output, MIPS: MIPS Opts. (line 13) 18404* bignums: Bignums. (line 6) 18405* binary constants, TIC54X: TIC54X-Constants. (line 8) 18406* binary files, including: Incbin. (line 6) 18407* binary integers: Integers. (line 6) 18408* bit names, IA-64: IA-64-Bits. (line 6) 18409* bitfields, not supported on VAX: VAX-no. (line 6) 18410* Blackfin support: BFIN-Dependent. (line 6) 18411* block: Z8000 Directives. (line 55) 18412* branch improvement, M680x0: M68K-Branch. (line 6) 18413* branch improvement, M68HC11: M68HC11-Branch. (line 6) 18414* branch improvement, VAX: VAX-branch. (line 6) 18415* branch instructions, relaxation: Xtensa Branch Relaxation. 18416 (line 6) 18417* branch recording, i960: Options-i960. (line 22) 18418* branch statistics table, i960: Options-i960. (line 40) 18419* branch target alignment: Xtensa Automatic Alignment. 18420 (line 6) 18421* break directive, TIC54X: TIC54X-Directives. (line 143) 18422* BSD syntax: PDP-11-Syntax. (line 6) 18423* bss directive, i960: Directives-i960. (line 6) 18424* bss directive, TIC54X: TIC54X-Directives. (line 29) 18425* bss section <1>: Ld Sections. (line 20) 18426* bss section: bss. (line 6) 18427* bug criteria: Bug Criteria. (line 6) 18428* bug reports: Bug Reporting. (line 6) 18429* bugs in assembler: Reporting Bugs. (line 6) 18430* Built-in symbols, CRIS: CRIS-Symbols. (line 6) 18431* builtin math functions, TIC54X: TIC54X-Builtins. (line 6) 18432* builtin subsym functions, TIC54X: TIC54X-Macros. (line 16) 18433* bus lock prefixes, i386: i386-Prefixes. (line 36) 18434* bval: Z8000 Directives. (line 30) 18435* byte directive: Byte. (line 6) 18436* byte directive, TIC54X: TIC54X-Directives. (line 36) 18437* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env. (line 6) 18438* c_mode directive, TIC54X: TIC54X-Directives. (line 51) 18439* call instructions, i386: i386-Mnemonics. (line 51) 18440* call instructions, relaxation: Xtensa Call Relaxation. 18441 (line 6) 18442* call instructions, x86-64: i386-Mnemonics. (line 51) 18443* callj, i960 pseudo-opcode: callj-i960. (line 6) 18444* carriage return (\r): Strings. (line 24) 18445* case sensitivity, Z80: Z80-Case. (line 6) 18446* cfi_endproc directive: CFI directives. (line 16) 18447* cfi_startproc directive: CFI directives. (line 6) 18448* char directive, TIC54X: TIC54X-Directives. (line 36) 18449* character constant, Z80: Z80-Chars. (line 13) 18450* character constants: Characters. (line 6) 18451* character escape codes: Strings. (line 15) 18452* character escapes, Z80: Z80-Chars. (line 11) 18453* character, single: Chars. (line 6) 18454* characters used in symbols: Symbol Intro. (line 6) 18455* clink directive, TIC54X: TIC54X-Directives. (line 45) 18456* code directive, ARM: ARM Directives. (line 53) 18457* code16 directive, i386: i386-16bit. (line 6) 18458* code16gcc directive, i386: i386-16bit. (line 6) 18459* code32 directive, i386: i386-16bit. (line 6) 18460* code64 directive, i386: i386-16bit. (line 6) 18461* code64 directive, x86-64: i386-16bit. (line 6) 18462* COFF auxiliary symbol information: Dim. (line 6) 18463* COFF structure debugging: Tag. (line 6) 18464* COFF symbol attributes: COFF Symbols. (line 6) 18465* COFF symbol descriptor: Desc. (line 6) 18466* COFF symbol storage class: Scl. (line 6) 18467* COFF symbol type: Type. (line 11) 18468* COFF symbols, debugging: Def. (line 6) 18469* COFF value attribute: Val. (line 6) 18470* COMDAT: Linkonce. (line 6) 18471* comm directive: Comm. (line 6) 18472* command line conventions: Command Line. (line 6) 18473* command line options, V850: V850 Options. (line 9) 18474* command-line options ignored, VAX: VAX-Opts. (line 6) 18475* comments: Comments. (line 6) 18476* comments, M680x0: M68K-Chars. (line 6) 18477* comments, removed by preprocessor: Preprocessing. (line 11) 18478* common directive, SPARC: Sparc-Directives. (line 12) 18479* common sections: Linkonce. (line 6) 18480* common variable storage: bss. (line 6) 18481* compare and jump expansions, i960: Compare-and-branch-i960. 18482 (line 13) 18483* compare/branch instructions, i960: Compare-and-branch-i960. 18484 (line 6) 18485* comparison expressions: Infix Ops. (line 55) 18486* conditional assembly: If. (line 6) 18487* constant, single character: Chars. (line 6) 18488* constants: Constants. (line 6) 18489* constants, bignum: Bignums. (line 6) 18490* constants, character: Characters. (line 6) 18491* constants, converted by preprocessor: Preprocessing. (line 14) 18492* constants, floating point: Flonums. (line 6) 18493* constants, integer: Integers. (line 6) 18494* constants, number: Numbers. (line 6) 18495* constants, Sparc: Sparc-Constants. (line 6) 18496* constants, string: Strings. (line 6) 18497* constants, TIC54X: TIC54X-Constants. (line 6) 18498* conversion instructions, i386: i386-Mnemonics. (line 32) 18499* conversion instructions, x86-64: i386-Mnemonics. (line 32) 18500* coprocessor wait, i386: i386-Prefixes. (line 40) 18501* copy directive, TIC54X: TIC54X-Directives. (line 54) 18502* cpu directive, M680x0: M68K-Directives. (line 30) 18503* CR16 Operand Qualifiers: CR16 Operand Qualifiers. 18504 (line 6) 18505* CR16 support: CR16-Dependent. (line 6) 18506* crash of assembler: Bug Criteria. (line 9) 18507* CRIS --emulation=crisaout command line option: CRIS-Opts. (line 9) 18508* CRIS --emulation=criself command line option: CRIS-Opts. (line 9) 18509* CRIS --march=ARCHITECTURE command line option: CRIS-Opts. (line 33) 18510* CRIS --mul-bug-abort command line option: CRIS-Opts. (line 61) 18511* CRIS --no-mul-bug-abort command line option: CRIS-Opts. (line 61) 18512* CRIS --no-underscore command line option: CRIS-Opts. (line 15) 18513* CRIS --pic command line option: CRIS-Opts. (line 27) 18514* CRIS --underscore command line option: CRIS-Opts. (line 15) 18515* CRIS -N command line option: CRIS-Opts. (line 57) 18516* CRIS architecture variant option: CRIS-Opts. (line 33) 18517* CRIS assembler directive .arch: CRIS-Pseudos. (line 45) 18518* CRIS assembler directive .dword: CRIS-Pseudos. (line 12) 18519* CRIS assembler directive .syntax: CRIS-Pseudos. (line 17) 18520* CRIS assembler directives: CRIS-Pseudos. (line 6) 18521* CRIS built-in symbols: CRIS-Symbols. (line 6) 18522* CRIS instruction expansion: CRIS-Expand. (line 6) 18523* CRIS line comment characters: CRIS-Chars. (line 6) 18524* CRIS options: CRIS-Opts. (line 6) 18525* CRIS position-independent code: CRIS-Opts. (line 27) 18526* CRIS pseudo-op .arch: CRIS-Pseudos. (line 45) 18527* CRIS pseudo-op .dword: CRIS-Pseudos. (line 12) 18528* CRIS pseudo-op .syntax: CRIS-Pseudos. (line 17) 18529* CRIS pseudo-ops: CRIS-Pseudos. (line 6) 18530* CRIS register names: CRIS-Regs. (line 6) 18531* CRIS support: CRIS-Dependent. (line 6) 18532* CRIS symbols in position-independent code: CRIS-Pic. (line 6) 18533* ctbp register, V850: V850-Regs. (line 131) 18534* ctoff pseudo-op, V850: V850 Opcodes. (line 111) 18535* ctpc register, V850: V850-Regs. (line 119) 18536* ctpsw register, V850: V850-Regs. (line 122) 18537* current address: Dot. (line 6) 18538* current address, advancing: Org. (line 6) 18539* D10V @word modifier: D10V-Word. (line 6) 18540* D10V addressing modes: D10V-Addressing. (line 6) 18541* D10V floating point: D10V-Float. (line 6) 18542* D10V line comment character: D10V-Chars. (line 6) 18543* D10V opcode summary: D10V-Opcodes. (line 6) 18544* D10V optimization: Overview. (line 407) 18545* D10V options: D10V-Opts. (line 6) 18546* D10V registers: D10V-Regs. (line 6) 18547* D10V size modifiers: D10V-Size. (line 6) 18548* D10V sub-instruction ordering: D10V-Chars. (line 6) 18549* D10V sub-instructions: D10V-Subs. (line 6) 18550* D10V support: D10V-Dependent. (line 6) 18551* D10V syntax: D10V-Syntax. (line 6) 18552* D30V addressing modes: D30V-Addressing. (line 6) 18553* D30V floating point: D30V-Float. (line 6) 18554* D30V Guarded Execution: D30V-Guarded. (line 6) 18555* D30V line comment character: D30V-Chars. (line 6) 18556* D30V nops: Overview. (line 415) 18557* D30V nops after 32-bit multiply: Overview. (line 418) 18558* D30V opcode summary: D30V-Opcodes. (line 6) 18559* D30V optimization: Overview. (line 412) 18560* D30V options: D30V-Opts. (line 6) 18561* D30V registers: D30V-Regs. (line 6) 18562* D30V size modifiers: D30V-Size. (line 6) 18563* D30V sub-instruction ordering: D30V-Chars. (line 6) 18564* D30V sub-instructions: D30V-Subs. (line 6) 18565* D30V support: D30V-Dependent. (line 6) 18566* D30V syntax: D30V-Syntax. (line 6) 18567* data alignment on SPARC: Sparc-Aligned-Data. (line 6) 18568* data and text sections, joining: R. (line 6) 18569* data directive: Data. (line 6) 18570* data directive, TIC54X: TIC54X-Directives. (line 61) 18571* data relocations, ARM: ARM-Relocations. (line 6) 18572* data section: Ld Sections. (line 9) 18573* data1 directive, M680x0: M68K-Directives. (line 9) 18574* data2 directive, M680x0: M68K-Directives. (line 12) 18575* datalabel, SH64: SH64-Addressing. (line 16) 18576* dbpc register, V850: V850-Regs. (line 125) 18577* dbpsw register, V850: V850-Regs. (line 128) 18578* debuggers, and symbol order: Symbols. (line 10) 18579* debugging COFF symbols: Def. (line 6) 18580* DEC syntax: PDP-11-Syntax. (line 6) 18581* decimal integers: Integers. (line 12) 18582* def directive: Def. (line 6) 18583* def directive, TIC54X: TIC54X-Directives. (line 103) 18584* density instructions: Density Instructions. 18585 (line 6) 18586* dependency tracking: MD. (line 6) 18587* deprecated directives: Deprecated. (line 6) 18588* desc directive: Desc. (line 6) 18589* descriptor, of a.out symbol: Symbol Desc. (line 6) 18590* dfloat directive, VAX: VAX-directives. (line 10) 18591* difference tables altered: Word. (line 12) 18592* difference tables, warning: K. (line 6) 18593* differences, mmixal: MMIX-mmixal. (line 6) 18594* dim directive: Dim. (line 6) 18595* directives and instructions: Statements. (line 19) 18596* directives for PowerPC: PowerPC-Pseudo. (line 6) 18597* directives, BFIN: BFIN Directives. (line 6) 18598* directives, M32R: M32R-Directives. (line 6) 18599* directives, M680x0: M68K-Directives. (line 6) 18600* directives, machine independent: Pseudo Ops. (line 6) 18601* directives, Xtensa: Xtensa Directives. (line 6) 18602* directives, Z8000: Z8000 Directives. (line 6) 18603* Disable floating-point instructions: MIPS floating-point. (line 6) 18604* Disable single-precision floating-point operations: MIPS floating-point. 18605 (line 12) 18606* displacement sizing character, VAX: VAX-operands. (line 12) 18607* dn and qn directives, ARM: ARM Directives. (line 29) 18608* dollar local symbols: Symbol Names. (line 105) 18609* dot (symbol): Dot. (line 6) 18610* double directive: Double. (line 6) 18611* double directive, i386: i386-Float. (line 14) 18612* double directive, M680x0: M68K-Float. (line 14) 18613* double directive, M68HC11: M68HC11-Float. (line 14) 18614* double directive, TIC54X: TIC54X-Directives. (line 64) 18615* double directive, VAX: VAX-float. (line 15) 18616* double directive, x86-64: i386-Float. (line 14) 18617* doublequote (\"): Strings. (line 43) 18618* drlist directive, TIC54X: TIC54X-Directives. (line 73) 18619* drnolist directive, TIC54X: TIC54X-Directives. (line 73) 18620* dual directive, i860: Directives-i860. (line 6) 18621* ECOFF sections: MIPS Object. (line 6) 18622* ecr register, V850: V850-Regs. (line 113) 18623* eight-byte integer: Quad. (line 9) 18624* eipc register, V850: V850-Regs. (line 101) 18625* eipsw register, V850: V850-Regs. (line 104) 18626* eject directive: Eject. (line 6) 18627* ELF symbol type: Type. (line 22) 18628* else directive: Else. (line 6) 18629* elseif directive: Elseif. (line 6) 18630* empty expressions: Empty Exprs. (line 6) 18631* emsg directive, TIC54X: TIC54X-Directives. (line 77) 18632* emulation: Overview. (line 731) 18633* end directive: End. (line 6) 18634* enddual directive, i860: Directives-i860. (line 11) 18635* endef directive: Endef. (line 6) 18636* endfunc directive: Endfunc. (line 6) 18637* endianness, MIPS: Overview. (line 628) 18638* endianness, PJ: Overview. (line 535) 18639* endif directive: Endif. (line 6) 18640* endloop directive, TIC54X: TIC54X-Directives. (line 143) 18641* endm directive: Macro. (line 138) 18642* endm directive, TIC54X: TIC54X-Directives. (line 153) 18643* endstruct directive, TIC54X: TIC54X-Directives. (line 217) 18644* endunion directive, TIC54X: TIC54X-Directives. (line 251) 18645* environment settings, TIC54X: TIC54X-Env. (line 6) 18646* EOF, newline must precede: Statements. (line 13) 18647* ep register, V850: V850-Regs. (line 95) 18648* equ directive: Equ. (line 6) 18649* equ directive, TIC54X: TIC54X-Directives. (line 192) 18650* equiv directive: Equiv. (line 6) 18651* eqv directive: Eqv. (line 6) 18652* err directive: Err. (line 6) 18653* error directive: Error. (line 6) 18654* error messages: Errors. (line 6) 18655* error on valid input: Bug Criteria. (line 12) 18656* errors, caused by warnings: W. (line 16) 18657* errors, continuing after: Z. (line 6) 18658* ESA/390 floating point (IEEE): ESA/390 Floating Point. 18659 (line 6) 18660* ESA/390 support: ESA/390-Dependent. (line 6) 18661* ESA/390 Syntax: ESA/390 Options. (line 8) 18662* ESA/390-only directives: ESA/390 Directives. (line 12) 18663* escape codes, character: Strings. (line 15) 18664* eval directive, TIC54X: TIC54X-Directives. (line 24) 18665* even: Z8000 Directives. (line 58) 18666* even directive, M680x0: M68K-Directives. (line 15) 18667* even directive, TIC54X: TIC54X-Directives. (line 6) 18668* exitm directive: Macro. (line 141) 18669* expr (internal section): As Sections. (line 17) 18670* expression arguments: Arguments. (line 6) 18671* expressions: Expressions. (line 6) 18672* expressions, comparison: Infix Ops. (line 55) 18673* expressions, empty: Empty Exprs. (line 6) 18674* expressions, integer: Integer Exprs. (line 6) 18675* extAuxRegister directive, ARC: ARC Directives. (line 18) 18676* extCondCode directive, ARC: ARC Directives. (line 41) 18677* extCoreRegister directive, ARC: ARC Directives. (line 53) 18678* extend directive M680x0: M68K-Float. (line 17) 18679* extend directive M68HC11: M68HC11-Float. (line 17) 18680* extended directive, i960: Directives-i960. (line 13) 18681* extern directive: Extern. (line 6) 18682* extInstruction directive, ARC: ARC Directives. (line 78) 18683* fail directive: Fail. (line 6) 18684* far_mode directive, TIC54X: TIC54X-Directives. (line 82) 18685* faster processing (-f): f. (line 6) 18686* fatal signal: Bug Criteria. (line 9) 18687* fclist directive, TIC54X: TIC54X-Directives. (line 87) 18688* fcnolist directive, TIC54X: TIC54X-Directives. (line 87) 18689* fepc register, V850: V850-Regs. (line 107) 18690* fepsw register, V850: V850-Regs. (line 110) 18691* ffloat directive, VAX: VAX-directives. (line 14) 18692* field directive, TIC54X: TIC54X-Directives. (line 91) 18693* file directive <1>: LNS directives. (line 6) 18694* file directive: File. (line 6) 18695* file directive, MSP 430: MSP430 Directives. (line 6) 18696* file name, logical: File. (line 6) 18697* files, including: Include. (line 6) 18698* files, input: Input Files. (line 6) 18699* fill directive: Fill. (line 6) 18700* filling memory <1>: Skip. (line 6) 18701* filling memory: Space. (line 6) 18702* FLIX syntax: Xtensa Syntax. (line 6) 18703* float directive: Float. (line 6) 18704* float directive, i386: i386-Float. (line 14) 18705* float directive, M680x0: M68K-Float. (line 11) 18706* float directive, M68HC11: M68HC11-Float. (line 11) 18707* float directive, TIC54X: TIC54X-Directives. (line 64) 18708* float directive, VAX: VAX-float. (line 15) 18709* float directive, x86-64: i386-Float. (line 14) 18710* floating point numbers: Flonums. (line 6) 18711* floating point numbers (double): Double. (line 6) 18712* floating point numbers (single) <1>: Float. (line 6) 18713* floating point numbers (single): Single. (line 6) 18714* floating point, Alpha (IEEE): Alpha Floating Point. 18715 (line 6) 18716* floating point, ARC (IEEE): ARC Floating Point. (line 6) 18717* floating point, ARM (IEEE): ARM Floating Point. (line 6) 18718* floating point, D10V: D10V-Float. (line 6) 18719* floating point, D30V: D30V-Float. (line 6) 18720* floating point, ESA/390 (IEEE): ESA/390 Floating Point. 18721 (line 6) 18722* floating point, H8/300 (IEEE): H8/300 Floating Point. 18723 (line 6) 18724* floating point, HPPA (IEEE): HPPA Floating Point. (line 6) 18725* floating point, i386: i386-Float. (line 6) 18726* floating point, i960 (IEEE): Floating Point-i960. (line 6) 18727* floating point, M680x0: M68K-Float. (line 6) 18728* floating point, M68HC11: M68HC11-Float. (line 6) 18729* floating point, MSP 430 (IEEE): MSP430 Floating Point. 18730 (line 6) 18731* floating point, SH (IEEE): SH Floating Point. (line 6) 18732* floating point, SPARC (IEEE): Sparc-Float. (line 6) 18733* floating point, V850 (IEEE): V850 Floating Point. (line 6) 18734* floating point, VAX: VAX-float. (line 6) 18735* floating point, x86-64: i386-Float. (line 6) 18736* floating point, Z80: Z80 Floating Point. (line 6) 18737* flonums: Flonums. (line 6) 18738* force_thumb directive, ARM: ARM Directives. (line 63) 18739* format of error messages: Errors. (line 24) 18740* format of warning messages: Errors. (line 12) 18741* formfeed (\f): Strings. (line 18) 18742* func directive: Func. (line 6) 18743* functions, in expressions: Operators. (line 6) 18744* gbr960, i960 postprocessor: Options-i960. (line 40) 18745* gfloat directive, VAX: VAX-directives. (line 18) 18746* global: Z8000 Directives. (line 21) 18747* global directive: Global. (line 6) 18748* global directive, TIC54X: TIC54X-Directives. (line 103) 18749* gp register, MIPS: MIPS Object. (line 11) 18750* gp register, V850: V850-Regs. (line 17) 18751* grouping data: Sub-Sections. (line 6) 18752* H8/300 addressing modes: H8/300-Addressing. (line 6) 18753* H8/300 floating point (IEEE): H8/300 Floating Point. 18754 (line 6) 18755* H8/300 line comment character: H8/300-Chars. (line 6) 18756* H8/300 line separator: H8/300-Chars. (line 8) 18757* H8/300 machine directives (none): H8/300 Directives. (line 6) 18758* H8/300 opcode summary: H8/300 Opcodes. (line 6) 18759* H8/300 options: H8/300 Options. (line 6) 18760* H8/300 registers: H8/300-Regs. (line 6) 18761* H8/300 size suffixes: H8/300 Opcodes. (line 163) 18762* H8/300 support: H8/300-Dependent. (line 6) 18763* H8/300H, assembling for: H8/300 Directives. (line 8) 18764* half directive, ARC: ARC Directives. (line 156) 18765* half directive, SPARC: Sparc-Directives. (line 17) 18766* half directive, TIC54X: TIC54X-Directives. (line 111) 18767* hex character code (\XD...): Strings. (line 36) 18768* hexadecimal integers: Integers. (line 15) 18769* hexadecimal prefix, Z80: Z80-Chars. (line 8) 18770* hfloat directive, VAX: VAX-directives. (line 22) 18771* hi pseudo-op, V850: V850 Opcodes. (line 33) 18772* hi0 pseudo-op, V850: V850 Opcodes. (line 10) 18773* hidden directive: Hidden. (line 6) 18774* high directive, M32R: M32R-Directives. (line 18) 18775* hilo pseudo-op, V850: V850 Opcodes. (line 55) 18776* HPPA directives not supported: HPPA Directives. (line 11) 18777* HPPA floating point (IEEE): HPPA Floating Point. (line 6) 18778* HPPA Syntax: HPPA Options. (line 8) 18779* HPPA-only directives: HPPA Directives. (line 24) 18780* hword directive: hword. (line 6) 18781* i370 support: ESA/390-Dependent. (line 6) 18782* i386 16-bit code: i386-16bit. (line 6) 18783* i386 arch directive: i386-Arch. (line 6) 18784* i386 att_syntax pseudo op: i386-Syntax. (line 6) 18785* i386 conversion instructions: i386-Mnemonics. (line 32) 18786* i386 floating point: i386-Float. (line 6) 18787* i386 immediate operands: i386-Syntax. (line 15) 18788* i386 instruction naming: i386-Mnemonics. (line 6) 18789* i386 instruction prefixes: i386-Prefixes. (line 6) 18790* i386 intel_syntax pseudo op: i386-Syntax. (line 6) 18791* i386 jump optimization: i386-Jumps. (line 6) 18792* i386 jump, call, return: i386-Syntax. (line 38) 18793* i386 jump/call operands: i386-Syntax. (line 15) 18794* i386 memory references: i386-Memory. (line 6) 18795* i386 mnemonic compatibility: i386-Mnemonics. (line 57) 18796* i386 mul, imul instructions: i386-Notes. (line 6) 18797* i386 options: i386-Options. (line 6) 18798* i386 register operands: i386-Syntax. (line 15) 18799* i386 registers: i386-Regs. (line 6) 18800* i386 sections: i386-Syntax. (line 44) 18801* i386 size suffixes: i386-Syntax. (line 29) 18802* i386 source, destination operands: i386-Syntax. (line 22) 18803* i386 support: i386-Dependent. (line 6) 18804* i386 syntax compatibility: i386-Syntax. (line 6) 18805* i80306 support: i386-Dependent. (line 6) 18806* i860 machine directives: Directives-i860. (line 6) 18807* i860 opcodes: Opcodes for i860. (line 6) 18808* i860 support: i860-Dependent. (line 6) 18809* i960 architecture options: Options-i960. (line 6) 18810* i960 branch recording: Options-i960. (line 22) 18811* i960 callj pseudo-opcode: callj-i960. (line 6) 18812* i960 compare and jump expansions: Compare-and-branch-i960. 18813 (line 13) 18814* i960 compare/branch instructions: Compare-and-branch-i960. 18815 (line 6) 18816* i960 floating point (IEEE): Floating Point-i960. (line 6) 18817* i960 machine directives: Directives-i960. (line 6) 18818* i960 opcodes: Opcodes for i960. (line 6) 18819* i960 options: Options-i960. (line 6) 18820* i960 support: i960-Dependent. (line 6) 18821* IA-64 line comment character: IA-64-Chars. (line 6) 18822* IA-64 line separator: IA-64-Chars. (line 8) 18823* IA-64 options: IA-64 Options. (line 6) 18824* IA-64 Processor-status-Register bit names: IA-64-Bits. (line 6) 18825* IA-64 registers: IA-64-Regs. (line 6) 18826* IA-64 support: IA-64-Dependent. (line 6) 18827* IA-64 Syntax: IA-64 Options. (line 96) 18828* ident directive: Ident. (line 6) 18829* identifiers, ARM: ARM-Chars. (line 15) 18830* identifiers, MSP 430: MSP430-Chars. (line 8) 18831* if directive: If. (line 6) 18832* ifb directive: If. (line 21) 18833* ifc directive: If. (line 25) 18834* ifdef directive: If. (line 16) 18835* ifeq directive: If. (line 33) 18836* ifeqs directive: If. (line 36) 18837* ifge directive: If. (line 40) 18838* ifgt directive: If. (line 44) 18839* ifle directive: If. (line 48) 18840* iflt directive: If. (line 52) 18841* ifnb directive: If. (line 56) 18842* ifnc directive: If. (line 61) 18843* ifndef directive: If. (line 65) 18844* ifne directive: If. (line 72) 18845* ifnes directive: If. (line 76) 18846* ifnotdef directive: If. (line 65) 18847* immediate character, ARM: ARM-Chars. (line 13) 18848* immediate character, M680x0: M68K-Chars. (line 6) 18849* immediate character, VAX: VAX-operands. (line 6) 18850* immediate fields, relaxation: Xtensa Immediate Relaxation. 18851 (line 6) 18852* immediate operands, i386: i386-Syntax. (line 15) 18853* immediate operands, x86-64: i386-Syntax. (line 15) 18854* imul instruction, i386: i386-Notes. (line 6) 18855* imul instruction, x86-64: i386-Notes. (line 6) 18856* incbin directive: Incbin. (line 6) 18857* include directive: Include. (line 6) 18858* include directive search path: I. (line 6) 18859* indirect character, VAX: VAX-operands. (line 9) 18860* infix operators: Infix Ops. (line 6) 18861* inhibiting interrupts, i386: i386-Prefixes. (line 36) 18862* input: Input Files. (line 6) 18863* input file linenumbers: Input Files. (line 35) 18864* instruction expansion, CRIS: CRIS-Expand. (line 6) 18865* instruction expansion, MMIX: MMIX-Expand. (line 6) 18866* instruction naming, i386: i386-Mnemonics. (line 6) 18867* instruction naming, x86-64: i386-Mnemonics. (line 6) 18868* instruction prefixes, i386: i386-Prefixes. (line 6) 18869* instruction set, M680x0: M68K-opcodes. (line 6) 18870* instruction set, M68HC11: M68HC11-opcodes. (line 6) 18871* instruction summary, AVR: AVR Opcodes. (line 6) 18872* instruction summary, D10V: D10V-Opcodes. (line 6) 18873* instruction summary, D30V: D30V-Opcodes. (line 6) 18874* instruction summary, H8/300: H8/300 Opcodes. (line 6) 18875* instruction summary, SH: SH Opcodes. (line 6) 18876* instruction summary, SH64: SH64 Opcodes. (line 6) 18877* instruction summary, Z8000: Z8000 Opcodes. (line 6) 18878* instructions and directives: Statements. (line 19) 18879* int directive: Int. (line 6) 18880* int directive, H8/300: H8/300 Directives. (line 6) 18881* int directive, i386: i386-Float. (line 21) 18882* int directive, TIC54X: TIC54X-Directives. (line 111) 18883* int directive, x86-64: i386-Float. (line 21) 18884* integer expressions: Integer Exprs. (line 6) 18885* integer, 16-byte: Octa. (line 6) 18886* integer, 8-byte: Quad. (line 9) 18887* integers: Integers. (line 6) 18888* integers, 16-bit: hword. (line 6) 18889* integers, 32-bit: Int. (line 6) 18890* integers, binary: Integers. (line 6) 18891* integers, decimal: Integers. (line 12) 18892* integers, hexadecimal: Integers. (line 15) 18893* integers, octal: Integers. (line 9) 18894* integers, one byte: Byte. (line 6) 18895* intel_syntax pseudo op, i386: i386-Syntax. (line 6) 18896* intel_syntax pseudo op, x86-64: i386-Syntax. (line 6) 18897* internal assembler sections: As Sections. (line 6) 18898* internal directive: Internal. (line 6) 18899* invalid input: Bug Criteria. (line 14) 18900* invocation summary: Overview. (line 6) 18901* IP2K architecture options: IP2K-Opts. (line 9) 18902* IP2K options: IP2K-Opts. (line 6) 18903* IP2K support: IP2K-Dependent. (line 6) 18904* irp directive: Irp. (line 6) 18905* irpc directive: Irpc. (line 6) 18906* ISA options, SH64: SH64 Options. (line 6) 18907* joining text and data sections: R. (line 6) 18908* jump instructions, i386: i386-Mnemonics. (line 51) 18909* jump instructions, x86-64: i386-Mnemonics. (line 51) 18910* jump optimization, i386: i386-Jumps. (line 6) 18911* jump optimization, x86-64: i386-Jumps. (line 6) 18912* jump/call operands, i386: i386-Syntax. (line 15) 18913* jump/call operands, x86-64: i386-Syntax. (line 15) 18914* L16SI instructions, relaxation: Xtensa Immediate Relaxation. 18915 (line 23) 18916* L16UI instructions, relaxation: Xtensa Immediate Relaxation. 18917 (line 23) 18918* L32I instructions, relaxation: Xtensa Immediate Relaxation. 18919 (line 23) 18920* L8UI instructions, relaxation: Xtensa Immediate Relaxation. 18921 (line 23) 18922* label (:): Statements. (line 30) 18923* label directive, TIC54X: TIC54X-Directives. (line 123) 18924* labels: Labels. (line 6) 18925* lcomm directive: Lcomm. (line 6) 18926* lcomm directive, COFF: i386-Directives. (line 6) 18927* ld: Object. (line 15) 18928* ldouble directive M680x0: M68K-Float. (line 17) 18929* ldouble directive M68HC11: M68HC11-Float. (line 17) 18930* ldouble directive, TIC54X: TIC54X-Directives. (line 64) 18931* LDR reg,=<label> pseudo op, ARM: ARM Opcodes. (line 15) 18932* leafproc directive, i960: Directives-i960. (line 18) 18933* length directive, TIC54X: TIC54X-Directives. (line 127) 18934* length of symbols: Symbol Intro. (line 14) 18935* lflags directive (ignored): Lflags. (line 6) 18936* line comment character: Comments. (line 19) 18937* line comment character, Alpha: Alpha-Chars. (line 6) 18938* line comment character, ARM: ARM-Chars. (line 6) 18939* line comment character, AVR: AVR-Chars. (line 6) 18940* line comment character, D10V: D10V-Chars. (line 6) 18941* line comment character, D30V: D30V-Chars. (line 6) 18942* line comment character, H8/300: H8/300-Chars. (line 6) 18943* line comment character, IA-64: IA-64-Chars. (line 6) 18944* line comment character, M680x0: M68K-Chars. (line 6) 18945* line comment character, MSP 430: MSP430-Chars. (line 6) 18946* line comment character, SH: SH-Chars. (line 6) 18947* line comment character, SH64: SH64-Chars. (line 6) 18948* line comment character, Sparc: Sparc-Chars. (line 6) 18949* line comment character, V850: V850-Chars. (line 6) 18950* line comment character, Z80: Z80-Chars. (line 6) 18951* line comment character, Z8000: Z8000-Chars. (line 6) 18952* line comment characters, CRIS: CRIS-Chars. (line 6) 18953* line comment characters, MMIX: MMIX-Chars. (line 6) 18954* line directive: Line. (line 6) 18955* line directive, MSP 430: MSP430 Directives. (line 14) 18956* line numbers, in input files: Input Files. (line 35) 18957* line numbers, in warnings/errors: Errors. (line 16) 18958* line separator character: Statements. (line 6) 18959* line separator, Alpha: Alpha-Chars. (line 8) 18960* line separator, ARM: ARM-Chars. (line 10) 18961* line separator, AVR: AVR-Chars. (line 10) 18962* line separator, H8/300: H8/300-Chars. (line 8) 18963* line separator, IA-64: IA-64-Chars. (line 8) 18964* line separator, SH: SH-Chars. (line 8) 18965* line separator, SH64: SH64-Chars. (line 8) 18966* line separator, Sparc: Sparc-Chars. (line 8) 18967* line separator, Z8000: Z8000-Chars. (line 8) 18968* lines starting with #: Comments. (line 38) 18969* linker: Object. (line 15) 18970* linker, and assembler: Secs Background. (line 10) 18971* linkonce directive: Linkonce. (line 6) 18972* list directive: List. (line 6) 18973* list directive, TIC54X: TIC54X-Directives. (line 131) 18974* listing control, turning off: Nolist. (line 6) 18975* listing control, turning on: List. (line 6) 18976* listing control: new page: Eject. (line 6) 18977* listing control: paper size: Psize. (line 6) 18978* listing control: subtitle: Sbttl. (line 6) 18979* listing control: title line: Title. (line 6) 18980* listings, enabling: a. (line 6) 18981* literal directive: Literal Directive. (line 6) 18982* literal_position directive: Literal Position Directive. 18983 (line 6) 18984* literal_prefix directive: Literal Prefix Directive. 18985 (line 6) 18986* little endian output, MIPS: Overview. (line 631) 18987* little endian output, PJ: Overview. (line 538) 18988* little-endian output, MIPS: MIPS Opts. (line 13) 18989* ln directive: Ln. (line 6) 18990* lo pseudo-op, V850: V850 Opcodes. (line 22) 18991* loc directive: LNS directives. (line 19) 18992* loc_mark_labels directive: LNS directives. (line 50) 18993* local common symbols: Lcomm. (line 6) 18994* local labels: Symbol Names. (line 35) 18995* local symbol names: Symbol Names. (line 22) 18996* local symbols, retaining in output: L. (line 6) 18997* location counter: Dot. (line 6) 18998* location counter, advancing: Org. (line 6) 18999* location counter, Z80: Z80-Chars. (line 8) 19000* logical file name: File. (line 6) 19001* logical line number: Line. (line 6) 19002* logical line numbers: Comments. (line 38) 19003* long directive: Long. (line 6) 19004* long directive, ARC: ARC Directives. (line 159) 19005* long directive, i386: i386-Float. (line 21) 19006* long directive, TIC54X: TIC54X-Directives. (line 135) 19007* long directive, x86-64: i386-Float. (line 21) 19008* longcall pseudo-op, V850: V850 Opcodes. (line 123) 19009* longcalls directive: Longcalls Directive. (line 6) 19010* longjump pseudo-op, V850: V850 Opcodes. (line 129) 19011* loop directive, TIC54X: TIC54X-Directives. (line 143) 19012* LOOP instructions, alignment: Xtensa Automatic Alignment. 19013 (line 6) 19014* low directive, M32R: M32R-Directives. (line 9) 19015* lp register, V850: V850-Regs. (line 98) 19016* lval: Z8000 Directives. (line 27) 19017* M16C architecture option: M32C-Opts. (line 12) 19018* M32C architecture option: M32C-Opts. (line 9) 19019* M32C modifiers: M32C-Modifiers. (line 6) 19020* M32C options: M32C-Opts. (line 6) 19021* M32C support: M32C-Dependent. (line 6) 19022* M32R architecture options: M32R-Opts. (line 9) 19023* M32R directives: M32R-Directives. (line 6) 19024* M32R options: M32R-Opts. (line 6) 19025* M32R support: M32R-Dependent. (line 6) 19026* M32R warnings: M32R-Warnings. (line 6) 19027* M680x0 addressing modes: M68K-Syntax. (line 21) 19028* M680x0 architecture options: M68K-Opts. (line 104) 19029* M680x0 branch improvement: M68K-Branch. (line 6) 19030* M680x0 directives: M68K-Directives. (line 6) 19031* M680x0 floating point: M68K-Float. (line 6) 19032* M680x0 immediate character: M68K-Chars. (line 6) 19033* M680x0 line comment character: M68K-Chars. (line 6) 19034* M680x0 opcodes: M68K-opcodes. (line 6) 19035* M680x0 options: M68K-Opts. (line 6) 19036* M680x0 pseudo-opcodes: M68K-Branch. (line 6) 19037* M680x0 size modifiers: M68K-Syntax. (line 8) 19038* M680x0 support: M68K-Dependent. (line 6) 19039* M680x0 syntax: M68K-Syntax. (line 8) 19040* M68HC11 addressing modes: M68HC11-Syntax. (line 17) 19041* M68HC11 and M68HC12 support: M68HC11-Dependent. (line 6) 19042* M68HC11 assembler directive .far: M68HC11-Directives. (line 20) 19043* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line 26) 19044* M68HC11 assembler directive .mode: M68HC11-Directives. (line 16) 19045* M68HC11 assembler directive .relax: M68HC11-Directives. (line 10) 19046* M68HC11 assembler directive .xrefb: M68HC11-Directives. (line 31) 19047* M68HC11 assembler directives: M68HC11-Directives. (line 6) 19048* M68HC11 branch improvement: M68HC11-Branch. (line 6) 19049* M68HC11 floating point: M68HC11-Float. (line 6) 19050* M68HC11 modifiers: M68HC11-Modifiers. (line 6) 19051* M68HC11 opcodes: M68HC11-opcodes. (line 6) 19052* M68HC11 options: M68HC11-Opts. (line 6) 19053* M68HC11 pseudo-opcodes: M68HC11-Branch. (line 6) 19054* M68HC11 syntax: M68HC11-Syntax. (line 6) 19055* M68HC12 assembler directives: M68HC11-Directives. (line 6) 19056* machine dependencies: Machine Dependencies. 19057 (line 6) 19058* machine directives, ARC: ARC Directives. (line 6) 19059* machine directives, ARM: ARM Directives. (line 6) 19060* machine directives, H8/300 (none): H8/300 Directives. (line 6) 19061* machine directives, i860: Directives-i860. (line 6) 19062* machine directives, i960: Directives-i960. (line 6) 19063* machine directives, MSP 430: MSP430 Directives. (line 6) 19064* machine directives, SH: SH Directives. (line 6) 19065* machine directives, SH64: SH64 Directives. (line 9) 19066* machine directives, SPARC: Sparc-Directives. (line 6) 19067* machine directives, TIC54X: TIC54X-Directives. (line 6) 19068* machine directives, V850: V850 Directives. (line 6) 19069* machine directives, VAX: VAX-directives. (line 6) 19070* machine directives, x86: i386-Directives. (line 6) 19071* machine independent directives: Pseudo Ops. (line 6) 19072* machine instructions (not covered): Manual. (line 14) 19073* machine-independent syntax: Syntax. (line 6) 19074* macro directive: Macro. (line 28) 19075* macro directive, TIC54X: TIC54X-Directives. (line 153) 19076* macros: Macro. (line 6) 19077* macros, count executed: Macro. (line 143) 19078* Macros, MSP 430: MSP430-Macros. (line 6) 19079* macros, TIC54X: TIC54X-Macros. (line 6) 19080* make rules: MD. (line 6) 19081* manual, structure and purpose: Manual. (line 6) 19082* math builtins, TIC54X: TIC54X-Builtins. (line 6) 19083* Maximum number of continuation lines: listing. (line 34) 19084* memory references, i386: i386-Memory. (line 6) 19085* memory references, x86-64: i386-Memory. (line 6) 19086* memory-mapped registers, TIC54X: TIC54X-MMRegs. (line 6) 19087* merging text and data sections: R. (line 6) 19088* messages from assembler: Errors. (line 6) 19089* minus, permitted arguments: Infix Ops. (line 49) 19090* MIPS architecture options: MIPS Opts. (line 29) 19091* MIPS big-endian output: MIPS Opts. (line 13) 19092* MIPS CPU override: MIPS ISA. (line 18) 19093* MIPS debugging directives: MIPS Stabs. (line 6) 19094* MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides. 19095 (line 21) 19096* MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides. 19097 (line 26) 19098* MIPS ECOFF sections: MIPS Object. (line 6) 19099* MIPS endianness: Overview. (line 628) 19100* MIPS ISA: Overview. (line 634) 19101* MIPS ISA override: MIPS ISA. (line 6) 19102* MIPS little-endian output: MIPS Opts. (line 13) 19103* MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides. 19104 (line 16) 19105* MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides. 19106 (line 6) 19107* MIPS MT instruction generation override: MIPS ASE instruction generation overrides. 19108 (line 32) 19109* MIPS option stack: MIPS option stack. (line 6) 19110* MIPS processor: MIPS-Dependent. (line 6) 19111* MIT: M68K-Syntax. (line 6) 19112* mlib directive, TIC54X: TIC54X-Directives. (line 159) 19113* mlist directive, TIC54X: TIC54X-Directives. (line 164) 19114* MMIX assembler directive BSPEC: MMIX-Pseudos. (line 131) 19115* MMIX assembler directive BYTE: MMIX-Pseudos. (line 97) 19116* MMIX assembler directive ESPEC: MMIX-Pseudos. (line 131) 19117* MMIX assembler directive GREG: MMIX-Pseudos. (line 50) 19118* MMIX assembler directive IS: MMIX-Pseudos. (line 42) 19119* MMIX assembler directive LOC: MMIX-Pseudos. (line 7) 19120* MMIX assembler directive LOCAL: MMIX-Pseudos. (line 28) 19121* MMIX assembler directive OCTA: MMIX-Pseudos. (line 108) 19122* MMIX assembler directive PREFIX: MMIX-Pseudos. (line 120) 19123* MMIX assembler directive TETRA: MMIX-Pseudos. (line 108) 19124* MMIX assembler directive WYDE: MMIX-Pseudos. (line 108) 19125* MMIX assembler directives: MMIX-Pseudos. (line 6) 19126* MMIX line comment characters: MMIX-Chars. (line 6) 19127* MMIX options: MMIX-Opts. (line 6) 19128* MMIX pseudo-op BSPEC: MMIX-Pseudos. (line 131) 19129* MMIX pseudo-op BYTE: MMIX-Pseudos. (line 97) 19130* MMIX pseudo-op ESPEC: MMIX-Pseudos. (line 131) 19131* MMIX pseudo-op GREG: MMIX-Pseudos. (line 50) 19132* MMIX pseudo-op IS: MMIX-Pseudos. (line 42) 19133* MMIX pseudo-op LOC: MMIX-Pseudos. (line 7) 19134* MMIX pseudo-op LOCAL: MMIX-Pseudos. (line 28) 19135* MMIX pseudo-op OCTA: MMIX-Pseudos. (line 108) 19136* MMIX pseudo-op PREFIX: MMIX-Pseudos. (line 120) 19137* MMIX pseudo-op TETRA: MMIX-Pseudos. (line 108) 19138* MMIX pseudo-op WYDE: MMIX-Pseudos. (line 108) 19139* MMIX pseudo-ops: MMIX-Pseudos. (line 6) 19140* MMIX register names: MMIX-Regs. (line 6) 19141* MMIX support: MMIX-Dependent. (line 6) 19142* mmixal differences: MMIX-mmixal. (line 6) 19143* mmregs directive, TIC54X: TIC54X-Directives. (line 170) 19144* mmsg directive, TIC54X: TIC54X-Directives. (line 77) 19145* MMX, i386: i386-SIMD. (line 6) 19146* MMX, x86-64: i386-SIMD. (line 6) 19147* mnemonic compatibility, i386: i386-Mnemonics. (line 57) 19148* mnemonic suffixes, i386: i386-Syntax. (line 29) 19149* mnemonic suffixes, x86-64: i386-Syntax. (line 29) 19150* mnemonics for opcodes, VAX: VAX-opcodes. (line 6) 19151* mnemonics, AVR: AVR Opcodes. (line 6) 19152* mnemonics, D10V: D10V-Opcodes. (line 6) 19153* mnemonics, D30V: D30V-Opcodes. (line 6) 19154* mnemonics, H8/300: H8/300 Opcodes. (line 6) 19155* mnemonics, SH: SH Opcodes. (line 6) 19156* mnemonics, SH64: SH64 Opcodes. (line 6) 19157* mnemonics, Z8000: Z8000 Opcodes. (line 6) 19158* mnolist directive, TIC54X: TIC54X-Directives. (line 164) 19159* Motorola syntax for the 680x0: M68K-Moto-Syntax. (line 6) 19160* MOVI instructions, relaxation: Xtensa Immediate Relaxation. 19161 (line 12) 19162* MOVW and MOVT relocations, ARM: ARM-Relocations. (line 20) 19163* MRI compatibility mode: M. (line 6) 19164* mri directive: MRI. (line 6) 19165* MRI mode, temporarily: MRI. (line 6) 19166* MSP 430 floating point (IEEE): MSP430 Floating Point. 19167 (line 6) 19168* MSP 430 identifiers: MSP430-Chars. (line 8) 19169* MSP 430 line comment character: MSP430-Chars. (line 6) 19170* MSP 430 machine directives: MSP430 Directives. (line 6) 19171* MSP 430 macros: MSP430-Macros. (line 6) 19172* MSP 430 opcodes: MSP430 Opcodes. (line 6) 19173* MSP 430 options (none): MSP430 Options. (line 6) 19174* MSP 430 profiling capability: MSP430 Profiling Capability. 19175 (line 6) 19176* MSP 430 register names: MSP430-Regs. (line 6) 19177* MSP 430 support: MSP430-Dependent. (line 6) 19178* MSP430 Assembler Extensions: MSP430-Ext. (line 6) 19179* mul instruction, i386: i386-Notes. (line 6) 19180* mul instruction, x86-64: i386-Notes. (line 6) 19181* name: Z8000 Directives. (line 18) 19182* named section: Section. (line 6) 19183* named sections: Ld Sections. (line 8) 19184* names, symbol: Symbol Names. (line 6) 19185* naming object file: o. (line 6) 19186* new page, in listings: Eject. (line 6) 19187* newblock directive, TIC54X: TIC54X-Directives. (line 176) 19188* newline (\n): Strings. (line 21) 19189* newline, required at file end: Statements. (line 13) 19190* no-absolute-literals directive: Absolute Literals Directive. 19191 (line 6) 19192* no-longcalls directive: Longcalls Directive. (line 6) 19193* no-schedule directive: Schedule Directive. (line 6) 19194* no-transform directive: Transform Directive. (line 6) 19195* nolist directive: Nolist. (line 6) 19196* nolist directive, TIC54X: TIC54X-Directives. (line 131) 19197* NOP pseudo op, ARM: ARM Opcodes. (line 9) 19198* notes for Alpha: Alpha Notes. (line 6) 19199* null-terminated strings: Asciz. (line 6) 19200* number constants: Numbers. (line 6) 19201* number of macros executed: Macro. (line 143) 19202* numbered subsections: Sub-Sections. (line 6) 19203* numbers, 16-bit: hword. (line 6) 19204* numeric values: Expressions. (line 6) 19205* nword directive, SPARC: Sparc-Directives. (line 20) 19206* object attributes: Object Attributes. (line 6) 19207* object file: Object. (line 6) 19208* object file format: Object Formats. (line 6) 19209* object file name: o. (line 6) 19210* object file, after errors: Z. (line 6) 19211* obsolescent directives: Deprecated. (line 6) 19212* octa directive: Octa. (line 6) 19213* octal character code (\DDD): Strings. (line 30) 19214* octal integers: Integers. (line 9) 19215* offset directive, V850: V850 Directives. (line 6) 19216* opcode mnemonics, VAX: VAX-opcodes. (line 6) 19217* opcode names, Xtensa: Xtensa Opcodes. (line 6) 19218* opcode summary, AVR: AVR Opcodes. (line 6) 19219* opcode summary, D10V: D10V-Opcodes. (line 6) 19220* opcode summary, D30V: D30V-Opcodes. (line 6) 19221* opcode summary, H8/300: H8/300 Opcodes. (line 6) 19222* opcode summary, SH: SH Opcodes. (line 6) 19223* opcode summary, SH64: SH64 Opcodes. (line 6) 19224* opcode summary, Z8000: Z8000 Opcodes. (line 6) 19225* opcodes for ARC: ARC Opcodes. (line 6) 19226* opcodes for ARM: ARM Opcodes. (line 6) 19227* opcodes for MSP 430: MSP430 Opcodes. (line 6) 19228* opcodes for V850: V850 Opcodes. (line 6) 19229* opcodes, i860: Opcodes for i860. (line 6) 19230* opcodes, i960: Opcodes for i960. (line 6) 19231* opcodes, M680x0: M68K-opcodes. (line 6) 19232* opcodes, M68HC11: M68HC11-opcodes. (line 6) 19233* operand delimiters, i386: i386-Syntax. (line 15) 19234* operand delimiters, x86-64: i386-Syntax. (line 15) 19235* operand notation, VAX: VAX-operands. (line 6) 19236* operands in expressions: Arguments. (line 6) 19237* operator precedence: Infix Ops. (line 11) 19238* operators, in expressions: Operators. (line 6) 19239* operators, permitted arguments: Infix Ops. (line 6) 19240* optimization, D10V: Overview. (line 407) 19241* optimization, D30V: Overview. (line 412) 19242* optimizations: Xtensa Optimizations. 19243 (line 6) 19244* option directive, ARC: ARC Directives. (line 162) 19245* option directive, TIC54X: TIC54X-Directives. (line 180) 19246* option summary: Overview. (line 6) 19247* options for Alpha: Alpha Options. (line 6) 19248* options for ARC (none): ARC Options. (line 6) 19249* options for ARM (none): ARM Options. (line 6) 19250* options for AVR (none): AVR Options. (line 6) 19251* options for i386: i386-Options. (line 6) 19252* options for IA-64: IA-64 Options. (line 6) 19253* options for MSP430 (none): MSP430 Options. (line 6) 19254* options for PDP-11: PDP-11-Options. (line 6) 19255* options for PowerPC: PowerPC-Opts. (line 6) 19256* options for SPARC: Sparc-Opts. (line 6) 19257* options for V850 (none): V850 Options. (line 6) 19258* options for VAX/VMS: VAX-Opts. (line 42) 19259* options for x86-64: i386-Options. (line 6) 19260* options for Z80: Z80 Options. (line 6) 19261* options, all versions of assembler: Invoking. (line 6) 19262* options, command line: Command Line. (line 13) 19263* options, CRIS: CRIS-Opts. (line 6) 19264* options, D10V: D10V-Opts. (line 6) 19265* options, D30V: D30V-Opts. (line 6) 19266* options, H8/300: H8/300 Options. (line 6) 19267* options, i960: Options-i960. (line 6) 19268* options, IP2K: IP2K-Opts. (line 6) 19269* options, M32C: M32C-Opts. (line 6) 19270* options, M32R: M32R-Opts. (line 6) 19271* options, M680x0: M68K-Opts. (line 6) 19272* options, M68HC11: M68HC11-Opts. (line 6) 19273* options, MMIX: MMIX-Opts. (line 6) 19274* options, PJ: PJ Options. (line 6) 19275* options, SH: SH Options. (line 6) 19276* options, SH64: SH64 Options. (line 6) 19277* options, TIC54X: TIC54X-Opts. (line 6) 19278* options, Z8000: Z8000 Options. (line 6) 19279* org directive: Org. (line 6) 19280* other attribute, of a.out symbol: Symbol Other. (line 6) 19281* output file: Object. (line 6) 19282* p2align directive: P2align. (line 6) 19283* p2alignl directive: P2align. (line 28) 19284* p2alignw directive: P2align. (line 28) 19285* padding the location counter: Align. (line 6) 19286* padding the location counter given a power of two: P2align. (line 6) 19287* padding the location counter given number of bytes: Balign. (line 6) 19288* page, in listings: Eject. (line 6) 19289* paper size, for listings: Psize. (line 6) 19290* paths for .include: I. (line 6) 19291* patterns, writing in memory: Fill. (line 6) 19292* PDP-11 comments: PDP-11-Syntax. (line 16) 19293* PDP-11 floating-point register syntax: PDP-11-Syntax. (line 13) 19294* PDP-11 general-purpose register syntax: PDP-11-Syntax. (line 10) 19295* PDP-11 instruction naming: PDP-11-Mnemonics. (line 6) 19296* PDP-11 support: PDP-11-Dependent. (line 6) 19297* PDP-11 syntax: PDP-11-Syntax. (line 6) 19298* PIC code generation for ARM: ARM Options. (line 122) 19299* PIC code generation for M32R: M32R-Opts. (line 42) 19300* PIC selection, MIPS: MIPS Opts. (line 21) 19301* PJ endianness: Overview. (line 535) 19302* PJ options: PJ Options. (line 6) 19303* PJ support: PJ-Dependent. (line 6) 19304* plus, permitted arguments: Infix Ops. (line 44) 19305* popsection directive: PopSection. (line 6) 19306* Position-independent code, CRIS: CRIS-Opts. (line 27) 19307* Position-independent code, symbols in, CRIS: CRIS-Pic. (line 6) 19308* PowerPC architectures: PowerPC-Opts. (line 6) 19309* PowerPC directives: PowerPC-Pseudo. (line 6) 19310* PowerPC options: PowerPC-Opts. (line 6) 19311* PowerPC support: PPC-Dependent. (line 6) 19312* precedence of operators: Infix Ops. (line 11) 19313* precision, floating point: Flonums. (line 6) 19314* prefix operators: Prefix Ops. (line 6) 19315* prefixes, i386: i386-Prefixes. (line 6) 19316* preprocessing: Preprocessing. (line 6) 19317* preprocessing, turning on and off: Preprocessing. (line 27) 19318* previous directive: Previous. (line 6) 19319* primary attributes, COFF symbols: COFF Symbols. (line 13) 19320* print directive: Print. (line 6) 19321* proc directive, SPARC: Sparc-Directives. (line 25) 19322* profiler directive, MSP 430: MSP430 Directives. (line 22) 19323* profiling capability for MSP 430: MSP430 Profiling Capability. 19324 (line 6) 19325* protected directive: Protected. (line 6) 19326* pseudo-op .arch, CRIS: CRIS-Pseudos. (line 45) 19327* pseudo-op .dword, CRIS: CRIS-Pseudos. (line 12) 19328* pseudo-op .syntax, CRIS: CRIS-Pseudos. (line 17) 19329* pseudo-op BSPEC, MMIX: MMIX-Pseudos. (line 131) 19330* pseudo-op BYTE, MMIX: MMIX-Pseudos. (line 97) 19331* pseudo-op ESPEC, MMIX: MMIX-Pseudos. (line 131) 19332* pseudo-op GREG, MMIX: MMIX-Pseudos. (line 50) 19333* pseudo-op IS, MMIX: MMIX-Pseudos. (line 42) 19334* pseudo-op LOC, MMIX: MMIX-Pseudos. (line 7) 19335* pseudo-op LOCAL, MMIX: MMIX-Pseudos. (line 28) 19336* pseudo-op OCTA, MMIX: MMIX-Pseudos. (line 108) 19337* pseudo-op PREFIX, MMIX: MMIX-Pseudos. (line 120) 19338* pseudo-op TETRA, MMIX: MMIX-Pseudos. (line 108) 19339* pseudo-op WYDE, MMIX: MMIX-Pseudos. (line 108) 19340* pseudo-opcodes, M680x0: M68K-Branch. (line 6) 19341* pseudo-opcodes, M68HC11: M68HC11-Branch. (line 6) 19342* pseudo-ops for branch, VAX: VAX-branch. (line 6) 19343* pseudo-ops, CRIS: CRIS-Pseudos. (line 6) 19344* pseudo-ops, machine independent: Pseudo Ops. (line 6) 19345* pseudo-ops, MMIX: MMIX-Pseudos. (line 6) 19346* psize directive: Psize. (line 6) 19347* PSR bits: IA-64-Bits. (line 6) 19348* pstring directive, TIC54X: TIC54X-Directives. (line 209) 19349* psw register, V850: V850-Regs. (line 116) 19350* purgem directive: Purgem. (line 6) 19351* purpose of GNU assembler: GNU Assembler. (line 12) 19352* pushsection directive: PushSection. (line 6) 19353* quad directive: Quad. (line 6) 19354* quad directive, i386: i386-Float. (line 21) 19355* quad directive, x86-64: i386-Float. (line 21) 19356* real-mode code, i386: i386-16bit. (line 6) 19357* ref directive, TIC54X: TIC54X-Directives. (line 103) 19358* register directive, SPARC: Sparc-Directives. (line 29) 19359* register names, Alpha: Alpha-Regs. (line 6) 19360* register names, ARC: ARC-Regs. (line 6) 19361* register names, ARM: ARM-Regs. (line 6) 19362* register names, AVR: AVR-Regs. (line 6) 19363* register names, CRIS: CRIS-Regs. (line 6) 19364* register names, H8/300: H8/300-Regs. (line 6) 19365* register names, IA-64: IA-64-Regs. (line 6) 19366* register names, MMIX: MMIX-Regs. (line 6) 19367* register names, MSP 430: MSP430-Regs. (line 6) 19368* register names, Sparc: Sparc-Regs. (line 6) 19369* register names, V850: V850-Regs. (line 6) 19370* register names, VAX: VAX-operands. (line 17) 19371* register names, Xtensa: Xtensa Registers. (line 6) 19372* register names, Z80: Z80-Regs. (line 6) 19373* register operands, i386: i386-Syntax. (line 15) 19374* register operands, x86-64: i386-Syntax. (line 15) 19375* registers, D10V: D10V-Regs. (line 6) 19376* registers, D30V: D30V-Regs. (line 6) 19377* registers, i386: i386-Regs. (line 6) 19378* registers, SH: SH-Regs. (line 6) 19379* registers, SH64: SH64-Regs. (line 6) 19380* registers, TIC54X memory-mapped: TIC54X-MMRegs. (line 6) 19381* registers, x86-64: i386-Regs. (line 6) 19382* registers, Z8000: Z8000-Regs. (line 6) 19383* relaxation: Xtensa Relaxation. (line 6) 19384* relaxation of ADDI instructions: Xtensa Immediate Relaxation. 19385 (line 43) 19386* relaxation of branch instructions: Xtensa Branch Relaxation. 19387 (line 6) 19388* relaxation of call instructions: Xtensa Call Relaxation. 19389 (line 6) 19390* relaxation of immediate fields: Xtensa Immediate Relaxation. 19391 (line 6) 19392* relaxation of L16SI instructions: Xtensa Immediate Relaxation. 19393 (line 23) 19394* relaxation of L16UI instructions: Xtensa Immediate Relaxation. 19395 (line 23) 19396* relaxation of L32I instructions: Xtensa Immediate Relaxation. 19397 (line 23) 19398* relaxation of L8UI instructions: Xtensa Immediate Relaxation. 19399 (line 23) 19400* relaxation of MOVI instructions: Xtensa Immediate Relaxation. 19401 (line 12) 19402* reloc directive: Reloc. (line 6) 19403* relocation: Sections. (line 6) 19404* relocation example: Ld Sections. (line 40) 19405* relocations, Alpha: Alpha-Relocs. (line 6) 19406* relocations, Sparc: Sparc-Relocs. (line 6) 19407* repeat prefixes, i386: i386-Prefixes. (line 44) 19408* reporting bugs in assembler: Reporting Bugs. (line 6) 19409* rept directive: Rept. (line 6) 19410* req directive, ARM: ARM Directives. (line 13) 19411* reserve directive, SPARC: Sparc-Directives. (line 39) 19412* return instructions, i386: i386-Syntax. (line 38) 19413* return instructions, x86-64: i386-Syntax. (line 38) 19414* REX prefixes, i386: i386-Prefixes. (line 46) 19415* rsect: Z8000 Directives. (line 52) 19416* sblock directive, TIC54X: TIC54X-Directives. (line 183) 19417* sbttl directive: Sbttl. (line 6) 19418* schedule directive: Schedule Directive. (line 6) 19419* scl directive: Scl. (line 6) 19420* sdaoff pseudo-op, V850: V850 Opcodes. (line 65) 19421* search path for .include: I. (line 6) 19422* sect directive, MSP 430: MSP430 Directives. (line 18) 19423* sect directive, TIC54X: TIC54X-Directives. (line 189) 19424* section directive (COFF version): Section. (line 16) 19425* section directive (ELF version): Section. (line 67) 19426* section directive, V850: V850 Directives. (line 9) 19427* section override prefixes, i386: i386-Prefixes. (line 23) 19428* Section Stack <1>: Previous. (line 6) 19429* Section Stack <2>: PopSection. (line 6) 19430* Section Stack <3>: PushSection. (line 6) 19431* Section Stack <4>: SubSection. (line 6) 19432* Section Stack: Section. (line 62) 19433* section-relative addressing: Secs Background. (line 68) 19434* sections: Sections. (line 6) 19435* sections in messages, internal: As Sections. (line 6) 19436* sections, i386: i386-Syntax. (line 44) 19437* sections, named: Ld Sections. (line 8) 19438* sections, x86-64: i386-Syntax. (line 44) 19439* seg directive, SPARC: Sparc-Directives. (line 44) 19440* segm: Z8000 Directives. (line 10) 19441* set directive: Set. (line 6) 19442* set directive, TIC54X: TIC54X-Directives. (line 192) 19443* SH addressing modes: SH-Addressing. (line 6) 19444* SH floating point (IEEE): SH Floating Point. (line 6) 19445* SH line comment character: SH-Chars. (line 6) 19446* SH line separator: SH-Chars. (line 8) 19447* SH machine directives: SH Directives. (line 6) 19448* SH opcode summary: SH Opcodes. (line 6) 19449* SH options: SH Options. (line 6) 19450* SH registers: SH-Regs. (line 6) 19451* SH support: SH-Dependent. (line 6) 19452* SH64 ABI options: SH64 Options. (line 29) 19453* SH64 addressing modes: SH64-Addressing. (line 6) 19454* SH64 ISA options: SH64 Options. (line 6) 19455* SH64 line comment character: SH64-Chars. (line 6) 19456* SH64 line separator: SH64-Chars. (line 8) 19457* SH64 machine directives: SH64 Directives. (line 9) 19458* SH64 opcode summary: SH64 Opcodes. (line 6) 19459* SH64 options: SH64 Options. (line 6) 19460* SH64 registers: SH64-Regs. (line 6) 19461* SH64 support: SH64-Dependent. (line 6) 19462* shigh directive, M32R: M32R-Directives. (line 26) 19463* short directive: Short. (line 6) 19464* short directive, ARC: ARC Directives. (line 171) 19465* short directive, TIC54X: TIC54X-Directives. (line 111) 19466* SIMD, i386: i386-SIMD. (line 6) 19467* SIMD, x86-64: i386-SIMD. (line 6) 19468* single character constant: Chars. (line 6) 19469* single directive: Single. (line 6) 19470* single directive, i386: i386-Float. (line 14) 19471* single directive, x86-64: i386-Float. (line 14) 19472* single quote, Z80: Z80-Chars. (line 13) 19473* sixteen bit integers: hword. (line 6) 19474* sixteen byte integer: Octa. (line 6) 19475* size directive (COFF version): Size. (line 11) 19476* size directive (ELF version): Size. (line 19) 19477* size modifiers, D10V: D10V-Size. (line 6) 19478* size modifiers, D30V: D30V-Size. (line 6) 19479* size modifiers, M680x0: M68K-Syntax. (line 8) 19480* size prefixes, i386: i386-Prefixes. (line 27) 19481* size suffixes, H8/300: H8/300 Opcodes. (line 163) 19482* size, translations, Sparc: Sparc-Size-Translations. 19483 (line 6) 19484* sizes operands, i386: i386-Syntax. (line 29) 19485* sizes operands, x86-64: i386-Syntax. (line 29) 19486* skip directive: Skip. (line 6) 19487* skip directive, M680x0: M68K-Directives. (line 19) 19488* skip directive, SPARC: Sparc-Directives. (line 48) 19489* sleb128 directive: Sleb128. (line 6) 19490* small objects, MIPS ECOFF: MIPS Object. (line 11) 19491* SmartMIPS instruction generation override: MIPS ASE instruction generation overrides. 19492 (line 11) 19493* SOM symbol attributes: SOM Symbols. (line 6) 19494* source program: Input Files. (line 6) 19495* source, destination operands; i386: i386-Syntax. (line 22) 19496* source, destination operands; x86-64: i386-Syntax. (line 22) 19497* sp register: Xtensa Registers. (line 6) 19498* sp register, V850: V850-Regs. (line 14) 19499* space directive: Space. (line 6) 19500* space directive, TIC54X: TIC54X-Directives. (line 197) 19501* space used, maximum for assembly: statistics. (line 6) 19502* SPARC architectures: Sparc-Opts. (line 6) 19503* Sparc constants: Sparc-Constants. (line 6) 19504* SPARC data alignment: Sparc-Aligned-Data. (line 6) 19505* SPARC floating point (IEEE): Sparc-Float. (line 6) 19506* Sparc line comment character: Sparc-Chars. (line 6) 19507* Sparc line separator: Sparc-Chars. (line 8) 19508* SPARC machine directives: Sparc-Directives. (line 6) 19509* SPARC options: Sparc-Opts. (line 6) 19510* Sparc registers: Sparc-Regs. (line 6) 19511* Sparc relocations: Sparc-Relocs. (line 6) 19512* Sparc size translations: Sparc-Size-Translations. 19513 (line 6) 19514* SPARC support: Sparc-Dependent. (line 6) 19515* SPARC syntax: Sparc-Aligned-Data. (line 21) 19516* special characters, ARC: ARC-Chars. (line 6) 19517* special characters, M680x0: M68K-Chars. (line 6) 19518* special purpose registers, MSP 430: MSP430-Regs. (line 11) 19519* sslist directive, TIC54X: TIC54X-Directives. (line 204) 19520* ssnolist directive, TIC54X: TIC54X-Directives. (line 204) 19521* stabd directive: Stab. (line 38) 19522* stabn directive: Stab. (line 48) 19523* stabs directive: Stab. (line 51) 19524* stabX directives: Stab. (line 6) 19525* standard assembler sections: Secs Background. (line 27) 19526* standard input, as input file: Command Line. (line 10) 19527* statement separator character: Statements. (line 6) 19528* statement separator, Alpha: Alpha-Chars. (line 8) 19529* statement separator, ARM: ARM-Chars. (line 10) 19530* statement separator, AVR: AVR-Chars. (line 10) 19531* statement separator, H8/300: H8/300-Chars. (line 8) 19532* statement separator, IA-64: IA-64-Chars. (line 8) 19533* statement separator, SH: SH-Chars. (line 8) 19534* statement separator, SH64: SH64-Chars. (line 8) 19535* statement separator, Sparc: Sparc-Chars. (line 8) 19536* statement separator, Z8000: Z8000-Chars. (line 8) 19537* statements, structure of: Statements. (line 6) 19538* statistics, about assembly: statistics. (line 6) 19539* stopping the assembly: Abort. (line 6) 19540* string constants: Strings. (line 6) 19541* string directive: String. (line 8) 19542* string directive on HPPA: HPPA Directives. (line 137) 19543* string directive, TIC54X: TIC54X-Directives. (line 209) 19544* string literals: Ascii. (line 6) 19545* string, copying to object file: String. (line 8) 19546* string16 directive: String. (line 8) 19547* string16, copying to object file: String. (line 8) 19548* string32 directive: String. (line 8) 19549* string32, copying to object file: String. (line 8) 19550* string64 directive: String. (line 8) 19551* string64, copying to object file: String. (line 8) 19552* string8 directive: String. (line 8) 19553* string8, copying to object file: String. (line 8) 19554* struct directive: Struct. (line 6) 19555* struct directive, TIC54X: TIC54X-Directives. (line 217) 19556* structure debugging, COFF: Tag. (line 6) 19557* sub-instruction ordering, D10V: D10V-Chars. (line 6) 19558* sub-instruction ordering, D30V: D30V-Chars. (line 6) 19559* sub-instructions, D10V: D10V-Subs. (line 6) 19560* sub-instructions, D30V: D30V-Subs. (line 6) 19561* subexpressions: Arguments. (line 24) 19562* subsection directive: SubSection. (line 6) 19563* subsym builtins, TIC54X: TIC54X-Macros. (line 16) 19564* subtitles for listings: Sbttl. (line 6) 19565* subtraction, permitted arguments: Infix Ops. (line 49) 19566* summary of options: Overview. (line 6) 19567* support: HPPA-Dependent. (line 6) 19568* supporting files, including: Include. (line 6) 19569* suppressing warnings: W. (line 11) 19570* sval: Z8000 Directives. (line 33) 19571* symbol attributes: Symbol Attributes. (line 6) 19572* symbol attributes, a.out: a.out Symbols. (line 6) 19573* symbol attributes, COFF: COFF Symbols. (line 6) 19574* symbol attributes, SOM: SOM Symbols. (line 6) 19575* symbol descriptor, COFF: Desc. (line 6) 19576* symbol modifiers <1>: M68HC11-Modifiers. (line 12) 19577* symbol modifiers <2>: AVR-Modifiers. (line 12) 19578* symbol modifiers: M32C-Modifiers. (line 11) 19579* symbol names: Symbol Names. (line 6) 19580* symbol names, $ in <1>: SH64-Chars. (line 10) 19581* symbol names, $ in <2>: D30V-Chars. (line 63) 19582* symbol names, $ in <3>: D10V-Chars. (line 46) 19583* symbol names, $ in: SH-Chars. (line 10) 19584* symbol names, local: Symbol Names. (line 22) 19585* symbol names, temporary: Symbol Names. (line 35) 19586* symbol storage class (COFF): Scl. (line 6) 19587* symbol type: Symbol Type. (line 6) 19588* symbol type, COFF: Type. (line 11) 19589* symbol type, ELF: Type. (line 22) 19590* symbol value: Symbol Value. (line 6) 19591* symbol value, setting: Set. (line 6) 19592* symbol values, assigning: Setting Symbols. (line 6) 19593* symbol versioning: Symver. (line 6) 19594* symbol, common: Comm. (line 6) 19595* symbol, making visible to linker: Global. (line 6) 19596* symbolic debuggers, information for: Stab. (line 6) 19597* symbols: Symbols. (line 6) 19598* Symbols in position-independent code, CRIS: CRIS-Pic. (line 6) 19599* symbols with uppercase, VAX/VMS: VAX-Opts. (line 42) 19600* symbols, assigning values to: Equ. (line 6) 19601* Symbols, built-in, CRIS: CRIS-Symbols. (line 6) 19602* Symbols, CRIS, built-in: CRIS-Symbols. (line 6) 19603* symbols, local common: Lcomm. (line 6) 19604* symver directive: Symver. (line 6) 19605* syntax compatibility, i386: i386-Syntax. (line 6) 19606* syntax compatibility, x86-64: i386-Syntax. (line 6) 19607* syntax, AVR: AVR-Modifiers. (line 6) 19608* syntax, BFIN: BFIN Syntax. (line 6) 19609* syntax, D10V: D10V-Syntax. (line 6) 19610* syntax, D30V: D30V-Syntax. (line 6) 19611* syntax, M32C: M32C-Modifiers. (line 6) 19612* syntax, M680x0: M68K-Syntax. (line 8) 19613* syntax, M68HC11 <1>: M68HC11-Modifiers. (line 6) 19614* syntax, M68HC11: M68HC11-Syntax. (line 6) 19615* syntax, machine-independent: Syntax. (line 6) 19616* syntax, SPARC: Sparc-Aligned-Data. (line 21) 19617* syntax, Xtensa assembler: Xtensa Syntax. (line 6) 19618* sysproc directive, i960: Directives-i960. (line 37) 19619* tab (\t): Strings. (line 27) 19620* tab directive, TIC54X: TIC54X-Directives. (line 248) 19621* tag directive: Tag. (line 6) 19622* tag directive, TIC54X: TIC54X-Directives. (line 251) 19623* tdaoff pseudo-op, V850: V850 Opcodes. (line 81) 19624* temporary symbol names: Symbol Names. (line 35) 19625* text and data sections, joining: R. (line 6) 19626* text directive: Text. (line 6) 19627* text section: Ld Sections. (line 9) 19628* tfloat directive, i386: i386-Float. (line 14) 19629* tfloat directive, x86-64: i386-Float. (line 14) 19630* thumb directive, ARM: ARM Directives. (line 57) 19631* Thumb support: ARM-Dependent. (line 6) 19632* thumb_func directive, ARM: ARM Directives. (line 67) 19633* thumb_set directive, ARM: ARM Directives. (line 78) 19634* TIC54X builtin math functions: TIC54X-Builtins. (line 6) 19635* TIC54X machine directives: TIC54X-Directives. (line 6) 19636* TIC54X memory-mapped registers: TIC54X-MMRegs. (line 6) 19637* TIC54X options: TIC54X-Opts. (line 6) 19638* TIC54X subsym builtins: TIC54X-Macros. (line 16) 19639* TIC54X support: TIC54X-Dependent. (line 6) 19640* TIC54X-specific macros: TIC54X-Macros. (line 6) 19641* time, total for assembly: statistics. (line 6) 19642* title directive: Title. (line 6) 19643* tp register, V850: V850-Regs. (line 20) 19644* transform directive: Transform Directive. (line 6) 19645* trusted compiler: f. (line 6) 19646* turning preprocessing on and off: Preprocessing. (line 27) 19647* type directive (COFF version): Type. (line 11) 19648* type directive (ELF version): Type. (line 22) 19649* type of a symbol: Symbol Type. (line 6) 19650* ualong directive, SH: SH Directives. (line 6) 19651* uaword directive, SH: SH Directives. (line 6) 19652* ubyte directive, TIC54X: TIC54X-Directives. (line 36) 19653* uchar directive, TIC54X: TIC54X-Directives. (line 36) 19654* uhalf directive, TIC54X: TIC54X-Directives. (line 111) 19655* uint directive, TIC54X: TIC54X-Directives. (line 111) 19656* uleb128 directive: Uleb128. (line 6) 19657* ulong directive, TIC54X: TIC54X-Directives. (line 135) 19658* undefined section: Ld Sections. (line 36) 19659* union directive, TIC54X: TIC54X-Directives. (line 251) 19660* unreq directive, ARM: ARM Directives. (line 18) 19661* unsegm: Z8000 Directives. (line 14) 19662* usect directive, TIC54X: TIC54X-Directives. (line 263) 19663* ushort directive, TIC54X: TIC54X-Directives. (line 111) 19664* uword directive, TIC54X: TIC54X-Directives. (line 111) 19665* V850 command line options: V850 Options. (line 9) 19666* V850 floating point (IEEE): V850 Floating Point. (line 6) 19667* V850 line comment character: V850-Chars. (line 6) 19668* V850 machine directives: V850 Directives. (line 6) 19669* V850 opcodes: V850 Opcodes. (line 6) 19670* V850 options (none): V850 Options. (line 6) 19671* V850 register names: V850-Regs. (line 6) 19672* V850 support: V850-Dependent. (line 6) 19673* val directive: Val. (line 6) 19674* value attribute, COFF: Val. (line 6) 19675* value of a symbol: Symbol Value. (line 6) 19676* var directive, TIC54X: TIC54X-Directives. (line 273) 19677* VAX bitfields not supported: VAX-no. (line 6) 19678* VAX branch improvement: VAX-branch. (line 6) 19679* VAX command-line options ignored: VAX-Opts. (line 6) 19680* VAX displacement sizing character: VAX-operands. (line 12) 19681* VAX floating point: VAX-float. (line 6) 19682* VAX immediate character: VAX-operands. (line 6) 19683* VAX indirect character: VAX-operands. (line 9) 19684* VAX machine directives: VAX-directives. (line 6) 19685* VAX opcode mnemonics: VAX-opcodes. (line 6) 19686* VAX operand notation: VAX-operands. (line 6) 19687* VAX register names: VAX-operands. (line 17) 19688* VAX support: Vax-Dependent. (line 6) 19689* Vax-11 C compatibility: VAX-Opts. (line 42) 19690* VAX/VMS options: VAX-Opts. (line 42) 19691* version directive: Version. (line 6) 19692* version directive, TIC54X: TIC54X-Directives. (line 277) 19693* version of assembler: v. (line 6) 19694* versions of symbols: Symver. (line 6) 19695* visibility <1>: Protected. (line 6) 19696* visibility <2>: Hidden. (line 6) 19697* visibility: Internal. (line 6) 19698* VMS (VAX) options: VAX-Opts. (line 42) 19699* vtable_entry directive: VTableEntry. (line 6) 19700* vtable_inherit directive: VTableInherit. (line 6) 19701* warning directive: Warning. (line 6) 19702* warning for altered difference tables: K. (line 6) 19703* warning messages: Errors. (line 6) 19704* warnings, causing error: W. (line 16) 19705* warnings, M32R: M32R-Warnings. (line 6) 19706* warnings, suppressing: W. (line 11) 19707* warnings, switching on: W. (line 19) 19708* weak directive: Weak. (line 6) 19709* weakref directive: Weakref. (line 6) 19710* whitespace: Whitespace. (line 6) 19711* whitespace, removed by preprocessor: Preprocessing. (line 7) 19712* wide floating point directives, VAX: VAX-directives. (line 10) 19713* width directive, TIC54X: TIC54X-Directives. (line 127) 19714* Width of continuation lines of disassembly output: listing. (line 21) 19715* Width of first line disassembly output: listing. (line 16) 19716* Width of source line output: listing. (line 28) 19717* wmsg directive, TIC54X: TIC54X-Directives. (line 77) 19718* word directive: Word. (line 6) 19719* word directive, ARC: ARC Directives. (line 174) 19720* word directive, H8/300: H8/300 Directives. (line 6) 19721* word directive, i386: i386-Float. (line 21) 19722* word directive, SPARC: Sparc-Directives. (line 51) 19723* word directive, TIC54X: TIC54X-Directives. (line 111) 19724* word directive, x86-64: i386-Float. (line 21) 19725* writing patterns in memory: Fill. (line 6) 19726* wval: Z8000 Directives. (line 24) 19727* x86 machine directives: i386-Directives. (line 6) 19728* x86-64 arch directive: i386-Arch. (line 6) 19729* x86-64 att_syntax pseudo op: i386-Syntax. (line 6) 19730* x86-64 conversion instructions: i386-Mnemonics. (line 32) 19731* x86-64 floating point: i386-Float. (line 6) 19732* x86-64 immediate operands: i386-Syntax. (line 15) 19733* x86-64 instruction naming: i386-Mnemonics. (line 6) 19734* x86-64 intel_syntax pseudo op: i386-Syntax. (line 6) 19735* x86-64 jump optimization: i386-Jumps. (line 6) 19736* x86-64 jump, call, return: i386-Syntax. (line 38) 19737* x86-64 jump/call operands: i386-Syntax. (line 15) 19738* x86-64 memory references: i386-Memory. (line 6) 19739* x86-64 options: i386-Options. (line 6) 19740* x86-64 register operands: i386-Syntax. (line 15) 19741* x86-64 registers: i386-Regs. (line 6) 19742* x86-64 sections: i386-Syntax. (line 44) 19743* x86-64 size suffixes: i386-Syntax. (line 29) 19744* x86-64 source, destination operands: i386-Syntax. (line 22) 19745* x86-64 support: i386-Dependent. (line 6) 19746* x86-64 syntax compatibility: i386-Syntax. (line 6) 19747* xfloat directive, TIC54X: TIC54X-Directives. (line 64) 19748* xlong directive, TIC54X: TIC54X-Directives. (line 135) 19749* Xtensa architecture: Xtensa-Dependent. (line 6) 19750* Xtensa assembler syntax: Xtensa Syntax. (line 6) 19751* Xtensa directives: Xtensa Directives. (line 6) 19752* Xtensa opcode names: Xtensa Opcodes. (line 6) 19753* Xtensa register names: Xtensa Registers. (line 6) 19754* xword directive, SPARC: Sparc-Directives. (line 55) 19755* Z80 $: Z80-Chars. (line 8) 19756* Z80 ': Z80-Chars. (line 13) 19757* Z80 floating point: Z80 Floating Point. (line 6) 19758* Z80 line comment character: Z80-Chars. (line 6) 19759* Z80 options: Z80 Options. (line 6) 19760* Z80 registers: Z80-Regs. (line 6) 19761* Z80 support: Z80-Dependent. (line 6) 19762* Z80 Syntax: Z80 Options. (line 47) 19763* Z80, \: Z80-Chars. (line 11) 19764* Z80, case sensitivity: Z80-Case. (line 6) 19765* Z80-only directives: Z80 Directives. (line 9) 19766* Z800 addressing modes: Z8000-Addressing. (line 6) 19767* Z8000 directives: Z8000 Directives. (line 6) 19768* Z8000 line comment character: Z8000-Chars. (line 6) 19769* Z8000 line separator: Z8000-Chars. (line 8) 19770* Z8000 opcode summary: Z8000 Opcodes. (line 6) 19771* Z8000 options: Z8000 Options. (line 6) 19772* Z8000 registers: Z8000-Regs. (line 6) 19773* Z8000 support: Z8000-Dependent. (line 6) 19774* zdaoff pseudo-op, V850: V850 Opcodes. (line 99) 19775* zero register, V850: V850-Regs. (line 7) 19776* zero-terminated strings: Asciz. (line 6) 19777 19778 19779 19780Tag Table: 19781Node: Top758 19782Node: Overview1746 19783Node: Manual29607 19784Node: GNU Assembler30551 19785Node: Object Formats31722 19786Node: Command Line32174 19787Node: Input Files33261 19788Node: Object35242 19789Node: Errors36138 19790Node: Invoking37333 19791Node: a39288 19792Node: alternate41199 19793Node: D41371 19794Node: f41604 19795Node: I42112 19796Node: K42656 19797Node: L42960 19798Node: listing43699 19799Node: M45358 19800Node: MD49759 19801Node: o50185 19802Node: R50640 19803Node: statistics51670 19804Node: traditional-format52077 19805Node: v52550 19806Node: W52825 19807Node: Z53732 19808Node: Syntax54254 19809Node: Preprocessing54845 19810Node: Whitespace56408 19811Node: Comments56804 19812Node: Symbol Intro58957 19813Node: Statements59647 19814Node: Constants61568 19815Node: Characters62199 19816Node: Strings62701 19817Node: Chars64867 19818Node: Numbers65621 19819Node: Integers66161 19820Node: Bignums66817 19821Node: Flonums67173 19822Node: Sections68920 19823Node: Secs Background69298 19824Node: Ld Sections74337 19825Node: As Sections76721 19826Node: Sub-Sections77631 19827Node: bss80776 19828Node: Symbols81726 19829Node: Labels82374 19830Node: Setting Symbols83105 19831Node: Symbol Names83601 19832Node: Dot88664 19833Node: Symbol Attributes89111 19834Node: Symbol Value89848 19835Node: Symbol Type90893 19836Node: a.out Symbols91281 19837Node: Symbol Desc91543 19838Node: Symbol Other91838 19839Node: COFF Symbols92007 19840Node: SOM Symbols92680 19841Node: Expressions93122 19842Node: Empty Exprs93871 19843Node: Integer Exprs94218 19844Node: Arguments94613 19845Node: Operators95719 19846Node: Prefix Ops96054 19847Node: Infix Ops96382 19848Node: Pseudo Ops98772 19849Node: Abort104178 19850Node: ABORT (COFF)104590 19851Node: Align104798 19852Node: Ascii107080 19853Node: Asciz107389 19854Node: Balign107634 19855Node: Byte109497 19856Node: Comm109735 19857Node: CFI directives111109 19858Node: LNS directives116304 19859Node: Data118379 19860Node: Def118706 19861Node: Desc118938 19862Node: Dim119438 19863Node: Double119695 19864Node: Eject120033 19865Node: Else120208 19866Node: Elseif120508 19867Node: End120802 19868Node: Endef121017 19869Node: Endfunc121194 19870Node: Endif121369 19871Node: Equ121630 19872Node: Equiv122144 19873Node: Eqv122700 19874Node: Err123064 19875Node: Error123375 19876Node: Exitm123820 19877Node: Extern123989 19878Node: Fail124250 19879Node: File124695 19880Node: Fill125172 19881Node: Float126136 19882Node: Func126478 19883Node: Global127068 19884Node: Gnu_attribute127825 19885Node: Hidden128050 19886Node: hword128636 19887Node: Ident128964 19888Node: If129538 19889Node: Incbin132597 19890Node: Include133292 19891Node: Int133843 19892Node: Internal134224 19893Node: Irp134872 19894Node: Irpc135751 19895Node: Lcomm136668 19896Node: Lflags137416 19897Node: Line137610 19898Node: Linkonce138529 19899Node: Ln139758 19900Node: MRI139919 19901Node: List140257 19902Node: Long140865 19903Node: Macro141052 19904Node: Altmacro146974 19905Node: Noaltmacro148305 19906Node: Nolist148474 19907Node: Octa148904 19908Node: Org149238 19909Node: P2align150521 19910Node: Previous152449 19911Node: PopSection153862 19912Node: Print154370 19913Node: Protected154599 19914Node: Psize155246 19915Node: Purgem155930 19916Node: PushSection156151 19917Node: Quad156894 19918Node: Reloc157350 19919Node: Rept158111 19920Node: Sbttl158525 19921Node: Scl158890 19922Node: Section159231 19923Node: Set164368 19924Node: Short165005 19925Node: Single165326 19926Node: Size165671 19927Node: Sleb128166343 19928Node: Skip166667 19929Node: Space166991 19930Node: Stab167632 19931Node: String169636 19932Node: Struct170630 19933Node: SubSection171355 19934Node: Symver171918 19935Node: Tag174311 19936Node: Text174693 19937Node: Title175014 19938Node: Type175395 19939Node: Uleb128177118 19940Node: Val177442 19941Node: Version177692 19942Node: VTableEntry177967 19943Node: VTableInherit178257 19944Node: Warning178707 19945Node: Weak178941 19946Node: Weakref179610 19947Node: Word180575 19948Node: Deprecated182421 19949Node: Object Attributes182656 19950Node: GNU Object Attributes184376 19951Node: Defining New Object Attributes186929 19952Node: Machine Dependencies187726 19953Node: Alpha-Dependent190610 19954Node: Alpha Notes191024 19955Node: Alpha Options191305 19956Node: Alpha Syntax193503 19957Node: Alpha-Chars193972 19958Node: Alpha-Regs194203 19959Node: Alpha-Relocs194590 19960Node: Alpha Floating Point200848 19961Node: Alpha Directives201070 19962Node: Alpha Opcodes206593 19963Node: ARC-Dependent206888 19964Node: ARC Options207271 19965Node: ARC Syntax208340 19966Node: ARC-Chars208572 19967Node: ARC-Regs208704 19968Node: ARC Floating Point208828 19969Node: ARC Directives209139 19970Node: ARC Opcodes215111 19971Node: ARM-Dependent215337 19972Node: ARM Options215802 19973Node: ARM Syntax221935 19974Node: ARM-Chars222204 19975Node: ARM-Regs222728 19976Node: ARM Floating Point222937 19977Node: ARM-Relocations223136 19978Node: ARM Directives224089 19979Ref: arm_fnstart228104 19980Ref: arm_fnend228179 19981Ref: arm_save229196 19982Ref: arm_pad230526 19983Ref: arm_movsp230732 19984Ref: arm_setfp230910 19985Node: ARM Opcodes232461 19986Node: ARM Mapping Symbols234549 19987Node: ARM Unwinding Tutorial235359 19988Node: AVR-Dependent241561 19989Node: AVR Options241847 19990Node: AVR Syntax244678 19991Node: AVR-Chars244965 19992Node: AVR-Regs245371 19993Node: AVR-Modifiers245950 19994Node: AVR Opcodes248010 19995Node: BFIN-Dependent253256 19996Node: BFIN Syntax253510 19997Node: BFIN Directives259206 19998Node: CR16-Dependent259613 19999Node: CR16 Operand Qualifiers259857 20000Node: CRIS-Dependent261623 20001Node: CRIS-Opts261969 20002Ref: march-option263587 20003Node: CRIS-Expand265404 20004Node: CRIS-Symbols266587 20005Node: CRIS-Syntax267756 20006Node: CRIS-Chars268092 20007Node: CRIS-Pic268643 20008Ref: crispic268839 20009Node: CRIS-Regs272379 20010Node: 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Criteria616094 20265Node: Bug Reporting616861 20266Node: Acknowledgements623510 20267Ref: Acknowledgements-Footnote-1628408 20268Node: GNU Free Documentation License628434 20269Node: AS Index648164 20270 20271End Tag Table 20272