1 /* tc-sh.c -- Assemble code for the Renesas / SuperH SH 2 Copyright 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002, 3 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 4 Free Software Foundation, Inc. 5 6 This file is part of GAS, the GNU Assembler. 7 8 GAS is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 GAS is distributed in the hope that it will be useful, 14 but WITHOUT ANY WARRANTY; without even the implied warranty of 15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 GNU General Public License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with GAS; see the file COPYING. If not, write to 20 the Free Software Foundation, 51 Franklin Street - Fifth Floor, 21 Boston, MA 02110-1301, USA. */ 22 23 /* Written By Steve Chamberlain <sac@cygnus.com> */ 24 25 #include "as.h" 26 #include "subsegs.h" 27 #define DEFINE_TABLE 28 #include "opcodes/sh-opc.h" 29 #include "safe-ctype.h" 30 #include "struc-symbol.h" 31 32 #ifdef OBJ_ELF 33 #include "elf/sh.h" 34 #endif 35 36 #include "dwarf2dbg.h" 37 #include "dw2gencfi.h" 38 39 typedef struct 40 { 41 sh_arg_type type; 42 int reg; 43 expressionS immediate; 44 } 45 sh_operand_info; 46 47 const char comment_chars[] = "!"; 48 const char line_separator_chars[] = ";"; 49 const char line_comment_chars[] = "!#"; 50 51 static void s_uses (int); 52 static void s_uacons (int); 53 54 #ifdef OBJ_ELF 55 static void sh_elf_cons (int); 56 57 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */ 58 #endif 59 60 static void 61 big (int ignore ATTRIBUTE_UNUSED) 62 { 63 if (! target_big_endian) 64 as_bad (_("directive .big encountered when option -big required")); 65 66 /* Stop further messages. */ 67 target_big_endian = 1; 68 } 69 70 static void 71 little (int ignore ATTRIBUTE_UNUSED) 72 { 73 if (target_big_endian) 74 as_bad (_("directive .little encountered when option -little required")); 75 76 /* Stop further messages. */ 77 target_big_endian = 0; 78 } 79 80 /* This table describes all the machine specific pseudo-ops the assembler 81 has to support. The fields are: 82 pseudo-op name without dot 83 function to call to execute this pseudo-op 84 Integer arg to pass to the function. */ 85 86 const pseudo_typeS md_pseudo_table[] = 87 { 88 #ifdef OBJ_ELF 89 {"long", sh_elf_cons, 4}, 90 {"int", sh_elf_cons, 4}, 91 {"word", sh_elf_cons, 2}, 92 {"short", sh_elf_cons, 2}, 93 #else 94 {"int", cons, 4}, 95 {"word", cons, 2}, 96 #endif /* OBJ_ELF */ 97 {"big", big, 0}, 98 {"form", listing_psize, 0}, 99 {"little", little, 0}, 100 {"heading", listing_title, 0}, 101 {"import", s_ignore, 0}, 102 {"page", listing_eject, 0}, 103 {"program", s_ignore, 0}, 104 {"uses", s_uses, 0}, 105 {"uaword", s_uacons, 2}, 106 {"ualong", s_uacons, 4}, 107 {"uaquad", s_uacons, 8}, 108 {"2byte", s_uacons, 2}, 109 {"4byte", s_uacons, 4}, 110 {"8byte", s_uacons, 8}, 111 #ifdef HAVE_SH64 112 {"mode", s_sh64_mode, 0 }, 113 114 /* Have the old name too. */ 115 {"isa", s_sh64_mode, 0 }, 116 117 /* Assert that the right ABI is used. */ 118 {"abi", s_sh64_abi, 0 }, 119 120 { "vtable_inherit", sh64_vtable_inherit, 0 }, 121 { "vtable_entry", sh64_vtable_entry, 0 }, 122 #endif /* HAVE_SH64 */ 123 {0, 0, 0} 124 }; 125 126 int sh_relax; /* set if -relax seen */ 127 128 /* Whether -small was seen. */ 129 130 int sh_small; 131 132 /* Flag to generate relocations against symbol values for local symbols. */ 133 134 static int dont_adjust_reloc_32; 135 136 /* Flag to indicate that '$' is allowed as a register prefix. */ 137 138 static int allow_dollar_register_prefix; 139 140 /* Preset architecture set, if given; zero otherwise. */ 141 142 static unsigned int preset_target_arch; 143 144 /* The bit mask of architectures that could 145 accommodate the insns seen so far. */ 146 static unsigned int valid_arch; 147 148 #ifdef OBJ_ELF 149 /* Whether --fdpic was given. */ 150 static int sh_fdpic; 151 #endif 152 153 const char EXP_CHARS[] = "eE"; 154 155 /* Chars that mean this number is a floating point constant. */ 156 /* As in 0f12.456 */ 157 /* or 0d1.2345e12 */ 158 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 159 160 #define C(a,b) ENCODE_RELAX(a,b) 161 162 #define ENCODE_RELAX(what,length) (((what) << 4) + (length)) 163 #define GET_WHAT(x) ((x>>4)) 164 165 /* These are the three types of relaxable instruction. */ 166 /* These are the types of relaxable instructions; except for END which is 167 a marker. */ 168 #define COND_JUMP 1 169 #define COND_JUMP_DELAY 2 170 #define UNCOND_JUMP 3 171 172 #ifdef HAVE_SH64 173 174 /* A 16-bit (times four) pc-relative operand, at most expanded to 32 bits. */ 175 #define SH64PCREL16_32 4 176 /* A 16-bit (times four) pc-relative operand, at most expanded to 64 bits. */ 177 #define SH64PCREL16_64 5 178 179 /* Variants of the above for adjusting the insn to PTA or PTB according to 180 the label. */ 181 #define SH64PCREL16PT_32 6 182 #define SH64PCREL16PT_64 7 183 184 /* A MOVI expansion, expanding to at most 32 or 64 bits. */ 185 #define MOVI_IMM_32 8 186 #define MOVI_IMM_32_PCREL 9 187 #define MOVI_IMM_64 10 188 #define MOVI_IMM_64_PCREL 11 189 #define END 12 190 191 #else /* HAVE_SH64 */ 192 193 #define END 4 194 195 #endif /* HAVE_SH64 */ 196 197 #define UNDEF_DISP 0 198 #define COND8 1 199 #define COND12 2 200 #define COND32 3 201 #define UNDEF_WORD_DISP 4 202 203 #define UNCOND12 1 204 #define UNCOND32 2 205 206 #ifdef HAVE_SH64 207 #define UNDEF_SH64PCREL 0 208 #define SH64PCREL16 1 209 #define SH64PCREL32 2 210 #define SH64PCREL48 3 211 #define SH64PCREL64 4 212 #define SH64PCRELPLT 5 213 214 #define UNDEF_MOVI 0 215 #define MOVI_16 1 216 #define MOVI_32 2 217 #define MOVI_48 3 218 #define MOVI_64 4 219 #define MOVI_PLT 5 220 #define MOVI_GOTOFF 6 221 #define MOVI_GOTPC 7 222 #endif /* HAVE_SH64 */ 223 224 /* Branch displacements are from the address of the branch plus 225 four, thus all minimum and maximum values have 4 added to them. */ 226 #define COND8_F 258 227 #define COND8_M -252 228 #define COND8_LENGTH 2 229 230 /* There is one extra instruction before the branch, so we must add 231 two more bytes to account for it. */ 232 #define COND12_F 4100 233 #define COND12_M -4090 234 #define COND12_LENGTH 6 235 236 #define COND12_DELAY_LENGTH 4 237 238 /* ??? The minimum and maximum values are wrong, but this does not matter 239 since this relocation type is not supported yet. */ 240 #define COND32_F (1<<30) 241 #define COND32_M -(1<<30) 242 #define COND32_LENGTH 14 243 244 #define UNCOND12_F 4098 245 #define UNCOND12_M -4092 246 #define UNCOND12_LENGTH 2 247 248 /* ??? The minimum and maximum values are wrong, but this does not matter 249 since this relocation type is not supported yet. */ 250 #define UNCOND32_F (1<<30) 251 #define UNCOND32_M -(1<<30) 252 #define UNCOND32_LENGTH 14 253 254 #ifdef HAVE_SH64 255 /* The trivial expansion of a SH64PCREL16 relaxation is just a "PT label, 256 TRd" as is the current insn, so no extra length. Note that the "reach" 257 is calculated from the address *after* that insn, but the offset in the 258 insn is calculated from the beginning of the insn. We also need to 259 take into account the implicit 1 coded as the "A" in PTA when counting 260 forward. If PTB reaches an odd address, we trap that as an error 261 elsewhere, so we don't have to have different relaxation entries. We 262 don't add a one to the negative range, since PTB would then have the 263 farthest backward-reaching value skipped, not generated at relaxation. */ 264 #define SH64PCREL16_F (32767 * 4 - 4 + 1) 265 #define SH64PCREL16_M (-32768 * 4 - 4) 266 #define SH64PCREL16_LENGTH 0 267 268 /* The next step is to change that PT insn into 269 MOVI ((label - datalabel Ln) >> 16) & 65535, R25 270 SHORI (label - datalabel Ln) & 65535, R25 271 Ln: 272 PTREL R25,TRd 273 which means two extra insns, 8 extra bytes. This is the limit for the 274 32-bit ABI. 275 276 The expressions look a bit bad since we have to adjust this to avoid overflow on a 277 32-bit host. */ 278 #define SH64PCREL32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 279 #define SH64PCREL32_LENGTH (2 * 4) 280 281 /* Similarly, we just change the MOVI and add a SHORI for the 48-bit 282 expansion. */ 283 #if BFD_HOST_64BIT_LONG 284 /* The "reach" type is long, so we can only do this for a 64-bit-long 285 host. */ 286 #define SH64PCREL32_M (((long) -1 << 30) * 2 - 4) 287 #define SH64PCREL48_F ((((long) 1 << 47) - 1) - 4) 288 #define SH64PCREL48_M (((long) -1 << 47) - 4) 289 #define SH64PCREL48_LENGTH (3 * 4) 290 #else 291 /* If the host does not have 64-bit longs, just make this state identical 292 in reach to the 32-bit state. Note that we have a slightly incorrect 293 reach, but the correct one above will overflow a 32-bit number. */ 294 #define SH64PCREL32_M (((long) -1 << 30) * 2) 295 #define SH64PCREL48_F SH64PCREL32_F 296 #define SH64PCREL48_M SH64PCREL32_M 297 #define SH64PCREL48_LENGTH (3 * 4) 298 #endif /* BFD_HOST_64BIT_LONG */ 299 300 /* And similarly for the 64-bit expansion; a MOVI + SHORI + SHORI + SHORI 301 + PTREL sequence. */ 302 #define SH64PCREL64_LENGTH (4 * 4) 303 304 /* For MOVI, we make the MOVI + SHORI... expansion you can see in the 305 SH64PCREL expansions. The PCREL one is similar, but the other has no 306 pc-relative reach; it must be fully expanded in 307 shmedia_md_estimate_size_before_relax. */ 308 #define MOVI_16_LENGTH 0 309 #define MOVI_16_F (32767 - 4) 310 #define MOVI_16_M (-32768 - 4) 311 #define MOVI_32_LENGTH 4 312 #define MOVI_32_F ((((long) 1 << 30) - 1) * 2 + 1 - 4) 313 #define MOVI_48_LENGTH 8 314 315 #if BFD_HOST_64BIT_LONG 316 /* The "reach" type is long, so we can only do this for a 64-bit-long 317 host. */ 318 #define MOVI_32_M (((long) -1 << 30) * 2 - 4) 319 #define MOVI_48_F ((((long) 1 << 47) - 1) - 4) 320 #define MOVI_48_M (((long) -1 << 47) - 4) 321 #else 322 /* If the host does not have 64-bit longs, just make this state identical 323 in reach to the 32-bit state. Note that we have a slightly incorrect 324 reach, but the correct one above will overflow a 32-bit number. */ 325 #define MOVI_32_M (((long) -1 << 30) * 2) 326 #define MOVI_48_F MOVI_32_F 327 #define MOVI_48_M MOVI_32_M 328 #endif /* BFD_HOST_64BIT_LONG */ 329 330 #define MOVI_64_LENGTH 12 331 #endif /* HAVE_SH64 */ 332 333 #define EMPTY { 0, 0, 0, 0 } 334 335 const relax_typeS md_relax_table[C (END, 0)] = { 336 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 337 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 338 339 EMPTY, 340 /* C (COND_JUMP, COND8) */ 341 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP, COND12) }, 342 /* C (COND_JUMP, COND12) */ 343 { COND12_F, COND12_M, COND12_LENGTH, C (COND_JUMP, COND32), }, 344 /* C (COND_JUMP, COND32) */ 345 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 346 /* C (COND_JUMP, UNDEF_WORD_DISP) */ 347 { 0, 0, COND32_LENGTH, 0, }, 348 EMPTY, EMPTY, EMPTY, 349 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 350 351 EMPTY, 352 /* C (COND_JUMP_DELAY, COND8) */ 353 { COND8_F, COND8_M, COND8_LENGTH, C (COND_JUMP_DELAY, COND12) }, 354 /* C (COND_JUMP_DELAY, COND12) */ 355 { COND12_F, COND12_M, COND12_DELAY_LENGTH, C (COND_JUMP_DELAY, COND32), }, 356 /* C (COND_JUMP_DELAY, COND32) */ 357 { COND32_F, COND32_M, COND32_LENGTH, 0, }, 358 /* C (COND_JUMP_DELAY, UNDEF_WORD_DISP) */ 359 { 0, 0, COND32_LENGTH, 0, }, 360 EMPTY, EMPTY, EMPTY, 361 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 362 363 EMPTY, 364 /* C (UNCOND_JUMP, UNCOND12) */ 365 { UNCOND12_F, UNCOND12_M, UNCOND12_LENGTH, C (UNCOND_JUMP, UNCOND32), }, 366 /* C (UNCOND_JUMP, UNCOND32) */ 367 { UNCOND32_F, UNCOND32_M, UNCOND32_LENGTH, 0, }, 368 EMPTY, 369 /* C (UNCOND_JUMP, UNDEF_WORD_DISP) */ 370 { 0, 0, UNCOND32_LENGTH, 0, }, 371 EMPTY, EMPTY, EMPTY, 372 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 373 374 #ifdef HAVE_SH64 375 /* C (SH64PCREL16_32, SH64PCREL16) */ 376 EMPTY, 377 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_32, SH64PCREL32) }, 378 /* C (SH64PCREL16_32, SH64PCREL32) */ 379 { 0, 0, SH64PCREL32_LENGTH, 0 }, 380 EMPTY, EMPTY, 381 /* C (SH64PCREL16_32, SH64PCRELPLT) */ 382 { 0, 0, SH64PCREL32_LENGTH, 0 }, 383 EMPTY, EMPTY, 384 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 385 386 /* C (SH64PCREL16_64, SH64PCREL16) */ 387 EMPTY, 388 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16_64, SH64PCREL32) }, 389 /* C (SH64PCREL16_64, SH64PCREL32) */ 390 { SH64PCREL32_F, SH64PCREL32_M, SH64PCREL32_LENGTH, C (SH64PCREL16_64, SH64PCREL48) }, 391 /* C (SH64PCREL16_64, SH64PCREL48) */ 392 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16_64, SH64PCREL64) }, 393 /* C (SH64PCREL16_64, SH64PCREL64) */ 394 { 0, 0, SH64PCREL64_LENGTH, 0 }, 395 /* C (SH64PCREL16_64, SH64PCRELPLT) */ 396 { 0, 0, SH64PCREL64_LENGTH, 0 }, 397 EMPTY, EMPTY, 398 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 399 400 /* C (SH64PCREL16PT_32, SH64PCREL16) */ 401 EMPTY, 402 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_32, SH64PCREL32) }, 403 /* C (SH64PCREL16PT_32, SH64PCREL32) */ 404 { 0, 0, SH64PCREL32_LENGTH, 0 }, 405 EMPTY, EMPTY, 406 /* C (SH64PCREL16PT_32, SH64PCRELPLT) */ 407 { 0, 0, SH64PCREL32_LENGTH, 0 }, 408 EMPTY, EMPTY, 409 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 410 411 /* C (SH64PCREL16PT_64, SH64PCREL16) */ 412 EMPTY, 413 { SH64PCREL16_F, SH64PCREL16_M, SH64PCREL16_LENGTH, C (SH64PCREL16PT_64, SH64PCREL32) }, 414 /* C (SH64PCREL16PT_64, SH64PCREL32) */ 415 { SH64PCREL32_F, 416 SH64PCREL32_M, 417 SH64PCREL32_LENGTH, 418 C (SH64PCREL16PT_64, SH64PCREL48) }, 419 /* C (SH64PCREL16PT_64, SH64PCREL48) */ 420 { SH64PCREL48_F, SH64PCREL48_M, SH64PCREL48_LENGTH, C (SH64PCREL16PT_64, SH64PCREL64) }, 421 /* C (SH64PCREL16PT_64, SH64PCREL64) */ 422 { 0, 0, SH64PCREL64_LENGTH, 0 }, 423 /* C (SH64PCREL16PT_64, SH64PCRELPLT) */ 424 { 0, 0, SH64PCREL64_LENGTH, 0}, 425 EMPTY, EMPTY, 426 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 427 428 /* C (MOVI_IMM_32, UNDEF_MOVI) */ 429 { 0, 0, MOVI_32_LENGTH, 0 }, 430 /* C (MOVI_IMM_32, MOVI_16) */ 431 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32, MOVI_32) }, 432 /* C (MOVI_IMM_32, MOVI_32) */ 433 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, 0 }, 434 EMPTY, EMPTY, EMPTY, 435 /* C (MOVI_IMM_32, MOVI_GOTOFF) */ 436 { 0, 0, MOVI_32_LENGTH, 0 }, 437 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 438 439 /* C (MOVI_IMM_32_PCREL, MOVI_16) */ 440 EMPTY, 441 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_32_PCREL, MOVI_32) }, 442 /* C (MOVI_IMM_32_PCREL, MOVI_32) */ 443 { 0, 0, MOVI_32_LENGTH, 0 }, 444 EMPTY, EMPTY, 445 /* C (MOVI_IMM_32_PCREL, MOVI_PLT) */ 446 { 0, 0, MOVI_32_LENGTH, 0 }, 447 EMPTY, 448 /* C (MOVI_IMM_32_PCREL, MOVI_GOTPC) */ 449 { 0, 0, MOVI_32_LENGTH, 0 }, 450 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 451 452 /* C (MOVI_IMM_64, UNDEF_MOVI) */ 453 { 0, 0, MOVI_64_LENGTH, 0 }, 454 /* C (MOVI_IMM_64, MOVI_16) */ 455 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64, MOVI_32) }, 456 /* C (MOVI_IMM_64, MOVI_32) */ 457 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64, MOVI_48) }, 458 /* C (MOVI_IMM_64, MOVI_48) */ 459 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64, MOVI_64) }, 460 /* C (MOVI_IMM_64, MOVI_64) */ 461 { 0, 0, MOVI_64_LENGTH, 0 }, 462 EMPTY, 463 /* C (MOVI_IMM_64, MOVI_GOTOFF) */ 464 { 0, 0, MOVI_64_LENGTH, 0 }, 465 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 466 467 /* C (MOVI_IMM_64_PCREL, MOVI_16) */ 468 EMPTY, 469 { MOVI_16_F, MOVI_16_M, MOVI_16_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_32) }, 470 /* C (MOVI_IMM_64_PCREL, MOVI_32) */ 471 { MOVI_32_F, MOVI_32_M, MOVI_32_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_48) }, 472 /* C (MOVI_IMM_64_PCREL, MOVI_48) */ 473 { MOVI_48_F, MOVI_48_M, MOVI_48_LENGTH, C (MOVI_IMM_64_PCREL, MOVI_64) }, 474 /* C (MOVI_IMM_64_PCREL, MOVI_64) */ 475 { 0, 0, MOVI_64_LENGTH, 0 }, 476 /* C (MOVI_IMM_64_PCREL, MOVI_PLT) */ 477 { 0, 0, MOVI_64_LENGTH, 0 }, 478 EMPTY, 479 /* C (MOVI_IMM_64_PCREL, MOVI_GOTPC) */ 480 { 0, 0, MOVI_64_LENGTH, 0 }, 481 EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, EMPTY, 482 483 #endif /* HAVE_SH64 */ 484 485 }; 486 487 #undef EMPTY 488 489 static struct hash_control *opcode_hash_control; /* Opcode mnemonics */ 490 491 492 #ifdef OBJ_ELF 493 /* Determinet whether the symbol needs any kind of PIC relocation. */ 494 495 inline static int 496 sh_PIC_related_p (symbolS *sym) 497 { 498 expressionS *exp; 499 500 if (! sym) 501 return 0; 502 503 if (sym == GOT_symbol) 504 return 1; 505 506 #ifdef HAVE_SH64 507 if (sh_PIC_related_p (*symbol_get_tc (sym))) 508 return 1; 509 #endif 510 511 exp = symbol_get_value_expression (sym); 512 513 return (exp->X_op == O_PIC_reloc 514 || sh_PIC_related_p (exp->X_add_symbol) 515 || sh_PIC_related_p (exp->X_op_symbol)); 516 } 517 518 /* Determine the relocation type to be used to represent the 519 expression, that may be rearranged. */ 520 521 static int 522 sh_check_fixup (expressionS *main_exp, bfd_reloc_code_real_type *r_type_p) 523 { 524 expressionS *exp = main_exp; 525 526 /* This is here for backward-compatibility only. GCC used to generated: 527 528 f@PLT + . - (.LPCS# + 2) 529 530 but we'd rather be able to handle this as a PIC-related reference 531 plus/minus a symbol. However, gas' parser gives us: 532 533 O_subtract (O_add (f@PLT, .), .LPCS#+2) 534 535 so we attempt to transform this into: 536 537 O_subtract (f@PLT, O_subtract (.LPCS#+2, .)) 538 539 which we can handle simply below. */ 540 if (exp->X_op == O_subtract) 541 { 542 if (sh_PIC_related_p (exp->X_op_symbol)) 543 return 1; 544 545 exp = symbol_get_value_expression (exp->X_add_symbol); 546 547 if (exp && sh_PIC_related_p (exp->X_op_symbol)) 548 return 1; 549 550 if (exp && exp->X_op == O_add 551 && sh_PIC_related_p (exp->X_add_symbol)) 552 { 553 symbolS *sym = exp->X_add_symbol; 554 555 exp->X_op = O_subtract; 556 exp->X_add_symbol = main_exp->X_op_symbol; 557 558 main_exp->X_op_symbol = main_exp->X_add_symbol; 559 main_exp->X_add_symbol = sym; 560 561 main_exp->X_add_number += exp->X_add_number; 562 exp->X_add_number = 0; 563 } 564 565 exp = main_exp; 566 } 567 else if (exp->X_op == O_add && sh_PIC_related_p (exp->X_op_symbol)) 568 return 1; 569 570 if (exp->X_op == O_symbol || exp->X_op == O_add || exp->X_op == O_subtract) 571 { 572 #ifdef HAVE_SH64 573 if (exp->X_add_symbol 574 && (exp->X_add_symbol == GOT_symbol 575 || (GOT_symbol 576 && *symbol_get_tc (exp->X_add_symbol) == GOT_symbol))) 577 { 578 switch (*r_type_p) 579 { 580 case BFD_RELOC_SH_IMM_LOW16: 581 *r_type_p = BFD_RELOC_SH_GOTPC_LOW16; 582 break; 583 584 case BFD_RELOC_SH_IMM_MEDLOW16: 585 *r_type_p = BFD_RELOC_SH_GOTPC_MEDLOW16; 586 break; 587 588 case BFD_RELOC_SH_IMM_MEDHI16: 589 *r_type_p = BFD_RELOC_SH_GOTPC_MEDHI16; 590 break; 591 592 case BFD_RELOC_SH_IMM_HI16: 593 *r_type_p = BFD_RELOC_SH_GOTPC_HI16; 594 break; 595 596 case BFD_RELOC_NONE: 597 case BFD_RELOC_UNUSED: 598 *r_type_p = BFD_RELOC_SH_GOTPC; 599 break; 600 601 default: 602 abort (); 603 } 604 return 0; 605 } 606 #else 607 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol) 608 { 609 *r_type_p = BFD_RELOC_SH_GOTPC; 610 return 0; 611 } 612 #endif 613 exp = symbol_get_value_expression (exp->X_add_symbol); 614 if (! exp) 615 return 0; 616 } 617 618 if (exp->X_op == O_PIC_reloc) 619 { 620 switch (*r_type_p) 621 { 622 case BFD_RELOC_NONE: 623 case BFD_RELOC_UNUSED: 624 *r_type_p = exp->X_md; 625 break; 626 627 case BFD_RELOC_SH_DISP20: 628 switch (exp->X_md) 629 { 630 case BFD_RELOC_32_GOT_PCREL: 631 *r_type_p = BFD_RELOC_SH_GOT20; 632 break; 633 634 case BFD_RELOC_32_GOTOFF: 635 *r_type_p = BFD_RELOC_SH_GOTOFF20; 636 break; 637 638 case BFD_RELOC_SH_GOTFUNCDESC: 639 *r_type_p = BFD_RELOC_SH_GOTFUNCDESC20; 640 break; 641 642 case BFD_RELOC_SH_GOTOFFFUNCDESC: 643 *r_type_p = BFD_RELOC_SH_GOTOFFFUNCDESC20; 644 break; 645 646 default: 647 abort (); 648 } 649 break; 650 651 #ifdef HAVE_SH64 652 case BFD_RELOC_SH_IMM_LOW16: 653 switch (exp->X_md) 654 { 655 case BFD_RELOC_32_GOTOFF: 656 *r_type_p = BFD_RELOC_SH_GOTOFF_LOW16; 657 break; 658 659 case BFD_RELOC_SH_GOTPLT32: 660 *r_type_p = BFD_RELOC_SH_GOTPLT_LOW16; 661 break; 662 663 case BFD_RELOC_32_GOT_PCREL: 664 *r_type_p = BFD_RELOC_SH_GOT_LOW16; 665 break; 666 667 case BFD_RELOC_32_PLT_PCREL: 668 *r_type_p = BFD_RELOC_SH_PLT_LOW16; 669 break; 670 671 default: 672 abort (); 673 } 674 break; 675 676 case BFD_RELOC_SH_IMM_MEDLOW16: 677 switch (exp->X_md) 678 { 679 case BFD_RELOC_32_GOTOFF: 680 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDLOW16; 681 break; 682 683 case BFD_RELOC_SH_GOTPLT32: 684 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDLOW16; 685 break; 686 687 case BFD_RELOC_32_GOT_PCREL: 688 *r_type_p = BFD_RELOC_SH_GOT_MEDLOW16; 689 break; 690 691 case BFD_RELOC_32_PLT_PCREL: 692 *r_type_p = BFD_RELOC_SH_PLT_MEDLOW16; 693 break; 694 695 default: 696 abort (); 697 } 698 break; 699 700 case BFD_RELOC_SH_IMM_MEDHI16: 701 switch (exp->X_md) 702 { 703 case BFD_RELOC_32_GOTOFF: 704 *r_type_p = BFD_RELOC_SH_GOTOFF_MEDHI16; 705 break; 706 707 case BFD_RELOC_SH_GOTPLT32: 708 *r_type_p = BFD_RELOC_SH_GOTPLT_MEDHI16; 709 break; 710 711 case BFD_RELOC_32_GOT_PCREL: 712 *r_type_p = BFD_RELOC_SH_GOT_MEDHI16; 713 break; 714 715 case BFD_RELOC_32_PLT_PCREL: 716 *r_type_p = BFD_RELOC_SH_PLT_MEDHI16; 717 break; 718 719 default: 720 abort (); 721 } 722 break; 723 724 case BFD_RELOC_SH_IMM_HI16: 725 switch (exp->X_md) 726 { 727 case BFD_RELOC_32_GOTOFF: 728 *r_type_p = BFD_RELOC_SH_GOTOFF_HI16; 729 break; 730 731 case BFD_RELOC_SH_GOTPLT32: 732 *r_type_p = BFD_RELOC_SH_GOTPLT_HI16; 733 break; 734 735 case BFD_RELOC_32_GOT_PCREL: 736 *r_type_p = BFD_RELOC_SH_GOT_HI16; 737 break; 738 739 case BFD_RELOC_32_PLT_PCREL: 740 *r_type_p = BFD_RELOC_SH_PLT_HI16; 741 break; 742 743 default: 744 abort (); 745 } 746 break; 747 #endif 748 749 default: 750 abort (); 751 } 752 if (exp == main_exp) 753 exp->X_op = O_symbol; 754 else 755 { 756 main_exp->X_add_symbol = exp->X_add_symbol; 757 main_exp->X_add_number += exp->X_add_number; 758 } 759 } 760 else 761 return (sh_PIC_related_p (exp->X_add_symbol) 762 || sh_PIC_related_p (exp->X_op_symbol)); 763 764 return 0; 765 } 766 767 /* Add expression EXP of SIZE bytes to offset OFF of fragment FRAG. */ 768 769 void 770 sh_cons_fix_new (fragS *frag, int off, int size, expressionS *exp) 771 { 772 bfd_reloc_code_real_type r_type = BFD_RELOC_UNUSED; 773 774 if (sh_check_fixup (exp, &r_type)) 775 as_bad (_("Invalid PIC expression.")); 776 777 if (r_type == BFD_RELOC_UNUSED) 778 switch (size) 779 { 780 case 1: 781 r_type = BFD_RELOC_8; 782 break; 783 784 case 2: 785 r_type = BFD_RELOC_16; 786 break; 787 788 case 4: 789 r_type = BFD_RELOC_32; 790 break; 791 792 #ifdef HAVE_SH64 793 case 8: 794 r_type = BFD_RELOC_64; 795 break; 796 #endif 797 798 default: 799 goto error; 800 } 801 else if (size != 4) 802 { 803 error: 804 as_bad (_("unsupported BFD relocation size %u"), size); 805 r_type = BFD_RELOC_UNUSED; 806 } 807 808 fix_new_exp (frag, off, size, exp, 0, r_type); 809 } 810 811 /* The regular cons() function, that reads constants, doesn't support 812 suffixes such as @GOT, @GOTOFF and @PLT, that generate 813 machine-specific relocation types. So we must define it here. */ 814 /* Clobbers input_line_pointer, checks end-of-line. */ 815 /* NBYTES 1=.byte, 2=.word, 4=.long */ 816 static void 817 sh_elf_cons (register int nbytes) 818 { 819 expressionS exp; 820 821 #ifdef HAVE_SH64 822 823 /* Update existing range to include a previous insn, if there was one. */ 824 sh64_update_contents_mark (TRUE); 825 826 /* We need to make sure the contents type is set to data. */ 827 sh64_flag_output (); 828 829 #endif /* HAVE_SH64 */ 830 831 if (is_it_end_of_statement ()) 832 { 833 demand_empty_rest_of_line (); 834 return; 835 } 836 837 #ifdef md_cons_align 838 md_cons_align (nbytes); 839 #endif 840 841 do 842 { 843 expression (&exp); 844 emit_expr (&exp, (unsigned int) nbytes); 845 } 846 while (*input_line_pointer++ == ','); 847 848 input_line_pointer--; /* Put terminator back into stream. */ 849 if (*input_line_pointer == '#' || *input_line_pointer == '!') 850 { 851 while (! is_end_of_line[(unsigned char) *input_line_pointer++]); 852 } 853 else 854 demand_empty_rest_of_line (); 855 } 856 857 /* The regular frag_offset_fixed_p doesn't work for rs_align_test 858 frags. */ 859 860 static bfd_boolean 861 align_test_frag_offset_fixed_p (const fragS *frag1, const fragS *frag2, 862 bfd_vma *offset) 863 { 864 const fragS *frag; 865 bfd_vma off; 866 867 /* Start with offset initialised to difference between the two frags. 868 Prior to assigning frag addresses this will be zero. */ 869 off = frag1->fr_address - frag2->fr_address; 870 if (frag1 == frag2) 871 { 872 *offset = off; 873 return TRUE; 874 } 875 876 /* Maybe frag2 is after frag1. */ 877 frag = frag1; 878 while (frag->fr_type == rs_fill 879 || frag->fr_type == rs_align_test) 880 { 881 if (frag->fr_type == rs_fill) 882 off += frag->fr_fix + frag->fr_offset * frag->fr_var; 883 else 884 off += frag->fr_fix; 885 frag = frag->fr_next; 886 if (frag == NULL) 887 break; 888 if (frag == frag2) 889 { 890 *offset = off; 891 return TRUE; 892 } 893 } 894 895 /* Maybe frag1 is after frag2. */ 896 off = frag1->fr_address - frag2->fr_address; 897 frag = frag2; 898 while (frag->fr_type == rs_fill 899 || frag->fr_type == rs_align_test) 900 { 901 if (frag->fr_type == rs_fill) 902 off -= frag->fr_fix + frag->fr_offset * frag->fr_var; 903 else 904 off -= frag->fr_fix; 905 frag = frag->fr_next; 906 if (frag == NULL) 907 break; 908 if (frag == frag1) 909 { 910 *offset = off; 911 return TRUE; 912 } 913 } 914 915 return FALSE; 916 } 917 918 /* Optimize a difference of symbols which have rs_align_test frag if 919 possible. */ 920 921 int 922 sh_optimize_expr (expressionS *l, operatorT op, expressionS *r) 923 { 924 bfd_vma frag_off; 925 926 if (op == O_subtract 927 && l->X_op == O_symbol 928 && r->X_op == O_symbol 929 && S_GET_SEGMENT (l->X_add_symbol) == S_GET_SEGMENT (r->X_add_symbol) 930 && (SEG_NORMAL (S_GET_SEGMENT (l->X_add_symbol)) 931 || r->X_add_symbol == l->X_add_symbol) 932 && align_test_frag_offset_fixed_p (symbol_get_frag (l->X_add_symbol), 933 symbol_get_frag (r->X_add_symbol), 934 &frag_off)) 935 { 936 l->X_add_number -= r->X_add_number; 937 l->X_add_number -= frag_off / OCTETS_PER_BYTE; 938 l->X_add_number += (S_GET_VALUE (l->X_add_symbol) 939 - S_GET_VALUE (r->X_add_symbol)); 940 l->X_op = O_constant; 941 l->X_add_symbol = 0; 942 return 1; 943 } 944 return 0; 945 } 946 #endif /* OBJ_ELF */ 947 948 /* This function is called once, at assembler startup time. This should 949 set up all the tables, etc that the MD part of the assembler needs. */ 950 951 void 952 md_begin (void) 953 { 954 const sh_opcode_info *opcode; 955 char *prev_name = ""; 956 unsigned int target_arch; 957 958 target_arch 959 = preset_target_arch ? preset_target_arch : arch_sh_up & ~arch_sh_has_dsp; 960 valid_arch = target_arch; 961 962 #ifdef HAVE_SH64 963 shmedia_md_begin (); 964 #endif 965 966 opcode_hash_control = hash_new (); 967 968 /* Insert unique names into hash table. */ 969 for (opcode = sh_table; opcode->name; opcode++) 970 { 971 if (strcmp (prev_name, opcode->name) != 0) 972 { 973 if (!SH_MERGE_ARCH_SET_VALID (opcode->arch, target_arch)) 974 continue; 975 prev_name = opcode->name; 976 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 977 } 978 } 979 } 980 981 static int reg_m; 982 static int reg_n; 983 static int reg_x, reg_y; 984 static int reg_efg; 985 static int reg_b; 986 987 #define IDENT_CHAR(c) (ISALNUM (c) || (c) == '_') 988 989 /* Try to parse a reg name. Return the number of chars consumed. */ 990 991 static unsigned int 992 parse_reg_without_prefix (char *src, int *mode, int *reg) 993 { 994 char l0 = TOLOWER (src[0]); 995 char l1 = l0 ? TOLOWER (src[1]) : 0; 996 997 /* We use ! IDENT_CHAR for the next character after the register name, to 998 make sure that we won't accidentally recognize a symbol name such as 999 'sram' or sr_ram as being a reference to the register 'sr'. */ 1000 1001 if (l0 == 'r') 1002 { 1003 if (l1 == '1') 1004 { 1005 if (src[2] >= '0' && src[2] <= '5' 1006 && ! IDENT_CHAR ((unsigned char) src[3])) 1007 { 1008 *mode = A_REG_N; 1009 *reg = 10 + src[2] - '0'; 1010 return 3; 1011 } 1012 } 1013 if (l1 >= '0' && l1 <= '9' 1014 && ! IDENT_CHAR ((unsigned char) src[2])) 1015 { 1016 *mode = A_REG_N; 1017 *reg = (l1 - '0'); 1018 return 2; 1019 } 1020 if (l1 >= '0' && l1 <= '7' && strncasecmp (&src[2], "_bank", 5) == 0 1021 && ! IDENT_CHAR ((unsigned char) src[7])) 1022 { 1023 *mode = A_REG_B; 1024 *reg = (l1 - '0'); 1025 return 7; 1026 } 1027 1028 if (l1 == 'e' && ! IDENT_CHAR ((unsigned char) src[2])) 1029 { 1030 *mode = A_RE; 1031 return 2; 1032 } 1033 if (l1 == 's' && ! IDENT_CHAR ((unsigned char) src[2])) 1034 { 1035 *mode = A_RS; 1036 return 2; 1037 } 1038 } 1039 1040 if (l0 == 'a') 1041 { 1042 if (l1 == '0') 1043 { 1044 if (! IDENT_CHAR ((unsigned char) src[2])) 1045 { 1046 *mode = DSP_REG_N; 1047 *reg = A_A0_NUM; 1048 return 2; 1049 } 1050 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1051 { 1052 *mode = DSP_REG_N; 1053 *reg = A_A0G_NUM; 1054 return 3; 1055 } 1056 } 1057 if (l1 == '1') 1058 { 1059 if (! IDENT_CHAR ((unsigned char) src[2])) 1060 { 1061 *mode = DSP_REG_N; 1062 *reg = A_A1_NUM; 1063 return 2; 1064 } 1065 if (TOLOWER (src[2]) == 'g' && ! IDENT_CHAR ((unsigned char) src[3])) 1066 { 1067 *mode = DSP_REG_N; 1068 *reg = A_A1G_NUM; 1069 return 3; 1070 } 1071 } 1072 1073 if (l1 == 'x' && src[2] >= '0' && src[2] <= '1' 1074 && ! IDENT_CHAR ((unsigned char) src[3])) 1075 { 1076 *mode = A_REG_N; 1077 *reg = 4 + (l1 - '0'); 1078 return 3; 1079 } 1080 if (l1 == 'y' && src[2] >= '0' && src[2] <= '1' 1081 && ! IDENT_CHAR ((unsigned char) src[3])) 1082 { 1083 *mode = A_REG_N; 1084 *reg = 6 + (l1 - '0'); 1085 return 3; 1086 } 1087 if (l1 == 's' && src[2] >= '0' && src[2] <= '3' 1088 && ! IDENT_CHAR ((unsigned char) src[3])) 1089 { 1090 int n = l1 - '0'; 1091 1092 *mode = A_REG_N; 1093 *reg = n | ((~n & 2) << 1); 1094 return 3; 1095 } 1096 } 1097 1098 if (l0 == 'i' && l1 && ! IDENT_CHAR ((unsigned char) src[2])) 1099 { 1100 if (l1 == 's') 1101 { 1102 *mode = A_REG_N; 1103 *reg = 8; 1104 return 2; 1105 } 1106 if (l1 == 'x') 1107 { 1108 *mode = A_REG_N; 1109 *reg = 8; 1110 return 2; 1111 } 1112 if (l1 == 'y') 1113 { 1114 *mode = A_REG_N; 1115 *reg = 9; 1116 return 2; 1117 } 1118 } 1119 1120 if (l0 == 'x' && l1 >= '0' && l1 <= '1' 1121 && ! IDENT_CHAR ((unsigned char) src[2])) 1122 { 1123 *mode = DSP_REG_N; 1124 *reg = A_X0_NUM + l1 - '0'; 1125 return 2; 1126 } 1127 1128 if (l0 == 'y' && l1 >= '0' && l1 <= '1' 1129 && ! IDENT_CHAR ((unsigned char) src[2])) 1130 { 1131 *mode = DSP_REG_N; 1132 *reg = A_Y0_NUM + l1 - '0'; 1133 return 2; 1134 } 1135 1136 if (l0 == 'm' && l1 >= '0' && l1 <= '1' 1137 && ! IDENT_CHAR ((unsigned char) src[2])) 1138 { 1139 *mode = DSP_REG_N; 1140 *reg = l1 == '0' ? A_M0_NUM : A_M1_NUM; 1141 return 2; 1142 } 1143 1144 if (l0 == 's' 1145 && l1 == 's' 1146 && TOLOWER (src[2]) == 'r' && ! IDENT_CHAR ((unsigned char) src[3])) 1147 { 1148 *mode = A_SSR; 1149 return 3; 1150 } 1151 1152 if (l0 == 's' && l1 == 'p' && TOLOWER (src[2]) == 'c' 1153 && ! IDENT_CHAR ((unsigned char) src[3])) 1154 { 1155 *mode = A_SPC; 1156 return 3; 1157 } 1158 1159 if (l0 == 's' && l1 == 'g' && TOLOWER (src[2]) == 'r' 1160 && ! IDENT_CHAR ((unsigned char) src[3])) 1161 { 1162 *mode = A_SGR; 1163 return 3; 1164 } 1165 1166 if (l0 == 'd' && l1 == 's' && TOLOWER (src[2]) == 'r' 1167 && ! IDENT_CHAR ((unsigned char) src[3])) 1168 { 1169 *mode = A_DSR; 1170 return 3; 1171 } 1172 1173 if (l0 == 'd' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1174 && ! IDENT_CHAR ((unsigned char) src[3])) 1175 { 1176 *mode = A_DBR; 1177 return 3; 1178 } 1179 1180 if (l0 == 's' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1181 { 1182 *mode = A_SR; 1183 return 2; 1184 } 1185 1186 if (l0 == 's' && l1 == 'p' && ! IDENT_CHAR ((unsigned char) src[2])) 1187 { 1188 *mode = A_REG_N; 1189 *reg = 15; 1190 return 2; 1191 } 1192 1193 if (l0 == 'p' && l1 == 'r' && ! IDENT_CHAR ((unsigned char) src[2])) 1194 { 1195 *mode = A_PR; 1196 return 2; 1197 } 1198 if (l0 == 'p' && l1 == 'c' && ! IDENT_CHAR ((unsigned char) src[2])) 1199 { 1200 /* Don't use A_DISP_PC here - that would accept stuff like 'mova pc,r0' 1201 and use an uninitialized immediate. */ 1202 *mode = A_PC; 1203 return 2; 1204 } 1205 if (l0 == 'g' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1206 && ! IDENT_CHAR ((unsigned char) src[3])) 1207 { 1208 *mode = A_GBR; 1209 return 3; 1210 } 1211 if (l0 == 'v' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1212 && ! IDENT_CHAR ((unsigned char) src[3])) 1213 { 1214 *mode = A_VBR; 1215 return 3; 1216 } 1217 1218 if (l0 == 't' && l1 == 'b' && TOLOWER (src[2]) == 'r' 1219 && ! IDENT_CHAR ((unsigned char) src[3])) 1220 { 1221 *mode = A_TBR; 1222 return 3; 1223 } 1224 if (l0 == 'm' && l1 == 'a' && TOLOWER (src[2]) == 'c' 1225 && ! IDENT_CHAR ((unsigned char) src[4])) 1226 { 1227 if (TOLOWER (src[3]) == 'l') 1228 { 1229 *mode = A_MACL; 1230 return 4; 1231 } 1232 if (TOLOWER (src[3]) == 'h') 1233 { 1234 *mode = A_MACH; 1235 return 4; 1236 } 1237 } 1238 if (l0 == 'm' && l1 == 'o' && TOLOWER (src[2]) == 'd' 1239 && ! IDENT_CHAR ((unsigned char) src[3])) 1240 { 1241 *mode = A_MOD; 1242 return 3; 1243 } 1244 if (l0 == 'f' && l1 == 'r') 1245 { 1246 if (src[2] == '1') 1247 { 1248 if (src[3] >= '0' && src[3] <= '5' 1249 && ! IDENT_CHAR ((unsigned char) src[4])) 1250 { 1251 *mode = F_REG_N; 1252 *reg = 10 + src[3] - '0'; 1253 return 4; 1254 } 1255 } 1256 if (src[2] >= '0' && src[2] <= '9' 1257 && ! IDENT_CHAR ((unsigned char) src[3])) 1258 { 1259 *mode = F_REG_N; 1260 *reg = (src[2] - '0'); 1261 return 3; 1262 } 1263 } 1264 if (l0 == 'd' && l1 == 'r') 1265 { 1266 if (src[2] == '1') 1267 { 1268 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1269 && ! IDENT_CHAR ((unsigned char) src[4])) 1270 { 1271 *mode = D_REG_N; 1272 *reg = 10 + src[3] - '0'; 1273 return 4; 1274 } 1275 } 1276 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1277 && ! IDENT_CHAR ((unsigned char) src[3])) 1278 { 1279 *mode = D_REG_N; 1280 *reg = (src[2] - '0'); 1281 return 3; 1282 } 1283 } 1284 if (l0 == 'x' && l1 == 'd') 1285 { 1286 if (src[2] == '1') 1287 { 1288 if (src[3] >= '0' && src[3] <= '4' && ! ((src[3] - '0') & 1) 1289 && ! IDENT_CHAR ((unsigned char) src[4])) 1290 { 1291 *mode = X_REG_N; 1292 *reg = 11 + src[3] - '0'; 1293 return 4; 1294 } 1295 } 1296 if (src[2] >= '0' && src[2] <= '8' && ! ((src[2] - '0') & 1) 1297 && ! IDENT_CHAR ((unsigned char) src[3])) 1298 { 1299 *mode = X_REG_N; 1300 *reg = (src[2] - '0') + 1; 1301 return 3; 1302 } 1303 } 1304 if (l0 == 'f' && l1 == 'v') 1305 { 1306 if (src[2] == '1'&& src[3] == '2' && ! IDENT_CHAR ((unsigned char) src[4])) 1307 { 1308 *mode = V_REG_N; 1309 *reg = 12; 1310 return 4; 1311 } 1312 if ((src[2] == '0' || src[2] == '4' || src[2] == '8') 1313 && ! IDENT_CHAR ((unsigned char) src[3])) 1314 { 1315 *mode = V_REG_N; 1316 *reg = (src[2] - '0'); 1317 return 3; 1318 } 1319 } 1320 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 'u' 1321 && TOLOWER (src[3]) == 'l' 1322 && ! IDENT_CHAR ((unsigned char) src[4])) 1323 { 1324 *mode = FPUL_N; 1325 return 4; 1326 } 1327 1328 if (l0 == 'f' && l1 == 'p' && TOLOWER (src[2]) == 's' 1329 && TOLOWER (src[3]) == 'c' 1330 && TOLOWER (src[4]) == 'r' && ! IDENT_CHAR ((unsigned char) src[5])) 1331 { 1332 *mode = FPSCR_N; 1333 return 5; 1334 } 1335 1336 if (l0 == 'x' && l1 == 'm' && TOLOWER (src[2]) == 't' 1337 && TOLOWER (src[3]) == 'r' 1338 && TOLOWER (src[4]) == 'x' && ! IDENT_CHAR ((unsigned char) src[5])) 1339 { 1340 *mode = XMTRX_M4; 1341 return 5; 1342 } 1343 1344 return 0; 1345 } 1346 1347 /* Like parse_reg_without_prefix, but this version supports 1348 $-prefixed register names if enabled by the user. */ 1349 1350 static unsigned int 1351 parse_reg (char *src, int *mode, int *reg) 1352 { 1353 unsigned int prefix; 1354 unsigned int consumed; 1355 1356 if (src[0] == '$') 1357 { 1358 if (allow_dollar_register_prefix) 1359 { 1360 src ++; 1361 prefix = 1; 1362 } 1363 else 1364 return 0; 1365 } 1366 else 1367 prefix = 0; 1368 1369 consumed = parse_reg_without_prefix (src, mode, reg); 1370 1371 if (consumed == 0) 1372 return 0; 1373 1374 return consumed + prefix; 1375 } 1376 1377 static char * 1378 parse_exp (char *s, sh_operand_info *op) 1379 { 1380 char *save; 1381 char *new_pointer; 1382 1383 save = input_line_pointer; 1384 input_line_pointer = s; 1385 expression (&op->immediate); 1386 if (op->immediate.X_op == O_absent) 1387 as_bad (_("missing operand")); 1388 new_pointer = input_line_pointer; 1389 input_line_pointer = save; 1390 return new_pointer; 1391 } 1392 1393 /* The many forms of operand: 1394 1395 Rn Register direct 1396 @Rn Register indirect 1397 @Rn+ Autoincrement 1398 @-Rn Autodecrement 1399 @(disp:4,Rn) 1400 @(disp:8,GBR) 1401 @(disp:8,PC) 1402 1403 @(R0,Rn) 1404 @(R0,GBR) 1405 1406 disp:8 1407 disp:12 1408 #imm8 1409 pr, gbr, vbr, macl, mach 1410 */ 1411 1412 static char * 1413 parse_at (char *src, sh_operand_info *op) 1414 { 1415 int len; 1416 int mode; 1417 src++; 1418 if (src[0] == '@') 1419 { 1420 src = parse_at (src, op); 1421 if (op->type == A_DISP_TBR) 1422 op->type = A_DISP2_TBR; 1423 else 1424 as_bad (_("illegal double indirection")); 1425 } 1426 else if (src[0] == '-') 1427 { 1428 /* Must be predecrement. */ 1429 src++; 1430 1431 len = parse_reg (src, &mode, &(op->reg)); 1432 if (mode != A_REG_N) 1433 as_bad (_("illegal register after @-")); 1434 1435 op->type = A_DEC_N; 1436 src += len; 1437 } 1438 else if (src[0] == '(') 1439 { 1440 /* Could be @(disp, rn), @(disp, gbr), @(disp, pc), @(r0, gbr) or 1441 @(r0, rn). */ 1442 src++; 1443 len = parse_reg (src, &mode, &(op->reg)); 1444 if (len && mode == A_REG_N) 1445 { 1446 src += len; 1447 if (op->reg != 0) 1448 { 1449 as_bad (_("must be @(r0,...)")); 1450 } 1451 if (src[0] == ',') 1452 { 1453 src++; 1454 /* Now can be rn or gbr. */ 1455 len = parse_reg (src, &mode, &(op->reg)); 1456 } 1457 else 1458 { 1459 len = 0; 1460 } 1461 if (len) 1462 { 1463 if (mode == A_GBR) 1464 { 1465 op->type = A_R0_GBR; 1466 } 1467 else if (mode == A_REG_N) 1468 { 1469 op->type = A_IND_R0_REG_N; 1470 } 1471 else 1472 { 1473 as_bad (_("syntax error in @(r0,...)")); 1474 } 1475 } 1476 else 1477 { 1478 as_bad (_("syntax error in @(r0...)")); 1479 } 1480 } 1481 else 1482 { 1483 /* Must be an @(disp,.. thing). */ 1484 src = parse_exp (src, op); 1485 if (src[0] == ',') 1486 src++; 1487 /* Now can be rn, gbr or pc. */ 1488 len = parse_reg (src, &mode, &op->reg); 1489 if (len) 1490 { 1491 if (mode == A_REG_N) 1492 { 1493 op->type = A_DISP_REG_N; 1494 } 1495 else if (mode == A_GBR) 1496 { 1497 op->type = A_DISP_GBR; 1498 } 1499 else if (mode == A_TBR) 1500 { 1501 op->type = A_DISP_TBR; 1502 } 1503 else if (mode == A_PC) 1504 { 1505 /* We want @(expr, pc) to uniformly address . + expr, 1506 no matter if expr is a constant, or a more complex 1507 expression, e.g. sym-. or sym1-sym2. 1508 However, we also used to accept @(sym,pc) 1509 as addressing sym, i.e. meaning the same as plain sym. 1510 Some existing code does use the @(sym,pc) syntax, so 1511 we give it the old semantics for now, but warn about 1512 its use, so that users have some time to fix their code. 1513 1514 Note that due to this backward compatibility hack, 1515 we'll get unexpected results when @(offset, pc) is used, 1516 and offset is a symbol that is set later to an an address 1517 difference, or an external symbol that is set to an 1518 address difference in another source file, so we want to 1519 eventually remove it. */ 1520 if (op->immediate.X_op == O_symbol) 1521 { 1522 op->type = A_DISP_PC; 1523 as_warn (_("Deprecated syntax.")); 1524 } 1525 else 1526 { 1527 op->type = A_DISP_PC_ABS; 1528 /* Such operands don't get corrected for PC==.+4, so 1529 make the correction here. */ 1530 op->immediate.X_add_number -= 4; 1531 } 1532 } 1533 else 1534 { 1535 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1536 } 1537 } 1538 else 1539 { 1540 as_bad (_("syntax error in @(disp,[Rn, gbr, pc])")); 1541 } 1542 } 1543 src += len; 1544 if (src[0] != ')') 1545 as_bad (_("expecting )")); 1546 else 1547 src++; 1548 } 1549 else 1550 { 1551 src += parse_reg (src, &mode, &(op->reg)); 1552 if (mode != A_REG_N) 1553 as_bad (_("illegal register after @")); 1554 1555 if (src[0] == '+') 1556 { 1557 char l0, l1; 1558 1559 src++; 1560 l0 = TOLOWER (src[0]); 1561 l1 = TOLOWER (src[1]); 1562 1563 if ((l0 == 'r' && l1 == '8') 1564 || (l0 == 'i' && (l1 == 'x' || l1 == 's'))) 1565 { 1566 src += 2; 1567 op->type = AX_PMOD_N; 1568 } 1569 else if ( (l0 == 'r' && l1 == '9') 1570 || (l0 == 'i' && l1 == 'y')) 1571 { 1572 src += 2; 1573 op->type = AY_PMOD_N; 1574 } 1575 else 1576 op->type = A_INC_N; 1577 } 1578 else 1579 op->type = A_IND_N; 1580 } 1581 return src; 1582 } 1583 1584 static void 1585 get_operand (char **ptr, sh_operand_info *op) 1586 { 1587 char *src = *ptr; 1588 int mode = -1; 1589 unsigned int len; 1590 1591 if (src[0] == '#') 1592 { 1593 src++; 1594 *ptr = parse_exp (src, op); 1595 op->type = A_IMM; 1596 return; 1597 } 1598 1599 else if (src[0] == '@') 1600 { 1601 *ptr = parse_at (src, op); 1602 return; 1603 } 1604 len = parse_reg (src, &mode, &(op->reg)); 1605 if (len) 1606 { 1607 *ptr = src + len; 1608 op->type = mode; 1609 return; 1610 } 1611 else 1612 { 1613 /* Not a reg, the only thing left is a displacement. */ 1614 *ptr = parse_exp (src, op); 1615 op->type = A_DISP_PC; 1616 return; 1617 } 1618 } 1619 1620 static char * 1621 get_operands (sh_opcode_info *info, char *args, sh_operand_info *operand) 1622 { 1623 char *ptr = args; 1624 if (info->arg[0]) 1625 { 1626 /* The pre-processor will eliminate whitespace in front of '@' 1627 after the first argument; we may be called multiple times 1628 from assemble_ppi, so don't insist on finding whitespace here. */ 1629 if (*ptr == ' ') 1630 ptr++; 1631 1632 get_operand (&ptr, operand + 0); 1633 if (info->arg[1]) 1634 { 1635 if (*ptr == ',') 1636 { 1637 ptr++; 1638 } 1639 get_operand (&ptr, operand + 1); 1640 /* ??? Hack: psha/pshl have a varying operand number depending on 1641 the type of the first operand. We handle this by having the 1642 three-operand version first and reducing the number of operands 1643 parsed to two if we see that the first operand is an immediate. 1644 This works because no insn with three operands has an immediate 1645 as first operand. */ 1646 if (info->arg[2] && operand[0].type != A_IMM) 1647 { 1648 if (*ptr == ',') 1649 { 1650 ptr++; 1651 } 1652 get_operand (&ptr, operand + 2); 1653 } 1654 else 1655 { 1656 operand[2].type = 0; 1657 } 1658 } 1659 else 1660 { 1661 operand[1].type = 0; 1662 operand[2].type = 0; 1663 } 1664 } 1665 else 1666 { 1667 operand[0].type = 0; 1668 operand[1].type = 0; 1669 operand[2].type = 0; 1670 } 1671 return ptr; 1672 } 1673 1674 /* Passed a pointer to a list of opcodes which use different 1675 addressing modes, return the opcode which matches the opcodes 1676 provided. */ 1677 1678 static sh_opcode_info * 1679 get_specific (sh_opcode_info *opcode, sh_operand_info *operands) 1680 { 1681 sh_opcode_info *this_try = opcode; 1682 char *name = opcode->name; 1683 int n = 0; 1684 1685 while (opcode->name) 1686 { 1687 this_try = opcode++; 1688 if ((this_try->name != name) && (strcmp (this_try->name, name) != 0)) 1689 { 1690 /* We've looked so far down the table that we've run out of 1691 opcodes with the same name. */ 1692 return 0; 1693 } 1694 1695 /* Look at both operands needed by the opcodes and provided by 1696 the user - since an arg test will often fail on the same arg 1697 again and again, we'll try and test the last failing arg the 1698 first on each opcode try. */ 1699 for (n = 0; this_try->arg[n]; n++) 1700 { 1701 sh_operand_info *user = operands + n; 1702 sh_arg_type arg = this_try->arg[n]; 1703 1704 switch (arg) 1705 { 1706 case A_DISP_PC: 1707 if (user->type == A_DISP_PC_ABS) 1708 break; 1709 /* Fall through. */ 1710 case A_IMM: 1711 case A_BDISP12: 1712 case A_BDISP8: 1713 case A_DISP_GBR: 1714 case A_DISP2_TBR: 1715 case A_MACH: 1716 case A_PR: 1717 case A_MACL: 1718 if (user->type != arg) 1719 goto fail; 1720 break; 1721 case A_R0: 1722 /* opcode needs r0 */ 1723 if (user->type != A_REG_N || user->reg != 0) 1724 goto fail; 1725 break; 1726 case A_R0_GBR: 1727 if (user->type != A_R0_GBR || user->reg != 0) 1728 goto fail; 1729 break; 1730 case F_FR0: 1731 if (user->type != F_REG_N || user->reg != 0) 1732 goto fail; 1733 break; 1734 1735 case A_REG_N: 1736 case A_INC_N: 1737 case A_DEC_N: 1738 case A_IND_N: 1739 case A_IND_R0_REG_N: 1740 case A_DISP_REG_N: 1741 case F_REG_N: 1742 case D_REG_N: 1743 case X_REG_N: 1744 case V_REG_N: 1745 case FPUL_N: 1746 case FPSCR_N: 1747 case DSP_REG_N: 1748 /* Opcode needs rn */ 1749 if (user->type != arg) 1750 goto fail; 1751 reg_n = user->reg; 1752 break; 1753 case DX_REG_N: 1754 if (user->type != D_REG_N && user->type != X_REG_N) 1755 goto fail; 1756 reg_n = user->reg; 1757 break; 1758 case A_GBR: 1759 case A_TBR: 1760 case A_SR: 1761 case A_VBR: 1762 case A_DSR: 1763 case A_MOD: 1764 case A_RE: 1765 case A_RS: 1766 case A_SSR: 1767 case A_SPC: 1768 case A_SGR: 1769 case A_DBR: 1770 if (user->type != arg) 1771 goto fail; 1772 break; 1773 1774 case A_REG_B: 1775 if (user->type != arg) 1776 goto fail; 1777 reg_b = user->reg; 1778 break; 1779 1780 case A_INC_R15: 1781 if (user->type != A_INC_N) 1782 goto fail; 1783 if (user->reg != 15) 1784 goto fail; 1785 reg_n = user->reg; 1786 break; 1787 1788 case A_DEC_R15: 1789 if (user->type != A_DEC_N) 1790 goto fail; 1791 if (user->reg != 15) 1792 goto fail; 1793 reg_n = user->reg; 1794 break; 1795 1796 case A_REG_M: 1797 case A_INC_M: 1798 case A_DEC_M: 1799 case A_IND_M: 1800 case A_IND_R0_REG_M: 1801 case A_DISP_REG_M: 1802 case DSP_REG_M: 1803 /* Opcode needs rn */ 1804 if (user->type != arg - A_REG_M + A_REG_N) 1805 goto fail; 1806 reg_m = user->reg; 1807 break; 1808 1809 case AS_DEC_N: 1810 if (user->type != A_DEC_N) 1811 goto fail; 1812 if (user->reg < 2 || user->reg > 5) 1813 goto fail; 1814 reg_n = user->reg; 1815 break; 1816 1817 case AS_INC_N: 1818 if (user->type != A_INC_N) 1819 goto fail; 1820 if (user->reg < 2 || user->reg > 5) 1821 goto fail; 1822 reg_n = user->reg; 1823 break; 1824 1825 case AS_IND_N: 1826 if (user->type != A_IND_N) 1827 goto fail; 1828 if (user->reg < 2 || user->reg > 5) 1829 goto fail; 1830 reg_n = user->reg; 1831 break; 1832 1833 case AS_PMOD_N: 1834 if (user->type != AX_PMOD_N) 1835 goto fail; 1836 if (user->reg < 2 || user->reg > 5) 1837 goto fail; 1838 reg_n = user->reg; 1839 break; 1840 1841 case AX_INC_N: 1842 if (user->type != A_INC_N) 1843 goto fail; 1844 if (user->reg < 4 || user->reg > 5) 1845 goto fail; 1846 reg_n = user->reg; 1847 break; 1848 1849 case AX_IND_N: 1850 if (user->type != A_IND_N) 1851 goto fail; 1852 if (user->reg < 4 || user->reg > 5) 1853 goto fail; 1854 reg_n = user->reg; 1855 break; 1856 1857 case AX_PMOD_N: 1858 if (user->type != AX_PMOD_N) 1859 goto fail; 1860 if (user->reg < 4 || user->reg > 5) 1861 goto fail; 1862 reg_n = user->reg; 1863 break; 1864 1865 case AXY_INC_N: 1866 if (user->type != A_INC_N) 1867 goto fail; 1868 if ((user->reg < 4 || user->reg > 5) 1869 && (user->reg < 0 || user->reg > 1)) 1870 goto fail; 1871 reg_n = user->reg; 1872 break; 1873 1874 case AXY_IND_N: 1875 if (user->type != A_IND_N) 1876 goto fail; 1877 if ((user->reg < 4 || user->reg > 5) 1878 && (user->reg < 0 || user->reg > 1)) 1879 goto fail; 1880 reg_n = user->reg; 1881 break; 1882 1883 case AXY_PMOD_N: 1884 if (user->type != AX_PMOD_N) 1885 goto fail; 1886 if ((user->reg < 4 || user->reg > 5) 1887 && (user->reg < 0 || user->reg > 1)) 1888 goto fail; 1889 reg_n = user->reg; 1890 break; 1891 1892 case AY_INC_N: 1893 if (user->type != A_INC_N) 1894 goto fail; 1895 if (user->reg < 6 || user->reg > 7) 1896 goto fail; 1897 reg_n = user->reg; 1898 break; 1899 1900 case AY_IND_N: 1901 if (user->type != A_IND_N) 1902 goto fail; 1903 if (user->reg < 6 || user->reg > 7) 1904 goto fail; 1905 reg_n = user->reg; 1906 break; 1907 1908 case AY_PMOD_N: 1909 if (user->type != AY_PMOD_N) 1910 goto fail; 1911 if (user->reg < 6 || user->reg > 7) 1912 goto fail; 1913 reg_n = user->reg; 1914 break; 1915 1916 case AYX_INC_N: 1917 if (user->type != A_INC_N) 1918 goto fail; 1919 if ((user->reg < 6 || user->reg > 7) 1920 && (user->reg < 2 || user->reg > 3)) 1921 goto fail; 1922 reg_n = user->reg; 1923 break; 1924 1925 case AYX_IND_N: 1926 if (user->type != A_IND_N) 1927 goto fail; 1928 if ((user->reg < 6 || user->reg > 7) 1929 && (user->reg < 2 || user->reg > 3)) 1930 goto fail; 1931 reg_n = user->reg; 1932 break; 1933 1934 case AYX_PMOD_N: 1935 if (user->type != AY_PMOD_N) 1936 goto fail; 1937 if ((user->reg < 6 || user->reg > 7) 1938 && (user->reg < 2 || user->reg > 3)) 1939 goto fail; 1940 reg_n = user->reg; 1941 break; 1942 1943 case DSP_REG_A_M: 1944 if (user->type != DSP_REG_N) 1945 goto fail; 1946 if (user->reg != A_A0_NUM 1947 && user->reg != A_A1_NUM) 1948 goto fail; 1949 reg_m = user->reg; 1950 break; 1951 1952 case DSP_REG_AX: 1953 if (user->type != DSP_REG_N) 1954 goto fail; 1955 switch (user->reg) 1956 { 1957 case A_A0_NUM: 1958 reg_x = 0; 1959 break; 1960 case A_A1_NUM: 1961 reg_x = 2; 1962 break; 1963 case A_X0_NUM: 1964 reg_x = 1; 1965 break; 1966 case A_X1_NUM: 1967 reg_x = 3; 1968 break; 1969 default: 1970 goto fail; 1971 } 1972 break; 1973 1974 case DSP_REG_XY: 1975 if (user->type != DSP_REG_N) 1976 goto fail; 1977 switch (user->reg) 1978 { 1979 case A_X0_NUM: 1980 reg_x = 0; 1981 break; 1982 case A_X1_NUM: 1983 reg_x = 2; 1984 break; 1985 case A_Y0_NUM: 1986 reg_x = 1; 1987 break; 1988 case A_Y1_NUM: 1989 reg_x = 3; 1990 break; 1991 default: 1992 goto fail; 1993 } 1994 break; 1995 1996 case DSP_REG_AY: 1997 if (user->type != DSP_REG_N) 1998 goto fail; 1999 switch (user->reg) 2000 { 2001 case A_A0_NUM: 2002 reg_y = 0; 2003 break; 2004 case A_A1_NUM: 2005 reg_y = 1; 2006 break; 2007 case A_Y0_NUM: 2008 reg_y = 2; 2009 break; 2010 case A_Y1_NUM: 2011 reg_y = 3; 2012 break; 2013 default: 2014 goto fail; 2015 } 2016 break; 2017 2018 case DSP_REG_YX: 2019 if (user->type != DSP_REG_N) 2020 goto fail; 2021 switch (user->reg) 2022 { 2023 case A_Y0_NUM: 2024 reg_y = 0; 2025 break; 2026 case A_Y1_NUM: 2027 reg_y = 1; 2028 break; 2029 case A_X0_NUM: 2030 reg_y = 2; 2031 break; 2032 case A_X1_NUM: 2033 reg_y = 3; 2034 break; 2035 default: 2036 goto fail; 2037 } 2038 break; 2039 2040 case DSP_REG_X: 2041 if (user->type != DSP_REG_N) 2042 goto fail; 2043 switch (user->reg) 2044 { 2045 case A_X0_NUM: 2046 reg_x = 0; 2047 break; 2048 case A_X1_NUM: 2049 reg_x = 1; 2050 break; 2051 case A_A0_NUM: 2052 reg_x = 2; 2053 break; 2054 case A_A1_NUM: 2055 reg_x = 3; 2056 break; 2057 default: 2058 goto fail; 2059 } 2060 break; 2061 2062 case DSP_REG_Y: 2063 if (user->type != DSP_REG_N) 2064 goto fail; 2065 switch (user->reg) 2066 { 2067 case A_Y0_NUM: 2068 reg_y = 0; 2069 break; 2070 case A_Y1_NUM: 2071 reg_y = 1; 2072 break; 2073 case A_M0_NUM: 2074 reg_y = 2; 2075 break; 2076 case A_M1_NUM: 2077 reg_y = 3; 2078 break; 2079 default: 2080 goto fail; 2081 } 2082 break; 2083 2084 case DSP_REG_E: 2085 if (user->type != DSP_REG_N) 2086 goto fail; 2087 switch (user->reg) 2088 { 2089 case A_X0_NUM: 2090 reg_efg = 0 << 10; 2091 break; 2092 case A_X1_NUM: 2093 reg_efg = 1 << 10; 2094 break; 2095 case A_Y0_NUM: 2096 reg_efg = 2 << 10; 2097 break; 2098 case A_A1_NUM: 2099 reg_efg = 3 << 10; 2100 break; 2101 default: 2102 goto fail; 2103 } 2104 break; 2105 2106 case DSP_REG_F: 2107 if (user->type != DSP_REG_N) 2108 goto fail; 2109 switch (user->reg) 2110 { 2111 case A_Y0_NUM: 2112 reg_efg |= 0 << 8; 2113 break; 2114 case A_Y1_NUM: 2115 reg_efg |= 1 << 8; 2116 break; 2117 case A_X0_NUM: 2118 reg_efg |= 2 << 8; 2119 break; 2120 case A_A1_NUM: 2121 reg_efg |= 3 << 8; 2122 break; 2123 default: 2124 goto fail; 2125 } 2126 break; 2127 2128 case DSP_REG_G: 2129 if (user->type != DSP_REG_N) 2130 goto fail; 2131 switch (user->reg) 2132 { 2133 case A_M0_NUM: 2134 reg_efg |= 0 << 2; 2135 break; 2136 case A_M1_NUM: 2137 reg_efg |= 1 << 2; 2138 break; 2139 case A_A0_NUM: 2140 reg_efg |= 2 << 2; 2141 break; 2142 case A_A1_NUM: 2143 reg_efg |= 3 << 2; 2144 break; 2145 default: 2146 goto fail; 2147 } 2148 break; 2149 2150 case A_A0: 2151 if (user->type != DSP_REG_N || user->reg != A_A0_NUM) 2152 goto fail; 2153 break; 2154 case A_X0: 2155 if (user->type != DSP_REG_N || user->reg != A_X0_NUM) 2156 goto fail; 2157 break; 2158 case A_X1: 2159 if (user->type != DSP_REG_N || user->reg != A_X1_NUM) 2160 goto fail; 2161 break; 2162 case A_Y0: 2163 if (user->type != DSP_REG_N || user->reg != A_Y0_NUM) 2164 goto fail; 2165 break; 2166 case A_Y1: 2167 if (user->type != DSP_REG_N || user->reg != A_Y1_NUM) 2168 goto fail; 2169 break; 2170 2171 case F_REG_M: 2172 case D_REG_M: 2173 case X_REG_M: 2174 case V_REG_M: 2175 case FPUL_M: 2176 case FPSCR_M: 2177 /* Opcode needs rn */ 2178 if (user->type != arg - F_REG_M + F_REG_N) 2179 goto fail; 2180 reg_m = user->reg; 2181 break; 2182 case DX_REG_M: 2183 if (user->type != D_REG_N && user->type != X_REG_N) 2184 goto fail; 2185 reg_m = user->reg; 2186 break; 2187 case XMTRX_M4: 2188 if (user->type != XMTRX_M4) 2189 goto fail; 2190 reg_m = 4; 2191 break; 2192 2193 default: 2194 printf (_("unhandled %d\n"), arg); 2195 goto fail; 2196 } 2197 if (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh2a_nofpu_up) 2198 && ( arg == A_DISP_REG_M 2199 || arg == A_DISP_REG_N)) 2200 { 2201 /* Check a few key IMM* fields for overflow. */ 2202 int opf; 2203 long val = user->immediate.X_add_number; 2204 2205 for (opf = 0; opf < 4; opf ++) 2206 switch (this_try->nibbles[opf]) 2207 { 2208 case IMM0_4: 2209 case IMM1_4: 2210 if (val < 0 || val > 15) 2211 goto fail; 2212 break; 2213 case IMM0_4BY2: 2214 case IMM1_4BY2: 2215 if (val < 0 || val > 15 * 2) 2216 goto fail; 2217 break; 2218 case IMM0_4BY4: 2219 case IMM1_4BY4: 2220 if (val < 0 || val > 15 * 4) 2221 goto fail; 2222 break; 2223 default: 2224 break; 2225 } 2226 } 2227 } 2228 if ( !SH_MERGE_ARCH_SET_VALID (valid_arch, this_try->arch)) 2229 goto fail; 2230 valid_arch = SH_MERGE_ARCH_SET (valid_arch, this_try->arch); 2231 return this_try; 2232 fail: 2233 ; 2234 } 2235 2236 return 0; 2237 } 2238 2239 static void 2240 insert (char *where, int how, int pcrel, sh_operand_info *op) 2241 { 2242 fix_new_exp (frag_now, 2243 where - frag_now->fr_literal, 2244 2, 2245 &op->immediate, 2246 pcrel, 2247 how); 2248 } 2249 2250 static void 2251 insert4 (char * where, int how, int pcrel, sh_operand_info * op) 2252 { 2253 fix_new_exp (frag_now, 2254 where - frag_now->fr_literal, 2255 4, 2256 & op->immediate, 2257 pcrel, 2258 how); 2259 } 2260 static void 2261 build_relax (sh_opcode_info *opcode, sh_operand_info *op) 2262 { 2263 int high_byte = target_big_endian ? 0 : 1; 2264 char *p; 2265 2266 if (opcode->arg[0] == A_BDISP8) 2267 { 2268 int what = (opcode->nibbles[1] & 4) ? COND_JUMP_DELAY : COND_JUMP; 2269 p = frag_var (rs_machine_dependent, 2270 md_relax_table[C (what, COND32)].rlx_length, 2271 md_relax_table[C (what, COND8)].rlx_length, 2272 C (what, 0), 2273 op->immediate.X_add_symbol, 2274 op->immediate.X_add_number, 2275 0); 2276 p[high_byte] = (opcode->nibbles[0] << 4) | (opcode->nibbles[1]); 2277 } 2278 else if (opcode->arg[0] == A_BDISP12) 2279 { 2280 p = frag_var (rs_machine_dependent, 2281 md_relax_table[C (UNCOND_JUMP, UNCOND32)].rlx_length, 2282 md_relax_table[C (UNCOND_JUMP, UNCOND12)].rlx_length, 2283 C (UNCOND_JUMP, 0), 2284 op->immediate.X_add_symbol, 2285 op->immediate.X_add_number, 2286 0); 2287 p[high_byte] = (opcode->nibbles[0] << 4); 2288 } 2289 2290 } 2291 2292 /* Insert ldrs & ldre with fancy relocations that relaxation can recognize. */ 2293 2294 static char * 2295 insert_loop_bounds (char *output, sh_operand_info *operand) 2296 { 2297 char *name; 2298 symbolS *end_sym; 2299 2300 /* Since the low byte of the opcode will be overwritten by the reloc, we 2301 can just stash the high byte into both bytes and ignore endianness. */ 2302 output[0] = 0x8c; 2303 output[1] = 0x8c; 2304 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2305 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2306 2307 if (sh_relax) 2308 { 2309 static int count = 0; 2310 2311 /* If the last loop insn is a two-byte-insn, it is in danger of being 2312 swapped with the insn after it. To prevent this, create a new 2313 symbol - complete with SH_LABEL reloc - after the last loop insn. 2314 If the last loop insn is four bytes long, the symbol will be 2315 right in the middle, but four byte insns are not swapped anyways. */ 2316 /* A REPEAT takes 6 bytes. The SH has a 32 bit address space. 2317 Hence a 9 digit number should be enough to count all REPEATs. */ 2318 name = alloca (11); 2319 sprintf (name, "_R%x", count++ & 0x3fffffff); 2320 end_sym = symbol_new (name, undefined_section, 0, &zero_address_frag); 2321 /* Make this a local symbol. */ 2322 #ifdef OBJ_COFF 2323 SF_SET_LOCAL (end_sym); 2324 #endif /* OBJ_COFF */ 2325 symbol_table_insert (end_sym); 2326 end_sym->sy_value = operand[1].immediate; 2327 end_sym->sy_value.X_add_number += 2; 2328 fix_new (frag_now, frag_now_fix (), 2, end_sym, 0, 1, BFD_RELOC_SH_LABEL); 2329 } 2330 2331 output = frag_more (2); 2332 output[0] = 0x8e; 2333 output[1] = 0x8e; 2334 insert (output, BFD_RELOC_SH_LOOP_START, 1, operand); 2335 insert (output, BFD_RELOC_SH_LOOP_END, 1, operand + 1); 2336 2337 return frag_more (2); 2338 } 2339 2340 /* Now we know what sort of opcodes it is, let's build the bytes. */ 2341 2342 static unsigned int 2343 build_Mytes (sh_opcode_info *opcode, sh_operand_info *operand) 2344 { 2345 int indx; 2346 char nbuf[8]; 2347 char *output; 2348 unsigned int size = 2; 2349 int low_byte = target_big_endian ? 1 : 0; 2350 int max_index = 4; 2351 bfd_reloc_code_real_type r_type; 2352 #ifdef OBJ_ELF 2353 int unhandled_pic = 0; 2354 #endif 2355 2356 nbuf[0] = 0; 2357 nbuf[1] = 0; 2358 nbuf[2] = 0; 2359 nbuf[3] = 0; 2360 nbuf[4] = 0; 2361 nbuf[5] = 0; 2362 nbuf[6] = 0; 2363 nbuf[7] = 0; 2364 2365 #ifdef OBJ_ELF 2366 for (indx = 0; indx < 3; indx++) 2367 if (opcode->arg[indx] == A_IMM 2368 && operand[indx].type == A_IMM 2369 && (operand[indx].immediate.X_op == O_PIC_reloc 2370 || sh_PIC_related_p (operand[indx].immediate.X_add_symbol) 2371 || sh_PIC_related_p (operand[indx].immediate.X_op_symbol))) 2372 unhandled_pic = 1; 2373 #endif 2374 2375 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2376 { 2377 output = frag_more (4); 2378 size = 4; 2379 max_index = 8; 2380 } 2381 else 2382 output = frag_more (2); 2383 2384 for (indx = 0; indx < max_index; indx++) 2385 { 2386 sh_nibble_type i = opcode->nibbles[indx]; 2387 if (i < 16) 2388 { 2389 nbuf[indx] = i; 2390 } 2391 else 2392 { 2393 switch (i) 2394 { 2395 case REG_N: 2396 case REG_N_D: 2397 nbuf[indx] = reg_n; 2398 break; 2399 case REG_M: 2400 nbuf[indx] = reg_m; 2401 break; 2402 case SDT_REG_N: 2403 if (reg_n < 2 || reg_n > 5) 2404 as_bad (_("Invalid register: 'r%d'"), reg_n); 2405 nbuf[indx] = (reg_n & 3) | 4; 2406 break; 2407 case REG_NM: 2408 nbuf[indx] = reg_n | (reg_m >> 2); 2409 break; 2410 case REG_B: 2411 nbuf[indx] = reg_b | 0x08; 2412 break; 2413 case REG_N_B01: 2414 nbuf[indx] = reg_n | 0x01; 2415 break; 2416 case IMM0_3s: 2417 nbuf[indx] |= 0x08; 2418 case IMM0_3c: 2419 insert (output + low_byte, BFD_RELOC_SH_IMM3, 0, operand); 2420 break; 2421 case IMM0_3Us: 2422 nbuf[indx] |= 0x80; 2423 case IMM0_3Uc: 2424 insert (output + low_byte, BFD_RELOC_SH_IMM3U, 0, operand); 2425 break; 2426 case DISP0_12: 2427 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand); 2428 break; 2429 case DISP0_12BY2: 2430 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand); 2431 break; 2432 case DISP0_12BY4: 2433 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand); 2434 break; 2435 case DISP0_12BY8: 2436 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand); 2437 break; 2438 case DISP1_12: 2439 insert (output + 2, BFD_RELOC_SH_DISP12, 0, operand+1); 2440 break; 2441 case DISP1_12BY2: 2442 insert (output + 2, BFD_RELOC_SH_DISP12BY2, 0, operand+1); 2443 break; 2444 case DISP1_12BY4: 2445 insert (output + 2, BFD_RELOC_SH_DISP12BY4, 0, operand+1); 2446 break; 2447 case DISP1_12BY8: 2448 insert (output + 2, BFD_RELOC_SH_DISP12BY8, 0, operand+1); 2449 break; 2450 case IMM0_20_4: 2451 break; 2452 case IMM0_20: 2453 r_type = BFD_RELOC_SH_DISP20; 2454 #ifdef OBJ_ELF 2455 if (sh_check_fixup (&operand->immediate, &r_type)) 2456 as_bad (_("Invalid PIC expression.")); 2457 unhandled_pic = 0; 2458 #endif 2459 insert4 (output, r_type, 0, operand); 2460 break; 2461 case IMM0_20BY8: 2462 insert4 (output, BFD_RELOC_SH_DISP20BY8, 0, operand); 2463 break; 2464 case IMM0_4BY4: 2465 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand); 2466 break; 2467 case IMM0_4BY2: 2468 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand); 2469 break; 2470 case IMM0_4: 2471 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand); 2472 break; 2473 case IMM1_4BY4: 2474 insert (output + low_byte, BFD_RELOC_SH_IMM4BY4, 0, operand + 1); 2475 break; 2476 case IMM1_4BY2: 2477 insert (output + low_byte, BFD_RELOC_SH_IMM4BY2, 0, operand + 1); 2478 break; 2479 case IMM1_4: 2480 insert (output + low_byte, BFD_RELOC_SH_IMM4, 0, operand + 1); 2481 break; 2482 case IMM0_8BY4: 2483 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand); 2484 break; 2485 case IMM0_8BY2: 2486 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand); 2487 break; 2488 case IMM0_8: 2489 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand); 2490 break; 2491 case IMM1_8BY4: 2492 insert (output + low_byte, BFD_RELOC_SH_IMM8BY4, 0, operand + 1); 2493 break; 2494 case IMM1_8BY2: 2495 insert (output + low_byte, BFD_RELOC_SH_IMM8BY2, 0, operand + 1); 2496 break; 2497 case IMM1_8: 2498 insert (output + low_byte, BFD_RELOC_SH_IMM8, 0, operand + 1); 2499 break; 2500 case PCRELIMM_8BY4: 2501 insert (output, BFD_RELOC_SH_PCRELIMM8BY4, 2502 operand->type != A_DISP_PC_ABS, operand); 2503 break; 2504 case PCRELIMM_8BY2: 2505 insert (output, BFD_RELOC_SH_PCRELIMM8BY2, 2506 operand->type != A_DISP_PC_ABS, operand); 2507 break; 2508 case REPEAT: 2509 output = insert_loop_bounds (output, operand); 2510 nbuf[indx] = opcode->nibbles[3]; 2511 operand += 2; 2512 break; 2513 default: 2514 printf (_("failed for %d\n"), i); 2515 } 2516 } 2517 } 2518 #ifdef OBJ_ELF 2519 if (unhandled_pic) 2520 as_bad (_("misplaced PIC operand")); 2521 #endif 2522 if (!target_big_endian) 2523 { 2524 output[1] = (nbuf[0] << 4) | (nbuf[1]); 2525 output[0] = (nbuf[2] << 4) | (nbuf[3]); 2526 } 2527 else 2528 { 2529 output[0] = (nbuf[0] << 4) | (nbuf[1]); 2530 output[1] = (nbuf[2] << 4) | (nbuf[3]); 2531 } 2532 if (SH_MERGE_ARCH_SET (opcode->arch, arch_op32)) 2533 { 2534 if (!target_big_endian) 2535 { 2536 output[3] = (nbuf[4] << 4) | (nbuf[5]); 2537 output[2] = (nbuf[6] << 4) | (nbuf[7]); 2538 } 2539 else 2540 { 2541 output[2] = (nbuf[4] << 4) | (nbuf[5]); 2542 output[3] = (nbuf[6] << 4) | (nbuf[7]); 2543 } 2544 } 2545 return size; 2546 } 2547 2548 /* Find an opcode at the start of *STR_P in the hash table, and set 2549 *STR_P to the first character after the last one read. */ 2550 2551 static sh_opcode_info * 2552 find_cooked_opcode (char **str_p) 2553 { 2554 char *str = *str_p; 2555 unsigned char *op_start; 2556 unsigned char *op_end; 2557 char name[20]; 2558 unsigned int nlen = 0; 2559 2560 /* Drop leading whitespace. */ 2561 while (*str == ' ') 2562 str++; 2563 2564 /* Find the op code end. 2565 The pre-processor will eliminate whitespace in front of 2566 any '@' after the first argument; we may be called from 2567 assemble_ppi, so the opcode might be terminated by an '@'. */ 2568 for (op_start = op_end = (unsigned char *) str; 2569 *op_end 2570 && nlen < sizeof (name) - 1 2571 && !is_end_of_line[*op_end] && *op_end != ' ' && *op_end != '@'; 2572 op_end++) 2573 { 2574 unsigned char c = op_start[nlen]; 2575 2576 /* The machine independent code will convert CMP/EQ into cmp/EQ 2577 because it thinks the '/' is the end of the symbol. Moreover, 2578 all but the first sub-insn is a parallel processing insn won't 2579 be capitalized. Instead of hacking up the machine independent 2580 code, we just deal with it here. */ 2581 c = TOLOWER (c); 2582 name[nlen] = c; 2583 nlen++; 2584 } 2585 2586 name[nlen] = 0; 2587 *str_p = (char *) op_end; 2588 2589 if (nlen == 0) 2590 as_bad (_("can't find opcode ")); 2591 2592 return (sh_opcode_info *) hash_find (opcode_hash_control, name); 2593 } 2594 2595 /* Assemble a parallel processing insn. */ 2596 #define DDT_BASE 0xf000 /* Base value for double data transfer insns */ 2597 2598 static unsigned int 2599 assemble_ppi (char *op_end, sh_opcode_info *opcode) 2600 { 2601 int movx = 0; 2602 int movy = 0; 2603 int cond = 0; 2604 int field_b = 0; 2605 char *output; 2606 int move_code; 2607 unsigned int size; 2608 2609 for (;;) 2610 { 2611 sh_operand_info operand[3]; 2612 2613 /* Some insn ignore one or more register fields, e.g. psts machl,a0. 2614 Make sure we encode a defined insn pattern. */ 2615 reg_x = 0; 2616 reg_y = 0; 2617 reg_n = 0; 2618 2619 if (opcode->arg[0] != A_END) 2620 op_end = get_operands (opcode, op_end, operand); 2621 try_another_opcode: 2622 opcode = get_specific (opcode, operand); 2623 if (opcode == 0) 2624 { 2625 /* Couldn't find an opcode which matched the operands. */ 2626 char *where = frag_more (2); 2627 size = 2; 2628 2629 where[0] = 0x0; 2630 where[1] = 0x0; 2631 as_bad (_("invalid operands for opcode")); 2632 return size; 2633 } 2634 2635 if (opcode->nibbles[0] != PPI) 2636 as_bad (_("insn can't be combined with parallel processing insn")); 2637 2638 switch (opcode->nibbles[1]) 2639 { 2640 2641 case NOPX: 2642 if (movx) 2643 as_bad (_("multiple movx specifications")); 2644 movx = DDT_BASE; 2645 break; 2646 case NOPY: 2647 if (movy) 2648 as_bad (_("multiple movy specifications")); 2649 movy = DDT_BASE; 2650 break; 2651 2652 case MOVX_NOPY: 2653 if (movx) 2654 as_bad (_("multiple movx specifications")); 2655 if ((reg_n < 4 || reg_n > 5) 2656 && (reg_n < 0 || reg_n > 1)) 2657 as_bad (_("invalid movx address register")); 2658 if (movy && movy != DDT_BASE) 2659 as_bad (_("insn cannot be combined with non-nopy")); 2660 movx = ((((reg_n & 1) != 0) << 9) 2661 + (((reg_n & 4) == 0) << 8) 2662 + (reg_x << 6) 2663 + (opcode->nibbles[2] << 4) 2664 + opcode->nibbles[3] 2665 + DDT_BASE); 2666 break; 2667 2668 case MOVY_NOPX: 2669 if (movy) 2670 as_bad (_("multiple movy specifications")); 2671 if ((reg_n < 6 || reg_n > 7) 2672 && (reg_n < 2 || reg_n > 3)) 2673 as_bad (_("invalid movy address register")); 2674 if (movx && movx != DDT_BASE) 2675 as_bad (_("insn cannot be combined with non-nopx")); 2676 movy = ((((reg_n & 1) != 0) << 8) 2677 + (((reg_n & 4) == 0) << 9) 2678 + (reg_y << 6) 2679 + (opcode->nibbles[2] << 4) 2680 + opcode->nibbles[3] 2681 + DDT_BASE); 2682 break; 2683 2684 case MOVX: 2685 if (movx) 2686 as_bad (_("multiple movx specifications")); 2687 if (movy & 0x2ac) 2688 as_bad (_("previous movy requires nopx")); 2689 if (reg_n < 4 || reg_n > 5) 2690 as_bad (_("invalid movx address register")); 2691 if (opcode->nibbles[2] & 8) 2692 { 2693 if (reg_m == A_A1_NUM) 2694 movx = 1 << 7; 2695 else if (reg_m != A_A0_NUM) 2696 as_bad (_("invalid movx dsp register")); 2697 } 2698 else 2699 { 2700 if (reg_x > 1) 2701 as_bad (_("invalid movx dsp register")); 2702 movx = reg_x << 7; 2703 } 2704 movx += ((reg_n - 4) << 9) + (opcode->nibbles[2] << 2) + DDT_BASE; 2705 break; 2706 2707 case MOVY: 2708 if (movy) 2709 as_bad (_("multiple movy specifications")); 2710 if (movx & 0x153) 2711 as_bad (_("previous movx requires nopy")); 2712 if (opcode->nibbles[2] & 8) 2713 { 2714 /* Bit 3 in nibbles[2] is intended for bit 4 of the opcode, 2715 so add 8 more. */ 2716 movy = 8; 2717 if (reg_m == A_A1_NUM) 2718 movy += 1 << 6; 2719 else if (reg_m != A_A0_NUM) 2720 as_bad (_("invalid movy dsp register")); 2721 } 2722 else 2723 { 2724 if (reg_y > 1) 2725 as_bad (_("invalid movy dsp register")); 2726 movy = reg_y << 6; 2727 } 2728 if (reg_n < 6 || reg_n > 7) 2729 as_bad (_("invalid movy address register")); 2730 movy += ((reg_n - 6) << 8) + opcode->nibbles[2] + DDT_BASE; 2731 break; 2732 2733 case PSH: 2734 if (operand[0].immediate.X_op != O_constant) 2735 as_bad (_("dsp immediate shift value not constant")); 2736 field_b = ((opcode->nibbles[2] << 12) 2737 | (operand[0].immediate.X_add_number & 127) << 4 2738 | reg_n); 2739 break; 2740 case PPI3NC: 2741 if (cond) 2742 { 2743 opcode++; 2744 goto try_another_opcode; 2745 } 2746 /* Fall through. */ 2747 case PPI3: 2748 if (field_b) 2749 as_bad (_("multiple parallel processing specifications")); 2750 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2751 + (reg_x << 6) + (reg_y << 4) + reg_n); 2752 switch (opcode->nibbles[4]) 2753 { 2754 case HEX_0: 2755 case HEX_XX00: 2756 case HEX_00YY: 2757 break; 2758 case HEX_1: 2759 case HEX_4: 2760 field_b += opcode->nibbles[4] << 4; 2761 break; 2762 default: 2763 abort (); 2764 } 2765 break; 2766 case PDC: 2767 if (cond) 2768 as_bad (_("multiple condition specifications")); 2769 cond = opcode->nibbles[2] << 8; 2770 if (*op_end) 2771 goto skip_cond_check; 2772 break; 2773 case PPIC: 2774 if (field_b) 2775 as_bad (_("multiple parallel processing specifications")); 2776 field_b = ((opcode->nibbles[2] << 12) + (opcode->nibbles[3] << 8) 2777 + cond + (reg_x << 6) + (reg_y << 4) + reg_n); 2778 cond = 0; 2779 switch (opcode->nibbles[4]) 2780 { 2781 case HEX_0: 2782 case HEX_XX00: 2783 case HEX_00YY: 2784 break; 2785 case HEX_1: 2786 case HEX_4: 2787 field_b += opcode->nibbles[4] << 4; 2788 break; 2789 default: 2790 abort (); 2791 } 2792 break; 2793 case PMUL: 2794 if (field_b) 2795 { 2796 if ((field_b & 0xef00) == 0xa100) 2797 field_b -= 0x8100; 2798 /* pclr Dz pmuls Se,Sf,Dg */ 2799 else if ((field_b & 0xff00) == 0x8d00 2800 && (SH_MERGE_ARCH_SET_VALID (valid_arch, arch_sh4al_dsp_up))) 2801 { 2802 valid_arch = SH_MERGE_ARCH_SET (valid_arch, arch_sh4al_dsp_up); 2803 field_b -= 0x8cf0; 2804 } 2805 else 2806 as_bad (_("insn cannot be combined with pmuls")); 2807 switch (field_b & 0xf) 2808 { 2809 case A_X0_NUM: 2810 field_b += 0 - A_X0_NUM; 2811 break; 2812 case A_Y0_NUM: 2813 field_b += 1 - A_Y0_NUM; 2814 break; 2815 case A_A0_NUM: 2816 field_b += 2 - A_A0_NUM; 2817 break; 2818 case A_A1_NUM: 2819 field_b += 3 - A_A1_NUM; 2820 break; 2821 default: 2822 as_bad (_("bad combined pmuls output operand")); 2823 } 2824 /* Generate warning if the destination register for padd / psub 2825 and pmuls is the same ( only for A0 or A1 ). 2826 If the last nibble is 1010 then A0 is used in both 2827 padd / psub and pmuls. If it is 1111 then A1 is used 2828 as destination register in both padd / psub and pmuls. */ 2829 2830 if ((((field_b | reg_efg) & 0x000F) == 0x000A) 2831 || (((field_b | reg_efg) & 0x000F) == 0x000F)) 2832 as_warn (_("destination register is same for parallel insns")); 2833 } 2834 field_b += 0x4000 + reg_efg; 2835 break; 2836 default: 2837 abort (); 2838 } 2839 if (cond) 2840 { 2841 as_bad (_("condition not followed by conditionalizable insn")); 2842 cond = 0; 2843 } 2844 if (! *op_end) 2845 break; 2846 skip_cond_check: 2847 opcode = find_cooked_opcode (&op_end); 2848 if (opcode == NULL) 2849 { 2850 (as_bad 2851 (_("unrecognized characters at end of parallel processing insn"))); 2852 break; 2853 } 2854 } 2855 2856 move_code = movx | movy; 2857 if (field_b) 2858 { 2859 /* Parallel processing insn. */ 2860 unsigned long ppi_code = (movx | movy | 0xf800) << 16 | field_b; 2861 2862 output = frag_more (4); 2863 size = 4; 2864 if (! target_big_endian) 2865 { 2866 output[3] = ppi_code >> 8; 2867 output[2] = ppi_code; 2868 } 2869 else 2870 { 2871 output[2] = ppi_code >> 8; 2872 output[3] = ppi_code; 2873 } 2874 move_code |= 0xf800; 2875 } 2876 else 2877 { 2878 /* Just a double data transfer. */ 2879 output = frag_more (2); 2880 size = 2; 2881 } 2882 if (! target_big_endian) 2883 { 2884 output[1] = move_code >> 8; 2885 output[0] = move_code; 2886 } 2887 else 2888 { 2889 output[0] = move_code >> 8; 2890 output[1] = move_code; 2891 } 2892 return size; 2893 } 2894 2895 /* This is the guts of the machine-dependent assembler. STR points to a 2896 machine dependent instruction. This function is supposed to emit 2897 the frags/bytes it assembles to. */ 2898 2899 void 2900 md_assemble (char *str) 2901 { 2902 char *op_end; 2903 sh_operand_info operand[3]; 2904 sh_opcode_info *opcode; 2905 unsigned int size = 0; 2906 char *initial_str = str; 2907 2908 #ifdef HAVE_SH64 2909 if (sh64_isa_mode == sh64_isa_shmedia) 2910 { 2911 shmedia_md_assemble (str); 2912 return; 2913 } 2914 else 2915 { 2916 /* If we've seen pseudo-directives, make sure any emitted data or 2917 frags are marked as data. */ 2918 if (!seen_insn) 2919 { 2920 sh64_update_contents_mark (TRUE); 2921 sh64_set_contents_type (CRT_SH5_ISA16); 2922 } 2923 2924 seen_insn = TRUE; 2925 } 2926 #endif /* HAVE_SH64 */ 2927 2928 opcode = find_cooked_opcode (&str); 2929 op_end = str; 2930 2931 if (opcode == NULL) 2932 { 2933 /* The opcode is not in the hash table. 2934 This means we definitely have an assembly failure, 2935 but the instruction may be valid in another CPU variant. 2936 In this case emit something better than 'unknown opcode'. 2937 Search the full table in sh-opc.h to check. */ 2938 2939 char *name = initial_str; 2940 int name_length = 0; 2941 const sh_opcode_info *op; 2942 int found = 0; 2943 2944 /* identify opcode in string */ 2945 while (ISSPACE (*name)) 2946 { 2947 name++; 2948 } 2949 while (!ISSPACE (name[name_length])) 2950 { 2951 name_length++; 2952 } 2953 2954 /* search for opcode in full list */ 2955 for (op = sh_table; op->name; op++) 2956 { 2957 if (strncasecmp (op->name, name, name_length) == 0 2958 && op->name[name_length] == '\0') 2959 { 2960 found = 1; 2961 break; 2962 } 2963 } 2964 2965 if ( found ) 2966 { 2967 as_bad (_("opcode not valid for this cpu variant")); 2968 } 2969 else 2970 { 2971 as_bad (_("unknown opcode")); 2972 } 2973 return; 2974 } 2975 2976 if (sh_relax 2977 && ! seg_info (now_seg)->tc_segment_info_data.in_code) 2978 { 2979 /* Output a CODE reloc to tell the linker that the following 2980 bytes are instructions, not data. */ 2981 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 2982 BFD_RELOC_SH_CODE); 2983 seg_info (now_seg)->tc_segment_info_data.in_code = 1; 2984 } 2985 2986 if (opcode->nibbles[0] == PPI) 2987 { 2988 size = assemble_ppi (op_end, opcode); 2989 } 2990 else 2991 { 2992 if (opcode->arg[0] == A_BDISP12 2993 || opcode->arg[0] == A_BDISP8) 2994 { 2995 /* Since we skip get_specific here, we have to check & update 2996 valid_arch now. */ 2997 if (SH_MERGE_ARCH_SET_VALID (valid_arch, opcode->arch)) 2998 valid_arch = SH_MERGE_ARCH_SET (valid_arch, opcode->arch); 2999 else 3000 as_bad (_("Delayed branches not available on SH1")); 3001 parse_exp (op_end + 1, &operand[0]); 3002 build_relax (opcode, &operand[0]); 3003 3004 /* All branches are currently 16 bit. */ 3005 size = 2; 3006 } 3007 else 3008 { 3009 if (opcode->arg[0] == A_END) 3010 { 3011 /* Ignore trailing whitespace. If there is any, it has already 3012 been compressed to a single space. */ 3013 if (*op_end == ' ') 3014 op_end++; 3015 } 3016 else 3017 { 3018 op_end = get_operands (opcode, op_end, operand); 3019 } 3020 opcode = get_specific (opcode, operand); 3021 3022 if (opcode == 0) 3023 { 3024 /* Couldn't find an opcode which matched the operands. */ 3025 char *where = frag_more (2); 3026 size = 2; 3027 3028 where[0] = 0x0; 3029 where[1] = 0x0; 3030 as_bad (_("invalid operands for opcode")); 3031 } 3032 else 3033 { 3034 if (*op_end) 3035 as_bad (_("excess operands: '%s'"), op_end); 3036 3037 size = build_Mytes (opcode, operand); 3038 } 3039 } 3040 } 3041 3042 dwarf2_emit_insn (size); 3043 } 3044 3045 /* This routine is called each time a label definition is seen. It 3046 emits a BFD_RELOC_SH_LABEL reloc if necessary. */ 3047 3048 void 3049 sh_frob_label (symbolS *sym) 3050 { 3051 static fragS *last_label_frag; 3052 static int last_label_offset; 3053 3054 if (sh_relax 3055 && seg_info (now_seg)->tc_segment_info_data.in_code) 3056 { 3057 int offset; 3058 3059 offset = frag_now_fix (); 3060 if (frag_now != last_label_frag 3061 || offset != last_label_offset) 3062 { 3063 fix_new (frag_now, offset, 2, &abs_symbol, 0, 0, BFD_RELOC_SH_LABEL); 3064 last_label_frag = frag_now; 3065 last_label_offset = offset; 3066 } 3067 } 3068 3069 dwarf2_emit_label (sym); 3070 } 3071 3072 /* This routine is called when the assembler is about to output some 3073 data. It emits a BFD_RELOC_SH_DATA reloc if necessary. */ 3074 3075 void 3076 sh_flush_pending_output (void) 3077 { 3078 if (sh_relax 3079 && seg_info (now_seg)->tc_segment_info_data.in_code) 3080 { 3081 fix_new (frag_now, frag_now_fix (), 2, &abs_symbol, 0, 0, 3082 BFD_RELOC_SH_DATA); 3083 seg_info (now_seg)->tc_segment_info_data.in_code = 0; 3084 } 3085 } 3086 3087 symbolS * 3088 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 3089 { 3090 return 0; 3091 } 3092 3093 /* Various routines to kill one day. */ 3094 3095 char * 3096 md_atof (int type, char *litP, int *sizeP) 3097 { 3098 return ieee_md_atof (type, litP, sizeP, target_big_endian); 3099 } 3100 3101 /* Handle the .uses pseudo-op. This pseudo-op is used just before a 3102 call instruction. It refers to a label of the instruction which 3103 loads the register which the call uses. We use it to generate a 3104 special reloc for the linker. */ 3105 3106 static void 3107 s_uses (int ignore ATTRIBUTE_UNUSED) 3108 { 3109 expressionS ex; 3110 3111 if (! sh_relax) 3112 as_warn (_(".uses pseudo-op seen when not relaxing")); 3113 3114 expression (&ex); 3115 3116 if (ex.X_op != O_symbol || ex.X_add_number != 0) 3117 { 3118 as_bad (_("bad .uses format")); 3119 ignore_rest_of_line (); 3120 return; 3121 } 3122 3123 fix_new_exp (frag_now, frag_now_fix (), 2, &ex, 1, BFD_RELOC_SH_USES); 3124 3125 demand_empty_rest_of_line (); 3126 } 3127 3128 enum options 3129 { 3130 OPTION_RELAX = OPTION_MD_BASE, 3131 OPTION_BIG, 3132 OPTION_LITTLE, 3133 OPTION_SMALL, 3134 OPTION_DSP, 3135 OPTION_ISA, 3136 OPTION_RENESAS, 3137 OPTION_ALLOW_REG_PREFIX, 3138 #ifdef HAVE_SH64 3139 OPTION_ABI, 3140 OPTION_NO_MIX, 3141 OPTION_SHCOMPACT_CONST_CRANGE, 3142 OPTION_NO_EXPAND, 3143 OPTION_PT32, 3144 #endif 3145 OPTION_H_TICK_HEX, 3146 #ifdef OBJ_ELF 3147 OPTION_FDPIC, 3148 #endif 3149 OPTION_DUMMY /* Not used. This is just here to make it easy to add and subtract options from this enum. */ 3150 }; 3151 3152 const char *md_shortopts = ""; 3153 struct option md_longopts[] = 3154 { 3155 {"relax", no_argument, NULL, OPTION_RELAX}, 3156 {"big", no_argument, NULL, OPTION_BIG}, 3157 {"little", no_argument, NULL, OPTION_LITTLE}, 3158 /* The next two switches are here because the 3159 generic parts of the linker testsuite uses them. */ 3160 {"EB", no_argument, NULL, OPTION_BIG}, 3161 {"EL", no_argument, NULL, OPTION_LITTLE}, 3162 {"small", no_argument, NULL, OPTION_SMALL}, 3163 {"dsp", no_argument, NULL, OPTION_DSP}, 3164 {"isa", required_argument, NULL, OPTION_ISA}, 3165 {"renesas", no_argument, NULL, OPTION_RENESAS}, 3166 {"allow-reg-prefix", no_argument, NULL, OPTION_ALLOW_REG_PREFIX}, 3167 3168 #ifdef HAVE_SH64 3169 {"abi", required_argument, NULL, OPTION_ABI}, 3170 {"no-mix", no_argument, NULL, OPTION_NO_MIX}, 3171 {"shcompact-const-crange", no_argument, NULL, OPTION_SHCOMPACT_CONST_CRANGE}, 3172 {"no-expand", no_argument, NULL, OPTION_NO_EXPAND}, 3173 {"expand-pt32", no_argument, NULL, OPTION_PT32}, 3174 #endif /* HAVE_SH64 */ 3175 { "h-tick-hex", no_argument, NULL, OPTION_H_TICK_HEX }, 3176 3177 #ifdef OBJ_ELF 3178 {"fdpic", no_argument, NULL, OPTION_FDPIC}, 3179 #endif 3180 3181 {NULL, no_argument, NULL, 0} 3182 }; 3183 size_t md_longopts_size = sizeof (md_longopts); 3184 3185 int 3186 md_parse_option (int c, char *arg ATTRIBUTE_UNUSED) 3187 { 3188 switch (c) 3189 { 3190 case OPTION_RELAX: 3191 sh_relax = 1; 3192 break; 3193 3194 case OPTION_BIG: 3195 target_big_endian = 1; 3196 break; 3197 3198 case OPTION_LITTLE: 3199 target_big_endian = 0; 3200 break; 3201 3202 case OPTION_SMALL: 3203 sh_small = 1; 3204 break; 3205 3206 case OPTION_DSP: 3207 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3208 break; 3209 3210 case OPTION_RENESAS: 3211 dont_adjust_reloc_32 = 1; 3212 break; 3213 3214 case OPTION_ALLOW_REG_PREFIX: 3215 allow_dollar_register_prefix = 1; 3216 break; 3217 3218 case OPTION_ISA: 3219 if (strcasecmp (arg, "dsp") == 0) 3220 preset_target_arch = arch_sh_up & ~(arch_sh_sp_fpu|arch_sh_dp_fpu); 3221 else if (strcasecmp (arg, "fp") == 0) 3222 preset_target_arch = arch_sh_up & ~arch_sh_has_dsp; 3223 else if (strcasecmp (arg, "any") == 0) 3224 preset_target_arch = arch_sh_up; 3225 #ifdef HAVE_SH64 3226 else if (strcasecmp (arg, "shmedia") == 0) 3227 { 3228 if (sh64_isa_mode == sh64_isa_shcompact) 3229 as_bad (_("Invalid combination: --isa=SHcompact with --isa=SHmedia")); 3230 sh64_isa_mode = sh64_isa_shmedia; 3231 } 3232 else if (strcasecmp (arg, "shcompact") == 0) 3233 { 3234 if (sh64_isa_mode == sh64_isa_shmedia) 3235 as_bad (_("Invalid combination: --isa=SHmedia with --isa=SHcompact")); 3236 if (sh64_abi == sh64_abi_64) 3237 as_bad (_("Invalid combination: --abi=64 with --isa=SHcompact")); 3238 sh64_isa_mode = sh64_isa_shcompact; 3239 } 3240 #endif /* HAVE_SH64 */ 3241 else 3242 { 3243 extern const bfd_arch_info_type bfd_sh_arch; 3244 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3245 3246 preset_target_arch = 0; 3247 for (; bfd_arch; bfd_arch=bfd_arch->next) 3248 { 3249 int len = strlen(bfd_arch->printable_name); 3250 3251 if (bfd_arch->mach == bfd_mach_sh5) 3252 continue; 3253 3254 if (strncasecmp (bfd_arch->printable_name, arg, len) != 0) 3255 continue; 3256 3257 if (arg[len] == '\0') 3258 preset_target_arch = 3259 sh_get_arch_from_bfd_mach (bfd_arch->mach); 3260 else if (strcasecmp(&arg[len], "-up") == 0) 3261 preset_target_arch = 3262 sh_get_arch_up_from_bfd_mach (bfd_arch->mach); 3263 else 3264 continue; 3265 break; 3266 } 3267 3268 if (!preset_target_arch) 3269 as_bad (_("Invalid argument to --isa option: %s"), arg); 3270 } 3271 break; 3272 3273 #ifdef HAVE_SH64 3274 case OPTION_ABI: 3275 if (strcmp (arg, "32") == 0) 3276 { 3277 if (sh64_abi == sh64_abi_64) 3278 as_bad (_("Invalid combination: --abi=32 with --abi=64")); 3279 sh64_abi = sh64_abi_32; 3280 } 3281 else if (strcmp (arg, "64") == 0) 3282 { 3283 if (sh64_abi == sh64_abi_32) 3284 as_bad (_("Invalid combination: --abi=64 with --abi=32")); 3285 if (sh64_isa_mode == sh64_isa_shcompact) 3286 as_bad (_("Invalid combination: --isa=SHcompact with --abi=64")); 3287 sh64_abi = sh64_abi_64; 3288 } 3289 else 3290 as_bad (_("Invalid argument to --abi option: %s"), arg); 3291 break; 3292 3293 case OPTION_NO_MIX: 3294 sh64_mix = FALSE; 3295 break; 3296 3297 case OPTION_SHCOMPACT_CONST_CRANGE: 3298 sh64_shcompact_const_crange = TRUE; 3299 break; 3300 3301 case OPTION_NO_EXPAND: 3302 sh64_expand = FALSE; 3303 break; 3304 3305 case OPTION_PT32: 3306 sh64_pt32 = TRUE; 3307 break; 3308 #endif /* HAVE_SH64 */ 3309 3310 case OPTION_H_TICK_HEX: 3311 enable_h_tick_hex = 1; 3312 break; 3313 3314 #ifdef OBJ_ELF 3315 case OPTION_FDPIC: 3316 sh_fdpic = TRUE; 3317 break; 3318 #endif /* OBJ_ELF */ 3319 3320 default: 3321 return 0; 3322 } 3323 3324 return 1; 3325 } 3326 3327 void 3328 md_show_usage (FILE *stream) 3329 { 3330 fprintf (stream, _("\ 3331 SH options:\n\ 3332 --little generate little endian code\n\ 3333 --big generate big endian code\n\ 3334 --relax alter jump instructions for long displacements\n\ 3335 --renesas disable optimization with section symbol for\n\ 3336 compatibility with Renesas assembler.\n\ 3337 --small align sections to 4 byte boundaries, not 16\n\ 3338 --dsp enable sh-dsp insns, and disable floating-point ISAs.\n\ 3339 --allow-reg-prefix allow '$' as a register name prefix.\n\ 3340 --isa=[any use most appropriate isa\n\ 3341 | dsp same as '-dsp'\n\ 3342 | fp")); 3343 { 3344 extern const bfd_arch_info_type bfd_sh_arch; 3345 bfd_arch_info_type const *bfd_arch = &bfd_sh_arch; 3346 3347 for (; bfd_arch; bfd_arch=bfd_arch->next) 3348 if (bfd_arch->mach != bfd_mach_sh5) 3349 { 3350 fprintf (stream, "\n | %s", bfd_arch->printable_name); 3351 fprintf (stream, "\n | %s-up", bfd_arch->printable_name); 3352 } 3353 } 3354 fprintf (stream, "]\n"); 3355 #ifdef HAVE_SH64 3356 fprintf (stream, _("\ 3357 --isa=[shmedia set as the default instruction set for SH64\n\ 3358 | SHmedia\n\ 3359 | shcompact\n\ 3360 | SHcompact]\n")); 3361 fprintf (stream, _("\ 3362 --abi=[32|64] set size of expanded SHmedia operands and object\n\ 3363 file type\n\ 3364 --shcompact-const-crange emit code-range descriptors for constants in\n\ 3365 SHcompact code sections\n\ 3366 --no-mix disallow SHmedia code in the same section as\n\ 3367 constants and SHcompact code\n\ 3368 --no-expand do not expand MOVI, PT, PTA or PTB instructions\n\ 3369 --expand-pt32 with -abi=64, expand PT, PTA and PTB instructions\n\ 3370 to 32 bits only\n")); 3371 #endif /* HAVE_SH64 */ 3372 #ifdef OBJ_ELF 3373 fprintf (stream, _("\ 3374 --fdpic generate an FDPIC object file\n")); 3375 #endif /* OBJ_ELF */ 3376 } 3377 3378 /* This struct is used to pass arguments to sh_count_relocs through 3379 bfd_map_over_sections. */ 3380 3381 struct sh_count_relocs 3382 { 3383 /* Symbol we are looking for. */ 3384 symbolS *sym; 3385 /* Count of relocs found. */ 3386 int count; 3387 }; 3388 3389 /* Count the number of fixups in a section which refer to a particular 3390 symbol. This is called via bfd_map_over_sections. */ 3391 3392 static void 3393 sh_count_relocs (bfd *abfd ATTRIBUTE_UNUSED, segT sec, void *data) 3394 { 3395 struct sh_count_relocs *info = (struct sh_count_relocs *) data; 3396 segment_info_type *seginfo; 3397 symbolS *sym; 3398 fixS *fix; 3399 3400 seginfo = seg_info (sec); 3401 if (seginfo == NULL) 3402 return; 3403 3404 sym = info->sym; 3405 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3406 { 3407 if (fix->fx_addsy == sym) 3408 { 3409 ++info->count; 3410 fix->fx_tcbit = 1; 3411 } 3412 } 3413 } 3414 3415 /* Handle the count relocs for a particular section. 3416 This is called via bfd_map_over_sections. */ 3417 3418 static void 3419 sh_frob_section (bfd *abfd ATTRIBUTE_UNUSED, segT sec, 3420 void *ignore ATTRIBUTE_UNUSED) 3421 { 3422 segment_info_type *seginfo; 3423 fixS *fix; 3424 3425 seginfo = seg_info (sec); 3426 if (seginfo == NULL) 3427 return; 3428 3429 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3430 { 3431 symbolS *sym; 3432 3433 sym = fix->fx_addsy; 3434 /* Check for a local_symbol. */ 3435 if (sym && sym->bsym == NULL) 3436 { 3437 struct local_symbol *ls = (struct local_symbol *)sym; 3438 /* See if it's been converted. If so, canonicalize. */ 3439 if (local_symbol_converted_p (ls)) 3440 fix->fx_addsy = local_symbol_get_real_symbol (ls); 3441 } 3442 } 3443 3444 for (fix = seginfo->fix_root; fix != NULL; fix = fix->fx_next) 3445 { 3446 symbolS *sym; 3447 bfd_vma val; 3448 fixS *fscan; 3449 struct sh_count_relocs info; 3450 3451 if (fix->fx_r_type != BFD_RELOC_SH_USES) 3452 continue; 3453 3454 /* The BFD_RELOC_SH_USES reloc should refer to a defined local 3455 symbol in the same section. */ 3456 sym = fix->fx_addsy; 3457 if (sym == NULL 3458 || fix->fx_subsy != NULL 3459 || fix->fx_addnumber != 0 3460 || S_GET_SEGMENT (sym) != sec 3461 || S_IS_EXTERNAL (sym)) 3462 { 3463 as_warn_where (fix->fx_file, fix->fx_line, 3464 _(".uses does not refer to a local symbol in the same section")); 3465 continue; 3466 } 3467 3468 /* Look through the fixups again, this time looking for one 3469 at the same location as sym. */ 3470 val = S_GET_VALUE (sym); 3471 for (fscan = seginfo->fix_root; 3472 fscan != NULL; 3473 fscan = fscan->fx_next) 3474 if (val == fscan->fx_frag->fr_address + fscan->fx_where 3475 && fscan->fx_r_type != BFD_RELOC_SH_ALIGN 3476 && fscan->fx_r_type != BFD_RELOC_SH_CODE 3477 && fscan->fx_r_type != BFD_RELOC_SH_DATA 3478 && fscan->fx_r_type != BFD_RELOC_SH_LABEL) 3479 break; 3480 if (fscan == NULL) 3481 { 3482 as_warn_where (fix->fx_file, fix->fx_line, 3483 _("can't find fixup pointed to by .uses")); 3484 continue; 3485 } 3486 3487 if (fscan->fx_tcbit) 3488 { 3489 /* We've already done this one. */ 3490 continue; 3491 } 3492 3493 /* The variable fscan should also be a fixup to a local symbol 3494 in the same section. */ 3495 sym = fscan->fx_addsy; 3496 if (sym == NULL 3497 || fscan->fx_subsy != NULL 3498 || fscan->fx_addnumber != 0 3499 || S_GET_SEGMENT (sym) != sec 3500 || S_IS_EXTERNAL (sym)) 3501 { 3502 as_warn_where (fix->fx_file, fix->fx_line, 3503 _(".uses target does not refer to a local symbol in the same section")); 3504 continue; 3505 } 3506 3507 /* Now we look through all the fixups of all the sections, 3508 counting the number of times we find a reference to sym. */ 3509 info.sym = sym; 3510 info.count = 0; 3511 bfd_map_over_sections (stdoutput, sh_count_relocs, &info); 3512 3513 if (info.count < 1) 3514 abort (); 3515 3516 /* Generate a BFD_RELOC_SH_COUNT fixup at the location of sym. 3517 We have already adjusted the value of sym to include the 3518 fragment address, so we undo that adjustment here. */ 3519 subseg_change (sec, 0); 3520 fix_new (fscan->fx_frag, 3521 S_GET_VALUE (sym) - fscan->fx_frag->fr_address, 3522 4, &abs_symbol, info.count, 0, BFD_RELOC_SH_COUNT); 3523 } 3524 } 3525 3526 /* This function is called after the symbol table has been completed, 3527 but before the relocs or section contents have been written out. 3528 If we have seen any .uses pseudo-ops, they point to an instruction 3529 which loads a register with the address of a function. We look 3530 through the fixups to find where the function address is being 3531 loaded from. We then generate a COUNT reloc giving the number of 3532 times that function address is referred to. The linker uses this 3533 information when doing relaxing, to decide when it can eliminate 3534 the stored function address entirely. */ 3535 3536 void 3537 sh_frob_file (void) 3538 { 3539 #ifdef HAVE_SH64 3540 shmedia_frob_file_before_adjust (); 3541 #endif 3542 3543 if (! sh_relax) 3544 return; 3545 3546 bfd_map_over_sections (stdoutput, sh_frob_section, NULL); 3547 } 3548 3549 /* Called after relaxing. Set the correct sizes of the fragments, and 3550 create relocs so that md_apply_fix will fill in the correct values. */ 3551 3552 void 3553 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT seg, fragS *fragP) 3554 { 3555 int donerelax = 0; 3556 3557 switch (fragP->fr_subtype) 3558 { 3559 case C (COND_JUMP, COND8): 3560 case C (COND_JUMP_DELAY, COND8): 3561 subseg_change (seg, 0); 3562 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3563 1, BFD_RELOC_SH_PCDISP8BY2); 3564 fragP->fr_fix += 2; 3565 fragP->fr_var = 0; 3566 break; 3567 3568 case C (UNCOND_JUMP, UNCOND12): 3569 subseg_change (seg, 0); 3570 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol, fragP->fr_offset, 3571 1, BFD_RELOC_SH_PCDISP12BY2); 3572 fragP->fr_fix += 2; 3573 fragP->fr_var = 0; 3574 break; 3575 3576 case C (UNCOND_JUMP, UNCOND32): 3577 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 3578 if (fragP->fr_symbol == NULL) 3579 as_bad_where (fragP->fr_file, fragP->fr_line, 3580 _("displacement overflows 12-bit field")); 3581 else if (S_IS_DEFINED (fragP->fr_symbol)) 3582 as_bad_where (fragP->fr_file, fragP->fr_line, 3583 _("displacement to defined symbol %s overflows 12-bit field"), 3584 S_GET_NAME (fragP->fr_symbol)); 3585 else 3586 as_bad_where (fragP->fr_file, fragP->fr_line, 3587 _("displacement to undefined symbol %s overflows 12-bit field"), 3588 S_GET_NAME (fragP->fr_symbol)); 3589 /* Stabilize this frag, so we don't trip an assert. */ 3590 fragP->fr_fix += fragP->fr_var; 3591 fragP->fr_var = 0; 3592 break; 3593 3594 case C (COND_JUMP, COND12): 3595 case C (COND_JUMP_DELAY, COND12): 3596 /* A bcond won't fit, so turn it into a b!cond; bra disp; nop. */ 3597 /* I found that a relax failure for gcc.c-torture/execute/930628-1.c 3598 was due to gas incorrectly relaxing an out-of-range conditional 3599 branch with delay slot. It turned: 3600 bf.s L6 (slot mov.l r12,@(44,r0)) 3601 into: 3602 3603 2c: 8f 01 a0 8b bf.s 32 <_main+32> (slot bra L6) 3604 30: 00 09 nop 3605 32: 10 cb mov.l r12,@(44,r0) 3606 Therefore, branches with delay slots have to be handled 3607 differently from ones without delay slots. */ 3608 { 3609 unsigned char *buffer = 3610 (unsigned char *) (fragP->fr_fix + fragP->fr_literal); 3611 int highbyte = target_big_endian ? 0 : 1; 3612 int lowbyte = target_big_endian ? 1 : 0; 3613 int delay = fragP->fr_subtype == C (COND_JUMP_DELAY, COND12); 3614 3615 /* Toggle the true/false bit of the bcond. */ 3616 buffer[highbyte] ^= 0x2; 3617 3618 /* If this is a delayed branch, we may not put the bra in the 3619 slot. So we change it to a non-delayed branch, like that: 3620 b! cond slot_label; bra disp; slot_label: slot_insn 3621 ??? We should try if swapping the conditional branch and 3622 its delay-slot insn already makes the branch reach. */ 3623 3624 /* Build a relocation to six / four bytes farther on. */ 3625 subseg_change (seg, 0); 3626 fix_new (fragP, fragP->fr_fix, 2, section_symbol (seg), 3627 fragP->fr_address + fragP->fr_fix + (delay ? 4 : 6), 3628 1, BFD_RELOC_SH_PCDISP8BY2); 3629 3630 /* Set up a jump instruction. */ 3631 buffer[highbyte + 2] = 0xa0; 3632 buffer[lowbyte + 2] = 0; 3633 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol, 3634 fragP->fr_offset, 1, BFD_RELOC_SH_PCDISP12BY2); 3635 3636 if (delay) 3637 { 3638 buffer[highbyte] &= ~0x4; /* Removes delay slot from branch. */ 3639 fragP->fr_fix += 4; 3640 } 3641 else 3642 { 3643 /* Fill in a NOP instruction. */ 3644 buffer[highbyte + 4] = 0x0; 3645 buffer[lowbyte + 4] = 0x9; 3646 3647 fragP->fr_fix += 6; 3648 } 3649 fragP->fr_var = 0; 3650 donerelax = 1; 3651 } 3652 break; 3653 3654 case C (COND_JUMP, COND32): 3655 case C (COND_JUMP_DELAY, COND32): 3656 case C (COND_JUMP, UNDEF_WORD_DISP): 3657 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 3658 if (fragP->fr_symbol == NULL) 3659 as_bad_where (fragP->fr_file, fragP->fr_line, 3660 _("displacement overflows 8-bit field")); 3661 else if (S_IS_DEFINED (fragP->fr_symbol)) 3662 as_bad_where (fragP->fr_file, fragP->fr_line, 3663 _("displacement to defined symbol %s overflows 8-bit field"), 3664 S_GET_NAME (fragP->fr_symbol)); 3665 else 3666 as_bad_where (fragP->fr_file, fragP->fr_line, 3667 _("displacement to undefined symbol %s overflows 8-bit field "), 3668 S_GET_NAME (fragP->fr_symbol)); 3669 /* Stabilize this frag, so we don't trip an assert. */ 3670 fragP->fr_fix += fragP->fr_var; 3671 fragP->fr_var = 0; 3672 break; 3673 3674 default: 3675 #ifdef HAVE_SH64 3676 shmedia_md_convert_frag (headers, seg, fragP, TRUE); 3677 #else 3678 abort (); 3679 #endif 3680 } 3681 3682 if (donerelax && !sh_relax) 3683 as_warn_where (fragP->fr_file, fragP->fr_line, 3684 _("overflow in branch to %s; converted into longer instruction sequence"), 3685 (fragP->fr_symbol != NULL 3686 ? S_GET_NAME (fragP->fr_symbol) 3687 : "")); 3688 } 3689 3690 valueT 3691 md_section_align (segT seg ATTRIBUTE_UNUSED, valueT size) 3692 { 3693 #ifdef OBJ_ELF 3694 return size; 3695 #else /* ! OBJ_ELF */ 3696 return ((size + (1 << bfd_get_section_alignment (stdoutput, seg)) - 1) 3697 & (-1 << bfd_get_section_alignment (stdoutput, seg))); 3698 #endif /* ! OBJ_ELF */ 3699 } 3700 3701 /* This static variable is set by s_uacons to tell sh_cons_align that 3702 the expression does not need to be aligned. */ 3703 3704 static int sh_no_align_cons = 0; 3705 3706 /* This handles the unaligned space allocation pseudo-ops, such as 3707 .uaword. .uaword is just like .word, but the value does not need 3708 to be aligned. */ 3709 3710 static void 3711 s_uacons (int bytes) 3712 { 3713 /* Tell sh_cons_align not to align this value. */ 3714 sh_no_align_cons = 1; 3715 cons (bytes); 3716 } 3717 3718 /* If a .word, et. al., pseud-op is seen, warn if the value is not 3719 aligned correctly. Note that this can cause warnings to be issued 3720 when assembling initialized structured which were declared with the 3721 packed attribute. FIXME: Perhaps we should require an option to 3722 enable this warning? */ 3723 3724 void 3725 sh_cons_align (int nbytes) 3726 { 3727 int nalign; 3728 3729 if (sh_no_align_cons) 3730 { 3731 /* This is an unaligned pseudo-op. */ 3732 sh_no_align_cons = 0; 3733 return; 3734 } 3735 3736 nalign = 0; 3737 while ((nbytes & 1) == 0) 3738 { 3739 ++nalign; 3740 nbytes >>= 1; 3741 } 3742 3743 if (nalign == 0) 3744 return; 3745 3746 if (now_seg == absolute_section) 3747 { 3748 if ((abs_section_offset & ((1 << nalign) - 1)) != 0) 3749 as_warn (_("misaligned data")); 3750 return; 3751 } 3752 3753 frag_var (rs_align_test, 1, 1, (relax_substateT) 0, 3754 (symbolS *) NULL, (offsetT) nalign, (char *) NULL); 3755 3756 record_alignment (now_seg, nalign); 3757 } 3758 3759 /* When relaxing, we need to output a reloc for any .align directive 3760 that requests alignment to a four byte boundary or larger. This is 3761 also where we check for misaligned data. */ 3762 3763 void 3764 sh_handle_align (fragS *frag) 3765 { 3766 int bytes = frag->fr_next->fr_address - frag->fr_address - frag->fr_fix; 3767 3768 if (frag->fr_type == rs_align_code) 3769 { 3770 static const unsigned char big_nop_pattern[] = { 0x00, 0x09 }; 3771 static const unsigned char little_nop_pattern[] = { 0x09, 0x00 }; 3772 3773 char *p = frag->fr_literal + frag->fr_fix; 3774 3775 if (bytes & 1) 3776 { 3777 *p++ = 0; 3778 bytes--; 3779 frag->fr_fix += 1; 3780 } 3781 3782 if (target_big_endian) 3783 { 3784 memcpy (p, big_nop_pattern, sizeof big_nop_pattern); 3785 frag->fr_var = sizeof big_nop_pattern; 3786 } 3787 else 3788 { 3789 memcpy (p, little_nop_pattern, sizeof little_nop_pattern); 3790 frag->fr_var = sizeof little_nop_pattern; 3791 } 3792 } 3793 else if (frag->fr_type == rs_align_test) 3794 { 3795 if (bytes != 0) 3796 as_bad_where (frag->fr_file, frag->fr_line, _("misaligned data")); 3797 } 3798 3799 if (sh_relax 3800 && (frag->fr_type == rs_align 3801 || frag->fr_type == rs_align_code) 3802 && frag->fr_address + frag->fr_fix > 0 3803 && frag->fr_offset > 1 3804 && now_seg != bss_section) 3805 fix_new (frag, frag->fr_fix, 2, &abs_symbol, frag->fr_offset, 0, 3806 BFD_RELOC_SH_ALIGN); 3807 } 3808 3809 /* See whether the relocation should be resolved locally. */ 3810 3811 static bfd_boolean 3812 sh_local_pcrel (fixS *fix) 3813 { 3814 return (! sh_relax 3815 && (fix->fx_r_type == BFD_RELOC_SH_PCDISP8BY2 3816 || fix->fx_r_type == BFD_RELOC_SH_PCDISP12BY2 3817 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY2 3818 || fix->fx_r_type == BFD_RELOC_SH_PCRELIMM8BY4 3819 || fix->fx_r_type == BFD_RELOC_8_PCREL 3820 || fix->fx_r_type == BFD_RELOC_SH_SWITCH16 3821 || fix->fx_r_type == BFD_RELOC_SH_SWITCH32)); 3822 } 3823 3824 /* See whether we need to force a relocation into the output file. 3825 This is used to force out switch and PC relative relocations when 3826 relaxing. */ 3827 3828 int 3829 sh_force_relocation (fixS *fix) 3830 { 3831 /* These relocations can't make it into a DSO, so no use forcing 3832 them for global symbols. */ 3833 if (sh_local_pcrel (fix)) 3834 return 0; 3835 3836 /* Make sure some relocations get emitted. */ 3837 if (fix->fx_r_type == BFD_RELOC_SH_LOOP_START 3838 || fix->fx_r_type == BFD_RELOC_SH_LOOP_END 3839 || fix->fx_r_type == BFD_RELOC_SH_TLS_GD_32 3840 || fix->fx_r_type == BFD_RELOC_SH_TLS_LD_32 3841 || fix->fx_r_type == BFD_RELOC_SH_TLS_IE_32 3842 || fix->fx_r_type == BFD_RELOC_SH_TLS_LDO_32 3843 || fix->fx_r_type == BFD_RELOC_SH_TLS_LE_32 3844 || generic_force_reloc (fix)) 3845 return 1; 3846 3847 if (! sh_relax) 3848 return 0; 3849 3850 return (fix->fx_pcrel 3851 || SWITCH_TABLE (fix) 3852 || fix->fx_r_type == BFD_RELOC_SH_COUNT 3853 || fix->fx_r_type == BFD_RELOC_SH_ALIGN 3854 || fix->fx_r_type == BFD_RELOC_SH_CODE 3855 || fix->fx_r_type == BFD_RELOC_SH_DATA 3856 #ifdef HAVE_SH64 3857 || fix->fx_r_type == BFD_RELOC_SH_SHMEDIA_CODE 3858 #endif 3859 || fix->fx_r_type == BFD_RELOC_SH_LABEL); 3860 } 3861 3862 #ifdef OBJ_ELF 3863 bfd_boolean 3864 sh_fix_adjustable (fixS *fixP) 3865 { 3866 if (fixP->fx_r_type == BFD_RELOC_32_PLT_PCREL 3867 || fixP->fx_r_type == BFD_RELOC_32_GOT_PCREL 3868 || fixP->fx_r_type == BFD_RELOC_SH_GOT20 3869 || fixP->fx_r_type == BFD_RELOC_SH_GOTPC 3870 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC 3871 || fixP->fx_r_type == BFD_RELOC_SH_GOTFUNCDESC20 3872 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC 3873 || fixP->fx_r_type == BFD_RELOC_SH_GOTOFFFUNCDESC20 3874 || fixP->fx_r_type == BFD_RELOC_SH_FUNCDESC 3875 || ((fixP->fx_r_type == BFD_RELOC_32) && dont_adjust_reloc_32) 3876 || fixP->fx_r_type == BFD_RELOC_RVA) 3877 return 0; 3878 3879 /* We need the symbol name for the VTABLE entries */ 3880 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 3881 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 3882 return 0; 3883 3884 return 1; 3885 } 3886 3887 void 3888 sh_elf_final_processing (void) 3889 { 3890 int val; 3891 3892 /* Set file-specific flags to indicate if this code needs 3893 a processor with the sh-dsp / sh2e ISA to execute. */ 3894 #ifdef HAVE_SH64 3895 /* SH5 and above don't know about the valid_arch arch_sh* bits defined 3896 in sh-opc.h, so check SH64 mode before checking valid_arch. */ 3897 if (sh64_isa_mode != sh64_isa_unspecified) 3898 val = EF_SH5; 3899 else 3900 #elif defined TARGET_SYMBIAN 3901 if (1) 3902 { 3903 extern int sh_symbian_find_elf_flags (unsigned int); 3904 3905 val = sh_symbian_find_elf_flags (valid_arch); 3906 } 3907 else 3908 #endif /* HAVE_SH64 */ 3909 val = sh_find_elf_flags (valid_arch); 3910 3911 elf_elfheader (stdoutput)->e_flags &= ~EF_SH_MACH_MASK; 3912 elf_elfheader (stdoutput)->e_flags |= val; 3913 3914 if (sh_fdpic) 3915 elf_elfheader (stdoutput)->e_flags |= EF_SH_FDPIC; 3916 } 3917 #endif 3918 3919 #ifdef TE_UCLINUX 3920 /* Return the target format for uClinux. */ 3921 3922 const char * 3923 sh_uclinux_target_format (void) 3924 { 3925 if (sh_fdpic) 3926 return (!target_big_endian ? "elf32-sh-fdpic" : "elf32-shbig-fdpic"); 3927 else 3928 return (!target_big_endian ? "elf32-shl" : "elf32-sh"); 3929 } 3930 #endif 3931 3932 /* Apply fixup FIXP to SIZE-byte field BUF given that VAL is its 3933 assembly-time value. If we're generating a reloc for FIXP, 3934 see whether the addend should be stored in-place or whether 3935 it should be in an ELF r_addend field. */ 3936 3937 static void 3938 apply_full_field_fix (fixS *fixP, char *buf, bfd_vma val, int size) 3939 { 3940 reloc_howto_type *howto; 3941 3942 if (fixP->fx_addsy != NULL || fixP->fx_pcrel) 3943 { 3944 howto = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type); 3945 if (howto && !howto->partial_inplace) 3946 { 3947 fixP->fx_addnumber = val; 3948 return; 3949 } 3950 } 3951 md_number_to_chars (buf, val, size); 3952 } 3953 3954 /* Apply a fixup to the object file. */ 3955 3956 void 3957 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED) 3958 { 3959 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal; 3960 int lowbyte = target_big_endian ? 1 : 0; 3961 int highbyte = target_big_endian ? 0 : 1; 3962 long val = (long) *valP; 3963 long max, min; 3964 int shift; 3965 3966 /* A difference between two symbols, the second of which is in the 3967 current section, is transformed in a PC-relative relocation to 3968 the other symbol. We have to adjust the relocation type here. */ 3969 if (fixP->fx_pcrel) 3970 { 3971 switch (fixP->fx_r_type) 3972 { 3973 default: 3974 break; 3975 3976 case BFD_RELOC_32: 3977 fixP->fx_r_type = BFD_RELOC_32_PCREL; 3978 break; 3979 3980 /* Currently, we only support 32-bit PCREL relocations. 3981 We'd need a new reloc type to handle 16_PCREL, and 3982 8_PCREL is already taken for R_SH_SWITCH8, which 3983 apparently does something completely different than what 3984 we need. FIXME. */ 3985 case BFD_RELOC_16: 3986 bfd_set_error (bfd_error_bad_value); 3987 return; 3988 3989 case BFD_RELOC_8: 3990 bfd_set_error (bfd_error_bad_value); 3991 return; 3992 } 3993 } 3994 3995 /* The function adjust_reloc_syms won't convert a reloc against a weak 3996 symbol into a reloc against a section, but bfd_install_relocation 3997 will screw up if the symbol is defined, so we have to adjust val here 3998 to avoid the screw up later. 3999 4000 For ordinary relocs, this does not happen for ELF, since for ELF, 4001 bfd_install_relocation uses the "special function" field of the 4002 howto, and does not execute the code that needs to be undone, as long 4003 as the special function does not return bfd_reloc_continue. 4004 It can happen for GOT- and PLT-type relocs the way they are 4005 described in elf32-sh.c as they use bfd_elf_generic_reloc, but it 4006 doesn't matter here since those relocs don't use VAL; see below. */ 4007 if (OUTPUT_FLAVOR != bfd_target_elf_flavour 4008 && fixP->fx_addsy != NULL 4009 && S_IS_WEAK (fixP->fx_addsy)) 4010 val -= S_GET_VALUE (fixP->fx_addsy); 4011 4012 if (SWITCH_TABLE (fixP)) 4013 val -= S_GET_VALUE (fixP->fx_subsy); 4014 4015 max = min = 0; 4016 shift = 0; 4017 switch (fixP->fx_r_type) 4018 { 4019 case BFD_RELOC_SH_IMM3: 4020 max = 0x7; 4021 * buf = (* buf & 0xf8) | (val & 0x7); 4022 break; 4023 case BFD_RELOC_SH_IMM3U: 4024 max = 0x7; 4025 * buf = (* buf & 0x8f) | ((val & 0x7) << 4); 4026 break; 4027 case BFD_RELOC_SH_DISP12: 4028 max = 0xfff; 4029 buf[lowbyte] = val & 0xff; 4030 buf[highbyte] |= (val >> 8) & 0x0f; 4031 break; 4032 case BFD_RELOC_SH_DISP12BY2: 4033 max = 0xfff; 4034 shift = 1; 4035 buf[lowbyte] = (val >> 1) & 0xff; 4036 buf[highbyte] |= (val >> 9) & 0x0f; 4037 break; 4038 case BFD_RELOC_SH_DISP12BY4: 4039 max = 0xfff; 4040 shift = 2; 4041 buf[lowbyte] = (val >> 2) & 0xff; 4042 buf[highbyte] |= (val >> 10) & 0x0f; 4043 break; 4044 case BFD_RELOC_SH_DISP12BY8: 4045 max = 0xfff; 4046 shift = 3; 4047 buf[lowbyte] = (val >> 3) & 0xff; 4048 buf[highbyte] |= (val >> 11) & 0x0f; 4049 break; 4050 case BFD_RELOC_SH_DISP20: 4051 if (! target_big_endian) 4052 abort(); 4053 max = 0x7ffff; 4054 min = -0x80000; 4055 buf[1] = (buf[1] & 0x0f) | ((val >> 12) & 0xf0); 4056 buf[2] = (val >> 8) & 0xff; 4057 buf[3] = val & 0xff; 4058 break; 4059 case BFD_RELOC_SH_DISP20BY8: 4060 if (!target_big_endian) 4061 abort(); 4062 max = 0x7ffff; 4063 min = -0x80000; 4064 shift = 8; 4065 buf[1] = (buf[1] & 0x0f) | ((val >> 20) & 0xf0); 4066 buf[2] = (val >> 16) & 0xff; 4067 buf[3] = (val >> 8) & 0xff; 4068 break; 4069 4070 case BFD_RELOC_SH_IMM4: 4071 max = 0xf; 4072 *buf = (*buf & 0xf0) | (val & 0xf); 4073 break; 4074 4075 case BFD_RELOC_SH_IMM4BY2: 4076 max = 0xf; 4077 shift = 1; 4078 *buf = (*buf & 0xf0) | ((val >> 1) & 0xf); 4079 break; 4080 4081 case BFD_RELOC_SH_IMM4BY4: 4082 max = 0xf; 4083 shift = 2; 4084 *buf = (*buf & 0xf0) | ((val >> 2) & 0xf); 4085 break; 4086 4087 case BFD_RELOC_SH_IMM8BY2: 4088 max = 0xff; 4089 shift = 1; 4090 *buf = val >> 1; 4091 break; 4092 4093 case BFD_RELOC_SH_IMM8BY4: 4094 max = 0xff; 4095 shift = 2; 4096 *buf = val >> 2; 4097 break; 4098 4099 case BFD_RELOC_8: 4100 case BFD_RELOC_SH_IMM8: 4101 /* Sometimes the 8 bit value is sign extended (e.g., add) and 4102 sometimes it is not (e.g., and). We permit any 8 bit value. 4103 Note that adding further restrictions may invalidate 4104 reasonable looking assembly code, such as ``and -0x1,r0''. */ 4105 max = 0xff; 4106 min = -0xff; 4107 *buf++ = val; 4108 break; 4109 4110 case BFD_RELOC_SH_PCRELIMM8BY4: 4111 /* If we are dealing with a known destination ... */ 4112 if ((fixP->fx_addsy == NULL || S_IS_DEFINED (fixP->fx_addsy)) 4113 && (fixP->fx_subsy == NULL || S_IS_DEFINED (fixP->fx_addsy))) 4114 { 4115 /* Don't silently move the destination due to misalignment. 4116 The absolute address is the fragment base plus the offset into 4117 the fragment plus the pc relative offset to the label. */ 4118 if ((fixP->fx_frag->fr_address + fixP->fx_where + val) & 3) 4119 as_bad_where (fixP->fx_file, fixP->fx_line, 4120 _("offset to unaligned destination")); 4121 4122 /* The displacement cannot be zero or backward even if aligned. 4123 Allow -2 because val has already been adjusted somewhere. */ 4124 if (val < -2) 4125 as_bad_where (fixP->fx_file, fixP->fx_line, _("negative offset")); 4126 } 4127 4128 /* The lower two bits of the PC are cleared before the 4129 displacement is added in. We can assume that the destination 4130 is on a 4 byte boundary. If this instruction is also on a 4 4131 byte boundary, then we want 4132 (target - here) / 4 4133 and target - here is a multiple of 4. 4134 Otherwise, we are on a 2 byte boundary, and we want 4135 (target - (here - 2)) / 4 4136 and target - here is not a multiple of 4. Computing 4137 (target - (here - 2)) / 4 == (target - here + 2) / 4 4138 works for both cases, since in the first case the addition of 4139 2 will be removed by the division. target - here is in the 4140 variable val. */ 4141 val = (val + 2) / 4; 4142 if (val & ~0xff) 4143 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4144 buf[lowbyte] = val; 4145 break; 4146 4147 case BFD_RELOC_SH_PCRELIMM8BY2: 4148 val /= 2; 4149 if (val & ~0xff) 4150 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4151 buf[lowbyte] = val; 4152 break; 4153 4154 case BFD_RELOC_SH_PCDISP8BY2: 4155 val /= 2; 4156 if (val < -0x80 || val > 0x7f) 4157 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4158 buf[lowbyte] = val; 4159 break; 4160 4161 case BFD_RELOC_SH_PCDISP12BY2: 4162 val /= 2; 4163 if (val < -0x800 || val > 0x7ff) 4164 as_bad_where (fixP->fx_file, fixP->fx_line, _("pcrel too far")); 4165 buf[lowbyte] = val & 0xff; 4166 buf[highbyte] |= (val >> 8) & 0xf; 4167 break; 4168 4169 case BFD_RELOC_32: 4170 case BFD_RELOC_32_PCREL: 4171 apply_full_field_fix (fixP, buf, val, 4); 4172 break; 4173 4174 case BFD_RELOC_16: 4175 apply_full_field_fix (fixP, buf, val, 2); 4176 break; 4177 4178 case BFD_RELOC_SH_USES: 4179 /* Pass the value into sh_reloc(). */ 4180 fixP->fx_addnumber = val; 4181 break; 4182 4183 case BFD_RELOC_SH_COUNT: 4184 case BFD_RELOC_SH_ALIGN: 4185 case BFD_RELOC_SH_CODE: 4186 case BFD_RELOC_SH_DATA: 4187 case BFD_RELOC_SH_LABEL: 4188 /* Nothing to do here. */ 4189 break; 4190 4191 case BFD_RELOC_SH_LOOP_START: 4192 case BFD_RELOC_SH_LOOP_END: 4193 4194 case BFD_RELOC_VTABLE_INHERIT: 4195 case BFD_RELOC_VTABLE_ENTRY: 4196 fixP->fx_done = 0; 4197 return; 4198 4199 #ifdef OBJ_ELF 4200 case BFD_RELOC_32_PLT_PCREL: 4201 /* Make the jump instruction point to the address of the operand. At 4202 runtime we merely add the offset to the actual PLT entry. */ 4203 * valP = 0xfffffffc; 4204 val = fixP->fx_offset; 4205 if (fixP->fx_subsy) 4206 val -= S_GET_VALUE (fixP->fx_subsy); 4207 apply_full_field_fix (fixP, buf, val, 4); 4208 break; 4209 4210 case BFD_RELOC_SH_GOTPC: 4211 /* This is tough to explain. We end up with this one if we have 4212 operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". 4213 The goal here is to obtain the absolute address of the GOT, 4214 and it is strongly preferable from a performance point of 4215 view to avoid using a runtime relocation for this. There are 4216 cases where you have something like: 4217 4218 .long _GLOBAL_OFFSET_TABLE_+[.-.L66] 4219 4220 and here no correction would be required. Internally in the 4221 assembler we treat operands of this form as not being pcrel 4222 since the '.' is explicitly mentioned, and I wonder whether 4223 it would simplify matters to do it this way. Who knows. In 4224 earlier versions of the PIC patches, the pcrel_adjust field 4225 was used to store the correction, but since the expression is 4226 not pcrel, I felt it would be confusing to do it this way. */ 4227 * valP -= 1; 4228 apply_full_field_fix (fixP, buf, val, 4); 4229 break; 4230 4231 case BFD_RELOC_SH_TLS_GD_32: 4232 case BFD_RELOC_SH_TLS_LD_32: 4233 case BFD_RELOC_SH_TLS_IE_32: 4234 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4235 /* Fallthrough */ 4236 case BFD_RELOC_32_GOT_PCREL: 4237 case BFD_RELOC_SH_GOT20: 4238 case BFD_RELOC_SH_GOTPLT32: 4239 case BFD_RELOC_SH_GOTFUNCDESC: 4240 case BFD_RELOC_SH_GOTFUNCDESC20: 4241 case BFD_RELOC_SH_GOTOFFFUNCDESC: 4242 case BFD_RELOC_SH_GOTOFFFUNCDESC20: 4243 case BFD_RELOC_SH_FUNCDESC: 4244 * valP = 0; /* Fully resolved at runtime. No addend. */ 4245 apply_full_field_fix (fixP, buf, 0, 4); 4246 break; 4247 4248 case BFD_RELOC_SH_TLS_LDO_32: 4249 case BFD_RELOC_SH_TLS_LE_32: 4250 S_SET_THREAD_LOCAL (fixP->fx_addsy); 4251 /* Fallthrough */ 4252 case BFD_RELOC_32_GOTOFF: 4253 case BFD_RELOC_SH_GOTOFF20: 4254 apply_full_field_fix (fixP, buf, val, 4); 4255 break; 4256 #endif 4257 4258 default: 4259 #ifdef HAVE_SH64 4260 shmedia_md_apply_fix (fixP, valP); 4261 return; 4262 #else 4263 abort (); 4264 #endif 4265 } 4266 4267 if (shift != 0) 4268 { 4269 if ((val & ((1 << shift) - 1)) != 0) 4270 as_bad_where (fixP->fx_file, fixP->fx_line, _("misaligned offset")); 4271 if (val >= 0) 4272 val >>= shift; 4273 else 4274 val = ((val >> shift) 4275 | ((long) -1 & ~ ((long) -1 >> shift))); 4276 } 4277 4278 /* Extend sign for 64-bit host. */ 4279 val = ((val & 0xffffffff) ^ 0x80000000) - 0x80000000; 4280 if (max != 0 && (val < min || val > max)) 4281 as_bad_where (fixP->fx_file, fixP->fx_line, _("offset out of range")); 4282 else if (max != 0) 4283 /* Stop the generic code from trying to overlow check the value as well. 4284 It may not have the correct value anyway, as we do not store val back 4285 into *valP. */ 4286 fixP->fx_no_overflow = 1; 4287 4288 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0) 4289 fixP->fx_done = 1; 4290 } 4291 4292 /* Called just before address relaxation. Return the length 4293 by which a fragment must grow to reach it's destination. */ 4294 4295 int 4296 md_estimate_size_before_relax (fragS *fragP, segT segment_type) 4297 { 4298 int what; 4299 4300 switch (fragP->fr_subtype) 4301 { 4302 default: 4303 #ifdef HAVE_SH64 4304 return shmedia_md_estimate_size_before_relax (fragP, segment_type); 4305 #else 4306 abort (); 4307 #endif 4308 4309 4310 case C (UNCOND_JUMP, UNDEF_DISP): 4311 /* Used to be a branch to somewhere which was unknown. */ 4312 if (!fragP->fr_symbol) 4313 { 4314 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4315 } 4316 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4317 { 4318 fragP->fr_subtype = C (UNCOND_JUMP, UNCOND12); 4319 } 4320 else 4321 { 4322 fragP->fr_subtype = C (UNCOND_JUMP, UNDEF_WORD_DISP); 4323 } 4324 break; 4325 4326 case C (COND_JUMP, UNDEF_DISP): 4327 case C (COND_JUMP_DELAY, UNDEF_DISP): 4328 what = GET_WHAT (fragP->fr_subtype); 4329 /* Used to be a branch to somewhere which was unknown. */ 4330 if (fragP->fr_symbol 4331 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 4332 { 4333 /* Got a symbol and it's defined in this segment, become byte 4334 sized - maybe it will fix up. */ 4335 fragP->fr_subtype = C (what, COND8); 4336 } 4337 else if (fragP->fr_symbol) 4338 { 4339 /* Its got a segment, but its not ours, so it will always be long. */ 4340 fragP->fr_subtype = C (what, UNDEF_WORD_DISP); 4341 } 4342 else 4343 { 4344 /* We know the abs value. */ 4345 fragP->fr_subtype = C (what, COND8); 4346 } 4347 break; 4348 4349 case C (UNCOND_JUMP, UNCOND12): 4350 case C (UNCOND_JUMP, UNCOND32): 4351 case C (UNCOND_JUMP, UNDEF_WORD_DISP): 4352 case C (COND_JUMP, COND8): 4353 case C (COND_JUMP, COND12): 4354 case C (COND_JUMP, COND32): 4355 case C (COND_JUMP, UNDEF_WORD_DISP): 4356 case C (COND_JUMP_DELAY, COND8): 4357 case C (COND_JUMP_DELAY, COND12): 4358 case C (COND_JUMP_DELAY, COND32): 4359 case C (COND_JUMP_DELAY, UNDEF_WORD_DISP): 4360 /* When relaxing a section for the second time, we don't need to 4361 do anything besides return the current size. */ 4362 break; 4363 } 4364 4365 fragP->fr_var = md_relax_table[fragP->fr_subtype].rlx_length; 4366 return fragP->fr_var; 4367 } 4368 4369 /* Put number into target byte order. */ 4370 4371 void 4372 md_number_to_chars (char *ptr, valueT use, int nbytes) 4373 { 4374 #ifdef HAVE_SH64 4375 /* We might need to set the contents type to data. */ 4376 sh64_flag_output (); 4377 #endif 4378 4379 if (! target_big_endian) 4380 number_to_chars_littleendian (ptr, use, nbytes); 4381 else 4382 number_to_chars_bigendian (ptr, use, nbytes); 4383 } 4384 4385 /* This version is used in obj-coff.c eg. for the sh-hms target. */ 4386 4387 long 4388 md_pcrel_from (fixS *fixP) 4389 { 4390 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address + 2; 4391 } 4392 4393 long 4394 md_pcrel_from_section (fixS *fixP, segT sec) 4395 { 4396 if (! sh_local_pcrel (fixP) 4397 && fixP->fx_addsy != (symbolS *) NULL 4398 && (generic_force_reloc (fixP) 4399 || S_GET_SEGMENT (fixP->fx_addsy) != sec)) 4400 { 4401 /* The symbol is undefined (or is defined but not in this section, 4402 or we're not sure about it being the final definition). Let the 4403 linker figure it out. We need to adjust the subtraction of a 4404 symbol to the position of the relocated data, though. */ 4405 return fixP->fx_subsy ? fixP->fx_where + fixP->fx_frag->fr_address : 0; 4406 } 4407 4408 return md_pcrel_from (fixP); 4409 } 4410 4411 /* Create a reloc. */ 4412 4413 arelent * 4414 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp) 4415 { 4416 arelent *rel; 4417 bfd_reloc_code_real_type r_type; 4418 4419 rel = (arelent *) xmalloc (sizeof (arelent)); 4420 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *)); 4421 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 4422 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 4423 4424 r_type = fixp->fx_r_type; 4425 4426 if (SWITCH_TABLE (fixp)) 4427 { 4428 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 4429 rel->addend = 0; 4430 if (r_type == BFD_RELOC_16) 4431 r_type = BFD_RELOC_SH_SWITCH16; 4432 else if (r_type == BFD_RELOC_8) 4433 r_type = BFD_RELOC_8_PCREL; 4434 else if (r_type == BFD_RELOC_32) 4435 r_type = BFD_RELOC_SH_SWITCH32; 4436 else 4437 abort (); 4438 } 4439 else if (r_type == BFD_RELOC_SH_USES) 4440 rel->addend = fixp->fx_addnumber; 4441 else if (r_type == BFD_RELOC_SH_COUNT) 4442 rel->addend = fixp->fx_offset; 4443 else if (r_type == BFD_RELOC_SH_ALIGN) 4444 rel->addend = fixp->fx_offset; 4445 else if (r_type == BFD_RELOC_VTABLE_INHERIT 4446 || r_type == BFD_RELOC_VTABLE_ENTRY) 4447 rel->addend = fixp->fx_offset; 4448 else if (r_type == BFD_RELOC_SH_LOOP_START 4449 || r_type == BFD_RELOC_SH_LOOP_END) 4450 rel->addend = fixp->fx_offset; 4451 else if (r_type == BFD_RELOC_SH_LABEL && fixp->fx_pcrel) 4452 { 4453 rel->addend = 0; 4454 rel->address = rel->addend = fixp->fx_offset; 4455 } 4456 #ifdef HAVE_SH64 4457 else if (shmedia_init_reloc (rel, fixp)) 4458 ; 4459 #endif 4460 else 4461 rel->addend = fixp->fx_addnumber; 4462 4463 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type); 4464 4465 if (rel->howto == NULL) 4466 { 4467 as_bad_where (fixp->fx_file, fixp->fx_line, 4468 _("Cannot represent relocation type %s"), 4469 bfd_get_reloc_code_name (r_type)); 4470 /* Set howto to a garbage value so that we can keep going. */ 4471 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 4472 gas_assert (rel->howto != NULL); 4473 } 4474 #ifdef OBJ_ELF 4475 else if (rel->howto->type == R_SH_IND12W) 4476 rel->addend += fixp->fx_offset - 4; 4477 #endif 4478 4479 return rel; 4480 } 4481 4482 #ifdef OBJ_ELF 4483 inline static char * 4484 sh_end_of_match (char *cont, char *what) 4485 { 4486 int len = strlen (what); 4487 4488 if (strncasecmp (cont, what, strlen (what)) == 0 4489 && ! is_part_of_name (cont[len])) 4490 return cont + len; 4491 4492 return NULL; 4493 } 4494 4495 int 4496 sh_parse_name (char const *name, 4497 expressionS *exprP, 4498 enum expr_mode mode, 4499 char *nextcharP) 4500 { 4501 char *next = input_line_pointer; 4502 char *next_end; 4503 int reloc_type; 4504 segT segment; 4505 4506 exprP->X_op_symbol = NULL; 4507 4508 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0) 4509 { 4510 if (! GOT_symbol) 4511 GOT_symbol = symbol_find_or_make (name); 4512 4513 exprP->X_add_symbol = GOT_symbol; 4514 no_suffix: 4515 /* If we have an absolute symbol or a reg, then we know its 4516 value now. */ 4517 segment = S_GET_SEGMENT (exprP->X_add_symbol); 4518 if (mode != expr_defer && segment == absolute_section) 4519 { 4520 exprP->X_op = O_constant; 4521 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4522 exprP->X_add_symbol = NULL; 4523 } 4524 else if (mode != expr_defer && segment == reg_section) 4525 { 4526 exprP->X_op = O_register; 4527 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol); 4528 exprP->X_add_symbol = NULL; 4529 } 4530 else 4531 { 4532 exprP->X_op = O_symbol; 4533 exprP->X_add_number = 0; 4534 } 4535 4536 return 1; 4537 } 4538 4539 exprP->X_add_symbol = symbol_find_or_make (name); 4540 4541 if (*nextcharP != '@') 4542 goto no_suffix; 4543 else if ((next_end = sh_end_of_match (next + 1, "GOTOFF"))) 4544 reloc_type = BFD_RELOC_32_GOTOFF; 4545 else if ((next_end = sh_end_of_match (next + 1, "GOTPLT"))) 4546 reloc_type = BFD_RELOC_SH_GOTPLT32; 4547 else if ((next_end = sh_end_of_match (next + 1, "GOT"))) 4548 reloc_type = BFD_RELOC_32_GOT_PCREL; 4549 else if ((next_end = sh_end_of_match (next + 1, "PLT"))) 4550 reloc_type = BFD_RELOC_32_PLT_PCREL; 4551 else if ((next_end = sh_end_of_match (next + 1, "TLSGD"))) 4552 reloc_type = BFD_RELOC_SH_TLS_GD_32; 4553 else if ((next_end = sh_end_of_match (next + 1, "TLSLDM"))) 4554 reloc_type = BFD_RELOC_SH_TLS_LD_32; 4555 else if ((next_end = sh_end_of_match (next + 1, "GOTTPOFF"))) 4556 reloc_type = BFD_RELOC_SH_TLS_IE_32; 4557 else if ((next_end = sh_end_of_match (next + 1, "TPOFF"))) 4558 reloc_type = BFD_RELOC_SH_TLS_LE_32; 4559 else if ((next_end = sh_end_of_match (next + 1, "DTPOFF"))) 4560 reloc_type = BFD_RELOC_SH_TLS_LDO_32; 4561 else if ((next_end = sh_end_of_match (next + 1, "PCREL"))) 4562 reloc_type = BFD_RELOC_32_PCREL; 4563 else if ((next_end = sh_end_of_match (next + 1, "GOTFUNCDESC"))) 4564 reloc_type = BFD_RELOC_SH_GOTFUNCDESC; 4565 else if ((next_end = sh_end_of_match (next + 1, "GOTOFFFUNCDESC"))) 4566 reloc_type = BFD_RELOC_SH_GOTOFFFUNCDESC; 4567 else if ((next_end = sh_end_of_match (next + 1, "FUNCDESC"))) 4568 reloc_type = BFD_RELOC_SH_FUNCDESC; 4569 else 4570 goto no_suffix; 4571 4572 *input_line_pointer = *nextcharP; 4573 input_line_pointer = next_end; 4574 *nextcharP = *input_line_pointer; 4575 *input_line_pointer = '\0'; 4576 4577 exprP->X_op = O_PIC_reloc; 4578 exprP->X_add_number = 0; 4579 exprP->X_md = reloc_type; 4580 4581 return 1; 4582 } 4583 4584 void 4585 sh_cfi_frame_initial_instructions (void) 4586 { 4587 cfi_add_CFA_def_cfa (15, 0); 4588 } 4589 4590 int 4591 sh_regname_to_dw2regnum (char *regname) 4592 { 4593 unsigned int regnum = -1; 4594 unsigned int i; 4595 const char *p; 4596 char *q; 4597 static struct { char *name; int dw2regnum; } regnames[] = 4598 { 4599 { "pr", 17 }, { "t", 18 }, { "gbr", 19 }, { "mach", 20 }, 4600 { "macl", 21 }, { "fpul", 23 } 4601 }; 4602 4603 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 4604 if (strcmp (regnames[i].name, regname) == 0) 4605 return regnames[i].dw2regnum; 4606 4607 if (regname[0] == 'r') 4608 { 4609 p = regname + 1; 4610 regnum = strtoul (p, &q, 10); 4611 if (p == q || *q || regnum >= 16) 4612 return -1; 4613 } 4614 else if (regname[0] == 'f' && regname[1] == 'r') 4615 { 4616 p = regname + 2; 4617 regnum = strtoul (p, &q, 10); 4618 if (p == q || *q || regnum >= 16) 4619 return -1; 4620 regnum += 25; 4621 } 4622 else if (regname[0] == 'x' && regname[1] == 'd') 4623 { 4624 p = regname + 2; 4625 regnum = strtoul (p, &q, 10); 4626 if (p == q || *q || regnum >= 8) 4627 return -1; 4628 regnum += 87; 4629 } 4630 return regnum; 4631 } 4632 #endif /* OBJ_ELF */ 4633