1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2020 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dw2gencfi.h" 26 #include "opcode/ppc.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/ppc.h" 30 #include "elf/ppc64.h" 31 #include "dwarf2dbg.h" 32 #endif 33 34 #ifdef TE_PE 35 #include "coff/pe.h" 36 #endif 37 38 #ifdef OBJ_XCOFF 39 #include "coff/xcoff.h" 40 #include "libxcoff.h" 41 #endif 42 43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 44 45 /* Tell the main code what the endianness is. */ 46 extern int target_big_endian; 47 48 /* Whether or not, we've set target_big_endian. */ 49 static int set_target_endian = 0; 50 51 /* Whether to use user friendly register names. */ 52 #ifndef TARGET_REG_NAMES_P 53 #ifdef TE_PE 54 #define TARGET_REG_NAMES_P TRUE 55 #else 56 #define TARGET_REG_NAMES_P FALSE 57 #endif 58 #endif 59 60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 61 HIGHESTA. */ 62 63 /* #lo(value) denotes the least significant 16 bits of the indicated. */ 64 #define PPC_LO(v) ((v) & 0xffff) 65 66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */ 67 #define PPC_HI(v) (((v) >> 16) & 0xffff) 68 69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of 70 the indicated value, compensating for #lo() being treated as a 71 signed number. */ 72 #define PPC_HA(v) PPC_HI ((v) + 0x8000) 73 74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */ 75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 76 77 /* #highera(value) denotes bits 32 through 47 of the indicated value, 78 compensating for #lo() being treated as a signed number. */ 79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 80 81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */ 82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 83 84 /* #highesta(value) denotes bits 48 through 63 of the indicated value, 85 compensating for #lo being treated as a signed number. */ 86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 87 88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000) 89 90 /* For the time being on ppc64, don't report overflow on @h and @ha 91 applied to constants. */ 92 #define REPORT_OVERFLOW_HI 0 93 94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P; 95 96 static void ppc_macro (char *, const struct powerpc_macro *); 97 static void ppc_byte (int); 98 99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 100 static void ppc_tc (int); 101 static void ppc_machine (int); 102 #endif 103 104 #ifdef OBJ_XCOFF 105 static void ppc_comm (int); 106 static void ppc_bb (int); 107 static void ppc_bc (int); 108 static void ppc_bf (int); 109 static void ppc_biei (int); 110 static void ppc_bs (int); 111 static void ppc_eb (int); 112 static void ppc_ec (int); 113 static void ppc_ef (int); 114 static void ppc_es (int); 115 static void ppc_csect (int); 116 static void ppc_dwsect (int); 117 static void ppc_change_csect (symbolS *, offsetT); 118 static void ppc_function (int); 119 static void ppc_extern (int); 120 static void ppc_lglobl (int); 121 static void ppc_ref (int); 122 static void ppc_section (int); 123 static void ppc_named_section (int); 124 static void ppc_stabx (int); 125 static void ppc_rename (int); 126 static void ppc_toc (int); 127 static void ppc_xcoff_cons (int); 128 static void ppc_vbyte (int); 129 #endif 130 131 #ifdef OBJ_ELF 132 static void ppc_elf_rdata (int); 133 static void ppc_elf_lcomm (int); 134 static void ppc_elf_localentry (int); 135 static void ppc_elf_abiversion (int); 136 static void ppc_elf_gnu_attribute (int); 137 #endif 138 139 #ifdef TE_PE 140 static void ppc_previous (int); 141 static void ppc_pdata (int); 142 static void ppc_ydata (int); 143 static void ppc_reldata (int); 144 static void ppc_rdata (int); 145 static void ppc_ualong (int); 146 static void ppc_znop (int); 147 static void ppc_pe_comm (int); 148 static void ppc_pe_section (int); 149 static void ppc_pe_function (int); 150 static void ppc_pe_tocd (int); 151 #endif 152 153 /* Generic assembler global variables which must be defined by all 154 targets. */ 155 156 #ifdef OBJ_ELF 157 /* This string holds the chars that always start a comment. If the 158 pre-processor is disabled, these aren't very useful. The macro 159 tc_comment_chars points to this. We use this, rather than the 160 usual comment_chars, so that we can switch for Solaris conventions. */ 161 static const char ppc_solaris_comment_chars[] = "#!"; 162 static const char ppc_eabi_comment_chars[] = "#"; 163 164 #ifdef TARGET_SOLARIS_COMMENT 165 const char *ppc_comment_chars = ppc_solaris_comment_chars; 166 #else 167 const char *ppc_comment_chars = ppc_eabi_comment_chars; 168 #endif 169 #else 170 const char comment_chars[] = "#"; 171 #endif 172 173 /* Characters which start a comment at the beginning of a line. */ 174 const char line_comment_chars[] = "#"; 175 176 /* Characters which may be used to separate multiple commands on a 177 single line. */ 178 const char line_separator_chars[] = ";"; 179 180 /* Characters which are used to indicate an exponent in a floating 181 point number. */ 182 const char EXP_CHARS[] = "eE"; 183 184 /* Characters which mean that a number is a floating point constant, 185 as in 0d1.0. */ 186 const char FLT_CHARS[] = "dD"; 187 188 /* Anything that can start an operand needs to be mentioned here, 189 to stop the input scrubber eating whitespace. */ 190 const char ppc_symbol_chars[] = "%["; 191 192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 193 int ppc_cie_data_alignment; 194 195 /* The dwarf2 minimum instruction length. */ 196 int ppc_dwarf2_line_min_insn_length; 197 198 /* More than this number of nops in an alignment op gets a branch 199 instead. */ 200 unsigned long nop_limit = 4; 201 202 /* The type of processor we are assembling for. This is one or more 203 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 204 ppc_cpu_t ppc_cpu = 0; 205 ppc_cpu_t sticky = 0; 206 207 /* Value for ELF e_flags EF_PPC64_ABI. */ 208 unsigned int ppc_abiversion = 0; 209 210 #ifdef OBJ_ELF 211 /* Flags set on encountering toc relocs. */ 212 static enum { 213 has_large_toc_reloc = 1, 214 has_small_toc_reloc = 2 215 } toc_reloc_types; 216 #endif 217 218 /* Warn on emitting data to code sections. */ 219 int warn_476; 220 uint64_t last_insn; 221 segT last_seg; 222 subsegT last_subseg; 223 224 /* The target specific pseudo-ops which we support. */ 225 226 const pseudo_typeS md_pseudo_table[] = 227 { 228 /* Pseudo-ops which must be overridden. */ 229 { "byte", ppc_byte, 0 }, 230 231 #ifdef OBJ_XCOFF 232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 233 legitimately belong in the obj-*.c file. However, XCOFF is based 234 on COFF, and is only implemented for the RS/6000. We just use 235 obj-coff.c, and add what we need here. */ 236 { "comm", ppc_comm, 0 }, 237 { "lcomm", ppc_comm, 1 }, 238 { "bb", ppc_bb, 0 }, 239 { "bc", ppc_bc, 0 }, 240 { "bf", ppc_bf, 0 }, 241 { "bi", ppc_biei, 0 }, 242 { "bs", ppc_bs, 0 }, 243 { "csect", ppc_csect, 0 }, 244 { "dwsect", ppc_dwsect, 0 }, 245 { "data", ppc_section, 'd' }, 246 { "eb", ppc_eb, 0 }, 247 { "ec", ppc_ec, 0 }, 248 { "ef", ppc_ef, 0 }, 249 { "ei", ppc_biei, 1 }, 250 { "es", ppc_es, 0 }, 251 { "extern", ppc_extern, 0 }, 252 { "function", ppc_function, 0 }, 253 { "lglobl", ppc_lglobl, 0 }, 254 { "ref", ppc_ref, 0 }, 255 { "rename", ppc_rename, 0 }, 256 { "section", ppc_named_section, 0 }, 257 { "stabx", ppc_stabx, 0 }, 258 { "text", ppc_section, 't' }, 259 { "toc", ppc_toc, 0 }, 260 { "long", ppc_xcoff_cons, 2 }, 261 { "llong", ppc_xcoff_cons, 3 }, 262 { "word", ppc_xcoff_cons, 1 }, 263 { "short", ppc_xcoff_cons, 1 }, 264 { "vbyte", ppc_vbyte, 0 }, 265 #endif 266 267 #ifdef OBJ_ELF 268 { "llong", cons, 8 }, 269 { "rdata", ppc_elf_rdata, 0 }, 270 { "rodata", ppc_elf_rdata, 0 }, 271 { "lcomm", ppc_elf_lcomm, 0 }, 272 { "localentry", ppc_elf_localentry, 0 }, 273 { "abiversion", ppc_elf_abiversion, 0 }, 274 { "gnu_attribute", ppc_elf_gnu_attribute, 0}, 275 #endif 276 277 #ifdef TE_PE 278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 279 { "previous", ppc_previous, 0 }, 280 { "pdata", ppc_pdata, 0 }, 281 { "ydata", ppc_ydata, 0 }, 282 { "reldata", ppc_reldata, 0 }, 283 { "rdata", ppc_rdata, 0 }, 284 { "ualong", ppc_ualong, 0 }, 285 { "znop", ppc_znop, 0 }, 286 { "comm", ppc_pe_comm, 0 }, 287 { "lcomm", ppc_pe_comm, 1 }, 288 { "section", ppc_pe_section, 0 }, 289 { "function", ppc_pe_function,0 }, 290 { "tocd", ppc_pe_tocd, 0 }, 291 #endif 292 293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 294 { "tc", ppc_tc, 0 }, 295 { "machine", ppc_machine, 0 }, 296 #endif 297 298 { NULL, NULL, 0 } 299 }; 300 301 302 /* Predefined register names if -mregnames (or default for Windows NT). 303 In general, there are lots of them, in an attempt to be compatible 304 with a number of other Windows NT assemblers. */ 305 306 /* Structure to hold information about predefined registers. */ 307 struct pd_reg 308 { 309 const char *name; 310 unsigned short value; 311 unsigned short flags; 312 }; 313 314 /* List of registers that are pre-defined: 315 316 Each general register has predefined names of the form: 317 1. r<reg_num> which has the value <reg_num>. 318 2. r.<reg_num> which has the value <reg_num>. 319 320 Each floating point register has predefined names of the form: 321 1. f<reg_num> which has the value <reg_num>. 322 2. f.<reg_num> which has the value <reg_num>. 323 324 Each vector unit register has predefined names of the form: 325 1. v<reg_num> which has the value <reg_num>. 326 2. v.<reg_num> which has the value <reg_num>. 327 328 Each condition register has predefined names of the form: 329 1. cr<reg_num> which has the value <reg_num>. 330 2. cr.<reg_num> which has the value <reg_num>. 331 332 There are individual registers as well: 333 sp or r.sp has the value 1 334 rtoc or r.toc has the value 2 335 xer has the value 1 336 lr has the value 8 337 ctr has the value 9 338 dar has the value 19 339 dsisr has the value 18 340 dec has the value 22 341 sdr1 has the value 25 342 srr0 has the value 26 343 srr1 has the value 27 344 345 The table is sorted. Suitable for searching by a binary search. */ 346 347 static const struct pd_reg pre_defined_registers[] = 348 { 349 /* Condition Registers */ 350 { "cr.0", 0, PPC_OPERAND_CR_REG }, 351 { "cr.1", 1, PPC_OPERAND_CR_REG }, 352 { "cr.2", 2, PPC_OPERAND_CR_REG }, 353 { "cr.3", 3, PPC_OPERAND_CR_REG }, 354 { "cr.4", 4, PPC_OPERAND_CR_REG }, 355 { "cr.5", 5, PPC_OPERAND_CR_REG }, 356 { "cr.6", 6, PPC_OPERAND_CR_REG }, 357 { "cr.7", 7, PPC_OPERAND_CR_REG }, 358 359 { "cr0", 0, PPC_OPERAND_CR_REG }, 360 { "cr1", 1, PPC_OPERAND_CR_REG }, 361 { "cr2", 2, PPC_OPERAND_CR_REG }, 362 { "cr3", 3, PPC_OPERAND_CR_REG }, 363 { "cr4", 4, PPC_OPERAND_CR_REG }, 364 { "cr5", 5, PPC_OPERAND_CR_REG }, 365 { "cr6", 6, PPC_OPERAND_CR_REG }, 366 { "cr7", 7, PPC_OPERAND_CR_REG }, 367 368 { "ctr", 9, PPC_OPERAND_SPR }, 369 { "dar", 19, PPC_OPERAND_SPR }, 370 { "dec", 22, PPC_OPERAND_SPR }, 371 { "dsisr", 18, PPC_OPERAND_SPR }, 372 373 /* Floating point registers */ 374 { "f.0", 0, PPC_OPERAND_FPR }, 375 { "f.1", 1, PPC_OPERAND_FPR }, 376 { "f.10", 10, PPC_OPERAND_FPR }, 377 { "f.11", 11, PPC_OPERAND_FPR }, 378 { "f.12", 12, PPC_OPERAND_FPR }, 379 { "f.13", 13, PPC_OPERAND_FPR }, 380 { "f.14", 14, PPC_OPERAND_FPR }, 381 { "f.15", 15, PPC_OPERAND_FPR }, 382 { "f.16", 16, PPC_OPERAND_FPR }, 383 { "f.17", 17, PPC_OPERAND_FPR }, 384 { "f.18", 18, PPC_OPERAND_FPR }, 385 { "f.19", 19, PPC_OPERAND_FPR }, 386 { "f.2", 2, PPC_OPERAND_FPR }, 387 { "f.20", 20, PPC_OPERAND_FPR }, 388 { "f.21", 21, PPC_OPERAND_FPR }, 389 { "f.22", 22, PPC_OPERAND_FPR }, 390 { "f.23", 23, PPC_OPERAND_FPR }, 391 { "f.24", 24, PPC_OPERAND_FPR }, 392 { "f.25", 25, PPC_OPERAND_FPR }, 393 { "f.26", 26, PPC_OPERAND_FPR }, 394 { "f.27", 27, PPC_OPERAND_FPR }, 395 { "f.28", 28, PPC_OPERAND_FPR }, 396 { "f.29", 29, PPC_OPERAND_FPR }, 397 { "f.3", 3, PPC_OPERAND_FPR }, 398 { "f.30", 30, PPC_OPERAND_FPR }, 399 { "f.31", 31, PPC_OPERAND_FPR }, 400 { "f.32", 32, PPC_OPERAND_VSR }, 401 { "f.33", 33, PPC_OPERAND_VSR }, 402 { "f.34", 34, PPC_OPERAND_VSR }, 403 { "f.35", 35, PPC_OPERAND_VSR }, 404 { "f.36", 36, PPC_OPERAND_VSR }, 405 { "f.37", 37, PPC_OPERAND_VSR }, 406 { "f.38", 38, PPC_OPERAND_VSR }, 407 { "f.39", 39, PPC_OPERAND_VSR }, 408 { "f.4", 4, PPC_OPERAND_FPR }, 409 { "f.40", 40, PPC_OPERAND_VSR }, 410 { "f.41", 41, PPC_OPERAND_VSR }, 411 { "f.42", 42, PPC_OPERAND_VSR }, 412 { "f.43", 43, PPC_OPERAND_VSR }, 413 { "f.44", 44, PPC_OPERAND_VSR }, 414 { "f.45", 45, PPC_OPERAND_VSR }, 415 { "f.46", 46, PPC_OPERAND_VSR }, 416 { "f.47", 47, PPC_OPERAND_VSR }, 417 { "f.48", 48, PPC_OPERAND_VSR }, 418 { "f.49", 49, PPC_OPERAND_VSR }, 419 { "f.5", 5, PPC_OPERAND_FPR }, 420 { "f.50", 50, PPC_OPERAND_VSR }, 421 { "f.51", 51, PPC_OPERAND_VSR }, 422 { "f.52", 52, PPC_OPERAND_VSR }, 423 { "f.53", 53, PPC_OPERAND_VSR }, 424 { "f.54", 54, PPC_OPERAND_VSR }, 425 { "f.55", 55, PPC_OPERAND_VSR }, 426 { "f.56", 56, PPC_OPERAND_VSR }, 427 { "f.57", 57, PPC_OPERAND_VSR }, 428 { "f.58", 58, PPC_OPERAND_VSR }, 429 { "f.59", 59, PPC_OPERAND_VSR }, 430 { "f.6", 6, PPC_OPERAND_FPR }, 431 { "f.60", 60, PPC_OPERAND_VSR }, 432 { "f.61", 61, PPC_OPERAND_VSR }, 433 { "f.62", 62, PPC_OPERAND_VSR }, 434 { "f.63", 63, PPC_OPERAND_VSR }, 435 { "f.7", 7, PPC_OPERAND_FPR }, 436 { "f.8", 8, PPC_OPERAND_FPR }, 437 { "f.9", 9, PPC_OPERAND_FPR }, 438 439 { "f0", 0, PPC_OPERAND_FPR }, 440 { "f1", 1, PPC_OPERAND_FPR }, 441 { "f10", 10, PPC_OPERAND_FPR }, 442 { "f11", 11, PPC_OPERAND_FPR }, 443 { "f12", 12, PPC_OPERAND_FPR }, 444 { "f13", 13, PPC_OPERAND_FPR }, 445 { "f14", 14, PPC_OPERAND_FPR }, 446 { "f15", 15, PPC_OPERAND_FPR }, 447 { "f16", 16, PPC_OPERAND_FPR }, 448 { "f17", 17, PPC_OPERAND_FPR }, 449 { "f18", 18, PPC_OPERAND_FPR }, 450 { "f19", 19, PPC_OPERAND_FPR }, 451 { "f2", 2, PPC_OPERAND_FPR }, 452 { "f20", 20, PPC_OPERAND_FPR }, 453 { "f21", 21, PPC_OPERAND_FPR }, 454 { "f22", 22, PPC_OPERAND_FPR }, 455 { "f23", 23, PPC_OPERAND_FPR }, 456 { "f24", 24, PPC_OPERAND_FPR }, 457 { "f25", 25, PPC_OPERAND_FPR }, 458 { "f26", 26, PPC_OPERAND_FPR }, 459 { "f27", 27, PPC_OPERAND_FPR }, 460 { "f28", 28, PPC_OPERAND_FPR }, 461 { "f29", 29, PPC_OPERAND_FPR }, 462 { "f3", 3, PPC_OPERAND_FPR }, 463 { "f30", 30, PPC_OPERAND_FPR }, 464 { "f31", 31, PPC_OPERAND_FPR }, 465 { "f32", 32, PPC_OPERAND_VSR }, 466 { "f33", 33, PPC_OPERAND_VSR }, 467 { "f34", 34, PPC_OPERAND_VSR }, 468 { "f35", 35, PPC_OPERAND_VSR }, 469 { "f36", 36, PPC_OPERAND_VSR }, 470 { "f37", 37, PPC_OPERAND_VSR }, 471 { "f38", 38, PPC_OPERAND_VSR }, 472 { "f39", 39, PPC_OPERAND_VSR }, 473 { "f4", 4, PPC_OPERAND_FPR }, 474 { "f40", 40, PPC_OPERAND_VSR }, 475 { "f41", 41, PPC_OPERAND_VSR }, 476 { "f42", 42, PPC_OPERAND_VSR }, 477 { "f43", 43, PPC_OPERAND_VSR }, 478 { "f44", 44, PPC_OPERAND_VSR }, 479 { "f45", 45, PPC_OPERAND_VSR }, 480 { "f46", 46, PPC_OPERAND_VSR }, 481 { "f47", 47, PPC_OPERAND_VSR }, 482 { "f48", 48, PPC_OPERAND_VSR }, 483 { "f49", 49, PPC_OPERAND_VSR }, 484 { "f5", 5, PPC_OPERAND_FPR }, 485 { "f50", 50, PPC_OPERAND_VSR }, 486 { "f51", 51, PPC_OPERAND_VSR }, 487 { "f52", 52, PPC_OPERAND_VSR }, 488 { "f53", 53, PPC_OPERAND_VSR }, 489 { "f54", 54, PPC_OPERAND_VSR }, 490 { "f55", 55, PPC_OPERAND_VSR }, 491 { "f56", 56, PPC_OPERAND_VSR }, 492 { "f57", 57, PPC_OPERAND_VSR }, 493 { "f58", 58, PPC_OPERAND_VSR }, 494 { "f59", 59, PPC_OPERAND_VSR }, 495 { "f6", 6, PPC_OPERAND_FPR }, 496 { "f60", 60, PPC_OPERAND_VSR }, 497 { "f61", 61, PPC_OPERAND_VSR }, 498 { "f62", 62, PPC_OPERAND_VSR }, 499 { "f63", 63, PPC_OPERAND_VSR }, 500 { "f7", 7, PPC_OPERAND_FPR }, 501 { "f8", 8, PPC_OPERAND_FPR }, 502 { "f9", 9, PPC_OPERAND_FPR }, 503 504 /* Quantization registers used with pair single instructions. */ 505 { "gqr.0", 0, PPC_OPERAND_GQR }, 506 { "gqr.1", 1, PPC_OPERAND_GQR }, 507 { "gqr.2", 2, PPC_OPERAND_GQR }, 508 { "gqr.3", 3, PPC_OPERAND_GQR }, 509 { "gqr.4", 4, PPC_OPERAND_GQR }, 510 { "gqr.5", 5, PPC_OPERAND_GQR }, 511 { "gqr.6", 6, PPC_OPERAND_GQR }, 512 { "gqr.7", 7, PPC_OPERAND_GQR }, 513 { "gqr0", 0, PPC_OPERAND_GQR }, 514 { "gqr1", 1, PPC_OPERAND_GQR }, 515 { "gqr2", 2, PPC_OPERAND_GQR }, 516 { "gqr3", 3, PPC_OPERAND_GQR }, 517 { "gqr4", 4, PPC_OPERAND_GQR }, 518 { "gqr5", 5, PPC_OPERAND_GQR }, 519 { "gqr6", 6, PPC_OPERAND_GQR }, 520 { "gqr7", 7, PPC_OPERAND_GQR }, 521 522 { "lr", 8, PPC_OPERAND_SPR }, 523 524 /* General Purpose Registers */ 525 { "r.0", 0, PPC_OPERAND_GPR }, 526 { "r.1", 1, PPC_OPERAND_GPR }, 527 { "r.10", 10, PPC_OPERAND_GPR }, 528 { "r.11", 11, PPC_OPERAND_GPR }, 529 { "r.12", 12, PPC_OPERAND_GPR }, 530 { "r.13", 13, PPC_OPERAND_GPR }, 531 { "r.14", 14, PPC_OPERAND_GPR }, 532 { "r.15", 15, PPC_OPERAND_GPR }, 533 { "r.16", 16, PPC_OPERAND_GPR }, 534 { "r.17", 17, PPC_OPERAND_GPR }, 535 { "r.18", 18, PPC_OPERAND_GPR }, 536 { "r.19", 19, PPC_OPERAND_GPR }, 537 { "r.2", 2, PPC_OPERAND_GPR }, 538 { "r.20", 20, PPC_OPERAND_GPR }, 539 { "r.21", 21, PPC_OPERAND_GPR }, 540 { "r.22", 22, PPC_OPERAND_GPR }, 541 { "r.23", 23, PPC_OPERAND_GPR }, 542 { "r.24", 24, PPC_OPERAND_GPR }, 543 { "r.25", 25, PPC_OPERAND_GPR }, 544 { "r.26", 26, PPC_OPERAND_GPR }, 545 { "r.27", 27, PPC_OPERAND_GPR }, 546 { "r.28", 28, PPC_OPERAND_GPR }, 547 { "r.29", 29, PPC_OPERAND_GPR }, 548 { "r.3", 3, PPC_OPERAND_GPR }, 549 { "r.30", 30, PPC_OPERAND_GPR }, 550 { "r.31", 31, PPC_OPERAND_GPR }, 551 { "r.4", 4, PPC_OPERAND_GPR }, 552 { "r.5", 5, PPC_OPERAND_GPR }, 553 { "r.6", 6, PPC_OPERAND_GPR }, 554 { "r.7", 7, PPC_OPERAND_GPR }, 555 { "r.8", 8, PPC_OPERAND_GPR }, 556 { "r.9", 9, PPC_OPERAND_GPR }, 557 558 { "r.sp", 1, PPC_OPERAND_GPR }, 559 560 { "r.toc", 2, PPC_OPERAND_GPR }, 561 562 { "r0", 0, PPC_OPERAND_GPR }, 563 { "r1", 1, PPC_OPERAND_GPR }, 564 { "r10", 10, PPC_OPERAND_GPR }, 565 { "r11", 11, PPC_OPERAND_GPR }, 566 { "r12", 12, PPC_OPERAND_GPR }, 567 { "r13", 13, PPC_OPERAND_GPR }, 568 { "r14", 14, PPC_OPERAND_GPR }, 569 { "r15", 15, PPC_OPERAND_GPR }, 570 { "r16", 16, PPC_OPERAND_GPR }, 571 { "r17", 17, PPC_OPERAND_GPR }, 572 { "r18", 18, PPC_OPERAND_GPR }, 573 { "r19", 19, PPC_OPERAND_GPR }, 574 { "r2", 2, PPC_OPERAND_GPR }, 575 { "r20", 20, PPC_OPERAND_GPR }, 576 { "r21", 21, PPC_OPERAND_GPR }, 577 { "r22", 22, PPC_OPERAND_GPR }, 578 { "r23", 23, PPC_OPERAND_GPR }, 579 { "r24", 24, PPC_OPERAND_GPR }, 580 { "r25", 25, PPC_OPERAND_GPR }, 581 { "r26", 26, PPC_OPERAND_GPR }, 582 { "r27", 27, PPC_OPERAND_GPR }, 583 { "r28", 28, PPC_OPERAND_GPR }, 584 { "r29", 29, PPC_OPERAND_GPR }, 585 { "r3", 3, PPC_OPERAND_GPR }, 586 { "r30", 30, PPC_OPERAND_GPR }, 587 { "r31", 31, PPC_OPERAND_GPR }, 588 { "r4", 4, PPC_OPERAND_GPR }, 589 { "r5", 5, PPC_OPERAND_GPR }, 590 { "r6", 6, PPC_OPERAND_GPR }, 591 { "r7", 7, PPC_OPERAND_GPR }, 592 { "r8", 8, PPC_OPERAND_GPR }, 593 { "r9", 9, PPC_OPERAND_GPR }, 594 595 { "rtoc", 2, PPC_OPERAND_GPR }, 596 597 { "sdr1", 25, PPC_OPERAND_SPR }, 598 599 { "sp", 1, PPC_OPERAND_GPR }, 600 601 { "srr0", 26, PPC_OPERAND_SPR }, 602 { "srr1", 27, PPC_OPERAND_SPR }, 603 604 /* Vector (Altivec/VMX) registers */ 605 { "v.0", 0, PPC_OPERAND_VR }, 606 { "v.1", 1, PPC_OPERAND_VR }, 607 { "v.10", 10, PPC_OPERAND_VR }, 608 { "v.11", 11, PPC_OPERAND_VR }, 609 { "v.12", 12, PPC_OPERAND_VR }, 610 { "v.13", 13, PPC_OPERAND_VR }, 611 { "v.14", 14, PPC_OPERAND_VR }, 612 { "v.15", 15, PPC_OPERAND_VR }, 613 { "v.16", 16, PPC_OPERAND_VR }, 614 { "v.17", 17, PPC_OPERAND_VR }, 615 { "v.18", 18, PPC_OPERAND_VR }, 616 { "v.19", 19, PPC_OPERAND_VR }, 617 { "v.2", 2, PPC_OPERAND_VR }, 618 { "v.20", 20, PPC_OPERAND_VR }, 619 { "v.21", 21, PPC_OPERAND_VR }, 620 { "v.22", 22, PPC_OPERAND_VR }, 621 { "v.23", 23, PPC_OPERAND_VR }, 622 { "v.24", 24, PPC_OPERAND_VR }, 623 { "v.25", 25, PPC_OPERAND_VR }, 624 { "v.26", 26, PPC_OPERAND_VR }, 625 { "v.27", 27, PPC_OPERAND_VR }, 626 { "v.28", 28, PPC_OPERAND_VR }, 627 { "v.29", 29, PPC_OPERAND_VR }, 628 { "v.3", 3, PPC_OPERAND_VR }, 629 { "v.30", 30, PPC_OPERAND_VR }, 630 { "v.31", 31, PPC_OPERAND_VR }, 631 { "v.4", 4, PPC_OPERAND_VR }, 632 { "v.5", 5, PPC_OPERAND_VR }, 633 { "v.6", 6, PPC_OPERAND_VR }, 634 { "v.7", 7, PPC_OPERAND_VR }, 635 { "v.8", 8, PPC_OPERAND_VR }, 636 { "v.9", 9, PPC_OPERAND_VR }, 637 638 { "v0", 0, PPC_OPERAND_VR }, 639 { "v1", 1, PPC_OPERAND_VR }, 640 { "v10", 10, PPC_OPERAND_VR }, 641 { "v11", 11, PPC_OPERAND_VR }, 642 { "v12", 12, PPC_OPERAND_VR }, 643 { "v13", 13, PPC_OPERAND_VR }, 644 { "v14", 14, PPC_OPERAND_VR }, 645 { "v15", 15, PPC_OPERAND_VR }, 646 { "v16", 16, PPC_OPERAND_VR }, 647 { "v17", 17, PPC_OPERAND_VR }, 648 { "v18", 18, PPC_OPERAND_VR }, 649 { "v19", 19, PPC_OPERAND_VR }, 650 { "v2", 2, PPC_OPERAND_VR }, 651 { "v20", 20, PPC_OPERAND_VR }, 652 { "v21", 21, PPC_OPERAND_VR }, 653 { "v22", 22, PPC_OPERAND_VR }, 654 { "v23", 23, PPC_OPERAND_VR }, 655 { "v24", 24, PPC_OPERAND_VR }, 656 { "v25", 25, PPC_OPERAND_VR }, 657 { "v26", 26, PPC_OPERAND_VR }, 658 { "v27", 27, PPC_OPERAND_VR }, 659 { "v28", 28, PPC_OPERAND_VR }, 660 { "v29", 29, PPC_OPERAND_VR }, 661 { "v3", 3, PPC_OPERAND_VR }, 662 { "v30", 30, PPC_OPERAND_VR }, 663 { "v31", 31, PPC_OPERAND_VR }, 664 { "v4", 4, PPC_OPERAND_VR }, 665 { "v5", 5, PPC_OPERAND_VR }, 666 { "v6", 6, PPC_OPERAND_VR }, 667 { "v7", 7, PPC_OPERAND_VR }, 668 { "v8", 8, PPC_OPERAND_VR }, 669 { "v9", 9, PPC_OPERAND_VR }, 670 671 /* Vector Scalar (VSX) registers (ISA 2.06). */ 672 { "vs.0", 0, PPC_OPERAND_VSR }, 673 { "vs.1", 1, PPC_OPERAND_VSR }, 674 { "vs.10", 10, PPC_OPERAND_VSR }, 675 { "vs.11", 11, PPC_OPERAND_VSR }, 676 { "vs.12", 12, PPC_OPERAND_VSR }, 677 { "vs.13", 13, PPC_OPERAND_VSR }, 678 { "vs.14", 14, PPC_OPERAND_VSR }, 679 { "vs.15", 15, PPC_OPERAND_VSR }, 680 { "vs.16", 16, PPC_OPERAND_VSR }, 681 { "vs.17", 17, PPC_OPERAND_VSR }, 682 { "vs.18", 18, PPC_OPERAND_VSR }, 683 { "vs.19", 19, PPC_OPERAND_VSR }, 684 { "vs.2", 2, PPC_OPERAND_VSR }, 685 { "vs.20", 20, PPC_OPERAND_VSR }, 686 { "vs.21", 21, PPC_OPERAND_VSR }, 687 { "vs.22", 22, PPC_OPERAND_VSR }, 688 { "vs.23", 23, PPC_OPERAND_VSR }, 689 { "vs.24", 24, PPC_OPERAND_VSR }, 690 { "vs.25", 25, PPC_OPERAND_VSR }, 691 { "vs.26", 26, PPC_OPERAND_VSR }, 692 { "vs.27", 27, PPC_OPERAND_VSR }, 693 { "vs.28", 28, PPC_OPERAND_VSR }, 694 { "vs.29", 29, PPC_OPERAND_VSR }, 695 { "vs.3", 3, PPC_OPERAND_VSR }, 696 { "vs.30", 30, PPC_OPERAND_VSR }, 697 { "vs.31", 31, PPC_OPERAND_VSR }, 698 { "vs.32", 32, PPC_OPERAND_VSR }, 699 { "vs.33", 33, PPC_OPERAND_VSR }, 700 { "vs.34", 34, PPC_OPERAND_VSR }, 701 { "vs.35", 35, PPC_OPERAND_VSR }, 702 { "vs.36", 36, PPC_OPERAND_VSR }, 703 { "vs.37", 37, PPC_OPERAND_VSR }, 704 { "vs.38", 38, PPC_OPERAND_VSR }, 705 { "vs.39", 39, PPC_OPERAND_VSR }, 706 { "vs.4", 4, PPC_OPERAND_VSR }, 707 { "vs.40", 40, PPC_OPERAND_VSR }, 708 { "vs.41", 41, PPC_OPERAND_VSR }, 709 { "vs.42", 42, PPC_OPERAND_VSR }, 710 { "vs.43", 43, PPC_OPERAND_VSR }, 711 { "vs.44", 44, PPC_OPERAND_VSR }, 712 { "vs.45", 45, PPC_OPERAND_VSR }, 713 { "vs.46", 46, PPC_OPERAND_VSR }, 714 { "vs.47", 47, PPC_OPERAND_VSR }, 715 { "vs.48", 48, PPC_OPERAND_VSR }, 716 { "vs.49", 49, PPC_OPERAND_VSR }, 717 { "vs.5", 5, PPC_OPERAND_VSR }, 718 { "vs.50", 50, PPC_OPERAND_VSR }, 719 { "vs.51", 51, PPC_OPERAND_VSR }, 720 { "vs.52", 52, PPC_OPERAND_VSR }, 721 { "vs.53", 53, PPC_OPERAND_VSR }, 722 { "vs.54", 54, PPC_OPERAND_VSR }, 723 { "vs.55", 55, PPC_OPERAND_VSR }, 724 { "vs.56", 56, PPC_OPERAND_VSR }, 725 { "vs.57", 57, PPC_OPERAND_VSR }, 726 { "vs.58", 58, PPC_OPERAND_VSR }, 727 { "vs.59", 59, PPC_OPERAND_VSR }, 728 { "vs.6", 6, PPC_OPERAND_VSR }, 729 { "vs.60", 60, PPC_OPERAND_VSR }, 730 { "vs.61", 61, PPC_OPERAND_VSR }, 731 { "vs.62", 62, PPC_OPERAND_VSR }, 732 { "vs.63", 63, PPC_OPERAND_VSR }, 733 { "vs.7", 7, PPC_OPERAND_VSR }, 734 { "vs.8", 8, PPC_OPERAND_VSR }, 735 { "vs.9", 9, PPC_OPERAND_VSR }, 736 737 { "vs0", 0, PPC_OPERAND_VSR }, 738 { "vs1", 1, PPC_OPERAND_VSR }, 739 { "vs10", 10, PPC_OPERAND_VSR }, 740 { "vs11", 11, PPC_OPERAND_VSR }, 741 { "vs12", 12, PPC_OPERAND_VSR }, 742 { "vs13", 13, PPC_OPERAND_VSR }, 743 { "vs14", 14, PPC_OPERAND_VSR }, 744 { "vs15", 15, PPC_OPERAND_VSR }, 745 { "vs16", 16, PPC_OPERAND_VSR }, 746 { "vs17", 17, PPC_OPERAND_VSR }, 747 { "vs18", 18, PPC_OPERAND_VSR }, 748 { "vs19", 19, PPC_OPERAND_VSR }, 749 { "vs2", 2, PPC_OPERAND_VSR }, 750 { "vs20", 20, PPC_OPERAND_VSR }, 751 { "vs21", 21, PPC_OPERAND_VSR }, 752 { "vs22", 22, PPC_OPERAND_VSR }, 753 { "vs23", 23, PPC_OPERAND_VSR }, 754 { "vs24", 24, PPC_OPERAND_VSR }, 755 { "vs25", 25, PPC_OPERAND_VSR }, 756 { "vs26", 26, PPC_OPERAND_VSR }, 757 { "vs27", 27, PPC_OPERAND_VSR }, 758 { "vs28", 28, PPC_OPERAND_VSR }, 759 { "vs29", 29, PPC_OPERAND_VSR }, 760 { "vs3", 3, PPC_OPERAND_VSR }, 761 { "vs30", 30, PPC_OPERAND_VSR }, 762 { "vs31", 31, PPC_OPERAND_VSR }, 763 { "vs32", 32, PPC_OPERAND_VSR }, 764 { "vs33", 33, PPC_OPERAND_VSR }, 765 { "vs34", 34, PPC_OPERAND_VSR }, 766 { "vs35", 35, PPC_OPERAND_VSR }, 767 { "vs36", 36, PPC_OPERAND_VSR }, 768 { "vs37", 37, PPC_OPERAND_VSR }, 769 { "vs38", 38, PPC_OPERAND_VSR }, 770 { "vs39", 39, PPC_OPERAND_VSR }, 771 { "vs4", 4, PPC_OPERAND_VSR }, 772 { "vs40", 40, PPC_OPERAND_VSR }, 773 { "vs41", 41, PPC_OPERAND_VSR }, 774 { "vs42", 42, PPC_OPERAND_VSR }, 775 { "vs43", 43, PPC_OPERAND_VSR }, 776 { "vs44", 44, PPC_OPERAND_VSR }, 777 { "vs45", 45, PPC_OPERAND_VSR }, 778 { "vs46", 46, PPC_OPERAND_VSR }, 779 { "vs47", 47, PPC_OPERAND_VSR }, 780 { "vs48", 48, PPC_OPERAND_VSR }, 781 { "vs49", 49, PPC_OPERAND_VSR }, 782 { "vs5", 5, PPC_OPERAND_VSR }, 783 { "vs50", 50, PPC_OPERAND_VSR }, 784 { "vs51", 51, PPC_OPERAND_VSR }, 785 { "vs52", 52, PPC_OPERAND_VSR }, 786 { "vs53", 53, PPC_OPERAND_VSR }, 787 { "vs54", 54, PPC_OPERAND_VSR }, 788 { "vs55", 55, PPC_OPERAND_VSR }, 789 { "vs56", 56, PPC_OPERAND_VSR }, 790 { "vs57", 57, PPC_OPERAND_VSR }, 791 { "vs58", 58, PPC_OPERAND_VSR }, 792 { "vs59", 59, PPC_OPERAND_VSR }, 793 { "vs6", 6, PPC_OPERAND_VSR }, 794 { "vs60", 60, PPC_OPERAND_VSR }, 795 { "vs61", 61, PPC_OPERAND_VSR }, 796 { "vs62", 62, PPC_OPERAND_VSR }, 797 { "vs63", 63, PPC_OPERAND_VSR }, 798 { "vs7", 7, PPC_OPERAND_VSR }, 799 { "vs8", 8, PPC_OPERAND_VSR }, 800 { "vs9", 9, PPC_OPERAND_VSR }, 801 802 { "xer", 1, PPC_OPERAND_SPR } 803 }; 804 805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 806 807 /* Given NAME, find the register number associated with that name, return 808 the integer value associated with the given name or -1 on failure. */ 809 810 static const struct pd_reg * 811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 812 { 813 int middle, low, high; 814 int cmp; 815 816 low = 0; 817 high = regcount - 1; 818 819 do 820 { 821 middle = (low + high) / 2; 822 cmp = strcasecmp (name, regs[middle].name); 823 if (cmp < 0) 824 high = middle - 1; 825 else if (cmp > 0) 826 low = middle + 1; 827 else 828 return ®s[middle]; 829 } 830 while (low <= high); 831 832 return NULL; 833 } 834 835 /* 836 * Summary of register_name. 837 * 838 * in: Input_line_pointer points to 1st char of operand. 839 * 840 * out: A expressionS. 841 * The operand may have been a register: in this case, X_op == O_register, 842 * X_add_number is set to the register number, and truth is returned. 843 * Input_line_pointer->(next non-blank) char after operand, or is in its 844 * original state. 845 */ 846 847 static bfd_boolean 848 register_name (expressionS *expressionP) 849 { 850 const struct pd_reg *reg; 851 char *name; 852 char *start; 853 char c; 854 855 /* Find the spelling of the operand. */ 856 start = name = input_line_pointer; 857 if (name[0] == '%' && ISALPHA (name[1])) 858 name = ++input_line_pointer; 859 860 else if (!reg_names_p || !ISALPHA (name[0])) 861 return FALSE; 862 863 c = get_symbol_name (&name); 864 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 865 866 /* Put back the delimiting char. */ 867 *input_line_pointer = c; 868 869 /* Look to see if it's in the register table. */ 870 if (reg != NULL) 871 { 872 expressionP->X_op = O_register; 873 expressionP->X_add_number = reg->value; 874 expressionP->X_md = reg->flags; 875 876 /* Make the rest nice. */ 877 expressionP->X_add_symbol = NULL; 878 expressionP->X_op_symbol = NULL; 879 return TRUE; 880 } 881 882 /* Reset the line as if we had not done anything. */ 883 input_line_pointer = start; 884 return FALSE; 885 } 886 887 /* This function is called for each symbol seen in an expression. It 888 handles the special parsing which PowerPC assemblers are supposed 889 to use for condition codes. */ 890 891 /* Whether to do the special parsing. */ 892 static bfd_boolean cr_operand; 893 894 /* Names to recognize in a condition code. This table is sorted. */ 895 static const struct pd_reg cr_names[] = 896 { 897 { "cr0", 0, PPC_OPERAND_CR_REG }, 898 { "cr1", 1, PPC_OPERAND_CR_REG }, 899 { "cr2", 2, PPC_OPERAND_CR_REG }, 900 { "cr3", 3, PPC_OPERAND_CR_REG }, 901 { "cr4", 4, PPC_OPERAND_CR_REG }, 902 { "cr5", 5, PPC_OPERAND_CR_REG }, 903 { "cr6", 6, PPC_OPERAND_CR_REG }, 904 { "cr7", 7, PPC_OPERAND_CR_REG }, 905 { "eq", 2, PPC_OPERAND_CR_BIT }, 906 { "gt", 1, PPC_OPERAND_CR_BIT }, 907 { "lt", 0, PPC_OPERAND_CR_BIT }, 908 { "so", 3, PPC_OPERAND_CR_BIT }, 909 { "un", 3, PPC_OPERAND_CR_BIT } 910 }; 911 912 /* Parsing function. This returns non-zero if it recognized an 913 expression. */ 914 915 int 916 ppc_parse_name (const char *name, expressionS *exp) 917 { 918 const struct pd_reg *reg; 919 920 if (! cr_operand) 921 return 0; 922 923 if (*name == '%') 924 ++name; 925 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 926 name); 927 if (reg == NULL) 928 return 0; 929 930 exp->X_op = O_register; 931 exp->X_add_number = reg->value; 932 exp->X_md = reg->flags; 933 934 return 1; 935 } 936 937 /* Propagate X_md and check register expressions. This is to support 938 condition codes like 4*cr5+eq. */ 939 940 int 941 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right) 942 { 943 /* Accept 4*cr<n> and cr<n>*4. */ 944 if (op == O_multiply 945 && ((right->X_op == O_register 946 && right->X_md == PPC_OPERAND_CR_REG 947 && left->X_op == O_constant 948 && left->X_add_number == 4) 949 || (left->X_op == O_register 950 && left->X_md == PPC_OPERAND_CR_REG 951 && right->X_op == O_constant 952 && right->X_add_number == 4))) 953 { 954 left->X_op = O_register; 955 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT; 956 left->X_add_number *= right->X_add_number; 957 return 1; 958 } 959 960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */ 961 if (right->X_op == O_register 962 && left->X_op == O_register 963 && op == O_add 964 && ((right->X_md == PPC_OPERAND_CR_BIT 965 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)) 966 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT) 967 && left->X_md == PPC_OPERAND_CR_BIT))) 968 { 969 left->X_md = PPC_OPERAND_CR_BIT; 970 right->X_op = O_constant; 971 return 0; 972 } 973 974 /* Accept reg +/- constant. */ 975 if (left->X_op == O_register 976 && !((op == O_add || op == O_subtract) && right->X_op == O_constant)) 977 as_warn (_("invalid register expression")); 978 979 /* Accept constant + reg. */ 980 if (right->X_op == O_register) 981 { 982 if (op == O_add && left->X_op == O_constant) 983 left->X_md = right->X_md; 984 else 985 as_warn (_("invalid register expression")); 986 } 987 988 return 0; 989 } 990 991 /* Local variables. */ 992 993 /* Whether to target xcoff64/elf64. */ 994 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 995 996 /* Opcode hash table. */ 997 static struct hash_control *ppc_hash; 998 999 /* Macro hash table. */ 1000 static struct hash_control *ppc_macro_hash; 1001 1002 #ifdef OBJ_ELF 1003 /* What type of shared library support to use. */ 1004 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 1005 1006 /* Flags to set in the elf header. */ 1007 static flagword ppc_flags = 0; 1008 1009 /* Whether this is Solaris or not. */ 1010 #ifdef TARGET_SOLARIS_COMMENT 1011 #define SOLARIS_P TRUE 1012 #else 1013 #define SOLARIS_P FALSE 1014 #endif 1015 1016 static bfd_boolean msolaris = SOLARIS_P; 1017 #endif 1018 1019 #ifdef OBJ_XCOFF 1020 1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code 1022 using a bunch of different sections. These assembler sections, 1023 however, are all encompassed within the .text or .data sections of 1024 the final output file. We handle this by using different 1025 subsegments within these main segments. */ 1026 1027 /* Next subsegment to allocate within the .text segment. */ 1028 static subsegT ppc_text_subsegment = 2; 1029 1030 /* Linked list of csects in the text section. */ 1031 static symbolS *ppc_text_csects; 1032 1033 /* Next subsegment to allocate within the .data segment. */ 1034 static subsegT ppc_data_subsegment = 2; 1035 1036 /* Linked list of csects in the data section. */ 1037 static symbolS *ppc_data_csects; 1038 1039 /* The current csect. */ 1040 static symbolS *ppc_current_csect; 1041 1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions 1043 and variables. Symbols are put in the TOC with the .tc pseudo-op. 1044 A special relocation is used when accessing TOC entries. We handle 1045 the TOC as a subsegment within the .data segment. We set it up if 1046 we see a .toc pseudo-op, and save the csect symbol here. */ 1047 static symbolS *ppc_toc_csect; 1048 1049 /* The first frag in the TOC subsegment. */ 1050 static fragS *ppc_toc_frag; 1051 1052 /* The first frag in the first subsegment after the TOC in the .data 1053 segment. NULL if there are no subsegments after the TOC. */ 1054 static fragS *ppc_after_toc_frag; 1055 1056 /* The current static block. */ 1057 static symbolS *ppc_current_block; 1058 1059 /* The COFF debugging section; set by md_begin. This is not the 1060 .debug section, but is instead the secret BFD section which will 1061 cause BFD to set the section number of a symbol to N_DEBUG. */ 1062 static asection *ppc_coff_debug_section; 1063 1064 /* Structure to set the length field of the dwarf sections. */ 1065 struct dw_subsection { 1066 /* Subsections are simply linked. */ 1067 struct dw_subsection *link; 1068 1069 /* The subsection number. */ 1070 subsegT subseg; 1071 1072 /* Expression to compute the length of the section. */ 1073 expressionS end_exp; 1074 }; 1075 1076 static struct dw_section { 1077 /* Corresponding section. */ 1078 segT sect; 1079 1080 /* Simply linked list of subsections with a label. */ 1081 struct dw_subsection *list_subseg; 1082 1083 /* The anonymous subsection. */ 1084 struct dw_subsection *anon_subseg; 1085 } dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1086 #endif /* OBJ_XCOFF */ 1087 1088 #ifdef TE_PE 1089 1090 /* Various sections that we need for PE coff support. */ 1091 static segT ydata_section; 1092 static segT pdata_section; 1093 static segT reldata_section; 1094 static segT rdata_section; 1095 static segT tocdata_section; 1096 1097 /* The current section and the previous section. See ppc_previous. */ 1098 static segT ppc_previous_section; 1099 static segT ppc_current_section; 1100 1101 #endif /* TE_PE */ 1102 1103 #ifdef OBJ_ELF 1104 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1105 unsigned long *ppc_apuinfo_list; 1106 unsigned int ppc_apuinfo_num; 1107 unsigned int ppc_apuinfo_num_alloc; 1108 #endif /* OBJ_ELF */ 1109 1110 #ifdef OBJ_ELF 1111 const char *const md_shortopts = "b:l:usm:K:VQ:"; 1112 #else 1113 const char *const md_shortopts = "um:"; 1114 #endif 1115 #define OPTION_NOPS (OPTION_MD_BASE + 0) 1116 const struct option md_longopts[] = { 1117 {"nops", required_argument, NULL, OPTION_NOPS}, 1118 {"ppc476-workaround", no_argument, &warn_476, 1}, 1119 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1120 {NULL, no_argument, NULL, 0} 1121 }; 1122 const size_t md_longopts_size = sizeof (md_longopts); 1123 1124 int 1125 md_parse_option (int c, const char *arg) 1126 { 1127 ppc_cpu_t new_cpu; 1128 1129 switch (c) 1130 { 1131 case 'u': 1132 /* -u means that any undefined symbols should be treated as 1133 external, which is the default for gas anyhow. */ 1134 break; 1135 1136 #ifdef OBJ_ELF 1137 case 'l': 1138 /* Solaris as takes -le (presumably for little endian). For completeness 1139 sake, recognize -be also. */ 1140 if (strcmp (arg, "e") == 0) 1141 { 1142 target_big_endian = 0; 1143 set_target_endian = 1; 1144 if (ppc_cpu & PPC_OPCODE_VLE) 1145 as_bad (_("the use of -mvle requires big endian.")); 1146 } 1147 else 1148 return 0; 1149 1150 break; 1151 1152 case 'b': 1153 if (strcmp (arg, "e") == 0) 1154 { 1155 target_big_endian = 1; 1156 set_target_endian = 1; 1157 } 1158 else 1159 return 0; 1160 1161 break; 1162 1163 case 'K': 1164 /* Recognize -K PIC. */ 1165 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1166 { 1167 shlib = SHLIB_PIC; 1168 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1169 } 1170 else 1171 return 0; 1172 1173 break; 1174 #endif 1175 1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1177 case 'a': 1178 if (strcmp (arg, "64") == 0) 1179 { 1180 #ifdef BFD64 1181 ppc_obj64 = 1; 1182 if (ppc_cpu & PPC_OPCODE_VLE) 1183 as_bad (_("the use of -mvle requires -a32.")); 1184 #else 1185 as_fatal (_("%s unsupported"), "-a64"); 1186 #endif 1187 } 1188 else if (strcmp (arg, "32") == 0) 1189 ppc_obj64 = 0; 1190 else 1191 return 0; 1192 break; 1193 1194 case 'm': 1195 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1196 /* "raw" is only valid for the disassembler. */ 1197 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0) 1198 { 1199 ppc_cpu = new_cpu; 1200 if (strcmp (arg, "vle") == 0) 1201 { 1202 if (set_target_endian && target_big_endian == 0) 1203 as_bad (_("the use of -mvle requires big endian.")); 1204 if (ppc_obj64) 1205 as_bad (_("the use of -mvle requires -a32.")); 1206 } 1207 } 1208 1209 else if (strcmp (arg, "no-vle") == 0) 1210 { 1211 sticky &= ~PPC_OPCODE_VLE; 1212 1213 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke"); 1214 new_cpu &= ~PPC_OPCODE_VLE; 1215 1216 ppc_cpu = new_cpu; 1217 } 1218 1219 else if (strcmp (arg, "regnames") == 0) 1220 reg_names_p = TRUE; 1221 1222 else if (strcmp (arg, "no-regnames") == 0) 1223 reg_names_p = FALSE; 1224 1225 #ifdef OBJ_ELF 1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1227 that require relocation. */ 1228 else if (strcmp (arg, "relocatable") == 0) 1229 { 1230 shlib = SHLIB_MRELOCATABLE; 1231 ppc_flags |= EF_PPC_RELOCATABLE; 1232 } 1233 1234 else if (strcmp (arg, "relocatable-lib") == 0) 1235 { 1236 shlib = SHLIB_MRELOCATABLE; 1237 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1238 } 1239 1240 /* -memb, set embedded bit. */ 1241 else if (strcmp (arg, "emb") == 0) 1242 ppc_flags |= EF_PPC_EMB; 1243 1244 /* -mlittle/-mbig set the endianness. */ 1245 else if (strcmp (arg, "little") == 0 1246 || strcmp (arg, "little-endian") == 0) 1247 { 1248 target_big_endian = 0; 1249 set_target_endian = 1; 1250 if (ppc_cpu & PPC_OPCODE_VLE) 1251 as_bad (_("the use of -mvle requires big endian.")); 1252 } 1253 1254 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1255 { 1256 target_big_endian = 1; 1257 set_target_endian = 1; 1258 } 1259 1260 else if (strcmp (arg, "solaris") == 0) 1261 { 1262 msolaris = TRUE; 1263 ppc_comment_chars = ppc_solaris_comment_chars; 1264 } 1265 1266 else if (strcmp (arg, "no-solaris") == 0) 1267 { 1268 msolaris = FALSE; 1269 ppc_comment_chars = ppc_eabi_comment_chars; 1270 } 1271 else if (strcmp (arg, "spe2") == 0) 1272 { 1273 ppc_cpu |= PPC_OPCODE_SPE2; 1274 } 1275 #endif 1276 else 1277 { 1278 as_bad (_("invalid switch -m%s"), arg); 1279 return 0; 1280 } 1281 break; 1282 1283 #ifdef OBJ_ELF 1284 /* -V: SVR4 argument to print version ID. */ 1285 case 'V': 1286 print_version_id (); 1287 break; 1288 1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1290 should be emitted or not. FIXME: Not implemented. */ 1291 case 'Q': 1292 break; 1293 1294 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1295 rather than .stabs.excl, which is ignored by the linker. 1296 FIXME: Not implemented. */ 1297 case 's': 1298 if (arg) 1299 return 0; 1300 1301 break; 1302 #endif 1303 1304 case OPTION_NOPS: 1305 { 1306 char *end; 1307 nop_limit = strtoul (optarg, &end, 0); 1308 if (*end) 1309 as_bad (_("--nops needs a numeric argument")); 1310 } 1311 break; 1312 1313 case 0: 1314 break; 1315 1316 default: 1317 return 0; 1318 } 1319 1320 return 1; 1321 } 1322 1323 static int 1324 is_ppc64_target (const bfd_target *targ, void *data ATTRIBUTE_UNUSED) 1325 { 1326 switch (targ->flavour) 1327 { 1328 #ifdef OBJ_ELF 1329 case bfd_target_elf_flavour: 1330 return strncmp (targ->name, "elf64-powerpc", 13) == 0; 1331 #endif 1332 #ifdef OBJ_XCOFF 1333 case bfd_target_xcoff_flavour: 1334 return (strcmp (targ->name, "aixcoff64-rs6000") == 0 1335 || strcmp (targ->name, "aix5coff64-rs6000") == 0); 1336 #endif 1337 default: 1338 return 0; 1339 } 1340 } 1341 1342 void 1343 md_show_usage (FILE *stream) 1344 { 1345 fprintf (stream, _("\ 1346 PowerPC options:\n")); 1347 fprintf (stream, _("\ 1348 -a32 generate ELF32/XCOFF32\n")); 1349 if (bfd_iterate_over_targets (is_ppc64_target, NULL)) 1350 fprintf (stream, _("\ 1351 -a64 generate ELF64/XCOFF64\n")); 1352 fprintf (stream, _("\ 1353 -u ignored\n")); 1354 fprintf (stream, _("\ 1355 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n")); 1356 fprintf (stream, _("\ 1357 -mpwr generate code for POWER (RIOS1)\n")); 1358 fprintf (stream, _("\ 1359 -m601 generate code for PowerPC 601\n")); 1360 fprintf (stream, _("\ 1361 -mppc, -mppc32, -m603, -m604\n\ 1362 generate code for PowerPC 603/604\n")); 1363 fprintf (stream, _("\ 1364 -m403 generate code for PowerPC 403\n")); 1365 fprintf (stream, _("\ 1366 -m405 generate code for PowerPC 405\n")); 1367 fprintf (stream, _("\ 1368 -m440 generate code for PowerPC 440\n")); 1369 fprintf (stream, _("\ 1370 -m464 generate code for PowerPC 464\n")); 1371 fprintf (stream, _("\ 1372 -m476 generate code for PowerPC 476\n")); 1373 fprintf (stream, _("\ 1374 -m7400, -m7410, -m7450, -m7455\n\ 1375 generate code for PowerPC 7400/7410/7450/7455\n")); 1376 fprintf (stream, _("\ 1377 -m750cl, -mgekko, -mbroadway\n\ 1378 generate code for PowerPC 750cl/Gekko/Broadway\n")); 1379 fprintf (stream, _("\ 1380 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); 1381 fprintf (stream, _("\ 1382 -mppc64, -m620 generate code for PowerPC 620/625/630\n")); 1383 fprintf (stream, _("\ 1384 -mppc64bridge generate code for PowerPC 64, including bridge insns\n")); 1385 fprintf (stream, _("\ 1386 -mbooke generate code for 32-bit PowerPC BookE\n")); 1387 fprintf (stream, _("\ 1388 -ma2 generate code for A2 architecture\n")); 1389 fprintf (stream, _("\ 1390 -mpower4, -mpwr4 generate code for Power4 architecture\n")); 1391 fprintf (stream, _("\ 1392 -mpower5, -mpwr5, -mpwr5x\n\ 1393 generate code for Power5 architecture\n")); 1394 fprintf (stream, _("\ 1395 -mpower6, -mpwr6 generate code for Power6 architecture\n")); 1396 fprintf (stream, _("\ 1397 -mpower7, -mpwr7 generate code for Power7 architecture\n")); 1398 fprintf (stream, _("\ 1399 -mpower8, -mpwr8 generate code for Power8 architecture\n")); 1400 fprintf (stream, _("\ 1401 -mpower9, -mpwr9 generate code for Power9 architecture\n")); 1402 fprintf (stream, _("\ 1403 -mcell generate code for Cell Broadband Engine architecture\n")); 1404 fprintf (stream, _("\ 1405 -mcom generate code for Power/PowerPC common instructions\n")); 1406 fprintf (stream, _("\ 1407 -many generate code for any architecture (PWR/PWRX/PPC)\n")); 1408 fprintf (stream, _("\ 1409 -maltivec generate code for AltiVec\n")); 1410 fprintf (stream, _("\ 1411 -mvsx generate code for Vector-Scalar (VSX) instructions\n")); 1412 fprintf (stream, _("\ 1413 -me300 generate code for PowerPC e300 family\n")); 1414 fprintf (stream, _("\ 1415 -me500, -me500x2 generate code for Motorola e500 core complex\n")); 1416 fprintf (stream, _("\ 1417 -me500mc, generate code for Freescale e500mc core complex\n")); 1418 fprintf (stream, _("\ 1419 -me500mc64, generate code for Freescale e500mc64 core complex\n")); 1420 fprintf (stream, _("\ 1421 -me5500, generate code for Freescale e5500 core complex\n")); 1422 fprintf (stream, _("\ 1423 -me6500, generate code for Freescale e6500 core complex\n")); 1424 fprintf (stream, _("\ 1425 -mspe generate code for Motorola SPE instructions\n")); 1426 fprintf (stream, _("\ 1427 -mspe2 generate code for Freescale SPE2 instructions\n")); 1428 fprintf (stream, _("\ 1429 -mvle generate code for Freescale VLE instructions\n")); 1430 fprintf (stream, _("\ 1431 -mtitan generate code for AppliedMicro Titan core complex\n")); 1432 fprintf (stream, _("\ 1433 -mregnames Allow symbolic names for registers\n")); 1434 fprintf (stream, _("\ 1435 -mno-regnames Do not allow symbolic names for registers\n")); 1436 #ifdef OBJ_ELF 1437 fprintf (stream, _("\ 1438 -mrelocatable support for GCC's -mrelocatble option\n")); 1439 fprintf (stream, _("\ 1440 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n")); 1441 fprintf (stream, _("\ 1442 -memb set PPC_EMB bit in ELF flags\n")); 1443 fprintf (stream, _("\ 1444 -mlittle, -mlittle-endian, -le\n\ 1445 generate code for a little endian machine\n")); 1446 fprintf (stream, _("\ 1447 -mbig, -mbig-endian, -be\n\ 1448 generate code for a big endian machine\n")); 1449 fprintf (stream, _("\ 1450 -msolaris generate code for Solaris\n")); 1451 fprintf (stream, _("\ 1452 -mno-solaris do not generate code for Solaris\n")); 1453 fprintf (stream, _("\ 1454 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n")); 1455 fprintf (stream, _("\ 1456 -V print assembler version number\n")); 1457 fprintf (stream, _("\ 1458 -Qy, -Qn ignored\n")); 1459 #endif 1460 fprintf (stream, _("\ 1461 -nops=count when aligning, more than COUNT nops uses a branch\n")); 1462 fprintf (stream, _("\ 1463 -ppc476-workaround warn if emitting data to code sections\n")); 1464 } 1465 1466 /* Set ppc_cpu if it is not already set. */ 1467 1468 static void 1469 ppc_set_cpu (void) 1470 { 1471 const char *default_os = TARGET_OS; 1472 const char *default_cpu = TARGET_CPU; 1473 1474 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1475 { 1476 if (ppc_obj64) 1477 if (target_big_endian) 1478 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1479 else 1480 /* The minimum supported cpu for 64-bit little-endian is power8. */ 1481 ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8"); 1482 else if (strncmp (default_os, "aix", 3) == 0 1483 && default_os[3] >= '4' && default_os[3] <= '9') 1484 ppc_cpu |= PPC_OPCODE_COMMON; 1485 else if (strncmp (default_os, "aix3", 4) == 0) 1486 ppc_cpu |= PPC_OPCODE_POWER; 1487 else if (strcmp (default_cpu, "rs6000") == 0) 1488 ppc_cpu |= PPC_OPCODE_POWER; 1489 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1490 ppc_cpu |= PPC_OPCODE_PPC; 1491 else 1492 as_fatal (_("unknown default cpu = %s, os = %s"), 1493 default_cpu, default_os); 1494 } 1495 } 1496 1497 /* Figure out the BFD architecture to use. This function and ppc_mach 1498 are called well before md_begin, when the output file is opened. */ 1499 1500 enum bfd_architecture 1501 ppc_arch (void) 1502 { 1503 const char *default_cpu = TARGET_CPU; 1504 ppc_set_cpu (); 1505 1506 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1507 return bfd_arch_powerpc; 1508 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1509 return bfd_arch_powerpc; 1510 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1511 return bfd_arch_rs6000; 1512 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1513 { 1514 if (strcmp (default_cpu, "rs6000") == 0) 1515 return bfd_arch_rs6000; 1516 else if (strncmp (default_cpu, "powerpc", 7) == 0) 1517 return bfd_arch_powerpc; 1518 } 1519 1520 as_fatal (_("neither Power nor PowerPC opcodes were selected.")); 1521 return bfd_arch_unknown; 1522 } 1523 1524 unsigned long 1525 ppc_mach (void) 1526 { 1527 if (ppc_obj64) 1528 return bfd_mach_ppc64; 1529 else if (ppc_arch () == bfd_arch_rs6000) 1530 return bfd_mach_rs6k; 1531 else if (ppc_cpu & PPC_OPCODE_TITAN) 1532 return bfd_mach_ppc_titan; 1533 else if (ppc_cpu & PPC_OPCODE_VLE) 1534 return bfd_mach_ppc_vle; 1535 else 1536 return bfd_mach_ppc; 1537 } 1538 1539 extern const char* 1540 ppc_target_format (void) 1541 { 1542 #ifdef OBJ_COFF 1543 #ifdef TE_PE 1544 return target_big_endian ? "pe-powerpc" : "pe-powerpcle"; 1545 #elif TE_POWERMAC 1546 return "xcoff-powermac"; 1547 #else 1548 # ifdef TE_AIX5 1549 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1550 # else 1551 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1552 # endif 1553 #endif 1554 #endif 1555 #ifdef OBJ_ELF 1556 # ifdef TE_FreeBSD 1557 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1558 # elif defined (TE_VXWORKS) 1559 return "elf32-powerpc-vxworks"; 1560 # else 1561 return (target_big_endian 1562 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1563 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1564 # endif 1565 #endif 1566 } 1567 1568 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1569 Return TRUE if there's a problem, otherwise FALSE. */ 1570 1571 static bfd_boolean 1572 insn_validate (const struct powerpc_opcode *op) 1573 { 1574 const unsigned char *o; 1575 uint64_t omask = op->mask; 1576 1577 /* The mask had better not trim off opcode bits. */ 1578 if ((op->opcode & omask) != op->opcode) 1579 { 1580 as_bad (_("mask trims opcode bits for %s"), op->name); 1581 return TRUE; 1582 } 1583 1584 /* The operands must not overlap the opcode or each other. */ 1585 for (o = op->operands; *o; ++o) 1586 { 1587 bfd_boolean optional = FALSE; 1588 if (*o >= num_powerpc_operands) 1589 { 1590 as_bad (_("operand index error for %s"), op->name); 1591 return TRUE; 1592 } 1593 else 1594 { 1595 uint64_t mask; 1596 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1597 if (operand->shift == (int) PPC_OPSHIFT_INV) 1598 { 1599 const char *errmsg; 1600 int64_t val; 1601 1602 errmsg = NULL; 1603 val = -1; 1604 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1605 val = -val; 1606 else if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1607 val += 1; 1608 mask = (*operand->insert) (0, val, ppc_cpu, &errmsg); 1609 } 1610 else if (operand->shift >= 0) 1611 mask = operand->bitm << operand->shift; 1612 else 1613 mask = operand->bitm >> -operand->shift; 1614 if (omask & mask) 1615 { 1616 as_bad (_("operand %d overlap in %s"), 1617 (int) (o - op->operands), op->name); 1618 return TRUE; 1619 } 1620 omask |= mask; 1621 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 1622 optional = TRUE; 1623 else if (optional) 1624 { 1625 as_bad (_("non-optional operand %d follows optional operand in %s"), 1626 (int) (o - op->operands), op->name); 1627 return TRUE; 1628 } 1629 } 1630 } 1631 return FALSE; 1632 } 1633 1634 /* Insert opcodes and macros into hash tables. Called at startup and 1635 for .machine pseudo. */ 1636 1637 static void 1638 ppc_setup_opcodes (void) 1639 { 1640 const struct powerpc_opcode *op; 1641 const struct powerpc_opcode *op_end; 1642 const struct powerpc_macro *macro; 1643 const struct powerpc_macro *macro_end; 1644 bfd_boolean bad_insn = FALSE; 1645 1646 if (ppc_hash != NULL) 1647 hash_die (ppc_hash); 1648 if (ppc_macro_hash != NULL) 1649 hash_die (ppc_macro_hash); 1650 1651 /* Insert the opcodes into a hash table. */ 1652 ppc_hash = hash_new (); 1653 1654 if (ENABLE_CHECKING) 1655 { 1656 unsigned int i; 1657 1658 /* An index into powerpc_operands is stored in struct fix 1659 fx_pcrel_adjust which is 8 bits wide. */ 1660 gas_assert (num_powerpc_operands < 256); 1661 1662 /* Check operand masks. Code here and in the disassembler assumes 1663 all the 1's in the mask are contiguous. */ 1664 for (i = 0; i < num_powerpc_operands; ++i) 1665 { 1666 uint64_t mask = powerpc_operands[i].bitm; 1667 uint64_t right_bit; 1668 unsigned int j; 1669 1670 right_bit = mask & -mask; 1671 mask += right_bit; 1672 right_bit = mask & -mask; 1673 if (mask != right_bit) 1674 { 1675 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1676 bad_insn = TRUE; 1677 } 1678 for (j = i + 1; j < num_powerpc_operands; ++j) 1679 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1680 sizeof (powerpc_operands[0])) == 0) 1681 { 1682 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1683 j, i); 1684 bad_insn = TRUE; 1685 } 1686 } 1687 } 1688 1689 op_end = powerpc_opcodes + powerpc_num_opcodes; 1690 for (op = powerpc_opcodes; op < op_end; op++) 1691 { 1692 if (ENABLE_CHECKING) 1693 { 1694 unsigned int new_opcode = PPC_OP (op[0].opcode); 1695 1696 #ifdef PRINT_OPCODE_TABLE 1697 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1698 op->name, (unsigned int) (op - powerpc_opcodes), 1699 new_opcode, (unsigned long long) op->opcode, 1700 (unsigned long long) op->mask, (unsigned long long) op->flags); 1701 #endif 1702 1703 /* The major opcodes had better be sorted. Code in the disassembler 1704 assumes the insns are sorted according to major opcode. */ 1705 if (op != powerpc_opcodes 1706 && new_opcode < PPC_OP (op[-1].opcode)) 1707 { 1708 as_bad (_("major opcode is not sorted for %s"), op->name); 1709 bad_insn = TRUE; 1710 } 1711 1712 if ((op->flags & PPC_OPCODE_VLE) != 0) 1713 { 1714 as_bad (_("%s is enabled by vle flag"), op->name); 1715 bad_insn = TRUE; 1716 } 1717 if (PPC_OP (op->opcode) != 4 1718 && PPC_OP (op->opcode) != 31 1719 && (op->deprecated & PPC_OPCODE_VLE) == 0) 1720 { 1721 as_bad (_("%s not disabled by vle flag"), op->name); 1722 bad_insn = TRUE; 1723 } 1724 bad_insn |= insn_validate (op); 1725 } 1726 1727 if ((ppc_cpu & op->flags) != 0 1728 && !(ppc_cpu & op->deprecated)) 1729 { 1730 const char *retval; 1731 1732 retval = hash_insert (ppc_hash, op->name, (void *) op); 1733 if (retval != NULL) 1734 { 1735 as_bad (_("duplicate instruction %s"), 1736 op->name); 1737 bad_insn = TRUE; 1738 } 1739 } 1740 } 1741 1742 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1743 for (op = powerpc_opcodes; op < op_end; op++) 1744 hash_insert (ppc_hash, op->name, (void *) op); 1745 1746 op_end = prefix_opcodes + prefix_num_opcodes; 1747 for (op = prefix_opcodes; op < op_end; op++) 1748 { 1749 if (ENABLE_CHECKING) 1750 { 1751 unsigned int new_opcode = PPC_PREFIX_SEG (op[0].opcode); 1752 1753 #ifdef PRINT_OPCODE_TABLE 1754 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1755 op->name, (unsigned int) (op - prefix_opcodes), 1756 new_opcode, (unsigned long long) op->opcode, 1757 (unsigned long long) op->mask, (unsigned long long) op->flags); 1758 #endif 1759 1760 /* The major opcodes had better be sorted. Code in the disassembler 1761 assumes the insns are sorted according to major opcode. */ 1762 if (op != prefix_opcodes 1763 && new_opcode < PPC_PREFIX_SEG (op[-1].opcode)) 1764 { 1765 as_bad (_("major opcode is not sorted for %s"), op->name); 1766 bad_insn = TRUE; 1767 } 1768 bad_insn |= insn_validate (op); 1769 } 1770 1771 if ((ppc_cpu & op->flags) != 0 1772 && !(ppc_cpu & op->deprecated)) 1773 { 1774 const char *retval; 1775 1776 retval = hash_insert (ppc_hash, op->name, (void *) op); 1777 if (retval != NULL) 1778 { 1779 as_bad (_("duplicate instruction %s"), 1780 op->name); 1781 bad_insn = TRUE; 1782 } 1783 } 1784 } 1785 1786 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1787 for (op = prefix_opcodes; op < op_end; op++) 1788 hash_insert (ppc_hash, op->name, (void *) op); 1789 1790 op_end = vle_opcodes + vle_num_opcodes; 1791 for (op = vle_opcodes; op < op_end; op++) 1792 { 1793 if (ENABLE_CHECKING) 1794 { 1795 unsigned new_seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); 1796 1797 #ifdef PRINT_OPCODE_TABLE 1798 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1799 op->name, (unsigned int) (op - vle_opcodes), 1800 (unsigned int) new_seg, (unsigned long long) op->opcode, 1801 (unsigned long long) op->mask, (unsigned long long) op->flags); 1802 #endif 1803 1804 /* The major opcodes had better be sorted. Code in the disassembler 1805 assumes the insns are sorted according to major opcode. */ 1806 if (op != vle_opcodes 1807 && new_seg < VLE_OP_TO_SEG (VLE_OP (op[-1].opcode, op[-1].mask))) 1808 { 1809 as_bad (_("major opcode is not sorted for %s"), op->name); 1810 bad_insn = TRUE; 1811 } 1812 1813 bad_insn |= insn_validate (op); 1814 } 1815 1816 if ((ppc_cpu & op->flags) != 0 1817 && !(ppc_cpu & op->deprecated)) 1818 { 1819 const char *retval; 1820 1821 retval = hash_insert (ppc_hash, op->name, (void *) op); 1822 if (retval != NULL) 1823 { 1824 as_bad (_("duplicate instruction %s"), 1825 op->name); 1826 bad_insn = TRUE; 1827 } 1828 } 1829 } 1830 1831 /* SPE2 instructions */ 1832 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2) 1833 { 1834 op_end = spe2_opcodes + spe2_num_opcodes; 1835 for (op = spe2_opcodes; op < op_end; op++) 1836 { 1837 if (ENABLE_CHECKING) 1838 { 1839 if (op != spe2_opcodes) 1840 { 1841 unsigned old_seg, new_seg; 1842 1843 old_seg = VLE_OP (op[-1].opcode, op[-1].mask); 1844 old_seg = VLE_OP_TO_SEG (old_seg); 1845 new_seg = VLE_OP (op[0].opcode, op[0].mask); 1846 new_seg = VLE_OP_TO_SEG (new_seg); 1847 1848 /* The major opcodes had better be sorted. Code in the 1849 disassembler assumes the insns are sorted according to 1850 major opcode. */ 1851 if (new_seg < old_seg) 1852 { 1853 as_bad (_("major opcode is not sorted for %s"), op->name); 1854 bad_insn = TRUE; 1855 } 1856 } 1857 1858 bad_insn |= insn_validate (op); 1859 } 1860 1861 if ((ppc_cpu & op->flags) != 0 && !(ppc_cpu & op->deprecated)) 1862 { 1863 const char *retval; 1864 1865 retval = hash_insert (ppc_hash, op->name, (void *) op); 1866 if (retval != NULL) 1867 { 1868 as_bad (_("duplicate instruction %s"), 1869 op->name); 1870 bad_insn = TRUE; 1871 } 1872 } 1873 } 1874 1875 for (op = spe2_opcodes; op < op_end; op++) 1876 hash_insert (ppc_hash, op->name, (void *) op); 1877 } 1878 1879 /* Insert the macros into a hash table. */ 1880 ppc_macro_hash = hash_new (); 1881 1882 macro_end = powerpc_macros + powerpc_num_macros; 1883 for (macro = powerpc_macros; macro < macro_end; macro++) 1884 { 1885 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0) 1886 { 1887 const char *retval; 1888 1889 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro); 1890 if (retval != (const char *) NULL) 1891 { 1892 as_bad (_("duplicate macro %s"), macro->name); 1893 bad_insn = TRUE; 1894 } 1895 } 1896 } 1897 1898 if (bad_insn) 1899 abort (); 1900 } 1901 1902 /* This function is called when the assembler starts up. It is called 1903 after the options have been parsed and the output file has been 1904 opened. */ 1905 1906 void 1907 md_begin (void) 1908 { 1909 ppc_set_cpu (); 1910 1911 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1912 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1913 1914 #ifdef OBJ_ELF 1915 /* Set the ELF flags if desired. */ 1916 if (ppc_flags && !msolaris) 1917 bfd_set_private_flags (stdoutput, ppc_flags); 1918 #endif 1919 1920 ppc_setup_opcodes (); 1921 1922 /* Tell the main code what the endianness is if it is not overridden 1923 by the user. */ 1924 if (!set_target_endian) 1925 { 1926 set_target_endian = 1; 1927 target_big_endian = PPC_BIG_ENDIAN; 1928 } 1929 1930 #ifdef OBJ_XCOFF 1931 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1932 1933 /* Create dummy symbols to serve as initial csects. This forces the 1934 text csects to precede the data csects. These symbols will not 1935 be output. */ 1936 ppc_text_csects = symbol_make ("dummy\001"); 1937 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects; 1938 ppc_data_csects = symbol_make ("dummy\001"); 1939 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects; 1940 #endif 1941 1942 #ifdef TE_PE 1943 1944 ppc_current_section = text_section; 1945 ppc_previous_section = 0; 1946 1947 #endif 1948 } 1949 1950 void 1951 ppc_cleanup (void) 1952 { 1953 #ifdef OBJ_ELF 1954 if (ppc_apuinfo_list == NULL) 1955 return; 1956 1957 /* Ok, so write the section info out. We have this layout: 1958 1959 byte data what 1960 ---- ---- ---- 1961 0 8 length of "APUinfo\0" 1962 4 (n*4) number of APU's (4 bytes each) 1963 8 2 note type 2 1964 12 "APUinfo\0" name 1965 20 APU#1 first APU's info 1966 24 APU#2 second APU's info 1967 ... ... 1968 */ 1969 { 1970 char *p; 1971 asection *seg = now_seg; 1972 subsegT subseg = now_subseg; 1973 asection *apuinfo_secp = (asection *) NULL; 1974 unsigned int i; 1975 1976 /* Create the .PPC.EMB.apuinfo section. */ 1977 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); 1978 bfd_set_section_flags (apuinfo_secp, SEC_HAS_CONTENTS | SEC_READONLY); 1979 1980 p = frag_more (4); 1981 md_number_to_chars (p, (valueT) 8, 4); 1982 1983 p = frag_more (4); 1984 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1985 1986 p = frag_more (4); 1987 md_number_to_chars (p, (valueT) 2, 4); 1988 1989 p = frag_more (8); 1990 strcpy (p, APUINFO_LABEL); 1991 1992 for (i = 0; i < ppc_apuinfo_num; i++) 1993 { 1994 p = frag_more (4); 1995 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1996 } 1997 1998 frag_align (2, 0, 0); 1999 2000 /* We probably can't restore the current segment, for there likely 2001 isn't one yet... */ 2002 if (seg && subseg) 2003 subseg_set (seg, subseg); 2004 } 2005 #endif 2006 } 2007 2008 /* Insert an operand value into an instruction. */ 2009 2010 static uint64_t 2011 ppc_insert_operand (uint64_t insn, 2012 const struct powerpc_operand *operand, 2013 int64_t val, 2014 ppc_cpu_t cpu, 2015 const char *file, 2016 unsigned int line) 2017 { 2018 int64_t min, max, right; 2019 2020 max = operand->bitm; 2021 right = max & -max; 2022 min = 0; 2023 2024 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 2025 { 2026 /* Extend the allowed range for addis to [-32768, 65535]. 2027 Similarly for cmpli and some VLE high part insns. For 64-bit 2028 it would be good to disable this for signed fields since the 2029 value is sign extended into the high 32 bits of the register. 2030 If the value is, say, an address, then we might care about 2031 the high bits. However, gcc as of 2014-06 uses unsigned 2032 values when loading the high part of 64-bit constants using 2033 lis. */ 2034 min = ~(max >> 1) & -right; 2035 } 2036 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2037 { 2038 max = (max >> 1) & -right; 2039 min = ~max & -right; 2040 } 2041 2042 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 2043 max++; 2044 2045 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 2046 { 2047 int64_t tmp = min; 2048 min = -max; 2049 max = -tmp; 2050 } 2051 2052 if (min <= max) 2053 { 2054 /* Some people write constants with the sign extension done by 2055 hand but only up to 32 bits. This shouldn't really be valid, 2056 but, to permit this code to assemble on a 64-bit host, we 2057 sign extend the 32-bit value to 64 bits if so doing makes the 2058 value valid. We only do this for operands that are 32-bits or 2059 smaller. */ 2060 if (val > max 2061 && (operand->bitm & ~0xffffffffULL) == 0 2062 && (val - (1LL << 32)) >= min 2063 && (val - (1LL << 32)) <= max 2064 && ((val - (1LL << 32)) & (right - 1)) == 0) 2065 val = val - (1LL << 32); 2066 2067 /* Similarly, people write expressions like ~(1<<15), and expect 2068 this to be OK for a 32-bit unsigned value. */ 2069 else if (val < min 2070 && (operand->bitm & ~0xffffffffULL) == 0 2071 && (val + (1LL << 32)) >= min 2072 && (val + (1LL << 32)) <= max 2073 && ((val + (1LL << 32)) & (right - 1)) == 0) 2074 val = val + (1LL << 32); 2075 2076 else if (val < min 2077 || val > max 2078 || (val & (right - 1)) != 0) 2079 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 2080 } 2081 2082 if (operand->insert) 2083 { 2084 const char *errmsg; 2085 2086 errmsg = NULL; 2087 insn = (*operand->insert) (insn, val, cpu, &errmsg); 2088 if (errmsg != (const char *) NULL) 2089 as_bad_where (file, line, "%s", errmsg); 2090 } 2091 else if (operand->shift >= 0) 2092 insn |= (val & operand->bitm) << operand->shift; 2093 else 2094 insn |= (val & operand->bitm) >> -operand->shift; 2095 2096 return insn; 2097 } 2098 2099 2100 #ifdef OBJ_ELF 2101 /* Parse @got, etc. and return the desired relocation. */ 2102 static bfd_reloc_code_real_type 2103 ppc_elf_suffix (char **str_p, expressionS *exp_p) 2104 { 2105 struct map_bfd { 2106 const char *string; 2107 unsigned int length : 8; 2108 unsigned int valid32 : 1; 2109 unsigned int valid64 : 1; 2110 unsigned int reloc; 2111 }; 2112 2113 char ident[20]; 2114 char *str = *str_p; 2115 char *str2; 2116 int ch; 2117 int len; 2118 const struct map_bfd *ptr; 2119 2120 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 2121 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 2122 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 2123 2124 static const struct map_bfd mapping[] = { 2125 MAP ("l", BFD_RELOC_LO16), 2126 MAP ("h", BFD_RELOC_HI16), 2127 MAP ("ha", BFD_RELOC_HI16_S), 2128 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 2129 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 2130 MAP ("got", BFD_RELOC_16_GOTOFF), 2131 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 2132 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 2133 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 2134 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 2135 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 2136 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 2137 MAP ("copy", BFD_RELOC_PPC_COPY), 2138 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 2139 MAP ("sectoff", BFD_RELOC_16_BASEREL), 2140 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 2141 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 2142 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 2143 MAP ("tls", BFD_RELOC_PPC_TLS), 2144 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 2145 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 2146 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 2147 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 2148 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 2149 MAP ("tprel", BFD_RELOC_PPC_TPREL), 2150 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 2151 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 2152 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 2153 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 2154 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 2155 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 2156 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 2157 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 2158 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 2159 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 2160 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 2161 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 2162 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 2163 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 2164 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 2165 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 2166 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 2167 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 2168 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 2169 MAP32 ("fixup", BFD_RELOC_CTOR), 2170 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 2171 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 2172 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 2173 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 2174 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 2175 MAP32 ("sdarel", BFD_RELOC_GPREL16), 2176 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 2177 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 2178 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 2179 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 2180 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 2181 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 2182 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 2183 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 2184 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 2185 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 2186 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 2187 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 2188 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 2189 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 2190 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 2191 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 2192 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 2193 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 2194 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 2195 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 2196 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 2197 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 2198 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 2199 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 2200 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 2201 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 2202 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 2203 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 2204 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 2205 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 2206 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 2207 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 2208 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 2209 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 2210 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 2211 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 2212 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 2213 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 2214 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 2215 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 2216 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 2217 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 2218 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 2219 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 2220 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 2221 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC), 2222 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34), 2223 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34), 2224 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34), 2225 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL), 2226 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD34), 2227 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD34), 2228 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL34), 2229 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL34), 2230 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34), 2231 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34), 2232 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34), 2233 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34), 2234 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 2235 }; 2236 2237 if (*str++ != '@') 2238 return BFD_RELOC_NONE; 2239 2240 for (ch = *str, str2 = ident; 2241 (str2 < ident + sizeof (ident) - 1 2242 && (ISALNUM (ch) || ch == '@')); 2243 ch = *++str) 2244 { 2245 *str2++ = TOLOWER (ch); 2246 } 2247 2248 *str2 = '\0'; 2249 len = str2 - ident; 2250 2251 ch = ident[0]; 2252 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2253 if (ch == ptr->string[0] 2254 && len == ptr->length 2255 && memcmp (ident, ptr->string, ptr->length) == 0 2256 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2257 { 2258 int reloc = ptr->reloc; 2259 2260 if (!ppc_obj64 && exp_p->X_add_number != 0) 2261 { 2262 switch (reloc) 2263 { 2264 case BFD_RELOC_16_GOTOFF: 2265 case BFD_RELOC_LO16_GOTOFF: 2266 case BFD_RELOC_HI16_GOTOFF: 2267 case BFD_RELOC_HI16_S_GOTOFF: 2268 as_warn (_("symbol+offset@%s means symbol@%s+offset"), 2269 ptr->string, ptr->string); 2270 break; 2271 2272 case BFD_RELOC_PPC_GOT_TLSGD16: 2273 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2274 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2275 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2276 case BFD_RELOC_PPC_GOT_TLSLD16: 2277 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2278 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2279 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2280 case BFD_RELOC_PPC_GOT_DTPREL16: 2281 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2282 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2283 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2284 case BFD_RELOC_PPC_GOT_TPREL16: 2285 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2286 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2287 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2288 as_bad (_("symbol+offset@%s not supported"), ptr->string); 2289 break; 2290 } 2291 } 2292 2293 /* Now check for identifier@suffix+constant. */ 2294 if (*str == '-' || *str == '+') 2295 { 2296 char *orig_line = input_line_pointer; 2297 expressionS new_exp; 2298 2299 input_line_pointer = str; 2300 expression (&new_exp); 2301 if (new_exp.X_op == O_constant) 2302 { 2303 exp_p->X_add_number += new_exp.X_add_number; 2304 str = input_line_pointer; 2305 } 2306 2307 if (&input_line_pointer != str_p) 2308 input_line_pointer = orig_line; 2309 } 2310 *str_p = str; 2311 2312 if (reloc == (int) BFD_RELOC_PPC64_TOC 2313 && exp_p->X_op == O_symbol 2314 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2315 { 2316 /* Change the symbol so that the dummy .TOC. symbol can be 2317 omitted from the object file. */ 2318 exp_p->X_add_symbol = &abs_symbol; 2319 } 2320 2321 return (bfd_reloc_code_real_type) reloc; 2322 } 2323 2324 return BFD_RELOC_NONE; 2325 } 2326 2327 /* Support @got, etc. on constants emitted via .short, .int etc. */ 2328 2329 bfd_reloc_code_real_type 2330 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2331 { 2332 expression (exp); 2333 if (nbytes >= 2 && *input_line_pointer == '@') 2334 return ppc_elf_suffix (&input_line_pointer, exp); 2335 return BFD_RELOC_NONE; 2336 } 2337 2338 /* Warn when emitting data to code sections, unless we are emitting 2339 a relocation that ld --ppc476-workaround uses to recognise data 2340 *and* there was an unconditional branch prior to the data. */ 2341 2342 void 2343 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2344 unsigned int nbytes, fixS *fix) 2345 { 2346 if (warn_476 2347 && (now_seg->flags & SEC_CODE) != 0 2348 && (nbytes != 4 2349 || fix == NULL 2350 || !(fix->fx_r_type == BFD_RELOC_32 2351 || fix->fx_r_type == BFD_RELOC_CTOR 2352 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2353 || !(last_seg == now_seg && last_subseg == now_subseg) 2354 || !((last_insn & (0x3f << 26)) == (18u << 26) 2355 || ((last_insn & (0x3f << 26)) == (16u << 26) 2356 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2357 || ((last_insn & (0x3f << 26)) == (19u << 26) 2358 && (last_insn & (0x3ff << 1)) == (16u << 1) 2359 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2360 { 2361 /* Flag that we've warned. */ 2362 if (fix != NULL) 2363 fix->fx_tcbit = 1; 2364 2365 as_warn (_("data in executable section")); 2366 } 2367 } 2368 2369 /* Solaris pseduo op to change to the .rodata section. */ 2370 static void 2371 ppc_elf_rdata (int xxx) 2372 { 2373 char *save_line = input_line_pointer; 2374 static char section[] = ".rodata\n"; 2375 2376 /* Just pretend this is .section .rodata */ 2377 input_line_pointer = section; 2378 obj_elf_section (xxx); 2379 2380 input_line_pointer = save_line; 2381 } 2382 2383 /* Pseudo op to make file scope bss items. */ 2384 static void 2385 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2386 { 2387 char *name; 2388 char c; 2389 char *p; 2390 offsetT size; 2391 symbolS *symbolP; 2392 offsetT align; 2393 segT old_sec; 2394 int old_subsec; 2395 char *pfrag; 2396 int align2; 2397 2398 c = get_symbol_name (&name); 2399 2400 /* Just after name is now '\0'. */ 2401 p = input_line_pointer; 2402 *p = c; 2403 SKIP_WHITESPACE_AFTER_NAME (); 2404 if (*input_line_pointer != ',') 2405 { 2406 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2407 ignore_rest_of_line (); 2408 return; 2409 } 2410 2411 input_line_pointer++; /* skip ',' */ 2412 if ((size = get_absolute_expression ()) < 0) 2413 { 2414 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2415 ignore_rest_of_line (); 2416 return; 2417 } 2418 2419 /* The third argument to .lcomm is the alignment. */ 2420 if (*input_line_pointer != ',') 2421 align = 8; 2422 else 2423 { 2424 ++input_line_pointer; 2425 align = get_absolute_expression (); 2426 if (align <= 0) 2427 { 2428 as_warn (_("ignoring bad alignment")); 2429 align = 8; 2430 } 2431 } 2432 2433 *p = 0; 2434 symbolP = symbol_find_or_make (name); 2435 *p = c; 2436 2437 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2438 { 2439 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2440 S_GET_NAME (symbolP)); 2441 ignore_rest_of_line (); 2442 return; 2443 } 2444 2445 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2446 { 2447 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2448 S_GET_NAME (symbolP), 2449 (long) S_GET_VALUE (symbolP), 2450 (long) size); 2451 2452 ignore_rest_of_line (); 2453 return; 2454 } 2455 2456 /* Allocate_bss. */ 2457 old_sec = now_seg; 2458 old_subsec = now_subseg; 2459 if (align) 2460 { 2461 /* Convert to a power of 2 alignment. */ 2462 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2463 if (align != 1) 2464 { 2465 as_bad (_("common alignment not a power of 2")); 2466 ignore_rest_of_line (); 2467 return; 2468 } 2469 } 2470 else 2471 align2 = 0; 2472 2473 record_alignment (bss_section, align2); 2474 subseg_set (bss_section, 1); 2475 if (align2) 2476 frag_align (align2, 0, 0); 2477 if (S_GET_SEGMENT (symbolP) == bss_section) 2478 symbol_get_frag (symbolP)->fr_symbol = 0; 2479 symbol_set_frag (symbolP, frag_now); 2480 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2481 (char *) 0); 2482 *pfrag = 0; 2483 S_SET_SIZE (symbolP, size); 2484 S_SET_SEGMENT (symbolP, bss_section); 2485 subseg_set (old_sec, old_subsec); 2486 demand_empty_rest_of_line (); 2487 } 2488 2489 /* Pseudo op to set symbol local entry point. */ 2490 static void 2491 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2492 { 2493 char *name; 2494 char c = get_symbol_name (&name); 2495 char *p; 2496 expressionS exp; 2497 symbolS *sym; 2498 asymbol *bfdsym; 2499 elf_symbol_type *elfsym; 2500 2501 p = input_line_pointer; 2502 *p = c; 2503 SKIP_WHITESPACE_AFTER_NAME (); 2504 if (*input_line_pointer != ',') 2505 { 2506 *p = 0; 2507 as_bad (_("expected comma after name `%s' in .localentry directive"), 2508 name); 2509 *p = c; 2510 ignore_rest_of_line (); 2511 return; 2512 } 2513 input_line_pointer++; 2514 expression (&exp); 2515 if (exp.X_op == O_absent) 2516 { 2517 as_bad (_("missing expression in .localentry directive")); 2518 exp.X_op = O_constant; 2519 exp.X_add_number = 0; 2520 } 2521 *p = 0; 2522 sym = symbol_find_or_make (name); 2523 *p = c; 2524 2525 if (resolve_expression (&exp) 2526 && exp.X_op == O_constant) 2527 { 2528 unsigned int encoded, ok; 2529 2530 ok = 1; 2531 if (exp.X_add_number == 1 || exp.X_add_number == 7) 2532 encoded = exp.X_add_number << STO_PPC64_LOCAL_BIT; 2533 else 2534 { 2535 encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2536 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2537 { 2538 as_bad (_(".localentry expression for `%s' " 2539 "is not a valid power of 2"), S_GET_NAME (sym)); 2540 ok = 0; 2541 } 2542 } 2543 if (ok) 2544 { 2545 bfdsym = symbol_get_bfdsym (sym); 2546 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 2547 gas_assert (elfsym); 2548 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2549 elfsym->internal_elf_sym.st_other |= encoded; 2550 if (ppc_abiversion == 0) 2551 ppc_abiversion = 2; 2552 } 2553 } 2554 else 2555 as_bad (_(".localentry expression for `%s' " 2556 "does not evaluate to a constant"), S_GET_NAME (sym)); 2557 2558 demand_empty_rest_of_line (); 2559 } 2560 2561 /* Pseudo op to set ABI version. */ 2562 static void 2563 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2564 { 2565 expressionS exp; 2566 2567 expression (&exp); 2568 if (exp.X_op == O_absent) 2569 { 2570 as_bad (_("missing expression in .abiversion directive")); 2571 exp.X_op = O_constant; 2572 exp.X_add_number = 0; 2573 } 2574 2575 if (resolve_expression (&exp) 2576 && exp.X_op == O_constant) 2577 ppc_abiversion = exp.X_add_number; 2578 else 2579 as_bad (_(".abiversion expression does not evaluate to a constant")); 2580 demand_empty_rest_of_line (); 2581 } 2582 2583 /* Parse a .gnu_attribute directive. */ 2584 static void 2585 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) 2586 { 2587 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); 2588 2589 /* Check validity of defined powerpc tags. */ 2590 if (tag == Tag_GNU_Power_ABI_FP 2591 || tag == Tag_GNU_Power_ABI_Vector 2592 || tag == Tag_GNU_Power_ABI_Struct_Return) 2593 { 2594 unsigned int val; 2595 2596 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); 2597 2598 if ((tag == Tag_GNU_Power_ABI_FP && val > 15) 2599 || (tag == Tag_GNU_Power_ABI_Vector && val > 3) 2600 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) 2601 as_warn (_("unknown .gnu_attribute value")); 2602 } 2603 } 2604 2605 /* Set ABI version in output file. */ 2606 void 2607 ppc_elf_end (void) 2608 { 2609 if (ppc_obj64 && ppc_abiversion != 0) 2610 { 2611 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2612 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2613 } 2614 /* Any selection of opcodes based on ppc_cpu after gas has finished 2615 parsing the file is invalid. md_apply_fix and ppc_handle_align 2616 must select opcodes based on the machine in force at the point 2617 where the fixup or alignment frag was created, not the machine in 2618 force at the end of file. */ 2619 ppc_cpu = 0; 2620 } 2621 2622 /* Validate any relocations emitted for -mrelocatable, possibly adding 2623 fixups for word relocations in writable segments, so we can adjust 2624 them at runtime. */ 2625 static void 2626 ppc_elf_validate_fix (fixS *fixp, segT seg) 2627 { 2628 if (fixp->fx_done || fixp->fx_pcrel) 2629 return; 2630 2631 switch (shlib) 2632 { 2633 case SHLIB_NONE: 2634 case SHLIB_PIC: 2635 return; 2636 2637 case SHLIB_MRELOCATABLE: 2638 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2639 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2640 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2641 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2642 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2643 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2644 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2645 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2646 && (seg->flags & SEC_LOAD) != 0 2647 && strcmp (segment_name (seg), ".got2") != 0 2648 && strcmp (segment_name (seg), ".dtors") != 0 2649 && strcmp (segment_name (seg), ".ctors") != 0 2650 && strcmp (segment_name (seg), ".fixup") != 0 2651 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2652 && strcmp (segment_name (seg), ".eh_frame") != 0 2653 && strcmp (segment_name (seg), ".ex_shared") != 0) 2654 { 2655 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2656 || fixp->fx_r_type != BFD_RELOC_CTOR) 2657 { 2658 as_bad_where (fixp->fx_file, fixp->fx_line, 2659 _("relocation cannot be done when using -mrelocatable")); 2660 } 2661 } 2662 return; 2663 } 2664 } 2665 2666 /* Prevent elf_frob_file_before_adjust removing a weak undefined 2667 function descriptor sym if the corresponding code sym is used. */ 2668 2669 void 2670 ppc_frob_file_before_adjust (void) 2671 { 2672 symbolS *symp; 2673 asection *toc; 2674 2675 if (!ppc_obj64) 2676 return; 2677 2678 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2679 { 2680 const char *name; 2681 char *dotname; 2682 symbolS *dotsym; 2683 2684 name = S_GET_NAME (symp); 2685 if (name[0] == '.') 2686 continue; 2687 2688 if (! S_IS_WEAK (symp) 2689 || S_IS_DEFINED (symp)) 2690 continue; 2691 2692 dotname = concat (".", name, (char *) NULL); 2693 dotsym = symbol_find_noref (dotname, 1); 2694 free (dotname); 2695 if (dotsym != NULL && (symbol_used_p (dotsym) 2696 || symbol_used_in_reloc_p (dotsym))) 2697 symbol_mark_used (symp); 2698 2699 } 2700 2701 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2702 if (toc != NULL 2703 && toc_reloc_types != has_large_toc_reloc 2704 && bfd_section_size (toc) > 0x10000) 2705 as_warn (_("TOC section size exceeds 64k")); 2706 } 2707 2708 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2709 emitted. Other uses of .TOC. will cause the symbol to be marked 2710 with BSF_KEEP in md_apply_fix. */ 2711 2712 void 2713 ppc_elf_adjust_symtab (void) 2714 { 2715 if (ppc_obj64) 2716 { 2717 symbolS *symp; 2718 symp = symbol_find (".TOC."); 2719 if (symp != NULL) 2720 { 2721 asymbol *bsym = symbol_get_bfdsym (symp); 2722 if ((bsym->flags & BSF_KEEP) == 0) 2723 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2724 } 2725 } 2726 } 2727 #endif /* OBJ_ELF */ 2728 2729 #ifdef TE_PE 2730 2731 /* 2732 * Summary of parse_toc_entry. 2733 * 2734 * in: Input_line_pointer points to the '[' in one of: 2735 * 2736 * [toc] [tocv] [toc32] [toc64] 2737 * 2738 * Anything else is an error of one kind or another. 2739 * 2740 * out: 2741 * return value: success or failure 2742 * toc_kind: kind of toc reference 2743 * input_line_pointer: 2744 * success: first char after the ']' 2745 * failure: unchanged 2746 * 2747 * settings: 2748 * 2749 * [toc] - rv == success, toc_kind = default_toc 2750 * [tocv] - rv == success, toc_kind = data_in_toc 2751 * [toc32] - rv == success, toc_kind = must_be_32 2752 * [toc64] - rv == success, toc_kind = must_be_64 2753 * 2754 */ 2755 2756 enum toc_size_qualifier 2757 { 2758 default_toc, /* The toc cell constructed should be the system default size */ 2759 data_in_toc, /* This is a direct reference to a toc cell */ 2760 must_be_32, /* The toc cell constructed must be 32 bits wide */ 2761 must_be_64 /* The toc cell constructed must be 64 bits wide */ 2762 }; 2763 2764 static int 2765 parse_toc_entry (enum toc_size_qualifier *toc_kind) 2766 { 2767 char *start; 2768 char *toc_spec; 2769 char c; 2770 enum toc_size_qualifier t; 2771 2772 /* Save the input_line_pointer. */ 2773 start = input_line_pointer; 2774 2775 /* Skip over the '[' , and whitespace. */ 2776 ++input_line_pointer; 2777 SKIP_WHITESPACE (); 2778 2779 /* Find the spelling of the operand. */ 2780 c = get_symbol_name (&toc_spec); 2781 2782 if (strcmp (toc_spec, "toc") == 0) 2783 { 2784 t = default_toc; 2785 } 2786 else if (strcmp (toc_spec, "tocv") == 0) 2787 { 2788 t = data_in_toc; 2789 } 2790 else if (strcmp (toc_spec, "toc32") == 0) 2791 { 2792 t = must_be_32; 2793 } 2794 else if (strcmp (toc_spec, "toc64") == 0) 2795 { 2796 t = must_be_64; 2797 } 2798 else 2799 { 2800 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec); 2801 *input_line_pointer = c; 2802 input_line_pointer = start; 2803 return 0; 2804 } 2805 2806 /* Now find the ']'. */ 2807 *input_line_pointer = c; 2808 2809 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */ 2810 c = *input_line_pointer++; /* input_line_pointer->past char in c. */ 2811 2812 if (c != ']') 2813 { 2814 as_bad (_("syntax error: expected `]', found `%c'"), c); 2815 input_line_pointer = start; 2816 return 0; 2817 } 2818 2819 *toc_kind = t; 2820 return 1; 2821 } 2822 #endif 2823 2824 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2825 /* See whether a symbol is in the TOC section. */ 2826 2827 static int 2828 ppc_is_toc_sym (symbolS *sym) 2829 { 2830 #ifdef OBJ_XCOFF 2831 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2832 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2833 #endif 2834 #ifdef OBJ_ELF 2835 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2836 if (ppc_obj64) 2837 return strcmp (sname, ".toc") == 0; 2838 else 2839 return strcmp (sname, ".got") == 0; 2840 #endif 2841 } 2842 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2843 2844 2845 #ifdef OBJ_ELF 2846 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2847 static void 2848 ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2849 { 2850 unsigned int i; 2851 2852 /* Check we don't already exist. */ 2853 for (i = 0; i < ppc_apuinfo_num; i++) 2854 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2855 return; 2856 2857 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2858 { 2859 if (ppc_apuinfo_num_alloc == 0) 2860 { 2861 ppc_apuinfo_num_alloc = 4; 2862 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); 2863 } 2864 else 2865 { 2866 ppc_apuinfo_num_alloc += 4; 2867 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, 2868 ppc_apuinfo_num_alloc); 2869 } 2870 } 2871 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2872 } 2873 #undef APUID 2874 #endif 2875 2876 /* Various frobbings of labels and their addresses. */ 2877 2878 /* Symbols labelling the current insn. */ 2879 struct insn_label_list 2880 { 2881 struct insn_label_list *next; 2882 symbolS *label; 2883 }; 2884 2885 static struct insn_label_list *insn_labels; 2886 static struct insn_label_list *free_insn_labels; 2887 2888 static void 2889 ppc_record_label (symbolS *sym) 2890 { 2891 struct insn_label_list *l; 2892 2893 if (free_insn_labels == NULL) 2894 l = XNEW (struct insn_label_list); 2895 else 2896 { 2897 l = free_insn_labels; 2898 free_insn_labels = l->next; 2899 } 2900 2901 l->label = sym; 2902 l->next = insn_labels; 2903 insn_labels = l; 2904 } 2905 2906 static void 2907 ppc_clear_labels (void) 2908 { 2909 while (insn_labels != NULL) 2910 { 2911 struct insn_label_list *l = insn_labels; 2912 insn_labels = l->next; 2913 l->next = free_insn_labels; 2914 free_insn_labels = l; 2915 } 2916 } 2917 2918 void 2919 ppc_start_line_hook (void) 2920 { 2921 ppc_clear_labels (); 2922 } 2923 2924 void 2925 ppc_new_dot_label (symbolS *sym) 2926 { 2927 ppc_record_label (sym); 2928 #ifdef OBJ_XCOFF 2929 /* Anchor this label to the current csect for relocations. */ 2930 symbol_get_tc (sym)->within = ppc_current_csect; 2931 #endif 2932 } 2933 2934 void 2935 ppc_frob_label (symbolS *sym) 2936 { 2937 ppc_record_label (sym); 2938 2939 #ifdef OBJ_XCOFF 2940 /* Set the class of a label based on where it is defined. This handles 2941 symbols without suffixes. Also, move the symbol so that it follows 2942 the csect symbol. */ 2943 if (ppc_current_csect != (symbolS *) NULL) 2944 { 2945 if (symbol_get_tc (sym)->symbol_class == -1) 2946 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 2947 2948 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 2949 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 2950 &symbol_rootP, &symbol_lastP); 2951 symbol_get_tc (ppc_current_csect)->within = sym; 2952 symbol_get_tc (sym)->within = ppc_current_csect; 2953 } 2954 #endif 2955 2956 #ifdef OBJ_ELF 2957 dwarf2_emit_label (sym); 2958 #endif 2959 } 2960 2961 /* We need to keep a list of fixups. We can't simply generate them as 2962 we go, because that would require us to first create the frag, and 2963 that would screw up references to ``.''. */ 2964 2965 struct ppc_fixup 2966 { 2967 expressionS exp; 2968 int opindex; 2969 bfd_reloc_code_real_type reloc; 2970 }; 2971 2972 #define MAX_INSN_FIXUPS (5) 2973 2974 /* Return the field size operated on by RELOC, and whether it is 2975 pc-relative in PC_RELATIVE. */ 2976 2977 static unsigned int 2978 fixup_size (bfd_reloc_code_real_type reloc, bfd_boolean *pc_relative) 2979 { 2980 unsigned int size = 0; 2981 bfd_boolean pcrel = FALSE; 2982 2983 switch (reloc) 2984 { 2985 /* This switch statement must handle all BFD_RELOC values 2986 possible in instruction fixups. As is, it handles all 2987 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c, 2988 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c. 2989 Overkill since data and marker relocs need not be handled 2990 here, but this way we can be sure a needed fixup reloc isn't 2991 accidentally omitted. */ 2992 case BFD_RELOC_PPC_EMB_MRKREF: 2993 case BFD_RELOC_VTABLE_ENTRY: 2994 case BFD_RELOC_VTABLE_INHERIT: 2995 break; 2996 2997 case BFD_RELOC_8: 2998 size = 1; 2999 break; 3000 3001 case BFD_RELOC_16: 3002 case BFD_RELOC_16_BASEREL: 3003 case BFD_RELOC_16_GOTOFF: 3004 case BFD_RELOC_GPREL16: 3005 case BFD_RELOC_HI16: 3006 case BFD_RELOC_HI16_BASEREL: 3007 case BFD_RELOC_HI16_GOTOFF: 3008 case BFD_RELOC_HI16_PLTOFF: 3009 case BFD_RELOC_HI16_S: 3010 case BFD_RELOC_HI16_S_BASEREL: 3011 case BFD_RELOC_HI16_S_GOTOFF: 3012 case BFD_RELOC_HI16_S_PLTOFF: 3013 case BFD_RELOC_LO16: 3014 case BFD_RELOC_LO16_BASEREL: 3015 case BFD_RELOC_LO16_GOTOFF: 3016 case BFD_RELOC_LO16_PLTOFF: 3017 case BFD_RELOC_PPC64_ADDR16_DS: 3018 case BFD_RELOC_PPC64_ADDR16_HIGH: 3019 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3020 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 3021 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 3022 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 3023 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 3024 case BFD_RELOC_PPC64_ADDR16_LO_DS: 3025 case BFD_RELOC_PPC64_DTPREL16_DS: 3026 case BFD_RELOC_PPC64_DTPREL16_HIGH: 3027 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 3028 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 3029 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 3030 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 3031 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 3032 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 3033 case BFD_RELOC_PPC64_GOT16_DS: 3034 case BFD_RELOC_PPC64_GOT16_LO_DS: 3035 case BFD_RELOC_PPC64_HIGHER: 3036 case BFD_RELOC_PPC64_HIGHER_S: 3037 case BFD_RELOC_PPC64_HIGHEST: 3038 case BFD_RELOC_PPC64_HIGHEST_S: 3039 case BFD_RELOC_PPC64_PLT16_LO_DS: 3040 case BFD_RELOC_PPC64_PLTGOT16: 3041 case BFD_RELOC_PPC64_PLTGOT16_DS: 3042 case BFD_RELOC_PPC64_PLTGOT16_HA: 3043 case BFD_RELOC_PPC64_PLTGOT16_HI: 3044 case BFD_RELOC_PPC64_PLTGOT16_LO: 3045 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 3046 case BFD_RELOC_PPC64_SECTOFF_DS: 3047 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 3048 case BFD_RELOC_PPC64_TOC16_DS: 3049 case BFD_RELOC_PPC64_TOC16_HA: 3050 case BFD_RELOC_PPC64_TOC16_HI: 3051 case BFD_RELOC_PPC64_TOC16_LO: 3052 case BFD_RELOC_PPC64_TOC16_LO_DS: 3053 case BFD_RELOC_PPC64_TPREL16_DS: 3054 case BFD_RELOC_PPC64_TPREL16_HIGH: 3055 case BFD_RELOC_PPC64_TPREL16_HIGHA: 3056 case BFD_RELOC_PPC64_TPREL16_HIGHER: 3057 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 3058 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 3059 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 3060 case BFD_RELOC_PPC64_TPREL16_LO_DS: 3061 #ifdef OBJ_XCOFF 3062 case BFD_RELOC_PPC_BA16: 3063 #endif 3064 case BFD_RELOC_PPC_DTPREL16: 3065 case BFD_RELOC_PPC_DTPREL16_HA: 3066 case BFD_RELOC_PPC_DTPREL16_HI: 3067 case BFD_RELOC_PPC_DTPREL16_LO: 3068 case BFD_RELOC_PPC_EMB_NADDR16: 3069 case BFD_RELOC_PPC_EMB_NADDR16_HA: 3070 case BFD_RELOC_PPC_EMB_NADDR16_HI: 3071 case BFD_RELOC_PPC_EMB_NADDR16_LO: 3072 case BFD_RELOC_PPC_EMB_RELSDA: 3073 case BFD_RELOC_PPC_EMB_RELSEC16: 3074 case BFD_RELOC_PPC_EMB_RELST_LO: 3075 case BFD_RELOC_PPC_EMB_RELST_HI: 3076 case BFD_RELOC_PPC_EMB_RELST_HA: 3077 case BFD_RELOC_PPC_EMB_SDA2I16: 3078 case BFD_RELOC_PPC_EMB_SDA2REL: 3079 case BFD_RELOC_PPC_EMB_SDAI16: 3080 case BFD_RELOC_PPC_GOT_DTPREL16: 3081 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 3082 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 3083 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3084 case BFD_RELOC_PPC_GOT_TLSGD16: 3085 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 3086 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 3087 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 3088 case BFD_RELOC_PPC_GOT_TLSLD16: 3089 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 3090 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 3091 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 3092 case BFD_RELOC_PPC_GOT_TPREL16: 3093 case BFD_RELOC_PPC_GOT_TPREL16_HA: 3094 case BFD_RELOC_PPC_GOT_TPREL16_HI: 3095 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3096 case BFD_RELOC_PPC_TOC16: 3097 case BFD_RELOC_PPC_TPREL16: 3098 case BFD_RELOC_PPC_TPREL16_HA: 3099 case BFD_RELOC_PPC_TPREL16_HI: 3100 case BFD_RELOC_PPC_TPREL16_LO: 3101 size = 2; 3102 break; 3103 3104 case BFD_RELOC_16_PCREL: 3105 case BFD_RELOC_HI16_PCREL: 3106 case BFD_RELOC_HI16_S_PCREL: 3107 case BFD_RELOC_LO16_PCREL: 3108 case BFD_RELOC_PPC64_REL16_HIGH: 3109 case BFD_RELOC_PPC64_REL16_HIGHA: 3110 case BFD_RELOC_PPC64_REL16_HIGHER: 3111 case BFD_RELOC_PPC64_REL16_HIGHER34: 3112 case BFD_RELOC_PPC64_REL16_HIGHERA: 3113 case BFD_RELOC_PPC64_REL16_HIGHERA34: 3114 case BFD_RELOC_PPC64_REL16_HIGHEST: 3115 case BFD_RELOC_PPC64_REL16_HIGHEST34: 3116 case BFD_RELOC_PPC64_REL16_HIGHESTA: 3117 case BFD_RELOC_PPC64_REL16_HIGHESTA34: 3118 #ifdef OBJ_XCOFF 3119 case BFD_RELOC_PPC_B16: 3120 #endif 3121 case BFD_RELOC_PPC_VLE_REL8: 3122 size = 2; 3123 pcrel = TRUE; 3124 break; 3125 3126 case BFD_RELOC_16_GOT_PCREL: /* coff reloc, bad name re size. */ 3127 case BFD_RELOC_32: 3128 case BFD_RELOC_32_GOTOFF: 3129 case BFD_RELOC_32_PLTOFF: 3130 #ifdef OBJ_XCOFF 3131 case BFD_RELOC_CTOR: 3132 #endif 3133 case BFD_RELOC_PPC64_ENTRY: 3134 case BFD_RELOC_PPC_16DX_HA: 3135 #ifndef OBJ_XCOFF 3136 case BFD_RELOC_PPC_BA16: 3137 #endif 3138 case BFD_RELOC_PPC_BA16_BRNTAKEN: 3139 case BFD_RELOC_PPC_BA16_BRTAKEN: 3140 case BFD_RELOC_PPC_BA26: 3141 case BFD_RELOC_PPC_EMB_BIT_FLD: 3142 case BFD_RELOC_PPC_EMB_NADDR32: 3143 case BFD_RELOC_PPC_EMB_SDA21: 3144 case BFD_RELOC_PPC_TLS: 3145 case BFD_RELOC_PPC_TLSGD: 3146 case BFD_RELOC_PPC_TLSLD: 3147 case BFD_RELOC_PPC_VLE_HA16A: 3148 case BFD_RELOC_PPC_VLE_HA16D: 3149 case BFD_RELOC_PPC_VLE_HI16A: 3150 case BFD_RELOC_PPC_VLE_HI16D: 3151 case BFD_RELOC_PPC_VLE_LO16A: 3152 case BFD_RELOC_PPC_VLE_LO16D: 3153 case BFD_RELOC_PPC_VLE_SDA21: 3154 case BFD_RELOC_PPC_VLE_SDA21_LO: 3155 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3156 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 3157 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3158 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 3159 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3160 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 3161 case BFD_RELOC_PPC64_TLS_PCREL: 3162 case BFD_RELOC_RVA: 3163 size = 4; 3164 break; 3165 3166 case BFD_RELOC_24_PLT_PCREL: 3167 case BFD_RELOC_32_PCREL: 3168 case BFD_RELOC_32_PLT_PCREL: 3169 case BFD_RELOC_PPC64_REL24_NOTOC: 3170 #ifndef OBJ_XCOFF 3171 case BFD_RELOC_PPC_B16: 3172 #endif 3173 case BFD_RELOC_PPC_B16_BRNTAKEN: 3174 case BFD_RELOC_PPC_B16_BRTAKEN: 3175 case BFD_RELOC_PPC_B26: 3176 case BFD_RELOC_PPC_LOCAL24PC: 3177 case BFD_RELOC_PPC_REL16DX_HA: 3178 case BFD_RELOC_PPC_VLE_REL15: 3179 case BFD_RELOC_PPC_VLE_REL24: 3180 size = 4; 3181 pcrel = TRUE; 3182 break; 3183 3184 #ifndef OBJ_XCOFF 3185 case BFD_RELOC_CTOR: 3186 #endif 3187 case BFD_RELOC_PPC_COPY: 3188 case BFD_RELOC_PPC_DTPMOD: 3189 case BFD_RELOC_PPC_DTPREL: 3190 case BFD_RELOC_PPC_GLOB_DAT: 3191 case BFD_RELOC_PPC_TPREL: 3192 size = ppc_obj64 ? 8 : 4; 3193 break; 3194 3195 case BFD_RELOC_64: 3196 case BFD_RELOC_64_PLTOFF: 3197 case BFD_RELOC_PPC64_ADDR64_LOCAL: 3198 case BFD_RELOC_PPC64_D28: 3199 case BFD_RELOC_PPC64_D34: 3200 case BFD_RELOC_PPC64_D34_LO: 3201 case BFD_RELOC_PPC64_D34_HI30: 3202 case BFD_RELOC_PPC64_D34_HA30: 3203 case BFD_RELOC_PPC64_TPREL34: 3204 case BFD_RELOC_PPC64_DTPREL34: 3205 case BFD_RELOC_PPC64_TOC: 3206 size = 8; 3207 break; 3208 3209 case BFD_RELOC_64_PCREL: 3210 case BFD_RELOC_64_PLT_PCREL: 3211 case BFD_RELOC_PPC64_GOT_PCREL34: 3212 case BFD_RELOC_PPC64_GOT_TLSGD34: 3213 case BFD_RELOC_PPC64_GOT_TLSLD34: 3214 case BFD_RELOC_PPC64_GOT_TPREL34: 3215 case BFD_RELOC_PPC64_GOT_DTPREL34: 3216 case BFD_RELOC_PPC64_PCREL28: 3217 case BFD_RELOC_PPC64_PCREL34: 3218 case BFD_RELOC_PPC64_PLT_PCREL34: 3219 size = 8; 3220 pcrel = TRUE; 3221 break; 3222 3223 default: 3224 abort (); 3225 } 3226 3227 if (ENABLE_CHECKING) 3228 { 3229 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); 3230 if (reloc_howto != NULL 3231 && (size != bfd_get_reloc_size (reloc_howto) 3232 || pcrel != reloc_howto->pc_relative)) 3233 { 3234 as_bad (_("%s howto doesn't match size/pcrel in gas"), 3235 reloc_howto->name); 3236 abort (); 3237 } 3238 } 3239 *pc_relative = pcrel; 3240 return size; 3241 } 3242 3243 #ifdef OBJ_ELF 3244 /* If we have parsed a call to __tls_get_addr, parse an argument like 3245 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg 3246 is successfully parsed, *STR is updated past the trailing 3247 parenthesis and trailing white space, and *TLS_FIX contains the 3248 reloc and arg expression. */ 3249 3250 static int 3251 parse_tls_arg (char **str, const expressionS *exp, struct ppc_fixup *tls_fix) 3252 { 3253 const char *sym_name = S_GET_NAME (exp->X_add_symbol); 3254 if (sym_name[0] == '.') 3255 ++sym_name; 3256 3257 tls_fix->reloc = BFD_RELOC_NONE; 3258 if (strcasecmp (sym_name, "__tls_get_addr") == 0) 3259 { 3260 char *hold = input_line_pointer; 3261 input_line_pointer = *str + 1; 3262 expression (&tls_fix->exp); 3263 if (tls_fix->exp.X_op == O_symbol) 3264 { 3265 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3266 tls_fix->reloc = BFD_RELOC_PPC_TLSGD; 3267 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3268 tls_fix->reloc = BFD_RELOC_PPC_TLSLD; 3269 if (tls_fix->reloc != BFD_RELOC_NONE) 3270 { 3271 input_line_pointer += 7; 3272 SKIP_WHITESPACE (); 3273 *str = input_line_pointer; 3274 } 3275 } 3276 input_line_pointer = hold; 3277 } 3278 return tls_fix->reloc != BFD_RELOC_NONE; 3279 } 3280 #endif 3281 3282 /* This routine is called for each instruction to be assembled. */ 3283 3284 void 3285 md_assemble (char *str) 3286 { 3287 char *s; 3288 const struct powerpc_opcode *opcode; 3289 uint64_t insn; 3290 const unsigned char *opindex_ptr; 3291 int need_paren; 3292 int next_opindex; 3293 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 3294 int fc; 3295 char *f; 3296 int addr_mask; 3297 int i; 3298 unsigned int insn_length; 3299 3300 /* Get the opcode. */ 3301 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 3302 ; 3303 if (*s != '\0') 3304 *s++ = '\0'; 3305 3306 /* Look up the opcode in the hash table. */ 3307 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str); 3308 if (opcode == (const struct powerpc_opcode *) NULL) 3309 { 3310 const struct powerpc_macro *macro; 3311 3312 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str); 3313 if (macro == (const struct powerpc_macro *) NULL) 3314 as_bad (_("unrecognized opcode: `%s'"), str); 3315 else 3316 ppc_macro (s, macro); 3317 3318 ppc_clear_labels (); 3319 return; 3320 } 3321 3322 insn = opcode->opcode; 3323 3324 str = s; 3325 while (ISSPACE (*str)) 3326 ++str; 3327 3328 /* PowerPC operands are just expressions. The only real issue is 3329 that a few operand types are optional. If an instruction has 3330 multiple optional operands and one is omitted, then all optional 3331 operands past the first omitted one must also be omitted. */ 3332 int num_optional_operands = 0; 3333 int num_optional_provided = 0; 3334 3335 /* Gather the operands. */ 3336 need_paren = 0; 3337 next_opindex = 0; 3338 fc = 0; 3339 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 3340 { 3341 const struct powerpc_operand *operand; 3342 const char *errmsg; 3343 char *hold; 3344 expressionS ex; 3345 char endc; 3346 3347 if (next_opindex == 0) 3348 operand = &powerpc_operands[*opindex_ptr]; 3349 else 3350 { 3351 operand = &powerpc_operands[next_opindex]; 3352 next_opindex = 0; 3353 } 3354 errmsg = NULL; 3355 3356 /* If this is an optional operand, and we are skipping it, just 3357 insert the default value, usually a zero. */ 3358 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 3359 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) 3360 { 3361 if (num_optional_operands == 0) 3362 { 3363 const unsigned char *optr; 3364 int total = 0; 3365 int provided = 0; 3366 int omitted; 3367 3368 s = str; 3369 for (optr = opindex_ptr; *optr != 0; optr++) 3370 { 3371 const struct powerpc_operand *op; 3372 op = &powerpc_operands[*optr]; 3373 3374 ++total; 3375 3376 if ((op->flags & PPC_OPERAND_OPTIONAL) != 0 3377 && !((op->flags & PPC_OPERAND_OPTIONAL32) != 0 3378 && ppc_obj64)) 3379 ++num_optional_operands; 3380 3381 if (s != NULL && *s != '\0') 3382 { 3383 ++provided; 3384 3385 /* Look for the start of the next operand. */ 3386 if ((op->flags & PPC_OPERAND_PARENS) != 0) 3387 s = strpbrk (s, "(,"); 3388 else 3389 s = strchr (s, ','); 3390 3391 if (s != NULL) 3392 ++s; 3393 } 3394 } 3395 omitted = total - provided; 3396 num_optional_provided = num_optional_operands - omitted; 3397 } 3398 if (--num_optional_provided < 0) 3399 { 3400 int64_t val = ppc_optional_operand_value (operand, insn, ppc_cpu, 3401 num_optional_provided); 3402 if (operand->insert) 3403 { 3404 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); 3405 if (errmsg != (const char *) NULL) 3406 as_bad ("%s", errmsg); 3407 } 3408 else if (operand->shift >= 0) 3409 insn |= (val & operand->bitm) << operand->shift; 3410 else 3411 insn |= (val & operand->bitm) >> -operand->shift; 3412 3413 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 3414 next_opindex = *opindex_ptr + 1; 3415 continue; 3416 } 3417 } 3418 3419 /* Gather the operand. */ 3420 hold = input_line_pointer; 3421 input_line_pointer = str; 3422 3423 #ifdef TE_PE 3424 if (*input_line_pointer == '[') 3425 { 3426 /* We are expecting something like the second argument here: 3427 * 3428 * lwz r4,[toc].GS.0.static_int(rtoc) 3429 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^ 3430 * The argument following the `]' must be a symbol name, and the 3431 * register must be the toc register: 'rtoc' or '2' 3432 * 3433 * The effect is to 0 as the displacement field 3434 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or 3435 * the appropriate variation) reloc against it based on the symbol. 3436 * The linker will build the toc, and insert the resolved toc offset. 3437 * 3438 * Note: 3439 * o The size of the toc entry is currently assumed to be 3440 * 32 bits. This should not be assumed to be a hard coded 3441 * number. 3442 * o In an effort to cope with a change from 32 to 64 bits, 3443 * there are also toc entries that are specified to be 3444 * either 32 or 64 bits: 3445 * lwz r4,[toc32].GS.0.static_int(rtoc) 3446 * lwz r4,[toc64].GS.0.static_int(rtoc) 3447 * These demand toc entries of the specified size, and the 3448 * instruction probably requires it. 3449 */ 3450 3451 int valid_toc; 3452 enum toc_size_qualifier toc_kind; 3453 bfd_reloc_code_real_type toc_reloc; 3454 3455 /* Go parse off the [tocXX] part. */ 3456 valid_toc = parse_toc_entry (&toc_kind); 3457 3458 if (!valid_toc) 3459 { 3460 ignore_rest_of_line (); 3461 break; 3462 } 3463 3464 /* Now get the symbol following the ']'. */ 3465 expression (&ex); 3466 3467 switch (toc_kind) 3468 { 3469 case default_toc: 3470 /* In this case, we may not have seen the symbol yet, 3471 since it is allowed to appear on a .extern or .globl 3472 or just be a label in the .data section. */ 3473 toc_reloc = BFD_RELOC_PPC_TOC16; 3474 break; 3475 case data_in_toc: 3476 /* 1. The symbol must be defined and either in the toc 3477 section, or a global. 3478 2. The reloc generated must have the TOCDEFN flag set 3479 in upper bit mess of the reloc type. 3480 FIXME: It's a little confusing what the tocv 3481 qualifier can be used for. At the very least, I've 3482 seen three uses, only one of which I'm sure I can 3483 explain. */ 3484 if (ex.X_op == O_symbol) 3485 { 3486 gas_assert (ex.X_add_symbol != NULL); 3487 if (symbol_get_bfdsym (ex.X_add_symbol)->section 3488 != tocdata_section) 3489 { 3490 as_bad (_("[tocv] symbol is not a toc symbol")); 3491 } 3492 } 3493 3494 toc_reloc = BFD_RELOC_PPC_TOC16; 3495 break; 3496 case must_be_32: 3497 /* FIXME: these next two specifically specify 32/64 bit 3498 toc entries. We don't support them today. Is this 3499 the right way to say that? */ 3500 toc_reloc = BFD_RELOC_NONE; 3501 as_bad (_("unimplemented toc32 expression modifier")); 3502 break; 3503 case must_be_64: 3504 /* FIXME: see above. */ 3505 toc_reloc = BFD_RELOC_NONE; 3506 as_bad (_("unimplemented toc64 expression modifier")); 3507 break; 3508 default: 3509 fprintf (stderr, 3510 _("Unexpected return value [%d] from parse_toc_entry!\n"), 3511 toc_kind); 3512 abort (); 3513 break; 3514 } 3515 3516 /* We need to generate a fixup for this expression. */ 3517 if (fc >= MAX_INSN_FIXUPS) 3518 as_fatal (_("too many fixups")); 3519 3520 fixups[fc].reloc = toc_reloc; 3521 fixups[fc].exp = ex; 3522 fixups[fc].opindex = *opindex_ptr; 3523 ++fc; 3524 3525 /* Ok. We've set up the fixup for the instruction. Now make it 3526 look like the constant 0 was found here. */ 3527 ex.X_unsigned = 1; 3528 ex.X_op = O_constant; 3529 ex.X_add_number = 0; 3530 ex.X_add_symbol = NULL; 3531 ex.X_op_symbol = NULL; 3532 } 3533 3534 else 3535 #endif /* TE_PE */ 3536 { 3537 if ((reg_names_p 3538 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) 3539 || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) 3540 || !register_name (&ex)) 3541 { 3542 char save_lex = lex_type['%']; 3543 3544 if (((operand->flags & PPC_OPERAND_CR_REG) != 0) 3545 || (operand->flags & PPC_OPERAND_CR_BIT) != 0) 3546 { 3547 cr_operand = TRUE; 3548 lex_type['%'] |= LEX_BEGIN_NAME; 3549 } 3550 expression (&ex); 3551 cr_operand = FALSE; 3552 lex_type['%'] = save_lex; 3553 } 3554 } 3555 3556 str = input_line_pointer; 3557 input_line_pointer = hold; 3558 3559 if (ex.X_op == O_illegal) 3560 as_bad (_("illegal operand")); 3561 else if (ex.X_op == O_absent) 3562 as_bad (_("missing operand")); 3563 else if (ex.X_op == O_register) 3564 { 3565 if ((ex.X_md 3566 & ~operand->flags 3567 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR 3568 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG 3569 | PPC_OPERAND_SPR | PPC_OPERAND_GQR)) != 0 3570 && !((ex.X_md & PPC_OPERAND_GPR) != 0 3571 && ex.X_add_number != 0 3572 && (operand->flags & PPC_OPERAND_GPR_0) != 0)) 3573 as_warn (_("invalid register expression")); 3574 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3575 ppc_cpu, (char *) NULL, 0); 3576 } 3577 else if (ex.X_op == O_constant) 3578 { 3579 #ifdef OBJ_ELF 3580 /* Allow @HA, @L, @H on constants. */ 3581 bfd_reloc_code_real_type reloc; 3582 char *orig_str = str; 3583 3584 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3585 switch (reloc) 3586 { 3587 default: 3588 str = orig_str; 3589 break; 3590 3591 case BFD_RELOC_LO16: 3592 ex.X_add_number &= 0xffff; 3593 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3594 ex.X_add_number = SEX16 (ex.X_add_number); 3595 break; 3596 3597 case BFD_RELOC_HI16: 3598 if (REPORT_OVERFLOW_HI && ppc_obj64) 3599 { 3600 /* PowerPC64 @h is tested for overflow. */ 3601 ex.X_add_number = (addressT) ex.X_add_number >> 16; 3602 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3603 { 3604 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 3605 ex.X_add_number 3606 = ((addressT) ex.X_add_number ^ sign) - sign; 3607 } 3608 break; 3609 } 3610 /* Fallthru */ 3611 3612 case BFD_RELOC_PPC64_ADDR16_HIGH: 3613 ex.X_add_number = PPC_HI (ex.X_add_number); 3614 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3615 ex.X_add_number = SEX16 (ex.X_add_number); 3616 break; 3617 3618 case BFD_RELOC_HI16_S: 3619 if (REPORT_OVERFLOW_HI && ppc_obj64) 3620 { 3621 /* PowerPC64 @ha is tested for overflow. */ 3622 ex.X_add_number 3623 = ((addressT) ex.X_add_number + 0x8000) >> 16; 3624 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3625 { 3626 addressT sign = (((addressT) -1 >> 16) + 1) >> 1; 3627 ex.X_add_number 3628 = ((addressT) ex.X_add_number ^ sign) - sign; 3629 } 3630 break; 3631 } 3632 /* Fallthru */ 3633 3634 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3635 ex.X_add_number = PPC_HA (ex.X_add_number); 3636 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3637 ex.X_add_number = SEX16 (ex.X_add_number); 3638 break; 3639 3640 case BFD_RELOC_PPC64_HIGHER: 3641 ex.X_add_number = PPC_HIGHER (ex.X_add_number); 3642 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3643 ex.X_add_number = SEX16 (ex.X_add_number); 3644 break; 3645 3646 case BFD_RELOC_PPC64_HIGHER_S: 3647 ex.X_add_number = PPC_HIGHERA (ex.X_add_number); 3648 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3649 ex.X_add_number = SEX16 (ex.X_add_number); 3650 break; 3651 3652 case BFD_RELOC_PPC64_HIGHEST: 3653 ex.X_add_number = PPC_HIGHEST (ex.X_add_number); 3654 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3655 ex.X_add_number = SEX16 (ex.X_add_number); 3656 break; 3657 3658 case BFD_RELOC_PPC64_HIGHEST_S: 3659 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number); 3660 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3661 ex.X_add_number = SEX16 (ex.X_add_number); 3662 break; 3663 } 3664 #endif /* OBJ_ELF */ 3665 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3666 ppc_cpu, (char *) NULL, 0); 3667 } 3668 else 3669 { 3670 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3671 #ifdef OBJ_ELF 3672 /* Look for a __tls_get_addr arg using the insane old syntax. */ 3673 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 3674 && parse_tls_arg (&str, &ex, &fixups[fc])) 3675 { 3676 fixups[fc].opindex = *opindex_ptr; 3677 ++fc; 3678 } 3679 3680 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3681 { 3682 /* If VLE-mode convert LO/HI/HA relocations. */ 3683 if (opcode->flags & PPC_OPCODE_VLE) 3684 { 3685 uint64_t tmp_insn = insn & opcode->mask; 3686 3687 int use_a_reloc = (tmp_insn == E_OR2I_INSN 3688 || tmp_insn == E_AND2I_DOT_INSN 3689 || tmp_insn == E_OR2IS_INSN 3690 || tmp_insn == E_LI_INSN 3691 || tmp_insn == E_LIS_INSN 3692 || tmp_insn == E_AND2IS_DOT_INSN); 3693 3694 3695 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3696 || tmp_insn == E_ADD2IS_INSN 3697 || tmp_insn == E_CMP16I_INSN 3698 || tmp_insn == E_MULL2I_INSN 3699 || tmp_insn == E_CMPL16I_INSN 3700 || tmp_insn == E_CMPH16I_INSN 3701 || tmp_insn == E_CMPHL16I_INSN); 3702 3703 switch (reloc) 3704 { 3705 default: 3706 break; 3707 3708 case BFD_RELOC_PPC_EMB_SDA21: 3709 reloc = BFD_RELOC_PPC_VLE_SDA21; 3710 break; 3711 3712 case BFD_RELOC_LO16: 3713 if (use_d_reloc) 3714 reloc = BFD_RELOC_PPC_VLE_LO16D; 3715 else if (use_a_reloc) 3716 reloc = BFD_RELOC_PPC_VLE_LO16A; 3717 break; 3718 3719 case BFD_RELOC_HI16: 3720 if (use_d_reloc) 3721 reloc = BFD_RELOC_PPC_VLE_HI16D; 3722 else if (use_a_reloc) 3723 reloc = BFD_RELOC_PPC_VLE_HI16A; 3724 break; 3725 3726 case BFD_RELOC_HI16_S: 3727 if (use_d_reloc) 3728 reloc = BFD_RELOC_PPC_VLE_HA16D; 3729 else if (use_a_reloc) 3730 reloc = BFD_RELOC_PPC_VLE_HA16A; 3731 break; 3732 3733 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3734 if (use_d_reloc) 3735 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3736 break; 3737 3738 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3739 if (use_d_reloc) 3740 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3741 break; 3742 3743 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3744 if (use_d_reloc) 3745 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3746 break; 3747 } 3748 } 3749 3750 /* TLS and other tweaks. */ 3751 switch (reloc) 3752 { 3753 default: 3754 break; 3755 3756 case BFD_RELOC_PPC_TLS: 3757 case BFD_RELOC_PPC64_TLS_PCREL: 3758 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3759 as_bad (_("@tls may not be used with \"%s\" operands"), 3760 opcode->name); 3761 else if (operand->shift != 11) 3762 as_bad (_("@tls may only be used in last operand")); 3763 else 3764 insn = ppc_insert_operand (insn, operand, 3765 ppc_obj64 ? 13 : 2, 3766 ppc_cpu, (char *) NULL, 0); 3767 break; 3768 3769 /* We'll only use the 32 (or 64) bit form of these relocations 3770 in constants. Instructions get the 16 or 34 bit form. */ 3771 case BFD_RELOC_PPC_DTPREL: 3772 if (operand->bitm == 0x3ffffffffULL) 3773 reloc = BFD_RELOC_PPC64_DTPREL34; 3774 else 3775 reloc = BFD_RELOC_PPC_DTPREL16; 3776 break; 3777 3778 case BFD_RELOC_PPC_TPREL: 3779 if (operand->bitm == 0x3ffffffffULL) 3780 reloc = BFD_RELOC_PPC64_TPREL34; 3781 else 3782 reloc = BFD_RELOC_PPC_TPREL16; 3783 break; 3784 3785 case BFD_RELOC_PPC64_PCREL34: 3786 if (operand->bitm == 0xfffffffULL) 3787 { 3788 reloc = BFD_RELOC_PPC64_PCREL28; 3789 break; 3790 } 3791 /* Fall through. */ 3792 case BFD_RELOC_PPC64_GOT_PCREL34: 3793 case BFD_RELOC_PPC64_PLT_PCREL34: 3794 case BFD_RELOC_PPC64_GOT_TLSGD34: 3795 case BFD_RELOC_PPC64_GOT_TLSLD34: 3796 case BFD_RELOC_PPC64_GOT_TPREL34: 3797 case BFD_RELOC_PPC64_GOT_DTPREL34: 3798 if (operand->bitm != 0x3ffffffffULL 3799 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3800 as_warn (_("%s unsupported on this instruction"), "@pcrel"); 3801 break; 3802 3803 case BFD_RELOC_LO16: 3804 if (operand->bitm == 0x3ffffffffULL 3805 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3806 reloc = BFD_RELOC_PPC64_D34_LO; 3807 else if ((operand->bitm | 0xf) != 0xffff 3808 || operand->shift != 0 3809 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3810 as_warn (_("%s unsupported on this instruction"), "@l"); 3811 break; 3812 3813 case BFD_RELOC_HI16: 3814 if (operand->bitm == 0x3ffffffffULL 3815 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3816 reloc = BFD_RELOC_PPC64_D34_HI30; 3817 else if (operand->bitm != 0xffff 3818 || operand->shift != 0 3819 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3820 as_warn (_("%s unsupported on this instruction"), "@h"); 3821 break; 3822 3823 case BFD_RELOC_HI16_S: 3824 if (operand->bitm == 0x3ffffffffULL 3825 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3826 reloc = BFD_RELOC_PPC64_D34_HA30; 3827 else if (operand->bitm == 0xffff 3828 && operand->shift == (int) PPC_OPSHIFT_INV 3829 && opcode->opcode == (19 << 26) + (2 << 1)) 3830 /* addpcis. */ 3831 reloc = BFD_RELOC_PPC_16DX_HA; 3832 else if (operand->bitm != 0xffff 3833 || operand->shift != 0 3834 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3835 as_warn (_("%s unsupported on this instruction"), "@ha"); 3836 } 3837 } 3838 #endif /* OBJ_ELF */ 3839 3840 if (reloc != BFD_RELOC_NONE) 3841 ; 3842 /* Determine a BFD reloc value based on the operand information. 3843 We are only prepared to turn a few of the operands into 3844 relocs. */ 3845 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3846 | PPC_OPERAND_ABSOLUTE)) != 0 3847 && operand->bitm == 0x3fffffc 3848 && operand->shift == 0) 3849 reloc = BFD_RELOC_PPC_B26; 3850 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3851 | PPC_OPERAND_ABSOLUTE)) != 0 3852 && operand->bitm == 0xfffc 3853 && operand->shift == 0) 3854 reloc = BFD_RELOC_PPC_B16; 3855 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3856 && operand->bitm == 0x1fe 3857 && operand->shift == -1) 3858 reloc = BFD_RELOC_PPC_VLE_REL8; 3859 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3860 && operand->bitm == 0xfffe 3861 && operand->shift == 0) 3862 reloc = BFD_RELOC_PPC_VLE_REL15; 3863 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3864 && operand->bitm == 0x1fffffe 3865 && operand->shift == 0) 3866 reloc = BFD_RELOC_PPC_VLE_REL24; 3867 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3868 && (operand->bitm & 0xfff0) == 0xfff0 3869 && operand->shift == 0) 3870 { 3871 reloc = BFD_RELOC_16; 3872 #if defined OBJ_XCOFF || defined OBJ_ELF 3873 /* Note: the symbol may be not yet defined. */ 3874 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3875 && ppc_is_toc_sym (ex.X_add_symbol)) 3876 { 3877 reloc = BFD_RELOC_PPC_TOC16; 3878 #ifdef OBJ_ELF 3879 as_warn (_("assuming %s on symbol"), 3880 ppc_obj64 ? "@toc" : "@xgot"); 3881 #endif 3882 } 3883 #endif 3884 } 3885 else if (operand->bitm == 0x3ffffffffULL) 3886 reloc = BFD_RELOC_PPC64_D34; 3887 else if (operand->bitm == 0xfffffffULL) 3888 reloc = BFD_RELOC_PPC64_D28; 3889 3890 /* For the absolute forms of branches, convert the PC 3891 relative form back into the absolute. */ 3892 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3893 { 3894 switch (reloc) 3895 { 3896 case BFD_RELOC_PPC_B26: 3897 reloc = BFD_RELOC_PPC_BA26; 3898 break; 3899 case BFD_RELOC_PPC_B16: 3900 reloc = BFD_RELOC_PPC_BA16; 3901 break; 3902 #ifdef OBJ_ELF 3903 case BFD_RELOC_PPC_B16_BRTAKEN: 3904 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3905 break; 3906 case BFD_RELOC_PPC_B16_BRNTAKEN: 3907 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3908 break; 3909 #endif 3910 default: 3911 break; 3912 } 3913 } 3914 3915 #ifdef OBJ_ELF 3916 switch (reloc) 3917 { 3918 case BFD_RELOC_PPC_TOC16: 3919 toc_reloc_types |= has_small_toc_reloc; 3920 break; 3921 case BFD_RELOC_PPC64_TOC16_LO: 3922 case BFD_RELOC_PPC64_TOC16_HI: 3923 case BFD_RELOC_PPC64_TOC16_HA: 3924 toc_reloc_types |= has_large_toc_reloc; 3925 break; 3926 default: 3927 break; 3928 } 3929 3930 if (ppc_obj64 3931 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3932 { 3933 switch (reloc) 3934 { 3935 case BFD_RELOC_16: 3936 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3937 break; 3938 3939 case BFD_RELOC_LO16: 3940 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3941 break; 3942 3943 case BFD_RELOC_16_GOTOFF: 3944 reloc = BFD_RELOC_PPC64_GOT16_DS; 3945 break; 3946 3947 case BFD_RELOC_LO16_GOTOFF: 3948 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3949 break; 3950 3951 case BFD_RELOC_LO16_PLTOFF: 3952 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3953 break; 3954 3955 case BFD_RELOC_16_BASEREL: 3956 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3957 break; 3958 3959 case BFD_RELOC_LO16_BASEREL: 3960 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3961 break; 3962 3963 case BFD_RELOC_PPC_TOC16: 3964 reloc = BFD_RELOC_PPC64_TOC16_DS; 3965 break; 3966 3967 case BFD_RELOC_PPC64_TOC16_LO: 3968 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3969 break; 3970 3971 case BFD_RELOC_PPC64_PLTGOT16: 3972 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3973 break; 3974 3975 case BFD_RELOC_PPC64_PLTGOT16_LO: 3976 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3977 break; 3978 3979 case BFD_RELOC_PPC_DTPREL16: 3980 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3981 break; 3982 3983 case BFD_RELOC_PPC_DTPREL16_LO: 3984 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3985 break; 3986 3987 case BFD_RELOC_PPC_TPREL16: 3988 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3989 break; 3990 3991 case BFD_RELOC_PPC_TPREL16_LO: 3992 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3993 break; 3994 3995 case BFD_RELOC_PPC_GOT_DTPREL16: 3996 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3997 case BFD_RELOC_PPC_GOT_TPREL16: 3998 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3999 break; 4000 4001 default: 4002 as_bad (_("unsupported relocation for DS offset field")); 4003 break; 4004 } 4005 } 4006 4007 /* Look for a __tls_get_addr arg after any __tls_get_addr 4008 modifiers like @plt. This fixup must be emitted before 4009 the usual call fixup. */ 4010 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 4011 && parse_tls_arg (&str, &ex, &fixups[fc])) 4012 { 4013 fixups[fc].opindex = *opindex_ptr; 4014 ++fc; 4015 } 4016 #endif 4017 4018 /* We need to generate a fixup for this expression. */ 4019 if (fc >= MAX_INSN_FIXUPS) 4020 as_fatal (_("too many fixups")); 4021 fixups[fc].exp = ex; 4022 fixups[fc].opindex = *opindex_ptr; 4023 fixups[fc].reloc = reloc; 4024 ++fc; 4025 } 4026 4027 if (need_paren) 4028 { 4029 endc = ')'; 4030 need_paren = 0; 4031 /* If expecting more operands, then we want to see "),". */ 4032 if (*str == endc && opindex_ptr[1] != 0) 4033 { 4034 do 4035 ++str; 4036 while (ISSPACE (*str)); 4037 endc = ','; 4038 } 4039 } 4040 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 4041 endc = '('; 4042 else 4043 endc = ','; 4044 4045 /* The call to expression should have advanced str past any 4046 whitespace. */ 4047 if (*str == endc) 4048 { 4049 ++str; 4050 if (endc == '(') 4051 need_paren = 1; 4052 } 4053 else if (*str != '\0') 4054 { 4055 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 4056 break; 4057 } 4058 else if (endc == ')') 4059 { 4060 as_bad (_("syntax error; end of line, expected `%c'"), endc); 4061 break; 4062 } 4063 } 4064 4065 while (ISSPACE (*str)) 4066 ++str; 4067 4068 if (*str != '\0') 4069 as_bad (_("junk at end of line: `%s'"), str); 4070 4071 #ifdef OBJ_ELF 4072 /* Do we need/want an APUinfo section? */ 4073 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 4074 && !ppc_obj64) 4075 { 4076 /* These are all version "1". */ 4077 if (opcode->flags & PPC_OPCODE_SPE) 4078 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 4079 if (opcode->flags & PPC_OPCODE_ISEL) 4080 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 4081 if (opcode->flags & PPC_OPCODE_EFS) 4082 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 4083 if (opcode->flags & PPC_OPCODE_BRLOCK) 4084 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 4085 if (opcode->flags & PPC_OPCODE_PMR) 4086 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 4087 if (opcode->flags & PPC_OPCODE_CACHELCK) 4088 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 4089 if (opcode->flags & PPC_OPCODE_RFMCI) 4090 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 4091 /* Only set the VLE flag if the instruction has been pulled via 4092 the VLE instruction set. This way the flag is guaranteed to 4093 be set for VLE-only instructions or for VLE-only processors, 4094 however it'll remain clear for dual-mode instructions on 4095 dual-mode and, more importantly, standard-mode processors. */ 4096 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) 4097 { 4098 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 4099 if (elf_section_data (now_seg) != NULL) 4100 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; 4101 } 4102 } 4103 #endif 4104 4105 /* Write out the instruction. */ 4106 4107 addr_mask = 3; 4108 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 4109 /* All instructions can start on a 2 byte boundary for VLE. */ 4110 addr_mask = 1; 4111 4112 if (frag_now->insn_addr != addr_mask) 4113 { 4114 /* Don't emit instructions to a frag started for data, or for a 4115 CPU differing in VLE mode. Data is allowed to be misaligned, 4116 and it's possible to start a new frag in the middle of 4117 misaligned data. */ 4118 frag_wane (frag_now); 4119 frag_new (0); 4120 } 4121 4122 /* Check that insns within the frag are aligned. ppc_frag_check 4123 will ensure that the frag start address is aligned. */ 4124 if ((frag_now_fix () & addr_mask) != 0) 4125 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1); 4126 4127 /* Differentiate between two, four, and eight byte insns. */ 4128 insn_length = 4; 4129 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn)) 4130 insn_length = 2; 4131 else if ((opcode->flags & PPC_OPCODE_POWERXX) != 0 4132 && PPC_PREFIX_P (insn)) 4133 { 4134 struct insn_label_list *l; 4135 4136 insn_length = 8; 4137 4138 /* 8-byte prefix instructions are not allowed to cross 64-byte 4139 boundaries. */ 4140 frag_align_code (6, 4); 4141 record_alignment (now_seg, 6); 4142 4143 /* Update "dot" in any expressions used by this instruction, and 4144 a label attached to the instruction. By "attached" we mean 4145 on the same source line as the instruction and without any 4146 intervening semicolons. */ 4147 dot_value = frag_now_fix (); 4148 dot_frag = frag_now; 4149 for (l = insn_labels; l != NULL; l = l->next) 4150 { 4151 symbol_set_frag (l->label, dot_frag); 4152 S_SET_VALUE (l->label, dot_value); 4153 } 4154 } 4155 4156 ppc_clear_labels (); 4157 4158 f = frag_more (insn_length); 4159 frag_now->insn_addr = addr_mask; 4160 4161 /* The prefix part of an 8-byte instruction always occupies the lower 4162 addressed word in a doubleword, regardless of endianness. */ 4163 if (!target_big_endian && insn_length == 8) 4164 { 4165 md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); 4166 md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); 4167 } 4168 else 4169 md_number_to_chars (f, insn, insn_length); 4170 4171 last_insn = insn; 4172 last_seg = now_seg; 4173 last_subseg = now_subseg; 4174 4175 #ifdef OBJ_ELF 4176 dwarf2_emit_insn (insn_length); 4177 #endif 4178 4179 /* Create any fixups. */ 4180 for (i = 0; i < fc; i++) 4181 { 4182 fixS *fixP; 4183 if (fixups[i].reloc != BFD_RELOC_NONE) 4184 { 4185 bfd_boolean pcrel; 4186 unsigned int size = fixup_size (fixups[i].reloc, &pcrel); 4187 int offset = target_big_endian ? (insn_length - size) : 0; 4188 4189 fixP = fix_new_exp (frag_now, 4190 f - frag_now->fr_literal + offset, 4191 size, 4192 &fixups[i].exp, 4193 pcrel, 4194 fixups[i].reloc); 4195 } 4196 else 4197 { 4198 const struct powerpc_operand *operand; 4199 4200 operand = &powerpc_operands[fixups[i].opindex]; 4201 fixP = fix_new_exp (frag_now, 4202 f - frag_now->fr_literal, 4203 insn_length, 4204 &fixups[i].exp, 4205 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 4206 BFD_RELOC_NONE); 4207 } 4208 fixP->fx_pcrel_adjust = fixups[i].opindex; 4209 } 4210 } 4211 4212 /* Handle a macro. Gather all the operands, transform them as 4213 described by the macro, and call md_assemble recursively. All the 4214 operands are separated by commas; we don't accept parentheses 4215 around operands here. */ 4216 4217 static void 4218 ppc_macro (char *str, const struct powerpc_macro *macro) 4219 { 4220 char *operands[10]; 4221 unsigned int count; 4222 char *s; 4223 unsigned int len; 4224 const char *format; 4225 unsigned int arg; 4226 char *send; 4227 char *complete; 4228 4229 /* Gather the users operands into the operands array. */ 4230 count = 0; 4231 s = str; 4232 while (1) 4233 { 4234 if (count >= sizeof operands / sizeof operands[0]) 4235 break; 4236 operands[count++] = s; 4237 s = strchr (s, ','); 4238 if (s == (char *) NULL) 4239 break; 4240 *s++ = '\0'; 4241 } 4242 4243 if (count != macro->operands) 4244 { 4245 as_bad (_("wrong number of operands")); 4246 return; 4247 } 4248 4249 /* Work out how large the string must be (the size is unbounded 4250 because it includes user input). */ 4251 len = 0; 4252 format = macro->format; 4253 while (*format != '\0') 4254 { 4255 if (*format != '%') 4256 { 4257 ++len; 4258 ++format; 4259 } 4260 else 4261 { 4262 arg = strtol (format + 1, &send, 10); 4263 know (send != format && arg < count); 4264 len += strlen (operands[arg]); 4265 format = send; 4266 } 4267 } 4268 4269 /* Put the string together. */ 4270 complete = s = XNEWVEC (char, len + 1); 4271 format = macro->format; 4272 while (*format != '\0') 4273 { 4274 if (*format != '%') 4275 *s++ = *format++; 4276 else 4277 { 4278 arg = strtol (format + 1, &send, 10); 4279 strcpy (s, operands[arg]); 4280 s += strlen (s); 4281 format = send; 4282 } 4283 } 4284 *s = '\0'; 4285 4286 /* Assemble the constructed instruction. */ 4287 md_assemble (complete); 4288 free (complete); 4289 } 4290 4291 #ifdef OBJ_ELF 4292 /* For ELF, add support for SHT_ORDERED. */ 4293 4294 int 4295 ppc_section_type (char *str, size_t len) 4296 { 4297 if (len == 7 && strncmp (str, "ordered", 7) == 0) 4298 return SHT_ORDERED; 4299 4300 return -1; 4301 } 4302 4303 int 4304 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 4305 { 4306 if (type == SHT_ORDERED) 4307 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 4308 4309 return flags; 4310 } 4311 4312 bfd_vma 4313 ppc_elf_section_letter (int letter, const char **ptrmsg) 4314 { 4315 if (letter == 'v') 4316 return SHF_PPC_VLE; 4317 4318 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string"); 4319 return -1; 4320 } 4321 #endif /* OBJ_ELF */ 4322 4323 4324 /* Pseudo-op handling. */ 4325 4326 /* The .byte pseudo-op. This is similar to the normal .byte 4327 pseudo-op, but it can also take a single ASCII string. */ 4328 4329 static void 4330 ppc_byte (int ignore ATTRIBUTE_UNUSED) 4331 { 4332 int count = 0; 4333 4334 if (*input_line_pointer != '\"') 4335 { 4336 cons (1); 4337 return; 4338 } 4339 4340 /* Gather characters. A real double quote is doubled. Unusual 4341 characters are not permitted. */ 4342 ++input_line_pointer; 4343 while (1) 4344 { 4345 char c; 4346 4347 c = *input_line_pointer++; 4348 4349 if (c == '\"') 4350 { 4351 if (*input_line_pointer != '\"') 4352 break; 4353 ++input_line_pointer; 4354 } 4355 4356 FRAG_APPEND_1_CHAR (c); 4357 ++count; 4358 } 4359 4360 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 4361 as_warn (_("data in executable section")); 4362 demand_empty_rest_of_line (); 4363 } 4364 4365 #ifdef OBJ_XCOFF 4366 4367 /* XCOFF specific pseudo-op handling. */ 4368 4369 /* This is set if we are creating a .stabx symbol, since we don't want 4370 to handle symbol suffixes for such symbols. */ 4371 static bfd_boolean ppc_stab_symbol; 4372 4373 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 4374 symbols in the .bss segment as though they were local common 4375 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 4376 aligns .comm and .lcomm to 4 bytes. */ 4377 4378 static void 4379 ppc_comm (int lcomm) 4380 { 4381 asection *current_seg = now_seg; 4382 subsegT current_subseg = now_subseg; 4383 char *name; 4384 char endc; 4385 char *end_name; 4386 offsetT size; 4387 offsetT align; 4388 symbolS *lcomm_sym = NULL; 4389 symbolS *sym; 4390 char *pfrag; 4391 4392 endc = get_symbol_name (&name); 4393 end_name = input_line_pointer; 4394 (void) restore_line_pointer (endc); 4395 4396 if (*input_line_pointer != ',') 4397 { 4398 as_bad (_("missing size")); 4399 ignore_rest_of_line (); 4400 return; 4401 } 4402 ++input_line_pointer; 4403 4404 size = get_absolute_expression (); 4405 if (size < 0) 4406 { 4407 as_bad (_("negative size")); 4408 ignore_rest_of_line (); 4409 return; 4410 } 4411 4412 if (! lcomm) 4413 { 4414 /* The third argument to .comm is the alignment. */ 4415 if (*input_line_pointer != ',') 4416 align = 2; 4417 else 4418 { 4419 ++input_line_pointer; 4420 align = get_absolute_expression (); 4421 if (align <= 0) 4422 { 4423 as_warn (_("ignoring bad alignment")); 4424 align = 2; 4425 } 4426 } 4427 } 4428 else 4429 { 4430 char *lcomm_name; 4431 char lcomm_endc; 4432 4433 /* The third argument to .lcomm appears to be the real local 4434 common symbol to create. References to the symbol named in 4435 the first argument are turned into references to the third 4436 argument. */ 4437 if (*input_line_pointer != ',') 4438 { 4439 as_bad (_("missing real symbol name")); 4440 ignore_rest_of_line (); 4441 return; 4442 } 4443 ++input_line_pointer; 4444 4445 lcomm_endc = get_symbol_name (&lcomm_name); 4446 4447 lcomm_sym = symbol_find_or_make (lcomm_name); 4448 4449 (void) restore_line_pointer (lcomm_endc); 4450 4451 /* The fourth argument to .lcomm is the alignment. */ 4452 if (*input_line_pointer != ',') 4453 { 4454 if (size <= 4) 4455 align = 2; 4456 else 4457 align = 3; 4458 } 4459 else 4460 { 4461 ++input_line_pointer; 4462 align = get_absolute_expression (); 4463 if (align <= 0) 4464 { 4465 as_warn (_("ignoring bad alignment")); 4466 align = 2; 4467 } 4468 } 4469 } 4470 4471 *end_name = '\0'; 4472 sym = symbol_find_or_make (name); 4473 *end_name = endc; 4474 4475 if (S_IS_DEFINED (sym) 4476 || S_GET_VALUE (sym) != 0) 4477 { 4478 as_bad (_("attempt to redefine symbol")); 4479 ignore_rest_of_line (); 4480 return; 4481 } 4482 4483 record_alignment (bss_section, align); 4484 4485 if (! lcomm 4486 || ! S_IS_DEFINED (lcomm_sym)) 4487 { 4488 symbolS *def_sym; 4489 offsetT def_size; 4490 4491 if (! lcomm) 4492 { 4493 def_sym = sym; 4494 def_size = size; 4495 S_SET_EXTERNAL (sym); 4496 } 4497 else 4498 { 4499 symbol_get_tc (lcomm_sym)->output = 1; 4500 def_sym = lcomm_sym; 4501 def_size = 0; 4502 } 4503 4504 subseg_set (bss_section, 1); 4505 frag_align (align, 0, 0); 4506 4507 symbol_set_frag (def_sym, frag_now); 4508 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 4509 def_size, (char *) NULL); 4510 *pfrag = 0; 4511 S_SET_SEGMENT (def_sym, bss_section); 4512 symbol_get_tc (def_sym)->align = align; 4513 } 4514 else if (lcomm) 4515 { 4516 /* Align the size of lcomm_sym. */ 4517 symbol_get_frag (lcomm_sym)->fr_offset = 4518 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 4519 &~ ((1 << align) - 1)); 4520 if (align > symbol_get_tc (lcomm_sym)->align) 4521 symbol_get_tc (lcomm_sym)->align = align; 4522 } 4523 4524 if (lcomm) 4525 { 4526 /* Make sym an offset from lcomm_sym. */ 4527 S_SET_SEGMENT (sym, bss_section); 4528 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 4529 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 4530 symbol_get_frag (lcomm_sym)->fr_offset += size; 4531 } 4532 4533 subseg_set (current_seg, current_subseg); 4534 4535 demand_empty_rest_of_line (); 4536 } 4537 4538 /* The .csect pseudo-op. This switches us into a different 4539 subsegment. The first argument is a symbol whose value is the 4540 start of the .csect. In COFF, csect symbols get special aux 4541 entries defined by the x_csect field of union internal_auxent. The 4542 optional second argument is the alignment (the default is 2). */ 4543 4544 static void 4545 ppc_csect (int ignore ATTRIBUTE_UNUSED) 4546 { 4547 char *name; 4548 char endc; 4549 symbolS *sym; 4550 offsetT align; 4551 4552 endc = get_symbol_name (&name); 4553 4554 sym = symbol_find_or_make (name); 4555 4556 (void) restore_line_pointer (endc); 4557 4558 if (S_GET_NAME (sym)[0] == '\0') 4559 { 4560 /* An unnamed csect is assumed to be [PR]. */ 4561 symbol_get_tc (sym)->symbol_class = XMC_PR; 4562 } 4563 4564 align = 2; 4565 if (*input_line_pointer == ',') 4566 { 4567 ++input_line_pointer; 4568 align = get_absolute_expression (); 4569 } 4570 4571 ppc_change_csect (sym, align); 4572 4573 demand_empty_rest_of_line (); 4574 } 4575 4576 /* Change to a different csect. */ 4577 4578 static void 4579 ppc_change_csect (symbolS *sym, offsetT align) 4580 { 4581 if (S_IS_DEFINED (sym)) 4582 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 4583 else 4584 { 4585 symbolS **list_ptr; 4586 int after_toc; 4587 int hold_chunksize; 4588 symbolS *list; 4589 int is_code; 4590 segT sec; 4591 4592 /* This is a new csect. We need to look at the symbol class to 4593 figure out whether it should go in the text section or the 4594 data section. */ 4595 after_toc = 0; 4596 is_code = 0; 4597 switch (symbol_get_tc (sym)->symbol_class) 4598 { 4599 case XMC_PR: 4600 case XMC_RO: 4601 case XMC_DB: 4602 case XMC_GL: 4603 case XMC_XO: 4604 case XMC_SV: 4605 case XMC_TI: 4606 case XMC_TB: 4607 S_SET_SEGMENT (sym, text_section); 4608 symbol_get_tc (sym)->subseg = ppc_text_subsegment; 4609 ++ppc_text_subsegment; 4610 list_ptr = &ppc_text_csects; 4611 is_code = 1; 4612 break; 4613 case XMC_RW: 4614 case XMC_TC0: 4615 case XMC_TC: 4616 case XMC_DS: 4617 case XMC_UA: 4618 case XMC_BS: 4619 case XMC_UC: 4620 if (ppc_toc_csect != NULL 4621 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 4622 == ppc_data_subsegment)) 4623 after_toc = 1; 4624 S_SET_SEGMENT (sym, data_section); 4625 symbol_get_tc (sym)->subseg = ppc_data_subsegment; 4626 ++ppc_data_subsegment; 4627 list_ptr = &ppc_data_csects; 4628 break; 4629 default: 4630 abort (); 4631 } 4632 4633 /* We set the obstack chunk size to a small value before 4634 changing subsegments, so that we don't use a lot of memory 4635 space for what may be a small section. */ 4636 hold_chunksize = chunksize; 4637 chunksize = 64; 4638 4639 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 4640 symbol_get_tc (sym)->subseg); 4641 4642 chunksize = hold_chunksize; 4643 4644 if (after_toc) 4645 ppc_after_toc_frag = frag_now; 4646 4647 record_alignment (sec, align); 4648 if (is_code) 4649 frag_align_code (align, 0); 4650 else 4651 frag_align (align, 0, 0); 4652 4653 symbol_set_frag (sym, frag_now); 4654 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4655 4656 symbol_get_tc (sym)->align = align; 4657 symbol_get_tc (sym)->output = 1; 4658 symbol_get_tc (sym)->within = sym; 4659 4660 for (list = *list_ptr; 4661 symbol_get_tc (list)->next != (symbolS *) NULL; 4662 list = symbol_get_tc (list)->next) 4663 ; 4664 symbol_get_tc (list)->next = sym; 4665 4666 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4667 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4668 &symbol_lastP); 4669 } 4670 4671 ppc_current_csect = sym; 4672 } 4673 4674 static void 4675 ppc_change_debug_section (unsigned int idx, subsegT subseg) 4676 { 4677 segT sec; 4678 flagword oldflags; 4679 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 4680 4681 sec = subseg_new (dw->name, subseg); 4682 oldflags = bfd_section_flags (sec); 4683 if (oldflags == SEC_NO_FLAGS) 4684 { 4685 /* Just created section. */ 4686 gas_assert (dw_sections[idx].sect == NULL); 4687 4688 bfd_set_section_flags (sec, SEC_DEBUGGING); 4689 bfd_set_section_alignment (sec, 0); 4690 dw_sections[idx].sect = sec; 4691 } 4692 4693 /* Not anymore in a csect. */ 4694 ppc_current_csect = NULL; 4695 } 4696 4697 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 4698 .dwsect flag [, opt-label ] 4699 */ 4700 4701 static void 4702 ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 4703 { 4704 valueT flag; 4705 symbolS *opt_label; 4706 const struct xcoff_dwsect_name *dw; 4707 struct dw_subsection *subseg; 4708 struct dw_section *dws; 4709 int i; 4710 4711 /* Find section. */ 4712 flag = get_absolute_expression (); 4713 dw = NULL; 4714 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4715 if (xcoff_dwsect_names[i].flag == flag) 4716 { 4717 dw = &xcoff_dwsect_names[i]; 4718 break; 4719 } 4720 4721 /* Parse opt-label. */ 4722 if (*input_line_pointer == ',') 4723 { 4724 char *label; 4725 char c; 4726 4727 ++input_line_pointer; 4728 4729 c = get_symbol_name (&label); 4730 opt_label = symbol_find_or_make (label); 4731 (void) restore_line_pointer (c); 4732 } 4733 else 4734 opt_label = NULL; 4735 4736 demand_empty_rest_of_line (); 4737 4738 /* Return now in case of unknown subsection. */ 4739 if (dw == NULL) 4740 { 4741 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 4742 (unsigned)flag); 4743 return; 4744 } 4745 4746 /* Find the subsection. */ 4747 dws = &dw_sections[i]; 4748 subseg = NULL; 4749 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4750 { 4751 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4752 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4753 { 4754 as_bad (_("label %s was not defined in this dwarf section"), 4755 S_GET_NAME (opt_label)); 4756 subseg = dws->anon_subseg; 4757 opt_label = NULL; 4758 } 4759 else 4760 subseg = symbol_get_tc (opt_label)->u.dw; 4761 } 4762 4763 if (subseg != NULL) 4764 { 4765 /* Switch to the subsection. */ 4766 ppc_change_debug_section (i, subseg->subseg); 4767 } 4768 else 4769 { 4770 /* Create a new dw subsection. */ 4771 subseg = XNEW (struct dw_subsection); 4772 4773 if (opt_label == NULL) 4774 { 4775 /* The anonymous one. */ 4776 subseg->subseg = 0; 4777 subseg->link = NULL; 4778 dws->anon_subseg = subseg; 4779 } 4780 else 4781 { 4782 /* A named one. */ 4783 if (dws->list_subseg != NULL) 4784 subseg->subseg = dws->list_subseg->subseg + 1; 4785 else 4786 subseg->subseg = 1; 4787 4788 subseg->link = dws->list_subseg; 4789 dws->list_subseg = subseg; 4790 symbol_get_tc (opt_label)->u.dw = subseg; 4791 } 4792 4793 ppc_change_debug_section (i, subseg->subseg); 4794 4795 if (dw->def_size) 4796 { 4797 /* Add the length field. */ 4798 expressionS *exp = &subseg->end_exp; 4799 int sz; 4800 4801 if (opt_label != NULL) 4802 symbol_set_value_now (opt_label); 4803 4804 /* Add the length field. Note that according to the AIX assembler 4805 manual, the size of the length field is 4 for powerpc32 but 4806 12 for powerpc64. */ 4807 if (ppc_obj64) 4808 { 4809 /* Write the 64bit marker. */ 4810 md_number_to_chars (frag_more (4), -1, 4); 4811 } 4812 4813 exp->X_op = O_subtract; 4814 exp->X_op_symbol = symbol_temp_new_now (); 4815 exp->X_add_symbol = symbol_temp_make (); 4816 4817 sz = ppc_obj64 ? 8 : 4; 4818 exp->X_add_number = -sz; 4819 emit_expr (exp, sz); 4820 } 4821 } 4822 } 4823 4824 /* This function handles the .text and .data pseudo-ops. These 4825 pseudo-ops aren't really used by XCOFF; we implement them for the 4826 convenience of people who aren't used to XCOFF. */ 4827 4828 static void 4829 ppc_section (int type) 4830 { 4831 const char *name; 4832 symbolS *sym; 4833 4834 if (type == 't') 4835 name = ".text[PR]"; 4836 else if (type == 'd') 4837 name = ".data[RW]"; 4838 else 4839 abort (); 4840 4841 sym = symbol_find_or_make (name); 4842 4843 ppc_change_csect (sym, 2); 4844 4845 demand_empty_rest_of_line (); 4846 } 4847 4848 /* This function handles the .section pseudo-op. This is mostly to 4849 give an error, since XCOFF only supports .text, .data and .bss, but 4850 we do permit the user to name the text or data section. */ 4851 4852 static void 4853 ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4854 { 4855 char *user_name; 4856 const char *real_name; 4857 char c; 4858 symbolS *sym; 4859 4860 c = get_symbol_name (&user_name); 4861 4862 if (strcmp (user_name, ".text") == 0) 4863 real_name = ".text[PR]"; 4864 else if (strcmp (user_name, ".data") == 0) 4865 real_name = ".data[RW]"; 4866 else 4867 { 4868 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4869 (void) restore_line_pointer (c); 4870 ignore_rest_of_line (); 4871 return; 4872 } 4873 4874 (void) restore_line_pointer (c); 4875 4876 sym = symbol_find_or_make (real_name); 4877 4878 ppc_change_csect (sym, 2); 4879 4880 demand_empty_rest_of_line (); 4881 } 4882 4883 /* The .extern pseudo-op. We create an undefined symbol. */ 4884 4885 static void 4886 ppc_extern (int ignore ATTRIBUTE_UNUSED) 4887 { 4888 char *name; 4889 char endc; 4890 4891 endc = get_symbol_name (&name); 4892 4893 (void) symbol_find_or_make (name); 4894 4895 (void) restore_line_pointer (endc); 4896 4897 demand_empty_rest_of_line (); 4898 } 4899 4900 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4901 4902 static void 4903 ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4904 { 4905 char *name; 4906 char endc; 4907 symbolS *sym; 4908 4909 endc = get_symbol_name (&name); 4910 4911 sym = symbol_find_or_make (name); 4912 4913 (void) restore_line_pointer (endc); 4914 4915 symbol_get_tc (sym)->output = 1; 4916 4917 demand_empty_rest_of_line (); 4918 } 4919 4920 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 4921 relocations at the beginning of the current csect. 4922 4923 (In principle, there's no reason why the relocations _have_ to be at 4924 the beginning. Anywhere in the csect would do. However, inserting 4925 at the beginning is what the native assembler does, and it helps to 4926 deal with cases where the .ref statements follow the section contents.) 4927 4928 ??? .refs don't work for empty .csects. However, the native assembler 4929 doesn't report an error in this case, and neither yet do we. */ 4930 4931 static void 4932 ppc_ref (int ignore ATTRIBUTE_UNUSED) 4933 { 4934 char *name; 4935 char c; 4936 4937 if (ppc_current_csect == NULL) 4938 { 4939 as_bad (_(".ref outside .csect")); 4940 ignore_rest_of_line (); 4941 return; 4942 } 4943 4944 do 4945 { 4946 c = get_symbol_name (&name); 4947 4948 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 4949 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE); 4950 4951 *input_line_pointer = c; 4952 SKIP_WHITESPACE_AFTER_NAME (); 4953 c = *input_line_pointer; 4954 if (c == ',') 4955 { 4956 input_line_pointer++; 4957 SKIP_WHITESPACE (); 4958 if (is_end_of_line[(unsigned char) *input_line_pointer]) 4959 { 4960 as_bad (_("missing symbol name")); 4961 ignore_rest_of_line (); 4962 return; 4963 } 4964 } 4965 } 4966 while (c == ','); 4967 4968 demand_empty_rest_of_line (); 4969 } 4970 4971 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 4972 although I don't know why it bothers. */ 4973 4974 static void 4975 ppc_rename (int ignore ATTRIBUTE_UNUSED) 4976 { 4977 char *name; 4978 char endc; 4979 symbolS *sym; 4980 int len; 4981 4982 endc = get_symbol_name (&name); 4983 4984 sym = symbol_find_or_make (name); 4985 4986 (void) restore_line_pointer (endc); 4987 4988 if (*input_line_pointer != ',') 4989 { 4990 as_bad (_("missing rename string")); 4991 ignore_rest_of_line (); 4992 return; 4993 } 4994 ++input_line_pointer; 4995 4996 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 4997 4998 demand_empty_rest_of_line (); 4999 } 5000 5001 /* The .stabx pseudo-op. This is similar to a normal .stabs 5002 pseudo-op, but slightly different. A sample is 5003 .stabx "main:F-1",.main,142,0 5004 The first argument is the symbol name to create. The second is the 5005 value, and the third is the storage class. The fourth seems to be 5006 always zero, and I am assuming it is the type. */ 5007 5008 static void 5009 ppc_stabx (int ignore ATTRIBUTE_UNUSED) 5010 { 5011 char *name; 5012 int len; 5013 symbolS *sym; 5014 expressionS exp; 5015 5016 name = demand_copy_C_string (&len); 5017 5018 if (*input_line_pointer != ',') 5019 { 5020 as_bad (_("missing value")); 5021 return; 5022 } 5023 ++input_line_pointer; 5024 5025 ppc_stab_symbol = TRUE; 5026 sym = symbol_make (name); 5027 ppc_stab_symbol = FALSE; 5028 5029 symbol_get_tc (sym)->real_name = name; 5030 5031 (void) expression (&exp); 5032 5033 switch (exp.X_op) 5034 { 5035 case O_illegal: 5036 case O_absent: 5037 case O_big: 5038 as_bad (_("illegal .stabx expression; zero assumed")); 5039 exp.X_add_number = 0; 5040 /* Fall through. */ 5041 case O_constant: 5042 S_SET_VALUE (sym, (valueT) exp.X_add_number); 5043 symbol_set_frag (sym, &zero_address_frag); 5044 break; 5045 5046 case O_symbol: 5047 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 5048 symbol_set_value_expression (sym, &exp); 5049 else 5050 { 5051 S_SET_VALUE (sym, 5052 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 5053 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 5054 } 5055 break; 5056 5057 default: 5058 /* The value is some complex expression. This will probably 5059 fail at some later point, but this is probably the right 5060 thing to do here. */ 5061 symbol_set_value_expression (sym, &exp); 5062 break; 5063 } 5064 5065 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5066 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5067 5068 if (*input_line_pointer != ',') 5069 { 5070 as_bad (_("missing class")); 5071 return; 5072 } 5073 ++input_line_pointer; 5074 5075 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 5076 5077 if (*input_line_pointer != ',') 5078 { 5079 as_bad (_("missing type")); 5080 return; 5081 } 5082 ++input_line_pointer; 5083 5084 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 5085 5086 symbol_get_tc (sym)->output = 1; 5087 5088 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 5089 { 5090 /* In this case : 5091 5092 .bs name 5093 .stabx "z",arrays_,133,0 5094 .es 5095 5096 .comm arrays_,13768,3 5097 5098 resolve_symbol_value will copy the exp's "within" into sym's when the 5099 offset is 0. Since this seems to be corner case problem, 5100 only do the correction for storage class C_STSYM. A better solution 5101 would be to have the tc field updated in ppc_symbol_new_hook. */ 5102 5103 if (exp.X_op == O_symbol) 5104 { 5105 if (ppc_current_block == NULL) 5106 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 5107 5108 symbol_get_tc (sym)->within = ppc_current_block; 5109 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block; 5110 } 5111 } 5112 5113 if (exp.X_op != O_symbol 5114 || ! S_IS_EXTERNAL (exp.X_add_symbol) 5115 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 5116 ppc_frob_label (sym); 5117 else 5118 { 5119 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5120 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 5121 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 5122 symbol_get_tc (ppc_current_csect)->within = sym; 5123 } 5124 5125 demand_empty_rest_of_line (); 5126 } 5127 5128 /* The .function pseudo-op. This takes several arguments. The first 5129 argument seems to be the external name of the symbol. The second 5130 argument seems to be the label for the start of the function. gcc 5131 uses the same name for both. I have no idea what the third and 5132 fourth arguments are meant to be. The optional fifth argument is 5133 an expression for the size of the function. In COFF this symbol 5134 gets an aux entry like that used for a csect. */ 5135 5136 static void 5137 ppc_function (int ignore ATTRIBUTE_UNUSED) 5138 { 5139 char *name; 5140 char endc; 5141 char *s; 5142 symbolS *ext_sym; 5143 symbolS *lab_sym; 5144 5145 endc = get_symbol_name (&name); 5146 5147 /* Ignore any [PR] suffix. */ 5148 name = ppc_canonicalize_symbol_name (name); 5149 s = strchr (name, '['); 5150 if (s != (char *) NULL 5151 && strcmp (s + 1, "PR]") == 0) 5152 *s = '\0'; 5153 5154 ext_sym = symbol_find_or_make (name); 5155 5156 (void) restore_line_pointer (endc); 5157 5158 if (*input_line_pointer != ',') 5159 { 5160 as_bad (_("missing symbol name")); 5161 ignore_rest_of_line (); 5162 return; 5163 } 5164 ++input_line_pointer; 5165 5166 endc = get_symbol_name (&name); 5167 5168 lab_sym = symbol_find_or_make (name); 5169 5170 (void) restore_line_pointer (endc); 5171 5172 if (ext_sym != lab_sym) 5173 { 5174 expressionS exp; 5175 5176 exp.X_op = O_symbol; 5177 exp.X_add_symbol = lab_sym; 5178 exp.X_op_symbol = NULL; 5179 exp.X_add_number = 0; 5180 exp.X_unsigned = 0; 5181 symbol_set_value_expression (ext_sym, &exp); 5182 } 5183 5184 if (symbol_get_tc (ext_sym)->symbol_class == -1) 5185 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 5186 symbol_get_tc (ext_sym)->output = 1; 5187 5188 if (*input_line_pointer == ',') 5189 { 5190 expressionS exp; 5191 5192 /* Ignore the third argument. */ 5193 ++input_line_pointer; 5194 expression (& exp); 5195 if (*input_line_pointer == ',') 5196 { 5197 /* Ignore the fourth argument. */ 5198 ++input_line_pointer; 5199 expression (& exp); 5200 if (*input_line_pointer == ',') 5201 { 5202 /* The fifth argument is the function size. */ 5203 ++input_line_pointer; 5204 symbol_get_tc (ext_sym)->u.size = symbol_new 5205 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag); 5206 pseudo_set (symbol_get_tc (ext_sym)->u.size); 5207 } 5208 } 5209 } 5210 5211 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5212 SF_SET_FUNCTION (ext_sym); 5213 SF_SET_PROCESS (ext_sym); 5214 coff_add_linesym (ext_sym); 5215 5216 demand_empty_rest_of_line (); 5217 } 5218 5219 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 5220 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 5221 with the correct line number */ 5222 5223 static symbolS *saved_bi_sym = 0; 5224 5225 static void 5226 ppc_bf (int ignore ATTRIBUTE_UNUSED) 5227 { 5228 symbolS *sym; 5229 5230 sym = symbol_make (".bf"); 5231 S_SET_SEGMENT (sym, text_section); 5232 symbol_set_frag (sym, frag_now); 5233 S_SET_VALUE (sym, frag_now_fix ()); 5234 S_SET_STORAGE_CLASS (sym, C_FCN); 5235 5236 coff_line_base = get_absolute_expression (); 5237 5238 S_SET_NUMBER_AUXILIARY (sym, 1); 5239 SA_SET_SYM_LNNO (sym, coff_line_base); 5240 5241 /* Line number for bi. */ 5242 if (saved_bi_sym) 5243 { 5244 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 5245 saved_bi_sym = 0; 5246 } 5247 5248 5249 symbol_get_tc (sym)->output = 1; 5250 5251 ppc_frob_label (sym); 5252 5253 demand_empty_rest_of_line (); 5254 } 5255 5256 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 5257 ".ef", except that the line number is absolute, not relative to the 5258 most recent ".bf" symbol. */ 5259 5260 static void 5261 ppc_ef (int ignore ATTRIBUTE_UNUSED) 5262 { 5263 symbolS *sym; 5264 5265 sym = symbol_make (".ef"); 5266 S_SET_SEGMENT (sym, text_section); 5267 symbol_set_frag (sym, frag_now); 5268 S_SET_VALUE (sym, frag_now_fix ()); 5269 S_SET_STORAGE_CLASS (sym, C_FCN); 5270 S_SET_NUMBER_AUXILIARY (sym, 1); 5271 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5272 symbol_get_tc (sym)->output = 1; 5273 5274 ppc_frob_label (sym); 5275 5276 demand_empty_rest_of_line (); 5277 } 5278 5279 /* The .bi and .ei pseudo-ops. These take a string argument and 5280 generates a C_BINCL or C_EINCL symbol, which goes at the start of 5281 the symbol list. The value of .bi will be know when the next .bf 5282 is encountered. */ 5283 5284 static void 5285 ppc_biei (int ei) 5286 { 5287 static symbolS *last_biei; 5288 5289 char *name; 5290 int len; 5291 symbolS *sym; 5292 symbolS *look; 5293 5294 name = demand_copy_C_string (&len); 5295 5296 /* The value of these symbols is actually file offset. Here we set 5297 the value to the index into the line number entries. In 5298 ppc_frob_symbols we set the fix_line field, which will cause BFD 5299 to do the right thing. */ 5300 5301 sym = symbol_make (name); 5302 /* obj-coff.c currently only handles line numbers correctly in the 5303 .text section. */ 5304 S_SET_SEGMENT (sym, text_section); 5305 S_SET_VALUE (sym, coff_n_line_nos); 5306 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5307 5308 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 5309 symbol_get_tc (sym)->output = 1; 5310 5311 /* Save bi. */ 5312 if (ei) 5313 saved_bi_sym = 0; 5314 else 5315 saved_bi_sym = sym; 5316 5317 for (look = last_biei ? last_biei : symbol_rootP; 5318 (look != (symbolS *) NULL 5319 && (S_GET_STORAGE_CLASS (look) == C_FILE 5320 || S_GET_STORAGE_CLASS (look) == C_BINCL 5321 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 5322 look = symbol_next (look)) 5323 ; 5324 if (look != (symbolS *) NULL) 5325 { 5326 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5327 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 5328 last_biei = sym; 5329 } 5330 5331 demand_empty_rest_of_line (); 5332 } 5333 5334 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 5335 There is one argument, which is a csect symbol. The value of the 5336 .bs symbol is the index of this csect symbol. */ 5337 5338 static void 5339 ppc_bs (int ignore ATTRIBUTE_UNUSED) 5340 { 5341 char *name; 5342 char endc; 5343 symbolS *csect; 5344 symbolS *sym; 5345 5346 if (ppc_current_block != NULL) 5347 as_bad (_("nested .bs blocks")); 5348 5349 endc = get_symbol_name (&name); 5350 5351 csect = symbol_find_or_make (name); 5352 5353 (void) restore_line_pointer (endc); 5354 5355 sym = symbol_make (".bs"); 5356 S_SET_SEGMENT (sym, now_seg); 5357 S_SET_STORAGE_CLASS (sym, C_BSTAT); 5358 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5359 symbol_get_tc (sym)->output = 1; 5360 5361 symbol_get_tc (sym)->within = csect; 5362 5363 ppc_frob_label (sym); 5364 5365 ppc_current_block = sym; 5366 5367 demand_empty_rest_of_line (); 5368 } 5369 5370 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 5371 5372 static void 5373 ppc_es (int ignore ATTRIBUTE_UNUSED) 5374 { 5375 symbolS *sym; 5376 5377 if (ppc_current_block == NULL) 5378 as_bad (_(".es without preceding .bs")); 5379 5380 sym = symbol_make (".es"); 5381 S_SET_SEGMENT (sym, now_seg); 5382 S_SET_STORAGE_CLASS (sym, C_ESTAT); 5383 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5384 symbol_get_tc (sym)->output = 1; 5385 5386 ppc_frob_label (sym); 5387 5388 ppc_current_block = NULL; 5389 5390 demand_empty_rest_of_line (); 5391 } 5392 5393 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 5394 line number. */ 5395 5396 static void 5397 ppc_bb (int ignore ATTRIBUTE_UNUSED) 5398 { 5399 symbolS *sym; 5400 5401 sym = symbol_make (".bb"); 5402 S_SET_SEGMENT (sym, text_section); 5403 symbol_set_frag (sym, frag_now); 5404 S_SET_VALUE (sym, frag_now_fix ()); 5405 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5406 5407 S_SET_NUMBER_AUXILIARY (sym, 1); 5408 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5409 5410 symbol_get_tc (sym)->output = 1; 5411 5412 SF_SET_PROCESS (sym); 5413 5414 ppc_frob_label (sym); 5415 5416 demand_empty_rest_of_line (); 5417 } 5418 5419 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 5420 line number. */ 5421 5422 static void 5423 ppc_eb (int ignore ATTRIBUTE_UNUSED) 5424 { 5425 symbolS *sym; 5426 5427 sym = symbol_make (".eb"); 5428 S_SET_SEGMENT (sym, text_section); 5429 symbol_set_frag (sym, frag_now); 5430 S_SET_VALUE (sym, frag_now_fix ()); 5431 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5432 S_SET_NUMBER_AUXILIARY (sym, 1); 5433 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5434 symbol_get_tc (sym)->output = 1; 5435 5436 SF_SET_PROCESS (sym); 5437 5438 ppc_frob_label (sym); 5439 5440 demand_empty_rest_of_line (); 5441 } 5442 5443 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 5444 specified name. */ 5445 5446 static void 5447 ppc_bc (int ignore ATTRIBUTE_UNUSED) 5448 { 5449 char *name; 5450 int len; 5451 symbolS *sym; 5452 5453 name = demand_copy_C_string (&len); 5454 sym = symbol_make (name); 5455 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5456 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5457 S_SET_STORAGE_CLASS (sym, C_BCOMM); 5458 S_SET_VALUE (sym, 0); 5459 symbol_get_tc (sym)->output = 1; 5460 5461 ppc_frob_label (sym); 5462 5463 demand_empty_rest_of_line (); 5464 } 5465 5466 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 5467 5468 static void 5469 ppc_ec (int ignore ATTRIBUTE_UNUSED) 5470 { 5471 symbolS *sym; 5472 5473 sym = symbol_make (".ec"); 5474 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5475 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5476 S_SET_STORAGE_CLASS (sym, C_ECOMM); 5477 S_SET_VALUE (sym, 0); 5478 symbol_get_tc (sym)->output = 1; 5479 5480 ppc_frob_label (sym); 5481 5482 demand_empty_rest_of_line (); 5483 } 5484 5485 /* The .toc pseudo-op. Switch to the .toc subsegment. */ 5486 5487 static void 5488 ppc_toc (int ignore ATTRIBUTE_UNUSED) 5489 { 5490 if (ppc_toc_csect != (symbolS *) NULL) 5491 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 5492 else 5493 { 5494 subsegT subseg; 5495 symbolS *sym; 5496 symbolS *list; 5497 5498 subseg = ppc_data_subsegment; 5499 ++ppc_data_subsegment; 5500 5501 subseg_new (segment_name (data_section), subseg); 5502 ppc_toc_frag = frag_now; 5503 5504 sym = symbol_find_or_make ("TOC[TC0]"); 5505 symbol_set_frag (sym, frag_now); 5506 S_SET_SEGMENT (sym, data_section); 5507 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5508 symbol_get_tc (sym)->subseg = subseg; 5509 symbol_get_tc (sym)->output = 1; 5510 symbol_get_tc (sym)->within = sym; 5511 5512 ppc_toc_csect = sym; 5513 5514 for (list = ppc_data_csects; 5515 symbol_get_tc (list)->next != (symbolS *) NULL; 5516 list = symbol_get_tc (list)->next) 5517 ; 5518 symbol_get_tc (list)->next = sym; 5519 5520 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5521 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 5522 &symbol_lastP); 5523 } 5524 5525 ppc_current_csect = ppc_toc_csect; 5526 5527 demand_empty_rest_of_line (); 5528 } 5529 5530 /* The AIX assembler automatically aligns the operands of a .long or 5531 .short pseudo-op, and we want to be compatible. */ 5532 5533 static void 5534 ppc_xcoff_cons (int log_size) 5535 { 5536 frag_align (log_size, 0, 0); 5537 record_alignment (now_seg, log_size); 5538 cons (1 << log_size); 5539 } 5540 5541 static void 5542 ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 5543 { 5544 expressionS exp; 5545 int byte_count; 5546 5547 (void) expression (&exp); 5548 5549 if (exp.X_op != O_constant) 5550 { 5551 as_bad (_("non-constant byte count")); 5552 return; 5553 } 5554 5555 byte_count = exp.X_add_number; 5556 5557 if (*input_line_pointer != ',') 5558 { 5559 as_bad (_("missing value")); 5560 return; 5561 } 5562 5563 ++input_line_pointer; 5564 cons (byte_count); 5565 } 5566 5567 void 5568 ppc_xcoff_end (void) 5569 { 5570 int i; 5571 5572 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 5573 { 5574 struct dw_section *dws = &dw_sections[i]; 5575 struct dw_subsection *dwss; 5576 5577 if (dws->anon_subseg) 5578 { 5579 dwss = dws->anon_subseg; 5580 dwss->link = dws->list_subseg; 5581 } 5582 else 5583 dwss = dws->list_subseg; 5584 5585 for (; dwss != NULL; dwss = dwss->link) 5586 if (dwss->end_exp.X_add_symbol != NULL) 5587 { 5588 subseg_set (dws->sect, dwss->subseg); 5589 symbol_set_value_now (dwss->end_exp.X_add_symbol); 5590 } 5591 } 5592 ppc_cpu = 0; 5593 } 5594 5595 #endif /* OBJ_XCOFF */ 5596 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 5597 5598 /* The .tc pseudo-op. This is used when generating either XCOFF or 5599 ELF. This takes two or more arguments. 5600 5601 When generating XCOFF output, the first argument is the name to 5602 give to this location in the toc; this will be a symbol with class 5603 TC. The rest of the arguments are N-byte values to actually put at 5604 this location in the TOC; often there is just one more argument, a 5605 relocatable symbol reference. The size of the value to store 5606 depends on target word size. A 32-bit target uses 4-byte values, a 5607 64-bit target uses 8-byte values. 5608 5609 When not generating XCOFF output, the arguments are the same, but 5610 the first argument is simply ignored. */ 5611 5612 static void 5613 ppc_tc (int ignore ATTRIBUTE_UNUSED) 5614 { 5615 #ifdef OBJ_XCOFF 5616 5617 /* Define the TOC symbol name. */ 5618 { 5619 char *name; 5620 char endc; 5621 symbolS *sym; 5622 5623 if (ppc_toc_csect == (symbolS *) NULL 5624 || ppc_toc_csect != ppc_current_csect) 5625 { 5626 as_bad (_(".tc not in .toc section")); 5627 ignore_rest_of_line (); 5628 return; 5629 } 5630 5631 endc = get_symbol_name (&name); 5632 5633 sym = symbol_find_or_make (name); 5634 5635 (void) restore_line_pointer (endc); 5636 5637 if (S_IS_DEFINED (sym)) 5638 { 5639 symbolS *label; 5640 5641 label = symbol_get_tc (ppc_current_csect)->within; 5642 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 5643 { 5644 as_bad (_(".tc with no label")); 5645 ignore_rest_of_line (); 5646 return; 5647 } 5648 5649 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 5650 symbol_set_frag (label, symbol_get_frag (sym)); 5651 S_SET_VALUE (label, S_GET_VALUE (sym)); 5652 5653 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 5654 ++input_line_pointer; 5655 5656 return; 5657 } 5658 5659 S_SET_SEGMENT (sym, now_seg); 5660 symbol_set_frag (sym, frag_now); 5661 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5662 symbol_get_tc (sym)->symbol_class = XMC_TC; 5663 symbol_get_tc (sym)->output = 1; 5664 5665 ppc_frob_label (sym); 5666 } 5667 5668 #endif /* OBJ_XCOFF */ 5669 #ifdef OBJ_ELF 5670 int align; 5671 5672 /* Skip the TOC symbol name. */ 5673 while (is_part_of_name (*input_line_pointer) 5674 || *input_line_pointer == ' ' 5675 || *input_line_pointer == '[' 5676 || *input_line_pointer == ']' 5677 || *input_line_pointer == '{' 5678 || *input_line_pointer == '}') 5679 ++input_line_pointer; 5680 5681 /* Align to a four/eight byte boundary. */ 5682 align = ppc_obj64 ? 3 : 2; 5683 frag_align (align, 0, 0); 5684 record_alignment (now_seg, align); 5685 #endif /* OBJ_ELF */ 5686 5687 if (*input_line_pointer != ',') 5688 demand_empty_rest_of_line (); 5689 else 5690 { 5691 ++input_line_pointer; 5692 cons (ppc_obj64 ? 8 : 4); 5693 } 5694 } 5695 5696 /* Pseudo-op .machine. */ 5697 5698 static void 5699 ppc_machine (int ignore ATTRIBUTE_UNUSED) 5700 { 5701 char c; 5702 char *cpu_string; 5703 #define MAX_HISTORY 100 5704 static ppc_cpu_t *cpu_history; 5705 static int curr_hist; 5706 5707 SKIP_WHITESPACE (); 5708 5709 c = get_symbol_name (&cpu_string); 5710 cpu_string = xstrdup (cpu_string); 5711 (void) restore_line_pointer (c); 5712 5713 if (cpu_string != NULL) 5714 { 5715 ppc_cpu_t old_cpu = ppc_cpu; 5716 ppc_cpu_t new_cpu; 5717 char *p; 5718 5719 for (p = cpu_string; *p != 0; p++) 5720 *p = TOLOWER (*p); 5721 5722 if (strcmp (cpu_string, "push") == 0) 5723 { 5724 if (cpu_history == NULL) 5725 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); 5726 5727 if (curr_hist >= MAX_HISTORY) 5728 as_bad (_(".machine stack overflow")); 5729 else 5730 cpu_history[curr_hist++] = ppc_cpu; 5731 } 5732 else if (strcmp (cpu_string, "pop") == 0) 5733 { 5734 if (curr_hist <= 0) 5735 as_bad (_(".machine stack underflow")); 5736 else 5737 ppc_cpu = cpu_history[--curr_hist]; 5738 } 5739 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0) 5740 ppc_cpu = new_cpu; 5741 else 5742 as_bad (_("invalid machine `%s'"), cpu_string); 5743 5744 if (ppc_cpu != old_cpu) 5745 ppc_setup_opcodes (); 5746 } 5747 5748 demand_empty_rest_of_line (); 5749 } 5750 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5751 5752 #ifdef TE_PE 5753 5754 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */ 5755 5756 /* Set the current section. */ 5757 static void 5758 ppc_set_current_section (segT new) 5759 { 5760 ppc_previous_section = ppc_current_section; 5761 ppc_current_section = new; 5762 } 5763 5764 /* pseudo-op: .previous 5765 behaviour: toggles the current section with the previous section. 5766 errors: None 5767 warnings: "No previous section" */ 5768 5769 static void 5770 ppc_previous (int ignore ATTRIBUTE_UNUSED) 5771 { 5772 if (ppc_previous_section == NULL) 5773 { 5774 as_warn (_("no previous section to return to, ignored.")); 5775 return; 5776 } 5777 5778 subseg_set (ppc_previous_section, 0); 5779 5780 ppc_set_current_section (ppc_previous_section); 5781 } 5782 5783 /* pseudo-op: .pdata 5784 behaviour: predefined read only data section 5785 double word aligned 5786 errors: None 5787 warnings: None 5788 initial: .section .pdata "adr3" 5789 a - don't know -- maybe a misprint 5790 d - initialized data 5791 r - readable 5792 3 - double word aligned (that would be 4 byte boundary) 5793 5794 commentary: 5795 Tag index tables (also known as the function table) for exception 5796 handling, debugging, etc. */ 5797 5798 static void 5799 ppc_pdata (int ignore ATTRIBUTE_UNUSED) 5800 { 5801 if (pdata_section == 0) 5802 { 5803 pdata_section = subseg_new (".pdata", 0); 5804 5805 bfd_set_section_flags (pdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5806 | SEC_READONLY | SEC_DATA)); 5807 5808 bfd_set_section_alignment (pdata_section, 2); 5809 } 5810 else 5811 { 5812 pdata_section = subseg_new (".pdata", 0); 5813 } 5814 ppc_set_current_section (pdata_section); 5815 } 5816 5817 /* pseudo-op: .ydata 5818 behaviour: predefined read only data section 5819 double word aligned 5820 errors: None 5821 warnings: None 5822 initial: .section .ydata "drw3" 5823 a - don't know -- maybe a misprint 5824 d - initialized data 5825 r - readable 5826 3 - double word aligned (that would be 4 byte boundary) 5827 commentary: 5828 Tag tables (also known as the scope table) for exception handling, 5829 debugging, etc. */ 5830 5831 static void 5832 ppc_ydata (int ignore ATTRIBUTE_UNUSED) 5833 { 5834 if (ydata_section == 0) 5835 { 5836 ydata_section = subseg_new (".ydata", 0); 5837 bfd_set_section_flags (ydata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5838 | SEC_READONLY | SEC_DATA )); 5839 5840 bfd_set_section_alignment (ydata_section, 3); 5841 } 5842 else 5843 { 5844 ydata_section = subseg_new (".ydata", 0); 5845 } 5846 ppc_set_current_section (ydata_section); 5847 } 5848 5849 /* pseudo-op: .reldata 5850 behaviour: predefined read write data section 5851 double word aligned (4-byte) 5852 FIXME: relocation is applied to it 5853 FIXME: what's the difference between this and .data? 5854 errors: None 5855 warnings: None 5856 initial: .section .reldata "drw3" 5857 d - initialized data 5858 r - readable 5859 w - writable 5860 3 - double word aligned (that would be 8 byte boundary) 5861 5862 commentary: 5863 Like .data, but intended to hold data subject to relocation, such as 5864 function descriptors, etc. */ 5865 5866 static void 5867 ppc_reldata (int ignore ATTRIBUTE_UNUSED) 5868 { 5869 if (reldata_section == 0) 5870 { 5871 reldata_section = subseg_new (".reldata", 0); 5872 5873 bfd_set_section_flags (reldata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5874 | SEC_DATA)); 5875 5876 bfd_set_section_alignment (reldata_section, 2); 5877 } 5878 else 5879 { 5880 reldata_section = subseg_new (".reldata", 0); 5881 } 5882 ppc_set_current_section (reldata_section); 5883 } 5884 5885 /* pseudo-op: .rdata 5886 behaviour: predefined read only data section 5887 double word aligned 5888 errors: None 5889 warnings: None 5890 initial: .section .rdata "dr3" 5891 d - initialized data 5892 r - readable 5893 3 - double word aligned (that would be 4 byte boundary) */ 5894 5895 static void 5896 ppc_rdata (int ignore ATTRIBUTE_UNUSED) 5897 { 5898 if (rdata_section == 0) 5899 { 5900 rdata_section = subseg_new (".rdata", 0); 5901 bfd_set_section_flags (rdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC 5902 | SEC_READONLY | SEC_DATA )); 5903 5904 bfd_set_section_alignment (rdata_section, 2); 5905 } 5906 else 5907 { 5908 rdata_section = subseg_new (".rdata", 0); 5909 } 5910 ppc_set_current_section (rdata_section); 5911 } 5912 5913 /* pseudo-op: .ualong 5914 behaviour: much like .int, with the exception that no alignment is 5915 performed. 5916 FIXME: test the alignment statement 5917 errors: None 5918 warnings: None */ 5919 5920 static void 5921 ppc_ualong (int ignore ATTRIBUTE_UNUSED) 5922 { 5923 /* Try for long. */ 5924 cons (4); 5925 } 5926 5927 /* pseudo-op: .znop <symbol name> 5928 behaviour: Issue a nop instruction 5929 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using 5930 the supplied symbol name. 5931 errors: None 5932 warnings: Missing symbol name */ 5933 5934 static void 5935 ppc_znop (int ignore ATTRIBUTE_UNUSED) 5936 { 5937 unsigned long insn; 5938 const struct powerpc_opcode *opcode; 5939 char *f; 5940 symbolS *sym; 5941 char *symbol_name; 5942 char c; 5943 char *name; 5944 5945 /* Strip out the symbol name. */ 5946 c = get_symbol_name (&symbol_name); 5947 5948 name = xstrdup (symbol_name); 5949 5950 sym = symbol_find_or_make (name); 5951 5952 *input_line_pointer = c; 5953 5954 SKIP_WHITESPACE_AFTER_NAME (); 5955 5956 /* Look up the opcode in the hash table. */ 5957 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop"); 5958 5959 /* Stick in the nop. */ 5960 insn = opcode->opcode; 5961 5962 /* Write out the instruction. */ 5963 f = frag_more (4); 5964 md_number_to_chars (f, insn, 4); 5965 fix_new (frag_now, 5966 f - frag_now->fr_literal, 5967 4, 5968 sym, 5969 0, 5970 0, 5971 BFD_RELOC_16_GOT_PCREL); 5972 5973 } 5974 5975 /* pseudo-op: 5976 behaviour: 5977 errors: 5978 warnings: */ 5979 5980 static void 5981 ppc_pe_comm (int lcomm) 5982 { 5983 char *name; 5984 char c; 5985 char *p; 5986 offsetT temp; 5987 symbolS *symbolP; 5988 offsetT align; 5989 5990 c = get_symbol_name (&name); 5991 5992 /* just after name is now '\0'. */ 5993 p = input_line_pointer; 5994 *p = c; 5995 SKIP_WHITESPACE_AFTER_NAME (); 5996 if (*input_line_pointer != ',') 5997 { 5998 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 5999 ignore_rest_of_line (); 6000 return; 6001 } 6002 6003 input_line_pointer++; /* skip ',' */ 6004 if ((temp = get_absolute_expression ()) < 0) 6005 { 6006 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp); 6007 ignore_rest_of_line (); 6008 return; 6009 } 6010 6011 if (! lcomm) 6012 { 6013 /* The third argument to .comm is the alignment. */ 6014 if (*input_line_pointer != ',') 6015 align = 3; 6016 else 6017 { 6018 ++input_line_pointer; 6019 align = get_absolute_expression (); 6020 if (align <= 0) 6021 { 6022 as_warn (_("ignoring bad alignment")); 6023 align = 3; 6024 } 6025 } 6026 } 6027 6028 *p = 0; 6029 symbolP = symbol_find_or_make (name); 6030 6031 *p = c; 6032 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 6033 { 6034 as_bad (_("ignoring attempt to re-define symbol `%s'."), 6035 S_GET_NAME (symbolP)); 6036 ignore_rest_of_line (); 6037 return; 6038 } 6039 6040 if (S_GET_VALUE (symbolP)) 6041 { 6042 if (S_GET_VALUE (symbolP) != (valueT) temp) 6043 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."), 6044 S_GET_NAME (symbolP), 6045 (long) S_GET_VALUE (symbolP), 6046 (long) temp); 6047 } 6048 else 6049 { 6050 S_SET_VALUE (symbolP, (valueT) temp); 6051 S_SET_EXTERNAL (symbolP); 6052 S_SET_SEGMENT (symbolP, bfd_com_section_ptr); 6053 } 6054 6055 demand_empty_rest_of_line (); 6056 } 6057 6058 /* 6059 * implement the .section pseudo op: 6060 * .section name {, "flags"} 6061 * ^ ^ 6062 * | +--- optional flags: 'b' for bss 6063 * | 'i' for info 6064 * +-- section name 'l' for lib 6065 * 'n' for noload 6066 * 'o' for over 6067 * 'w' for data 6068 * 'd' (apparently m88k for data) 6069 * 'x' for text 6070 * But if the argument is not a quoted string, treat it as a 6071 * subsegment number. 6072 * 6073 * FIXME: this is a copy of the section processing from obj-coff.c, with 6074 * additions/changes for the moto-pas assembler support. There are three 6075 * categories: 6076 * 6077 * FIXME: I just noticed this. This doesn't work at all really. It it 6078 * setting bits that bfd probably neither understands or uses. The 6079 * correct approach (?) will have to incorporate extra fields attached 6080 * to the section to hold the system specific stuff. (krk) 6081 * 6082 * Section Contents: 6083 * 'a' - unknown - referred to in documentation, but no definition supplied 6084 * 'c' - section has code 6085 * 'd' - section has initialized data 6086 * 'u' - section has uninitialized data 6087 * 'i' - section contains directives (info) 6088 * 'n' - section can be discarded 6089 * 'R' - remove section at link time 6090 * 6091 * Section Protection: 6092 * 'r' - section is readable 6093 * 'w' - section is writable 6094 * 'x' - section is executable 6095 * 's' - section is sharable 6096 * 6097 * Section Alignment: 6098 * '0' - align to byte boundary 6099 * '1' - align to halfword boundary 6100 * '2' - align to word boundary 6101 * '3' - align to doubleword boundary 6102 * '4' - align to quadword boundary 6103 * '5' - align to 32 byte boundary 6104 * '6' - align to 64 byte boundary 6105 * 6106 */ 6107 6108 void 6109 ppc_pe_section (int ignore ATTRIBUTE_UNUSED) 6110 { 6111 /* Strip out the section name. */ 6112 char *section_name; 6113 char c; 6114 char *name; 6115 unsigned int exp; 6116 flagword flags; 6117 segT sec; 6118 int align; 6119 6120 c = get_symbol_name (§ion_name); 6121 6122 name = xstrdup (section_name); 6123 6124 *input_line_pointer = c; 6125 6126 SKIP_WHITESPACE_AFTER_NAME (); 6127 6128 exp = 0; 6129 flags = SEC_NO_FLAGS; 6130 6131 if (strcmp (name, ".idata$2") == 0) 6132 { 6133 align = 0; 6134 } 6135 else if (strcmp (name, ".idata$3") == 0) 6136 { 6137 align = 0; 6138 } 6139 else if (strcmp (name, ".idata$4") == 0) 6140 { 6141 align = 2; 6142 } 6143 else if (strcmp (name, ".idata$5") == 0) 6144 { 6145 align = 2; 6146 } 6147 else if (strcmp (name, ".idata$6") == 0) 6148 { 6149 align = 1; 6150 } 6151 else 6152 /* Default alignment to 16 byte boundary. */ 6153 align = 4; 6154 6155 if (*input_line_pointer == ',') 6156 { 6157 ++input_line_pointer; 6158 SKIP_WHITESPACE (); 6159 if (*input_line_pointer != '"') 6160 exp = get_absolute_expression (); 6161 else 6162 { 6163 ++input_line_pointer; 6164 while (*input_line_pointer != '"' 6165 && ! is_end_of_line[(unsigned char) *input_line_pointer]) 6166 { 6167 switch (*input_line_pointer) 6168 { 6169 /* Section Contents */ 6170 case 'a': /* unknown */ 6171 as_bad (_("unsupported section attribute -- 'a'")); 6172 break; 6173 case 'c': /* code section */ 6174 flags |= SEC_CODE; 6175 break; 6176 case 'd': /* section has initialized data */ 6177 flags |= SEC_DATA; 6178 break; 6179 case 'u': /* section has uninitialized data */ 6180 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA 6181 in winnt.h */ 6182 flags |= SEC_ROM; 6183 break; 6184 case 'i': /* section contains directives (info) */ 6185 /* FIXME: This is IMAGE_SCN_LNK_INFO 6186 in winnt.h */ 6187 flags |= SEC_HAS_CONTENTS; 6188 break; 6189 case 'n': /* section can be discarded */ 6190 flags &=~ SEC_LOAD; 6191 break; 6192 case 'R': /* Remove section at link time */ 6193 flags |= SEC_NEVER_LOAD; 6194 break; 6195 #if IFLICT_BRAIN_DAMAGE 6196 /* Section Protection */ 6197 case 'r': /* section is readable */ 6198 flags |= IMAGE_SCN_MEM_READ; 6199 break; 6200 case 'w': /* section is writable */ 6201 flags |= IMAGE_SCN_MEM_WRITE; 6202 break; 6203 case 'x': /* section is executable */ 6204 flags |= IMAGE_SCN_MEM_EXECUTE; 6205 break; 6206 case 's': /* section is sharable */ 6207 flags |= IMAGE_SCN_MEM_SHARED; 6208 break; 6209 6210 /* Section Alignment */ 6211 case '0': /* align to byte boundary */ 6212 flags |= IMAGE_SCN_ALIGN_1BYTES; 6213 align = 0; 6214 break; 6215 case '1': /* align to halfword boundary */ 6216 flags |= IMAGE_SCN_ALIGN_2BYTES; 6217 align = 1; 6218 break; 6219 case '2': /* align to word boundary */ 6220 flags |= IMAGE_SCN_ALIGN_4BYTES; 6221 align = 2; 6222 break; 6223 case '3': /* align to doubleword boundary */ 6224 flags |= IMAGE_SCN_ALIGN_8BYTES; 6225 align = 3; 6226 break; 6227 case '4': /* align to quadword boundary */ 6228 flags |= IMAGE_SCN_ALIGN_16BYTES; 6229 align = 4; 6230 break; 6231 case '5': /* align to 32 byte boundary */ 6232 flags |= IMAGE_SCN_ALIGN_32BYTES; 6233 align = 5; 6234 break; 6235 case '6': /* align to 64 byte boundary */ 6236 flags |= IMAGE_SCN_ALIGN_64BYTES; 6237 align = 6; 6238 break; 6239 #endif 6240 default: 6241 as_bad (_("unknown section attribute '%c'"), 6242 *input_line_pointer); 6243 break; 6244 } 6245 ++input_line_pointer; 6246 } 6247 if (*input_line_pointer == '"') 6248 ++input_line_pointer; 6249 } 6250 } 6251 6252 sec = subseg_new (name, (subsegT) exp); 6253 6254 ppc_set_current_section (sec); 6255 6256 if (flags != SEC_NO_FLAGS) 6257 { 6258 if (!bfd_set_section_flags (sec, flags)) 6259 as_bad (_("error setting flags for \"%s\": %s"), 6260 bfd_section_name (sec), 6261 bfd_errmsg (bfd_get_error ())); 6262 } 6263 6264 bfd_set_section_alignment (sec, align); 6265 } 6266 6267 static void 6268 ppc_pe_function (int ignore ATTRIBUTE_UNUSED) 6269 { 6270 char *name; 6271 char endc; 6272 symbolS *ext_sym; 6273 6274 endc = get_symbol_name (&name); 6275 6276 ext_sym = symbol_find_or_make (name); 6277 6278 (void) restore_line_pointer (endc); 6279 6280 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 6281 SF_SET_FUNCTION (ext_sym); 6282 SF_SET_PROCESS (ext_sym); 6283 coff_add_linesym (ext_sym); 6284 6285 demand_empty_rest_of_line (); 6286 } 6287 6288 static void 6289 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED) 6290 { 6291 if (tocdata_section == 0) 6292 { 6293 tocdata_section = subseg_new (".tocd", 0); 6294 /* FIXME: section flags won't work. */ 6295 bfd_set_section_flags (tocdata_section, (SEC_ALLOC | SEC_LOAD | SEC_RELOC 6296 | SEC_READONLY | SEC_DATA)); 6297 6298 bfd_set_section_alignment (tocdata_section, 2); 6299 } 6300 else 6301 { 6302 rdata_section = subseg_new (".tocd", 0); 6303 } 6304 6305 ppc_set_current_section (tocdata_section); 6306 6307 demand_empty_rest_of_line (); 6308 } 6309 6310 /* Don't adjust TOC relocs to use the section symbol. */ 6311 6312 int 6313 ppc_pe_fix_adjustable (fixS *fix) 6314 { 6315 return fix->fx_r_type != BFD_RELOC_PPC_TOC16; 6316 } 6317 6318 #endif 6319 6320 #ifdef OBJ_XCOFF 6321 6322 /* XCOFF specific symbol and file handling. */ 6323 6324 /* Canonicalize the symbol name. We use the to force the suffix, if 6325 any, to use square brackets, and to be in upper case. */ 6326 6327 char * 6328 ppc_canonicalize_symbol_name (char *name) 6329 { 6330 char *s; 6331 6332 if (ppc_stab_symbol) 6333 return name; 6334 6335 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 6336 ; 6337 if (*s != '\0') 6338 { 6339 char brac; 6340 6341 if (*s == '[') 6342 brac = ']'; 6343 else 6344 { 6345 *s = '['; 6346 brac = '}'; 6347 } 6348 6349 for (s++; *s != '\0' && *s != brac; s++) 6350 *s = TOUPPER (*s); 6351 6352 if (*s == '\0' || s[1] != '\0') 6353 as_bad (_("bad symbol suffix")); 6354 6355 *s = ']'; 6356 } 6357 6358 return name; 6359 } 6360 6361 /* Set the class of a symbol based on the suffix, if any. This is 6362 called whenever a new symbol is created. */ 6363 6364 void 6365 ppc_symbol_new_hook (symbolS *sym) 6366 { 6367 struct ppc_tc_sy *tc; 6368 const char *s; 6369 6370 tc = symbol_get_tc (sym); 6371 tc->next = NULL; 6372 tc->output = 0; 6373 tc->symbol_class = -1; 6374 tc->real_name = NULL; 6375 tc->subseg = 0; 6376 tc->align = 0; 6377 tc->u.size = NULL; 6378 tc->u.dw = NULL; 6379 tc->within = NULL; 6380 6381 if (ppc_stab_symbol) 6382 return; 6383 6384 s = strchr (S_GET_NAME (sym), '['); 6385 if (s == (const char *) NULL) 6386 { 6387 /* There is no suffix. */ 6388 return; 6389 } 6390 6391 ++s; 6392 6393 switch (s[0]) 6394 { 6395 case 'B': 6396 if (strcmp (s, "BS]") == 0) 6397 tc->symbol_class = XMC_BS; 6398 break; 6399 case 'D': 6400 if (strcmp (s, "DB]") == 0) 6401 tc->symbol_class = XMC_DB; 6402 else if (strcmp (s, "DS]") == 0) 6403 tc->symbol_class = XMC_DS; 6404 break; 6405 case 'G': 6406 if (strcmp (s, "GL]") == 0) 6407 tc->symbol_class = XMC_GL; 6408 break; 6409 case 'P': 6410 if (strcmp (s, "PR]") == 0) 6411 tc->symbol_class = XMC_PR; 6412 break; 6413 case 'R': 6414 if (strcmp (s, "RO]") == 0) 6415 tc->symbol_class = XMC_RO; 6416 else if (strcmp (s, "RW]") == 0) 6417 tc->symbol_class = XMC_RW; 6418 break; 6419 case 'S': 6420 if (strcmp (s, "SV]") == 0) 6421 tc->symbol_class = XMC_SV; 6422 break; 6423 case 'T': 6424 if (strcmp (s, "TC]") == 0) 6425 tc->symbol_class = XMC_TC; 6426 else if (strcmp (s, "TI]") == 0) 6427 tc->symbol_class = XMC_TI; 6428 else if (strcmp (s, "TB]") == 0) 6429 tc->symbol_class = XMC_TB; 6430 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 6431 tc->symbol_class = XMC_TC0; 6432 break; 6433 case 'U': 6434 if (strcmp (s, "UA]") == 0) 6435 tc->symbol_class = XMC_UA; 6436 else if (strcmp (s, "UC]") == 0) 6437 tc->symbol_class = XMC_UC; 6438 break; 6439 case 'X': 6440 if (strcmp (s, "XO]") == 0) 6441 tc->symbol_class = XMC_XO; 6442 break; 6443 } 6444 6445 if (tc->symbol_class == -1) 6446 as_bad (_("unrecognized symbol suffix")); 6447 } 6448 6449 /* This variable is set by ppc_frob_symbol if any absolute symbols are 6450 seen. It tells ppc_adjust_symtab whether it needs to look through 6451 the symbols. */ 6452 6453 static bfd_boolean ppc_saw_abs; 6454 6455 /* Change the name of a symbol just before writing it out. Set the 6456 real name if the .rename pseudo-op was used. Otherwise, remove any 6457 class suffix. Return 1 if the symbol should not be included in the 6458 symbol table. */ 6459 6460 int 6461 ppc_frob_symbol (symbolS *sym) 6462 { 6463 static symbolS *ppc_last_function; 6464 static symbolS *set_end; 6465 6466 /* Discard symbols that should not be included in the output symbol 6467 table. */ 6468 if (! symbol_used_in_reloc_p (sym) 6469 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 6470 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6471 && ! symbol_get_tc (sym)->output 6472 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 6473 return 1; 6474 6475 /* This one will disappear anyway. Don't make a csect sym for it. */ 6476 if (sym == abs_section_sym) 6477 return 1; 6478 6479 if (symbol_get_tc (sym)->real_name != (char *) NULL) 6480 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 6481 else 6482 { 6483 const char *name; 6484 const char *s; 6485 6486 name = S_GET_NAME (sym); 6487 s = strchr (name, '['); 6488 if (s != (char *) NULL) 6489 { 6490 unsigned int len; 6491 char *snew; 6492 6493 len = s - name; 6494 snew = xstrndup (name, len); 6495 6496 S_SET_NAME (sym, snew); 6497 } 6498 } 6499 6500 if (set_end != (symbolS *) NULL) 6501 { 6502 SA_SET_SYM_ENDNDX (set_end, sym); 6503 set_end = NULL; 6504 } 6505 6506 if (SF_GET_FUNCTION (sym)) 6507 { 6508 if (ppc_last_function != (symbolS *) NULL) 6509 as_bad (_("two .function pseudo-ops with no intervening .ef")); 6510 ppc_last_function = sym; 6511 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 6512 { 6513 resolve_symbol_value (symbol_get_tc (sym)->u.size); 6514 SA_SET_SYM_FSIZE (sym, 6515 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 6516 } 6517 } 6518 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 6519 && strcmp (S_GET_NAME (sym), ".ef") == 0) 6520 { 6521 if (ppc_last_function == (symbolS *) NULL) 6522 as_bad (_(".ef with no preceding .function")); 6523 else 6524 { 6525 set_end = ppc_last_function; 6526 ppc_last_function = NULL; 6527 6528 /* We don't have a C_EFCN symbol, but we need to force the 6529 COFF backend to believe that it has seen one. */ 6530 coff_last_function = NULL; 6531 } 6532 } 6533 6534 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6535 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 6536 && S_GET_STORAGE_CLASS (sym) != C_FILE 6537 && S_GET_STORAGE_CLASS (sym) != C_FCN 6538 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 6539 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 6540 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 6541 && S_GET_STORAGE_CLASS (sym) != C_BINCL 6542 && S_GET_STORAGE_CLASS (sym) != C_EINCL 6543 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 6544 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 6545 6546 if (S_GET_STORAGE_CLASS (sym) == C_EXT 6547 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 6548 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 6549 { 6550 int i; 6551 union internal_auxent *a; 6552 6553 /* Create a csect aux. */ 6554 i = S_GET_NUMBER_AUXILIARY (sym); 6555 S_SET_NUMBER_AUXILIARY (sym, i + 1); 6556 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 6557 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 6558 { 6559 /* This is the TOC table. */ 6560 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 6561 a->x_csect.x_scnlen.l = 0; 6562 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 6563 } 6564 else if (symbol_get_tc (sym)->subseg != 0) 6565 { 6566 /* This is a csect symbol. x_scnlen is the size of the 6567 csect. */ 6568 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 6569 a->x_csect.x_scnlen.l = (bfd_section_size (S_GET_SEGMENT (sym)) 6570 - S_GET_VALUE (sym)); 6571 else 6572 { 6573 resolve_symbol_value (symbol_get_tc (sym)->next); 6574 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 6575 - S_GET_VALUE (sym)); 6576 } 6577 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 6578 } 6579 else if (S_GET_SEGMENT (sym) == bss_section) 6580 { 6581 /* This is a common symbol. */ 6582 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 6583 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 6584 if (S_IS_EXTERNAL (sym)) 6585 symbol_get_tc (sym)->symbol_class = XMC_RW; 6586 else 6587 symbol_get_tc (sym)->symbol_class = XMC_BS; 6588 } 6589 else if (S_GET_SEGMENT (sym) == absolute_section) 6590 { 6591 /* This is an absolute symbol. The csect will be created by 6592 ppc_adjust_symtab. */ 6593 ppc_saw_abs = TRUE; 6594 a->x_csect.x_smtyp = XTY_LD; 6595 if (symbol_get_tc (sym)->symbol_class == -1) 6596 symbol_get_tc (sym)->symbol_class = XMC_XO; 6597 } 6598 else if (! S_IS_DEFINED (sym)) 6599 { 6600 /* This is an external symbol. */ 6601 a->x_csect.x_scnlen.l = 0; 6602 a->x_csect.x_smtyp = XTY_ER; 6603 } 6604 else if (symbol_get_tc (sym)->symbol_class == XMC_TC) 6605 { 6606 symbolS *next; 6607 6608 /* This is a TOC definition. x_scnlen is the size of the 6609 TOC entry. */ 6610 next = symbol_next (sym); 6611 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 6612 next = symbol_next (next); 6613 if (next == (symbolS *) NULL 6614 || symbol_get_tc (next)->symbol_class != XMC_TC) 6615 { 6616 if (ppc_after_toc_frag == (fragS *) NULL) 6617 a->x_csect.x_scnlen.l = (bfd_section_size (data_section) 6618 - S_GET_VALUE (sym)); 6619 else 6620 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 6621 - S_GET_VALUE (sym)); 6622 } 6623 else 6624 { 6625 resolve_symbol_value (next); 6626 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 6627 - S_GET_VALUE (sym)); 6628 } 6629 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 6630 } 6631 else 6632 { 6633 symbolS *csect; 6634 6635 /* This is a normal symbol definition. x_scnlen is the 6636 symbol index of the containing csect. */ 6637 if (S_GET_SEGMENT (sym) == text_section) 6638 csect = ppc_text_csects; 6639 else if (S_GET_SEGMENT (sym) == data_section) 6640 csect = ppc_data_csects; 6641 else 6642 abort (); 6643 6644 /* Skip the initial dummy symbol. */ 6645 csect = symbol_get_tc (csect)->next; 6646 6647 if (csect == (symbolS *) NULL) 6648 { 6649 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 6650 a->x_csect.x_scnlen.l = 0; 6651 } 6652 else 6653 { 6654 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 6655 { 6656 resolve_symbol_value (symbol_get_tc (csect)->next); 6657 if (S_GET_VALUE (symbol_get_tc (csect)->next) 6658 > S_GET_VALUE (sym)) 6659 break; 6660 csect = symbol_get_tc (csect)->next; 6661 } 6662 6663 a->x_csect.x_scnlen.p = 6664 coffsymbol (symbol_get_bfdsym (csect))->native; 6665 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 6666 1; 6667 } 6668 a->x_csect.x_smtyp = XTY_LD; 6669 } 6670 6671 a->x_csect.x_parmhash = 0; 6672 a->x_csect.x_snhash = 0; 6673 if (symbol_get_tc (sym)->symbol_class == -1) 6674 a->x_csect.x_smclas = XMC_PR; 6675 else 6676 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 6677 a->x_csect.x_stab = 0; 6678 a->x_csect.x_snstab = 0; 6679 6680 /* Don't let the COFF backend resort these symbols. */ 6681 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 6682 } 6683 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 6684 { 6685 /* We want the value to be the symbol index of the referenced 6686 csect symbol. BFD will do that for us if we set the right 6687 flags. */ 6688 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 6689 combined_entry_type *c = coffsymbol (bsym)->native; 6690 6691 S_SET_VALUE (sym, (valueT) (size_t) c); 6692 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 6693 } 6694 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 6695 { 6696 symbolS *block; 6697 valueT base; 6698 6699 block = symbol_get_tc (sym)->within; 6700 if (block) 6701 { 6702 /* The value is the offset from the enclosing csect. */ 6703 symbolS *csect; 6704 6705 csect = symbol_get_tc (block)->within; 6706 resolve_symbol_value (csect); 6707 base = S_GET_VALUE (csect); 6708 } 6709 else 6710 base = 0; 6711 6712 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 6713 } 6714 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 6715 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 6716 { 6717 /* We want the value to be a file offset into the line numbers. 6718 BFD will do that for us if we set the right flags. We have 6719 already set the value correctly. */ 6720 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6721 } 6722 6723 return 0; 6724 } 6725 6726 /* Adjust the symbol table. This creates csect symbols for all 6727 absolute symbols. */ 6728 6729 void 6730 ppc_adjust_symtab (void) 6731 { 6732 symbolS *sym; 6733 6734 if (! ppc_saw_abs) 6735 return; 6736 6737 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6738 { 6739 symbolS *csect; 6740 int i; 6741 union internal_auxent *a; 6742 6743 if (S_GET_SEGMENT (sym) != absolute_section) 6744 continue; 6745 6746 csect = symbol_create (".abs[XO]", absolute_section, 6747 S_GET_VALUE (sym), &zero_address_frag); 6748 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6749 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6750 i = S_GET_NUMBER_AUXILIARY (csect); 6751 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6752 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 6753 a->x_csect.x_scnlen.l = 0; 6754 a->x_csect.x_smtyp = XTY_SD; 6755 a->x_csect.x_parmhash = 0; 6756 a->x_csect.x_snhash = 0; 6757 a->x_csect.x_smclas = XMC_XO; 6758 a->x_csect.x_stab = 0; 6759 a->x_csect.x_snstab = 0; 6760 6761 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6762 6763 i = S_GET_NUMBER_AUXILIARY (sym); 6764 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 6765 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 6766 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 6767 } 6768 6769 ppc_saw_abs = FALSE; 6770 } 6771 6772 /* Set the VMA for a section. This is called on all the sections in 6773 turn. */ 6774 6775 void 6776 ppc_frob_section (asection *sec) 6777 { 6778 static bfd_vma vma = 0; 6779 6780 /* Dwarf sections start at 0. */ 6781 if (bfd_section_flags (sec) & SEC_DEBUGGING) 6782 return; 6783 6784 vma = md_section_align (sec, vma); 6785 bfd_set_section_vma (sec, vma); 6786 vma += bfd_section_size (sec); 6787 } 6788 6789 #endif /* OBJ_XCOFF */ 6790 6791 const char * 6792 md_atof (int type, char *litp, int *sizep) 6793 { 6794 return ieee_md_atof (type, litp, sizep, target_big_endian); 6795 } 6796 6797 /* Write a value out to the object file, using the appropriate 6798 endianness. */ 6799 6800 void 6801 md_number_to_chars (char *buf, valueT val, int n) 6802 { 6803 if (target_big_endian) 6804 number_to_chars_bigendian (buf, val, n); 6805 else 6806 number_to_chars_littleendian (buf, val, n); 6807 } 6808 6809 /* Align a section (I don't know why this is machine dependent). */ 6810 6811 valueT 6812 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6813 { 6814 #ifdef OBJ_ELF 6815 return addr; 6816 #else 6817 int align = bfd_section_alignment (seg); 6818 6819 return ((addr + (1 << align) - 1) & -(1 << align)); 6820 #endif 6821 } 6822 6823 /* We don't have any form of relaxing. */ 6824 6825 int 6826 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6827 asection *seg ATTRIBUTE_UNUSED) 6828 { 6829 abort (); 6830 return 0; 6831 } 6832 6833 /* Convert a machine dependent frag. We never generate these. */ 6834 6835 void 6836 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6837 asection *sec ATTRIBUTE_UNUSED, 6838 fragS *fragp ATTRIBUTE_UNUSED) 6839 { 6840 abort (); 6841 } 6842 6843 /* We have no need to default values of symbols. */ 6844 6845 symbolS * 6846 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6847 { 6848 return 0; 6849 } 6850 6851 /* Functions concerning relocs. */ 6852 6853 /* The location from which a PC relative jump should be calculated, 6854 given a PC relative reloc. */ 6855 6856 long 6857 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6858 { 6859 return fixp->fx_frag->fr_address + fixp->fx_where; 6860 } 6861 6862 #ifdef OBJ_XCOFF 6863 6864 /* This is called to see whether a fixup should be adjusted to use a 6865 section symbol. We take the opportunity to change a fixup against 6866 a symbol in the TOC subsegment into a reloc against the 6867 corresponding .tc symbol. */ 6868 6869 int 6870 ppc_fix_adjustable (fixS *fix) 6871 { 6872 valueT val = resolve_symbol_value (fix->fx_addsy); 6873 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6874 TC_SYMFIELD_TYPE *tc; 6875 6876 if (symseg == absolute_section) 6877 return 0; 6878 6879 /* Always adjust symbols in debugging sections. */ 6880 if (bfd_section_flags (symseg) & SEC_DEBUGGING) 6881 return 1; 6882 6883 if (ppc_toc_csect != (symbolS *) NULL 6884 && fix->fx_addsy != ppc_toc_csect 6885 && symseg == data_section 6886 && val >= ppc_toc_frag->fr_address 6887 && (ppc_after_toc_frag == (fragS *) NULL 6888 || val < ppc_after_toc_frag->fr_address)) 6889 { 6890 symbolS *sy; 6891 6892 for (sy = symbol_next (ppc_toc_csect); 6893 sy != (symbolS *) NULL; 6894 sy = symbol_next (sy)) 6895 { 6896 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6897 6898 if (sy_tc->symbol_class == XMC_TC0) 6899 continue; 6900 if (sy_tc->symbol_class != XMC_TC) 6901 break; 6902 if (val == resolve_symbol_value (sy)) 6903 { 6904 fix->fx_addsy = sy; 6905 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6906 return 0; 6907 } 6908 } 6909 6910 as_bad_where (fix->fx_file, fix->fx_line, 6911 _("symbol in .toc does not match any .tc")); 6912 } 6913 6914 /* Possibly adjust the reloc to be against the csect. */ 6915 tc = symbol_get_tc (fix->fx_addsy); 6916 if (tc->subseg == 0 6917 && tc->symbol_class != XMC_TC0 6918 && tc->symbol_class != XMC_TC 6919 && symseg != bss_section 6920 /* Don't adjust if this is a reloc in the toc section. */ 6921 && (symseg != data_section 6922 || ppc_toc_csect == NULL 6923 || val < ppc_toc_frag->fr_address 6924 || (ppc_after_toc_frag != NULL 6925 && val >= ppc_after_toc_frag->fr_address))) 6926 { 6927 symbolS *csect = tc->within; 6928 6929 /* If the symbol was not declared by a label (eg: a section symbol), 6930 use the section instead of the csect. This doesn't happen in 6931 normal AIX assembly code. */ 6932 if (csect == NULL) 6933 csect = seg_info (symseg)->sym; 6934 6935 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6936 fix->fx_addsy = csect; 6937 6938 return 0; 6939 } 6940 6941 /* Adjust a reloc against a .lcomm symbol to be against the base 6942 .lcomm. */ 6943 if (symseg == bss_section 6944 && ! S_IS_EXTERNAL (fix->fx_addsy)) 6945 { 6946 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6947 6948 fix->fx_offset += val - resolve_symbol_value (sy); 6949 fix->fx_addsy = sy; 6950 } 6951 6952 return 0; 6953 } 6954 6955 /* A reloc from one csect to another must be kept. The assembler 6956 will, of course, keep relocs between sections, and it will keep 6957 absolute relocs, but we need to force it to keep PC relative relocs 6958 between two csects in the same section. */ 6959 6960 int 6961 ppc_force_relocation (fixS *fix) 6962 { 6963 /* At this point fix->fx_addsy should already have been converted to 6964 a csect symbol. If the csect does not include the fragment, then 6965 we need to force the relocation. */ 6966 if (fix->fx_pcrel 6967 && fix->fx_addsy != NULL 6968 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6969 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6970 > fix->fx_frag->fr_address) 6971 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6972 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6973 <= fix->fx_frag->fr_address)))) 6974 return 1; 6975 6976 return generic_force_reloc (fix); 6977 } 6978 #endif /* OBJ_XCOFF */ 6979 6980 #ifdef OBJ_ELF 6981 /* If this function returns non-zero, it guarantees that a relocation 6982 will be emitted for a fixup. */ 6983 6984 int 6985 ppc_force_relocation (fixS *fix) 6986 { 6987 /* Branch prediction relocations must force a relocation, as must 6988 the vtable description relocs. */ 6989 switch (fix->fx_r_type) 6990 { 6991 case BFD_RELOC_PPC_B16_BRTAKEN: 6992 case BFD_RELOC_PPC_B16_BRNTAKEN: 6993 case BFD_RELOC_PPC_BA16_BRTAKEN: 6994 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6995 case BFD_RELOC_24_PLT_PCREL: 6996 case BFD_RELOC_PPC64_TOC: 6997 return 1; 6998 case BFD_RELOC_PPC_B26: 6999 case BFD_RELOC_PPC_BA26: 7000 case BFD_RELOC_PPC_B16: 7001 case BFD_RELOC_PPC_BA16: 7002 case BFD_RELOC_PPC64_REL24_NOTOC: 7003 /* All branch fixups targeting a localentry symbol must 7004 force a relocation. */ 7005 if (fix->fx_addsy) 7006 { 7007 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 7008 elf_symbol_type *elfsym 7009 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 7010 gas_assert (elfsym); 7011 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 7012 return 1; 7013 } 7014 break; 7015 default: 7016 break; 7017 } 7018 7019 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 7020 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL) 7021 return 1; 7022 7023 return generic_force_reloc (fix); 7024 } 7025 7026 int 7027 ppc_fix_adjustable (fixS *fix) 7028 { 7029 switch (fix->fx_r_type) 7030 { 7031 /* All branch fixups targeting a localentry symbol must 7032 continue using the symbol. */ 7033 case BFD_RELOC_PPC_B26: 7034 case BFD_RELOC_PPC_BA26: 7035 case BFD_RELOC_PPC_B16: 7036 case BFD_RELOC_PPC_BA16: 7037 case BFD_RELOC_PPC_B16_BRTAKEN: 7038 case BFD_RELOC_PPC_B16_BRNTAKEN: 7039 case BFD_RELOC_PPC_BA16_BRTAKEN: 7040 case BFD_RELOC_PPC_BA16_BRNTAKEN: 7041 case BFD_RELOC_PPC64_REL24_NOTOC: 7042 if (fix->fx_addsy) 7043 { 7044 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 7045 elf_symbol_type *elfsym 7046 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym); 7047 gas_assert (elfsym); 7048 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 7049 return 0; 7050 } 7051 break; 7052 default: 7053 break; 7054 } 7055 7056 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 7057 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 7058 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 7059 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 7060 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 7061 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 7062 && fix->fx_r_type != BFD_RELOC_16_GOT_PCREL 7063 && fix->fx_r_type != BFD_RELOC_32_GOTOFF 7064 && fix->fx_r_type != BFD_RELOC_PPC64_GOT_PCREL34 7065 && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL 7066 && fix->fx_r_type != BFD_RELOC_32_PLTOFF 7067 && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL 7068 && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF 7069 && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF 7070 && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF 7071 && fix->fx_r_type != BFD_RELOC_64_PLTOFF 7072 && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL 7073 && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS 7074 && fix->fx_r_type != BFD_RELOC_PPC64_PLT_PCREL34 7075 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 7076 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO 7077 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI 7078 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA 7079 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS 7080 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS 7081 && fix->fx_r_type != BFD_RELOC_GPREL16 7082 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A 7083 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A 7084 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A 7085 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 7086 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 7087 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 7088 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL)); 7089 } 7090 #endif 7091 7092 void 7093 ppc_frag_check (struct frag *fragP) 7094 { 7095 if ((fragP->fr_address & fragP->insn_addr) != 0) 7096 as_bad_where (fragP->fr_file, fragP->fr_line, 7097 _("instruction address is not a multiple of %d"), 7098 fragP->insn_addr + 1); 7099 } 7100 7101 /* rs_align_code frag handling. */ 7102 7103 enum ppc_nop_encoding_for_rs_align_code 7104 { 7105 PPC_NOP_VANILLA, 7106 PPC_NOP_VLE, 7107 PPC_NOP_GROUP_P6, 7108 PPC_NOP_GROUP_P7 7109 }; 7110 7111 unsigned int 7112 ppc_nop_select (void) 7113 { 7114 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 7115 return PPC_NOP_VLE; 7116 if ((ppc_cpu & (PPC_OPCODE_POWER9 | PPC_OPCODE_E500MC)) == 0) 7117 { 7118 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) 7119 return PPC_NOP_GROUP_P7; 7120 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) 7121 return PPC_NOP_GROUP_P6; 7122 } 7123 return PPC_NOP_VANILLA; 7124 } 7125 7126 void 7127 ppc_handle_align (struct frag *fragP) 7128 { 7129 valueT count = (fragP->fr_next->fr_address 7130 - (fragP->fr_address + fragP->fr_fix)); 7131 char *dest = fragP->fr_literal + fragP->fr_fix; 7132 enum ppc_nop_encoding_for_rs_align_code nop_select = *dest & 0xff; 7133 7134 /* Pad with zeros if not inserting a whole number of instructions. 7135 We could pad with zeros up to an instruction boundary then follow 7136 with nops but odd counts indicate data in an executable section 7137 so padding with zeros is most appropriate. */ 7138 if (count == 0 7139 || (nop_select == PPC_NOP_VLE ? (count & 1) != 0 : (count & 3) != 0)) 7140 { 7141 *dest = 0; 7142 return; 7143 } 7144 7145 if (nop_select == PPC_NOP_VLE) 7146 { 7147 7148 fragP->fr_var = 2; 7149 md_number_to_chars (dest, 0x4400, 2); 7150 } 7151 else 7152 { 7153 fragP->fr_var = 4; 7154 7155 if (count > 4 * nop_limit && count < 0x2000000) 7156 { 7157 struct frag *rest; 7158 7159 /* Make a branch, then follow with nops. Insert another 7160 frag to handle the nops. */ 7161 md_number_to_chars (dest, 0x48000000 + count, 4); 7162 count -= 4; 7163 if (count == 0) 7164 return; 7165 7166 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 7167 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 7168 fragP->fr_next = rest; 7169 fragP = rest; 7170 rest->fr_address += rest->fr_fix + 4; 7171 rest->fr_fix = 0; 7172 /* If we leave the next frag as rs_align_code we'll come here 7173 again, resulting in a bunch of branches rather than a 7174 branch followed by nops. */ 7175 rest->fr_type = rs_align; 7176 dest = rest->fr_literal; 7177 } 7178 7179 md_number_to_chars (dest, 0x60000000, 4); 7180 7181 if (nop_select >= PPC_NOP_GROUP_P6) 7182 { 7183 /* For power6, power7, and power8, we want the last nop to 7184 be a group terminating one. Do this by inserting an 7185 rs_fill frag immediately after this one, with its address 7186 set to the last nop location. This will automatically 7187 reduce the number of nops in the current frag by one. */ 7188 if (count > 4) 7189 { 7190 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 7191 7192 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 7193 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 7194 group_nop->fr_fix = 0; 7195 group_nop->fr_offset = 1; 7196 group_nop->fr_type = rs_fill; 7197 fragP->fr_next = group_nop; 7198 dest = group_nop->fr_literal; 7199 } 7200 7201 if (nop_select == PPC_NOP_GROUP_P6) 7202 /* power6 group terminating nop: "ori 1,1,0". */ 7203 md_number_to_chars (dest, 0x60210000, 4); 7204 else 7205 /* power7/power8 group terminating nop: "ori 2,2,0". */ 7206 md_number_to_chars (dest, 0x60420000, 4); 7207 } 7208 } 7209 } 7210 7211 /* Apply a fixup to the object code. This is called for all the 7212 fixups we generated by the calls to fix_new_exp, above. */ 7213 7214 void 7215 md_apply_fix (fixS *fixP, valueT *valP, segT seg) 7216 { 7217 valueT value = * valP; 7218 offsetT fieldval; 7219 const struct powerpc_operand *operand; 7220 7221 #ifdef OBJ_ELF 7222 if (fixP->fx_addsy != NULL) 7223 { 7224 /* Hack around bfd_install_relocation brain damage. */ 7225 if (fixP->fx_pcrel) 7226 value += fixP->fx_frag->fr_address + fixP->fx_where; 7227 7228 if (fixP->fx_addsy == abs_section_sym) 7229 fixP->fx_done = 1; 7230 } 7231 else 7232 fixP->fx_done = 1; 7233 #else 7234 /* FIXME FIXME FIXME: The value we are passed in *valP includes 7235 the symbol values. If we are doing this relocation the code in 7236 write.c is going to call bfd_install_relocation, which is also 7237 going to use the symbol value. That means that if the reloc is 7238 fully resolved we want to use *valP since bfd_install_relocation is 7239 not being used. 7240 However, if the reloc is not fully resolved we do not want to 7241 use *valP, and must use fx_offset instead. If the relocation 7242 is PC-relative, we then need to re-apply md_pcrel_from_section 7243 to this new relocation value. */ 7244 if (fixP->fx_addsy == (symbolS *) NULL) 7245 fixP->fx_done = 1; 7246 7247 else 7248 { 7249 value = fixP->fx_offset; 7250 if (fixP->fx_pcrel) 7251 value -= md_pcrel_from_section (fixP, seg); 7252 } 7253 #endif 7254 7255 /* We are only able to convert some relocs to pc-relative. */ 7256 if (fixP->fx_pcrel) 7257 { 7258 switch (fixP->fx_r_type) 7259 { 7260 case BFD_RELOC_64: 7261 fixP->fx_r_type = BFD_RELOC_64_PCREL; 7262 break; 7263 7264 case BFD_RELOC_32: 7265 fixP->fx_r_type = BFD_RELOC_32_PCREL; 7266 break; 7267 7268 case BFD_RELOC_16: 7269 fixP->fx_r_type = BFD_RELOC_16_PCREL; 7270 break; 7271 7272 case BFD_RELOC_LO16: 7273 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 7274 break; 7275 7276 case BFD_RELOC_HI16: 7277 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 7278 break; 7279 7280 case BFD_RELOC_HI16_S: 7281 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 7282 break; 7283 7284 case BFD_RELOC_PPC64_ADDR16_HIGH: 7285 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGH; 7286 break; 7287 7288 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7289 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHA; 7290 break; 7291 7292 case BFD_RELOC_PPC64_HIGHER: 7293 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER; 7294 break; 7295 7296 case BFD_RELOC_PPC64_HIGHER_S: 7297 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA; 7298 break; 7299 7300 case BFD_RELOC_PPC64_HIGHEST: 7301 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST; 7302 break; 7303 7304 case BFD_RELOC_PPC64_HIGHEST_S: 7305 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA; 7306 break; 7307 7308 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 7309 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER34; 7310 break; 7311 7312 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 7313 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA34; 7314 break; 7315 7316 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 7317 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST34; 7318 break; 7319 7320 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 7321 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA34; 7322 break; 7323 7324 case BFD_RELOC_PPC_16DX_HA: 7325 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7326 break; 7327 7328 case BFD_RELOC_PPC64_D34: 7329 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL34; 7330 break; 7331 7332 case BFD_RELOC_PPC64_D28: 7333 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL28; 7334 break; 7335 7336 default: 7337 break; 7338 } 7339 } 7340 else if (!fixP->fx_done 7341 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA) 7342 { 7343 /* addpcis is relative to next insn address. */ 7344 value -= 4; 7345 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7346 fixP->fx_pcrel = 1; 7347 } 7348 7349 operand = NULL; 7350 if (fixP->fx_pcrel_adjust != 0) 7351 { 7352 /* This is a fixup on an instruction. */ 7353 int opindex = fixP->fx_pcrel_adjust & 0xff; 7354 7355 operand = &powerpc_operands[opindex]; 7356 #ifdef OBJ_XCOFF 7357 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 7358 does not generate a reloc. It uses the offset of `sym' within its 7359 csect. Other usages, such as `.long sym', generate relocs. This 7360 is the documented behaviour of non-TOC symbols. */ 7361 if ((operand->flags & PPC_OPERAND_PARENS) != 0 7362 && (operand->bitm & 0xfff0) == 0xfff0 7363 && operand->shift == 0 7364 && (operand->insert == NULL || ppc_obj64) 7365 && fixP->fx_addsy != NULL 7366 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 7367 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 7368 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0 7369 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 7370 { 7371 value = fixP->fx_offset; 7372 fixP->fx_done = 1; 7373 } 7374 7375 /* During parsing of instructions, a TOC16 reloc is generated for 7376 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 7377 in the toc. But at parse time, SYM may be not yet defined, so 7378 check again here. */ 7379 if (fixP->fx_r_type == BFD_RELOC_16 7380 && fixP->fx_addsy != NULL 7381 && ppc_is_toc_sym (fixP->fx_addsy)) 7382 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 7383 #endif 7384 } 7385 7386 /* Calculate value to be stored in field. */ 7387 fieldval = value; 7388 switch (fixP->fx_r_type) 7389 { 7390 #ifdef OBJ_ELF 7391 case BFD_RELOC_PPC64_ADDR16_LO_DS: 7392 case BFD_RELOC_PPC_VLE_LO16A: 7393 case BFD_RELOC_PPC_VLE_LO16D: 7394 #endif 7395 case BFD_RELOC_LO16: 7396 case BFD_RELOC_LO16_PCREL: 7397 fieldval = value & 0xffff; 7398 sign_extend_16: 7399 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7400 fieldval = SEX16 (fieldval); 7401 fixP->fx_no_overflow = 1; 7402 break; 7403 7404 case BFD_RELOC_HI16: 7405 case BFD_RELOC_HI16_PCREL: 7406 #ifdef OBJ_ELF 7407 if (REPORT_OVERFLOW_HI && ppc_obj64) 7408 { 7409 fieldval = value >> 16; 7410 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7411 { 7412 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7413 fieldval = ((valueT) fieldval ^ sign) - sign; 7414 } 7415 break; 7416 } 7417 /* Fallthru */ 7418 7419 case BFD_RELOC_PPC_VLE_HI16A: 7420 case BFD_RELOC_PPC_VLE_HI16D: 7421 case BFD_RELOC_PPC64_ADDR16_HIGH: 7422 #endif 7423 fieldval = PPC_HI (value); 7424 goto sign_extend_16; 7425 7426 case BFD_RELOC_HI16_S: 7427 case BFD_RELOC_HI16_S_PCREL: 7428 case BFD_RELOC_PPC_16DX_HA: 7429 case BFD_RELOC_PPC_REL16DX_HA: 7430 #ifdef OBJ_ELF 7431 if (REPORT_OVERFLOW_HI && ppc_obj64) 7432 { 7433 fieldval = (value + 0x8000) >> 16; 7434 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7435 { 7436 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7437 fieldval = ((valueT) fieldval ^ sign) - sign; 7438 } 7439 break; 7440 } 7441 /* Fallthru */ 7442 7443 case BFD_RELOC_PPC_VLE_HA16A: 7444 case BFD_RELOC_PPC_VLE_HA16D: 7445 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7446 #endif 7447 fieldval = PPC_HA (value); 7448 goto sign_extend_16; 7449 7450 #ifdef OBJ_ELF 7451 case BFD_RELOC_PPC64_HIGHER: 7452 fieldval = PPC_HIGHER (value); 7453 goto sign_extend_16; 7454 7455 case BFD_RELOC_PPC64_HIGHER_S: 7456 fieldval = PPC_HIGHERA (value); 7457 goto sign_extend_16; 7458 7459 case BFD_RELOC_PPC64_HIGHEST: 7460 fieldval = PPC_HIGHEST (value); 7461 goto sign_extend_16; 7462 7463 case BFD_RELOC_PPC64_HIGHEST_S: 7464 fieldval = PPC_HIGHESTA (value); 7465 goto sign_extend_16; 7466 #endif 7467 7468 default: 7469 break; 7470 } 7471 7472 if (operand != NULL) 7473 { 7474 /* Handle relocs in an insn. */ 7475 switch (fixP->fx_r_type) 7476 { 7477 #ifdef OBJ_ELF 7478 /* The following relocs can't be calculated by the assembler. 7479 Leave the field zero. */ 7480 case BFD_RELOC_PPC_TPREL16: 7481 case BFD_RELOC_PPC_TPREL16_LO: 7482 case BFD_RELOC_PPC_TPREL16_HI: 7483 case BFD_RELOC_PPC_TPREL16_HA: 7484 case BFD_RELOC_PPC_DTPREL16: 7485 case BFD_RELOC_PPC_DTPREL16_LO: 7486 case BFD_RELOC_PPC_DTPREL16_HI: 7487 case BFD_RELOC_PPC_DTPREL16_HA: 7488 case BFD_RELOC_PPC_GOT_TLSGD16: 7489 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7490 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7491 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7492 case BFD_RELOC_PPC_GOT_TLSLD16: 7493 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7494 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7495 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7496 case BFD_RELOC_PPC_GOT_TPREL16: 7497 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7498 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7499 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7500 case BFD_RELOC_PPC_GOT_DTPREL16: 7501 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7502 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7503 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7504 case BFD_RELOC_PPC64_TPREL16_DS: 7505 case BFD_RELOC_PPC64_TPREL16_LO_DS: 7506 case BFD_RELOC_PPC64_TPREL16_HIGH: 7507 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7508 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7509 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7510 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7511 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7512 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7513 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7514 case BFD_RELOC_PPC64_DTPREL16_DS: 7515 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 7516 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7517 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7518 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7519 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7520 case BFD_RELOC_PPC64_TPREL34: 7521 case BFD_RELOC_PPC64_DTPREL34: 7522 case BFD_RELOC_PPC64_GOT_TLSGD34: 7523 case BFD_RELOC_PPC64_GOT_TLSLD34: 7524 case BFD_RELOC_PPC64_GOT_TPREL34: 7525 case BFD_RELOC_PPC64_GOT_DTPREL34: 7526 gas_assert (fixP->fx_addsy != NULL); 7527 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7528 fieldval = 0; 7529 break; 7530 7531 /* These also should leave the field zero for the same 7532 reason. Note that older versions of gas wrote values 7533 here. If we want to go back to the old behaviour, then 7534 all _LO and _LO_DS cases will need to be treated like 7535 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 7536 case BFD_RELOC_16_GOTOFF: 7537 case BFD_RELOC_LO16_GOTOFF: 7538 case BFD_RELOC_HI16_GOTOFF: 7539 case BFD_RELOC_HI16_S_GOTOFF: 7540 case BFD_RELOC_LO16_PLTOFF: 7541 case BFD_RELOC_HI16_PLTOFF: 7542 case BFD_RELOC_HI16_S_PLTOFF: 7543 case BFD_RELOC_GPREL16: 7544 case BFD_RELOC_16_BASEREL: 7545 case BFD_RELOC_LO16_BASEREL: 7546 case BFD_RELOC_HI16_BASEREL: 7547 case BFD_RELOC_HI16_S_BASEREL: 7548 case BFD_RELOC_PPC_TOC16: 7549 case BFD_RELOC_PPC64_TOC16_LO: 7550 case BFD_RELOC_PPC64_TOC16_HI: 7551 case BFD_RELOC_PPC64_TOC16_HA: 7552 case BFD_RELOC_PPC64_PLTGOT16: 7553 case BFD_RELOC_PPC64_PLTGOT16_LO: 7554 case BFD_RELOC_PPC64_PLTGOT16_HI: 7555 case BFD_RELOC_PPC64_PLTGOT16_HA: 7556 case BFD_RELOC_PPC64_GOT16_DS: 7557 case BFD_RELOC_PPC64_GOT16_LO_DS: 7558 case BFD_RELOC_PPC64_PLT16_LO_DS: 7559 case BFD_RELOC_PPC64_SECTOFF_DS: 7560 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 7561 case BFD_RELOC_PPC64_TOC16_DS: 7562 case BFD_RELOC_PPC64_TOC16_LO_DS: 7563 case BFD_RELOC_PPC64_PLTGOT16_DS: 7564 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 7565 case BFD_RELOC_PPC_EMB_NADDR16: 7566 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7567 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7568 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7569 case BFD_RELOC_PPC_EMB_SDAI16: 7570 case BFD_RELOC_PPC_EMB_SDA2I16: 7571 case BFD_RELOC_PPC_EMB_SDA2REL: 7572 case BFD_RELOC_PPC_EMB_SDA21: 7573 case BFD_RELOC_PPC_EMB_MRKREF: 7574 case BFD_RELOC_PPC_EMB_RELSEC16: 7575 case BFD_RELOC_PPC_EMB_RELST_LO: 7576 case BFD_RELOC_PPC_EMB_RELST_HI: 7577 case BFD_RELOC_PPC_EMB_RELST_HA: 7578 case BFD_RELOC_PPC_EMB_BIT_FLD: 7579 case BFD_RELOC_PPC_EMB_RELSDA: 7580 case BFD_RELOC_PPC_VLE_SDA21: 7581 case BFD_RELOC_PPC_VLE_SDA21_LO: 7582 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7583 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 7584 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7585 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 7586 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7587 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 7588 case BFD_RELOC_PPC64_GOT_PCREL34: 7589 case BFD_RELOC_PPC64_PLT_PCREL34: 7590 gas_assert (fixP->fx_addsy != NULL); 7591 /* Fallthru */ 7592 7593 case BFD_RELOC_PPC_TLS: 7594 case BFD_RELOC_PPC_TLSGD: 7595 case BFD_RELOC_PPC_TLSLD: 7596 case BFD_RELOC_PPC64_TLS_PCREL: 7597 fieldval = 0; 7598 break; 7599 #endif 7600 7601 #ifdef OBJ_XCOFF 7602 case BFD_RELOC_PPC_B16: 7603 /* Adjust the offset to the instruction boundary. */ 7604 fieldval += 2; 7605 break; 7606 #endif 7607 7608 case BFD_RELOC_VTABLE_INHERIT: 7609 case BFD_RELOC_VTABLE_ENTRY: 7610 case BFD_RELOC_PPC_DTPMOD: 7611 case BFD_RELOC_PPC_TPREL: 7612 case BFD_RELOC_PPC_DTPREL: 7613 case BFD_RELOC_PPC_COPY: 7614 case BFD_RELOC_PPC_GLOB_DAT: 7615 case BFD_RELOC_32_PLT_PCREL: 7616 case BFD_RELOC_PPC_EMB_NADDR32: 7617 case BFD_RELOC_PPC64_TOC: 7618 case BFD_RELOC_CTOR: 7619 case BFD_RELOC_32: 7620 case BFD_RELOC_32_PCREL: 7621 case BFD_RELOC_RVA: 7622 case BFD_RELOC_64: 7623 case BFD_RELOC_64_PCREL: 7624 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7625 as_bad_where (fixP->fx_file, fixP->fx_line, 7626 _("%s unsupported as instruction fixup"), 7627 bfd_get_reloc_code_name (fixP->fx_r_type)); 7628 fixP->fx_done = 1; 7629 return; 7630 7631 default: 7632 break; 7633 } 7634 7635 #ifdef OBJ_ELF 7636 /* powerpc uses RELA style relocs, so if emitting a reloc the field 7637 contents can stay at zero. */ 7638 #define APPLY_RELOC fixP->fx_done 7639 #else 7640 #define APPLY_RELOC 1 7641 #endif 7642 /* We need to call the insert function even when fieldval is 7643 zero if the insert function would translate that zero to a 7644 bit pattern other than all zeros. */ 7645 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 7646 { 7647 uint64_t insn; 7648 unsigned char *where; 7649 7650 /* Fetch the instruction, insert the fully resolved operand 7651 value, and stuff the instruction back again. */ 7652 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 7653 if (target_big_endian) 7654 { 7655 if (fixP->fx_size < 4) 7656 insn = bfd_getb16 (where); 7657 else 7658 { 7659 insn = bfd_getb32 (where); 7660 if (fixP->fx_size > 4) 7661 insn = insn << 32 | bfd_getb32 (where + 4); 7662 } 7663 } 7664 else 7665 { 7666 if (fixP->fx_size < 4) 7667 insn = bfd_getl16 (where); 7668 else 7669 { 7670 insn = bfd_getl32 (where); 7671 if (fixP->fx_size > 4) 7672 insn = insn << 32 | bfd_getl32 (where + 4); 7673 } 7674 } 7675 insn = ppc_insert_operand (insn, operand, fieldval, 7676 fixP->tc_fix_data.ppc_cpu, 7677 fixP->fx_file, fixP->fx_line); 7678 if (target_big_endian) 7679 { 7680 if (fixP->fx_size < 4) 7681 bfd_putb16 (insn, where); 7682 else 7683 { 7684 if (fixP->fx_size > 4) 7685 { 7686 bfd_putb32 (insn, where + 4); 7687 insn >>= 32; 7688 } 7689 bfd_putb32 (insn, where); 7690 } 7691 } 7692 else 7693 { 7694 if (fixP->fx_size < 4) 7695 bfd_putl16 (insn, where); 7696 else 7697 { 7698 if (fixP->fx_size > 4) 7699 { 7700 bfd_putl32 (insn, where + 4); 7701 insn >>= 32; 7702 } 7703 bfd_putl32 (insn, where); 7704 } 7705 } 7706 } 7707 7708 if (fixP->fx_done) 7709 /* Nothing else to do here. */ 7710 return; 7711 7712 gas_assert (fixP->fx_addsy != NULL); 7713 if (fixP->fx_r_type == BFD_RELOC_NONE) 7714 { 7715 const char *sfile; 7716 unsigned int sline; 7717 7718 /* Use expr_symbol_where to see if this is an expression 7719 symbol. */ 7720 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 7721 as_bad_where (fixP->fx_file, fixP->fx_line, 7722 _("unresolved expression that must be resolved")); 7723 else 7724 as_bad_where (fixP->fx_file, fixP->fx_line, 7725 _("unsupported relocation against %s"), 7726 S_GET_NAME (fixP->fx_addsy)); 7727 fixP->fx_done = 1; 7728 return; 7729 } 7730 } 7731 else 7732 { 7733 /* Handle relocs in data. */ 7734 switch (fixP->fx_r_type) 7735 { 7736 case BFD_RELOC_VTABLE_INHERIT: 7737 if (fixP->fx_addsy 7738 && !S_IS_DEFINED (fixP->fx_addsy) 7739 && !S_IS_WEAK (fixP->fx_addsy)) 7740 S_SET_WEAK (fixP->fx_addsy); 7741 /* Fallthru */ 7742 7743 case BFD_RELOC_VTABLE_ENTRY: 7744 fixP->fx_done = 0; 7745 break; 7746 7747 #ifdef OBJ_ELF 7748 /* These can appear with @l etc. in data. */ 7749 case BFD_RELOC_LO16: 7750 case BFD_RELOC_LO16_PCREL: 7751 case BFD_RELOC_HI16: 7752 case BFD_RELOC_HI16_PCREL: 7753 case BFD_RELOC_HI16_S: 7754 case BFD_RELOC_HI16_S_PCREL: 7755 case BFD_RELOC_PPC64_HIGHER: 7756 case BFD_RELOC_PPC64_HIGHER_S: 7757 case BFD_RELOC_PPC64_HIGHEST: 7758 case BFD_RELOC_PPC64_HIGHEST_S: 7759 case BFD_RELOC_PPC64_ADDR16_HIGH: 7760 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7761 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7762 break; 7763 7764 case BFD_RELOC_PPC_DTPMOD: 7765 case BFD_RELOC_PPC_TPREL: 7766 case BFD_RELOC_PPC_DTPREL: 7767 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7768 break; 7769 7770 /* Just punt all of these to the linker. */ 7771 case BFD_RELOC_PPC_B16_BRTAKEN: 7772 case BFD_RELOC_PPC_B16_BRNTAKEN: 7773 case BFD_RELOC_16_GOTOFF: 7774 case BFD_RELOC_LO16_GOTOFF: 7775 case BFD_RELOC_HI16_GOTOFF: 7776 case BFD_RELOC_HI16_S_GOTOFF: 7777 case BFD_RELOC_LO16_PLTOFF: 7778 case BFD_RELOC_HI16_PLTOFF: 7779 case BFD_RELOC_HI16_S_PLTOFF: 7780 case BFD_RELOC_PPC_COPY: 7781 case BFD_RELOC_PPC_GLOB_DAT: 7782 case BFD_RELOC_16_BASEREL: 7783 case BFD_RELOC_LO16_BASEREL: 7784 case BFD_RELOC_HI16_BASEREL: 7785 case BFD_RELOC_HI16_S_BASEREL: 7786 case BFD_RELOC_PPC_TLS: 7787 case BFD_RELOC_PPC_DTPREL16_LO: 7788 case BFD_RELOC_PPC_DTPREL16_HI: 7789 case BFD_RELOC_PPC_DTPREL16_HA: 7790 case BFD_RELOC_PPC_TPREL16_LO: 7791 case BFD_RELOC_PPC_TPREL16_HI: 7792 case BFD_RELOC_PPC_TPREL16_HA: 7793 case BFD_RELOC_PPC_GOT_TLSGD16: 7794 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7795 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7796 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7797 case BFD_RELOC_PPC_GOT_TLSLD16: 7798 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7799 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7800 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7801 case BFD_RELOC_PPC_GOT_DTPREL16: 7802 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7803 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7804 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7805 case BFD_RELOC_PPC_GOT_TPREL16: 7806 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7807 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7808 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7809 case BFD_RELOC_24_PLT_PCREL: 7810 case BFD_RELOC_PPC_LOCAL24PC: 7811 case BFD_RELOC_32_PLT_PCREL: 7812 case BFD_RELOC_GPREL16: 7813 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7814 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7815 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7816 case BFD_RELOC_PPC_EMB_NADDR32: 7817 case BFD_RELOC_PPC_EMB_NADDR16: 7818 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7819 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7820 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7821 case BFD_RELOC_PPC_EMB_SDAI16: 7822 case BFD_RELOC_PPC_EMB_SDA2REL: 7823 case BFD_RELOC_PPC_EMB_SDA2I16: 7824 case BFD_RELOC_PPC_EMB_SDA21: 7825 case BFD_RELOC_PPC_VLE_SDA21_LO: 7826 case BFD_RELOC_PPC_EMB_MRKREF: 7827 case BFD_RELOC_PPC_EMB_RELSEC16: 7828 case BFD_RELOC_PPC_EMB_RELST_LO: 7829 case BFD_RELOC_PPC_EMB_RELST_HI: 7830 case BFD_RELOC_PPC_EMB_RELST_HA: 7831 case BFD_RELOC_PPC_EMB_BIT_FLD: 7832 case BFD_RELOC_PPC_EMB_RELSDA: 7833 case BFD_RELOC_PPC64_TOC: 7834 case BFD_RELOC_PPC_TOC16: 7835 case BFD_RELOC_PPC64_TOC16_LO: 7836 case BFD_RELOC_PPC64_TOC16_HI: 7837 case BFD_RELOC_PPC64_TOC16_HA: 7838 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7839 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7840 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7841 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7842 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7843 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7844 case BFD_RELOC_PPC64_TPREL16_HIGH: 7845 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7846 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7847 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7848 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7849 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7850 case BFD_RELOC_PPC64_TLS_PCREL: 7851 fixP->fx_done = 0; 7852 break; 7853 #endif 7854 7855 #ifdef OBJ_XCOFF 7856 case BFD_RELOC_NONE: 7857 #endif 7858 case BFD_RELOC_CTOR: 7859 case BFD_RELOC_32: 7860 case BFD_RELOC_32_PCREL: 7861 case BFD_RELOC_RVA: 7862 case BFD_RELOC_64: 7863 case BFD_RELOC_64_PCREL: 7864 case BFD_RELOC_16: 7865 case BFD_RELOC_16_PCREL: 7866 case BFD_RELOC_8: 7867 break; 7868 7869 default: 7870 fprintf (stderr, 7871 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7872 fflush (stderr); 7873 abort (); 7874 } 7875 7876 if (fixP->fx_size && APPLY_RELOC) 7877 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7878 fieldval, fixP->fx_size); 7879 if (warn_476 7880 && (seg->flags & SEC_CODE) != 0 7881 && fixP->fx_size == 4 7882 && fixP->fx_done 7883 && !fixP->fx_tcbit 7884 && (fixP->fx_r_type == BFD_RELOC_32 7885 || fixP->fx_r_type == BFD_RELOC_CTOR 7886 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7887 as_warn_where (fixP->fx_file, fixP->fx_line, 7888 _("data in executable section")); 7889 } 7890 7891 #ifdef OBJ_ELF 7892 ppc_elf_validate_fix (fixP, seg); 7893 fixP->fx_addnumber = value; 7894 7895 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7896 from the section contents. If we are going to be emitting a reloc 7897 then the section contents are immaterial, so don't warn if they 7898 happen to overflow. Leave such warnings to ld. */ 7899 if (!fixP->fx_done) 7900 { 7901 fixP->fx_no_overflow = 1; 7902 7903 /* Arrange to emit .TOC. as a normal symbol if used in anything 7904 but .TOC.@tocbase. */ 7905 if (ppc_obj64 7906 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7907 && fixP->fx_addsy != NULL 7908 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7909 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7910 } 7911 #else 7912 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16) 7913 fixP->fx_addnumber = 0; 7914 else 7915 { 7916 #ifdef TE_PE 7917 fixP->fx_addnumber = 0; 7918 #else 7919 /* We want to use the offset within the toc, not the actual VMA 7920 of the symbol. */ 7921 fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) 7922 - S_GET_VALUE (ppc_toc_csect)); 7923 /* Set *valP to avoid errors. */ 7924 *valP = value; 7925 #endif 7926 } 7927 #endif 7928 } 7929 7930 /* Generate a reloc for a fixup. */ 7931 7932 arelent * 7933 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7934 { 7935 arelent *reloc; 7936 7937 reloc = XNEW (arelent); 7938 7939 reloc->sym_ptr_ptr = XNEW (asymbol *); 7940 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7941 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7942 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */ 7943 if (fixp->fx_r_type == BFD_RELOC_PPC64_TLS_PCREL) 7944 reloc->address++; 7945 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7946 if (reloc->howto == (reloc_howto_type *) NULL) 7947 { 7948 as_bad_where (fixp->fx_file, fixp->fx_line, 7949 _("reloc %d not supported by object file format"), 7950 (int) fixp->fx_r_type); 7951 return NULL; 7952 } 7953 reloc->addend = fixp->fx_addnumber; 7954 7955 return reloc; 7956 } 7957 7958 void 7959 ppc_cfi_frame_initial_instructions (void) 7960 { 7961 cfi_add_CFA_def_cfa (1, 0); 7962 } 7963 7964 int 7965 tc_ppc_regname_to_dw2regnum (char *regname) 7966 { 7967 unsigned int regnum = -1; 7968 unsigned int i; 7969 const char *p; 7970 char *q; 7971 static struct { const char *name; int dw2regnum; } regnames[] = 7972 { 7973 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7974 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7975 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7976 { "spe_acc", 111 }, { "spefscr", 112 } 7977 }; 7978 7979 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7980 if (strcmp (regnames[i].name, regname) == 0) 7981 return regnames[i].dw2regnum; 7982 7983 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7984 { 7985 p = regname + 1 + (regname[1] == '.'); 7986 regnum = strtoul (p, &q, 10); 7987 if (p == q || *q || regnum >= 32) 7988 return -1; 7989 if (regname[0] == 'f') 7990 regnum += 32; 7991 else if (regname[0] == 'v') 7992 regnum += 77; 7993 } 7994 else if (regname[0] == 'c' && regname[1] == 'r') 7995 { 7996 p = regname + 2 + (regname[2] == '.'); 7997 if (p[0] < '0' || p[0] > '7' || p[1]) 7998 return -1; 7999 regnum = p[0] - '0' + 68; 8000 } 8001 return regnum; 8002 } 8003