1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2024 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dw2gencfi.h" 26 #include "opcode/ppc.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/ppc.h" 30 #include "elf/ppc64.h" 31 #include "dwarf2dbg.h" 32 #endif 33 34 #ifdef OBJ_XCOFF 35 #include "coff/xcoff.h" 36 #include "libxcoff.h" 37 #endif 38 39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 40 41 /* Tell the main code what the endianness is. */ 42 extern int target_big_endian; 43 44 /* Whether or not, we've set target_big_endian. */ 45 static int set_target_endian = 0; 46 47 /* Whether to use user friendly register names. */ 48 #ifndef TARGET_REG_NAMES_P 49 #define TARGET_REG_NAMES_P false 50 #endif 51 52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 53 HIGHESTA. */ 54 55 /* #lo(value) denotes the least significant 16 bits of the indicated. */ 56 #define PPC_LO(v) ((v) & 0xffff) 57 58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */ 59 #define PPC_HI(v) (((v) >> 16) & 0xffff) 60 61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of 62 the indicated value, compensating for #lo() being treated as a 63 signed number. */ 64 #define PPC_HA(v) PPC_HI ((v) + 0x8000) 65 66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */ 67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 68 69 /* #highera(value) denotes bits 32 through 47 of the indicated value, 70 compensating for #lo() being treated as a signed number. */ 71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 72 73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */ 74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 75 76 /* #highesta(value) denotes bits 48 through 63 of the indicated value, 77 compensating for #lo being treated as a signed number. */ 78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 79 80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000) 81 82 /* For the time being on ppc64, don't report overflow on @h and @ha 83 applied to constants. */ 84 #define REPORT_OVERFLOW_HI 0 85 86 static bool reg_names_p = TARGET_REG_NAMES_P; 87 88 static void ppc_byte (int); 89 90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 91 static void ppc_tc (int); 92 static void ppc_machine (int); 93 #endif 94 95 #ifdef OBJ_XCOFF 96 static void ppc_comm (int); 97 static void ppc_bb (int); 98 static void ppc_bc (int); 99 static void ppc_bf (int); 100 static void ppc_biei (int); 101 static void ppc_bs (int); 102 static void ppc_eb (int); 103 static void ppc_ec (int); 104 static void ppc_ef (int); 105 static void ppc_es (int); 106 static void ppc_csect (int); 107 static void ppc_dwsect (int); 108 static void ppc_change_csect (symbolS *, offsetT); 109 static void ppc_file (int); 110 static void ppc_function (int); 111 static void ppc_extern (int); 112 static void ppc_globl (int); 113 static void ppc_lglobl (int); 114 static void ppc_ref (int); 115 static void ppc_section (int); 116 static void ppc_named_section (int); 117 static void ppc_stabx (int); 118 static void ppc_rename (int); 119 static void ppc_toc (int); 120 static void ppc_xcoff_cons (int); 121 static void ppc_vbyte (int); 122 static void ppc_weak (int); 123 static void ppc_GNU_visibility (int); 124 #endif 125 126 #ifdef OBJ_ELF 127 static void ppc_elf_rdata (int); 128 static void ppc_elf_lcomm (int); 129 static void ppc_elf_localentry (int); 130 static void ppc_elf_abiversion (int); 131 static void ppc_elf_gnu_attribute (int); 132 #endif 133 134 /* Generic assembler global variables which must be defined by all 135 targets. */ 136 137 #ifdef OBJ_ELF 138 /* This string holds the chars that always start a comment. If the 139 pre-processor is disabled, these aren't very useful. The macro 140 tc_comment_chars points to this. We use this, rather than the 141 usual comment_chars, so that we can switch for Solaris conventions. */ 142 static const char ppc_solaris_comment_chars[] = "#!"; 143 static const char ppc_eabi_comment_chars[] = "#"; 144 145 #ifdef TARGET_SOLARIS_COMMENT 146 const char *ppc_comment_chars = ppc_solaris_comment_chars; 147 #else 148 const char *ppc_comment_chars = ppc_eabi_comment_chars; 149 #endif 150 #else 151 const char comment_chars[] = "#"; 152 #endif 153 154 /* Characters which start a comment at the beginning of a line. */ 155 const char line_comment_chars[] = "#"; 156 157 /* Characters which may be used to separate multiple commands on a 158 single line. */ 159 const char line_separator_chars[] = ";"; 160 161 /* Characters which are used to indicate an exponent in a floating 162 point number. */ 163 const char EXP_CHARS[] = "eE"; 164 165 /* Characters which mean that a number is a floating point constant, 166 as in 0d1.0. */ 167 const char FLT_CHARS[] = "dD"; 168 169 /* Anything that can start an operand needs to be mentioned here, 170 to stop the input scrubber eating whitespace. */ 171 const char ppc_symbol_chars[] = "%["; 172 173 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 174 int ppc_cie_data_alignment; 175 176 /* The dwarf2 minimum instruction length. */ 177 int ppc_dwarf2_line_min_insn_length; 178 179 /* More than this number of nops in an alignment op gets a branch 180 instead. */ 181 unsigned long nop_limit = 4; 182 183 /* The type of processor we are assembling for. This is one or more 184 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 185 ppc_cpu_t ppc_cpu = 0; 186 ppc_cpu_t sticky = 0; 187 188 /* Value for ELF e_flags EF_PPC64_ABI. */ 189 unsigned int ppc_abiversion = 0; 190 191 #ifdef OBJ_ELF 192 /* Flags set on encountering toc relocs. */ 193 static enum { 194 has_large_toc_reloc = 1, 195 has_small_toc_reloc = 2 196 } toc_reloc_types; 197 #endif 198 199 /* Warn on emitting data to code sections. */ 200 int warn_476; 201 uint64_t last_insn; 202 segT last_seg; 203 subsegT last_subseg; 204 205 /* The target specific pseudo-ops which we support. */ 206 207 const pseudo_typeS md_pseudo_table[] = 208 { 209 /* Pseudo-ops which must be overridden. */ 210 { "byte", ppc_byte, 0 }, 211 212 #ifdef OBJ_XCOFF 213 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 214 legitimately belong in the obj-*.c file. However, XCOFF is based 215 on COFF, and is only implemented for the RS/6000. We just use 216 obj-coff.c, and add what we need here. */ 217 { "comm", ppc_comm, 0 }, 218 { "lcomm", ppc_comm, 1 }, 219 { "bb", ppc_bb, 0 }, 220 { "bc", ppc_bc, 0 }, 221 { "bf", ppc_bf, 0 }, 222 { "bi", ppc_biei, 0 }, 223 { "bs", ppc_bs, 0 }, 224 { "csect", ppc_csect, 0 }, 225 { "dwsect", ppc_dwsect, 0 }, 226 { "data", ppc_section, 'd' }, 227 { "eb", ppc_eb, 0 }, 228 { "ec", ppc_ec, 0 }, 229 { "ef", ppc_ef, 0 }, 230 { "ei", ppc_biei, 1 }, 231 { "es", ppc_es, 0 }, 232 { "extern", ppc_extern, 0 }, 233 { "file", ppc_file, 0 }, 234 { "function", ppc_function, 0 }, 235 { "globl", ppc_globl, 0 }, 236 { "lglobl", ppc_lglobl, 0 }, 237 { "ref", ppc_ref, 0 }, 238 { "rename", ppc_rename, 0 }, 239 { "section", ppc_named_section, 0 }, 240 { "stabx", ppc_stabx, 0 }, 241 { "text", ppc_section, 't' }, 242 { "toc", ppc_toc, 0 }, 243 { "long", ppc_xcoff_cons, 2 }, 244 { "llong", ppc_xcoff_cons, 3 }, 245 { "word", ppc_xcoff_cons, 1 }, 246 { "short", ppc_xcoff_cons, 1 }, 247 { "vbyte", ppc_vbyte, 0 }, 248 { "weak", ppc_weak, 0 }, 249 250 /* Enable GNU syntax for symbol visibility. */ 251 {"internal", ppc_GNU_visibility, SYM_V_INTERNAL}, 252 {"hidden", ppc_GNU_visibility, SYM_V_HIDDEN}, 253 {"protected", ppc_GNU_visibility, SYM_V_PROTECTED}, 254 #endif 255 256 #ifdef OBJ_ELF 257 { "llong", cons, 8 }, 258 { "rdata", ppc_elf_rdata, 0 }, 259 { "rodata", ppc_elf_rdata, 0 }, 260 { "lcomm", ppc_elf_lcomm, 0 }, 261 { "localentry", ppc_elf_localentry, 0 }, 262 { "abiversion", ppc_elf_abiversion, 0 }, 263 { "gnu_attribute", ppc_elf_gnu_attribute, 0}, 264 #endif 265 266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 267 { "tc", ppc_tc, 0 }, 268 { "machine", ppc_machine, 0 }, 269 #endif 270 271 { NULL, NULL, 0 } 272 }; 273 274 275 /* Predefined register names if -mregnames (or default for Windows NT). 276 In general, there are lots of them, in an attempt to be compatible 277 with a number of other Windows NT assemblers. */ 278 279 /* Structure to hold information about predefined registers. */ 280 struct pd_reg 281 { 282 char name[6]; 283 unsigned short value; 284 unsigned short flags; 285 }; 286 287 /* List of registers that are pre-defined: 288 289 Each general register has predefined names of the form: 290 1. r<reg_num> which has the value <reg_num>. 291 2. r.<reg_num> which has the value <reg_num>. 292 293 Each floating point register has predefined names of the form: 294 1. f<reg_num> which has the value <reg_num>. 295 2. f.<reg_num> which has the value <reg_num>. 296 297 Each vector unit register has predefined names of the form: 298 1. v<reg_num> which has the value <reg_num>. 299 2. v.<reg_num> which has the value <reg_num>. 300 301 Each condition register has predefined names of the form: 302 1. cr<reg_num> which has the value <reg_num>. 303 2. cr.<reg_num> which has the value <reg_num>. 304 305 There are individual registers as well: 306 sp or r.sp has the value 1 307 rtoc or r.toc has the value 2 308 xer has the value 1 309 lr has the value 8 310 ctr has the value 9 311 dar has the value 19 312 dsisr has the value 18 313 dec has the value 22 314 sdr1 has the value 25 315 srr0 has the value 26 316 srr1 has the value 27 317 318 The table is sorted. Suitable for searching by a binary search. */ 319 320 static const struct pd_reg pre_defined_registers[] = 321 { 322 /* VSX accumulators. */ 323 { "a0", 0, PPC_OPERAND_ACC }, 324 { "a1", 1, PPC_OPERAND_ACC }, 325 { "a2", 2, PPC_OPERAND_ACC }, 326 { "a3", 3, PPC_OPERAND_ACC }, 327 { "a4", 4, PPC_OPERAND_ACC }, 328 { "a5", 5, PPC_OPERAND_ACC }, 329 { "a6", 6, PPC_OPERAND_ACC }, 330 { "a7", 7, PPC_OPERAND_ACC }, 331 332 /* Condition Registers */ 333 { "cr.0", 0, PPC_OPERAND_CR_REG }, 334 { "cr.1", 1, PPC_OPERAND_CR_REG }, 335 { "cr.2", 2, PPC_OPERAND_CR_REG }, 336 { "cr.3", 3, PPC_OPERAND_CR_REG }, 337 { "cr.4", 4, PPC_OPERAND_CR_REG }, 338 { "cr.5", 5, PPC_OPERAND_CR_REG }, 339 { "cr.6", 6, PPC_OPERAND_CR_REG }, 340 { "cr.7", 7, PPC_OPERAND_CR_REG }, 341 342 { "cr0", 0, PPC_OPERAND_CR_REG }, 343 { "cr1", 1, PPC_OPERAND_CR_REG }, 344 { "cr2", 2, PPC_OPERAND_CR_REG }, 345 { "cr3", 3, PPC_OPERAND_CR_REG }, 346 { "cr4", 4, PPC_OPERAND_CR_REG }, 347 { "cr5", 5, PPC_OPERAND_CR_REG }, 348 { "cr6", 6, PPC_OPERAND_CR_REG }, 349 { "cr7", 7, PPC_OPERAND_CR_REG }, 350 351 { "ctr", 9, PPC_OPERAND_SPR }, 352 { "dar", 19, PPC_OPERAND_SPR }, 353 { "dec", 22, PPC_OPERAND_SPR }, 354 { "dsisr", 18, PPC_OPERAND_SPR }, 355 356 /* Dense Math Registers. */ 357 { "dm0", 0, PPC_OPERAND_DMR }, 358 { "dm1", 1, PPC_OPERAND_DMR }, 359 { "dm2", 2, PPC_OPERAND_DMR }, 360 { "dm3", 3, PPC_OPERAND_DMR }, 361 { "dm4", 4, PPC_OPERAND_DMR }, 362 { "dm5", 5, PPC_OPERAND_DMR }, 363 { "dm6", 6, PPC_OPERAND_DMR }, 364 { "dm7", 7, PPC_OPERAND_DMR }, 365 366 /* Floating point registers */ 367 { "f.0", 0, PPC_OPERAND_FPR }, 368 { "f.1", 1, PPC_OPERAND_FPR }, 369 { "f.10", 10, PPC_OPERAND_FPR }, 370 { "f.11", 11, PPC_OPERAND_FPR }, 371 { "f.12", 12, PPC_OPERAND_FPR }, 372 { "f.13", 13, PPC_OPERAND_FPR }, 373 { "f.14", 14, PPC_OPERAND_FPR }, 374 { "f.15", 15, PPC_OPERAND_FPR }, 375 { "f.16", 16, PPC_OPERAND_FPR }, 376 { "f.17", 17, PPC_OPERAND_FPR }, 377 { "f.18", 18, PPC_OPERAND_FPR }, 378 { "f.19", 19, PPC_OPERAND_FPR }, 379 { "f.2", 2, PPC_OPERAND_FPR }, 380 { "f.20", 20, PPC_OPERAND_FPR }, 381 { "f.21", 21, PPC_OPERAND_FPR }, 382 { "f.22", 22, PPC_OPERAND_FPR }, 383 { "f.23", 23, PPC_OPERAND_FPR }, 384 { "f.24", 24, PPC_OPERAND_FPR }, 385 { "f.25", 25, PPC_OPERAND_FPR }, 386 { "f.26", 26, PPC_OPERAND_FPR }, 387 { "f.27", 27, PPC_OPERAND_FPR }, 388 { "f.28", 28, PPC_OPERAND_FPR }, 389 { "f.29", 29, PPC_OPERAND_FPR }, 390 { "f.3", 3, PPC_OPERAND_FPR }, 391 { "f.30", 30, PPC_OPERAND_FPR }, 392 { "f.31", 31, PPC_OPERAND_FPR }, 393 { "f.32", 32, PPC_OPERAND_VSR }, 394 { "f.33", 33, PPC_OPERAND_VSR }, 395 { "f.34", 34, PPC_OPERAND_VSR }, 396 { "f.35", 35, PPC_OPERAND_VSR }, 397 { "f.36", 36, PPC_OPERAND_VSR }, 398 { "f.37", 37, PPC_OPERAND_VSR }, 399 { "f.38", 38, PPC_OPERAND_VSR }, 400 { "f.39", 39, PPC_OPERAND_VSR }, 401 { "f.4", 4, PPC_OPERAND_FPR }, 402 { "f.40", 40, PPC_OPERAND_VSR }, 403 { "f.41", 41, PPC_OPERAND_VSR }, 404 { "f.42", 42, PPC_OPERAND_VSR }, 405 { "f.43", 43, PPC_OPERAND_VSR }, 406 { "f.44", 44, PPC_OPERAND_VSR }, 407 { "f.45", 45, PPC_OPERAND_VSR }, 408 { "f.46", 46, PPC_OPERAND_VSR }, 409 { "f.47", 47, PPC_OPERAND_VSR }, 410 { "f.48", 48, PPC_OPERAND_VSR }, 411 { "f.49", 49, PPC_OPERAND_VSR }, 412 { "f.5", 5, PPC_OPERAND_FPR }, 413 { "f.50", 50, PPC_OPERAND_VSR }, 414 { "f.51", 51, PPC_OPERAND_VSR }, 415 { "f.52", 52, PPC_OPERAND_VSR }, 416 { "f.53", 53, PPC_OPERAND_VSR }, 417 { "f.54", 54, PPC_OPERAND_VSR }, 418 { "f.55", 55, PPC_OPERAND_VSR }, 419 { "f.56", 56, PPC_OPERAND_VSR }, 420 { "f.57", 57, PPC_OPERAND_VSR }, 421 { "f.58", 58, PPC_OPERAND_VSR }, 422 { "f.59", 59, PPC_OPERAND_VSR }, 423 { "f.6", 6, PPC_OPERAND_FPR }, 424 { "f.60", 60, PPC_OPERAND_VSR }, 425 { "f.61", 61, PPC_OPERAND_VSR }, 426 { "f.62", 62, PPC_OPERAND_VSR }, 427 { "f.63", 63, PPC_OPERAND_VSR }, 428 { "f.7", 7, PPC_OPERAND_FPR }, 429 { "f.8", 8, PPC_OPERAND_FPR }, 430 { "f.9", 9, PPC_OPERAND_FPR }, 431 432 { "f0", 0, PPC_OPERAND_FPR }, 433 { "f1", 1, PPC_OPERAND_FPR }, 434 { "f10", 10, PPC_OPERAND_FPR }, 435 { "f11", 11, PPC_OPERAND_FPR }, 436 { "f12", 12, PPC_OPERAND_FPR }, 437 { "f13", 13, PPC_OPERAND_FPR }, 438 { "f14", 14, PPC_OPERAND_FPR }, 439 { "f15", 15, PPC_OPERAND_FPR }, 440 { "f16", 16, PPC_OPERAND_FPR }, 441 { "f17", 17, PPC_OPERAND_FPR }, 442 { "f18", 18, PPC_OPERAND_FPR }, 443 { "f19", 19, PPC_OPERAND_FPR }, 444 { "f2", 2, PPC_OPERAND_FPR }, 445 { "f20", 20, PPC_OPERAND_FPR }, 446 { "f21", 21, PPC_OPERAND_FPR }, 447 { "f22", 22, PPC_OPERAND_FPR }, 448 { "f23", 23, PPC_OPERAND_FPR }, 449 { "f24", 24, PPC_OPERAND_FPR }, 450 { "f25", 25, PPC_OPERAND_FPR }, 451 { "f26", 26, PPC_OPERAND_FPR }, 452 { "f27", 27, PPC_OPERAND_FPR }, 453 { "f28", 28, PPC_OPERAND_FPR }, 454 { "f29", 29, PPC_OPERAND_FPR }, 455 { "f3", 3, PPC_OPERAND_FPR }, 456 { "f30", 30, PPC_OPERAND_FPR }, 457 { "f31", 31, PPC_OPERAND_FPR }, 458 { "f32", 32, PPC_OPERAND_VSR }, 459 { "f33", 33, PPC_OPERAND_VSR }, 460 { "f34", 34, PPC_OPERAND_VSR }, 461 { "f35", 35, PPC_OPERAND_VSR }, 462 { "f36", 36, PPC_OPERAND_VSR }, 463 { "f37", 37, PPC_OPERAND_VSR }, 464 { "f38", 38, PPC_OPERAND_VSR }, 465 { "f39", 39, PPC_OPERAND_VSR }, 466 { "f4", 4, PPC_OPERAND_FPR }, 467 { "f40", 40, PPC_OPERAND_VSR }, 468 { "f41", 41, PPC_OPERAND_VSR }, 469 { "f42", 42, PPC_OPERAND_VSR }, 470 { "f43", 43, PPC_OPERAND_VSR }, 471 { "f44", 44, PPC_OPERAND_VSR }, 472 { "f45", 45, PPC_OPERAND_VSR }, 473 { "f46", 46, PPC_OPERAND_VSR }, 474 { "f47", 47, PPC_OPERAND_VSR }, 475 { "f48", 48, PPC_OPERAND_VSR }, 476 { "f49", 49, PPC_OPERAND_VSR }, 477 { "f5", 5, PPC_OPERAND_FPR }, 478 { "f50", 50, PPC_OPERAND_VSR }, 479 { "f51", 51, PPC_OPERAND_VSR }, 480 { "f52", 52, PPC_OPERAND_VSR }, 481 { "f53", 53, PPC_OPERAND_VSR }, 482 { "f54", 54, PPC_OPERAND_VSR }, 483 { "f55", 55, PPC_OPERAND_VSR }, 484 { "f56", 56, PPC_OPERAND_VSR }, 485 { "f57", 57, PPC_OPERAND_VSR }, 486 { "f58", 58, PPC_OPERAND_VSR }, 487 { "f59", 59, PPC_OPERAND_VSR }, 488 { "f6", 6, PPC_OPERAND_FPR }, 489 { "f60", 60, PPC_OPERAND_VSR }, 490 { "f61", 61, PPC_OPERAND_VSR }, 491 { "f62", 62, PPC_OPERAND_VSR }, 492 { "f63", 63, PPC_OPERAND_VSR }, 493 { "f7", 7, PPC_OPERAND_FPR }, 494 { "f8", 8, PPC_OPERAND_FPR }, 495 { "f9", 9, PPC_OPERAND_FPR }, 496 497 /* Quantization registers used with pair single instructions. */ 498 { "gqr.0", 0, PPC_OPERAND_GQR }, 499 { "gqr.1", 1, PPC_OPERAND_GQR }, 500 { "gqr.2", 2, PPC_OPERAND_GQR }, 501 { "gqr.3", 3, PPC_OPERAND_GQR }, 502 { "gqr.4", 4, PPC_OPERAND_GQR }, 503 { "gqr.5", 5, PPC_OPERAND_GQR }, 504 { "gqr.6", 6, PPC_OPERAND_GQR }, 505 { "gqr.7", 7, PPC_OPERAND_GQR }, 506 { "gqr0", 0, PPC_OPERAND_GQR }, 507 { "gqr1", 1, PPC_OPERAND_GQR }, 508 { "gqr2", 2, PPC_OPERAND_GQR }, 509 { "gqr3", 3, PPC_OPERAND_GQR }, 510 { "gqr4", 4, PPC_OPERAND_GQR }, 511 { "gqr5", 5, PPC_OPERAND_GQR }, 512 { "gqr6", 6, PPC_OPERAND_GQR }, 513 { "gqr7", 7, PPC_OPERAND_GQR }, 514 515 { "lr", 8, PPC_OPERAND_SPR }, 516 517 /* General Purpose Registers */ 518 { "r.0", 0, PPC_OPERAND_GPR }, 519 { "r.1", 1, PPC_OPERAND_GPR }, 520 { "r.10", 10, PPC_OPERAND_GPR }, 521 { "r.11", 11, PPC_OPERAND_GPR }, 522 { "r.12", 12, PPC_OPERAND_GPR }, 523 { "r.13", 13, PPC_OPERAND_GPR }, 524 { "r.14", 14, PPC_OPERAND_GPR }, 525 { "r.15", 15, PPC_OPERAND_GPR }, 526 { "r.16", 16, PPC_OPERAND_GPR }, 527 { "r.17", 17, PPC_OPERAND_GPR }, 528 { "r.18", 18, PPC_OPERAND_GPR }, 529 { "r.19", 19, PPC_OPERAND_GPR }, 530 { "r.2", 2, PPC_OPERAND_GPR }, 531 { "r.20", 20, PPC_OPERAND_GPR }, 532 { "r.21", 21, PPC_OPERAND_GPR }, 533 { "r.22", 22, PPC_OPERAND_GPR }, 534 { "r.23", 23, PPC_OPERAND_GPR }, 535 { "r.24", 24, PPC_OPERAND_GPR }, 536 { "r.25", 25, PPC_OPERAND_GPR }, 537 { "r.26", 26, PPC_OPERAND_GPR }, 538 { "r.27", 27, PPC_OPERAND_GPR }, 539 { "r.28", 28, PPC_OPERAND_GPR }, 540 { "r.29", 29, PPC_OPERAND_GPR }, 541 { "r.3", 3, PPC_OPERAND_GPR }, 542 { "r.30", 30, PPC_OPERAND_GPR }, 543 { "r.31", 31, PPC_OPERAND_GPR }, 544 { "r.4", 4, PPC_OPERAND_GPR }, 545 { "r.5", 5, PPC_OPERAND_GPR }, 546 { "r.6", 6, PPC_OPERAND_GPR }, 547 { "r.7", 7, PPC_OPERAND_GPR }, 548 { "r.8", 8, PPC_OPERAND_GPR }, 549 { "r.9", 9, PPC_OPERAND_GPR }, 550 551 { "r.sp", 1, PPC_OPERAND_GPR }, 552 553 { "r.toc", 2, PPC_OPERAND_GPR }, 554 555 { "r0", 0, PPC_OPERAND_GPR }, 556 { "r1", 1, PPC_OPERAND_GPR }, 557 { "r10", 10, PPC_OPERAND_GPR }, 558 { "r11", 11, PPC_OPERAND_GPR }, 559 { "r12", 12, PPC_OPERAND_GPR }, 560 { "r13", 13, PPC_OPERAND_GPR }, 561 { "r14", 14, PPC_OPERAND_GPR }, 562 { "r15", 15, PPC_OPERAND_GPR }, 563 { "r16", 16, PPC_OPERAND_GPR }, 564 { "r17", 17, PPC_OPERAND_GPR }, 565 { "r18", 18, PPC_OPERAND_GPR }, 566 { "r19", 19, PPC_OPERAND_GPR }, 567 { "r2", 2, PPC_OPERAND_GPR }, 568 { "r20", 20, PPC_OPERAND_GPR }, 569 { "r21", 21, PPC_OPERAND_GPR }, 570 { "r22", 22, PPC_OPERAND_GPR }, 571 { "r23", 23, PPC_OPERAND_GPR }, 572 { "r24", 24, PPC_OPERAND_GPR }, 573 { "r25", 25, PPC_OPERAND_GPR }, 574 { "r26", 26, PPC_OPERAND_GPR }, 575 { "r27", 27, PPC_OPERAND_GPR }, 576 { "r28", 28, PPC_OPERAND_GPR }, 577 { "r29", 29, PPC_OPERAND_GPR }, 578 { "r3", 3, PPC_OPERAND_GPR }, 579 { "r30", 30, PPC_OPERAND_GPR }, 580 { "r31", 31, PPC_OPERAND_GPR }, 581 { "r4", 4, PPC_OPERAND_GPR }, 582 { "r5", 5, PPC_OPERAND_GPR }, 583 { "r6", 6, PPC_OPERAND_GPR }, 584 { "r7", 7, PPC_OPERAND_GPR }, 585 { "r8", 8, PPC_OPERAND_GPR }, 586 { "r9", 9, PPC_OPERAND_GPR }, 587 588 { "rtoc", 2, PPC_OPERAND_GPR }, 589 590 { "sdr1", 25, PPC_OPERAND_SPR }, 591 592 { "sp", 1, PPC_OPERAND_GPR }, 593 594 { "srr0", 26, PPC_OPERAND_SPR }, 595 { "srr1", 27, PPC_OPERAND_SPR }, 596 597 /* Vector (Altivec/VMX) registers */ 598 { "v.0", 0, PPC_OPERAND_VR }, 599 { "v.1", 1, PPC_OPERAND_VR }, 600 { "v.10", 10, PPC_OPERAND_VR }, 601 { "v.11", 11, PPC_OPERAND_VR }, 602 { "v.12", 12, PPC_OPERAND_VR }, 603 { "v.13", 13, PPC_OPERAND_VR }, 604 { "v.14", 14, PPC_OPERAND_VR }, 605 { "v.15", 15, PPC_OPERAND_VR }, 606 { "v.16", 16, PPC_OPERAND_VR }, 607 { "v.17", 17, PPC_OPERAND_VR }, 608 { "v.18", 18, PPC_OPERAND_VR }, 609 { "v.19", 19, PPC_OPERAND_VR }, 610 { "v.2", 2, PPC_OPERAND_VR }, 611 { "v.20", 20, PPC_OPERAND_VR }, 612 { "v.21", 21, PPC_OPERAND_VR }, 613 { "v.22", 22, PPC_OPERAND_VR }, 614 { "v.23", 23, PPC_OPERAND_VR }, 615 { "v.24", 24, PPC_OPERAND_VR }, 616 { "v.25", 25, PPC_OPERAND_VR }, 617 { "v.26", 26, PPC_OPERAND_VR }, 618 { "v.27", 27, PPC_OPERAND_VR }, 619 { "v.28", 28, PPC_OPERAND_VR }, 620 { "v.29", 29, PPC_OPERAND_VR }, 621 { "v.3", 3, PPC_OPERAND_VR }, 622 { "v.30", 30, PPC_OPERAND_VR }, 623 { "v.31", 31, PPC_OPERAND_VR }, 624 { "v.4", 4, PPC_OPERAND_VR }, 625 { "v.5", 5, PPC_OPERAND_VR }, 626 { "v.6", 6, PPC_OPERAND_VR }, 627 { "v.7", 7, PPC_OPERAND_VR }, 628 { "v.8", 8, PPC_OPERAND_VR }, 629 { "v.9", 9, PPC_OPERAND_VR }, 630 631 { "v0", 0, PPC_OPERAND_VR }, 632 { "v1", 1, PPC_OPERAND_VR }, 633 { "v10", 10, PPC_OPERAND_VR }, 634 { "v11", 11, PPC_OPERAND_VR }, 635 { "v12", 12, PPC_OPERAND_VR }, 636 { "v13", 13, PPC_OPERAND_VR }, 637 { "v14", 14, PPC_OPERAND_VR }, 638 { "v15", 15, PPC_OPERAND_VR }, 639 { "v16", 16, PPC_OPERAND_VR }, 640 { "v17", 17, PPC_OPERAND_VR }, 641 { "v18", 18, PPC_OPERAND_VR }, 642 { "v19", 19, PPC_OPERAND_VR }, 643 { "v2", 2, PPC_OPERAND_VR }, 644 { "v20", 20, PPC_OPERAND_VR }, 645 { "v21", 21, PPC_OPERAND_VR }, 646 { "v22", 22, PPC_OPERAND_VR }, 647 { "v23", 23, PPC_OPERAND_VR }, 648 { "v24", 24, PPC_OPERAND_VR }, 649 { "v25", 25, PPC_OPERAND_VR }, 650 { "v26", 26, PPC_OPERAND_VR }, 651 { "v27", 27, PPC_OPERAND_VR }, 652 { "v28", 28, PPC_OPERAND_VR }, 653 { "v29", 29, PPC_OPERAND_VR }, 654 { "v3", 3, PPC_OPERAND_VR }, 655 { "v30", 30, PPC_OPERAND_VR }, 656 { "v31", 31, PPC_OPERAND_VR }, 657 { "v4", 4, PPC_OPERAND_VR }, 658 { "v5", 5, PPC_OPERAND_VR }, 659 { "v6", 6, PPC_OPERAND_VR }, 660 { "v7", 7, PPC_OPERAND_VR }, 661 { "v8", 8, PPC_OPERAND_VR }, 662 { "v9", 9, PPC_OPERAND_VR }, 663 664 /* Vector Scalar (VSX) registers (ISA 2.06). */ 665 { "vs.0", 0, PPC_OPERAND_VSR }, 666 { "vs.1", 1, PPC_OPERAND_VSR }, 667 { "vs.10", 10, PPC_OPERAND_VSR }, 668 { "vs.11", 11, PPC_OPERAND_VSR }, 669 { "vs.12", 12, PPC_OPERAND_VSR }, 670 { "vs.13", 13, PPC_OPERAND_VSR }, 671 { "vs.14", 14, PPC_OPERAND_VSR }, 672 { "vs.15", 15, PPC_OPERAND_VSR }, 673 { "vs.16", 16, PPC_OPERAND_VSR }, 674 { "vs.17", 17, PPC_OPERAND_VSR }, 675 { "vs.18", 18, PPC_OPERAND_VSR }, 676 { "vs.19", 19, PPC_OPERAND_VSR }, 677 { "vs.2", 2, PPC_OPERAND_VSR }, 678 { "vs.20", 20, PPC_OPERAND_VSR }, 679 { "vs.21", 21, PPC_OPERAND_VSR }, 680 { "vs.22", 22, PPC_OPERAND_VSR }, 681 { "vs.23", 23, PPC_OPERAND_VSR }, 682 { "vs.24", 24, PPC_OPERAND_VSR }, 683 { "vs.25", 25, PPC_OPERAND_VSR }, 684 { "vs.26", 26, PPC_OPERAND_VSR }, 685 { "vs.27", 27, PPC_OPERAND_VSR }, 686 { "vs.28", 28, PPC_OPERAND_VSR }, 687 { "vs.29", 29, PPC_OPERAND_VSR }, 688 { "vs.3", 3, PPC_OPERAND_VSR }, 689 { "vs.30", 30, PPC_OPERAND_VSR }, 690 { "vs.31", 31, PPC_OPERAND_VSR }, 691 { "vs.32", 32, PPC_OPERAND_VSR }, 692 { "vs.33", 33, PPC_OPERAND_VSR }, 693 { "vs.34", 34, PPC_OPERAND_VSR }, 694 { "vs.35", 35, PPC_OPERAND_VSR }, 695 { "vs.36", 36, PPC_OPERAND_VSR }, 696 { "vs.37", 37, PPC_OPERAND_VSR }, 697 { "vs.38", 38, PPC_OPERAND_VSR }, 698 { "vs.39", 39, PPC_OPERAND_VSR }, 699 { "vs.4", 4, PPC_OPERAND_VSR }, 700 { "vs.40", 40, PPC_OPERAND_VSR }, 701 { "vs.41", 41, PPC_OPERAND_VSR }, 702 { "vs.42", 42, PPC_OPERAND_VSR }, 703 { "vs.43", 43, PPC_OPERAND_VSR }, 704 { "vs.44", 44, PPC_OPERAND_VSR }, 705 { "vs.45", 45, PPC_OPERAND_VSR }, 706 { "vs.46", 46, PPC_OPERAND_VSR }, 707 { "vs.47", 47, PPC_OPERAND_VSR }, 708 { "vs.48", 48, PPC_OPERAND_VSR }, 709 { "vs.49", 49, PPC_OPERAND_VSR }, 710 { "vs.5", 5, PPC_OPERAND_VSR }, 711 { "vs.50", 50, PPC_OPERAND_VSR }, 712 { "vs.51", 51, PPC_OPERAND_VSR }, 713 { "vs.52", 52, PPC_OPERAND_VSR }, 714 { "vs.53", 53, PPC_OPERAND_VSR }, 715 { "vs.54", 54, PPC_OPERAND_VSR }, 716 { "vs.55", 55, PPC_OPERAND_VSR }, 717 { "vs.56", 56, PPC_OPERAND_VSR }, 718 { "vs.57", 57, PPC_OPERAND_VSR }, 719 { "vs.58", 58, PPC_OPERAND_VSR }, 720 { "vs.59", 59, PPC_OPERAND_VSR }, 721 { "vs.6", 6, PPC_OPERAND_VSR }, 722 { "vs.60", 60, PPC_OPERAND_VSR }, 723 { "vs.61", 61, PPC_OPERAND_VSR }, 724 { "vs.62", 62, PPC_OPERAND_VSR }, 725 { "vs.63", 63, PPC_OPERAND_VSR }, 726 { "vs.7", 7, PPC_OPERAND_VSR }, 727 { "vs.8", 8, PPC_OPERAND_VSR }, 728 { "vs.9", 9, PPC_OPERAND_VSR }, 729 730 { "vs0", 0, PPC_OPERAND_VSR }, 731 { "vs1", 1, PPC_OPERAND_VSR }, 732 { "vs10", 10, PPC_OPERAND_VSR }, 733 { "vs11", 11, PPC_OPERAND_VSR }, 734 { "vs12", 12, PPC_OPERAND_VSR }, 735 { "vs13", 13, PPC_OPERAND_VSR }, 736 { "vs14", 14, PPC_OPERAND_VSR }, 737 { "vs15", 15, PPC_OPERAND_VSR }, 738 { "vs16", 16, PPC_OPERAND_VSR }, 739 { "vs17", 17, PPC_OPERAND_VSR }, 740 { "vs18", 18, PPC_OPERAND_VSR }, 741 { "vs19", 19, PPC_OPERAND_VSR }, 742 { "vs2", 2, PPC_OPERAND_VSR }, 743 { "vs20", 20, PPC_OPERAND_VSR }, 744 { "vs21", 21, PPC_OPERAND_VSR }, 745 { "vs22", 22, PPC_OPERAND_VSR }, 746 { "vs23", 23, PPC_OPERAND_VSR }, 747 { "vs24", 24, PPC_OPERAND_VSR }, 748 { "vs25", 25, PPC_OPERAND_VSR }, 749 { "vs26", 26, PPC_OPERAND_VSR }, 750 { "vs27", 27, PPC_OPERAND_VSR }, 751 { "vs28", 28, PPC_OPERAND_VSR }, 752 { "vs29", 29, PPC_OPERAND_VSR }, 753 { "vs3", 3, PPC_OPERAND_VSR }, 754 { "vs30", 30, PPC_OPERAND_VSR }, 755 { "vs31", 31, PPC_OPERAND_VSR }, 756 { "vs32", 32, PPC_OPERAND_VSR }, 757 { "vs33", 33, PPC_OPERAND_VSR }, 758 { "vs34", 34, PPC_OPERAND_VSR }, 759 { "vs35", 35, PPC_OPERAND_VSR }, 760 { "vs36", 36, PPC_OPERAND_VSR }, 761 { "vs37", 37, PPC_OPERAND_VSR }, 762 { "vs38", 38, PPC_OPERAND_VSR }, 763 { "vs39", 39, PPC_OPERAND_VSR }, 764 { "vs4", 4, PPC_OPERAND_VSR }, 765 { "vs40", 40, PPC_OPERAND_VSR }, 766 { "vs41", 41, PPC_OPERAND_VSR }, 767 { "vs42", 42, PPC_OPERAND_VSR }, 768 { "vs43", 43, PPC_OPERAND_VSR }, 769 { "vs44", 44, PPC_OPERAND_VSR }, 770 { "vs45", 45, PPC_OPERAND_VSR }, 771 { "vs46", 46, PPC_OPERAND_VSR }, 772 { "vs47", 47, PPC_OPERAND_VSR }, 773 { "vs48", 48, PPC_OPERAND_VSR }, 774 { "vs49", 49, PPC_OPERAND_VSR }, 775 { "vs5", 5, PPC_OPERAND_VSR }, 776 { "vs50", 50, PPC_OPERAND_VSR }, 777 { "vs51", 51, PPC_OPERAND_VSR }, 778 { "vs52", 52, PPC_OPERAND_VSR }, 779 { "vs53", 53, PPC_OPERAND_VSR }, 780 { "vs54", 54, PPC_OPERAND_VSR }, 781 { "vs55", 55, PPC_OPERAND_VSR }, 782 { "vs56", 56, PPC_OPERAND_VSR }, 783 { "vs57", 57, PPC_OPERAND_VSR }, 784 { "vs58", 58, PPC_OPERAND_VSR }, 785 { "vs59", 59, PPC_OPERAND_VSR }, 786 { "vs6", 6, PPC_OPERAND_VSR }, 787 { "vs60", 60, PPC_OPERAND_VSR }, 788 { "vs61", 61, PPC_OPERAND_VSR }, 789 { "vs62", 62, PPC_OPERAND_VSR }, 790 { "vs63", 63, PPC_OPERAND_VSR }, 791 { "vs7", 7, PPC_OPERAND_VSR }, 792 { "vs8", 8, PPC_OPERAND_VSR }, 793 { "vs9", 9, PPC_OPERAND_VSR }, 794 795 { "xer", 1, PPC_OPERAND_SPR } 796 }; 797 798 /* Given NAME, find the register number associated with that name, return 799 the integer value associated with the given name or -1 on failure. */ 800 801 static const struct pd_reg * 802 reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 803 { 804 int middle, low, high; 805 int cmp; 806 807 low = 0; 808 high = regcount - 1; 809 810 do 811 { 812 middle = (low + high) / 2; 813 cmp = strcasecmp (name, regs[middle].name); 814 if (cmp < 0) 815 high = middle - 1; 816 else if (cmp > 0) 817 low = middle + 1; 818 else 819 return ®s[middle]; 820 } 821 while (low <= high); 822 823 return NULL; 824 } 825 826 /* Called for a non-symbol, non-number operand. Handles %reg. */ 827 828 void 829 md_operand (expressionS *expressionP) 830 { 831 const struct pd_reg *reg; 832 char *name; 833 char *start; 834 char c; 835 836 if (input_line_pointer[0] != '%' || !ISALPHA (input_line_pointer[1])) 837 return; 838 839 start = input_line_pointer; 840 ++input_line_pointer; 841 842 c = get_symbol_name (&name); 843 reg = reg_name_search (pre_defined_registers, 844 ARRAY_SIZE (pre_defined_registers), name); 845 *input_line_pointer = c; 846 847 if (reg != NULL) 848 { 849 expressionP->X_op = O_register; 850 expressionP->X_add_number = reg->value; 851 expressionP->X_md = reg->flags; 852 } 853 else 854 input_line_pointer = start; 855 } 856 857 /* Whether to do the special parsing. */ 858 static bool cr_operand; 859 860 /* Extra names to recognise in a condition code. This table is sorted. */ 861 static const struct pd_reg cr_cond[] = 862 { 863 { "eq", 2, PPC_OPERAND_CR_BIT }, 864 { "gt", 1, PPC_OPERAND_CR_BIT }, 865 { "lt", 0, PPC_OPERAND_CR_BIT }, 866 { "so", 3, PPC_OPERAND_CR_BIT }, 867 { "un", 3, PPC_OPERAND_CR_BIT } 868 }; 869 870 /* This function is called for each symbol seen in an expression. It 871 handles the special parsing which PowerPC assemblers are supposed 872 to use for condition codes, and recognises other registers when 873 -mregnames. */ 874 875 void 876 ppc_parse_name (const char *name, expressionS *exp, enum expr_mode mode) 877 { 878 const struct pd_reg *reg = NULL; 879 880 if (cr_operand) 881 reg = reg_name_search (cr_cond, ARRAY_SIZE (cr_cond), name); 882 if (reg == NULL && (cr_operand || reg_names_p)) 883 reg = reg_name_search (pre_defined_registers, 884 ARRAY_SIZE (pre_defined_registers), name); 885 if (reg != NULL) 886 { 887 exp->X_op = O_register; 888 exp->X_add_number = reg->value; 889 exp->X_md = reg->flags; 890 return; 891 } 892 893 /* The following replaces code in expr.c operand() after the 894 md_parse_name call. There is too much difference between targets 895 in the way X_md is used to move this code into expr.c. If you 896 do, you'll get failures on x86 due to uninitialised X_md fields, 897 failures on alpha and other targets due to creating register 898 symbols as O_constant rather than O_register, and failures on arc 899 and others due to expecting expr() to leave X_md alone. */ 900 symbolS *sym = symbol_find_or_make (name); 901 902 /* If we have an absolute symbol or a reg, then we know its value 903 now. Copy the symbol value expression to propagate X_md. */ 904 bool done = false; 905 if (mode != expr_defer 906 && !S_FORCE_RELOC (sym, 0)) 907 { 908 segT segment = S_GET_SEGMENT (sym); 909 if (segment == absolute_section || segment == reg_section) 910 { 911 resolve_symbol_value (sym); 912 *exp = *symbol_get_value_expression (sym); 913 done = true; 914 } 915 } 916 if (!done) 917 { 918 exp->X_op = O_symbol; 919 exp->X_add_symbol = sym; 920 exp->X_add_number = 0; 921 } 922 } 923 924 /* Propagate X_md and check register expressions. This is to support 925 condition codes like 4*cr5+eq. */ 926 927 int 928 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right) 929 { 930 /* Accept 4*cr<n> and cr<n>*4. */ 931 if (op == O_multiply 932 && ((right->X_op == O_register 933 && right->X_md == PPC_OPERAND_CR_REG 934 && left->X_op == O_constant 935 && left->X_add_number == 4) 936 || (left->X_op == O_register 937 && left->X_md == PPC_OPERAND_CR_REG 938 && right->X_op == O_constant 939 && right->X_add_number == 4))) 940 { 941 left->X_op = O_register; 942 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT; 943 left->X_add_number *= right->X_add_number; 944 return 1; 945 } 946 947 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */ 948 if (op == O_add 949 && left->X_op == O_register 950 && right->X_op == O_register 951 && ((right->X_md == PPC_OPERAND_CR_BIT 952 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)) 953 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT) 954 && left->X_md == PPC_OPERAND_CR_BIT))) 955 { 956 left->X_md = PPC_OPERAND_CR_BIT; 957 right->X_op = O_constant; 958 return 0; 959 } 960 961 /* Accept reg +/- constant. */ 962 if (left && left->X_op == O_register 963 && !((op == O_add || op == O_subtract) && right->X_op == O_constant)) 964 as_warn (_("invalid register expression")); 965 966 /* Accept constant + reg. */ 967 if (right->X_op == O_register) 968 { 969 if (op == O_add && left->X_op == O_constant) 970 left->X_md = right->X_md; 971 else 972 as_warn (_("invalid register expression")); 973 } 974 975 return 0; 976 } 977 978 /* Local variables. */ 979 980 /* Whether to target xcoff64/elf64. */ 981 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 982 983 /* A separate obstack for use by ppc_hash, so that we can quickly 984 throw away hash table memory . */ 985 struct obstack insn_obstack; 986 987 /* Opcode hash table. */ 988 static htab_t ppc_hash; 989 990 #ifdef OBJ_ELF 991 /* What type of shared library support to use. */ 992 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 993 994 /* Flags to set in the elf header. */ 995 static flagword ppc_flags = 0; 996 997 /* Whether this is Solaris or not. */ 998 #ifdef TARGET_SOLARIS_COMMENT 999 #define SOLARIS_P true 1000 #else 1001 #define SOLARIS_P false 1002 #endif 1003 1004 static bool msolaris = SOLARIS_P; 1005 #endif 1006 1007 #ifdef OBJ_XCOFF 1008 1009 /* The RS/6000 assembler uses the .csect pseudo-op to generate code 1010 using a bunch of different sections. These assembler sections, 1011 however, are all encompassed within the .text, .data or .bss sections 1012 of the final output file. We handle this by using different 1013 subsegments within these main segments. 1014 .tdata and .tbss sections only have one type of csects for now, 1015 but it's better to follow the same construction like the others. */ 1016 1017 struct ppc_xcoff_section ppc_xcoff_text_section; 1018 struct ppc_xcoff_section ppc_xcoff_data_section; 1019 struct ppc_xcoff_section ppc_xcoff_bss_section; 1020 struct ppc_xcoff_section ppc_xcoff_tdata_section; 1021 struct ppc_xcoff_section ppc_xcoff_tbss_section; 1022 1023 /* Return true if the ppc_xcoff_section structure is already 1024 initialized. */ 1025 static bool 1026 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section *section) 1027 { 1028 return section->segment != NULL; 1029 } 1030 1031 /* Initialize a ppc_xcoff_section. 1032 Dummy symbols are used to ensure the position of .text over .data 1033 and .tdata. Moreover, they allow all algorithms here to be sure that 1034 csects isn't NULL. These symbols won't be output. */ 1035 static void 1036 ppc_init_xcoff_section (struct ppc_xcoff_section *s, segT seg) 1037 { 1038 s->segment = seg; 1039 s->next_subsegment = 2; 1040 s->csects = symbol_make ("dummy\001"); 1041 symbol_get_tc (s->csects)->within = s->csects; 1042 } 1043 1044 /* The current csect. */ 1045 static symbolS *ppc_current_csect; 1046 1047 /* The RS/6000 assembler uses a TOC which holds addresses of functions 1048 and variables. Symbols are put in the TOC with the .tc pseudo-op. 1049 A special relocation is used when accessing TOC entries. We handle 1050 the TOC as a subsegment within the .data segment. We set it up if 1051 we see a .toc pseudo-op, and save the csect symbol here. */ 1052 static symbolS *ppc_toc_csect; 1053 1054 /* The first frag in the TOC subsegment. */ 1055 static fragS *ppc_toc_frag; 1056 1057 /* The first frag in the first subsegment after the TOC in the .data 1058 segment. NULL if there are no subsegments after the TOC. */ 1059 static fragS *ppc_after_toc_frag; 1060 1061 /* The current static block. */ 1062 static symbolS *ppc_current_block; 1063 1064 /* The COFF debugging section; set by md_begin. This is not the 1065 .debug section, but is instead the secret BFD section which will 1066 cause BFD to set the section number of a symbol to N_DEBUG. */ 1067 static asection *ppc_coff_debug_section; 1068 1069 /* Structure to set the length field of the dwarf sections. */ 1070 struct dw_subsection { 1071 /* Subsections are simply linked. */ 1072 struct dw_subsection *link; 1073 1074 /* The subsection number. */ 1075 subsegT subseg; 1076 1077 /* Expression to compute the length of the section. */ 1078 expressionS end_exp; 1079 }; 1080 1081 static struct dw_section { 1082 /* Corresponding section. */ 1083 segT sect; 1084 1085 /* Simply linked list of subsections with a label. */ 1086 struct dw_subsection *list_subseg; 1087 1088 /* The anonymous subsection. */ 1089 struct dw_subsection *anon_subseg; 1090 } dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1091 #endif /* OBJ_XCOFF */ 1092 1093 #ifdef OBJ_ELF 1094 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1095 unsigned long *ppc_apuinfo_list; 1096 unsigned int ppc_apuinfo_num; 1097 unsigned int ppc_apuinfo_num_alloc; 1098 #endif /* OBJ_ELF */ 1099 1100 #ifdef OBJ_ELF 1101 const char *const md_shortopts = "b:l:usm:K:VQ:"; 1102 #else 1103 const char *const md_shortopts = "um:"; 1104 #endif 1105 #define OPTION_NOPS (OPTION_MD_BASE + 0) 1106 const struct option md_longopts[] = { 1107 {"nops", required_argument, NULL, OPTION_NOPS}, 1108 {"ppc476-workaround", no_argument, &warn_476, 1}, 1109 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1110 {NULL, no_argument, NULL, 0} 1111 }; 1112 const size_t md_longopts_size = sizeof (md_longopts); 1113 1114 int 1115 md_parse_option (int c, const char *arg) 1116 { 1117 ppc_cpu_t new_cpu; 1118 1119 switch (c) 1120 { 1121 case 'u': 1122 /* -u means that any undefined symbols should be treated as 1123 external, which is the default for gas anyhow. */ 1124 break; 1125 1126 #ifdef OBJ_ELF 1127 case 'l': 1128 /* Solaris as takes -le (presumably for little endian). For completeness 1129 sake, recognize -be also. */ 1130 if (strcmp (arg, "e") == 0) 1131 { 1132 target_big_endian = 0; 1133 set_target_endian = 1; 1134 if (ppc_cpu & PPC_OPCODE_VLE) 1135 as_bad (_("the use of -mvle requires big endian.")); 1136 } 1137 else 1138 return 0; 1139 1140 break; 1141 1142 case 'b': 1143 if (strcmp (arg, "e") == 0) 1144 { 1145 target_big_endian = 1; 1146 set_target_endian = 1; 1147 } 1148 else 1149 return 0; 1150 1151 break; 1152 1153 case 'K': 1154 /* Recognize -K PIC. */ 1155 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1156 { 1157 shlib = SHLIB_PIC; 1158 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1159 } 1160 else 1161 return 0; 1162 1163 break; 1164 #endif 1165 1166 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1167 case 'a': 1168 if (strcmp (arg, "64") == 0) 1169 { 1170 #ifdef BFD64 1171 ppc_obj64 = 1; 1172 if (ppc_cpu & PPC_OPCODE_VLE) 1173 as_bad (_("the use of -mvle requires -a32.")); 1174 #else 1175 as_fatal (_("%s unsupported"), "-a64"); 1176 #endif 1177 } 1178 else if (strcmp (arg, "32") == 0) 1179 ppc_obj64 = 0; 1180 else 1181 return 0; 1182 break; 1183 1184 case 'm': 1185 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1186 /* "raw" is only valid for the disassembler. */ 1187 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0) 1188 { 1189 ppc_cpu = new_cpu; 1190 if (strcmp (arg, "vle") == 0) 1191 { 1192 if (set_target_endian && target_big_endian == 0) 1193 as_bad (_("the use of -mvle requires big endian.")); 1194 if (ppc_obj64) 1195 as_bad (_("the use of -mvle requires -a32.")); 1196 } 1197 } 1198 1199 else if (strcmp (arg, "no-vle") == 0) 1200 { 1201 sticky &= ~PPC_OPCODE_VLE; 1202 1203 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke"); 1204 new_cpu &= ~PPC_OPCODE_VLE; 1205 1206 ppc_cpu = new_cpu; 1207 } 1208 1209 else if (strcmp (arg, "regnames") == 0) 1210 reg_names_p = true; 1211 1212 else if (strcmp (arg, "no-regnames") == 0) 1213 reg_names_p = false; 1214 1215 #ifdef OBJ_ELF 1216 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1217 that require relocation. */ 1218 else if (strcmp (arg, "relocatable") == 0) 1219 { 1220 shlib = SHLIB_MRELOCATABLE; 1221 ppc_flags |= EF_PPC_RELOCATABLE; 1222 } 1223 1224 else if (strcmp (arg, "relocatable-lib") == 0) 1225 { 1226 shlib = SHLIB_MRELOCATABLE; 1227 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1228 } 1229 1230 /* -memb, set embedded bit. */ 1231 else if (strcmp (arg, "emb") == 0) 1232 ppc_flags |= EF_PPC_EMB; 1233 1234 /* -mlittle/-mbig set the endianness. */ 1235 else if (strcmp (arg, "little") == 0 1236 || strcmp (arg, "little-endian") == 0) 1237 { 1238 target_big_endian = 0; 1239 set_target_endian = 1; 1240 if (ppc_cpu & PPC_OPCODE_VLE) 1241 as_bad (_("the use of -mvle requires big endian.")); 1242 } 1243 1244 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1245 { 1246 target_big_endian = 1; 1247 set_target_endian = 1; 1248 } 1249 1250 else if (strcmp (arg, "solaris") == 0) 1251 { 1252 msolaris = true; 1253 ppc_comment_chars = ppc_solaris_comment_chars; 1254 } 1255 1256 else if (strcmp (arg, "no-solaris") == 0) 1257 { 1258 msolaris = false; 1259 ppc_comment_chars = ppc_eabi_comment_chars; 1260 } 1261 else if (strcmp (arg, "spe2") == 0) 1262 { 1263 ppc_cpu |= PPC_OPCODE_SPE2; 1264 } 1265 #endif 1266 else 1267 { 1268 as_bad (_("invalid switch -m%s"), arg); 1269 return 0; 1270 } 1271 break; 1272 1273 #ifdef OBJ_ELF 1274 /* -V: SVR4 argument to print version ID. */ 1275 case 'V': 1276 print_version_id (); 1277 break; 1278 1279 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1280 should be emitted or not. FIXME: Not implemented. */ 1281 case 'Q': 1282 break; 1283 1284 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1285 rather than .stabs.excl, which is ignored by the linker. 1286 FIXME: Not implemented. */ 1287 case 's': 1288 if (arg) 1289 return 0; 1290 1291 break; 1292 #endif 1293 1294 case OPTION_NOPS: 1295 { 1296 char *end; 1297 nop_limit = strtoul (optarg, &end, 0); 1298 if (*end) 1299 as_bad (_("--nops needs a numeric argument")); 1300 } 1301 break; 1302 1303 case 0: 1304 break; 1305 1306 default: 1307 return 0; 1308 } 1309 1310 return 1; 1311 } 1312 1313 static int 1314 is_ppc64_target (const bfd_target *targ, void *data ATTRIBUTE_UNUSED) 1315 { 1316 switch (targ->flavour) 1317 { 1318 #ifdef OBJ_ELF 1319 case bfd_target_elf_flavour: 1320 return startswith (targ->name, "elf64-powerpc"); 1321 #endif 1322 #ifdef OBJ_XCOFF 1323 case bfd_target_xcoff_flavour: 1324 return (strcmp (targ->name, "aixcoff64-rs6000") == 0 1325 || strcmp (targ->name, "aix5coff64-rs6000") == 0); 1326 #endif 1327 default: 1328 return 0; 1329 } 1330 } 1331 1332 void 1333 md_show_usage (FILE *stream) 1334 { 1335 fprintf (stream, _("\ 1336 PowerPC options:\n")); 1337 fprintf (stream, _("\ 1338 -a32 generate ELF32/XCOFF32\n")); 1339 if (bfd_iterate_over_targets (is_ppc64_target, NULL)) 1340 fprintf (stream, _("\ 1341 -a64 generate ELF64/XCOFF64\n")); 1342 fprintf (stream, _("\ 1343 -u ignored\n")); 1344 fprintf (stream, _("\ 1345 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n")); 1346 fprintf (stream, _("\ 1347 -mpwr generate code for POWER (RIOS1)\n")); 1348 fprintf (stream, _("\ 1349 -m601 generate code for PowerPC 601\n")); 1350 fprintf (stream, _("\ 1351 -mppc, -mppc32, -m603, -m604\n\ 1352 generate code for PowerPC 603/604\n")); 1353 fprintf (stream, _("\ 1354 -m403 generate code for PowerPC 403\n")); 1355 fprintf (stream, _("\ 1356 -m405 generate code for PowerPC 405\n")); 1357 fprintf (stream, _("\ 1358 -m440 generate code for PowerPC 440\n")); 1359 fprintf (stream, _("\ 1360 -m464 generate code for PowerPC 464\n")); 1361 fprintf (stream, _("\ 1362 -m476 generate code for PowerPC 476\n")); 1363 fprintf (stream, _("\ 1364 -m7400, -m7410, -m7450, -m7455\n\ 1365 generate code for PowerPC 7400/7410/7450/7455\n")); 1366 fprintf (stream, _("\ 1367 -m750cl, -mgekko, -mbroadway\n\ 1368 generate code for PowerPC 750cl/Gekko/Broadway\n")); 1369 fprintf (stream, _("\ 1370 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); 1371 fprintf (stream, _("\ 1372 -mppc64, -m620 generate code for PowerPC 620/625/630\n")); 1373 fprintf (stream, _("\ 1374 -mppc64bridge generate code for PowerPC 64, including bridge insns\n")); 1375 fprintf (stream, _("\ 1376 -mbooke generate code for 32-bit PowerPC BookE\n")); 1377 fprintf (stream, _("\ 1378 -ma2 generate code for A2 architecture\n")); 1379 fprintf (stream, _("\ 1380 -mpower4, -mpwr4 generate code for Power4 architecture\n")); 1381 fprintf (stream, _("\ 1382 -mpower5, -mpwr5, -mpwr5x\n\ 1383 generate code for Power5 architecture\n")); 1384 fprintf (stream, _("\ 1385 -mpower6, -mpwr6 generate code for Power6 architecture\n")); 1386 fprintf (stream, _("\ 1387 -mpower7, -mpwr7 generate code for Power7 architecture\n")); 1388 fprintf (stream, _("\ 1389 -mpower8, -mpwr8 generate code for Power8 architecture\n")); 1390 fprintf (stream, _("\ 1391 -mpower9, -mpwr9 generate code for Power9 architecture\n")); 1392 fprintf (stream, _("\ 1393 -mpower10, -mpwr10 generate code for Power10 architecture\n")); 1394 fprintf (stream, _("\ 1395 -mlibresoc generate code for Libre-SOC architecture\n")); 1396 fprintf (stream, _("\ 1397 -mfuture generate code for 'future' architecture\n")); 1398 fprintf (stream, _("\ 1399 -mcell generate code for Cell Broadband Engine architecture\n")); 1400 fprintf (stream, _("\ 1401 -mcom generate code for Power/PowerPC common instructions\n")); 1402 fprintf (stream, _("\ 1403 -many generate code for any architecture (PWR/PWRX/PPC)\n")); 1404 fprintf (stream, _("\ 1405 -maltivec generate code for AltiVec\n")); 1406 fprintf (stream, _("\ 1407 -mvsx generate code for Vector-Scalar (VSX) instructions\n")); 1408 fprintf (stream, _("\ 1409 -me300 generate code for PowerPC e300 family\n")); 1410 fprintf (stream, _("\ 1411 -me500, -me500x2 generate code for Motorola e500 core complex\n")); 1412 fprintf (stream, _("\ 1413 -me500mc, generate code for Freescale e500mc core complex\n")); 1414 fprintf (stream, _("\ 1415 -me500mc64, generate code for Freescale e500mc64 core complex\n")); 1416 fprintf (stream, _("\ 1417 -me5500, generate code for Freescale e5500 core complex\n")); 1418 fprintf (stream, _("\ 1419 -me6500, generate code for Freescale e6500 core complex\n")); 1420 fprintf (stream, _("\ 1421 -mspe generate code for Motorola SPE instructions\n")); 1422 fprintf (stream, _("\ 1423 -mspe2 generate code for Freescale SPE2 instructions\n")); 1424 fprintf (stream, _("\ 1425 -mvle generate code for Freescale VLE instructions\n")); 1426 fprintf (stream, _("\ 1427 -mtitan generate code for AppliedMicro Titan core complex\n")); 1428 fprintf (stream, _("\ 1429 -mregnames Allow symbolic names for registers\n")); 1430 fprintf (stream, _("\ 1431 -mno-regnames Do not allow symbolic names for registers\n")); 1432 #ifdef OBJ_ELF 1433 fprintf (stream, _("\ 1434 -mrelocatable support for GCC's -mrelocatble option\n")); 1435 fprintf (stream, _("\ 1436 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n")); 1437 fprintf (stream, _("\ 1438 -memb set PPC_EMB bit in ELF flags\n")); 1439 fprintf (stream, _("\ 1440 -mlittle, -mlittle-endian, -le\n\ 1441 generate code for a little endian machine\n")); 1442 fprintf (stream, _("\ 1443 -mbig, -mbig-endian, -be\n\ 1444 generate code for a big endian machine\n")); 1445 fprintf (stream, _("\ 1446 -msolaris generate code for Solaris\n")); 1447 fprintf (stream, _("\ 1448 -mno-solaris do not generate code for Solaris\n")); 1449 fprintf (stream, _("\ 1450 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n")); 1451 fprintf (stream, _("\ 1452 -V print assembler version number\n")); 1453 fprintf (stream, _("\ 1454 -Qy, -Qn ignored\n")); 1455 #endif 1456 fprintf (stream, _("\ 1457 -nops=count when aligning, more than COUNT nops uses a branch\n")); 1458 fprintf (stream, _("\ 1459 -ppc476-workaround warn if emitting data to code sections\n")); 1460 } 1461 1462 /* Set ppc_cpu if it is not already set. */ 1463 1464 static void 1465 ppc_set_cpu (void) 1466 { 1467 const char *default_os = TARGET_OS; 1468 const char *default_cpu = TARGET_CPU; 1469 1470 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1471 { 1472 if (ppc_obj64) 1473 if (target_big_endian) 1474 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1475 else 1476 /* The minimum supported cpu for 64-bit little-endian is power8. */ 1477 ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8"); 1478 else if (startswith (default_os, "aix") 1479 && default_os[3] >= '4' && default_os[3] <= '9') 1480 ppc_cpu |= PPC_OPCODE_COMMON; 1481 else if (startswith (default_os, "aix3")) 1482 ppc_cpu |= PPC_OPCODE_POWER; 1483 else if (strcmp (default_cpu, "rs6000") == 0) 1484 ppc_cpu |= PPC_OPCODE_POWER; 1485 else if (startswith (default_cpu, "powerpc")) 1486 ppc_cpu |= PPC_OPCODE_PPC; 1487 else 1488 as_fatal (_("unknown default cpu = %s, os = %s"), 1489 default_cpu, default_os); 1490 } 1491 } 1492 1493 /* Figure out the BFD architecture to use. This function and ppc_mach 1494 are called well before md_begin, when the output file is opened. */ 1495 1496 enum bfd_architecture 1497 ppc_arch (void) 1498 { 1499 ppc_set_cpu (); 1500 1501 #ifdef OBJ_ELF 1502 return bfd_arch_powerpc; 1503 #else 1504 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1505 return bfd_arch_powerpc; 1506 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1507 return bfd_arch_powerpc; 1508 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1509 return bfd_arch_rs6000; 1510 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1511 { 1512 const char *default_cpu = TARGET_CPU; 1513 if (startswith (default_cpu, "powerpc")) 1514 return bfd_arch_powerpc; 1515 } 1516 return bfd_arch_rs6000; 1517 #endif 1518 } 1519 1520 unsigned long 1521 ppc_mach (void) 1522 { 1523 if (ppc_obj64) 1524 return bfd_mach_ppc64; 1525 else if (ppc_arch () == bfd_arch_rs6000) 1526 return bfd_mach_rs6k; 1527 else if (ppc_cpu & PPC_OPCODE_TITAN) 1528 return bfd_mach_ppc_titan; 1529 else if (ppc_cpu & PPC_OPCODE_VLE) 1530 return bfd_mach_ppc_vle; 1531 else 1532 return bfd_mach_ppc; 1533 } 1534 1535 extern const char* 1536 ppc_target_format (void) 1537 { 1538 #ifdef OBJ_COFF 1539 #if TE_POWERMAC 1540 return "xcoff-powermac"; 1541 #else 1542 # ifdef TE_AIX5 1543 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1544 # else 1545 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1546 # endif 1547 #endif 1548 #endif 1549 #ifdef OBJ_ELF 1550 # ifdef TE_FreeBSD 1551 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1552 # elif defined (TE_VXWORKS) 1553 return "elf32-powerpc-vxworks"; 1554 # else 1555 return (target_big_endian 1556 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1557 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1558 # endif 1559 #endif 1560 } 1561 1562 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1563 Return TRUE if there's a problem, otherwise FALSE. */ 1564 1565 static bool 1566 insn_validate (const struct powerpc_opcode *op) 1567 { 1568 const ppc_opindex_t *o; 1569 uint64_t omask = op->mask; 1570 1571 /* The mask had better not trim off opcode bits. */ 1572 if ((op->opcode & omask) != op->opcode) 1573 { 1574 as_bad (_("mask trims opcode bits for %s"), op->name); 1575 return true; 1576 } 1577 1578 /* The operands must not overlap the opcode or each other. */ 1579 for (o = op->operands; *o; ++o) 1580 { 1581 bool optional = false; 1582 if (*o >= num_powerpc_operands) 1583 { 1584 as_bad (_("operand index error for %s"), op->name); 1585 return true; 1586 } 1587 else 1588 { 1589 uint64_t mask; 1590 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1591 if (operand->shift == (int) PPC_OPSHIFT_INV) 1592 { 1593 const char *errmsg; 1594 uint64_t val; 1595 1596 errmsg = NULL; 1597 val = -1; 1598 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1599 val = -val; 1600 mask = (*operand->insert) (0, val, ppc_cpu, &errmsg); 1601 } 1602 else if (operand->shift == (int) PPC_OPSHIFT_SH6) 1603 mask = (0x1f << 11) | 0x2; 1604 else if (operand->shift >= 0) 1605 mask = operand->bitm << operand->shift; 1606 else 1607 mask = operand->bitm >> -operand->shift; 1608 if (omask & mask) 1609 { 1610 as_bad (_("operand %d overlap in %s"), 1611 (int) (o - op->operands), op->name); 1612 return true; 1613 } 1614 omask |= mask; 1615 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 1616 optional = true; 1617 else if (optional) 1618 { 1619 as_bad (_("non-optional operand %d follows optional operand in %s"), 1620 (int) (o - op->operands), op->name); 1621 return true; 1622 } 1623 } 1624 } 1625 return false; 1626 } 1627 1628 static void * 1629 insn_calloc (size_t n, size_t size) 1630 { 1631 size_t amt = n * size; 1632 void *ret = obstack_alloc (&insn_obstack, amt); 1633 memset (ret, 0, amt); 1634 return ret; 1635 } 1636 1637 /* Insert opcodes into hash tables. Called at startup and for 1638 .machine pseudo. */ 1639 1640 static void 1641 ppc_setup_opcodes (void) 1642 { 1643 const struct powerpc_opcode *op; 1644 const struct powerpc_opcode *op_end; 1645 bool bad_insn = false; 1646 1647 if (ppc_hash != NULL) 1648 { 1649 htab_delete (ppc_hash); 1650 _obstack_free (&insn_obstack, NULL); 1651 } 1652 1653 obstack_begin (&insn_obstack, chunksize); 1654 1655 /* Insert the opcodes into a hash table. */ 1656 ppc_hash = htab_create_alloc (5000, hash_string_tuple, eq_string_tuple, 1657 NULL, insn_calloc, NULL); 1658 1659 if (ENABLE_CHECKING) 1660 { 1661 unsigned int i; 1662 1663 /* An index into powerpc_operands is stored in struct fix 1664 fx_pcrel_adjust which is a 16 bit field. */ 1665 gas_assert (num_powerpc_operands <= PPC_OPINDEX_MAX + 1); 1666 1667 /* Check operand masks. Code here and in the disassembler assumes 1668 all the 1's in the mask are contiguous. */ 1669 for (i = 0; i < num_powerpc_operands; ++i) 1670 { 1671 uint64_t mask = powerpc_operands[i].bitm; 1672 unsigned long flags = powerpc_operands[i].flags; 1673 uint64_t right_bit; 1674 unsigned int j; 1675 1676 if ((flags & PPC_OPERAND_PLUS1) != 0 1677 && (flags & PPC_OPERAND_NONZERO) != 0) 1678 as_bad ("mutually exclusive operand flags"); 1679 1680 right_bit = mask & -mask; 1681 mask += right_bit; 1682 right_bit = mask & -mask; 1683 if (mask != right_bit) 1684 { 1685 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1686 bad_insn = true; 1687 } 1688 for (j = i + 1; j < num_powerpc_operands; ++j) 1689 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1690 sizeof (powerpc_operands[0])) == 0) 1691 { 1692 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1693 j, i); 1694 bad_insn = true; 1695 } 1696 } 1697 } 1698 1699 op_end = powerpc_opcodes + powerpc_num_opcodes; 1700 for (op = powerpc_opcodes; op < op_end; op++) 1701 { 1702 if (ENABLE_CHECKING) 1703 { 1704 unsigned int new_opcode = PPC_OP (op[0].opcode); 1705 1706 #ifdef PRINT_OPCODE_TABLE 1707 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx" 1708 "\tmask: 0x%llx\tflags: 0x%llx\n", 1709 op->name, (unsigned int) (op - powerpc_opcodes), 1710 new_opcode, (unsigned long long) op->opcode, 1711 (unsigned long long) op->mask, 1712 (unsigned long long) op->flags); 1713 #endif 1714 1715 /* The major opcodes had better be sorted. Code in the disassembler 1716 assumes the insns are sorted according to major opcode. */ 1717 if (op != powerpc_opcodes 1718 && new_opcode < PPC_OP (op[-1].opcode)) 1719 { 1720 as_bad (_("major opcode is not sorted for %s"), op->name); 1721 bad_insn = true; 1722 } 1723 1724 if ((op->flags & PPC_OPCODE_VLE) != 0) 1725 { 1726 as_bad (_("%s is enabled by vle flag"), op->name); 1727 bad_insn = true; 1728 } 1729 if (PPC_OP (op->opcode) != 4 1730 && PPC_OP (op->opcode) != 31 1731 && (op->deprecated & PPC_OPCODE_VLE) == 0) 1732 { 1733 as_bad (_("%s not disabled by vle flag"), op->name); 1734 bad_insn = true; 1735 } 1736 bad_insn |= insn_validate (op); 1737 } 1738 1739 if ((ppc_cpu & op->flags) != 0 1740 && !(ppc_cpu & op->deprecated) 1741 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1742 { 1743 as_bad (_("duplicate %s"), op->name); 1744 bad_insn = true; 1745 } 1746 } 1747 1748 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1749 for (op = powerpc_opcodes; op < op_end; op++) 1750 str_hash_insert (ppc_hash, op->name, op, 0); 1751 1752 op_end = prefix_opcodes + prefix_num_opcodes; 1753 for (op = prefix_opcodes; op < op_end; op++) 1754 { 1755 if (ENABLE_CHECKING) 1756 { 1757 unsigned int new_opcode = PPC_PREFIX_SEG (op[0].opcode); 1758 1759 #ifdef PRINT_OPCODE_TABLE 1760 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx" 1761 "\tmask: 0x%llx\tflags: 0x%llx\n", 1762 op->name, (unsigned int) (op - prefix_opcodes), 1763 new_opcode, (unsigned long long) op->opcode, 1764 (unsigned long long) op->mask, 1765 (unsigned long long) op->flags); 1766 #endif 1767 1768 /* The major opcodes had better be sorted. Code in the disassembler 1769 assumes the insns are sorted according to major opcode. */ 1770 if (op != prefix_opcodes 1771 && new_opcode < PPC_PREFIX_SEG (op[-1].opcode)) 1772 { 1773 as_bad (_("major opcode is not sorted for %s"), op->name); 1774 bad_insn = true; 1775 } 1776 bad_insn |= insn_validate (op); 1777 } 1778 1779 if ((ppc_cpu & op->flags) != 0 1780 && !(ppc_cpu & op->deprecated) 1781 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1782 { 1783 as_bad (_("duplicate %s"), op->name); 1784 bad_insn = true; 1785 } 1786 } 1787 1788 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1789 for (op = prefix_opcodes; op < op_end; op++) 1790 str_hash_insert (ppc_hash, op->name, op, 0); 1791 1792 if ((ppc_cpu & (PPC_OPCODE_VLE | PPC_OPCODE_ANY)) != 0) 1793 { 1794 unsigned int prev_seg = 0; 1795 unsigned int seg; 1796 1797 op_end = vle_opcodes + vle_num_opcodes; 1798 for (op = vle_opcodes; op < op_end; op++) 1799 { 1800 if (ENABLE_CHECKING) 1801 { 1802 seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); 1803 1804 #ifdef PRINT_OPCODE_TABLE 1805 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx" 1806 "\tmask: 0x%llx\tflags: 0x%llx\n", 1807 op->name, (unsigned int) (op - vle_opcodes), 1808 (unsigned int) seg, (unsigned long long) op->opcode, 1809 (unsigned long long) op->mask, 1810 (unsigned long long) op->flags); 1811 #endif 1812 1813 if (seg < prev_seg) 1814 { 1815 as_bad (_("major opcode is not sorted for %s"), op->name); 1816 bad_insn = true; 1817 } 1818 prev_seg = seg; 1819 bad_insn |= insn_validate (op); 1820 } 1821 1822 str_hash_insert (ppc_hash, op->name, op, 0); 1823 } 1824 } 1825 1826 /* LSP instructions */ 1827 if ((ppc_cpu & (PPC_OPCODE_LSP | PPC_OPCODE_ANY)) != 0) 1828 { 1829 unsigned int prev_seg = 0; 1830 unsigned int seg; 1831 op_end = lsp_opcodes + lsp_num_opcodes; 1832 for (op = lsp_opcodes; op < op_end; op++) 1833 { 1834 if (ENABLE_CHECKING) 1835 { 1836 seg = LSP_OP_TO_SEG (op->opcode); 1837 if (seg < prev_seg) 1838 { 1839 as_bad (_("opcode is not sorted for %s"), op->name); 1840 bad_insn = true; 1841 } 1842 prev_seg = seg; 1843 bad_insn |= insn_validate (op); 1844 } 1845 1846 str_hash_insert (ppc_hash, op->name, op, 0); 1847 } 1848 } 1849 1850 /* SPE2 instructions */ 1851 if ((ppc_cpu & (PPC_OPCODE_SPE2 | PPC_OPCODE_ANY)) != 0) 1852 { 1853 unsigned int prev_seg = 0; 1854 unsigned int seg; 1855 op_end = spe2_opcodes + spe2_num_opcodes; 1856 for (op = spe2_opcodes; op < op_end; op++) 1857 { 1858 if (ENABLE_CHECKING) 1859 { 1860 seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); 1861 if (seg < prev_seg) 1862 { 1863 as_bad (_("major opcode is not sorted for %s"), op->name); 1864 bad_insn = true; 1865 } 1866 prev_seg = seg; 1867 bad_insn |= insn_validate (op); 1868 } 1869 1870 str_hash_insert (ppc_hash, op->name, op, 0); 1871 } 1872 } 1873 1874 if (bad_insn) 1875 abort (); 1876 } 1877 1878 /* This function is called when the assembler starts up. It is called 1879 after the options have been parsed and the output file has been 1880 opened. */ 1881 1882 void 1883 md_begin (void) 1884 { 1885 ppc_set_cpu (); 1886 1887 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1888 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1889 1890 #ifdef OBJ_ELF 1891 /* Set the ELF flags if desired. */ 1892 if (ppc_flags && !msolaris) 1893 bfd_set_private_flags (stdoutput, ppc_flags); 1894 #endif 1895 1896 ppc_setup_opcodes (); 1897 1898 /* Tell the main code what the endianness is if it is not overridden 1899 by the user. */ 1900 if (!set_target_endian) 1901 { 1902 set_target_endian = 1; 1903 target_big_endian = PPC_BIG_ENDIAN; 1904 } 1905 1906 #ifdef OBJ_XCOFF 1907 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1908 1909 /* Create XCOFF sections with .text in first, as it's creating dummy symbols 1910 to serve as initial csects. This forces the text csects to precede the 1911 data csects. These symbols will not be output. */ 1912 ppc_init_xcoff_section (&ppc_xcoff_text_section, text_section); 1913 ppc_init_xcoff_section (&ppc_xcoff_data_section, data_section); 1914 ppc_init_xcoff_section (&ppc_xcoff_bss_section, bss_section); 1915 #endif 1916 } 1917 1918 void 1919 ppc_md_end (void) 1920 { 1921 if (ppc_hash) 1922 { 1923 htab_delete (ppc_hash); 1924 _obstack_free (&insn_obstack, NULL); 1925 } 1926 ppc_hash = NULL; 1927 } 1928 1929 void 1930 ppc_cleanup (void) 1931 { 1932 #ifdef OBJ_ELF 1933 if (ppc_apuinfo_list == NULL) 1934 return; 1935 1936 /* Ok, so write the section info out. We have this layout: 1937 1938 byte data what 1939 ---- ---- ---- 1940 0 8 length of "APUinfo\0" 1941 4 (n*4) number of APU's (4 bytes each) 1942 8 2 note type 2 1943 12 "APUinfo\0" name 1944 20 APU#1 first APU's info 1945 24 APU#2 second APU's info 1946 ... ... 1947 */ 1948 { 1949 char *p; 1950 asection *seg = now_seg; 1951 subsegT subseg = now_subseg; 1952 asection *apuinfo_secp = (asection *) NULL; 1953 unsigned int i; 1954 1955 /* Create the .PPC.EMB.apuinfo section. */ 1956 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); 1957 bfd_set_section_flags (apuinfo_secp, SEC_HAS_CONTENTS | SEC_READONLY); 1958 1959 p = frag_more (4); 1960 md_number_to_chars (p, (valueT) 8, 4); 1961 1962 p = frag_more (4); 1963 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1964 1965 p = frag_more (4); 1966 md_number_to_chars (p, (valueT) 2, 4); 1967 1968 p = frag_more (8); 1969 strcpy (p, APUINFO_LABEL); 1970 1971 for (i = 0; i < ppc_apuinfo_num; i++) 1972 { 1973 p = frag_more (4); 1974 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1975 } 1976 1977 frag_align (2, 0, 0); 1978 1979 /* We probably can't restore the current segment, for there likely 1980 isn't one yet... */ 1981 if (seg && subseg) 1982 subseg_set (seg, subseg); 1983 } 1984 #endif 1985 } 1986 1987 /* Insert an operand value into an instruction. */ 1988 1989 static uint64_t 1990 ppc_insert_operand (uint64_t insn, 1991 const struct powerpc_operand *operand, 1992 int64_t val, 1993 ppc_cpu_t cpu, 1994 const char *file, 1995 unsigned int line) 1996 { 1997 int64_t min, max, right; 1998 1999 max = operand->bitm; 2000 right = max & -max; 2001 min = 0; 2002 2003 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 2004 { 2005 /* Extend the allowed range for addis to [-32768, 65535]. 2006 Similarly for cmpli and some VLE high part insns. For 64-bit 2007 it would be good to disable this for signed fields since the 2008 value is sign extended into the high 32 bits of the register. 2009 If the value is, say, an address, then we might care about 2010 the high bits. However, gcc as of 2014-06 uses unsigned 2011 values when loading the high part of 64-bit constants using 2012 lis. */ 2013 min = ~(max >> 1) & -right; 2014 } 2015 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 2016 { 2017 max = (max >> 1) & -right; 2018 min = ~max & -right; 2019 } 2020 else if ((operand->flags & PPC_OPERAND_NONZERO) != 0) 2021 { 2022 ++min; 2023 ++max; 2024 } 2025 2026 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 2027 max++; 2028 2029 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 2030 { 2031 int64_t tmp = min; 2032 min = -max; 2033 max = -tmp; 2034 } 2035 2036 if (min <= max) 2037 { 2038 /* Some people write constants with the sign extension done by 2039 hand but only up to 32 bits. This shouldn't really be valid, 2040 but, to permit this code to assemble on a 64-bit host, we 2041 sign extend the 32-bit value to 64 bits if so doing makes the 2042 value valid. We only do this for operands that are 32-bits or 2043 smaller. */ 2044 if (val > max 2045 && (operand->bitm & ~0xffffffffULL) == 0 2046 && (val - (1LL << 32)) >= min 2047 && (val - (1LL << 32)) <= max 2048 && ((val - (1LL << 32)) & (right - 1)) == 0) 2049 val = val - (1LL << 32); 2050 2051 /* Similarly, people write expressions like ~(1<<15), and expect 2052 this to be OK for a 32-bit unsigned value. */ 2053 else if (val < min 2054 && (operand->bitm & ~0xffffffffULL) == 0 2055 && (val + (1LL << 32)) >= min 2056 && (val + (1LL << 32)) <= max 2057 && ((val + (1LL << 32)) & (right - 1)) == 0) 2058 val = val + (1LL << 32); 2059 2060 else if (val < min 2061 || val > max 2062 || (val & (right - 1)) != 0) 2063 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 2064 } 2065 2066 if (operand->insert) 2067 { 2068 const char *errmsg; 2069 2070 errmsg = NULL; 2071 insn = (*operand->insert) (insn, val, cpu, &errmsg); 2072 if (errmsg != (const char *) NULL) 2073 as_bad_where (file, line, "%s", errmsg); 2074 } 2075 else 2076 { 2077 if ((operand->flags & PPC_OPERAND_NONZERO) != 0) 2078 --val; 2079 if (operand->shift >= 0) 2080 insn |= (val & operand->bitm) << operand->shift; 2081 else 2082 insn |= (val & operand->bitm) >> -operand->shift; 2083 } 2084 2085 return insn; 2086 } 2087 2088 2089 #ifdef OBJ_ELF 2090 /* Parse @got, etc. and return the desired relocation. */ 2091 static bfd_reloc_code_real_type 2092 ppc_elf_suffix (char **str_p, expressionS *exp_p) 2093 { 2094 struct map_bfd { 2095 const char *string; 2096 unsigned int length : 8; 2097 unsigned int valid32 : 1; 2098 unsigned int valid64 : 1; 2099 unsigned int reloc; 2100 }; 2101 2102 char ident[20]; 2103 char *str = *str_p; 2104 char *str2; 2105 int ch; 2106 int len; 2107 const struct map_bfd *ptr; 2108 2109 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 2110 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 2111 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 2112 2113 static const struct map_bfd mapping[] = { 2114 MAP ("l", BFD_RELOC_LO16), 2115 MAP ("h", BFD_RELOC_HI16), 2116 MAP ("ha", BFD_RELOC_HI16_S), 2117 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 2118 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 2119 MAP ("got", BFD_RELOC_16_GOTOFF), 2120 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 2121 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 2122 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 2123 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 2124 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 2125 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 2126 MAP ("copy", BFD_RELOC_PPC_COPY), 2127 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 2128 MAP ("sectoff", BFD_RELOC_16_BASEREL), 2129 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 2130 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 2131 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 2132 MAP ("tls", BFD_RELOC_PPC_TLS), 2133 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 2134 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 2135 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 2136 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 2137 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 2138 MAP ("tprel", BFD_RELOC_PPC_TPREL), 2139 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 2140 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 2141 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 2142 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 2143 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 2144 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 2145 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 2146 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 2147 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 2148 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 2149 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 2150 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 2151 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 2152 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 2153 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 2154 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 2155 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 2156 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 2157 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 2158 MAP32 ("fixup", BFD_RELOC_CTOR), 2159 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 2160 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 2161 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 2162 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 2163 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 2164 MAP32 ("sdarel", BFD_RELOC_GPREL16), 2165 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 2166 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 2167 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 2168 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 2169 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 2170 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 2171 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 2172 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 2173 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 2174 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 2175 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 2176 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 2177 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 2178 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 2179 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 2180 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 2181 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 2182 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 2183 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 2184 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 2185 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 2186 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 2187 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 2188 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 2189 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 2190 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 2191 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 2192 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 2193 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 2194 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 2195 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 2196 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 2197 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 2198 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 2199 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 2200 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 2201 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 2202 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 2203 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 2204 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 2205 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 2206 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 2207 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 2208 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 2209 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 2210 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC), 2211 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34), 2212 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34), 2213 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34), 2214 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL), 2215 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34), 2216 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34), 2217 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34), 2218 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34), 2219 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34), 2220 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34), 2221 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34), 2222 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34), 2223 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 2224 }; 2225 2226 if (*str++ != '@') 2227 return BFD_RELOC_NONE; 2228 2229 for (ch = *str, str2 = ident; 2230 (str2 < ident + sizeof (ident) - 1 2231 && (ISALNUM (ch) || ch == '@')); 2232 ch = *++str) 2233 { 2234 *str2++ = TOLOWER (ch); 2235 } 2236 2237 *str2 = '\0'; 2238 len = str2 - ident; 2239 2240 ch = ident[0]; 2241 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2242 if (ch == ptr->string[0] 2243 && len == ptr->length 2244 && memcmp (ident, ptr->string, ptr->length) == 0 2245 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2246 { 2247 int reloc = ptr->reloc; 2248 2249 if (!ppc_obj64 && (exp_p->X_op == O_big || exp_p->X_add_number != 0)) 2250 { 2251 switch (reloc) 2252 { 2253 case BFD_RELOC_16_GOTOFF: 2254 case BFD_RELOC_LO16_GOTOFF: 2255 case BFD_RELOC_HI16_GOTOFF: 2256 case BFD_RELOC_HI16_S_GOTOFF: 2257 as_warn (_("symbol+offset@%s means symbol@%s+offset"), 2258 ptr->string, ptr->string); 2259 break; 2260 2261 case BFD_RELOC_PPC_GOT_TLSGD16: 2262 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2263 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2264 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2265 case BFD_RELOC_PPC_GOT_TLSLD16: 2266 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2267 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2268 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2269 case BFD_RELOC_PPC_GOT_DTPREL16: 2270 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2271 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2272 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2273 case BFD_RELOC_PPC_GOT_TPREL16: 2274 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2275 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2276 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2277 as_bad (_("symbol+offset@%s not supported"), ptr->string); 2278 break; 2279 } 2280 } 2281 2282 /* Now check for identifier@suffix+constant. */ 2283 if (*str == '-' || *str == '+') 2284 { 2285 char *orig_line = input_line_pointer; 2286 expressionS new_exp; 2287 2288 input_line_pointer = str; 2289 expression (&new_exp); 2290 if (new_exp.X_op == O_constant && exp_p->X_op != O_big) 2291 { 2292 exp_p->X_add_number += new_exp.X_add_number; 2293 str = input_line_pointer; 2294 } 2295 input_line_pointer = orig_line; 2296 } 2297 *str_p = str; 2298 2299 if (reloc == (int) BFD_RELOC_PPC64_TOC 2300 && exp_p->X_op == O_symbol 2301 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2302 { 2303 /* Change the symbol so that the dummy .TOC. symbol can be 2304 omitted from the object file. */ 2305 exp_p->X_add_symbol = &abs_symbol; 2306 } 2307 2308 if (reloc == BFD_RELOC_PPC64_REL24_NOTOC 2309 && (ppc_cpu & PPC_OPCODE_POWER10) == 0) 2310 reloc = BFD_RELOC_PPC64_REL24_P9NOTOC; 2311 2312 return (bfd_reloc_code_real_type) reloc; 2313 } 2314 2315 return BFD_RELOC_NONE; 2316 } 2317 2318 /* Support @got, etc. on constants emitted via .short, .int etc. */ 2319 2320 bfd_reloc_code_real_type 2321 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2322 { 2323 expression (exp); 2324 if (nbytes >= 2 && *input_line_pointer == '@') 2325 return ppc_elf_suffix (&input_line_pointer, exp); 2326 return BFD_RELOC_NONE; 2327 } 2328 2329 /* Warn when emitting data to code sections, unless we are emitting 2330 a relocation that ld --ppc476-workaround uses to recognise data 2331 *and* there was an unconditional branch prior to the data. */ 2332 2333 void 2334 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2335 unsigned int nbytes, fixS *fix) 2336 { 2337 if (warn_476 2338 && (now_seg->flags & SEC_CODE) != 0 2339 && (nbytes != 4 2340 || fix == NULL 2341 || !(fix->fx_r_type == BFD_RELOC_32 2342 || fix->fx_r_type == BFD_RELOC_CTOR 2343 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2344 || !(last_seg == now_seg && last_subseg == now_subseg) 2345 || !((last_insn & (0x3f << 26)) == (18u << 26) 2346 || ((last_insn & (0x3f << 26)) == (16u << 26) 2347 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2348 || ((last_insn & (0x3f << 26)) == (19u << 26) 2349 && (last_insn & (0x3ff << 1)) == (16u << 1) 2350 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2351 { 2352 /* Flag that we've warned. */ 2353 if (fix != NULL) 2354 fix->fx_tcbit = 1; 2355 2356 as_warn (_("data in executable section")); 2357 } 2358 } 2359 2360 /* Solaris pseduo op to change to the .rodata section. */ 2361 static void 2362 ppc_elf_rdata (int xxx) 2363 { 2364 char *save_line = input_line_pointer; 2365 static char section[] = ".rodata\n"; 2366 2367 /* Just pretend this is .section .rodata */ 2368 input_line_pointer = section; 2369 obj_elf_section (xxx); 2370 2371 input_line_pointer = save_line; 2372 } 2373 2374 /* Pseudo op to make file scope bss items. */ 2375 static void 2376 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2377 { 2378 char *name; 2379 char c; 2380 char *p; 2381 offsetT size; 2382 symbolS *symbolP; 2383 offsetT align; 2384 segT old_sec; 2385 int old_subsec; 2386 char *pfrag; 2387 int align2; 2388 2389 c = get_symbol_name (&name); 2390 2391 /* Just after name is now '\0'. */ 2392 p = input_line_pointer; 2393 *p = c; 2394 SKIP_WHITESPACE_AFTER_NAME (); 2395 if (*input_line_pointer != ',') 2396 { 2397 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2398 ignore_rest_of_line (); 2399 return; 2400 } 2401 2402 input_line_pointer++; /* skip ',' */ 2403 if ((size = get_absolute_expression ()) < 0) 2404 { 2405 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2406 ignore_rest_of_line (); 2407 return; 2408 } 2409 2410 /* The third argument to .lcomm is the alignment. */ 2411 if (*input_line_pointer != ',') 2412 align = 8; 2413 else 2414 { 2415 ++input_line_pointer; 2416 align = get_absolute_expression (); 2417 if (align <= 0) 2418 { 2419 as_warn (_("ignoring bad alignment")); 2420 align = 8; 2421 } 2422 } 2423 2424 *p = 0; 2425 symbolP = symbol_find_or_make (name); 2426 *p = c; 2427 2428 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2429 { 2430 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2431 S_GET_NAME (symbolP)); 2432 ignore_rest_of_line (); 2433 return; 2434 } 2435 2436 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2437 { 2438 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2439 S_GET_NAME (symbolP), 2440 (long) S_GET_VALUE (symbolP), 2441 (long) size); 2442 2443 ignore_rest_of_line (); 2444 return; 2445 } 2446 2447 /* Allocate_bss. */ 2448 old_sec = now_seg; 2449 old_subsec = now_subseg; 2450 if (align) 2451 { 2452 /* Convert to a power of 2 alignment. */ 2453 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2454 if (align != 1) 2455 { 2456 as_bad (_("common alignment not a power of 2")); 2457 ignore_rest_of_line (); 2458 return; 2459 } 2460 } 2461 else 2462 align2 = 0; 2463 2464 record_alignment (bss_section, align2); 2465 subseg_set (bss_section, 1); 2466 if (align2) 2467 frag_align (align2, 0, 0); 2468 if (S_GET_SEGMENT (symbolP) == bss_section) 2469 symbol_get_frag (symbolP)->fr_symbol = 0; 2470 symbol_set_frag (symbolP, frag_now); 2471 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2472 (char *) 0); 2473 *pfrag = 0; 2474 S_SET_SIZE (symbolP, size); 2475 S_SET_SEGMENT (symbolP, bss_section); 2476 subseg_set (old_sec, old_subsec); 2477 demand_empty_rest_of_line (); 2478 } 2479 2480 /* Pseudo op to set symbol local entry point. */ 2481 static void 2482 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2483 { 2484 char *name; 2485 char c = get_symbol_name (&name); 2486 char *p; 2487 expressionS exp; 2488 symbolS *sym; 2489 asymbol *bfdsym; 2490 elf_symbol_type *elfsym; 2491 2492 p = input_line_pointer; 2493 *p = c; 2494 SKIP_WHITESPACE_AFTER_NAME (); 2495 if (*input_line_pointer != ',') 2496 { 2497 *p = 0; 2498 as_bad (_("expected comma after name `%s' in .localentry directive"), 2499 name); 2500 *p = c; 2501 ignore_rest_of_line (); 2502 return; 2503 } 2504 input_line_pointer++; 2505 expression (&exp); 2506 if (exp.X_op == O_absent) 2507 { 2508 as_bad (_("missing expression in .localentry directive")); 2509 exp.X_op = O_constant; 2510 exp.X_add_number = 0; 2511 } 2512 *p = 0; 2513 sym = symbol_find_or_make (name); 2514 *p = c; 2515 2516 if (resolve_expression (&exp) 2517 && exp.X_op == O_constant) 2518 { 2519 unsigned int encoded, ok; 2520 2521 ok = 1; 2522 if (exp.X_add_number == 1 || exp.X_add_number == 7) 2523 encoded = exp.X_add_number << STO_PPC64_LOCAL_BIT; 2524 else 2525 { 2526 encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2527 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2528 { 2529 as_bad (_(".localentry expression for `%s' " 2530 "is not a valid power of 2"), S_GET_NAME (sym)); 2531 ok = 0; 2532 } 2533 } 2534 if (ok) 2535 { 2536 bfdsym = symbol_get_bfdsym (sym); 2537 elfsym = elf_symbol_from (bfdsym); 2538 gas_assert (elfsym); 2539 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2540 elfsym->internal_elf_sym.st_other |= encoded; 2541 if (ppc_abiversion == 0) 2542 ppc_abiversion = 2; 2543 } 2544 } 2545 else 2546 as_bad (_(".localentry expression for `%s' " 2547 "does not evaluate to a constant"), S_GET_NAME (sym)); 2548 2549 demand_empty_rest_of_line (); 2550 } 2551 2552 /* Pseudo op to set ABI version. */ 2553 static void 2554 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2555 { 2556 expressionS exp; 2557 2558 expression (&exp); 2559 if (exp.X_op == O_absent) 2560 { 2561 as_bad (_("missing expression in .abiversion directive")); 2562 exp.X_op = O_constant; 2563 exp.X_add_number = 0; 2564 } 2565 2566 if (resolve_expression (&exp) 2567 && exp.X_op == O_constant) 2568 ppc_abiversion = exp.X_add_number; 2569 else 2570 as_bad (_(".abiversion expression does not evaluate to a constant")); 2571 demand_empty_rest_of_line (); 2572 } 2573 2574 /* Parse a .gnu_attribute directive. */ 2575 static void 2576 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) 2577 { 2578 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); 2579 2580 /* Check validity of defined powerpc tags. */ 2581 if (tag == Tag_GNU_Power_ABI_FP 2582 || tag == Tag_GNU_Power_ABI_Vector 2583 || tag == Tag_GNU_Power_ABI_Struct_Return) 2584 { 2585 unsigned int val; 2586 2587 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); 2588 2589 if ((tag == Tag_GNU_Power_ABI_FP && val > 15) 2590 || (tag == Tag_GNU_Power_ABI_Vector && val > 3) 2591 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) 2592 as_warn (_("unknown .gnu_attribute value")); 2593 } 2594 } 2595 2596 /* Set ABI version in output file. */ 2597 void 2598 ppc_elf_md_finish (void) 2599 { 2600 if (ppc_obj64 && ppc_abiversion != 0) 2601 { 2602 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2603 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2604 } 2605 /* Any selection of opcodes based on ppc_cpu after gas has finished 2606 parsing the file is invalid. md_apply_fix and ppc_handle_align 2607 must select opcodes based on the machine in force at the point 2608 where the fixup or alignment frag was created, not the machine in 2609 force at the end of file. */ 2610 ppc_cpu = 0; 2611 } 2612 2613 /* Validate any relocations emitted for -mrelocatable, possibly adding 2614 fixups for word relocations in writable segments, so we can adjust 2615 them at runtime. */ 2616 static void 2617 ppc_elf_validate_fix (fixS *fixp, segT seg) 2618 { 2619 if (fixp->fx_done || fixp->fx_pcrel) 2620 return; 2621 2622 switch (shlib) 2623 { 2624 case SHLIB_NONE: 2625 case SHLIB_PIC: 2626 return; 2627 2628 case SHLIB_MRELOCATABLE: 2629 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2630 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2631 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2632 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2633 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2634 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2635 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2636 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2637 && (seg->flags & SEC_LOAD) != 0 2638 && strcmp (segment_name (seg), ".got2") != 0 2639 && strcmp (segment_name (seg), ".dtors") != 0 2640 && strcmp (segment_name (seg), ".ctors") != 0 2641 && strcmp (segment_name (seg), ".fixup") != 0 2642 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2643 && strcmp (segment_name (seg), ".eh_frame") != 0 2644 && strcmp (segment_name (seg), ".ex_shared") != 0) 2645 { 2646 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2647 || fixp->fx_r_type != BFD_RELOC_CTOR) 2648 { 2649 as_bad_where (fixp->fx_file, fixp->fx_line, 2650 _("relocation cannot be done when using -mrelocatable")); 2651 } 2652 } 2653 return; 2654 } 2655 } 2656 2657 /* Prevent elf_frob_file_before_adjust removing a weak undefined 2658 function descriptor sym if the corresponding code sym is used. */ 2659 2660 void 2661 ppc_frob_file_before_adjust (void) 2662 { 2663 symbolS *symp; 2664 asection *toc; 2665 2666 if (!ppc_obj64) 2667 return; 2668 2669 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2670 { 2671 const char *name; 2672 char *dotname; 2673 symbolS *dotsym; 2674 2675 name = S_GET_NAME (symp); 2676 if (name[0] == '.') 2677 continue; 2678 2679 if (! S_IS_WEAK (symp) 2680 || S_IS_DEFINED (symp)) 2681 continue; 2682 2683 dotname = concat (".", name, (char *) NULL); 2684 dotsym = symbol_find_noref (dotname, 1); 2685 free (dotname); 2686 if (dotsym != NULL && (symbol_used_p (dotsym) 2687 || symbol_used_in_reloc_p (dotsym))) 2688 symbol_mark_used (symp); 2689 2690 } 2691 2692 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2693 if (toc != NULL 2694 && toc_reloc_types != has_large_toc_reloc 2695 && bfd_section_size (toc) > 0x10000) 2696 as_warn (_("TOC section size exceeds 64k")); 2697 } 2698 2699 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2700 emitted. Other uses of .TOC. will cause the symbol to be marked 2701 with BSF_KEEP in md_apply_fix. */ 2702 2703 void 2704 ppc_elf_adjust_symtab (void) 2705 { 2706 if (ppc_obj64) 2707 { 2708 symbolS *symp; 2709 symp = symbol_find (".TOC."); 2710 if (symp != NULL) 2711 { 2712 asymbol *bsym = symbol_get_bfdsym (symp); 2713 if ((bsym->flags & BSF_KEEP) == 0) 2714 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2715 } 2716 } 2717 } 2718 #endif /* OBJ_ELF */ 2719 2720 #ifdef OBJ_XCOFF 2721 /* Parse XCOFF relocations. */ 2722 static bfd_reloc_code_real_type 2723 ppc_xcoff_suffix (char **str_p) 2724 { 2725 struct map_bfd { 2726 const char *string; 2727 unsigned int length : 8; 2728 unsigned int valid32 : 1; 2729 unsigned int valid64 : 1; 2730 unsigned int reloc; 2731 }; 2732 2733 char ident[20]; 2734 char *str = *str_p; 2735 char *str2; 2736 int ch; 2737 int len; 2738 const struct map_bfd *ptr; 2739 2740 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 2741 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 2742 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 2743 2744 static const struct map_bfd mapping[] = { 2745 MAP ("l", BFD_RELOC_PPC_TOC16_LO), 2746 MAP ("u", BFD_RELOC_PPC_TOC16_HI), 2747 MAP32 ("ie", BFD_RELOC_PPC_TLSIE), 2748 MAP32 ("ld", BFD_RELOC_PPC_TLSLD), 2749 MAP32 ("le", BFD_RELOC_PPC_TLSLE), 2750 MAP32 ("m", BFD_RELOC_PPC_TLSM), 2751 MAP32 ("ml", BFD_RELOC_PPC_TLSML), 2752 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE), 2753 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD), 2754 MAP64 ("le", BFD_RELOC_PPC64_TLSLE), 2755 MAP64 ("m", BFD_RELOC_PPC64_TLSM), 2756 MAP64 ("ml", BFD_RELOC_PPC64_TLSML), 2757 }; 2758 2759 if (*str++ != '@') 2760 return BFD_RELOC_NONE; 2761 2762 for (ch = *str, str2 = ident; 2763 (str2 < ident + sizeof (ident) - 1 2764 && (ISALNUM (ch) || ch == '@')); 2765 ch = *++str) 2766 { 2767 *str2++ = TOLOWER (ch); 2768 } 2769 2770 *str2 = '\0'; 2771 len = str2 - ident; 2772 2773 ch = ident[0]; 2774 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2775 if (ch == ptr->string[0] 2776 && len == ptr->length 2777 && memcmp (ident, ptr->string, ptr->length) == 0 2778 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2779 { 2780 *str_p = str; 2781 return (bfd_reloc_code_real_type) ptr->reloc; 2782 } 2783 2784 return BFD_RELOC_NONE; 2785 } 2786 2787 /* Restore XCOFF addis instruction to ELF format. 2788 AIX often generates addis instructions using "addis RT,D(RA)" 2789 format instead of the ELF "addis RT,RA,SI" one. 2790 On entry RT_E is at the comma after RT, D_E is at the open 2791 parenthesis after D, and RA_E is at the close parenthesis after RA. */ 2792 static void 2793 ppc_xcoff_fixup_addis (char *rt_e, char *d_e, char *ra_e) 2794 { 2795 size_t ra_size = ra_e - d_e - 1; 2796 char *save_ra = xmalloc (ra_size); 2797 2798 /* Copy RA. */ 2799 memcpy (save_ra, d_e + 1, ra_size); 2800 /* Shuffle D to make room for RA, copying the comma too. */ 2801 memmove (rt_e + ra_size + 1, rt_e, d_e - rt_e); 2802 /* Erase the trailing ')', keeping any rubbish for potential errors. */ 2803 memmove (ra_e, ra_e + 1, strlen (ra_e)); 2804 /* Write RA back. */ 2805 memcpy (rt_e + 1, save_ra, ra_size); 2806 free (save_ra); 2807 } 2808 2809 /* Support @ie, etc. on constants emitted via .short, .int etc. */ 2810 2811 bfd_reloc_code_real_type 2812 ppc_xcoff_parse_cons (expressionS *exp, unsigned int nbytes) 2813 { 2814 expression (exp); 2815 if (nbytes >= 2 && *input_line_pointer == '@') 2816 return ppc_xcoff_suffix (&input_line_pointer); 2817 2818 /* There isn't any @ symbol for default TLS relocations (R_TLS). */ 2819 if (exp->X_add_symbol != NULL 2820 && (symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_TL 2821 || symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_UL)) 2822 return (ppc_obj64 ? BFD_RELOC_PPC64_TLSGD: BFD_RELOC_PPC_TLSGD); 2823 2824 return BFD_RELOC_NONE; 2825 } 2826 2827 #endif /* OBJ_XCOFF */ 2828 2829 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2830 /* See whether a symbol is in the TOC section. */ 2831 2832 static int 2833 ppc_is_toc_sym (symbolS *sym) 2834 { 2835 #ifdef OBJ_XCOFF 2836 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2837 || symbol_get_tc (sym)->symbol_class == XMC_TE 2838 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2839 #endif 2840 #ifdef OBJ_ELF 2841 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2842 if (ppc_obj64) 2843 return strcmp (sname, ".toc") == 0; 2844 else 2845 return strcmp (sname, ".got") == 0; 2846 #endif 2847 } 2848 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2849 2850 2851 #ifdef OBJ_ELF 2852 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2853 static void 2854 ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2855 { 2856 unsigned int i; 2857 2858 /* Check we don't already exist. */ 2859 for (i = 0; i < ppc_apuinfo_num; i++) 2860 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2861 return; 2862 2863 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2864 { 2865 if (ppc_apuinfo_num_alloc == 0) 2866 { 2867 ppc_apuinfo_num_alloc = 4; 2868 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); 2869 } 2870 else 2871 { 2872 ppc_apuinfo_num_alloc += 4; 2873 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, 2874 ppc_apuinfo_num_alloc); 2875 } 2876 } 2877 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2878 } 2879 #undef APUID 2880 #endif 2881 2882 /* Various frobbings of labels and their addresses. */ 2883 2884 /* Symbols labelling the current insn. */ 2885 struct insn_label_list 2886 { 2887 struct insn_label_list *next; 2888 symbolS *label; 2889 }; 2890 2891 static struct insn_label_list *insn_labels; 2892 static struct insn_label_list *free_insn_labels; 2893 2894 static void 2895 ppc_record_label (symbolS *sym) 2896 { 2897 struct insn_label_list *l; 2898 2899 if (free_insn_labels == NULL) 2900 l = XNEW (struct insn_label_list); 2901 else 2902 { 2903 l = free_insn_labels; 2904 free_insn_labels = l->next; 2905 } 2906 2907 l->label = sym; 2908 l->next = insn_labels; 2909 insn_labels = l; 2910 } 2911 2912 static void 2913 ppc_clear_labels (void) 2914 { 2915 while (insn_labels != NULL) 2916 { 2917 struct insn_label_list *l = insn_labels; 2918 insn_labels = l->next; 2919 l->next = free_insn_labels; 2920 free_insn_labels = l; 2921 } 2922 } 2923 2924 void 2925 ppc_start_line_hook (void) 2926 { 2927 ppc_clear_labels (); 2928 } 2929 2930 void 2931 ppc_new_dot_label (symbolS *sym) 2932 { 2933 ppc_record_label (sym); 2934 #ifdef OBJ_XCOFF 2935 /* Anchor this label to the current csect for relocations. */ 2936 symbol_get_tc (sym)->within = ppc_current_csect; 2937 #endif 2938 } 2939 2940 void 2941 ppc_frob_label (symbolS *sym) 2942 { 2943 ppc_record_label (sym); 2944 2945 #ifdef OBJ_XCOFF 2946 /* Set the class of a label based on where it is defined. This handles 2947 symbols without suffixes. Also, move the symbol so that it follows 2948 the csect symbol. */ 2949 if (ppc_current_csect != (symbolS *) NULL) 2950 { 2951 if (symbol_get_tc (sym)->symbol_class == -1) 2952 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 2953 2954 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 2955 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 2956 &symbol_rootP, &symbol_lastP); 2957 /* Update last csect symbol. */ 2958 symbol_get_tc (ppc_current_csect)->within = sym; 2959 2960 /* Some labels like .bs are using within differently. 2961 So avoid changing it, if it's already set. */ 2962 if (symbol_get_tc (sym)->within == NULL) 2963 symbol_get_tc (sym)->within = ppc_current_csect; 2964 } 2965 #endif 2966 2967 #ifdef OBJ_ELF 2968 dwarf2_emit_label (sym); 2969 #endif 2970 } 2971 2972 /* We need to keep a list of fixups. We can't simply generate them as 2973 we go, because that would require us to first create the frag, and 2974 that would screw up references to ``.''. */ 2975 2976 struct ppc_fixup 2977 { 2978 expressionS exp; 2979 int opindex; 2980 bfd_reloc_code_real_type reloc; 2981 }; 2982 2983 #define MAX_INSN_FIXUPS (5) 2984 2985 /* Return the field size operated on by RELOC, and whether it is 2986 pc-relative in PC_RELATIVE. */ 2987 2988 static unsigned int 2989 fixup_size (bfd_reloc_code_real_type reloc, bool *pc_relative) 2990 { 2991 unsigned int size = 0; 2992 bool pcrel = false; 2993 2994 switch (reloc) 2995 { 2996 /* This switch statement must handle all BFD_RELOC values 2997 possible in instruction fixups. As is, it handles all 2998 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c, 2999 bfd/coff-rs6000.c and bfd/coff64-rs6000.c. 3000 Overkill since data and marker relocs need not be handled 3001 here, but this way we can be sure a needed fixup reloc isn't 3002 accidentally omitted. */ 3003 case BFD_RELOC_PPC_EMB_MRKREF: 3004 case BFD_RELOC_VTABLE_ENTRY: 3005 case BFD_RELOC_VTABLE_INHERIT: 3006 break; 3007 3008 case BFD_RELOC_8: 3009 size = 1; 3010 break; 3011 3012 case BFD_RELOC_16: 3013 case BFD_RELOC_16_BASEREL: 3014 case BFD_RELOC_16_GOTOFF: 3015 case BFD_RELOC_GPREL16: 3016 case BFD_RELOC_HI16: 3017 case BFD_RELOC_HI16_BASEREL: 3018 case BFD_RELOC_HI16_GOTOFF: 3019 case BFD_RELOC_HI16_PLTOFF: 3020 case BFD_RELOC_HI16_S: 3021 case BFD_RELOC_HI16_S_BASEREL: 3022 case BFD_RELOC_HI16_S_GOTOFF: 3023 case BFD_RELOC_HI16_S_PLTOFF: 3024 case BFD_RELOC_LO16: 3025 case BFD_RELOC_LO16_BASEREL: 3026 case BFD_RELOC_LO16_GOTOFF: 3027 case BFD_RELOC_LO16_PLTOFF: 3028 case BFD_RELOC_PPC64_ADDR16_DS: 3029 case BFD_RELOC_PPC64_ADDR16_HIGH: 3030 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3031 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 3032 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 3033 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 3034 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 3035 case BFD_RELOC_PPC64_ADDR16_LO_DS: 3036 case BFD_RELOC_PPC64_DTPREL16_DS: 3037 case BFD_RELOC_PPC64_DTPREL16_HIGH: 3038 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 3039 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 3040 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 3041 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 3042 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 3043 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 3044 case BFD_RELOC_PPC64_GOT16_DS: 3045 case BFD_RELOC_PPC64_GOT16_LO_DS: 3046 case BFD_RELOC_PPC64_HIGHER: 3047 case BFD_RELOC_PPC64_HIGHER_S: 3048 case BFD_RELOC_PPC64_HIGHEST: 3049 case BFD_RELOC_PPC64_HIGHEST_S: 3050 case BFD_RELOC_PPC64_PLT16_LO_DS: 3051 case BFD_RELOC_PPC64_PLTGOT16: 3052 case BFD_RELOC_PPC64_PLTGOT16_DS: 3053 case BFD_RELOC_PPC64_PLTGOT16_HA: 3054 case BFD_RELOC_PPC64_PLTGOT16_HI: 3055 case BFD_RELOC_PPC64_PLTGOT16_LO: 3056 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 3057 case BFD_RELOC_PPC64_SECTOFF_DS: 3058 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 3059 case BFD_RELOC_PPC64_TOC16_DS: 3060 case BFD_RELOC_PPC64_TOC16_HA: 3061 case BFD_RELOC_PPC64_TOC16_HI: 3062 case BFD_RELOC_PPC64_TOC16_LO: 3063 case BFD_RELOC_PPC64_TOC16_LO_DS: 3064 case BFD_RELOC_PPC64_TPREL16_DS: 3065 case BFD_RELOC_PPC64_TPREL16_HIGH: 3066 case BFD_RELOC_PPC64_TPREL16_HIGHA: 3067 case BFD_RELOC_PPC64_TPREL16_HIGHER: 3068 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 3069 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 3070 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 3071 case BFD_RELOC_PPC64_TPREL16_LO_DS: 3072 #ifdef OBJ_XCOFF 3073 case BFD_RELOC_PPC_BA16: 3074 #endif 3075 case BFD_RELOC_PPC_DTPREL16: 3076 case BFD_RELOC_PPC_DTPREL16_HA: 3077 case BFD_RELOC_PPC_DTPREL16_HI: 3078 case BFD_RELOC_PPC_DTPREL16_LO: 3079 case BFD_RELOC_PPC_EMB_NADDR16: 3080 case BFD_RELOC_PPC_EMB_NADDR16_HA: 3081 case BFD_RELOC_PPC_EMB_NADDR16_HI: 3082 case BFD_RELOC_PPC_EMB_NADDR16_LO: 3083 case BFD_RELOC_PPC_EMB_RELSDA: 3084 case BFD_RELOC_PPC_EMB_RELSEC16: 3085 case BFD_RELOC_PPC_EMB_RELST_LO: 3086 case BFD_RELOC_PPC_EMB_RELST_HI: 3087 case BFD_RELOC_PPC_EMB_RELST_HA: 3088 case BFD_RELOC_PPC_EMB_SDA2I16: 3089 case BFD_RELOC_PPC_EMB_SDA2REL: 3090 case BFD_RELOC_PPC_EMB_SDAI16: 3091 case BFD_RELOC_PPC_GOT_DTPREL16: 3092 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 3093 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 3094 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3095 case BFD_RELOC_PPC_GOT_TLSGD16: 3096 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 3097 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 3098 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 3099 case BFD_RELOC_PPC_GOT_TLSLD16: 3100 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 3101 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 3102 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 3103 case BFD_RELOC_PPC_GOT_TPREL16: 3104 case BFD_RELOC_PPC_GOT_TPREL16_HA: 3105 case BFD_RELOC_PPC_GOT_TPREL16_HI: 3106 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3107 case BFD_RELOC_PPC_TOC16: 3108 case BFD_RELOC_PPC_TOC16_HI: 3109 case BFD_RELOC_PPC_TOC16_LO: 3110 case BFD_RELOC_PPC_TPREL16: 3111 case BFD_RELOC_PPC_TPREL16_HA: 3112 case BFD_RELOC_PPC_TPREL16_HI: 3113 case BFD_RELOC_PPC_TPREL16_LO: 3114 size = 2; 3115 break; 3116 3117 case BFD_RELOC_16_PCREL: 3118 case BFD_RELOC_HI16_PCREL: 3119 case BFD_RELOC_HI16_S_PCREL: 3120 case BFD_RELOC_LO16_PCREL: 3121 case BFD_RELOC_PPC64_REL16_HIGH: 3122 case BFD_RELOC_PPC64_REL16_HIGHA: 3123 case BFD_RELOC_PPC64_REL16_HIGHER: 3124 case BFD_RELOC_PPC64_REL16_HIGHER34: 3125 case BFD_RELOC_PPC64_REL16_HIGHERA: 3126 case BFD_RELOC_PPC64_REL16_HIGHERA34: 3127 case BFD_RELOC_PPC64_REL16_HIGHEST: 3128 case BFD_RELOC_PPC64_REL16_HIGHEST34: 3129 case BFD_RELOC_PPC64_REL16_HIGHESTA: 3130 case BFD_RELOC_PPC64_REL16_HIGHESTA34: 3131 #ifdef OBJ_XCOFF 3132 case BFD_RELOC_PPC_B16: 3133 #endif 3134 case BFD_RELOC_PPC_VLE_REL8: 3135 size = 2; 3136 pcrel = true; 3137 break; 3138 3139 case BFD_RELOC_32: 3140 case BFD_RELOC_32_PLTOFF: 3141 #ifdef OBJ_XCOFF 3142 case BFD_RELOC_CTOR: 3143 #endif 3144 case BFD_RELOC_PPC64_ENTRY: 3145 case BFD_RELOC_PPC_16DX_HA: 3146 #ifndef OBJ_XCOFF 3147 case BFD_RELOC_PPC_BA16: 3148 #endif 3149 case BFD_RELOC_PPC_BA16_BRNTAKEN: 3150 case BFD_RELOC_PPC_BA16_BRTAKEN: 3151 case BFD_RELOC_PPC_BA26: 3152 case BFD_RELOC_PPC_EMB_BIT_FLD: 3153 case BFD_RELOC_PPC_EMB_NADDR32: 3154 case BFD_RELOC_PPC_EMB_SDA21: 3155 case BFD_RELOC_PPC_TLS: 3156 case BFD_RELOC_PPC_TLSGD: 3157 case BFD_RELOC_PPC_TLSLD: 3158 case BFD_RELOC_PPC_TLSLE: 3159 case BFD_RELOC_PPC_TLSIE: 3160 case BFD_RELOC_PPC_TLSM: 3161 case BFD_RELOC_PPC_TLSML: 3162 case BFD_RELOC_PPC_VLE_HA16A: 3163 case BFD_RELOC_PPC_VLE_HA16D: 3164 case BFD_RELOC_PPC_VLE_HI16A: 3165 case BFD_RELOC_PPC_VLE_HI16D: 3166 case BFD_RELOC_PPC_VLE_LO16A: 3167 case BFD_RELOC_PPC_VLE_LO16D: 3168 case BFD_RELOC_PPC_VLE_SDA21: 3169 case BFD_RELOC_PPC_VLE_SDA21_LO: 3170 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3171 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 3172 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3173 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 3174 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3175 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 3176 case BFD_RELOC_PPC64_TLS_PCREL: 3177 case BFD_RELOC_RVA: 3178 size = 4; 3179 break; 3180 3181 case BFD_RELOC_24_PLT_PCREL: 3182 case BFD_RELOC_32_PCREL: 3183 case BFD_RELOC_32_PLT_PCREL: 3184 case BFD_RELOC_PPC64_REL24_NOTOC: 3185 case BFD_RELOC_PPC64_REL24_P9NOTOC: 3186 #ifndef OBJ_XCOFF 3187 case BFD_RELOC_PPC_B16: 3188 #endif 3189 case BFD_RELOC_PPC_B16_BRNTAKEN: 3190 case BFD_RELOC_PPC_B16_BRTAKEN: 3191 case BFD_RELOC_PPC_B26: 3192 case BFD_RELOC_PPC_LOCAL24PC: 3193 case BFD_RELOC_PPC_REL16DX_HA: 3194 case BFD_RELOC_PPC_VLE_REL15: 3195 case BFD_RELOC_PPC_VLE_REL24: 3196 size = 4; 3197 pcrel = true; 3198 break; 3199 3200 #ifndef OBJ_XCOFF 3201 case BFD_RELOC_CTOR: 3202 #endif 3203 case BFD_RELOC_PPC_COPY: 3204 case BFD_RELOC_PPC_DTPMOD: 3205 case BFD_RELOC_PPC_DTPREL: 3206 case BFD_RELOC_PPC_GLOB_DAT: 3207 case BFD_RELOC_PPC_TPREL: 3208 size = ppc_obj64 ? 8 : 4; 3209 break; 3210 3211 case BFD_RELOC_64: 3212 case BFD_RELOC_64_PLTOFF: 3213 case BFD_RELOC_PPC64_ADDR64_LOCAL: 3214 case BFD_RELOC_PPC64_D28: 3215 case BFD_RELOC_PPC64_D34: 3216 case BFD_RELOC_PPC64_D34_LO: 3217 case BFD_RELOC_PPC64_D34_HI30: 3218 case BFD_RELOC_PPC64_D34_HA30: 3219 case BFD_RELOC_PPC64_TPREL34: 3220 case BFD_RELOC_PPC64_DTPREL34: 3221 case BFD_RELOC_PPC64_TOC: 3222 case BFD_RELOC_PPC64_TLSGD: 3223 case BFD_RELOC_PPC64_TLSLD: 3224 case BFD_RELOC_PPC64_TLSLE: 3225 case BFD_RELOC_PPC64_TLSIE: 3226 case BFD_RELOC_PPC64_TLSM: 3227 case BFD_RELOC_PPC64_TLSML: 3228 size = 8; 3229 break; 3230 3231 case BFD_RELOC_64_PCREL: 3232 case BFD_RELOC_64_PLT_PCREL: 3233 case BFD_RELOC_PPC64_GOT_PCREL34: 3234 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 3235 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 3236 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 3237 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 3238 case BFD_RELOC_PPC64_PCREL28: 3239 case BFD_RELOC_PPC64_PCREL34: 3240 case BFD_RELOC_PPC64_PLT_PCREL34: 3241 size = 8; 3242 pcrel = true; 3243 break; 3244 3245 default: 3246 abort (); 3247 } 3248 3249 if (ENABLE_CHECKING) 3250 { 3251 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); 3252 if (reloc_howto != NULL 3253 && (size != bfd_get_reloc_size (reloc_howto) 3254 || pcrel != reloc_howto->pc_relative)) 3255 { 3256 as_bad (_("%s howto doesn't match size/pcrel in gas"), 3257 reloc_howto->name); 3258 abort (); 3259 } 3260 } 3261 *pc_relative = pcrel; 3262 return size; 3263 } 3264 3265 #ifdef OBJ_ELF 3266 /* If we have parsed a call to __tls_get_addr, parse an argument like 3267 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg 3268 is successfully parsed, *STR is updated past the trailing 3269 parenthesis and trailing white space, and *TLS_FIX contains the 3270 reloc and arg expression. */ 3271 3272 static int 3273 parse_tls_arg (char **str, const expressionS *exp, struct ppc_fixup *tls_fix) 3274 { 3275 const char *sym_name = S_GET_NAME (exp->X_add_symbol); 3276 if (sym_name[0] == '.') 3277 ++sym_name; 3278 3279 tls_fix->reloc = BFD_RELOC_NONE; 3280 if (strncasecmp (sym_name, "__tls_get_addr", 14) == 0 3281 && (sym_name[14] == 0 3282 || strcasecmp (sym_name + 14, "_desc") == 0 3283 || strcasecmp (sym_name + 14, "_opt") == 0)) 3284 { 3285 char *hold = input_line_pointer; 3286 input_line_pointer = *str + 1; 3287 expression (&tls_fix->exp); 3288 if (tls_fix->exp.X_op == O_symbol) 3289 { 3290 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3291 tls_fix->reloc = BFD_RELOC_PPC_TLSGD; 3292 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3293 tls_fix->reloc = BFD_RELOC_PPC_TLSLD; 3294 if (tls_fix->reloc != BFD_RELOC_NONE) 3295 { 3296 input_line_pointer += 7; 3297 SKIP_WHITESPACE (); 3298 *str = input_line_pointer; 3299 } 3300 } 3301 input_line_pointer = hold; 3302 } 3303 return tls_fix->reloc != BFD_RELOC_NONE; 3304 } 3305 #endif 3306 3307 /* This routine is called for each instruction to be assembled. */ 3308 3309 void 3310 md_assemble (char *str) 3311 { 3312 char *s; 3313 const struct powerpc_opcode *opcode; 3314 uint64_t insn; 3315 const ppc_opindex_t *opindex_ptr; 3316 int need_paren; 3317 int next_opindex; 3318 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 3319 int fc; 3320 char *f; 3321 int addr_mask; 3322 int i; 3323 unsigned int insn_length; 3324 3325 /* Get the opcode. */ 3326 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 3327 ; 3328 if (*s != '\0') 3329 *s++ = '\0'; 3330 3331 /* Look up the opcode in the hash table. */ 3332 opcode = (const struct powerpc_opcode *) str_hash_find (ppc_hash, str); 3333 if (opcode == (const struct powerpc_opcode *) NULL) 3334 { 3335 as_bad (_("unrecognized opcode: `%s'"), str); 3336 ppc_clear_labels (); 3337 return; 3338 } 3339 3340 insn = opcode->opcode; 3341 if (!target_big_endian 3342 && ((insn & ~(1 << 26)) == 46u << 26 3343 || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1))) 3344 { 3345 /* lmw, stmw, lswi, lswx, stswi, stswx */ 3346 as_bad (_("`%s' invalid when little-endian"), str); 3347 ppc_clear_labels (); 3348 return; 3349 } 3350 3351 str = s; 3352 while (ISSPACE (*str)) 3353 ++str; 3354 3355 #ifdef OBJ_XCOFF 3356 /* AIX often generates addis instructions using "addis RT, D(RA)" 3357 format instead of the classic "addis RT, RA, SI" one. 3358 Restore it to the default format as it's the one encoded 3359 in ppc opcodes. */ 3360 if (!strcmp (opcode->name, "addis")) 3361 { 3362 char *rt_e = strchr (str, ','); 3363 if (rt_e != NULL 3364 && strchr (rt_e + 1, ',') == NULL) 3365 { 3366 char *d_e = strchr (rt_e + 1, '('); 3367 if (d_e != NULL && d_e != rt_e + 1) 3368 { 3369 char *ra_e = strrchr (d_e + 1, ')'); 3370 if (ra_e != NULL && ra_e != d_e + 1) 3371 ppc_xcoff_fixup_addis (rt_e, d_e, ra_e); 3372 } 3373 } 3374 } 3375 #endif 3376 3377 /* PowerPC operands are just expressions. The only real issue is 3378 that a few operand types are optional. If an instruction has 3379 multiple optional operands and one is omitted, then all optional 3380 operands past the first omitted one must also be omitted. */ 3381 int num_optional_operands = 0; 3382 int num_optional_provided = 0; 3383 3384 /* Gather the operands. */ 3385 need_paren = 0; 3386 next_opindex = 0; 3387 fc = 0; 3388 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 3389 { 3390 const struct powerpc_operand *operand; 3391 const char *errmsg; 3392 char *hold; 3393 expressionS ex; 3394 char endc; 3395 3396 if (next_opindex == 0) 3397 operand = &powerpc_operands[*opindex_ptr]; 3398 else 3399 { 3400 operand = &powerpc_operands[next_opindex]; 3401 next_opindex = 0; 3402 } 3403 errmsg = NULL; 3404 3405 /* If this is an optional operand, and we are skipping it, just 3406 insert the default value, usually a zero. */ 3407 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 3408 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) 3409 { 3410 if (num_optional_operands == 0) 3411 { 3412 const ppc_opindex_t *optr; 3413 int total = 0; 3414 int provided = 0; 3415 int omitted; 3416 3417 s = str; 3418 for (optr = opindex_ptr; *optr != 0; optr++) 3419 { 3420 const struct powerpc_operand *op; 3421 op = &powerpc_operands[*optr]; 3422 3423 ++total; 3424 3425 if ((op->flags & PPC_OPERAND_OPTIONAL) != 0 3426 && !((op->flags & PPC_OPERAND_OPTIONAL32) != 0 3427 && ppc_obj64)) 3428 ++num_optional_operands; 3429 3430 if (s != NULL && *s != '\0') 3431 { 3432 ++provided; 3433 3434 /* Look for the start of the next operand. */ 3435 if ((op->flags & PPC_OPERAND_PARENS) != 0) 3436 s = strpbrk (s, "(,"); 3437 else 3438 s = strchr (s, ','); 3439 3440 if (s != NULL) 3441 ++s; 3442 } 3443 } 3444 omitted = total - provided; 3445 num_optional_provided = num_optional_operands - omitted; 3446 } 3447 if (--num_optional_provided < 0) 3448 { 3449 uint64_t val = ppc_optional_operand_value (operand, insn, ppc_cpu, 3450 num_optional_provided); 3451 if (operand->insert) 3452 { 3453 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); 3454 if (errmsg != (const char *) NULL) 3455 as_bad ("%s", errmsg); 3456 } 3457 else if (operand->shift >= 0) 3458 insn |= (val & operand->bitm) << operand->shift; 3459 else 3460 insn |= (val & operand->bitm) >> -operand->shift; 3461 3462 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 3463 next_opindex = *opindex_ptr + 1; 3464 continue; 3465 } 3466 } 3467 3468 /* Gather the operand. */ 3469 hold = input_line_pointer; 3470 input_line_pointer = str; 3471 cr_operand = ((operand->flags & PPC_OPERAND_CR_BIT) != 0 3472 || (operand->flags & PPC_OPERAND_CR_REG) != 0); 3473 expression (&ex); 3474 cr_operand = false; 3475 str = input_line_pointer; 3476 input_line_pointer = hold; 3477 3478 resolve_register (&ex); 3479 3480 if (ex.X_op == O_illegal) 3481 as_bad (_("illegal operand")); 3482 else if (ex.X_op == O_absent) 3483 as_bad (_("missing operand")); 3484 else if (ex.X_op == O_register) 3485 { 3486 if ((ex.X_md 3487 & ~operand->flags 3488 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR 3489 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG 3490 | PPC_OPERAND_SPR | PPC_OPERAND_GQR | PPC_OPERAND_ACC 3491 | PPC_OPERAND_DMR)) != 0 3492 && !((ex.X_md & PPC_OPERAND_GPR) != 0 3493 && ex.X_add_number != 0 3494 && (operand->flags & PPC_OPERAND_GPR_0) != 0)) 3495 as_warn (_("invalid register expression")); 3496 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3497 ppc_cpu, (char *) NULL, 0); 3498 } 3499 else if (ex.X_op == O_constant 3500 || (ex.X_op == O_big && ex.X_add_number > 0)) 3501 { 3502 uint64_t val; 3503 if (ex.X_op == O_constant) 3504 { 3505 val = ex.X_add_number; 3506 if (sizeof (ex.X_add_number) < sizeof (val) 3507 && (ex.X_add_number < 0) != ex.X_extrabit) 3508 val = val ^ ((addressT) -1 ^ (uint64_t) -1); 3509 } 3510 else 3511 val = generic_bignum_to_int64 (); 3512 #ifdef OBJ_ELF 3513 /* Allow @HA, @L, @H on constants. */ 3514 char *orig_str = str; 3515 bfd_reloc_code_real_type reloc = ppc_elf_suffix (&str, &ex); 3516 3517 if (ex.X_op == O_constant) 3518 { 3519 val = ex.X_add_number; 3520 if (sizeof (ex.X_add_number) < sizeof (val) 3521 && (ex.X_add_number < 0) != ex.X_extrabit) 3522 val = val ^ ((addressT) -1 ^ (uint64_t) -1); 3523 } 3524 if (reloc != BFD_RELOC_NONE) 3525 switch (reloc) 3526 { 3527 default: 3528 str = orig_str; 3529 break; 3530 3531 case BFD_RELOC_LO16: 3532 val &= 0xffff; 3533 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3534 val = SEX16 (val); 3535 break; 3536 3537 case BFD_RELOC_HI16: 3538 if (REPORT_OVERFLOW_HI && ppc_obj64) 3539 { 3540 /* PowerPC64 @h is tested for overflow. */ 3541 val = val >> 16; 3542 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3543 { 3544 uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; 3545 val = (val ^ sign) - sign; 3546 } 3547 break; 3548 } 3549 /* Fallthru */ 3550 3551 case BFD_RELOC_PPC64_ADDR16_HIGH: 3552 val = PPC_HI (val); 3553 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3554 val = SEX16 (val); 3555 break; 3556 3557 case BFD_RELOC_HI16_S: 3558 if (REPORT_OVERFLOW_HI && ppc_obj64) 3559 { 3560 /* PowerPC64 @ha is tested for overflow. */ 3561 val = (val + 0x8000) >> 16; 3562 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3563 { 3564 uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; 3565 val = (val ^ sign) - sign; 3566 } 3567 break; 3568 } 3569 /* Fallthru */ 3570 3571 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3572 val = PPC_HA (val); 3573 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3574 val = SEX16 (val); 3575 break; 3576 3577 case BFD_RELOC_PPC64_HIGHER: 3578 val = PPC_HIGHER (val); 3579 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3580 val = SEX16 (val); 3581 break; 3582 3583 case BFD_RELOC_PPC64_HIGHER_S: 3584 val = PPC_HIGHERA (val); 3585 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3586 val = SEX16 (val); 3587 break; 3588 3589 case BFD_RELOC_PPC64_HIGHEST: 3590 val = PPC_HIGHEST (val); 3591 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3592 val = SEX16 (val); 3593 break; 3594 3595 case BFD_RELOC_PPC64_HIGHEST_S: 3596 val = PPC_HIGHESTA (val); 3597 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3598 val = SEX16 (val); 3599 break; 3600 } 3601 #endif /* OBJ_ELF */ 3602 insn = ppc_insert_operand (insn, operand, val, ppc_cpu, NULL, 0); 3603 } 3604 else 3605 { 3606 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3607 #ifdef OBJ_ELF 3608 /* Look for a __tls_get_addr arg using the insane old syntax. */ 3609 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 3610 && parse_tls_arg (&str, &ex, &fixups[fc])) 3611 { 3612 fixups[fc].opindex = *opindex_ptr; 3613 ++fc; 3614 } 3615 3616 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3617 { 3618 /* If VLE-mode convert LO/HI/HA relocations. */ 3619 if (opcode->flags & PPC_OPCODE_VLE) 3620 { 3621 uint64_t tmp_insn = insn & opcode->mask; 3622 3623 int use_a_reloc = (tmp_insn == E_OR2I_INSN 3624 || tmp_insn == E_AND2I_DOT_INSN 3625 || tmp_insn == E_OR2IS_INSN 3626 || tmp_insn == E_LI_INSN 3627 || tmp_insn == E_LIS_INSN 3628 || tmp_insn == E_AND2IS_DOT_INSN); 3629 3630 3631 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3632 || tmp_insn == E_ADD2IS_INSN 3633 || tmp_insn == E_CMP16I_INSN 3634 || tmp_insn == E_MULL2I_INSN 3635 || tmp_insn == E_CMPL16I_INSN 3636 || tmp_insn == E_CMPH16I_INSN 3637 || tmp_insn == E_CMPHL16I_INSN); 3638 3639 switch (reloc) 3640 { 3641 default: 3642 break; 3643 3644 case BFD_RELOC_PPC_EMB_SDA21: 3645 reloc = BFD_RELOC_PPC_VLE_SDA21; 3646 break; 3647 3648 case BFD_RELOC_LO16: 3649 if (use_d_reloc) 3650 reloc = BFD_RELOC_PPC_VLE_LO16D; 3651 else if (use_a_reloc) 3652 reloc = BFD_RELOC_PPC_VLE_LO16A; 3653 break; 3654 3655 case BFD_RELOC_HI16: 3656 if (use_d_reloc) 3657 reloc = BFD_RELOC_PPC_VLE_HI16D; 3658 else if (use_a_reloc) 3659 reloc = BFD_RELOC_PPC_VLE_HI16A; 3660 break; 3661 3662 case BFD_RELOC_HI16_S: 3663 if (use_d_reloc) 3664 reloc = BFD_RELOC_PPC_VLE_HA16D; 3665 else if (use_a_reloc) 3666 reloc = BFD_RELOC_PPC_VLE_HA16A; 3667 break; 3668 3669 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3670 if (use_d_reloc) 3671 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3672 break; 3673 3674 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3675 if (use_d_reloc) 3676 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3677 break; 3678 3679 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3680 if (use_d_reloc) 3681 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3682 break; 3683 } 3684 } 3685 3686 /* TLS and other tweaks. */ 3687 switch (reloc) 3688 { 3689 default: 3690 break; 3691 3692 case BFD_RELOC_PPC_TLS: 3693 case BFD_RELOC_PPC64_TLS_PCREL: 3694 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3695 as_bad (_("@tls may not be used with \"%s\" operands"), 3696 opcode->name); 3697 else if (operand->shift != 11) 3698 as_bad (_("@tls may only be used in last operand")); 3699 else 3700 insn = ppc_insert_operand (insn, operand, 3701 ppc_obj64 ? 13 : 2, 3702 ppc_cpu, (char *) NULL, 0); 3703 break; 3704 3705 /* We'll only use the 32 (or 64) bit form of these relocations 3706 in constants. Instructions get the 16 or 34 bit form. */ 3707 case BFD_RELOC_PPC_DTPREL: 3708 if (operand->bitm == 0x3ffffffffULL) 3709 reloc = BFD_RELOC_PPC64_DTPREL34; 3710 else 3711 reloc = BFD_RELOC_PPC_DTPREL16; 3712 break; 3713 3714 case BFD_RELOC_PPC_TPREL: 3715 if (operand->bitm == 0x3ffffffffULL) 3716 reloc = BFD_RELOC_PPC64_TPREL34; 3717 else 3718 reloc = BFD_RELOC_PPC_TPREL16; 3719 break; 3720 3721 case BFD_RELOC_PPC64_PCREL34: 3722 if (operand->bitm == 0xfffffffULL) 3723 { 3724 reloc = BFD_RELOC_PPC64_PCREL28; 3725 break; 3726 } 3727 /* Fall through. */ 3728 case BFD_RELOC_PPC64_GOT_PCREL34: 3729 case BFD_RELOC_PPC64_PLT_PCREL34: 3730 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 3731 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 3732 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 3733 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 3734 if (operand->bitm != 0x3ffffffffULL 3735 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3736 as_warn (_("%s unsupported on this instruction"), "@pcrel"); 3737 break; 3738 3739 case BFD_RELOC_LO16: 3740 if (operand->bitm == 0x3ffffffffULL 3741 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3742 reloc = BFD_RELOC_PPC64_D34_LO; 3743 else if ((operand->bitm | 0xf) != 0xffff 3744 || operand->shift != 0 3745 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3746 as_warn (_("%s unsupported on this instruction"), "@l"); 3747 break; 3748 3749 case BFD_RELOC_HI16: 3750 if (operand->bitm == 0x3ffffffffULL 3751 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3752 reloc = BFD_RELOC_PPC64_D34_HI30; 3753 else if (operand->bitm != 0xffff 3754 || operand->shift != 0 3755 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3756 as_warn (_("%s unsupported on this instruction"), "@h"); 3757 break; 3758 3759 case BFD_RELOC_HI16_S: 3760 if (operand->bitm == 0x3ffffffffULL 3761 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3762 reloc = BFD_RELOC_PPC64_D34_HA30; 3763 else if (operand->bitm == 0xffff 3764 && operand->shift == (int) PPC_OPSHIFT_INV 3765 && opcode->opcode == (19 << 26) + (2 << 1)) 3766 /* addpcis. */ 3767 reloc = BFD_RELOC_PPC_16DX_HA; 3768 else if (operand->bitm != 0xffff 3769 || operand->shift != 0 3770 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3771 as_warn (_("%s unsupported on this instruction"), "@ha"); 3772 } 3773 } 3774 #endif /* OBJ_ELF */ 3775 #ifdef OBJ_XCOFF 3776 reloc = ppc_xcoff_suffix (&str); 3777 #endif /* OBJ_XCOFF */ 3778 3779 if (reloc != BFD_RELOC_NONE) 3780 ; 3781 /* Determine a BFD reloc value based on the operand information. 3782 We are only prepared to turn a few of the operands into 3783 relocs. */ 3784 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3785 | PPC_OPERAND_ABSOLUTE)) != 0 3786 && operand->bitm == 0x3fffffc 3787 && operand->shift == 0) 3788 reloc = BFD_RELOC_PPC_B26; 3789 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3790 | PPC_OPERAND_ABSOLUTE)) != 0 3791 && operand->bitm == 0xfffc 3792 && operand->shift == 0) 3793 reloc = BFD_RELOC_PPC_B16; 3794 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3795 && operand->bitm == 0x1fe 3796 && operand->shift == -1) 3797 reloc = BFD_RELOC_PPC_VLE_REL8; 3798 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3799 && operand->bitm == 0xfffe 3800 && operand->shift == 0) 3801 reloc = BFD_RELOC_PPC_VLE_REL15; 3802 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3803 && operand->bitm == 0x1fffffe 3804 && operand->shift == 0) 3805 reloc = BFD_RELOC_PPC_VLE_REL24; 3806 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3807 && (operand->bitm & 0xfff0) == 0xfff0 3808 && operand->shift == 0) 3809 { 3810 reloc = BFD_RELOC_16; 3811 #if defined OBJ_XCOFF || defined OBJ_ELF 3812 /* Note: the symbol may be not yet defined. */ 3813 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3814 && ppc_is_toc_sym (ex.X_add_symbol)) 3815 { 3816 reloc = BFD_RELOC_PPC_TOC16; 3817 #ifdef OBJ_ELF 3818 as_warn (_("assuming %s on symbol"), 3819 ppc_obj64 ? "@toc" : "@xgot"); 3820 #endif 3821 } 3822 #endif 3823 } 3824 else if (operand->bitm == 0x3ffffffffULL) 3825 reloc = BFD_RELOC_PPC64_D34; 3826 else if (operand->bitm == 0xfffffffULL) 3827 reloc = BFD_RELOC_PPC64_D28; 3828 3829 /* For the absolute forms of branches, convert the PC 3830 relative form back into the absolute. */ 3831 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3832 { 3833 switch (reloc) 3834 { 3835 case BFD_RELOC_PPC_B26: 3836 reloc = BFD_RELOC_PPC_BA26; 3837 break; 3838 case BFD_RELOC_PPC_B16: 3839 reloc = BFD_RELOC_PPC_BA16; 3840 break; 3841 #ifdef OBJ_ELF 3842 case BFD_RELOC_PPC_B16_BRTAKEN: 3843 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3844 break; 3845 case BFD_RELOC_PPC_B16_BRNTAKEN: 3846 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3847 break; 3848 #endif 3849 default: 3850 break; 3851 } 3852 } 3853 3854 #ifdef OBJ_ELF 3855 switch (reloc) 3856 { 3857 case BFD_RELOC_PPC_TOC16: 3858 toc_reloc_types |= has_small_toc_reloc; 3859 break; 3860 case BFD_RELOC_PPC64_TOC16_LO: 3861 case BFD_RELOC_PPC64_TOC16_HI: 3862 case BFD_RELOC_PPC64_TOC16_HA: 3863 toc_reloc_types |= has_large_toc_reloc; 3864 break; 3865 default: 3866 break; 3867 } 3868 3869 if (ppc_obj64 3870 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3871 { 3872 switch (reloc) 3873 { 3874 case BFD_RELOC_16: 3875 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3876 break; 3877 3878 case BFD_RELOC_LO16: 3879 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3880 break; 3881 3882 case BFD_RELOC_16_GOTOFF: 3883 reloc = BFD_RELOC_PPC64_GOT16_DS; 3884 break; 3885 3886 case BFD_RELOC_LO16_GOTOFF: 3887 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3888 break; 3889 3890 case BFD_RELOC_LO16_PLTOFF: 3891 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3892 break; 3893 3894 case BFD_RELOC_16_BASEREL: 3895 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3896 break; 3897 3898 case BFD_RELOC_LO16_BASEREL: 3899 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3900 break; 3901 3902 case BFD_RELOC_PPC_TOC16: 3903 reloc = BFD_RELOC_PPC64_TOC16_DS; 3904 break; 3905 3906 case BFD_RELOC_PPC64_TOC16_LO: 3907 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3908 break; 3909 3910 case BFD_RELOC_PPC64_PLTGOT16: 3911 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3912 break; 3913 3914 case BFD_RELOC_PPC64_PLTGOT16_LO: 3915 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3916 break; 3917 3918 case BFD_RELOC_PPC_DTPREL16: 3919 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3920 break; 3921 3922 case BFD_RELOC_PPC_DTPREL16_LO: 3923 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3924 break; 3925 3926 case BFD_RELOC_PPC_TPREL16: 3927 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3928 break; 3929 3930 case BFD_RELOC_PPC_TPREL16_LO: 3931 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3932 break; 3933 3934 case BFD_RELOC_PPC_GOT_DTPREL16: 3935 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3936 case BFD_RELOC_PPC_GOT_TPREL16: 3937 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3938 break; 3939 3940 default: 3941 as_bad (_("unsupported relocation for DS offset field")); 3942 break; 3943 } 3944 } 3945 3946 /* Look for a __tls_get_addr arg after any __tls_get_addr 3947 modifiers like @plt. This fixup must be emitted before 3948 the usual call fixup. */ 3949 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 3950 && parse_tls_arg (&str, &ex, &fixups[fc])) 3951 { 3952 fixups[fc].opindex = *opindex_ptr; 3953 ++fc; 3954 } 3955 #endif 3956 3957 /* We need to generate a fixup for this expression. */ 3958 if (fc >= MAX_INSN_FIXUPS) 3959 as_fatal (_("too many fixups")); 3960 fixups[fc].exp = ex; 3961 fixups[fc].opindex = *opindex_ptr; 3962 fixups[fc].reloc = reloc; 3963 ++fc; 3964 } 3965 3966 if (need_paren) 3967 { 3968 endc = ')'; 3969 need_paren = 0; 3970 /* If expecting more operands, then we want to see "),". */ 3971 if (*str == endc && opindex_ptr[1] != 0) 3972 { 3973 do 3974 ++str; 3975 while (ISSPACE (*str)); 3976 endc = ','; 3977 } 3978 } 3979 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 3980 endc = '('; 3981 else 3982 endc = ','; 3983 3984 /* The call to expression should have advanced str past any 3985 whitespace. */ 3986 if (*str == endc) 3987 { 3988 ++str; 3989 if (endc == '(') 3990 need_paren = 1; 3991 } 3992 else if (*str != '\0') 3993 { 3994 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 3995 break; 3996 } 3997 else if (endc == ')') 3998 { 3999 as_bad (_("syntax error; end of line, expected `%c'"), endc); 4000 break; 4001 } 4002 } 4003 4004 while (ISSPACE (*str)) 4005 ++str; 4006 4007 if (*str != '\0') 4008 as_bad (_("junk at end of line: `%s'"), str); 4009 4010 #ifdef OBJ_ELF 4011 /* Do we need/want an APUinfo section? */ 4012 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 4013 && !ppc_obj64) 4014 { 4015 /* These are all version "1". */ 4016 if (opcode->flags & PPC_OPCODE_SPE) 4017 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 4018 if (opcode->flags & PPC_OPCODE_ISEL) 4019 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 4020 if (opcode->flags & PPC_OPCODE_EFS) 4021 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 4022 if (opcode->flags & PPC_OPCODE_BRLOCK) 4023 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 4024 if (opcode->flags & PPC_OPCODE_PMR) 4025 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 4026 if (opcode->flags & PPC_OPCODE_CACHELCK) 4027 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 4028 if (opcode->flags & PPC_OPCODE_RFMCI) 4029 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 4030 /* Only set the VLE flag if the instruction has been pulled via 4031 the VLE instruction set. This way the flag is guaranteed to 4032 be set for VLE-only instructions or for VLE-only processors, 4033 however it'll remain clear for dual-mode instructions on 4034 dual-mode and, more importantly, standard-mode processors. */ 4035 if (ppc_cpu & opcode->flags & PPC_OPCODE_VLE) 4036 { 4037 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 4038 if (elf_section_data (now_seg) != NULL) 4039 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; 4040 } 4041 } 4042 #endif 4043 4044 /* Write out the instruction. */ 4045 4046 addr_mask = 3; 4047 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 4048 /* All instructions can start on a 2 byte boundary for VLE. */ 4049 addr_mask = 1; 4050 4051 if (frag_now->insn_addr != addr_mask) 4052 { 4053 /* Don't emit instructions to a frag started for data, or for a 4054 CPU differing in VLE mode. Data is allowed to be misaligned, 4055 and it's possible to start a new frag in the middle of 4056 misaligned data. */ 4057 frag_wane (frag_now); 4058 frag_new (0); 4059 } 4060 4061 /* Check that insns within the frag are aligned. ppc_frag_check 4062 will ensure that the frag start address is aligned. */ 4063 if ((frag_now_fix () & addr_mask) != 0) 4064 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1); 4065 4066 /* Differentiate between two, four, and eight byte insns. */ 4067 insn_length = 4; 4068 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn)) 4069 insn_length = 2; 4070 else if (PPC_PREFIX_P (insn)) 4071 { 4072 struct insn_label_list *l; 4073 4074 insn_length = 8; 4075 4076 /* 8-byte prefix instructions are not allowed to cross 64-byte 4077 boundaries. */ 4078 frag_align_code (6, 4); 4079 record_alignment (now_seg, 6); 4080 #ifdef OBJ_XCOFF 4081 /* Update alignment of the containing csect. */ 4082 if (symbol_get_tc (ppc_current_csect)->align < 6) 4083 symbol_get_tc (ppc_current_csect)->align = 6; 4084 #endif 4085 4086 /* Update "dot" in any expressions used by this instruction, and 4087 a label attached to the instruction. By "attached" we mean 4088 on the same source line as the instruction and without any 4089 intervening semicolons. */ 4090 dot_value = frag_now_fix (); 4091 dot_frag = frag_now; 4092 for (l = insn_labels; l != NULL; l = l->next) 4093 { 4094 symbol_set_frag (l->label, dot_frag); 4095 S_SET_VALUE (l->label, dot_value); 4096 } 4097 } 4098 4099 ppc_clear_labels (); 4100 4101 f = frag_more (insn_length); 4102 frag_now->insn_addr = addr_mask; 4103 4104 /* The prefix part of an 8-byte instruction always occupies the lower 4105 addressed word in a doubleword, regardless of endianness. */ 4106 if (insn_length == 8 4107 && (sizeof (insn) > sizeof (valueT) || !target_big_endian)) 4108 { 4109 md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); 4110 md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); 4111 } 4112 else 4113 md_number_to_chars (f, insn, insn_length); 4114 4115 last_insn = insn; 4116 last_seg = now_seg; 4117 last_subseg = now_subseg; 4118 4119 #ifdef OBJ_ELF 4120 dwarf2_emit_insn (insn_length); 4121 #endif 4122 4123 /* Create any fixups. */ 4124 for (i = 0; i < fc; i++) 4125 { 4126 fixS *fixP; 4127 if (fixups[i].reloc != BFD_RELOC_NONE) 4128 { 4129 bool pcrel; 4130 unsigned int size = fixup_size (fixups[i].reloc, &pcrel); 4131 int offset = target_big_endian ? (insn_length - size) : 0; 4132 4133 fixP = fix_new_exp (frag_now, 4134 f - frag_now->fr_literal + offset, 4135 size, 4136 &fixups[i].exp, 4137 pcrel, 4138 fixups[i].reloc); 4139 } 4140 else 4141 { 4142 const struct powerpc_operand *operand; 4143 4144 operand = &powerpc_operands[fixups[i].opindex]; 4145 fixP = fix_new_exp (frag_now, 4146 f - frag_now->fr_literal, 4147 insn_length, 4148 &fixups[i].exp, 4149 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 4150 BFD_RELOC_NONE); 4151 } 4152 fixP->fx_pcrel_adjust = fixups[i].opindex; 4153 } 4154 } 4155 4156 #ifdef OBJ_ELF 4157 /* For ELF, add support for SHT_ORDERED. */ 4158 4159 int 4160 ppc_section_type (char *str, size_t len) 4161 { 4162 if (len == 7 && startswith (str, "ordered")) 4163 return SHT_ORDERED; 4164 4165 return -1; 4166 } 4167 4168 int 4169 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 4170 { 4171 if (type == SHT_ORDERED) 4172 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 4173 4174 return flags; 4175 } 4176 4177 bfd_vma 4178 ppc_elf_section_letter (int letter, const char **ptrmsg) 4179 { 4180 if (letter == 'v') 4181 return SHF_PPC_VLE; 4182 4183 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string"); 4184 return -1; 4185 } 4186 #endif /* OBJ_ELF */ 4187 4188 4189 /* Pseudo-op handling. */ 4190 4191 /* The .byte pseudo-op. This is similar to the normal .byte 4192 pseudo-op, but it can also take a single ASCII string. */ 4193 4194 static void 4195 ppc_byte (int ignore ATTRIBUTE_UNUSED) 4196 { 4197 int count = 0; 4198 4199 if (*input_line_pointer != '\"') 4200 { 4201 cons (1); 4202 return; 4203 } 4204 4205 /* Gather characters. A real double quote is doubled. Unusual 4206 characters are not permitted. */ 4207 ++input_line_pointer; 4208 while (1) 4209 { 4210 char c; 4211 4212 c = *input_line_pointer++; 4213 4214 if (c == '\"') 4215 { 4216 if (*input_line_pointer != '\"') 4217 break; 4218 ++input_line_pointer; 4219 } 4220 4221 FRAG_APPEND_1_CHAR (c); 4222 ++count; 4223 } 4224 4225 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 4226 as_warn (_("data in executable section")); 4227 demand_empty_rest_of_line (); 4228 } 4229 4230 #ifdef OBJ_XCOFF 4231 4232 /* XCOFF specific pseudo-op handling. */ 4233 4234 /* This is set if we are creating a .stabx symbol, since we don't want 4235 to handle symbol suffixes for such symbols. */ 4236 static bool ppc_stab_symbol; 4237 4238 /* Retrieve the visiblity input for pseudo-ops having ones. */ 4239 static unsigned short 4240 ppc_xcoff_get_visibility (void) { 4241 SKIP_WHITESPACE(); 4242 4243 if (startswith (input_line_pointer, "exported")) 4244 { 4245 input_line_pointer += 8; 4246 return SYM_V_EXPORTED; 4247 } 4248 4249 if (startswith (input_line_pointer, "hidden")) 4250 { 4251 input_line_pointer += 6; 4252 return SYM_V_HIDDEN; 4253 } 4254 4255 if (startswith (input_line_pointer, "internal")) 4256 { 4257 input_line_pointer += 8; 4258 return SYM_V_INTERNAL; 4259 } 4260 4261 if (startswith (input_line_pointer, "protected")) 4262 { 4263 input_line_pointer += 9; 4264 return SYM_V_PROTECTED; 4265 } 4266 4267 return 0; 4268 } 4269 4270 /* Retrieve visiblity using GNU syntax. */ 4271 static void ppc_GNU_visibility (int visibility) { 4272 int c; 4273 char *name; 4274 symbolS *symbolP; 4275 coff_symbol_type *coffsym; 4276 4277 do 4278 { 4279 if ((name = read_symbol_name ()) == NULL) 4280 break; 4281 symbolP = symbol_find_or_make (name); 4282 free (name); 4283 coffsym = coffsymbol (symbol_get_bfdsym (symbolP)); 4284 4285 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4286 coffsym->native->u.syment.n_type |= visibility; 4287 4288 c = *input_line_pointer; 4289 if (c == ',') 4290 { 4291 input_line_pointer ++; 4292 4293 SKIP_WHITESPACE (); 4294 4295 if (*input_line_pointer == '\n') 4296 c = '\n'; 4297 } 4298 } 4299 while (c == ','); 4300 4301 demand_empty_rest_of_line (); 4302 } 4303 4304 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 4305 symbols in the .bss segment as though they were local common 4306 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 4307 aligns .comm and .lcomm to 4 bytes. 4308 Symbols having a XMC_UL storage class are uninialized thread-local 4309 data. */ 4310 4311 static void 4312 ppc_comm (int lcomm) 4313 { 4314 asection *current_seg = now_seg; 4315 subsegT current_subseg = now_subseg; 4316 char *name; 4317 char endc; 4318 char *end_name; 4319 offsetT size; 4320 offsetT align; 4321 symbolS *lcomm_sym = NULL; 4322 symbolS *sym; 4323 char *pfrag; 4324 unsigned short visibility = 0; 4325 struct ppc_xcoff_section *section; 4326 4327 endc = get_symbol_name (&name); 4328 end_name = input_line_pointer; 4329 (void) restore_line_pointer (endc); 4330 4331 if (*input_line_pointer != ',') 4332 { 4333 as_bad (_("missing size")); 4334 ignore_rest_of_line (); 4335 return; 4336 } 4337 ++input_line_pointer; 4338 4339 size = get_absolute_expression (); 4340 if (size < 0) 4341 { 4342 as_bad (_("negative size")); 4343 ignore_rest_of_line (); 4344 return; 4345 } 4346 4347 if (! lcomm) 4348 { 4349 /* The third argument to .comm is the alignment. */ 4350 if (*input_line_pointer != ',') 4351 align = 2; 4352 else 4353 { 4354 ++input_line_pointer; 4355 align = get_absolute_expression (); 4356 if (align <= 0) 4357 { 4358 as_warn (_("ignoring bad alignment")); 4359 align = 2; 4360 } 4361 4362 /* The fourth argument to .comm is the visibility. */ 4363 if (*input_line_pointer == ',') 4364 { 4365 input_line_pointer++; 4366 visibility = ppc_xcoff_get_visibility (); 4367 if (!visibility) 4368 { 4369 as_bad (_("Unknown visibility field in .comm")); 4370 ignore_rest_of_line (); 4371 return; 4372 } 4373 } 4374 } 4375 } 4376 else 4377 { 4378 char *lcomm_name; 4379 char lcomm_endc; 4380 4381 /* The third argument to .lcomm appears to be the real local 4382 common symbol to create. References to the symbol named in 4383 the first argument are turned into references to the third 4384 argument. */ 4385 if (*input_line_pointer != ',') 4386 { 4387 as_bad (_("missing real symbol name")); 4388 ignore_rest_of_line (); 4389 return; 4390 } 4391 ++input_line_pointer; 4392 4393 lcomm_endc = get_symbol_name (&lcomm_name); 4394 4395 lcomm_sym = symbol_find_or_make (lcomm_name); 4396 4397 (void) restore_line_pointer (lcomm_endc); 4398 4399 /* The fourth argument to .lcomm is the alignment. */ 4400 if (*input_line_pointer != ',') 4401 { 4402 if (size <= 4) 4403 align = 2; 4404 else 4405 align = 3; 4406 } 4407 else 4408 { 4409 ++input_line_pointer; 4410 align = get_absolute_expression (); 4411 if (align <= 0) 4412 { 4413 as_warn (_("ignoring bad alignment")); 4414 align = 2; 4415 } 4416 } 4417 } 4418 4419 *end_name = '\0'; 4420 sym = symbol_find_or_make (name); 4421 *end_name = endc; 4422 4423 if (S_IS_DEFINED (sym) 4424 || S_GET_VALUE (sym) != 0) 4425 { 4426 as_bad (_("attempt to redefine symbol")); 4427 ignore_rest_of_line (); 4428 return; 4429 } 4430 4431 if (symbol_get_tc (sym)->symbol_class == XMC_UL 4432 || (lcomm && symbol_get_tc (lcomm_sym)->symbol_class == XMC_UL)) 4433 { 4434 section = &ppc_xcoff_tbss_section; 4435 if (!ppc_xcoff_section_is_initialized (section)) 4436 { 4437 ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); 4438 bfd_set_section_flags (section->segment, 4439 SEC_ALLOC | SEC_THREAD_LOCAL); 4440 seg_info (section->segment)->bss = 1; 4441 } 4442 } 4443 else 4444 section = &ppc_xcoff_bss_section; 4445 4446 record_alignment (section->segment, align); 4447 4448 if (! lcomm 4449 || ! S_IS_DEFINED (lcomm_sym)) 4450 { 4451 symbolS *def_sym; 4452 offsetT def_size; 4453 4454 if (! lcomm) 4455 { 4456 def_sym = sym; 4457 def_size = size; 4458 S_SET_EXTERNAL (sym); 4459 } 4460 else 4461 { 4462 symbol_get_tc (lcomm_sym)->output = 1; 4463 def_sym = lcomm_sym; 4464 def_size = 0; 4465 } 4466 4467 subseg_set (section->segment, 1); 4468 frag_align (align, 0, 0); 4469 4470 symbol_set_frag (def_sym, frag_now); 4471 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 4472 def_size, (char *) NULL); 4473 *pfrag = 0; 4474 S_SET_SEGMENT (def_sym, section->segment); 4475 symbol_get_tc (def_sym)->align = align; 4476 } 4477 else if (lcomm) 4478 { 4479 /* Align the size of lcomm_sym. */ 4480 symbol_get_frag (lcomm_sym)->fr_offset = 4481 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 4482 &~ ((1 << align) - 1)); 4483 if (align > symbol_get_tc (lcomm_sym)->align) 4484 symbol_get_tc (lcomm_sym)->align = align; 4485 } 4486 4487 if (lcomm) 4488 { 4489 /* Make sym an offset from lcomm_sym. */ 4490 S_SET_SEGMENT (sym, section->segment); 4491 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 4492 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 4493 symbol_get_frag (lcomm_sym)->fr_offset += size; 4494 } 4495 4496 if (!lcomm && visibility) 4497 { 4498 /* Add visibility to .comm symbol. */ 4499 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4500 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4501 coffsym->native->u.syment.n_type |= visibility; 4502 } 4503 4504 subseg_set (current_seg, current_subseg); 4505 4506 demand_empty_rest_of_line (); 4507 } 4508 4509 /* The .csect pseudo-op. This switches us into a different 4510 subsegment. The first argument is a symbol whose value is the 4511 start of the .csect. In COFF, csect symbols get special aux 4512 entries defined by the x_csect field of union internal_auxent. The 4513 optional second argument is the alignment (the default is 2). */ 4514 4515 static void 4516 ppc_csect (int ignore ATTRIBUTE_UNUSED) 4517 { 4518 char *name; 4519 char endc; 4520 symbolS *sym; 4521 offsetT align; 4522 4523 endc = get_symbol_name (&name); 4524 4525 sym = symbol_find_or_make (name); 4526 4527 (void) restore_line_pointer (endc); 4528 4529 if (S_GET_NAME (sym)[0] == '\0') 4530 { 4531 /* An unnamed csect is assumed to be [PR]. */ 4532 symbol_get_tc (sym)->symbol_class = XMC_PR; 4533 } 4534 4535 align = 2; 4536 if (*input_line_pointer == ',') 4537 { 4538 ++input_line_pointer; 4539 align = get_absolute_expression (); 4540 } 4541 4542 ppc_change_csect (sym, align); 4543 4544 demand_empty_rest_of_line (); 4545 } 4546 4547 /* Change to a different csect. */ 4548 4549 static void 4550 ppc_change_csect (symbolS *sym, offsetT align) 4551 { 4552 if (S_IS_DEFINED (sym)) 4553 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 4554 else 4555 { 4556 struct ppc_xcoff_section *section; 4557 int after_toc; 4558 int hold_chunksize; 4559 symbolS *list; 4560 int is_code; 4561 segT sec; 4562 4563 /* This is a new csect. We need to look at the symbol class to 4564 figure out whether it should go in the text section or the 4565 data section. */ 4566 after_toc = 0; 4567 is_code = 0; 4568 switch (symbol_get_tc (sym)->symbol_class) 4569 { 4570 case XMC_PR: 4571 case XMC_RO: 4572 case XMC_DB: 4573 case XMC_GL: 4574 case XMC_XO: 4575 case XMC_SV: 4576 case XMC_TI: 4577 case XMC_TB: 4578 section = &ppc_xcoff_text_section; 4579 is_code = 1; 4580 break; 4581 case XMC_RW: 4582 case XMC_TC0: 4583 case XMC_TC: 4584 case XMC_TE: 4585 case XMC_DS: 4586 case XMC_UA: 4587 case XMC_UC: 4588 section = &ppc_xcoff_data_section; 4589 if (ppc_toc_csect != NULL 4590 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 4591 == section->next_subsegment)) 4592 after_toc = 1; 4593 break; 4594 case XMC_BS: 4595 section = &ppc_xcoff_bss_section; 4596 break; 4597 case XMC_TL: 4598 section = &ppc_xcoff_tdata_section; 4599 /* Create .tdata section if not yet done. */ 4600 if (!ppc_xcoff_section_is_initialized (section)) 4601 { 4602 ppc_init_xcoff_section (section, subseg_new (".tdata", 0)); 4603 bfd_set_section_flags (section->segment, SEC_ALLOC 4604 | SEC_LOAD | SEC_RELOC | SEC_DATA 4605 | SEC_THREAD_LOCAL); 4606 } 4607 break; 4608 case XMC_UL: 4609 section = &ppc_xcoff_tbss_section; 4610 /* Create .tbss section if not yet done. */ 4611 if (!ppc_xcoff_section_is_initialized (section)) 4612 { 4613 ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); 4614 bfd_set_section_flags (section->segment, SEC_ALLOC | 4615 SEC_THREAD_LOCAL); 4616 seg_info (section->segment)->bss = 1; 4617 } 4618 break; 4619 default: 4620 abort (); 4621 } 4622 4623 S_SET_SEGMENT (sym, section->segment); 4624 symbol_get_tc (sym)->subseg = section->next_subsegment; 4625 ++section->next_subsegment; 4626 4627 /* We set the obstack chunk size to a small value before 4628 changing subsegments, so that we don't use a lot of memory 4629 space for what may be a small section. */ 4630 hold_chunksize = chunksize; 4631 chunksize = 64; 4632 4633 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 4634 symbol_get_tc (sym)->subseg); 4635 4636 chunksize = hold_chunksize; 4637 4638 if (after_toc) 4639 ppc_after_toc_frag = frag_now; 4640 4641 record_alignment (sec, align); 4642 if (is_code) 4643 frag_align_code (align, 0); 4644 else 4645 frag_align (align, 0, 0); 4646 4647 symbol_set_frag (sym, frag_now); 4648 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4649 4650 symbol_get_tc (sym)->align = align; 4651 symbol_get_tc (sym)->output = 1; 4652 symbol_get_tc (sym)->within = sym; 4653 4654 for (list = section->csects; 4655 symbol_get_tc (list)->next != (symbolS *) NULL; 4656 list = symbol_get_tc (list)->next) 4657 ; 4658 symbol_get_tc (list)->next = sym; 4659 4660 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4661 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4662 &symbol_lastP); 4663 } 4664 4665 ppc_current_csect = sym; 4666 } 4667 4668 static void 4669 ppc_change_debug_section (unsigned int idx, subsegT subseg) 4670 { 4671 segT sec; 4672 flagword oldflags; 4673 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 4674 4675 sec = subseg_new (dw->xcoff_name, subseg); 4676 oldflags = bfd_section_flags (sec); 4677 if (oldflags == SEC_NO_FLAGS) 4678 { 4679 /* Just created section. */ 4680 gas_assert (dw_sections[idx].sect == NULL); 4681 4682 bfd_set_section_flags (sec, SEC_DEBUGGING); 4683 bfd_set_section_alignment (sec, 0); 4684 dw_sections[idx].sect = sec; 4685 } 4686 4687 /* Not anymore in a csect. */ 4688 ppc_current_csect = NULL; 4689 } 4690 4691 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 4692 .dwsect flag [, opt-label ] 4693 */ 4694 4695 static void 4696 ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 4697 { 4698 valueT flag; 4699 symbolS *opt_label; 4700 const struct xcoff_dwsect_name *dw; 4701 struct dw_subsection *subseg; 4702 struct dw_section *dws; 4703 int i; 4704 4705 /* Find section. */ 4706 flag = get_absolute_expression (); 4707 dw = NULL; 4708 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4709 if (xcoff_dwsect_names[i].flag == flag) 4710 { 4711 dw = &xcoff_dwsect_names[i]; 4712 break; 4713 } 4714 4715 /* Parse opt-label. */ 4716 if (*input_line_pointer == ',') 4717 { 4718 char *label; 4719 char c; 4720 4721 ++input_line_pointer; 4722 4723 c = get_symbol_name (&label); 4724 opt_label = symbol_find_or_make (label); 4725 (void) restore_line_pointer (c); 4726 } 4727 else 4728 opt_label = NULL; 4729 4730 demand_empty_rest_of_line (); 4731 4732 /* Return now in case of unknown subsection. */ 4733 if (dw == NULL) 4734 { 4735 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 4736 (unsigned)flag); 4737 return; 4738 } 4739 4740 /* Find the subsection. */ 4741 dws = &dw_sections[i]; 4742 subseg = NULL; 4743 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4744 { 4745 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4746 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4747 { 4748 as_bad (_("label %s was not defined in this dwarf section"), 4749 S_GET_NAME (opt_label)); 4750 subseg = dws->anon_subseg; 4751 opt_label = NULL; 4752 } 4753 else 4754 subseg = symbol_get_tc (opt_label)->u.dw; 4755 } 4756 4757 if (subseg != NULL) 4758 { 4759 /* Switch to the subsection. */ 4760 ppc_change_debug_section (i, subseg->subseg); 4761 } 4762 else 4763 { 4764 /* Create a new dw subsection. */ 4765 subseg = XCNEW (struct dw_subsection); 4766 4767 if (opt_label == NULL) 4768 { 4769 /* The anonymous one. */ 4770 subseg->subseg = 0; 4771 subseg->link = NULL; 4772 dws->anon_subseg = subseg; 4773 } 4774 else 4775 { 4776 /* A named one. */ 4777 if (dws->list_subseg != NULL) 4778 subseg->subseg = dws->list_subseg->subseg + 1; 4779 else 4780 subseg->subseg = 1; 4781 4782 subseg->link = dws->list_subseg; 4783 dws->list_subseg = subseg; 4784 symbol_get_tc (opt_label)->u.dw = subseg; 4785 } 4786 4787 ppc_change_debug_section (i, subseg->subseg); 4788 4789 if (dw->def_size) 4790 { 4791 /* Add the length field. */ 4792 expressionS *exp = &subseg->end_exp; 4793 int sz; 4794 4795 if (opt_label != NULL) 4796 symbol_set_value_now (opt_label); 4797 4798 /* Add the length field. Note that according to the AIX assembler 4799 manual, the size of the length field is 4 for powerpc32 but 4800 12 for powerpc64. */ 4801 if (ppc_obj64) 4802 { 4803 /* Write the 64bit marker. */ 4804 md_number_to_chars (frag_more (4), -1, 4); 4805 } 4806 4807 exp->X_op = O_subtract; 4808 exp->X_op_symbol = symbol_temp_new_now (); 4809 exp->X_add_symbol = symbol_temp_make (); 4810 4811 sz = ppc_obj64 ? 8 : 4; 4812 exp->X_add_number = -sz; 4813 emit_expr (exp, sz); 4814 } 4815 } 4816 } 4817 4818 /* This function handles the .text and .data pseudo-ops. These 4819 pseudo-ops aren't really used by XCOFF; we implement them for the 4820 convenience of people who aren't used to XCOFF. */ 4821 4822 static void 4823 ppc_section (int type) 4824 { 4825 const char *name; 4826 symbolS *sym; 4827 4828 if (type == 't') 4829 name = ".text[PR]"; 4830 else if (type == 'd') 4831 name = ".data[RW]"; 4832 else 4833 abort (); 4834 4835 sym = symbol_find_or_make (name); 4836 4837 ppc_change_csect (sym, 2); 4838 4839 demand_empty_rest_of_line (); 4840 } 4841 4842 /* This function handles the .section pseudo-op. This is mostly to 4843 give an error, since XCOFF only supports .text, .data and .bss, but 4844 we do permit the user to name the text or data section. */ 4845 4846 static void 4847 ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4848 { 4849 char *user_name; 4850 const char *real_name; 4851 char c; 4852 symbolS *sym; 4853 4854 c = get_symbol_name (&user_name); 4855 4856 if (strcmp (user_name, ".text") == 0) 4857 real_name = ".text[PR]"; 4858 else if (strcmp (user_name, ".data") == 0) 4859 real_name = ".data[RW]"; 4860 else 4861 { 4862 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4863 (void) restore_line_pointer (c); 4864 ignore_rest_of_line (); 4865 return; 4866 } 4867 4868 (void) restore_line_pointer (c); 4869 4870 sym = symbol_find_or_make (real_name); 4871 4872 ppc_change_csect (sym, 2); 4873 4874 demand_empty_rest_of_line (); 4875 } 4876 4877 /* The .extern pseudo-op. We create an undefined symbol. */ 4878 4879 static void 4880 ppc_extern (int ignore ATTRIBUTE_UNUSED) 4881 { 4882 char *name; 4883 symbolS *sym; 4884 4885 if ((name = read_symbol_name ()) == NULL) 4886 return; 4887 4888 sym = symbol_find_or_make (name); 4889 free (name); 4890 4891 if (*input_line_pointer == ',') 4892 { 4893 unsigned short visibility; 4894 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4895 4896 input_line_pointer++; 4897 visibility = ppc_xcoff_get_visibility (); 4898 if (!visibility) 4899 { 4900 as_bad (_("Unknown visibility field in .extern")); 4901 ignore_rest_of_line (); 4902 return; 4903 } 4904 4905 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4906 coffsym->native->u.syment.n_type |= visibility; 4907 } 4908 4909 demand_empty_rest_of_line (); 4910 } 4911 4912 /* XCOFF semantic for .globl says that the second parameter is 4913 the symbol visibility. */ 4914 4915 static void 4916 ppc_globl (int ignore ATTRIBUTE_UNUSED) 4917 { 4918 char *name; 4919 symbolS *sym; 4920 4921 if ((name = read_symbol_name ()) == NULL) 4922 return; 4923 4924 sym = symbol_find_or_make (name); 4925 free (name); 4926 S_SET_EXTERNAL (sym); 4927 4928 if (*input_line_pointer == ',') 4929 { 4930 unsigned short visibility; 4931 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4932 4933 input_line_pointer++; 4934 visibility = ppc_xcoff_get_visibility (); 4935 if (!visibility) 4936 { 4937 as_bad (_("Unknown visibility field in .globl")); 4938 ignore_rest_of_line (); 4939 return; 4940 } 4941 4942 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4943 coffsym->native->u.syment.n_type |= visibility; 4944 } 4945 4946 demand_empty_rest_of_line (); 4947 } 4948 4949 /* XCOFF semantic for .weak says that the second parameter is 4950 the symbol visibility. */ 4951 4952 static void 4953 ppc_weak (int ignore ATTRIBUTE_UNUSED) 4954 { 4955 char *name; 4956 symbolS *sym; 4957 4958 if ((name = read_symbol_name ()) == NULL) 4959 return; 4960 4961 sym = symbol_find_or_make (name); 4962 free (name); 4963 S_SET_WEAK (sym); 4964 4965 if (*input_line_pointer == ',') 4966 { 4967 unsigned short visibility; 4968 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4969 4970 input_line_pointer++; 4971 visibility = ppc_xcoff_get_visibility (); 4972 if (!visibility) 4973 { 4974 as_bad (_("Unknown visibility field in .weak")); 4975 ignore_rest_of_line (); 4976 return; 4977 } 4978 4979 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4980 coffsym->native->u.syment.n_type |= visibility; 4981 } 4982 4983 demand_empty_rest_of_line (); 4984 } 4985 4986 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4987 4988 static void 4989 ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4990 { 4991 char *name; 4992 char endc; 4993 symbolS *sym; 4994 4995 endc = get_symbol_name (&name); 4996 4997 sym = symbol_find_or_make (name); 4998 4999 (void) restore_line_pointer (endc); 5000 5001 symbol_get_tc (sym)->output = 1; 5002 5003 demand_empty_rest_of_line (); 5004 } 5005 5006 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 5007 relocations at the beginning of the current csect. 5008 5009 (In principle, there's no reason why the relocations _have_ to be at 5010 the beginning. Anywhere in the csect would do. However, inserting 5011 at the beginning is what the native assembler does, and it helps to 5012 deal with cases where the .ref statements follow the section contents.) 5013 5014 ??? .refs don't work for empty .csects. However, the native assembler 5015 doesn't report an error in this case, and neither yet do we. */ 5016 5017 static void 5018 ppc_ref (int ignore ATTRIBUTE_UNUSED) 5019 { 5020 char *name; 5021 char c; 5022 5023 if (ppc_current_csect == NULL) 5024 { 5025 as_bad (_(".ref outside .csect")); 5026 ignore_rest_of_line (); 5027 return; 5028 } 5029 5030 do 5031 { 5032 c = get_symbol_name (&name); 5033 5034 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 5035 symbol_find_or_make (name), 0, false, BFD_RELOC_NONE); 5036 5037 *input_line_pointer = c; 5038 SKIP_WHITESPACE_AFTER_NAME (); 5039 c = *input_line_pointer; 5040 if (c == ',') 5041 { 5042 input_line_pointer++; 5043 SKIP_WHITESPACE (); 5044 if (is_end_of_line[(unsigned char) *input_line_pointer]) 5045 { 5046 as_bad (_("missing symbol name")); 5047 ignore_rest_of_line (); 5048 return; 5049 } 5050 } 5051 } 5052 while (c == ','); 5053 5054 demand_empty_rest_of_line (); 5055 } 5056 5057 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 5058 although I don't know why it bothers. */ 5059 5060 static void 5061 ppc_rename (int ignore ATTRIBUTE_UNUSED) 5062 { 5063 char *name; 5064 char endc; 5065 symbolS *sym; 5066 int len; 5067 5068 endc = get_symbol_name (&name); 5069 5070 sym = symbol_find_or_make (name); 5071 5072 (void) restore_line_pointer (endc); 5073 5074 if (*input_line_pointer != ',') 5075 { 5076 as_bad (_("missing rename string")); 5077 ignore_rest_of_line (); 5078 return; 5079 } 5080 ++input_line_pointer; 5081 5082 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 5083 5084 demand_empty_rest_of_line (); 5085 } 5086 5087 /* The .stabx pseudo-op. This is similar to a normal .stabs 5088 pseudo-op, but slightly different. A sample is 5089 .stabx "main:F-1",.main,142,0 5090 The first argument is the symbol name to create. The second is the 5091 value, and the third is the storage class. The fourth seems to be 5092 always zero, and I am assuming it is the type. */ 5093 5094 static void 5095 ppc_stabx (int ignore ATTRIBUTE_UNUSED) 5096 { 5097 char *name; 5098 int len; 5099 symbolS *sym; 5100 expressionS exp; 5101 5102 name = demand_copy_C_string (&len); 5103 5104 if (*input_line_pointer != ',') 5105 { 5106 as_bad (_("missing value")); 5107 return; 5108 } 5109 ++input_line_pointer; 5110 5111 ppc_stab_symbol = true; 5112 sym = symbol_make (name); 5113 ppc_stab_symbol = false; 5114 5115 symbol_get_tc (sym)->real_name = name; 5116 5117 (void) expression (&exp); 5118 5119 switch (exp.X_op) 5120 { 5121 case O_illegal: 5122 case O_absent: 5123 case O_big: 5124 as_bad (_("illegal .stabx expression; zero assumed")); 5125 exp.X_add_number = 0; 5126 /* Fall through. */ 5127 case O_constant: 5128 S_SET_VALUE (sym, (valueT) exp.X_add_number); 5129 symbol_set_frag (sym, &zero_address_frag); 5130 break; 5131 5132 case O_symbol: 5133 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 5134 symbol_set_value_expression (sym, &exp); 5135 else 5136 { 5137 S_SET_VALUE (sym, 5138 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 5139 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 5140 } 5141 break; 5142 5143 default: 5144 /* The value is some complex expression. This will probably 5145 fail at some later point, but this is probably the right 5146 thing to do here. */ 5147 symbol_set_value_expression (sym, &exp); 5148 break; 5149 } 5150 5151 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5152 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5153 5154 if (*input_line_pointer != ',') 5155 { 5156 as_bad (_("missing class")); 5157 return; 5158 } 5159 ++input_line_pointer; 5160 5161 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 5162 5163 if (*input_line_pointer != ',') 5164 { 5165 as_bad (_("missing type")); 5166 return; 5167 } 5168 ++input_line_pointer; 5169 5170 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 5171 5172 symbol_get_tc (sym)->output = 1; 5173 5174 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 5175 { 5176 /* In this case : 5177 5178 .bs name 5179 .stabx "z",arrays_,133,0 5180 .es 5181 5182 .comm arrays_,13768,3 5183 5184 resolve_symbol_value will copy the exp's "within" into sym's when the 5185 offset is 0. Since this seems to be corner case problem, 5186 only do the correction for storage class C_STSYM. A better solution 5187 would be to have the tc field updated in ppc_symbol_new_hook. */ 5188 5189 if (exp.X_op == O_symbol) 5190 { 5191 if (ppc_current_block == NULL) 5192 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 5193 5194 symbol_get_tc (sym)->within = ppc_current_block; 5195 } 5196 } 5197 5198 if (exp.X_op != O_symbol 5199 || ! S_IS_EXTERNAL (exp.X_add_symbol) 5200 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 5201 ppc_frob_label (sym); 5202 else 5203 { 5204 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5205 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 5206 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 5207 symbol_get_tc (ppc_current_csect)->within = sym; 5208 } 5209 5210 demand_empty_rest_of_line (); 5211 } 5212 5213 /* The .file pseudo-op. On XCOFF, .file can have several parameters 5214 which are being added to the symbol table to provide additional 5215 information. */ 5216 5217 static void 5218 ppc_file (int ignore ATTRIBUTE_UNUSED) 5219 { 5220 char *sfname, *s1 = NULL, *s2 = NULL, *s3 = NULL; 5221 int length, auxnb = 1; 5222 5223 /* Some assemblers tolerate immediately following '"'. */ 5224 if ((sfname = demand_copy_string (&length)) != 0) 5225 { 5226 coff_symbol_type *coffsym; 5227 if (*input_line_pointer == ',') 5228 { 5229 ++input_line_pointer; 5230 s1 = demand_copy_string (&length); 5231 auxnb++; 5232 5233 if (*input_line_pointer == ',') 5234 { 5235 ++input_line_pointer; 5236 s2 = demand_copy_string (&length); 5237 auxnb++; 5238 5239 if (*input_line_pointer == ',') 5240 { 5241 ++input_line_pointer; 5242 s3 = demand_copy_string (&length); 5243 auxnb++; 5244 } 5245 } 5246 } 5247 5248 /* Use coff dot_file creation and adjust auxiliary entries. */ 5249 c_dot_file_symbol (sfname); 5250 S_SET_NUMBER_AUXILIARY (symbol_rootP, auxnb); 5251 coffsym = coffsymbol (symbol_get_bfdsym (symbol_rootP)); 5252 coffsym->native[1].u.auxent.x_file.x_ftype = XFT_FN; 5253 5254 if (s1) 5255 { 5256 coffsym->native[2].u.auxent.x_file.x_ftype = XFT_CT; 5257 coffsym->native[2].extrap = s1; 5258 } 5259 if (s2) 5260 { 5261 coffsym->native[3].u.auxent.x_file.x_ftype = XFT_CV; 5262 coffsym->native[3].extrap = s2; 5263 } 5264 if (s3) 5265 { 5266 coffsym->native[4].u.auxent.x_file.x_ftype = XFT_CD; 5267 coffsym->native[4].extrap = s3; 5268 } 5269 5270 demand_empty_rest_of_line (); 5271 } 5272 } 5273 5274 /* The .function pseudo-op. This takes several arguments. The first 5275 argument seems to be the external name of the symbol. The second 5276 argument seems to be the label for the start of the function. gcc 5277 uses the same name for both. I have no idea what the third and 5278 fourth arguments are meant to be. The optional fifth argument is 5279 an expression for the size of the function. In COFF this symbol 5280 gets an aux entry like that used for a csect. */ 5281 5282 static void 5283 ppc_function (int ignore ATTRIBUTE_UNUSED) 5284 { 5285 char *name; 5286 char endc; 5287 char *s; 5288 symbolS *ext_sym; 5289 symbolS *lab_sym; 5290 5291 endc = get_symbol_name (&name); 5292 5293 /* Ignore any [PR] suffix. */ 5294 name = ppc_canonicalize_symbol_name (name); 5295 s = strchr (name, '['); 5296 if (s != (char *) NULL 5297 && strcmp (s + 1, "PR]") == 0) 5298 *s = '\0'; 5299 5300 ext_sym = symbol_find_or_make (name); 5301 5302 (void) restore_line_pointer (endc); 5303 5304 if (*input_line_pointer != ',') 5305 { 5306 as_bad (_("missing symbol name")); 5307 ignore_rest_of_line (); 5308 return; 5309 } 5310 ++input_line_pointer; 5311 5312 endc = get_symbol_name (&name); 5313 5314 lab_sym = symbol_find_or_make (name); 5315 5316 (void) restore_line_pointer (endc); 5317 5318 if (ext_sym != lab_sym) 5319 { 5320 expressionS exp; 5321 5322 exp.X_op = O_symbol; 5323 exp.X_add_symbol = lab_sym; 5324 exp.X_op_symbol = NULL; 5325 exp.X_add_number = 0; 5326 exp.X_unsigned = 0; 5327 symbol_set_value_expression (ext_sym, &exp); 5328 } 5329 5330 if (symbol_get_tc (ext_sym)->symbol_class == -1) 5331 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 5332 symbol_get_tc (ext_sym)->output = 1; 5333 5334 if (*input_line_pointer == ',') 5335 { 5336 expressionS exp; 5337 5338 /* Ignore the third argument. */ 5339 ++input_line_pointer; 5340 expression (& exp); 5341 if (*input_line_pointer == ',') 5342 { 5343 /* Ignore the fourth argument. */ 5344 ++input_line_pointer; 5345 expression (& exp); 5346 if (*input_line_pointer == ',') 5347 { 5348 /* The fifth argument is the function size. 5349 If it's omitted, the size will be the containing csect. 5350 This will be donce during ppc_frob_symtab. */ 5351 ++input_line_pointer; 5352 symbol_get_tc (ext_sym)->u.size 5353 = symbol_new ("L0\001", absolute_section, 5354 &zero_address_frag, 0); 5355 pseudo_set (symbol_get_tc (ext_sym)->u.size); 5356 } 5357 } 5358 } 5359 5360 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5361 SF_SET_FUNCTION (ext_sym); 5362 SF_SET_PROCESS (ext_sym); 5363 coff_add_linesym (ext_sym); 5364 5365 demand_empty_rest_of_line (); 5366 } 5367 5368 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 5369 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 5370 with the correct line number */ 5371 5372 static symbolS *saved_bi_sym = 0; 5373 5374 static void 5375 ppc_bf (int ignore ATTRIBUTE_UNUSED) 5376 { 5377 symbolS *sym; 5378 5379 sym = symbol_make (".bf"); 5380 S_SET_SEGMENT (sym, text_section); 5381 symbol_set_frag (sym, frag_now); 5382 S_SET_VALUE (sym, frag_now_fix ()); 5383 S_SET_STORAGE_CLASS (sym, C_FCN); 5384 5385 coff_line_base = get_absolute_expression (); 5386 5387 S_SET_NUMBER_AUXILIARY (sym, 1); 5388 SA_SET_SYM_LNNO (sym, coff_line_base); 5389 5390 /* Line number for bi. */ 5391 if (saved_bi_sym) 5392 { 5393 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 5394 saved_bi_sym = 0; 5395 } 5396 5397 5398 symbol_get_tc (sym)->output = 1; 5399 5400 ppc_frob_label (sym); 5401 5402 demand_empty_rest_of_line (); 5403 } 5404 5405 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 5406 ".ef", except that the line number is absolute, not relative to the 5407 most recent ".bf" symbol. */ 5408 5409 static void 5410 ppc_ef (int ignore ATTRIBUTE_UNUSED) 5411 { 5412 symbolS *sym; 5413 5414 sym = symbol_make (".ef"); 5415 S_SET_SEGMENT (sym, text_section); 5416 symbol_set_frag (sym, frag_now); 5417 S_SET_VALUE (sym, frag_now_fix ()); 5418 S_SET_STORAGE_CLASS (sym, C_FCN); 5419 S_SET_NUMBER_AUXILIARY (sym, 1); 5420 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5421 symbol_get_tc (sym)->output = 1; 5422 5423 ppc_frob_label (sym); 5424 5425 demand_empty_rest_of_line (); 5426 } 5427 5428 /* The .bi and .ei pseudo-ops. These take a string argument and 5429 generates a C_BINCL or C_EINCL symbol, which goes at the start of 5430 the symbol list. The value of .bi will be know when the next .bf 5431 is encountered. */ 5432 5433 static void 5434 ppc_biei (int ei) 5435 { 5436 static symbolS *last_biei; 5437 5438 char *name; 5439 int len; 5440 symbolS *sym; 5441 symbolS *look; 5442 5443 name = demand_copy_C_string (&len); 5444 5445 /* The value of these symbols is actually file offset. Here we set 5446 the value to the index into the line number entries. In 5447 ppc_frob_symbols we set the fix_line field, which will cause BFD 5448 to do the right thing. */ 5449 5450 sym = symbol_make (name); 5451 /* obj-coff.c currently only handles line numbers correctly in the 5452 .text section. */ 5453 S_SET_SEGMENT (sym, text_section); 5454 S_SET_VALUE (sym, coff_n_line_nos); 5455 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5456 5457 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 5458 symbol_get_tc (sym)->output = 1; 5459 5460 /* Save bi. */ 5461 if (ei) 5462 saved_bi_sym = 0; 5463 else 5464 saved_bi_sym = sym; 5465 5466 for (look = last_biei ? last_biei : symbol_rootP; 5467 (look != (symbolS *) NULL 5468 && (S_GET_STORAGE_CLASS (look) == C_FILE 5469 || S_GET_STORAGE_CLASS (look) == C_BINCL 5470 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 5471 look = symbol_next (look)) 5472 ; 5473 if (look != (symbolS *) NULL) 5474 { 5475 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5476 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 5477 last_biei = sym; 5478 } 5479 5480 demand_empty_rest_of_line (); 5481 } 5482 5483 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 5484 There is one argument, which is a csect symbol. The value of the 5485 .bs symbol is the index of this csect symbol. */ 5486 5487 static void 5488 ppc_bs (int ignore ATTRIBUTE_UNUSED) 5489 { 5490 char *name; 5491 char endc; 5492 symbolS *csect; 5493 symbolS *sym; 5494 5495 if (ppc_current_block != NULL) 5496 as_bad (_("nested .bs blocks")); 5497 5498 endc = get_symbol_name (&name); 5499 5500 csect = symbol_find_or_make (name); 5501 5502 (void) restore_line_pointer (endc); 5503 5504 sym = symbol_make (".bs"); 5505 S_SET_SEGMENT (sym, now_seg); 5506 S_SET_STORAGE_CLASS (sym, C_BSTAT); 5507 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5508 symbol_get_tc (sym)->output = 1; 5509 5510 symbol_get_tc (sym)->within = csect; 5511 5512 ppc_frob_label (sym); 5513 5514 ppc_current_block = sym; 5515 5516 demand_empty_rest_of_line (); 5517 } 5518 5519 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 5520 5521 static void 5522 ppc_es (int ignore ATTRIBUTE_UNUSED) 5523 { 5524 symbolS *sym; 5525 5526 if (ppc_current_block == NULL) 5527 as_bad (_(".es without preceding .bs")); 5528 5529 sym = symbol_make (".es"); 5530 S_SET_SEGMENT (sym, now_seg); 5531 S_SET_STORAGE_CLASS (sym, C_ESTAT); 5532 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5533 symbol_get_tc (sym)->output = 1; 5534 5535 ppc_frob_label (sym); 5536 5537 ppc_current_block = NULL; 5538 5539 demand_empty_rest_of_line (); 5540 } 5541 5542 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 5543 line number. */ 5544 5545 static void 5546 ppc_bb (int ignore ATTRIBUTE_UNUSED) 5547 { 5548 symbolS *sym; 5549 5550 sym = symbol_make (".bb"); 5551 S_SET_SEGMENT (sym, text_section); 5552 symbol_set_frag (sym, frag_now); 5553 S_SET_VALUE (sym, frag_now_fix ()); 5554 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5555 5556 S_SET_NUMBER_AUXILIARY (sym, 1); 5557 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5558 5559 symbol_get_tc (sym)->output = 1; 5560 5561 SF_SET_PROCESS (sym); 5562 5563 ppc_frob_label (sym); 5564 5565 demand_empty_rest_of_line (); 5566 } 5567 5568 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 5569 line number. */ 5570 5571 static void 5572 ppc_eb (int ignore ATTRIBUTE_UNUSED) 5573 { 5574 symbolS *sym; 5575 5576 sym = symbol_make (".eb"); 5577 S_SET_SEGMENT (sym, text_section); 5578 symbol_set_frag (sym, frag_now); 5579 S_SET_VALUE (sym, frag_now_fix ()); 5580 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5581 S_SET_NUMBER_AUXILIARY (sym, 1); 5582 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5583 symbol_get_tc (sym)->output = 1; 5584 5585 SF_SET_PROCESS (sym); 5586 5587 ppc_frob_label (sym); 5588 5589 demand_empty_rest_of_line (); 5590 } 5591 5592 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 5593 specified name. */ 5594 5595 static void 5596 ppc_bc (int ignore ATTRIBUTE_UNUSED) 5597 { 5598 char *name; 5599 int len; 5600 symbolS *sym; 5601 5602 name = demand_copy_C_string (&len); 5603 sym = symbol_make (name); 5604 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5605 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5606 S_SET_STORAGE_CLASS (sym, C_BCOMM); 5607 S_SET_VALUE (sym, 0); 5608 symbol_get_tc (sym)->output = 1; 5609 5610 ppc_frob_label (sym); 5611 5612 demand_empty_rest_of_line (); 5613 } 5614 5615 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 5616 5617 static void 5618 ppc_ec (int ignore ATTRIBUTE_UNUSED) 5619 { 5620 symbolS *sym; 5621 5622 sym = symbol_make (".ec"); 5623 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5624 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5625 S_SET_STORAGE_CLASS (sym, C_ECOMM); 5626 S_SET_VALUE (sym, 0); 5627 symbol_get_tc (sym)->output = 1; 5628 5629 ppc_frob_label (sym); 5630 5631 demand_empty_rest_of_line (); 5632 } 5633 5634 /* The .toc pseudo-op. Switch to the .toc subsegment. */ 5635 5636 static void 5637 ppc_toc (int ignore ATTRIBUTE_UNUSED) 5638 { 5639 if (ppc_toc_csect != (symbolS *) NULL) 5640 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 5641 else 5642 { 5643 subsegT subseg; 5644 symbolS *sym; 5645 symbolS *list; 5646 5647 subseg = ppc_xcoff_data_section.next_subsegment; 5648 ++ppc_xcoff_data_section.next_subsegment; 5649 5650 subseg_new (segment_name (data_section), subseg); 5651 ppc_toc_frag = frag_now; 5652 5653 sym = symbol_find_or_make ("TOC[TC0]"); 5654 symbol_set_frag (sym, frag_now); 5655 S_SET_SEGMENT (sym, data_section); 5656 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5657 symbol_get_tc (sym)->subseg = subseg; 5658 symbol_get_tc (sym)->output = 1; 5659 symbol_get_tc (sym)->within = sym; 5660 5661 ppc_toc_csect = sym; 5662 5663 for (list = ppc_xcoff_data_section.csects; 5664 symbol_get_tc (list)->next != (symbolS *) NULL; 5665 list = symbol_get_tc (list)->next) 5666 ; 5667 symbol_get_tc (list)->next = sym; 5668 5669 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5670 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 5671 &symbol_lastP); 5672 } 5673 5674 ppc_current_csect = ppc_toc_csect; 5675 5676 demand_empty_rest_of_line (); 5677 } 5678 5679 /* The AIX assembler automatically aligns the operands of a .long or 5680 .short pseudo-op, and we want to be compatible. */ 5681 5682 static void 5683 ppc_xcoff_cons (int log_size) 5684 { 5685 frag_align (log_size, 0, 0); 5686 record_alignment (now_seg, log_size); 5687 cons (1 << log_size); 5688 } 5689 5690 static void 5691 ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 5692 { 5693 expressionS exp; 5694 int byte_count; 5695 5696 (void) expression (&exp); 5697 5698 if (exp.X_op != O_constant) 5699 { 5700 as_bad (_("non-constant byte count")); 5701 return; 5702 } 5703 5704 byte_count = exp.X_add_number; 5705 5706 if (*input_line_pointer != ',') 5707 { 5708 as_bad (_("missing value")); 5709 return; 5710 } 5711 5712 ++input_line_pointer; 5713 cons (byte_count); 5714 } 5715 5716 void 5717 ppc_xcoff_md_finish (void) 5718 { 5719 int i; 5720 5721 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 5722 { 5723 struct dw_section *dws = &dw_sections[i]; 5724 struct dw_subsection *dwss; 5725 5726 if (dws->anon_subseg) 5727 { 5728 dwss = dws->anon_subseg; 5729 dwss->link = dws->list_subseg; 5730 } 5731 else 5732 dwss = dws->list_subseg; 5733 5734 for (; dwss != NULL; dwss = dwss->link) 5735 if (dwss->end_exp.X_add_symbol != NULL) 5736 { 5737 subseg_set (dws->sect, dwss->subseg); 5738 symbol_set_value_now (dwss->end_exp.X_add_symbol); 5739 } 5740 } 5741 ppc_cpu = 0; 5742 } 5743 5744 #endif /* OBJ_XCOFF */ 5745 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 5746 5747 /* The .tc pseudo-op. This is used when generating either XCOFF or 5748 ELF. This takes two or more arguments. 5749 5750 When generating XCOFF output, the first argument is the name to 5751 give to this location in the toc; this will be a symbol with class 5752 TC. The rest of the arguments are N-byte values to actually put at 5753 this location in the TOC; often there is just one more argument, a 5754 relocatable symbol reference. The size of the value to store 5755 depends on target word size. A 32-bit target uses 4-byte values, a 5756 64-bit target uses 8-byte values. 5757 5758 When not generating XCOFF output, the arguments are the same, but 5759 the first argument is simply ignored. */ 5760 5761 static void 5762 ppc_tc (int ignore ATTRIBUTE_UNUSED) 5763 { 5764 #ifdef OBJ_XCOFF 5765 5766 /* Define the TOC symbol name. */ 5767 { 5768 char *name; 5769 char endc; 5770 symbolS *sym; 5771 5772 if (ppc_toc_csect == (symbolS *) NULL 5773 || ppc_toc_csect != ppc_current_csect) 5774 { 5775 as_bad (_(".tc not in .toc section")); 5776 ignore_rest_of_line (); 5777 return; 5778 } 5779 5780 endc = get_symbol_name (&name); 5781 5782 sym = symbol_find_or_make (name); 5783 5784 (void) restore_line_pointer (endc); 5785 5786 if (S_IS_DEFINED (sym)) 5787 { 5788 symbolS *label; 5789 5790 label = symbol_get_tc (ppc_current_csect)->within; 5791 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 5792 { 5793 as_bad (_(".tc with no label")); 5794 ignore_rest_of_line (); 5795 return; 5796 } 5797 5798 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 5799 symbol_set_frag (label, symbol_get_frag (sym)); 5800 S_SET_VALUE (label, S_GET_VALUE (sym)); 5801 5802 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 5803 ++input_line_pointer; 5804 5805 return; 5806 } 5807 5808 S_SET_SEGMENT (sym, now_seg); 5809 symbol_set_frag (sym, frag_now); 5810 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5811 5812 /* AIX assembler seems to allow any storage class to be set in .tc. 5813 But for now, only XMC_TC and XMC_TE are supported by us. */ 5814 switch (symbol_get_tc (sym)->symbol_class) 5815 { 5816 case XMC_TC: 5817 case XMC_TE: 5818 break; 5819 5820 default: 5821 as_bad (_(".tc with storage class %d not yet supported"), 5822 symbol_get_tc (sym)->symbol_class); 5823 ignore_rest_of_line (); 5824 return; 5825 } 5826 symbol_get_tc (sym)->output = 1; 5827 5828 ppc_frob_label (sym); 5829 } 5830 5831 #endif /* OBJ_XCOFF */ 5832 #ifdef OBJ_ELF 5833 int align; 5834 5835 /* Skip the TOC symbol name. */ 5836 while (is_part_of_name (*input_line_pointer) 5837 || *input_line_pointer == ' ' 5838 || *input_line_pointer == '[' 5839 || *input_line_pointer == ']' 5840 || *input_line_pointer == '{' 5841 || *input_line_pointer == '}') 5842 ++input_line_pointer; 5843 5844 /* Align to a four/eight byte boundary. */ 5845 align = ppc_obj64 ? 3 : 2; 5846 frag_align (align, 0, 0); 5847 record_alignment (now_seg, align); 5848 #endif /* OBJ_ELF */ 5849 5850 if (*input_line_pointer != ',') 5851 demand_empty_rest_of_line (); 5852 else 5853 { 5854 ++input_line_pointer; 5855 cons (ppc_obj64 ? 8 : 4); 5856 } 5857 } 5858 5859 /* Pseudo-op .machine. */ 5860 5861 static void 5862 ppc_machine (int ignore ATTRIBUTE_UNUSED) 5863 { 5864 char c; 5865 char *cpu_string; 5866 #define MAX_HISTORY 100 5867 static ppc_cpu_t *cpu_history; 5868 static int curr_hist; 5869 5870 SKIP_WHITESPACE (); 5871 5872 c = get_symbol_name (&cpu_string); 5873 cpu_string = xstrdup (cpu_string); 5874 (void) restore_line_pointer (c); 5875 5876 if (cpu_string != NULL) 5877 { 5878 ppc_cpu_t old_cpu = ppc_cpu; 5879 char *p; 5880 5881 for (p = cpu_string; *p != 0; p++) 5882 *p = TOLOWER (*p); 5883 5884 if (strcmp (cpu_string, "push") == 0) 5885 { 5886 if (cpu_history == NULL) 5887 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); 5888 5889 if (curr_hist >= MAX_HISTORY) 5890 as_bad (_(".machine stack overflow")); 5891 else 5892 cpu_history[curr_hist++] = ppc_cpu; 5893 } 5894 else if (strcmp (cpu_string, "pop") == 0) 5895 { 5896 if (curr_hist <= 0) 5897 as_bad (_(".machine stack underflow")); 5898 else 5899 ppc_cpu = cpu_history[--curr_hist]; 5900 } 5901 else 5902 { 5903 ppc_cpu_t new_cpu; 5904 /* Not using the global "sticky" variable here results in 5905 none of the extra functional unit command line options, 5906 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in 5907 force after selecting a new cpu with .machine. 5908 ".machine altivec" and other extra functional unit 5909 options do not count as a new machine, instead they add 5910 to currently selected opcodes. */ 5911 ppc_cpu_t machine_sticky = 0; 5912 /* Unfortunately, some versions of gcc emit a .machine 5913 directive very near the start of the compiler's assembly 5914 output file. This is bad because it overrides user -Wa 5915 cpu selection. Worse, there are versions of gcc that 5916 emit the *wrong* cpu, not even respecting the -mcpu given 5917 to gcc. See gcc pr101393. And to compound the problem, 5918 as of 20220222 gcc doesn't pass the correct cpu option to 5919 gas on the command line. See gcc pr59828. Hack around 5920 this by keeping sticky options for an early .machine. */ 5921 asection *sec; 5922 for (sec = stdoutput->sections; sec != NULL; sec = sec->next) 5923 { 5924 segment_info_type *info = seg_info (sec); 5925 /* Are the frags for this section perturbed from their 5926 initial state? Even .align will count here. */ 5927 if (info != NULL 5928 && (info->frchainP->frch_root != info->frchainP->frch_last 5929 || info->frchainP->frch_root->fr_type != rs_fill 5930 || info->frchainP->frch_root->fr_fix != 0)) 5931 break; 5932 } 5933 new_cpu = ppc_parse_cpu (ppc_cpu, 5934 sec == NULL ? &sticky : &machine_sticky, 5935 cpu_string); 5936 if (new_cpu != 0) 5937 ppc_cpu = new_cpu; 5938 else 5939 as_bad (_("invalid machine `%s'"), cpu_string); 5940 } 5941 5942 if (ppc_cpu != old_cpu) 5943 ppc_setup_opcodes (); 5944 } 5945 5946 demand_empty_rest_of_line (); 5947 } 5948 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5949 5950 #ifdef OBJ_XCOFF 5951 5952 /* XCOFF specific symbol and file handling. */ 5953 5954 /* Canonicalize the symbol name. We use the to force the suffix, if 5955 any, to use square brackets, and to be in upper case. */ 5956 5957 char * 5958 ppc_canonicalize_symbol_name (char *name) 5959 { 5960 char *s; 5961 5962 if (ppc_stab_symbol) 5963 return name; 5964 5965 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5966 ; 5967 if (*s != '\0') 5968 { 5969 char brac; 5970 5971 if (*s == '[') 5972 brac = ']'; 5973 else 5974 { 5975 *s = '['; 5976 brac = '}'; 5977 } 5978 5979 for (s++; *s != '\0' && *s != brac; s++) 5980 *s = TOUPPER (*s); 5981 5982 if (*s == '\0' || s[1] != '\0') 5983 as_bad (_("bad symbol suffix")); 5984 5985 *s = ']'; 5986 } 5987 5988 return name; 5989 } 5990 5991 /* Set the class of a symbol based on the suffix, if any. This is 5992 called whenever a new symbol is created. */ 5993 5994 void 5995 ppc_symbol_new_hook (symbolS *sym) 5996 { 5997 struct ppc_tc_sy *tc; 5998 const char *s; 5999 6000 tc = symbol_get_tc (sym); 6001 tc->next = NULL; 6002 tc->output = 0; 6003 tc->symbol_class = -1; 6004 tc->real_name = NULL; 6005 tc->subseg = 0; 6006 tc->align = 0; 6007 tc->u.size = NULL; 6008 tc->u.dw = NULL; 6009 tc->within = NULL; 6010 6011 if (ppc_stab_symbol) 6012 return; 6013 6014 s = strchr (S_GET_NAME (sym), '['); 6015 if (s == (const char *) NULL) 6016 { 6017 /* There is no suffix. */ 6018 return; 6019 } 6020 6021 ++s; 6022 6023 switch (s[0]) 6024 { 6025 case 'B': 6026 if (strcmp (s, "BS]") == 0) 6027 tc->symbol_class = XMC_BS; 6028 break; 6029 case 'D': 6030 if (strcmp (s, "DB]") == 0) 6031 tc->symbol_class = XMC_DB; 6032 else if (strcmp (s, "DS]") == 0) 6033 tc->symbol_class = XMC_DS; 6034 break; 6035 case 'G': 6036 if (strcmp (s, "GL]") == 0) 6037 tc->symbol_class = XMC_GL; 6038 break; 6039 case 'P': 6040 if (strcmp (s, "PR]") == 0) 6041 tc->symbol_class = XMC_PR; 6042 break; 6043 case 'R': 6044 if (strcmp (s, "RO]") == 0) 6045 tc->symbol_class = XMC_RO; 6046 else if (strcmp (s, "RW]") == 0) 6047 tc->symbol_class = XMC_RW; 6048 break; 6049 case 'S': 6050 if (strcmp (s, "SV]") == 0) 6051 tc->symbol_class = XMC_SV; 6052 break; 6053 case 'T': 6054 if (strcmp (s, "TC]") == 0) 6055 tc->symbol_class = XMC_TC; 6056 else if (strcmp (s, "TI]") == 0) 6057 tc->symbol_class = XMC_TI; 6058 else if (strcmp (s, "TB]") == 0) 6059 tc->symbol_class = XMC_TB; 6060 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 6061 tc->symbol_class = XMC_TC0; 6062 else if (strcmp (s, "TE]") == 0) 6063 tc->symbol_class = XMC_TE; 6064 else if (strcmp (s, "TL]") == 0) 6065 tc->symbol_class = XMC_TL; 6066 break; 6067 case 'U': 6068 if (strcmp (s, "UA]") == 0) 6069 tc->symbol_class = XMC_UA; 6070 else if (strcmp (s, "UC]") == 0) 6071 tc->symbol_class = XMC_UC; 6072 else if (strcmp (s, "UL]") == 0) 6073 tc->symbol_class = XMC_UL; 6074 break; 6075 case 'X': 6076 if (strcmp (s, "XO]") == 0) 6077 tc->symbol_class = XMC_XO; 6078 break; 6079 } 6080 6081 if (tc->symbol_class == -1) 6082 as_bad (_("unrecognized symbol suffix")); 6083 } 6084 6085 /* This variable is set by ppc_frob_symbol if any absolute symbols are 6086 seen. It tells ppc_adjust_symtab whether it needs to look through 6087 the symbols. */ 6088 6089 static bool ppc_saw_abs; 6090 6091 /* Change the name of a symbol just before writing it out. Set the 6092 real name if the .rename pseudo-op was used. Otherwise, remove any 6093 class suffix. Return 1 if the symbol should not be included in the 6094 symbol table. */ 6095 6096 int 6097 ppc_frob_symbol (symbolS *sym) 6098 { 6099 static symbolS *ppc_last_function; 6100 static symbolS *set_end; 6101 6102 /* Discard symbols that should not be included in the output symbol 6103 table. */ 6104 if (! symbol_used_in_reloc_p (sym) 6105 && S_GET_STORAGE_CLASS (sym) != C_DWARF 6106 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 6107 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6108 && ! symbol_get_tc (sym)->output 6109 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 6110 return 1; 6111 6112 /* This one will disappear anyway. Don't make a csect sym for it. */ 6113 if (sym == abs_section_sym) 6114 return 1; 6115 6116 if (symbol_get_tc (sym)->real_name != (char *) NULL) 6117 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 6118 else 6119 { 6120 const char *name; 6121 const char *s; 6122 6123 name = S_GET_NAME (sym); 6124 s = strchr (name, '['); 6125 if (s != (char *) NULL) 6126 { 6127 unsigned int len; 6128 char *snew; 6129 6130 len = s - name; 6131 snew = xstrndup (name, len); 6132 6133 S_SET_NAME (sym, snew); 6134 } 6135 } 6136 6137 if (set_end != (symbolS *) NULL) 6138 { 6139 SA_SET_SYM_ENDNDX (set_end, sym); 6140 set_end = NULL; 6141 } 6142 6143 if (SF_GET_FUNCTION (sym)) 6144 { 6145 /* Make sure coff_last_function is reset. Otherwise, we won't create 6146 the auxent for the next function. */ 6147 coff_last_function = 0; 6148 ppc_last_function = sym; 6149 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 6150 { 6151 resolve_symbol_value (symbol_get_tc (sym)->u.size); 6152 SA_SET_SYM_FSIZE (sym, 6153 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 6154 } 6155 else 6156 { 6157 /* Size of containing csect. */ 6158 symbolS* within = symbol_get_tc (sym)->within; 6159 coff_symbol_type *csect = coffsymbol (symbol_get_bfdsym (within)); 6160 combined_entry_type *csectaux 6161 = &csect->native[S_GET_NUMBER_AUXILIARY(within)]; 6162 6163 SA_SET_SYM_FSIZE (sym, csectaux->u.auxent.x_csect.x_scnlen.u64); 6164 } 6165 } 6166 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 6167 && strcmp (S_GET_NAME (sym), ".ef") == 0) 6168 { 6169 if (ppc_last_function == (symbolS *) NULL) 6170 as_bad (_(".ef with no preceding .function")); 6171 else 6172 { 6173 set_end = ppc_last_function; 6174 ppc_last_function = NULL; 6175 6176 /* We don't have a C_EFCN symbol, but we need to force the 6177 COFF backend to believe that it has seen one. */ 6178 coff_last_function = NULL; 6179 } 6180 } 6181 6182 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6183 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 6184 && S_GET_STORAGE_CLASS (sym) != C_FILE 6185 && S_GET_STORAGE_CLASS (sym) != C_FCN 6186 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 6187 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 6188 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 6189 && S_GET_STORAGE_CLASS (sym) != C_BINCL 6190 && S_GET_STORAGE_CLASS (sym) != C_EINCL 6191 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 6192 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 6193 6194 if (S_GET_STORAGE_CLASS (sym) == C_EXT 6195 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 6196 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 6197 { 6198 int i; 6199 combined_entry_type *a; 6200 6201 /* Create a csect aux. */ 6202 i = S_GET_NUMBER_AUXILIARY (sym); 6203 S_SET_NUMBER_AUXILIARY (sym, i + 1); 6204 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1]; 6205 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 6206 { 6207 /* This is the TOC table. */ 6208 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 6209 a->u.auxent.x_csect.x_scnlen.u64 = 0; 6210 a->u.auxent.x_csect.x_smtyp = (2 << 3) | XTY_SD; 6211 } 6212 else if (symbol_get_tc (sym)->subseg != 0) 6213 { 6214 /* This is a csect symbol. x_scnlen is the size of the 6215 csect. */ 6216 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 6217 a->u.auxent.x_csect.x_scnlen.u64 6218 = bfd_section_size (S_GET_SEGMENT (sym)) - S_GET_VALUE (sym); 6219 else 6220 { 6221 resolve_symbol_value (symbol_get_tc (sym)->next); 6222 a->u.auxent.x_csect.x_scnlen.u64 6223 = S_GET_VALUE (symbol_get_tc (sym)->next) - S_GET_VALUE (sym); 6224 } 6225 if (symbol_get_tc (sym)->symbol_class == XMC_BS 6226 || symbol_get_tc (sym)->symbol_class == XMC_UL) 6227 a->u.auxent.x_csect.x_smtyp 6228 = (symbol_get_tc (sym)->align << 3) | XTY_CM; 6229 else 6230 a->u.auxent.x_csect.x_smtyp 6231 = (symbol_get_tc (sym)->align << 3) | XTY_SD; 6232 } 6233 else if (S_GET_SEGMENT (sym) == bss_section 6234 || S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) 6235 { 6236 /* This is a common symbol. */ 6237 a->u.auxent.x_csect.x_scnlen.u64 = symbol_get_frag (sym)->fr_offset; 6238 a->u.auxent.x_csect.x_smtyp 6239 = (symbol_get_tc (sym)->align << 3) | XTY_CM; 6240 if (S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) 6241 symbol_get_tc (sym)->symbol_class = XMC_UL; 6242 else if (S_IS_EXTERNAL (sym)) 6243 symbol_get_tc (sym)->symbol_class = XMC_RW; 6244 else 6245 symbol_get_tc (sym)->symbol_class = XMC_BS; 6246 } 6247 else if (S_GET_SEGMENT (sym) == absolute_section) 6248 { 6249 /* This is an absolute symbol. The csect will be created by 6250 ppc_adjust_symtab. */ 6251 ppc_saw_abs = true; 6252 a->u.auxent.x_csect.x_smtyp = XTY_LD; 6253 if (symbol_get_tc (sym)->symbol_class == -1) 6254 symbol_get_tc (sym)->symbol_class = XMC_XO; 6255 } 6256 else if (! S_IS_DEFINED (sym)) 6257 { 6258 /* This is an external symbol. */ 6259 a->u.auxent.x_csect.x_scnlen.u64 = 0; 6260 a->u.auxent.x_csect.x_smtyp = XTY_ER; 6261 } 6262 else if (ppc_is_toc_sym (sym)) 6263 { 6264 symbolS *next; 6265 6266 /* This is a TOC definition. x_scnlen is the size of the 6267 TOC entry. */ 6268 next = symbol_next (sym); 6269 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 6270 next = symbol_next (next); 6271 if (next == (symbolS *) NULL 6272 || (!ppc_is_toc_sym (next))) 6273 { 6274 if (ppc_after_toc_frag == (fragS *) NULL) 6275 a->u.auxent.x_csect.x_scnlen.u64 6276 = bfd_section_size (data_section) - S_GET_VALUE (sym); 6277 else 6278 a->u.auxent.x_csect.x_scnlen.u64 6279 = ppc_after_toc_frag->fr_address - S_GET_VALUE (sym); 6280 } 6281 else 6282 { 6283 resolve_symbol_value (next); 6284 a->u.auxent.x_csect.x_scnlen.u64 6285 = S_GET_VALUE (next) - S_GET_VALUE (sym); 6286 } 6287 a->u.auxent.x_csect.x_smtyp = (2 << 3) | XTY_SD; 6288 } 6289 else 6290 { 6291 symbolS *csect; 6292 6293 /* This is a normal symbol definition. x_scnlen is the 6294 symbol index of the containing csect. */ 6295 if (S_GET_SEGMENT (sym) == text_section) 6296 csect = ppc_xcoff_text_section.csects; 6297 else if (S_GET_SEGMENT (sym) == data_section) 6298 csect = ppc_xcoff_data_section.csects; 6299 else if (S_GET_SEGMENT (sym) == ppc_xcoff_tdata_section.segment) 6300 csect = ppc_xcoff_tdata_section.csects; 6301 else 6302 abort (); 6303 6304 /* Skip the initial dummy symbol. */ 6305 csect = symbol_get_tc (csect)->next; 6306 6307 if (csect == (symbolS *) NULL) 6308 { 6309 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 6310 a->u.auxent.x_csect.x_scnlen.u64 = 0; 6311 } 6312 else 6313 { 6314 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 6315 { 6316 resolve_symbol_value (symbol_get_tc (csect)->next); 6317 if (S_GET_VALUE (symbol_get_tc (csect)->next) 6318 > S_GET_VALUE (sym)) 6319 break; 6320 csect = symbol_get_tc (csect)->next; 6321 } 6322 6323 a->u.auxent.x_csect.x_scnlen.p 6324 = coffsymbol (symbol_get_bfdsym (csect))->native; 6325 a->fix_scnlen = 1; 6326 } 6327 a->u.auxent.x_csect.x_smtyp = XTY_LD; 6328 } 6329 6330 a->u.auxent.x_csect.x_parmhash = 0; 6331 a->u.auxent.x_csect.x_snhash = 0; 6332 if (symbol_get_tc (sym)->symbol_class == -1) 6333 a->u.auxent.x_csect.x_smclas = XMC_PR; 6334 else 6335 a->u.auxent.x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 6336 a->u.auxent.x_csect.x_stab = 0; 6337 a->u.auxent.x_csect.x_snstab = 0; 6338 6339 /* Don't let the COFF backend resort these symbols. */ 6340 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 6341 } 6342 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 6343 { 6344 /* We want the value to be the symbol index of the referenced 6345 csect symbol. BFD will do that for us if we set the right 6346 flags. */ 6347 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 6348 combined_entry_type *c = coffsymbol (bsym)->native; 6349 6350 S_SET_VALUE (sym, (valueT) (size_t) c); 6351 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 6352 } 6353 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 6354 { 6355 symbolS *block; 6356 valueT base; 6357 6358 block = symbol_get_tc (sym)->within; 6359 if (block) 6360 { 6361 /* The value is the offset from the enclosing csect. */ 6362 symbolS *csect; 6363 6364 csect = symbol_get_tc (block)->within; 6365 resolve_symbol_value (csect); 6366 base = S_GET_VALUE (csect); 6367 } 6368 else 6369 base = 0; 6370 6371 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 6372 } 6373 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 6374 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 6375 { 6376 /* We want the value to be a file offset into the line numbers. 6377 BFD will do that for us if we set the right flags. We have 6378 already set the value correctly. */ 6379 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6380 } 6381 6382 return 0; 6383 } 6384 6385 /* Adjust the symbol table. */ 6386 6387 void 6388 ppc_adjust_symtab (void) 6389 { 6390 symbolS *sym; 6391 symbolS *anchorSym; 6392 6393 /* Make sure C_DWARF symbols come right after C_FILE. 6394 As the C_FILE might not be defined yet and as C_DWARF 6395 might already be ordered, we insert them before the 6396 first symbol which isn't a C_FILE or a C_DWARF. */ 6397 for (anchorSym = symbol_rootP; anchorSym != NULL; 6398 anchorSym = symbol_next (anchorSym)) 6399 { 6400 if (S_GET_STORAGE_CLASS (anchorSym) != C_FILE 6401 && S_GET_STORAGE_CLASS (anchorSym) != C_DWARF) 6402 break; 6403 } 6404 6405 sym = anchorSym; 6406 while (sym != NULL) 6407 { 6408 if (S_GET_STORAGE_CLASS (sym) != C_DWARF) 6409 { 6410 sym = symbol_next (sym); 6411 continue; 6412 } 6413 6414 symbolS* tsym = sym; 6415 sym = symbol_next (sym); 6416 6417 symbol_remove (tsym, &symbol_rootP, &symbol_lastP); 6418 symbol_insert (tsym, anchorSym, &symbol_rootP, &symbol_lastP); 6419 } 6420 6421 /* Create csect symbols for all absolute symbols. */ 6422 6423 if (! ppc_saw_abs) 6424 return; 6425 6426 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6427 { 6428 symbolS *csect; 6429 int i; 6430 combined_entry_type *a; 6431 6432 if (S_GET_SEGMENT (sym) != absolute_section) 6433 continue; 6434 6435 csect = symbol_create (".abs[XO]", absolute_section, 6436 &zero_address_frag, S_GET_VALUE (sym)); 6437 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6438 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6439 i = S_GET_NUMBER_AUXILIARY (csect); 6440 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6441 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1]; 6442 a->u.auxent.x_csect.x_scnlen.u64 = 0; 6443 a->u.auxent.x_csect.x_smtyp = XTY_SD; 6444 a->u.auxent.x_csect.x_parmhash = 0; 6445 a->u.auxent.x_csect.x_snhash = 0; 6446 a->u.auxent.x_csect.x_smclas = XMC_XO; 6447 a->u.auxent.x_csect.x_stab = 0; 6448 a->u.auxent.x_csect.x_snstab = 0; 6449 6450 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6451 6452 i = S_GET_NUMBER_AUXILIARY (sym); 6453 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i]; 6454 a->u.auxent.x_csect.x_scnlen.p 6455 = coffsymbol (symbol_get_bfdsym (csect))->native; 6456 a->fix_scnlen = 1; 6457 } 6458 6459 ppc_saw_abs = false; 6460 } 6461 6462 /* Set the VMA for a section. This is called on all the sections in 6463 turn. */ 6464 6465 void 6466 ppc_frob_section (asection *sec) 6467 { 6468 static bfd_vma vma = 0; 6469 6470 /* Dwarf sections start at 0. */ 6471 if (bfd_section_flags (sec) & SEC_DEBUGGING) 6472 return; 6473 6474 vma = md_section_align (sec, vma); 6475 bfd_set_section_vma (sec, vma); 6476 vma += bfd_section_size (sec); 6477 } 6478 6479 #endif /* OBJ_XCOFF */ 6480 6481 const char * 6482 md_atof (int type, char *litp, int *sizep) 6483 { 6484 return ieee_md_atof (type, litp, sizep, target_big_endian); 6485 } 6486 6487 /* Write a value out to the object file, using the appropriate 6488 endianness. */ 6489 6490 void 6491 md_number_to_chars (char *buf, valueT val, int n) 6492 { 6493 if (target_big_endian) 6494 number_to_chars_bigendian (buf, val, n); 6495 else 6496 number_to_chars_littleendian (buf, val, n); 6497 } 6498 6499 /* Align a section (I don't know why this is machine dependent). */ 6500 6501 valueT 6502 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6503 { 6504 #ifdef OBJ_ELF 6505 return addr; 6506 #else 6507 int align = bfd_section_alignment (seg); 6508 6509 return ((addr + (1 << align) - 1) & -(1 << align)); 6510 #endif 6511 } 6512 6513 /* We don't have any form of relaxing. */ 6514 6515 int 6516 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6517 asection *seg ATTRIBUTE_UNUSED) 6518 { 6519 abort (); 6520 return 0; 6521 } 6522 6523 /* Convert a machine dependent frag. We never generate these. */ 6524 6525 void 6526 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6527 asection *sec ATTRIBUTE_UNUSED, 6528 fragS *fragp ATTRIBUTE_UNUSED) 6529 { 6530 abort (); 6531 } 6532 6533 /* We have no need to default values of symbols. */ 6534 6535 symbolS * 6536 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6537 { 6538 return 0; 6539 } 6540 6541 /* Functions concerning relocs. */ 6542 6543 /* The location from which a PC relative jump should be calculated, 6544 given a PC relative reloc. */ 6545 6546 long 6547 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6548 { 6549 return fixp->fx_frag->fr_address + fixp->fx_where; 6550 } 6551 6552 #ifdef OBJ_XCOFF 6553 6554 /* Return the surrending csect for sym when possible. */ 6555 6556 static symbolS* 6557 ppc_get_csect_to_adjust (symbolS *sym) 6558 { 6559 if (sym == NULL) 6560 return NULL; 6561 6562 valueT val = resolve_symbol_value (sym); 6563 TC_SYMFIELD_TYPE *tc = symbol_get_tc (sym); 6564 segT symseg = S_GET_SEGMENT (sym); 6565 6566 if (tc->subseg == 0 6567 && tc->symbol_class != XMC_TC0 6568 && tc->symbol_class != XMC_TC 6569 && tc->symbol_class != XMC_TE 6570 && symseg != bss_section 6571 && symseg != ppc_xcoff_tbss_section.segment 6572 /* Don't adjust if this is a reloc in the toc section. */ 6573 && (symseg != data_section 6574 || ppc_toc_csect == NULL 6575 || val < ppc_toc_frag->fr_address 6576 || (ppc_after_toc_frag != NULL 6577 && val >= ppc_after_toc_frag->fr_address))) 6578 { 6579 symbolS* csect = tc->within; 6580 6581 /* If the symbol was not declared by a label (eg: a section symbol), 6582 use the section instead of the csect. This doesn't happen in 6583 normal AIX assembly code. */ 6584 if (csect == NULL) 6585 csect = seg_info (symseg)->sym; 6586 6587 return csect; 6588 } 6589 6590 return NULL; 6591 } 6592 6593 /* This is called to see whether a fixup should be adjusted to use a 6594 section symbol. We take the opportunity to change a fixup against 6595 a symbol in the TOC subsegment into a reloc against the 6596 corresponding .tc symbol. */ 6597 6598 int 6599 ppc_fix_adjustable (fixS *fix) 6600 { 6601 valueT val = resolve_symbol_value (fix->fx_addsy); 6602 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6603 symbolS* csect; 6604 6605 if (symseg == absolute_section) 6606 return 0; 6607 6608 /* Always adjust symbols in debugging sections. */ 6609 if (bfd_section_flags (symseg) & SEC_DEBUGGING) 6610 return 1; 6611 6612 if (ppc_toc_csect != (symbolS *) NULL 6613 && fix->fx_addsy != ppc_toc_csect 6614 && symseg == data_section 6615 && val >= ppc_toc_frag->fr_address 6616 && (ppc_after_toc_frag == (fragS *) NULL 6617 || val < ppc_after_toc_frag->fr_address)) 6618 { 6619 symbolS *sy; 6620 6621 for (sy = symbol_next (ppc_toc_csect); 6622 sy != (symbolS *) NULL; 6623 sy = symbol_next (sy)) 6624 { 6625 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6626 6627 if (sy_tc->symbol_class == XMC_TC0) 6628 continue; 6629 if (sy_tc->symbol_class != XMC_TC 6630 && sy_tc->symbol_class != XMC_TE) 6631 break; 6632 if (val == resolve_symbol_value (sy)) 6633 { 6634 fix->fx_addsy = sy; 6635 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6636 return 0; 6637 } 6638 } 6639 6640 as_bad_where (fix->fx_file, fix->fx_line, 6641 _("symbol in .toc does not match any .tc")); 6642 } 6643 6644 /* Possibly adjust the reloc to be against the csect. */ 6645 if ((csect = ppc_get_csect_to_adjust (fix->fx_addsy)) != NULL) 6646 { 6647 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6648 fix->fx_addsy = csect; 6649 } 6650 6651 if ((csect = ppc_get_csect_to_adjust (fix->fx_subsy)) != NULL) 6652 { 6653 fix->fx_offset -= resolve_symbol_value (fix->fx_subsy) 6654 - symbol_get_frag (csect)->fr_address; 6655 fix->fx_subsy = csect; 6656 } 6657 6658 /* Adjust a reloc against a .lcomm symbol to be against the base 6659 .lcomm. */ 6660 if (symseg == bss_section 6661 && ! S_IS_EXTERNAL (fix->fx_addsy) 6662 && symbol_get_tc (fix->fx_addsy)->subseg == 0) 6663 { 6664 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6665 6666 fix->fx_offset += val - resolve_symbol_value (sy); 6667 fix->fx_addsy = sy; 6668 } 6669 6670 return 0; 6671 } 6672 6673 /* A reloc from one csect to another must be kept. The assembler 6674 will, of course, keep relocs between sections, and it will keep 6675 absolute relocs, but we need to force it to keep PC relative relocs 6676 between two csects in the same section. */ 6677 6678 int 6679 ppc_force_relocation (fixS *fix) 6680 { 6681 /* At this point fix->fx_addsy should already have been converted to 6682 a csect symbol. If the csect does not include the fragment, then 6683 we need to force the relocation. */ 6684 if (fix->fx_pcrel 6685 && fix->fx_addsy != NULL 6686 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6687 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6688 > fix->fx_frag->fr_address) 6689 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6690 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6691 <= fix->fx_frag->fr_address)))) 6692 return 1; 6693 6694 return generic_force_reloc (fix); 6695 } 6696 #endif /* OBJ_XCOFF */ 6697 6698 #ifdef OBJ_ELF 6699 /* If this function returns non-zero, it guarantees that a relocation 6700 will be emitted for a fixup. */ 6701 6702 int 6703 ppc_force_relocation (fixS *fix) 6704 { 6705 switch (fix->fx_r_type) 6706 { 6707 case BFD_RELOC_PPC_B16_BRTAKEN: 6708 case BFD_RELOC_PPC_B16_BRNTAKEN: 6709 case BFD_RELOC_PPC_BA16_BRTAKEN: 6710 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6711 case BFD_RELOC_24_PLT_PCREL: 6712 case BFD_RELOC_PPC64_TOC: 6713 case BFD_RELOC_16_GOTOFF: 6714 case BFD_RELOC_LO16_GOTOFF: 6715 case BFD_RELOC_HI16_GOTOFF: 6716 case BFD_RELOC_HI16_S_GOTOFF: 6717 case BFD_RELOC_LO16_PLTOFF: 6718 case BFD_RELOC_HI16_PLTOFF: 6719 case BFD_RELOC_HI16_S_PLTOFF: 6720 case BFD_RELOC_GPREL16: 6721 case BFD_RELOC_16_BASEREL: 6722 case BFD_RELOC_LO16_BASEREL: 6723 case BFD_RELOC_HI16_BASEREL: 6724 case BFD_RELOC_HI16_S_BASEREL: 6725 case BFD_RELOC_PPC_TOC16: 6726 case BFD_RELOC_PPC64_TOC16_LO: 6727 case BFD_RELOC_PPC64_TOC16_HI: 6728 case BFD_RELOC_PPC64_TOC16_HA: 6729 case BFD_RELOC_PPC64_PLTGOT16: 6730 case BFD_RELOC_PPC64_PLTGOT16_LO: 6731 case BFD_RELOC_PPC64_PLTGOT16_HI: 6732 case BFD_RELOC_PPC64_PLTGOT16_HA: 6733 case BFD_RELOC_PPC64_GOT16_DS: 6734 case BFD_RELOC_PPC64_GOT16_LO_DS: 6735 case BFD_RELOC_PPC64_PLT16_LO_DS: 6736 case BFD_RELOC_PPC64_SECTOFF_DS: 6737 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 6738 case BFD_RELOC_PPC64_TOC16_DS: 6739 case BFD_RELOC_PPC64_TOC16_LO_DS: 6740 case BFD_RELOC_PPC64_PLTGOT16_DS: 6741 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 6742 case BFD_RELOC_PPC_EMB_NADDR16: 6743 case BFD_RELOC_PPC_EMB_NADDR16_LO: 6744 case BFD_RELOC_PPC_EMB_NADDR16_HI: 6745 case BFD_RELOC_PPC_EMB_NADDR16_HA: 6746 case BFD_RELOC_PPC_EMB_SDAI16: 6747 case BFD_RELOC_PPC_EMB_SDA2I16: 6748 case BFD_RELOC_PPC_EMB_SDA2REL: 6749 case BFD_RELOC_PPC_EMB_SDA21: 6750 case BFD_RELOC_PPC_EMB_MRKREF: 6751 case BFD_RELOC_PPC_EMB_RELSEC16: 6752 case BFD_RELOC_PPC_EMB_RELST_LO: 6753 case BFD_RELOC_PPC_EMB_RELST_HI: 6754 case BFD_RELOC_PPC_EMB_RELST_HA: 6755 case BFD_RELOC_PPC_EMB_BIT_FLD: 6756 case BFD_RELOC_PPC_EMB_RELSDA: 6757 case BFD_RELOC_PPC_VLE_SDA21: 6758 case BFD_RELOC_PPC_VLE_SDA21_LO: 6759 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 6760 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 6761 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 6762 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 6763 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 6764 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 6765 case BFD_RELOC_PPC64_PLT_PCREL34: 6766 case BFD_RELOC_PPC64_GOT_PCREL34: 6767 return 1; 6768 case BFD_RELOC_PPC_B26: 6769 case BFD_RELOC_PPC_BA26: 6770 case BFD_RELOC_PPC_B16: 6771 case BFD_RELOC_PPC_BA16: 6772 case BFD_RELOC_PPC64_REL24_NOTOC: 6773 case BFD_RELOC_PPC64_REL24_P9NOTOC: 6774 /* All branch fixups targeting a localentry symbol must 6775 force a relocation. */ 6776 if (fix->fx_addsy) 6777 { 6778 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6779 elf_symbol_type *elfsym = elf_symbol_from (bfdsym); 6780 gas_assert (elfsym); 6781 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6782 return 1; 6783 } 6784 break; 6785 default: 6786 break; 6787 } 6788 6789 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 6790 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL) 6791 return 1; 6792 6793 return generic_force_reloc (fix); 6794 } 6795 6796 int 6797 ppc_fix_adjustable (fixS *fix) 6798 { 6799 switch (fix->fx_r_type) 6800 { 6801 /* All branch fixups targeting a localentry symbol must 6802 continue using the symbol. */ 6803 case BFD_RELOC_PPC_B26: 6804 case BFD_RELOC_PPC_BA26: 6805 case BFD_RELOC_PPC_B16: 6806 case BFD_RELOC_PPC_BA16: 6807 case BFD_RELOC_PPC_B16_BRTAKEN: 6808 case BFD_RELOC_PPC_B16_BRNTAKEN: 6809 case BFD_RELOC_PPC_BA16_BRTAKEN: 6810 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6811 case BFD_RELOC_PPC64_REL24_NOTOC: 6812 case BFD_RELOC_PPC64_REL24_P9NOTOC: 6813 if (fix->fx_addsy) 6814 { 6815 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6816 elf_symbol_type *elfsym = elf_symbol_from (bfdsym); 6817 gas_assert (elfsym); 6818 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6819 return 0; 6820 } 6821 break; 6822 default: 6823 break; 6824 } 6825 6826 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 6827 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 6828 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 6829 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 6830 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 6831 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 6832 && fix->fx_r_type != BFD_RELOC_PPC64_GOT_PCREL34 6833 && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL 6834 && fix->fx_r_type != BFD_RELOC_32_PLTOFF 6835 && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL 6836 && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF 6837 && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF 6838 && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF 6839 && fix->fx_r_type != BFD_RELOC_64_PLTOFF 6840 && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL 6841 && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS 6842 && fix->fx_r_type != BFD_RELOC_PPC64_PLT_PCREL34 6843 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 6844 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO 6845 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI 6846 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA 6847 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS 6848 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS 6849 && fix->fx_r_type != BFD_RELOC_GPREL16 6850 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A 6851 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A 6852 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A 6853 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 6854 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 6855 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 6856 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL)); 6857 } 6858 #endif 6859 6860 void 6861 ppc_frag_check (struct frag *fragP) 6862 { 6863 if ((fragP->fr_address & fragP->insn_addr) != 0) 6864 as_bad_where (fragP->fr_file, fragP->fr_line, 6865 _("instruction address is not a multiple of %d"), 6866 fragP->insn_addr + 1); 6867 } 6868 6869 /* rs_align_code frag handling. */ 6870 6871 enum ppc_nop_encoding_for_rs_align_code 6872 { 6873 PPC_NOP_VANILLA, 6874 PPC_NOP_VLE, 6875 PPC_NOP_GROUP_P6, 6876 PPC_NOP_GROUP_P7 6877 }; 6878 6879 unsigned int 6880 ppc_nop_select (void) 6881 { 6882 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 6883 return PPC_NOP_VLE; 6884 if ((ppc_cpu & (PPC_OPCODE_POWER9 | PPC_OPCODE_E500MC)) == 0) 6885 { 6886 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) 6887 return PPC_NOP_GROUP_P7; 6888 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) 6889 return PPC_NOP_GROUP_P6; 6890 } 6891 return PPC_NOP_VANILLA; 6892 } 6893 6894 void 6895 ppc_handle_align (struct frag *fragP) 6896 { 6897 valueT count = (fragP->fr_next->fr_address 6898 - (fragP->fr_address + fragP->fr_fix)); 6899 char *dest = fragP->fr_literal + fragP->fr_fix; 6900 enum ppc_nop_encoding_for_rs_align_code nop_select = *dest & 0xff; 6901 6902 /* Pad with zeros if not inserting a whole number of instructions. 6903 We could pad with zeros up to an instruction boundary then follow 6904 with nops but odd counts indicate data in an executable section 6905 so padding with zeros is most appropriate. */ 6906 if (count == 0 6907 || (nop_select == PPC_NOP_VLE ? (count & 1) != 0 : (count & 3) != 0)) 6908 { 6909 *dest = 0; 6910 return; 6911 } 6912 6913 if (nop_select == PPC_NOP_VLE) 6914 { 6915 6916 fragP->fr_var = 2; 6917 md_number_to_chars (dest, 0x4400, 2); 6918 } 6919 else 6920 { 6921 fragP->fr_var = 4; 6922 6923 if (count > 4 * nop_limit && count < 0x2000000) 6924 { 6925 struct frag *rest; 6926 6927 /* Make a branch, then follow with nops. Insert another 6928 frag to handle the nops. */ 6929 md_number_to_chars (dest, 0x48000000 + count, 4); 6930 count -= 4; 6931 if (count == 0) 6932 return; 6933 6934 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6935 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 6936 fragP->fr_next = rest; 6937 fragP = rest; 6938 rest->fr_address += rest->fr_fix + 4; 6939 rest->fr_fix = 0; 6940 /* If we leave the next frag as rs_align_code we'll come here 6941 again, resulting in a bunch of branches rather than a 6942 branch followed by nops. */ 6943 rest->fr_type = rs_align; 6944 dest = rest->fr_literal; 6945 } 6946 6947 md_number_to_chars (dest, 0x60000000, 4); 6948 6949 if (nop_select >= PPC_NOP_GROUP_P6) 6950 { 6951 /* For power6, power7, and power8, we want the last nop to 6952 be a group terminating one. Do this by inserting an 6953 rs_fill frag immediately after this one, with its address 6954 set to the last nop location. This will automatically 6955 reduce the number of nops in the current frag by one. */ 6956 if (count > 4) 6957 { 6958 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6959 6960 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 6961 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 6962 group_nop->fr_fix = 0; 6963 group_nop->fr_offset = 1; 6964 group_nop->fr_type = rs_fill; 6965 fragP->fr_next = group_nop; 6966 dest = group_nop->fr_literal; 6967 } 6968 6969 if (nop_select == PPC_NOP_GROUP_P6) 6970 /* power6 group terminating nop: "ori 1,1,0". */ 6971 md_number_to_chars (dest, 0x60210000, 4); 6972 else 6973 /* power7/power8 group terminating nop: "ori 2,2,0". */ 6974 md_number_to_chars (dest, 0x60420000, 4); 6975 } 6976 } 6977 } 6978 6979 /* Apply a fixup to the object code. This is called for all the 6980 fixups we generated by the calls to fix_new_exp, above. */ 6981 6982 void 6983 md_apply_fix (fixS *fixP, valueT *valP, segT seg) 6984 { 6985 valueT value = * valP; 6986 offsetT fieldval; 6987 const struct powerpc_operand *operand; 6988 6989 #ifdef OBJ_ELF 6990 if (fixP->fx_addsy != NULL) 6991 { 6992 /* Hack around bfd_install_relocation brain damage. */ 6993 if (fixP->fx_pcrel) 6994 value += fixP->fx_frag->fr_address + fixP->fx_where; 6995 6996 if (fixP->fx_addsy == abs_section_sym) 6997 fixP->fx_done = 1; 6998 } 6999 else 7000 fixP->fx_done = 1; 7001 #else 7002 /* FIXME FIXME FIXME: The value we are passed in *valP includes 7003 the symbol values. If we are doing this relocation the code in 7004 write.c is going to call bfd_install_relocation, which is also 7005 going to use the symbol value. That means that if the reloc is 7006 fully resolved we want to use *valP since bfd_install_relocation is 7007 not being used. 7008 However, if the reloc is not fully resolved we do not want to 7009 use *valP, and must use fx_offset instead. If the relocation 7010 is PC-relative, we then need to re-apply md_pcrel_from_section 7011 to this new relocation value. */ 7012 if (fixP->fx_addsy == (symbolS *) NULL) 7013 fixP->fx_done = 1; 7014 7015 else 7016 { 7017 value = fixP->fx_offset; 7018 if (fixP->fx_pcrel) 7019 value -= md_pcrel_from_section (fixP, seg); 7020 } 7021 #endif 7022 7023 /* We are only able to convert some relocs to pc-relative. */ 7024 if (fixP->fx_pcrel) 7025 { 7026 switch (fixP->fx_r_type) 7027 { 7028 case BFD_RELOC_64: 7029 fixP->fx_r_type = BFD_RELOC_64_PCREL; 7030 break; 7031 7032 case BFD_RELOC_32: 7033 fixP->fx_r_type = BFD_RELOC_32_PCREL; 7034 break; 7035 7036 case BFD_RELOC_16: 7037 fixP->fx_r_type = BFD_RELOC_16_PCREL; 7038 break; 7039 7040 case BFD_RELOC_LO16: 7041 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 7042 break; 7043 7044 case BFD_RELOC_HI16: 7045 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 7046 break; 7047 7048 case BFD_RELOC_HI16_S: 7049 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 7050 break; 7051 7052 case BFD_RELOC_PPC64_ADDR16_HIGH: 7053 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGH; 7054 break; 7055 7056 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7057 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHA; 7058 break; 7059 7060 case BFD_RELOC_PPC64_HIGHER: 7061 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER; 7062 break; 7063 7064 case BFD_RELOC_PPC64_HIGHER_S: 7065 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA; 7066 break; 7067 7068 case BFD_RELOC_PPC64_HIGHEST: 7069 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST; 7070 break; 7071 7072 case BFD_RELOC_PPC64_HIGHEST_S: 7073 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA; 7074 break; 7075 7076 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 7077 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER34; 7078 break; 7079 7080 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 7081 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA34; 7082 break; 7083 7084 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 7085 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST34; 7086 break; 7087 7088 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 7089 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA34; 7090 break; 7091 7092 case BFD_RELOC_PPC_16DX_HA: 7093 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7094 break; 7095 7096 case BFD_RELOC_PPC64_D34: 7097 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL34; 7098 break; 7099 7100 case BFD_RELOC_PPC64_D28: 7101 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL28; 7102 break; 7103 7104 default: 7105 break; 7106 } 7107 } 7108 else if (!fixP->fx_done 7109 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA) 7110 { 7111 /* addpcis is relative to next insn address. */ 7112 value -= 4; 7113 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7114 fixP->fx_pcrel = 1; 7115 } 7116 7117 operand = NULL; 7118 if (fixP->fx_pcrel_adjust != 0) 7119 { 7120 /* This is a fixup on an instruction. */ 7121 ppc_opindex_t opindex = fixP->fx_pcrel_adjust & PPC_OPINDEX_MAX; 7122 7123 operand = &powerpc_operands[opindex]; 7124 #ifdef OBJ_XCOFF 7125 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 7126 does not generate a reloc. It uses the offset of `sym' within its 7127 csect. Other usages, such as `.long sym', generate relocs. This 7128 is the documented behaviour of non-TOC symbols. */ 7129 if ((operand->flags & PPC_OPERAND_PARENS) != 0 7130 && (operand->bitm & 0xfff0) == 0xfff0 7131 && operand->shift == 0 7132 && (operand->insert == NULL || ppc_obj64) 7133 && fixP->fx_addsy != NULL 7134 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 7135 && !ppc_is_toc_sym (fixP->fx_addsy) 7136 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 7137 { 7138 value = fixP->fx_offset; 7139 fixP->fx_done = 1; 7140 } 7141 7142 /* During parsing of instructions, a TOC16 reloc is generated for 7143 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 7144 in the toc. But at parse time, SYM may be not yet defined, so 7145 check again here. */ 7146 if (fixP->fx_r_type == BFD_RELOC_16 7147 && fixP->fx_addsy != NULL 7148 && ppc_is_toc_sym (fixP->fx_addsy)) 7149 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 7150 #endif 7151 } 7152 7153 /* Calculate value to be stored in field. */ 7154 fieldval = value; 7155 switch (fixP->fx_r_type) 7156 { 7157 #ifdef OBJ_ELF 7158 case BFD_RELOC_PPC64_ADDR16_LO_DS: 7159 case BFD_RELOC_PPC_VLE_LO16A: 7160 case BFD_RELOC_PPC_VLE_LO16D: 7161 #endif 7162 case BFD_RELOC_LO16: 7163 case BFD_RELOC_LO16_PCREL: 7164 fieldval = value & 0xffff; 7165 sign_extend_16: 7166 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7167 fieldval = SEX16 (fieldval); 7168 fixP->fx_no_overflow = 1; 7169 break; 7170 7171 case BFD_RELOC_HI16: 7172 case BFD_RELOC_HI16_PCREL: 7173 #ifdef OBJ_ELF 7174 if (REPORT_OVERFLOW_HI && ppc_obj64) 7175 { 7176 fieldval = value >> 16; 7177 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7178 { 7179 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7180 fieldval = ((valueT) fieldval ^ sign) - sign; 7181 } 7182 break; 7183 } 7184 /* Fallthru */ 7185 7186 case BFD_RELOC_PPC_VLE_HI16A: 7187 case BFD_RELOC_PPC_VLE_HI16D: 7188 case BFD_RELOC_PPC64_ADDR16_HIGH: 7189 #endif 7190 fieldval = PPC_HI (value); 7191 goto sign_extend_16; 7192 7193 case BFD_RELOC_HI16_S: 7194 case BFD_RELOC_HI16_S_PCREL: 7195 case BFD_RELOC_PPC_16DX_HA: 7196 case BFD_RELOC_PPC_REL16DX_HA: 7197 #ifdef OBJ_ELF 7198 if (REPORT_OVERFLOW_HI && ppc_obj64) 7199 { 7200 fieldval = (value + 0x8000) >> 16; 7201 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7202 { 7203 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7204 fieldval = ((valueT) fieldval ^ sign) - sign; 7205 } 7206 break; 7207 } 7208 /* Fallthru */ 7209 7210 case BFD_RELOC_PPC_VLE_HA16A: 7211 case BFD_RELOC_PPC_VLE_HA16D: 7212 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7213 #endif 7214 fieldval = PPC_HA (value); 7215 goto sign_extend_16; 7216 7217 #ifdef OBJ_ELF 7218 case BFD_RELOC_PPC64_HIGHER: 7219 fieldval = PPC_HIGHER (value); 7220 goto sign_extend_16; 7221 7222 case BFD_RELOC_PPC64_HIGHER_S: 7223 fieldval = PPC_HIGHERA (value); 7224 goto sign_extend_16; 7225 7226 case BFD_RELOC_PPC64_HIGHEST: 7227 fieldval = PPC_HIGHEST (value); 7228 goto sign_extend_16; 7229 7230 case BFD_RELOC_PPC64_HIGHEST_S: 7231 fieldval = PPC_HIGHESTA (value); 7232 goto sign_extend_16; 7233 #endif 7234 7235 default: 7236 break; 7237 } 7238 7239 if (operand != NULL) 7240 { 7241 /* Handle relocs in an insn. */ 7242 switch (fixP->fx_r_type) 7243 { 7244 #ifdef OBJ_ELF 7245 /* The following relocs can't be calculated by the assembler. 7246 Leave the field zero. */ 7247 case BFD_RELOC_PPC_TPREL16: 7248 case BFD_RELOC_PPC_TPREL16_LO: 7249 case BFD_RELOC_PPC_TPREL16_HI: 7250 case BFD_RELOC_PPC_TPREL16_HA: 7251 case BFD_RELOC_PPC_DTPREL16: 7252 case BFD_RELOC_PPC_DTPREL16_LO: 7253 case BFD_RELOC_PPC_DTPREL16_HI: 7254 case BFD_RELOC_PPC_DTPREL16_HA: 7255 case BFD_RELOC_PPC_GOT_TLSGD16: 7256 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7257 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7258 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7259 case BFD_RELOC_PPC_GOT_TLSLD16: 7260 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7261 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7262 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7263 case BFD_RELOC_PPC_GOT_TPREL16: 7264 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7265 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7266 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7267 case BFD_RELOC_PPC_GOT_DTPREL16: 7268 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7269 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7270 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7271 case BFD_RELOC_PPC64_TPREL16_DS: 7272 case BFD_RELOC_PPC64_TPREL16_LO_DS: 7273 case BFD_RELOC_PPC64_TPREL16_HIGH: 7274 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7275 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7276 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7277 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7278 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7279 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7280 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7281 case BFD_RELOC_PPC64_DTPREL16_DS: 7282 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 7283 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7284 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7285 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7286 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7287 case BFD_RELOC_PPC64_TPREL34: 7288 case BFD_RELOC_PPC64_DTPREL34: 7289 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 7290 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 7291 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 7292 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 7293 gas_assert (fixP->fx_addsy != NULL); 7294 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7295 fieldval = 0; 7296 break; 7297 7298 /* These also should leave the field zero for the same 7299 reason. Note that older versions of gas wrote values 7300 here. If we want to go back to the old behaviour, then 7301 all _LO and _LO_DS cases will need to be treated like 7302 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 7303 case BFD_RELOC_16_GOTOFF: 7304 case BFD_RELOC_LO16_GOTOFF: 7305 case BFD_RELOC_HI16_GOTOFF: 7306 case BFD_RELOC_HI16_S_GOTOFF: 7307 case BFD_RELOC_LO16_PLTOFF: 7308 case BFD_RELOC_HI16_PLTOFF: 7309 case BFD_RELOC_HI16_S_PLTOFF: 7310 case BFD_RELOC_GPREL16: 7311 case BFD_RELOC_16_BASEREL: 7312 case BFD_RELOC_LO16_BASEREL: 7313 case BFD_RELOC_HI16_BASEREL: 7314 case BFD_RELOC_HI16_S_BASEREL: 7315 case BFD_RELOC_PPC_TOC16: 7316 case BFD_RELOC_PPC64_TOC16_LO: 7317 case BFD_RELOC_PPC64_TOC16_HI: 7318 case BFD_RELOC_PPC64_TOC16_HA: 7319 case BFD_RELOC_PPC64_PLTGOT16: 7320 case BFD_RELOC_PPC64_PLTGOT16_LO: 7321 case BFD_RELOC_PPC64_PLTGOT16_HI: 7322 case BFD_RELOC_PPC64_PLTGOT16_HA: 7323 case BFD_RELOC_PPC64_GOT16_DS: 7324 case BFD_RELOC_PPC64_GOT16_LO_DS: 7325 case BFD_RELOC_PPC64_PLT16_LO_DS: 7326 case BFD_RELOC_PPC64_SECTOFF_DS: 7327 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 7328 case BFD_RELOC_PPC64_TOC16_DS: 7329 case BFD_RELOC_PPC64_TOC16_LO_DS: 7330 case BFD_RELOC_PPC64_PLTGOT16_DS: 7331 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 7332 case BFD_RELOC_PPC_EMB_NADDR16: 7333 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7334 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7335 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7336 case BFD_RELOC_PPC_EMB_SDAI16: 7337 case BFD_RELOC_PPC_EMB_SDA2I16: 7338 case BFD_RELOC_PPC_EMB_SDA2REL: 7339 case BFD_RELOC_PPC_EMB_SDA21: 7340 case BFD_RELOC_PPC_EMB_MRKREF: 7341 case BFD_RELOC_PPC_EMB_RELSEC16: 7342 case BFD_RELOC_PPC_EMB_RELST_LO: 7343 case BFD_RELOC_PPC_EMB_RELST_HI: 7344 case BFD_RELOC_PPC_EMB_RELST_HA: 7345 case BFD_RELOC_PPC_EMB_BIT_FLD: 7346 case BFD_RELOC_PPC_EMB_RELSDA: 7347 case BFD_RELOC_PPC_VLE_SDA21: 7348 case BFD_RELOC_PPC_VLE_SDA21_LO: 7349 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7350 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 7351 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7352 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 7353 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7354 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 7355 case BFD_RELOC_PPC64_GOT_PCREL34: 7356 case BFD_RELOC_PPC64_PLT_PCREL34: 7357 gas_assert (fixP->fx_addsy != NULL); 7358 /* Fallthru */ 7359 7360 case BFD_RELOC_PPC_TLS: 7361 case BFD_RELOC_PPC_TLSGD: 7362 case BFD_RELOC_PPC_TLSLD: 7363 case BFD_RELOC_PPC64_TLS_PCREL: 7364 fieldval = 0; 7365 break; 7366 #endif 7367 7368 #ifdef OBJ_XCOFF 7369 case BFD_RELOC_PPC_B16: 7370 /* Adjust the offset to the instruction boundary. */ 7371 fieldval += 2; 7372 break; 7373 #endif 7374 7375 case BFD_RELOC_VTABLE_INHERIT: 7376 case BFD_RELOC_VTABLE_ENTRY: 7377 case BFD_RELOC_PPC_DTPMOD: 7378 case BFD_RELOC_PPC_TPREL: 7379 case BFD_RELOC_PPC_DTPREL: 7380 case BFD_RELOC_PPC_COPY: 7381 case BFD_RELOC_PPC_GLOB_DAT: 7382 case BFD_RELOC_32_PLT_PCREL: 7383 case BFD_RELOC_PPC_EMB_NADDR32: 7384 case BFD_RELOC_PPC64_TOC: 7385 case BFD_RELOC_CTOR: 7386 case BFD_RELOC_32: 7387 case BFD_RELOC_32_PCREL: 7388 case BFD_RELOC_RVA: 7389 case BFD_RELOC_64: 7390 case BFD_RELOC_64_PCREL: 7391 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7392 as_bad_where (fixP->fx_file, fixP->fx_line, 7393 _("%s unsupported as instruction fixup"), 7394 bfd_get_reloc_code_name (fixP->fx_r_type)); 7395 fixP->fx_done = 1; 7396 return; 7397 7398 default: 7399 break; 7400 } 7401 7402 #ifdef OBJ_ELF 7403 /* powerpc uses RELA style relocs, so if emitting a reloc the field 7404 contents can stay at zero. */ 7405 #define APPLY_RELOC fixP->fx_done 7406 #else 7407 #define APPLY_RELOC 1 7408 #endif 7409 /* We need to call the insert function even when fieldval is 7410 zero if the insert function would translate that zero to a 7411 bit pattern other than all zeros. */ 7412 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 7413 { 7414 uint64_t insn; 7415 unsigned char *where; 7416 7417 /* Fetch the instruction, insert the fully resolved operand 7418 value, and stuff the instruction back again. */ 7419 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 7420 if (target_big_endian) 7421 { 7422 if (fixP->fx_size < 4) 7423 insn = bfd_getb16 (where); 7424 else 7425 { 7426 insn = bfd_getb32 (where); 7427 if (fixP->fx_size > 4) 7428 insn = insn << 32 | bfd_getb32 (where + 4); 7429 } 7430 } 7431 else 7432 { 7433 if (fixP->fx_size < 4) 7434 insn = bfd_getl16 (where); 7435 else 7436 { 7437 insn = bfd_getl32 (where); 7438 if (fixP->fx_size > 4) 7439 insn = insn << 32 | bfd_getl32 (where + 4); 7440 } 7441 } 7442 insn = ppc_insert_operand (insn, operand, fieldval, 7443 fixP->tc_fix_data.ppc_cpu, 7444 fixP->fx_file, fixP->fx_line); 7445 if (target_big_endian) 7446 { 7447 if (fixP->fx_size < 4) 7448 bfd_putb16 (insn, where); 7449 else 7450 { 7451 if (fixP->fx_size > 4) 7452 { 7453 bfd_putb32 (insn, where + 4); 7454 insn >>= 32; 7455 } 7456 bfd_putb32 (insn, where); 7457 } 7458 } 7459 else 7460 { 7461 if (fixP->fx_size < 4) 7462 bfd_putl16 (insn, where); 7463 else 7464 { 7465 if (fixP->fx_size > 4) 7466 { 7467 bfd_putl32 (insn, where + 4); 7468 insn >>= 32; 7469 } 7470 bfd_putl32 (insn, where); 7471 } 7472 } 7473 } 7474 7475 if (fixP->fx_done) 7476 /* Nothing else to do here. */ 7477 return; 7478 7479 gas_assert (fixP->fx_addsy != NULL); 7480 if (fixP->fx_r_type == BFD_RELOC_NONE) 7481 { 7482 const char *sfile; 7483 unsigned int sline; 7484 7485 /* Use expr_symbol_where to see if this is an expression 7486 symbol. */ 7487 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 7488 as_bad_where (fixP->fx_file, fixP->fx_line, 7489 _("unresolved expression that must be resolved")); 7490 else 7491 as_bad_where (fixP->fx_file, fixP->fx_line, 7492 _("unsupported relocation against %s"), 7493 S_GET_NAME (fixP->fx_addsy)); 7494 fixP->fx_done = 1; 7495 return; 7496 } 7497 } 7498 else 7499 { 7500 /* Handle relocs in data. */ 7501 switch (fixP->fx_r_type) 7502 { 7503 case BFD_RELOC_VTABLE_INHERIT: 7504 if (fixP->fx_addsy 7505 && !S_IS_DEFINED (fixP->fx_addsy) 7506 && !S_IS_WEAK (fixP->fx_addsy)) 7507 S_SET_WEAK (fixP->fx_addsy); 7508 /* Fallthru */ 7509 7510 case BFD_RELOC_VTABLE_ENTRY: 7511 fixP->fx_done = 0; 7512 break; 7513 7514 #ifdef OBJ_ELF 7515 /* These can appear with @l etc. in data. */ 7516 case BFD_RELOC_LO16: 7517 case BFD_RELOC_LO16_PCREL: 7518 case BFD_RELOC_HI16: 7519 case BFD_RELOC_HI16_PCREL: 7520 case BFD_RELOC_HI16_S: 7521 case BFD_RELOC_HI16_S_PCREL: 7522 case BFD_RELOC_PPC64_HIGHER: 7523 case BFD_RELOC_PPC64_HIGHER_S: 7524 case BFD_RELOC_PPC64_HIGHEST: 7525 case BFD_RELOC_PPC64_HIGHEST_S: 7526 case BFD_RELOC_PPC64_ADDR16_HIGH: 7527 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7528 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7529 break; 7530 7531 case BFD_RELOC_PPC_DTPMOD: 7532 case BFD_RELOC_PPC_TPREL: 7533 case BFD_RELOC_PPC_DTPREL: 7534 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7535 break; 7536 7537 /* Just punt all of these to the linker. */ 7538 case BFD_RELOC_PPC_B16_BRTAKEN: 7539 case BFD_RELOC_PPC_B16_BRNTAKEN: 7540 case BFD_RELOC_16_GOTOFF: 7541 case BFD_RELOC_LO16_GOTOFF: 7542 case BFD_RELOC_HI16_GOTOFF: 7543 case BFD_RELOC_HI16_S_GOTOFF: 7544 case BFD_RELOC_LO16_PLTOFF: 7545 case BFD_RELOC_HI16_PLTOFF: 7546 case BFD_RELOC_HI16_S_PLTOFF: 7547 case BFD_RELOC_PPC_COPY: 7548 case BFD_RELOC_PPC_GLOB_DAT: 7549 case BFD_RELOC_16_BASEREL: 7550 case BFD_RELOC_LO16_BASEREL: 7551 case BFD_RELOC_HI16_BASEREL: 7552 case BFD_RELOC_HI16_S_BASEREL: 7553 case BFD_RELOC_PPC_TLS: 7554 case BFD_RELOC_PPC_DTPREL16_LO: 7555 case BFD_RELOC_PPC_DTPREL16_HI: 7556 case BFD_RELOC_PPC_DTPREL16_HA: 7557 case BFD_RELOC_PPC_TPREL16_LO: 7558 case BFD_RELOC_PPC_TPREL16_HI: 7559 case BFD_RELOC_PPC_TPREL16_HA: 7560 case BFD_RELOC_PPC_GOT_TLSGD16: 7561 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7562 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7563 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7564 case BFD_RELOC_PPC_GOT_TLSLD16: 7565 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7566 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7567 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7568 case BFD_RELOC_PPC_GOT_DTPREL16: 7569 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7570 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7571 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7572 case BFD_RELOC_PPC_GOT_TPREL16: 7573 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7574 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7575 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7576 case BFD_RELOC_24_PLT_PCREL: 7577 case BFD_RELOC_PPC_LOCAL24PC: 7578 case BFD_RELOC_32_PLT_PCREL: 7579 case BFD_RELOC_GPREL16: 7580 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7581 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7582 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7583 case BFD_RELOC_PPC_EMB_NADDR32: 7584 case BFD_RELOC_PPC_EMB_NADDR16: 7585 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7586 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7587 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7588 case BFD_RELOC_PPC_EMB_SDAI16: 7589 case BFD_RELOC_PPC_EMB_SDA2REL: 7590 case BFD_RELOC_PPC_EMB_SDA2I16: 7591 case BFD_RELOC_PPC_EMB_SDA21: 7592 case BFD_RELOC_PPC_VLE_SDA21_LO: 7593 case BFD_RELOC_PPC_EMB_MRKREF: 7594 case BFD_RELOC_PPC_EMB_RELSEC16: 7595 case BFD_RELOC_PPC_EMB_RELST_LO: 7596 case BFD_RELOC_PPC_EMB_RELST_HI: 7597 case BFD_RELOC_PPC_EMB_RELST_HA: 7598 case BFD_RELOC_PPC_EMB_BIT_FLD: 7599 case BFD_RELOC_PPC_EMB_RELSDA: 7600 case BFD_RELOC_PPC64_TOC: 7601 case BFD_RELOC_PPC_TOC16: 7602 case BFD_RELOC_PPC_TOC16_LO: 7603 case BFD_RELOC_PPC_TOC16_HI: 7604 case BFD_RELOC_PPC64_TOC16_LO: 7605 case BFD_RELOC_PPC64_TOC16_HI: 7606 case BFD_RELOC_PPC64_TOC16_HA: 7607 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7608 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7609 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7610 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7611 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7612 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7613 case BFD_RELOC_PPC64_TPREL16_HIGH: 7614 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7615 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7616 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7617 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7618 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7619 case BFD_RELOC_PPC64_TLS_PCREL: 7620 fixP->fx_done = 0; 7621 break; 7622 #endif 7623 7624 #ifdef OBJ_XCOFF 7625 case BFD_RELOC_PPC_TLSGD: 7626 case BFD_RELOC_PPC_TLSLD: 7627 case BFD_RELOC_PPC_TLSLE: 7628 case BFD_RELOC_PPC_TLSIE: 7629 case BFD_RELOC_PPC_TLSM: 7630 case BFD_RELOC_PPC64_TLSGD: 7631 case BFD_RELOC_PPC64_TLSLD: 7632 case BFD_RELOC_PPC64_TLSLE: 7633 case BFD_RELOC_PPC64_TLSIE: 7634 case BFD_RELOC_PPC64_TLSM: 7635 gas_assert (fixP->fx_addsy != NULL); 7636 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7637 break; 7638 7639 /* Officially, R_TLSML relocations must be from a TOC entry 7640 targeting itself. In practice, this TOC entry is always 7641 named (or .rename) "_$TLSML". 7642 Thus, as it doesn't seem possible to retrieve the symbol 7643 being relocated here, we simply check that the symbol 7644 targeted by R_TLSML is indeed a TOC entry named "_$TLSML". 7645 FIXME: Find a way to correctly check R_TLSML relocations 7646 as described above. */ 7647 case BFD_RELOC_PPC_TLSML: 7648 case BFD_RELOC_PPC64_TLSML: 7649 gas_assert (fixP->fx_addsy != NULL); 7650 if ((symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 7651 || symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TE) 7652 && strcmp (symbol_get_tc (fixP->fx_addsy)->real_name, "_$TLSML") != 0) 7653 as_bad_where (fixP->fx_file, fixP->fx_line, 7654 _("R_TLSML relocation doesn't target a " 7655 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP->fx_addsy)); 7656 fieldval = 0; 7657 break; 7658 7659 case BFD_RELOC_NONE: 7660 #endif 7661 case BFD_RELOC_CTOR: 7662 case BFD_RELOC_32: 7663 case BFD_RELOC_32_PCREL: 7664 case BFD_RELOC_RVA: 7665 case BFD_RELOC_64: 7666 case BFD_RELOC_64_PCREL: 7667 case BFD_RELOC_16: 7668 case BFD_RELOC_16_PCREL: 7669 case BFD_RELOC_8: 7670 break; 7671 7672 default: 7673 fprintf (stderr, 7674 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7675 fflush (stderr); 7676 abort (); 7677 } 7678 7679 if (fixP->fx_size && APPLY_RELOC) 7680 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7681 fieldval, fixP->fx_size); 7682 if (warn_476 7683 && (seg->flags & SEC_CODE) != 0 7684 && fixP->fx_size == 4 7685 && fixP->fx_done 7686 && !fixP->fx_tcbit 7687 && (fixP->fx_r_type == BFD_RELOC_32 7688 || fixP->fx_r_type == BFD_RELOC_CTOR 7689 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7690 as_warn_where (fixP->fx_file, fixP->fx_line, 7691 _("data in executable section")); 7692 } 7693 7694 #ifdef OBJ_ELF 7695 ppc_elf_validate_fix (fixP, seg); 7696 fixP->fx_addnumber = value; 7697 7698 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7699 from the section contents. If we are going to be emitting a reloc 7700 then the section contents are immaterial, so don't warn if they 7701 happen to overflow. Leave such warnings to ld. */ 7702 if (!fixP->fx_done) 7703 { 7704 fixP->fx_no_overflow = 1; 7705 7706 /* Arrange to emit .TOC. as a normal symbol if used in anything 7707 but .TOC.@tocbase. */ 7708 if (ppc_obj64 7709 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7710 && fixP->fx_addsy != NULL 7711 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7712 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7713 } 7714 #else 7715 if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16 7716 || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI 7717 || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_LO) 7718 { 7719 /* We want to use the offset within the toc, not the actual VMA 7720 of the symbol. */ 7721 fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) 7722 - S_GET_VALUE (ppc_toc_csect)); 7723 7724 /* The high bits must be adjusted for the low bits being signed. */ 7725 if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI) { 7726 fixP->fx_addnumber += 0x8000; 7727 } 7728 7729 /* Set *valP to avoid errors. */ 7730 *valP = value; 7731 } 7732 else if (fixP->fx_r_type == BFD_RELOC_PPC_TLSM 7733 || fixP->fx_r_type == BFD_RELOC_PPC64_TLSM 7734 || fixP->fx_r_type == BFD_RELOC_PPC_TLSML 7735 || fixP->fx_r_type == BFD_RELOC_PPC64_TLSML) 7736 /* AIX ld expects the section contents for these relocations 7737 to be zero. Arrange for that to occur when 7738 bfd_install_relocation is called. */ 7739 fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) 7740 - S_GET_VALUE (fixP->fx_addsy) 7741 - fieldval); 7742 else 7743 fixP->fx_addnumber = 0; 7744 #endif 7745 } 7746 7747 /* Generate a reloc for a fixup. */ 7748 7749 arelent ** 7750 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7751 { 7752 static arelent *relocs[3]; 7753 arelent *reloc; 7754 7755 relocs[0] = reloc = XNEW (arelent); 7756 relocs[1] = NULL; 7757 7758 reloc->sym_ptr_ptr = XNEW (asymbol *); 7759 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7760 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7761 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */ 7762 if (fixp->fx_r_type == BFD_RELOC_PPC64_TLS_PCREL) 7763 reloc->address++; 7764 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7765 if (reloc->howto == (reloc_howto_type *) NULL) 7766 { 7767 as_bad_where (fixp->fx_file, fixp->fx_line, 7768 _("reloc %d not supported by object file format"), 7769 (int) fixp->fx_r_type); 7770 relocs[0] = NULL; 7771 } 7772 reloc->addend = fixp->fx_addnumber; 7773 7774 if (fixp->fx_subsy != NULL) 7775 { 7776 relocs[1] = reloc = XNEW (arelent); 7777 relocs[2] = NULL; 7778 7779 reloc->sym_ptr_ptr = XNEW (asymbol *); 7780 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 7781 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7782 7783 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_PPC_NEG); 7784 reloc->addend = fixp->fx_addnumber; 7785 7786 if (reloc->howto == (reloc_howto_type *) NULL) 7787 { 7788 as_bad_subtract (fixp); 7789 free (relocs[1]->sym_ptr_ptr); 7790 free (relocs[1]); 7791 free (relocs[0]->sym_ptr_ptr); 7792 free (relocs[0]); 7793 relocs[0] = NULL; 7794 } 7795 } 7796 7797 7798 return relocs; 7799 } 7800 7801 void 7802 ppc_cfi_frame_initial_instructions (void) 7803 { 7804 cfi_add_CFA_def_cfa (1, 0); 7805 } 7806 7807 int 7808 tc_ppc_regname_to_dw2regnum (char *regname) 7809 { 7810 unsigned int regnum = -1; 7811 unsigned int i; 7812 const char *p; 7813 char *q; 7814 static struct { const char *name; int dw2regnum; } regnames[] = 7815 { 7816 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7817 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7818 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7819 { "spe_acc", 111 }, { "spefscr", 112 } 7820 }; 7821 7822 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7823 if (strcmp (regnames[i].name, regname) == 0) 7824 return regnames[i].dw2regnum; 7825 7826 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7827 { 7828 p = regname + 1 + (regname[1] == '.'); 7829 regnum = strtoul (p, &q, 10); 7830 if (p == q || *q || regnum >= 32) 7831 return -1; 7832 if (regname[0] == 'f') 7833 regnum += 32; 7834 else if (regname[0] == 'v') 7835 regnum += 77; 7836 } 7837 else if (regname[0] == 'c' && regname[1] == 'r') 7838 { 7839 p = regname + 2 + (regname[2] == '.'); 7840 if (p[0] < '0' || p[0] > '7' || p[1]) 7841 return -1; 7842 regnum = p[0] - '0' + 68; 7843 } 7844 return regnum; 7845 } 7846