1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000) 2 Copyright (C) 1994-2022 Free Software Foundation, Inc. 3 Written by Ian Lance Taylor, Cygnus Support. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "safe-ctype.h" 24 #include "subsegs.h" 25 #include "dw2gencfi.h" 26 #include "opcode/ppc.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/ppc.h" 30 #include "elf/ppc64.h" 31 #include "dwarf2dbg.h" 32 #endif 33 34 #ifdef OBJ_XCOFF 35 #include "coff/xcoff.h" 36 #include "libxcoff.h" 37 #endif 38 39 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */ 40 41 /* Tell the main code what the endianness is. */ 42 extern int target_big_endian; 43 44 /* Whether or not, we've set target_big_endian. */ 45 static int set_target_endian = 0; 46 47 /* Whether to use user friendly register names. */ 48 #ifndef TARGET_REG_NAMES_P 49 #define TARGET_REG_NAMES_P false 50 #endif 51 52 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST, 53 HIGHESTA. */ 54 55 /* #lo(value) denotes the least significant 16 bits of the indicated. */ 56 #define PPC_LO(v) ((v) & 0xffff) 57 58 /* #hi(value) denotes bits 16 through 31 of the indicated value. */ 59 #define PPC_HI(v) (((v) >> 16) & 0xffff) 60 61 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of 62 the indicated value, compensating for #lo() being treated as a 63 signed number. */ 64 #define PPC_HA(v) PPC_HI ((v) + 0x8000) 65 66 /* #higher(value) denotes bits 32 through 47 of the indicated value. */ 67 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff) 68 69 /* #highera(value) denotes bits 32 through 47 of the indicated value, 70 compensating for #lo() being treated as a signed number. */ 71 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000) 72 73 /* #highest(value) denotes bits 48 through 63 of the indicated value. */ 74 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff) 75 76 /* #highesta(value) denotes bits 48 through 63 of the indicated value, 77 compensating for #lo being treated as a signed number. */ 78 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000) 79 80 #define SEX16(val) (((val) ^ 0x8000) - 0x8000) 81 82 /* For the time being on ppc64, don't report overflow on @h and @ha 83 applied to constants. */ 84 #define REPORT_OVERFLOW_HI 0 85 86 static bool reg_names_p = TARGET_REG_NAMES_P; 87 88 static void ppc_byte (int); 89 90 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 91 static void ppc_tc (int); 92 static void ppc_machine (int); 93 #endif 94 95 #ifdef OBJ_XCOFF 96 static void ppc_comm (int); 97 static void ppc_bb (int); 98 static void ppc_bc (int); 99 static void ppc_bf (int); 100 static void ppc_biei (int); 101 static void ppc_bs (int); 102 static void ppc_eb (int); 103 static void ppc_ec (int); 104 static void ppc_ef (int); 105 static void ppc_es (int); 106 static void ppc_csect (int); 107 static void ppc_dwsect (int); 108 static void ppc_change_csect (symbolS *, offsetT); 109 static void ppc_file (int); 110 static void ppc_function (int); 111 static void ppc_extern (int); 112 static void ppc_globl (int); 113 static void ppc_lglobl (int); 114 static void ppc_ref (int); 115 static void ppc_section (int); 116 static void ppc_named_section (int); 117 static void ppc_stabx (int); 118 static void ppc_rename (int); 119 static void ppc_toc (int); 120 static void ppc_xcoff_cons (int); 121 static void ppc_vbyte (int); 122 static void ppc_weak (int); 123 static void ppc_GNU_visibility (int); 124 #endif 125 126 #ifdef OBJ_ELF 127 static void ppc_elf_rdata (int); 128 static void ppc_elf_lcomm (int); 129 static void ppc_elf_localentry (int); 130 static void ppc_elf_abiversion (int); 131 static void ppc_elf_gnu_attribute (int); 132 #endif 133 134 /* Generic assembler global variables which must be defined by all 135 targets. */ 136 137 #ifdef OBJ_ELF 138 /* This string holds the chars that always start a comment. If the 139 pre-processor is disabled, these aren't very useful. The macro 140 tc_comment_chars points to this. We use this, rather than the 141 usual comment_chars, so that we can switch for Solaris conventions. */ 142 static const char ppc_solaris_comment_chars[] = "#!"; 143 static const char ppc_eabi_comment_chars[] = "#"; 144 145 #ifdef TARGET_SOLARIS_COMMENT 146 const char *ppc_comment_chars = ppc_solaris_comment_chars; 147 #else 148 const char *ppc_comment_chars = ppc_eabi_comment_chars; 149 #endif 150 #else 151 const char comment_chars[] = "#"; 152 #endif 153 154 /* Characters which start a comment at the beginning of a line. */ 155 const char line_comment_chars[] = "#"; 156 157 /* Characters which may be used to separate multiple commands on a 158 single line. */ 159 const char line_separator_chars[] = ";"; 160 161 /* Characters which are used to indicate an exponent in a floating 162 point number. */ 163 const char EXP_CHARS[] = "eE"; 164 165 /* Characters which mean that a number is a floating point constant, 166 as in 0d1.0. */ 167 const char FLT_CHARS[] = "dD"; 168 169 /* Anything that can start an operand needs to be mentioned here, 170 to stop the input scrubber eating whitespace. */ 171 const char ppc_symbol_chars[] = "%["; 172 173 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */ 174 int ppc_cie_data_alignment; 175 176 /* The dwarf2 minimum instruction length. */ 177 int ppc_dwarf2_line_min_insn_length; 178 179 /* More than this number of nops in an alignment op gets a branch 180 instead. */ 181 unsigned long nop_limit = 4; 182 183 /* The type of processor we are assembling for. This is one or more 184 of the PPC_OPCODE flags defined in opcode/ppc.h. */ 185 ppc_cpu_t ppc_cpu = 0; 186 ppc_cpu_t sticky = 0; 187 188 /* Value for ELF e_flags EF_PPC64_ABI. */ 189 unsigned int ppc_abiversion = 0; 190 191 #ifdef OBJ_ELF 192 /* Flags set on encountering toc relocs. */ 193 static enum { 194 has_large_toc_reloc = 1, 195 has_small_toc_reloc = 2 196 } toc_reloc_types; 197 #endif 198 199 /* Warn on emitting data to code sections. */ 200 int warn_476; 201 uint64_t last_insn; 202 segT last_seg; 203 subsegT last_subseg; 204 205 /* The target specific pseudo-ops which we support. */ 206 207 const pseudo_typeS md_pseudo_table[] = 208 { 209 /* Pseudo-ops which must be overridden. */ 210 { "byte", ppc_byte, 0 }, 211 212 #ifdef OBJ_XCOFF 213 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these 214 legitimately belong in the obj-*.c file. However, XCOFF is based 215 on COFF, and is only implemented for the RS/6000. We just use 216 obj-coff.c, and add what we need here. */ 217 { "comm", ppc_comm, 0 }, 218 { "lcomm", ppc_comm, 1 }, 219 { "bb", ppc_bb, 0 }, 220 { "bc", ppc_bc, 0 }, 221 { "bf", ppc_bf, 0 }, 222 { "bi", ppc_biei, 0 }, 223 { "bs", ppc_bs, 0 }, 224 { "csect", ppc_csect, 0 }, 225 { "dwsect", ppc_dwsect, 0 }, 226 { "data", ppc_section, 'd' }, 227 { "eb", ppc_eb, 0 }, 228 { "ec", ppc_ec, 0 }, 229 { "ef", ppc_ef, 0 }, 230 { "ei", ppc_biei, 1 }, 231 { "es", ppc_es, 0 }, 232 { "extern", ppc_extern, 0 }, 233 { "file", ppc_file, 0 }, 234 { "function", ppc_function, 0 }, 235 { "globl", ppc_globl, 0 }, 236 { "lglobl", ppc_lglobl, 0 }, 237 { "ref", ppc_ref, 0 }, 238 { "rename", ppc_rename, 0 }, 239 { "section", ppc_named_section, 0 }, 240 { "stabx", ppc_stabx, 0 }, 241 { "text", ppc_section, 't' }, 242 { "toc", ppc_toc, 0 }, 243 { "long", ppc_xcoff_cons, 2 }, 244 { "llong", ppc_xcoff_cons, 3 }, 245 { "word", ppc_xcoff_cons, 1 }, 246 { "short", ppc_xcoff_cons, 1 }, 247 { "vbyte", ppc_vbyte, 0 }, 248 { "weak", ppc_weak, 0 }, 249 250 /* Enable GNU syntax for symbol visibility. */ 251 {"internal", ppc_GNU_visibility, SYM_V_INTERNAL}, 252 {"hidden", ppc_GNU_visibility, SYM_V_HIDDEN}, 253 {"protected", ppc_GNU_visibility, SYM_V_PROTECTED}, 254 #endif 255 256 #ifdef OBJ_ELF 257 { "llong", cons, 8 }, 258 { "rdata", ppc_elf_rdata, 0 }, 259 { "rodata", ppc_elf_rdata, 0 }, 260 { "lcomm", ppc_elf_lcomm, 0 }, 261 { "localentry", ppc_elf_localentry, 0 }, 262 { "abiversion", ppc_elf_abiversion, 0 }, 263 { "gnu_attribute", ppc_elf_gnu_attribute, 0}, 264 #endif 265 266 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 267 { "tc", ppc_tc, 0 }, 268 { "machine", ppc_machine, 0 }, 269 #endif 270 271 { NULL, NULL, 0 } 272 }; 273 274 275 /* Predefined register names if -mregnames (or default for Windows NT). 276 In general, there are lots of them, in an attempt to be compatible 277 with a number of other Windows NT assemblers. */ 278 279 /* Structure to hold information about predefined registers. */ 280 struct pd_reg 281 { 282 const char *name; 283 unsigned short value; 284 unsigned short flags; 285 }; 286 287 /* List of registers that are pre-defined: 288 289 Each general register has predefined names of the form: 290 1. r<reg_num> which has the value <reg_num>. 291 2. r.<reg_num> which has the value <reg_num>. 292 293 Each floating point register has predefined names of the form: 294 1. f<reg_num> which has the value <reg_num>. 295 2. f.<reg_num> which has the value <reg_num>. 296 297 Each vector unit register has predefined names of the form: 298 1. v<reg_num> which has the value <reg_num>. 299 2. v.<reg_num> which has the value <reg_num>. 300 301 Each condition register has predefined names of the form: 302 1. cr<reg_num> which has the value <reg_num>. 303 2. cr.<reg_num> which has the value <reg_num>. 304 305 There are individual registers as well: 306 sp or r.sp has the value 1 307 rtoc or r.toc has the value 2 308 xer has the value 1 309 lr has the value 8 310 ctr has the value 9 311 dar has the value 19 312 dsisr has the value 18 313 dec has the value 22 314 sdr1 has the value 25 315 srr0 has the value 26 316 srr1 has the value 27 317 318 The table is sorted. Suitable for searching by a binary search. */ 319 320 static const struct pd_reg pre_defined_registers[] = 321 { 322 /* VSX accumulators. */ 323 { "a0", 0, PPC_OPERAND_ACC }, 324 { "a1", 1, PPC_OPERAND_ACC }, 325 { "a2", 2, PPC_OPERAND_ACC }, 326 { "a3", 3, PPC_OPERAND_ACC }, 327 { "a4", 4, PPC_OPERAND_ACC }, 328 { "a5", 5, PPC_OPERAND_ACC }, 329 { "a6", 6, PPC_OPERAND_ACC }, 330 { "a7", 7, PPC_OPERAND_ACC }, 331 332 /* Condition Registers */ 333 { "cr.0", 0, PPC_OPERAND_CR_REG }, 334 { "cr.1", 1, PPC_OPERAND_CR_REG }, 335 { "cr.2", 2, PPC_OPERAND_CR_REG }, 336 { "cr.3", 3, PPC_OPERAND_CR_REG }, 337 { "cr.4", 4, PPC_OPERAND_CR_REG }, 338 { "cr.5", 5, PPC_OPERAND_CR_REG }, 339 { "cr.6", 6, PPC_OPERAND_CR_REG }, 340 { "cr.7", 7, PPC_OPERAND_CR_REG }, 341 342 { "cr0", 0, PPC_OPERAND_CR_REG }, 343 { "cr1", 1, PPC_OPERAND_CR_REG }, 344 { "cr2", 2, PPC_OPERAND_CR_REG }, 345 { "cr3", 3, PPC_OPERAND_CR_REG }, 346 { "cr4", 4, PPC_OPERAND_CR_REG }, 347 { "cr5", 5, PPC_OPERAND_CR_REG }, 348 { "cr6", 6, PPC_OPERAND_CR_REG }, 349 { "cr7", 7, PPC_OPERAND_CR_REG }, 350 351 { "ctr", 9, PPC_OPERAND_SPR }, 352 { "dar", 19, PPC_OPERAND_SPR }, 353 { "dec", 22, PPC_OPERAND_SPR }, 354 { "dsisr", 18, PPC_OPERAND_SPR }, 355 356 /* Floating point registers */ 357 { "f.0", 0, PPC_OPERAND_FPR }, 358 { "f.1", 1, PPC_OPERAND_FPR }, 359 { "f.10", 10, PPC_OPERAND_FPR }, 360 { "f.11", 11, PPC_OPERAND_FPR }, 361 { "f.12", 12, PPC_OPERAND_FPR }, 362 { "f.13", 13, PPC_OPERAND_FPR }, 363 { "f.14", 14, PPC_OPERAND_FPR }, 364 { "f.15", 15, PPC_OPERAND_FPR }, 365 { "f.16", 16, PPC_OPERAND_FPR }, 366 { "f.17", 17, PPC_OPERAND_FPR }, 367 { "f.18", 18, PPC_OPERAND_FPR }, 368 { "f.19", 19, PPC_OPERAND_FPR }, 369 { "f.2", 2, PPC_OPERAND_FPR }, 370 { "f.20", 20, PPC_OPERAND_FPR }, 371 { "f.21", 21, PPC_OPERAND_FPR }, 372 { "f.22", 22, PPC_OPERAND_FPR }, 373 { "f.23", 23, PPC_OPERAND_FPR }, 374 { "f.24", 24, PPC_OPERAND_FPR }, 375 { "f.25", 25, PPC_OPERAND_FPR }, 376 { "f.26", 26, PPC_OPERAND_FPR }, 377 { "f.27", 27, PPC_OPERAND_FPR }, 378 { "f.28", 28, PPC_OPERAND_FPR }, 379 { "f.29", 29, PPC_OPERAND_FPR }, 380 { "f.3", 3, PPC_OPERAND_FPR }, 381 { "f.30", 30, PPC_OPERAND_FPR }, 382 { "f.31", 31, PPC_OPERAND_FPR }, 383 { "f.32", 32, PPC_OPERAND_VSR }, 384 { "f.33", 33, PPC_OPERAND_VSR }, 385 { "f.34", 34, PPC_OPERAND_VSR }, 386 { "f.35", 35, PPC_OPERAND_VSR }, 387 { "f.36", 36, PPC_OPERAND_VSR }, 388 { "f.37", 37, PPC_OPERAND_VSR }, 389 { "f.38", 38, PPC_OPERAND_VSR }, 390 { "f.39", 39, PPC_OPERAND_VSR }, 391 { "f.4", 4, PPC_OPERAND_FPR }, 392 { "f.40", 40, PPC_OPERAND_VSR }, 393 { "f.41", 41, PPC_OPERAND_VSR }, 394 { "f.42", 42, PPC_OPERAND_VSR }, 395 { "f.43", 43, PPC_OPERAND_VSR }, 396 { "f.44", 44, PPC_OPERAND_VSR }, 397 { "f.45", 45, PPC_OPERAND_VSR }, 398 { "f.46", 46, PPC_OPERAND_VSR }, 399 { "f.47", 47, PPC_OPERAND_VSR }, 400 { "f.48", 48, PPC_OPERAND_VSR }, 401 { "f.49", 49, PPC_OPERAND_VSR }, 402 { "f.5", 5, PPC_OPERAND_FPR }, 403 { "f.50", 50, PPC_OPERAND_VSR }, 404 { "f.51", 51, PPC_OPERAND_VSR }, 405 { "f.52", 52, PPC_OPERAND_VSR }, 406 { "f.53", 53, PPC_OPERAND_VSR }, 407 { "f.54", 54, PPC_OPERAND_VSR }, 408 { "f.55", 55, PPC_OPERAND_VSR }, 409 { "f.56", 56, PPC_OPERAND_VSR }, 410 { "f.57", 57, PPC_OPERAND_VSR }, 411 { "f.58", 58, PPC_OPERAND_VSR }, 412 { "f.59", 59, PPC_OPERAND_VSR }, 413 { "f.6", 6, PPC_OPERAND_FPR }, 414 { "f.60", 60, PPC_OPERAND_VSR }, 415 { "f.61", 61, PPC_OPERAND_VSR }, 416 { "f.62", 62, PPC_OPERAND_VSR }, 417 { "f.63", 63, PPC_OPERAND_VSR }, 418 { "f.7", 7, PPC_OPERAND_FPR }, 419 { "f.8", 8, PPC_OPERAND_FPR }, 420 { "f.9", 9, PPC_OPERAND_FPR }, 421 422 { "f0", 0, PPC_OPERAND_FPR }, 423 { "f1", 1, PPC_OPERAND_FPR }, 424 { "f10", 10, PPC_OPERAND_FPR }, 425 { "f11", 11, PPC_OPERAND_FPR }, 426 { "f12", 12, PPC_OPERAND_FPR }, 427 { "f13", 13, PPC_OPERAND_FPR }, 428 { "f14", 14, PPC_OPERAND_FPR }, 429 { "f15", 15, PPC_OPERAND_FPR }, 430 { "f16", 16, PPC_OPERAND_FPR }, 431 { "f17", 17, PPC_OPERAND_FPR }, 432 { "f18", 18, PPC_OPERAND_FPR }, 433 { "f19", 19, PPC_OPERAND_FPR }, 434 { "f2", 2, PPC_OPERAND_FPR }, 435 { "f20", 20, PPC_OPERAND_FPR }, 436 { "f21", 21, PPC_OPERAND_FPR }, 437 { "f22", 22, PPC_OPERAND_FPR }, 438 { "f23", 23, PPC_OPERAND_FPR }, 439 { "f24", 24, PPC_OPERAND_FPR }, 440 { "f25", 25, PPC_OPERAND_FPR }, 441 { "f26", 26, PPC_OPERAND_FPR }, 442 { "f27", 27, PPC_OPERAND_FPR }, 443 { "f28", 28, PPC_OPERAND_FPR }, 444 { "f29", 29, PPC_OPERAND_FPR }, 445 { "f3", 3, PPC_OPERAND_FPR }, 446 { "f30", 30, PPC_OPERAND_FPR }, 447 { "f31", 31, PPC_OPERAND_FPR }, 448 { "f32", 32, PPC_OPERAND_VSR }, 449 { "f33", 33, PPC_OPERAND_VSR }, 450 { "f34", 34, PPC_OPERAND_VSR }, 451 { "f35", 35, PPC_OPERAND_VSR }, 452 { "f36", 36, PPC_OPERAND_VSR }, 453 { "f37", 37, PPC_OPERAND_VSR }, 454 { "f38", 38, PPC_OPERAND_VSR }, 455 { "f39", 39, PPC_OPERAND_VSR }, 456 { "f4", 4, PPC_OPERAND_FPR }, 457 { "f40", 40, PPC_OPERAND_VSR }, 458 { "f41", 41, PPC_OPERAND_VSR }, 459 { "f42", 42, PPC_OPERAND_VSR }, 460 { "f43", 43, PPC_OPERAND_VSR }, 461 { "f44", 44, PPC_OPERAND_VSR }, 462 { "f45", 45, PPC_OPERAND_VSR }, 463 { "f46", 46, PPC_OPERAND_VSR }, 464 { "f47", 47, PPC_OPERAND_VSR }, 465 { "f48", 48, PPC_OPERAND_VSR }, 466 { "f49", 49, PPC_OPERAND_VSR }, 467 { "f5", 5, PPC_OPERAND_FPR }, 468 { "f50", 50, PPC_OPERAND_VSR }, 469 { "f51", 51, PPC_OPERAND_VSR }, 470 { "f52", 52, PPC_OPERAND_VSR }, 471 { "f53", 53, PPC_OPERAND_VSR }, 472 { "f54", 54, PPC_OPERAND_VSR }, 473 { "f55", 55, PPC_OPERAND_VSR }, 474 { "f56", 56, PPC_OPERAND_VSR }, 475 { "f57", 57, PPC_OPERAND_VSR }, 476 { "f58", 58, PPC_OPERAND_VSR }, 477 { "f59", 59, PPC_OPERAND_VSR }, 478 { "f6", 6, PPC_OPERAND_FPR }, 479 { "f60", 60, PPC_OPERAND_VSR }, 480 { "f61", 61, PPC_OPERAND_VSR }, 481 { "f62", 62, PPC_OPERAND_VSR }, 482 { "f63", 63, PPC_OPERAND_VSR }, 483 { "f7", 7, PPC_OPERAND_FPR }, 484 { "f8", 8, PPC_OPERAND_FPR }, 485 { "f9", 9, PPC_OPERAND_FPR }, 486 487 /* Quantization registers used with pair single instructions. */ 488 { "gqr.0", 0, PPC_OPERAND_GQR }, 489 { "gqr.1", 1, PPC_OPERAND_GQR }, 490 { "gqr.2", 2, PPC_OPERAND_GQR }, 491 { "gqr.3", 3, PPC_OPERAND_GQR }, 492 { "gqr.4", 4, PPC_OPERAND_GQR }, 493 { "gqr.5", 5, PPC_OPERAND_GQR }, 494 { "gqr.6", 6, PPC_OPERAND_GQR }, 495 { "gqr.7", 7, PPC_OPERAND_GQR }, 496 { "gqr0", 0, PPC_OPERAND_GQR }, 497 { "gqr1", 1, PPC_OPERAND_GQR }, 498 { "gqr2", 2, PPC_OPERAND_GQR }, 499 { "gqr3", 3, PPC_OPERAND_GQR }, 500 { "gqr4", 4, PPC_OPERAND_GQR }, 501 { "gqr5", 5, PPC_OPERAND_GQR }, 502 { "gqr6", 6, PPC_OPERAND_GQR }, 503 { "gqr7", 7, PPC_OPERAND_GQR }, 504 505 { "lr", 8, PPC_OPERAND_SPR }, 506 507 /* General Purpose Registers */ 508 { "r.0", 0, PPC_OPERAND_GPR }, 509 { "r.1", 1, PPC_OPERAND_GPR }, 510 { "r.10", 10, PPC_OPERAND_GPR }, 511 { "r.11", 11, PPC_OPERAND_GPR }, 512 { "r.12", 12, PPC_OPERAND_GPR }, 513 { "r.13", 13, PPC_OPERAND_GPR }, 514 { "r.14", 14, PPC_OPERAND_GPR }, 515 { "r.15", 15, PPC_OPERAND_GPR }, 516 { "r.16", 16, PPC_OPERAND_GPR }, 517 { "r.17", 17, PPC_OPERAND_GPR }, 518 { "r.18", 18, PPC_OPERAND_GPR }, 519 { "r.19", 19, PPC_OPERAND_GPR }, 520 { "r.2", 2, PPC_OPERAND_GPR }, 521 { "r.20", 20, PPC_OPERAND_GPR }, 522 { "r.21", 21, PPC_OPERAND_GPR }, 523 { "r.22", 22, PPC_OPERAND_GPR }, 524 { "r.23", 23, PPC_OPERAND_GPR }, 525 { "r.24", 24, PPC_OPERAND_GPR }, 526 { "r.25", 25, PPC_OPERAND_GPR }, 527 { "r.26", 26, PPC_OPERAND_GPR }, 528 { "r.27", 27, PPC_OPERAND_GPR }, 529 { "r.28", 28, PPC_OPERAND_GPR }, 530 { "r.29", 29, PPC_OPERAND_GPR }, 531 { "r.3", 3, PPC_OPERAND_GPR }, 532 { "r.30", 30, PPC_OPERAND_GPR }, 533 { "r.31", 31, PPC_OPERAND_GPR }, 534 { "r.4", 4, PPC_OPERAND_GPR }, 535 { "r.5", 5, PPC_OPERAND_GPR }, 536 { "r.6", 6, PPC_OPERAND_GPR }, 537 { "r.7", 7, PPC_OPERAND_GPR }, 538 { "r.8", 8, PPC_OPERAND_GPR }, 539 { "r.9", 9, PPC_OPERAND_GPR }, 540 541 { "r.sp", 1, PPC_OPERAND_GPR }, 542 543 { "r.toc", 2, PPC_OPERAND_GPR }, 544 545 { "r0", 0, PPC_OPERAND_GPR }, 546 { "r1", 1, PPC_OPERAND_GPR }, 547 { "r10", 10, PPC_OPERAND_GPR }, 548 { "r11", 11, PPC_OPERAND_GPR }, 549 { "r12", 12, PPC_OPERAND_GPR }, 550 { "r13", 13, PPC_OPERAND_GPR }, 551 { "r14", 14, PPC_OPERAND_GPR }, 552 { "r15", 15, PPC_OPERAND_GPR }, 553 { "r16", 16, PPC_OPERAND_GPR }, 554 { "r17", 17, PPC_OPERAND_GPR }, 555 { "r18", 18, PPC_OPERAND_GPR }, 556 { "r19", 19, PPC_OPERAND_GPR }, 557 { "r2", 2, PPC_OPERAND_GPR }, 558 { "r20", 20, PPC_OPERAND_GPR }, 559 { "r21", 21, PPC_OPERAND_GPR }, 560 { "r22", 22, PPC_OPERAND_GPR }, 561 { "r23", 23, PPC_OPERAND_GPR }, 562 { "r24", 24, PPC_OPERAND_GPR }, 563 { "r25", 25, PPC_OPERAND_GPR }, 564 { "r26", 26, PPC_OPERAND_GPR }, 565 { "r27", 27, PPC_OPERAND_GPR }, 566 { "r28", 28, PPC_OPERAND_GPR }, 567 { "r29", 29, PPC_OPERAND_GPR }, 568 { "r3", 3, PPC_OPERAND_GPR }, 569 { "r30", 30, PPC_OPERAND_GPR }, 570 { "r31", 31, PPC_OPERAND_GPR }, 571 { "r4", 4, PPC_OPERAND_GPR }, 572 { "r5", 5, PPC_OPERAND_GPR }, 573 { "r6", 6, PPC_OPERAND_GPR }, 574 { "r7", 7, PPC_OPERAND_GPR }, 575 { "r8", 8, PPC_OPERAND_GPR }, 576 { "r9", 9, PPC_OPERAND_GPR }, 577 578 { "rtoc", 2, PPC_OPERAND_GPR }, 579 580 { "sdr1", 25, PPC_OPERAND_SPR }, 581 582 { "sp", 1, PPC_OPERAND_GPR }, 583 584 { "srr0", 26, PPC_OPERAND_SPR }, 585 { "srr1", 27, PPC_OPERAND_SPR }, 586 587 /* Vector (Altivec/VMX) registers */ 588 { "v.0", 0, PPC_OPERAND_VR }, 589 { "v.1", 1, PPC_OPERAND_VR }, 590 { "v.10", 10, PPC_OPERAND_VR }, 591 { "v.11", 11, PPC_OPERAND_VR }, 592 { "v.12", 12, PPC_OPERAND_VR }, 593 { "v.13", 13, PPC_OPERAND_VR }, 594 { "v.14", 14, PPC_OPERAND_VR }, 595 { "v.15", 15, PPC_OPERAND_VR }, 596 { "v.16", 16, PPC_OPERAND_VR }, 597 { "v.17", 17, PPC_OPERAND_VR }, 598 { "v.18", 18, PPC_OPERAND_VR }, 599 { "v.19", 19, PPC_OPERAND_VR }, 600 { "v.2", 2, PPC_OPERAND_VR }, 601 { "v.20", 20, PPC_OPERAND_VR }, 602 { "v.21", 21, PPC_OPERAND_VR }, 603 { "v.22", 22, PPC_OPERAND_VR }, 604 { "v.23", 23, PPC_OPERAND_VR }, 605 { "v.24", 24, PPC_OPERAND_VR }, 606 { "v.25", 25, PPC_OPERAND_VR }, 607 { "v.26", 26, PPC_OPERAND_VR }, 608 { "v.27", 27, PPC_OPERAND_VR }, 609 { "v.28", 28, PPC_OPERAND_VR }, 610 { "v.29", 29, PPC_OPERAND_VR }, 611 { "v.3", 3, PPC_OPERAND_VR }, 612 { "v.30", 30, PPC_OPERAND_VR }, 613 { "v.31", 31, PPC_OPERAND_VR }, 614 { "v.4", 4, PPC_OPERAND_VR }, 615 { "v.5", 5, PPC_OPERAND_VR }, 616 { "v.6", 6, PPC_OPERAND_VR }, 617 { "v.7", 7, PPC_OPERAND_VR }, 618 { "v.8", 8, PPC_OPERAND_VR }, 619 { "v.9", 9, PPC_OPERAND_VR }, 620 621 { "v0", 0, PPC_OPERAND_VR }, 622 { "v1", 1, PPC_OPERAND_VR }, 623 { "v10", 10, PPC_OPERAND_VR }, 624 { "v11", 11, PPC_OPERAND_VR }, 625 { "v12", 12, PPC_OPERAND_VR }, 626 { "v13", 13, PPC_OPERAND_VR }, 627 { "v14", 14, PPC_OPERAND_VR }, 628 { "v15", 15, PPC_OPERAND_VR }, 629 { "v16", 16, PPC_OPERAND_VR }, 630 { "v17", 17, PPC_OPERAND_VR }, 631 { "v18", 18, PPC_OPERAND_VR }, 632 { "v19", 19, PPC_OPERAND_VR }, 633 { "v2", 2, PPC_OPERAND_VR }, 634 { "v20", 20, PPC_OPERAND_VR }, 635 { "v21", 21, PPC_OPERAND_VR }, 636 { "v22", 22, PPC_OPERAND_VR }, 637 { "v23", 23, PPC_OPERAND_VR }, 638 { "v24", 24, PPC_OPERAND_VR }, 639 { "v25", 25, PPC_OPERAND_VR }, 640 { "v26", 26, PPC_OPERAND_VR }, 641 { "v27", 27, PPC_OPERAND_VR }, 642 { "v28", 28, PPC_OPERAND_VR }, 643 { "v29", 29, PPC_OPERAND_VR }, 644 { "v3", 3, PPC_OPERAND_VR }, 645 { "v30", 30, PPC_OPERAND_VR }, 646 { "v31", 31, PPC_OPERAND_VR }, 647 { "v4", 4, PPC_OPERAND_VR }, 648 { "v5", 5, PPC_OPERAND_VR }, 649 { "v6", 6, PPC_OPERAND_VR }, 650 { "v7", 7, PPC_OPERAND_VR }, 651 { "v8", 8, PPC_OPERAND_VR }, 652 { "v9", 9, PPC_OPERAND_VR }, 653 654 /* Vector Scalar (VSX) registers (ISA 2.06). */ 655 { "vs.0", 0, PPC_OPERAND_VSR }, 656 { "vs.1", 1, PPC_OPERAND_VSR }, 657 { "vs.10", 10, PPC_OPERAND_VSR }, 658 { "vs.11", 11, PPC_OPERAND_VSR }, 659 { "vs.12", 12, PPC_OPERAND_VSR }, 660 { "vs.13", 13, PPC_OPERAND_VSR }, 661 { "vs.14", 14, PPC_OPERAND_VSR }, 662 { "vs.15", 15, PPC_OPERAND_VSR }, 663 { "vs.16", 16, PPC_OPERAND_VSR }, 664 { "vs.17", 17, PPC_OPERAND_VSR }, 665 { "vs.18", 18, PPC_OPERAND_VSR }, 666 { "vs.19", 19, PPC_OPERAND_VSR }, 667 { "vs.2", 2, PPC_OPERAND_VSR }, 668 { "vs.20", 20, PPC_OPERAND_VSR }, 669 { "vs.21", 21, PPC_OPERAND_VSR }, 670 { "vs.22", 22, PPC_OPERAND_VSR }, 671 { "vs.23", 23, PPC_OPERAND_VSR }, 672 { "vs.24", 24, PPC_OPERAND_VSR }, 673 { "vs.25", 25, PPC_OPERAND_VSR }, 674 { "vs.26", 26, PPC_OPERAND_VSR }, 675 { "vs.27", 27, PPC_OPERAND_VSR }, 676 { "vs.28", 28, PPC_OPERAND_VSR }, 677 { "vs.29", 29, PPC_OPERAND_VSR }, 678 { "vs.3", 3, PPC_OPERAND_VSR }, 679 { "vs.30", 30, PPC_OPERAND_VSR }, 680 { "vs.31", 31, PPC_OPERAND_VSR }, 681 { "vs.32", 32, PPC_OPERAND_VSR }, 682 { "vs.33", 33, PPC_OPERAND_VSR }, 683 { "vs.34", 34, PPC_OPERAND_VSR }, 684 { "vs.35", 35, PPC_OPERAND_VSR }, 685 { "vs.36", 36, PPC_OPERAND_VSR }, 686 { "vs.37", 37, PPC_OPERAND_VSR }, 687 { "vs.38", 38, PPC_OPERAND_VSR }, 688 { "vs.39", 39, PPC_OPERAND_VSR }, 689 { "vs.4", 4, PPC_OPERAND_VSR }, 690 { "vs.40", 40, PPC_OPERAND_VSR }, 691 { "vs.41", 41, PPC_OPERAND_VSR }, 692 { "vs.42", 42, PPC_OPERAND_VSR }, 693 { "vs.43", 43, PPC_OPERAND_VSR }, 694 { "vs.44", 44, PPC_OPERAND_VSR }, 695 { "vs.45", 45, PPC_OPERAND_VSR }, 696 { "vs.46", 46, PPC_OPERAND_VSR }, 697 { "vs.47", 47, PPC_OPERAND_VSR }, 698 { "vs.48", 48, PPC_OPERAND_VSR }, 699 { "vs.49", 49, PPC_OPERAND_VSR }, 700 { "vs.5", 5, PPC_OPERAND_VSR }, 701 { "vs.50", 50, PPC_OPERAND_VSR }, 702 { "vs.51", 51, PPC_OPERAND_VSR }, 703 { "vs.52", 52, PPC_OPERAND_VSR }, 704 { "vs.53", 53, PPC_OPERAND_VSR }, 705 { "vs.54", 54, PPC_OPERAND_VSR }, 706 { "vs.55", 55, PPC_OPERAND_VSR }, 707 { "vs.56", 56, PPC_OPERAND_VSR }, 708 { "vs.57", 57, PPC_OPERAND_VSR }, 709 { "vs.58", 58, PPC_OPERAND_VSR }, 710 { "vs.59", 59, PPC_OPERAND_VSR }, 711 { "vs.6", 6, PPC_OPERAND_VSR }, 712 { "vs.60", 60, PPC_OPERAND_VSR }, 713 { "vs.61", 61, PPC_OPERAND_VSR }, 714 { "vs.62", 62, PPC_OPERAND_VSR }, 715 { "vs.63", 63, PPC_OPERAND_VSR }, 716 { "vs.7", 7, PPC_OPERAND_VSR }, 717 { "vs.8", 8, PPC_OPERAND_VSR }, 718 { "vs.9", 9, PPC_OPERAND_VSR }, 719 720 { "vs0", 0, PPC_OPERAND_VSR }, 721 { "vs1", 1, PPC_OPERAND_VSR }, 722 { "vs10", 10, PPC_OPERAND_VSR }, 723 { "vs11", 11, PPC_OPERAND_VSR }, 724 { "vs12", 12, PPC_OPERAND_VSR }, 725 { "vs13", 13, PPC_OPERAND_VSR }, 726 { "vs14", 14, PPC_OPERAND_VSR }, 727 { "vs15", 15, PPC_OPERAND_VSR }, 728 { "vs16", 16, PPC_OPERAND_VSR }, 729 { "vs17", 17, PPC_OPERAND_VSR }, 730 { "vs18", 18, PPC_OPERAND_VSR }, 731 { "vs19", 19, PPC_OPERAND_VSR }, 732 { "vs2", 2, PPC_OPERAND_VSR }, 733 { "vs20", 20, PPC_OPERAND_VSR }, 734 { "vs21", 21, PPC_OPERAND_VSR }, 735 { "vs22", 22, PPC_OPERAND_VSR }, 736 { "vs23", 23, PPC_OPERAND_VSR }, 737 { "vs24", 24, PPC_OPERAND_VSR }, 738 { "vs25", 25, PPC_OPERAND_VSR }, 739 { "vs26", 26, PPC_OPERAND_VSR }, 740 { "vs27", 27, PPC_OPERAND_VSR }, 741 { "vs28", 28, PPC_OPERAND_VSR }, 742 { "vs29", 29, PPC_OPERAND_VSR }, 743 { "vs3", 3, PPC_OPERAND_VSR }, 744 { "vs30", 30, PPC_OPERAND_VSR }, 745 { "vs31", 31, PPC_OPERAND_VSR }, 746 { "vs32", 32, PPC_OPERAND_VSR }, 747 { "vs33", 33, PPC_OPERAND_VSR }, 748 { "vs34", 34, PPC_OPERAND_VSR }, 749 { "vs35", 35, PPC_OPERAND_VSR }, 750 { "vs36", 36, PPC_OPERAND_VSR }, 751 { "vs37", 37, PPC_OPERAND_VSR }, 752 { "vs38", 38, PPC_OPERAND_VSR }, 753 { "vs39", 39, PPC_OPERAND_VSR }, 754 { "vs4", 4, PPC_OPERAND_VSR }, 755 { "vs40", 40, PPC_OPERAND_VSR }, 756 { "vs41", 41, PPC_OPERAND_VSR }, 757 { "vs42", 42, PPC_OPERAND_VSR }, 758 { "vs43", 43, PPC_OPERAND_VSR }, 759 { "vs44", 44, PPC_OPERAND_VSR }, 760 { "vs45", 45, PPC_OPERAND_VSR }, 761 { "vs46", 46, PPC_OPERAND_VSR }, 762 { "vs47", 47, PPC_OPERAND_VSR }, 763 { "vs48", 48, PPC_OPERAND_VSR }, 764 { "vs49", 49, PPC_OPERAND_VSR }, 765 { "vs5", 5, PPC_OPERAND_VSR }, 766 { "vs50", 50, PPC_OPERAND_VSR }, 767 { "vs51", 51, PPC_OPERAND_VSR }, 768 { "vs52", 52, PPC_OPERAND_VSR }, 769 { "vs53", 53, PPC_OPERAND_VSR }, 770 { "vs54", 54, PPC_OPERAND_VSR }, 771 { "vs55", 55, PPC_OPERAND_VSR }, 772 { "vs56", 56, PPC_OPERAND_VSR }, 773 { "vs57", 57, PPC_OPERAND_VSR }, 774 { "vs58", 58, PPC_OPERAND_VSR }, 775 { "vs59", 59, PPC_OPERAND_VSR }, 776 { "vs6", 6, PPC_OPERAND_VSR }, 777 { "vs60", 60, PPC_OPERAND_VSR }, 778 { "vs61", 61, PPC_OPERAND_VSR }, 779 { "vs62", 62, PPC_OPERAND_VSR }, 780 { "vs63", 63, PPC_OPERAND_VSR }, 781 { "vs7", 7, PPC_OPERAND_VSR }, 782 { "vs8", 8, PPC_OPERAND_VSR }, 783 { "vs9", 9, PPC_OPERAND_VSR }, 784 785 { "xer", 1, PPC_OPERAND_SPR } 786 }; 787 788 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg)) 789 790 /* Given NAME, find the register number associated with that name, return 791 the integer value associated with the given name or -1 on failure. */ 792 793 static const struct pd_reg * 794 reg_name_search (const struct pd_reg *regs, int regcount, const char *name) 795 { 796 int middle, low, high; 797 int cmp; 798 799 low = 0; 800 high = regcount - 1; 801 802 do 803 { 804 middle = (low + high) / 2; 805 cmp = strcasecmp (name, regs[middle].name); 806 if (cmp < 0) 807 high = middle - 1; 808 else if (cmp > 0) 809 low = middle + 1; 810 else 811 return ®s[middle]; 812 } 813 while (low <= high); 814 815 return NULL; 816 } 817 818 /* 819 * Summary of register_name. 820 * 821 * in: Input_line_pointer points to 1st char of operand. 822 * 823 * out: A expressionS. 824 * The operand may have been a register: in this case, X_op == O_register, 825 * X_add_number is set to the register number, and truth is returned. 826 * Input_line_pointer->(next non-blank) char after operand, or is in its 827 * original state. 828 */ 829 830 static bool 831 register_name (expressionS *expressionP) 832 { 833 const struct pd_reg *reg; 834 char *name; 835 char *start; 836 char c; 837 838 /* Find the spelling of the operand. */ 839 start = name = input_line_pointer; 840 if (name[0] == '%' && ISALPHA (name[1])) 841 name = ++input_line_pointer; 842 843 else if (!reg_names_p || !ISALPHA (name[0])) 844 return false; 845 846 c = get_symbol_name (&name); 847 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name); 848 849 /* Put back the delimiting char. */ 850 *input_line_pointer = c; 851 852 /* Look to see if it's in the register table. */ 853 if (reg != NULL) 854 { 855 expressionP->X_op = O_register; 856 expressionP->X_add_number = reg->value; 857 expressionP->X_md = reg->flags; 858 859 /* Make the rest nice. */ 860 expressionP->X_add_symbol = NULL; 861 expressionP->X_op_symbol = NULL; 862 return true; 863 } 864 865 /* Reset the line as if we had not done anything. */ 866 input_line_pointer = start; 867 return false; 868 } 869 870 /* This function is called for each symbol seen in an expression. It 871 handles the special parsing which PowerPC assemblers are supposed 872 to use for condition codes. */ 873 874 /* Whether to do the special parsing. */ 875 static bool cr_operand; 876 877 /* Names to recognize in a condition code. This table is sorted. */ 878 static const struct pd_reg cr_names[] = 879 { 880 { "cr0", 0, PPC_OPERAND_CR_REG }, 881 { "cr1", 1, PPC_OPERAND_CR_REG }, 882 { "cr2", 2, PPC_OPERAND_CR_REG }, 883 { "cr3", 3, PPC_OPERAND_CR_REG }, 884 { "cr4", 4, PPC_OPERAND_CR_REG }, 885 { "cr5", 5, PPC_OPERAND_CR_REG }, 886 { "cr6", 6, PPC_OPERAND_CR_REG }, 887 { "cr7", 7, PPC_OPERAND_CR_REG }, 888 { "eq", 2, PPC_OPERAND_CR_BIT }, 889 { "gt", 1, PPC_OPERAND_CR_BIT }, 890 { "lt", 0, PPC_OPERAND_CR_BIT }, 891 { "so", 3, PPC_OPERAND_CR_BIT }, 892 { "un", 3, PPC_OPERAND_CR_BIT } 893 }; 894 895 /* Parsing function. This returns non-zero if it recognized an 896 expression. */ 897 898 int 899 ppc_parse_name (const char *name, expressionS *exp) 900 { 901 const struct pd_reg *reg; 902 903 if (! cr_operand) 904 return 0; 905 906 if (*name == '%') 907 ++name; 908 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0], 909 name); 910 if (reg == NULL) 911 return 0; 912 913 exp->X_op = O_register; 914 exp->X_add_number = reg->value; 915 exp->X_md = reg->flags; 916 917 return 1; 918 } 919 920 /* Propagate X_md and check register expressions. This is to support 921 condition codes like 4*cr5+eq. */ 922 923 int 924 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right) 925 { 926 /* Accept 4*cr<n> and cr<n>*4. */ 927 if (op == O_multiply 928 && ((right->X_op == O_register 929 && right->X_md == PPC_OPERAND_CR_REG 930 && left->X_op == O_constant 931 && left->X_add_number == 4) 932 || (left->X_op == O_register 933 && left->X_md == PPC_OPERAND_CR_REG 934 && right->X_op == O_constant 935 && right->X_add_number == 4))) 936 { 937 left->X_op = O_register; 938 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT; 939 left->X_add_number *= right->X_add_number; 940 return 1; 941 } 942 943 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */ 944 if (right->X_op == O_register 945 && left->X_op == O_register 946 && op == O_add 947 && ((right->X_md == PPC_OPERAND_CR_BIT 948 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)) 949 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT) 950 && left->X_md == PPC_OPERAND_CR_BIT))) 951 { 952 left->X_md = PPC_OPERAND_CR_BIT; 953 right->X_op = O_constant; 954 return 0; 955 } 956 957 /* Accept reg +/- constant. */ 958 if (left->X_op == O_register 959 && !((op == O_add || op == O_subtract) && right->X_op == O_constant)) 960 as_warn (_("invalid register expression")); 961 962 /* Accept constant + reg. */ 963 if (right->X_op == O_register) 964 { 965 if (op == O_add && left->X_op == O_constant) 966 left->X_md = right->X_md; 967 else 968 as_warn (_("invalid register expression")); 969 } 970 971 return 0; 972 } 973 974 /* Local variables. */ 975 976 /* Whether to target xcoff64/elf64. */ 977 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64; 978 979 /* A separate obstack for use by ppc_hash, so that we can quickly 980 throw away hash table memory . */ 981 struct obstack insn_obstack; 982 983 /* Opcode hash table. */ 984 static htab_t ppc_hash; 985 986 #ifdef OBJ_ELF 987 /* What type of shared library support to use. */ 988 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE; 989 990 /* Flags to set in the elf header. */ 991 static flagword ppc_flags = 0; 992 993 /* Whether this is Solaris or not. */ 994 #ifdef TARGET_SOLARIS_COMMENT 995 #define SOLARIS_P true 996 #else 997 #define SOLARIS_P false 998 #endif 999 1000 static bool msolaris = SOLARIS_P; 1001 #endif 1002 1003 #ifdef OBJ_XCOFF 1004 1005 /* The RS/6000 assembler uses the .csect pseudo-op to generate code 1006 using a bunch of different sections. These assembler sections, 1007 however, are all encompassed within the .text, .data or .bss sections 1008 of the final output file. We handle this by using different 1009 subsegments within these main segments. 1010 .tdata and .tbss sections only have one type of csects for now, 1011 but it's better to follow the same construction like the others. */ 1012 1013 struct ppc_xcoff_section ppc_xcoff_text_section; 1014 struct ppc_xcoff_section ppc_xcoff_data_section; 1015 struct ppc_xcoff_section ppc_xcoff_bss_section; 1016 struct ppc_xcoff_section ppc_xcoff_tdata_section; 1017 struct ppc_xcoff_section ppc_xcoff_tbss_section; 1018 1019 /* Return true if the ppc_xcoff_section structure is already 1020 initialized. */ 1021 static bool 1022 ppc_xcoff_section_is_initialized (struct ppc_xcoff_section *section) 1023 { 1024 return section->segment != NULL; 1025 } 1026 1027 /* Initialize a ppc_xcoff_section. 1028 Dummy symbols are used to ensure the position of .text over .data 1029 and .tdata. Moreover, they allow all algorithms here to be sure that 1030 csects isn't NULL. These symbols won't be output. */ 1031 static void 1032 ppc_init_xcoff_section (struct ppc_xcoff_section *s, segT seg) 1033 { 1034 s->segment = seg; 1035 s->next_subsegment = 2; 1036 s->csects = symbol_make ("dummy\001"); 1037 symbol_get_tc (s->csects)->within = s->csects; 1038 } 1039 1040 /* The current csect. */ 1041 static symbolS *ppc_current_csect; 1042 1043 /* The RS/6000 assembler uses a TOC which holds addresses of functions 1044 and variables. Symbols are put in the TOC with the .tc pseudo-op. 1045 A special relocation is used when accessing TOC entries. We handle 1046 the TOC as a subsegment within the .data segment. We set it up if 1047 we see a .toc pseudo-op, and save the csect symbol here. */ 1048 static symbolS *ppc_toc_csect; 1049 1050 /* The first frag in the TOC subsegment. */ 1051 static fragS *ppc_toc_frag; 1052 1053 /* The first frag in the first subsegment after the TOC in the .data 1054 segment. NULL if there are no subsegments after the TOC. */ 1055 static fragS *ppc_after_toc_frag; 1056 1057 /* The current static block. */ 1058 static symbolS *ppc_current_block; 1059 1060 /* The COFF debugging section; set by md_begin. This is not the 1061 .debug section, but is instead the secret BFD section which will 1062 cause BFD to set the section number of a symbol to N_DEBUG. */ 1063 static asection *ppc_coff_debug_section; 1064 1065 /* Structure to set the length field of the dwarf sections. */ 1066 struct dw_subsection { 1067 /* Subsections are simply linked. */ 1068 struct dw_subsection *link; 1069 1070 /* The subsection number. */ 1071 subsegT subseg; 1072 1073 /* Expression to compute the length of the section. */ 1074 expressionS end_exp; 1075 }; 1076 1077 static struct dw_section { 1078 /* Corresponding section. */ 1079 segT sect; 1080 1081 /* Simply linked list of subsections with a label. */ 1082 struct dw_subsection *list_subseg; 1083 1084 /* The anonymous subsection. */ 1085 struct dw_subsection *anon_subseg; 1086 } dw_sections[XCOFF_DWSECT_NBR_NAMES]; 1087 #endif /* OBJ_XCOFF */ 1088 1089 #ifdef OBJ_ELF 1090 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */ 1091 unsigned long *ppc_apuinfo_list; 1092 unsigned int ppc_apuinfo_num; 1093 unsigned int ppc_apuinfo_num_alloc; 1094 #endif /* OBJ_ELF */ 1095 1096 #ifdef OBJ_ELF 1097 const char *const md_shortopts = "b:l:usm:K:VQ:"; 1098 #else 1099 const char *const md_shortopts = "um:"; 1100 #endif 1101 #define OPTION_NOPS (OPTION_MD_BASE + 0) 1102 const struct option md_longopts[] = { 1103 {"nops", required_argument, NULL, OPTION_NOPS}, 1104 {"ppc476-workaround", no_argument, &warn_476, 1}, 1105 {"no-ppc476-workaround", no_argument, &warn_476, 0}, 1106 {NULL, no_argument, NULL, 0} 1107 }; 1108 const size_t md_longopts_size = sizeof (md_longopts); 1109 1110 int 1111 md_parse_option (int c, const char *arg) 1112 { 1113 ppc_cpu_t new_cpu; 1114 1115 switch (c) 1116 { 1117 case 'u': 1118 /* -u means that any undefined symbols should be treated as 1119 external, which is the default for gas anyhow. */ 1120 break; 1121 1122 #ifdef OBJ_ELF 1123 case 'l': 1124 /* Solaris as takes -le (presumably for little endian). For completeness 1125 sake, recognize -be also. */ 1126 if (strcmp (arg, "e") == 0) 1127 { 1128 target_big_endian = 0; 1129 set_target_endian = 1; 1130 if (ppc_cpu & PPC_OPCODE_VLE) 1131 as_bad (_("the use of -mvle requires big endian.")); 1132 } 1133 else 1134 return 0; 1135 1136 break; 1137 1138 case 'b': 1139 if (strcmp (arg, "e") == 0) 1140 { 1141 target_big_endian = 1; 1142 set_target_endian = 1; 1143 } 1144 else 1145 return 0; 1146 1147 break; 1148 1149 case 'K': 1150 /* Recognize -K PIC. */ 1151 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0) 1152 { 1153 shlib = SHLIB_PIC; 1154 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1155 } 1156 else 1157 return 0; 1158 1159 break; 1160 #endif 1161 1162 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */ 1163 case 'a': 1164 if (strcmp (arg, "64") == 0) 1165 { 1166 #ifdef BFD64 1167 ppc_obj64 = 1; 1168 if (ppc_cpu & PPC_OPCODE_VLE) 1169 as_bad (_("the use of -mvle requires -a32.")); 1170 #else 1171 as_fatal (_("%s unsupported"), "-a64"); 1172 #endif 1173 } 1174 else if (strcmp (arg, "32") == 0) 1175 ppc_obj64 = 0; 1176 else 1177 return 0; 1178 break; 1179 1180 case 'm': 1181 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg); 1182 /* "raw" is only valid for the disassembler. */ 1183 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0) 1184 { 1185 ppc_cpu = new_cpu; 1186 if (strcmp (arg, "vle") == 0) 1187 { 1188 if (set_target_endian && target_big_endian == 0) 1189 as_bad (_("the use of -mvle requires big endian.")); 1190 if (ppc_obj64) 1191 as_bad (_("the use of -mvle requires -a32.")); 1192 } 1193 } 1194 1195 else if (strcmp (arg, "no-vle") == 0) 1196 { 1197 sticky &= ~PPC_OPCODE_VLE; 1198 1199 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke"); 1200 new_cpu &= ~PPC_OPCODE_VLE; 1201 1202 ppc_cpu = new_cpu; 1203 } 1204 1205 else if (strcmp (arg, "regnames") == 0) 1206 reg_names_p = true; 1207 1208 else if (strcmp (arg, "no-regnames") == 0) 1209 reg_names_p = false; 1210 1211 #ifdef OBJ_ELF 1212 /* -mrelocatable/-mrelocatable-lib -- warn about initializations 1213 that require relocation. */ 1214 else if (strcmp (arg, "relocatable") == 0) 1215 { 1216 shlib = SHLIB_MRELOCATABLE; 1217 ppc_flags |= EF_PPC_RELOCATABLE; 1218 } 1219 1220 else if (strcmp (arg, "relocatable-lib") == 0) 1221 { 1222 shlib = SHLIB_MRELOCATABLE; 1223 ppc_flags |= EF_PPC_RELOCATABLE_LIB; 1224 } 1225 1226 /* -memb, set embedded bit. */ 1227 else if (strcmp (arg, "emb") == 0) 1228 ppc_flags |= EF_PPC_EMB; 1229 1230 /* -mlittle/-mbig set the endianness. */ 1231 else if (strcmp (arg, "little") == 0 1232 || strcmp (arg, "little-endian") == 0) 1233 { 1234 target_big_endian = 0; 1235 set_target_endian = 1; 1236 if (ppc_cpu & PPC_OPCODE_VLE) 1237 as_bad (_("the use of -mvle requires big endian.")); 1238 } 1239 1240 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0) 1241 { 1242 target_big_endian = 1; 1243 set_target_endian = 1; 1244 } 1245 1246 else if (strcmp (arg, "solaris") == 0) 1247 { 1248 msolaris = true; 1249 ppc_comment_chars = ppc_solaris_comment_chars; 1250 } 1251 1252 else if (strcmp (arg, "no-solaris") == 0) 1253 { 1254 msolaris = false; 1255 ppc_comment_chars = ppc_eabi_comment_chars; 1256 } 1257 else if (strcmp (arg, "spe2") == 0) 1258 { 1259 ppc_cpu |= PPC_OPCODE_SPE2; 1260 } 1261 #endif 1262 else 1263 { 1264 as_bad (_("invalid switch -m%s"), arg); 1265 return 0; 1266 } 1267 break; 1268 1269 #ifdef OBJ_ELF 1270 /* -V: SVR4 argument to print version ID. */ 1271 case 'V': 1272 print_version_id (); 1273 break; 1274 1275 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section 1276 should be emitted or not. FIXME: Not implemented. */ 1277 case 'Q': 1278 break; 1279 1280 /* Solaris takes -s to specify that .stabs go in a .stabs section, 1281 rather than .stabs.excl, which is ignored by the linker. 1282 FIXME: Not implemented. */ 1283 case 's': 1284 if (arg) 1285 return 0; 1286 1287 break; 1288 #endif 1289 1290 case OPTION_NOPS: 1291 { 1292 char *end; 1293 nop_limit = strtoul (optarg, &end, 0); 1294 if (*end) 1295 as_bad (_("--nops needs a numeric argument")); 1296 } 1297 break; 1298 1299 case 0: 1300 break; 1301 1302 default: 1303 return 0; 1304 } 1305 1306 return 1; 1307 } 1308 1309 static int 1310 is_ppc64_target (const bfd_target *targ, void *data ATTRIBUTE_UNUSED) 1311 { 1312 switch (targ->flavour) 1313 { 1314 #ifdef OBJ_ELF 1315 case bfd_target_elf_flavour: 1316 return startswith (targ->name, "elf64-powerpc"); 1317 #endif 1318 #ifdef OBJ_XCOFF 1319 case bfd_target_xcoff_flavour: 1320 return (strcmp (targ->name, "aixcoff64-rs6000") == 0 1321 || strcmp (targ->name, "aix5coff64-rs6000") == 0); 1322 #endif 1323 default: 1324 return 0; 1325 } 1326 } 1327 1328 void 1329 md_show_usage (FILE *stream) 1330 { 1331 fprintf (stream, _("\ 1332 PowerPC options:\n")); 1333 fprintf (stream, _("\ 1334 -a32 generate ELF32/XCOFF32\n")); 1335 if (bfd_iterate_over_targets (is_ppc64_target, NULL)) 1336 fprintf (stream, _("\ 1337 -a64 generate ELF64/XCOFF64\n")); 1338 fprintf (stream, _("\ 1339 -u ignored\n")); 1340 fprintf (stream, _("\ 1341 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n")); 1342 fprintf (stream, _("\ 1343 -mpwr generate code for POWER (RIOS1)\n")); 1344 fprintf (stream, _("\ 1345 -m601 generate code for PowerPC 601\n")); 1346 fprintf (stream, _("\ 1347 -mppc, -mppc32, -m603, -m604\n\ 1348 generate code for PowerPC 603/604\n")); 1349 fprintf (stream, _("\ 1350 -m403 generate code for PowerPC 403\n")); 1351 fprintf (stream, _("\ 1352 -m405 generate code for PowerPC 405\n")); 1353 fprintf (stream, _("\ 1354 -m440 generate code for PowerPC 440\n")); 1355 fprintf (stream, _("\ 1356 -m464 generate code for PowerPC 464\n")); 1357 fprintf (stream, _("\ 1358 -m476 generate code for PowerPC 476\n")); 1359 fprintf (stream, _("\ 1360 -m7400, -m7410, -m7450, -m7455\n\ 1361 generate code for PowerPC 7400/7410/7450/7455\n")); 1362 fprintf (stream, _("\ 1363 -m750cl, -mgekko, -mbroadway\n\ 1364 generate code for PowerPC 750cl/Gekko/Broadway\n")); 1365 fprintf (stream, _("\ 1366 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n")); 1367 fprintf (stream, _("\ 1368 -mppc64, -m620 generate code for PowerPC 620/625/630\n")); 1369 fprintf (stream, _("\ 1370 -mppc64bridge generate code for PowerPC 64, including bridge insns\n")); 1371 fprintf (stream, _("\ 1372 -mbooke generate code for 32-bit PowerPC BookE\n")); 1373 fprintf (stream, _("\ 1374 -ma2 generate code for A2 architecture\n")); 1375 fprintf (stream, _("\ 1376 -mpower4, -mpwr4 generate code for Power4 architecture\n")); 1377 fprintf (stream, _("\ 1378 -mpower5, -mpwr5, -mpwr5x\n\ 1379 generate code for Power5 architecture\n")); 1380 fprintf (stream, _("\ 1381 -mpower6, -mpwr6 generate code for Power6 architecture\n")); 1382 fprintf (stream, _("\ 1383 -mpower7, -mpwr7 generate code for Power7 architecture\n")); 1384 fprintf (stream, _("\ 1385 -mpower8, -mpwr8 generate code for Power8 architecture\n")); 1386 fprintf (stream, _("\ 1387 -mpower9, -mpwr9 generate code for Power9 architecture\n")); 1388 fprintf (stream, _("\ 1389 -mpower10, -mpwr10 generate code for Power10 architecture\n")); 1390 fprintf (stream, _("\ 1391 -mcell generate code for Cell Broadband Engine architecture\n")); 1392 fprintf (stream, _("\ 1393 -mcom generate code for Power/PowerPC common instructions\n")); 1394 fprintf (stream, _("\ 1395 -many generate code for any architecture (PWR/PWRX/PPC)\n")); 1396 fprintf (stream, _("\ 1397 -maltivec generate code for AltiVec\n")); 1398 fprintf (stream, _("\ 1399 -mvsx generate code for Vector-Scalar (VSX) instructions\n")); 1400 fprintf (stream, _("\ 1401 -me300 generate code for PowerPC e300 family\n")); 1402 fprintf (stream, _("\ 1403 -me500, -me500x2 generate code for Motorola e500 core complex\n")); 1404 fprintf (stream, _("\ 1405 -me500mc, generate code for Freescale e500mc core complex\n")); 1406 fprintf (stream, _("\ 1407 -me500mc64, generate code for Freescale e500mc64 core complex\n")); 1408 fprintf (stream, _("\ 1409 -me5500, generate code for Freescale e5500 core complex\n")); 1410 fprintf (stream, _("\ 1411 -me6500, generate code for Freescale e6500 core complex\n")); 1412 fprintf (stream, _("\ 1413 -mspe generate code for Motorola SPE instructions\n")); 1414 fprintf (stream, _("\ 1415 -mspe2 generate code for Freescale SPE2 instructions\n")); 1416 fprintf (stream, _("\ 1417 -mvle generate code for Freescale VLE instructions\n")); 1418 fprintf (stream, _("\ 1419 -mtitan generate code for AppliedMicro Titan core complex\n")); 1420 fprintf (stream, _("\ 1421 -mregnames Allow symbolic names for registers\n")); 1422 fprintf (stream, _("\ 1423 -mno-regnames Do not allow symbolic names for registers\n")); 1424 #ifdef OBJ_ELF 1425 fprintf (stream, _("\ 1426 -mrelocatable support for GCC's -mrelocatble option\n")); 1427 fprintf (stream, _("\ 1428 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n")); 1429 fprintf (stream, _("\ 1430 -memb set PPC_EMB bit in ELF flags\n")); 1431 fprintf (stream, _("\ 1432 -mlittle, -mlittle-endian, -le\n\ 1433 generate code for a little endian machine\n")); 1434 fprintf (stream, _("\ 1435 -mbig, -mbig-endian, -be\n\ 1436 generate code for a big endian machine\n")); 1437 fprintf (stream, _("\ 1438 -msolaris generate code for Solaris\n")); 1439 fprintf (stream, _("\ 1440 -mno-solaris do not generate code for Solaris\n")); 1441 fprintf (stream, _("\ 1442 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n")); 1443 fprintf (stream, _("\ 1444 -V print assembler version number\n")); 1445 fprintf (stream, _("\ 1446 -Qy, -Qn ignored\n")); 1447 #endif 1448 fprintf (stream, _("\ 1449 -nops=count when aligning, more than COUNT nops uses a branch\n")); 1450 fprintf (stream, _("\ 1451 -ppc476-workaround warn if emitting data to code sections\n")); 1452 } 1453 1454 /* Set ppc_cpu if it is not already set. */ 1455 1456 static void 1457 ppc_set_cpu (void) 1458 { 1459 const char *default_os = TARGET_OS; 1460 const char *default_cpu = TARGET_CPU; 1461 1462 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0) 1463 { 1464 if (ppc_obj64) 1465 if (target_big_endian) 1466 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64; 1467 else 1468 /* The minimum supported cpu for 64-bit little-endian is power8. */ 1469 ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8"); 1470 else if (startswith (default_os, "aix") 1471 && default_os[3] >= '4' && default_os[3] <= '9') 1472 ppc_cpu |= PPC_OPCODE_COMMON; 1473 else if (startswith (default_os, "aix3")) 1474 ppc_cpu |= PPC_OPCODE_POWER; 1475 else if (strcmp (default_cpu, "rs6000") == 0) 1476 ppc_cpu |= PPC_OPCODE_POWER; 1477 else if (startswith (default_cpu, "powerpc")) 1478 ppc_cpu |= PPC_OPCODE_PPC; 1479 else 1480 as_fatal (_("unknown default cpu = %s, os = %s"), 1481 default_cpu, default_os); 1482 } 1483 } 1484 1485 /* Figure out the BFD architecture to use. This function and ppc_mach 1486 are called well before md_begin, when the output file is opened. */ 1487 1488 enum bfd_architecture 1489 ppc_arch (void) 1490 { 1491 const char *default_cpu = TARGET_CPU; 1492 ppc_set_cpu (); 1493 1494 if ((ppc_cpu & PPC_OPCODE_PPC) != 0) 1495 return bfd_arch_powerpc; 1496 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 1497 return bfd_arch_powerpc; 1498 if ((ppc_cpu & PPC_OPCODE_POWER) != 0) 1499 return bfd_arch_rs6000; 1500 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0) 1501 { 1502 if (strcmp (default_cpu, "rs6000") == 0) 1503 return bfd_arch_rs6000; 1504 else if (startswith (default_cpu, "powerpc")) 1505 return bfd_arch_powerpc; 1506 } 1507 1508 as_fatal (_("neither Power nor PowerPC opcodes were selected.")); 1509 return bfd_arch_unknown; 1510 } 1511 1512 unsigned long 1513 ppc_mach (void) 1514 { 1515 if (ppc_obj64) 1516 return bfd_mach_ppc64; 1517 else if (ppc_arch () == bfd_arch_rs6000) 1518 return bfd_mach_rs6k; 1519 else if (ppc_cpu & PPC_OPCODE_TITAN) 1520 return bfd_mach_ppc_titan; 1521 else if (ppc_cpu & PPC_OPCODE_VLE) 1522 return bfd_mach_ppc_vle; 1523 else 1524 return bfd_mach_ppc; 1525 } 1526 1527 extern const char* 1528 ppc_target_format (void) 1529 { 1530 #ifdef OBJ_COFF 1531 #if TE_POWERMAC 1532 return "xcoff-powermac"; 1533 #else 1534 # ifdef TE_AIX5 1535 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000"); 1536 # else 1537 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000"); 1538 # endif 1539 #endif 1540 #endif 1541 #ifdef OBJ_ELF 1542 # ifdef TE_FreeBSD 1543 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd"); 1544 # elif defined (TE_VXWORKS) 1545 return "elf32-powerpc-vxworks"; 1546 # else 1547 return (target_big_endian 1548 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc") 1549 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle")); 1550 # endif 1551 #endif 1552 } 1553 1554 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[]. 1555 Return TRUE if there's a problem, otherwise FALSE. */ 1556 1557 static bool 1558 insn_validate (const struct powerpc_opcode *op) 1559 { 1560 const ppc_opindex_t *o; 1561 uint64_t omask = op->mask; 1562 1563 /* The mask had better not trim off opcode bits. */ 1564 if ((op->opcode & omask) != op->opcode) 1565 { 1566 as_bad (_("mask trims opcode bits for %s"), op->name); 1567 return true; 1568 } 1569 1570 /* The operands must not overlap the opcode or each other. */ 1571 for (o = op->operands; *o; ++o) 1572 { 1573 bool optional = false; 1574 if (*o >= num_powerpc_operands) 1575 { 1576 as_bad (_("operand index error for %s"), op->name); 1577 return true; 1578 } 1579 else 1580 { 1581 uint64_t mask; 1582 const struct powerpc_operand *operand = &powerpc_operands[*o]; 1583 if (operand->shift == (int) PPC_OPSHIFT_INV) 1584 { 1585 const char *errmsg; 1586 uint64_t val; 1587 1588 errmsg = NULL; 1589 val = -1; 1590 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1591 val = -val; 1592 mask = (*operand->insert) (0, val, ppc_cpu, &errmsg); 1593 } 1594 else if (operand->shift == (int) PPC_OPSHIFT_SH6) 1595 mask = (0x1f << 11) | 0x2; 1596 else if (operand->shift >= 0) 1597 mask = operand->bitm << operand->shift; 1598 else 1599 mask = operand->bitm >> -operand->shift; 1600 if (omask & mask) 1601 { 1602 as_bad (_("operand %d overlap in %s"), 1603 (int) (o - op->operands), op->name); 1604 return true; 1605 } 1606 omask |= mask; 1607 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0) 1608 optional = true; 1609 else if (optional) 1610 { 1611 as_bad (_("non-optional operand %d follows optional operand in %s"), 1612 (int) (o - op->operands), op->name); 1613 return true; 1614 } 1615 } 1616 } 1617 return false; 1618 } 1619 1620 static void * 1621 insn_calloc (size_t n, size_t size) 1622 { 1623 size_t amt = n * size; 1624 void *ret = obstack_alloc (&insn_obstack, amt); 1625 memset (ret, 0, amt); 1626 return ret; 1627 } 1628 1629 /* Insert opcodes into hash tables. Called at startup and for 1630 .machine pseudo. */ 1631 1632 static void 1633 ppc_setup_opcodes (void) 1634 { 1635 const struct powerpc_opcode *op; 1636 const struct powerpc_opcode *op_end; 1637 bool bad_insn = false; 1638 1639 if (ppc_hash != NULL) 1640 { 1641 htab_delete (ppc_hash); 1642 _obstack_free (&insn_obstack, NULL); 1643 } 1644 1645 obstack_begin (&insn_obstack, chunksize); 1646 1647 /* Insert the opcodes into a hash table. */ 1648 ppc_hash = htab_create_alloc (5000, hash_string_tuple, eq_string_tuple, 1649 NULL, insn_calloc, NULL); 1650 1651 if (ENABLE_CHECKING) 1652 { 1653 unsigned int i; 1654 1655 /* An index into powerpc_operands is stored in struct fix 1656 fx_pcrel_adjust which is a 16 bit field. */ 1657 gas_assert (num_powerpc_operands <= PPC_OPINDEX_MAX + 1); 1658 1659 /* Check operand masks. Code here and in the disassembler assumes 1660 all the 1's in the mask are contiguous. */ 1661 for (i = 0; i < num_powerpc_operands; ++i) 1662 { 1663 uint64_t mask = powerpc_operands[i].bitm; 1664 uint64_t right_bit; 1665 unsigned int j; 1666 1667 right_bit = mask & -mask; 1668 mask += right_bit; 1669 right_bit = mask & -mask; 1670 if (mask != right_bit) 1671 { 1672 as_bad (_("powerpc_operands[%d].bitm invalid"), i); 1673 bad_insn = true; 1674 } 1675 for (j = i + 1; j < num_powerpc_operands; ++j) 1676 if (memcmp (&powerpc_operands[i], &powerpc_operands[j], 1677 sizeof (powerpc_operands[0])) == 0) 1678 { 1679 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"), 1680 j, i); 1681 bad_insn = true; 1682 } 1683 } 1684 } 1685 1686 op_end = powerpc_opcodes + powerpc_num_opcodes; 1687 for (op = powerpc_opcodes; op < op_end; op++) 1688 { 1689 if (ENABLE_CHECKING) 1690 { 1691 unsigned int new_opcode = PPC_OP (op[0].opcode); 1692 1693 #ifdef PRINT_OPCODE_TABLE 1694 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1695 op->name, (unsigned int) (op - powerpc_opcodes), 1696 new_opcode, (unsigned long long) op->opcode, 1697 (unsigned long long) op->mask, (unsigned long long) op->flags); 1698 #endif 1699 1700 /* The major opcodes had better be sorted. Code in the disassembler 1701 assumes the insns are sorted according to major opcode. */ 1702 if (op != powerpc_opcodes 1703 && new_opcode < PPC_OP (op[-1].opcode)) 1704 { 1705 as_bad (_("major opcode is not sorted for %s"), op->name); 1706 bad_insn = true; 1707 } 1708 1709 if ((op->flags & PPC_OPCODE_VLE) != 0) 1710 { 1711 as_bad (_("%s is enabled by vle flag"), op->name); 1712 bad_insn = true; 1713 } 1714 if (PPC_OP (op->opcode) != 4 1715 && PPC_OP (op->opcode) != 31 1716 && (op->deprecated & PPC_OPCODE_VLE) == 0) 1717 { 1718 as_bad (_("%s not disabled by vle flag"), op->name); 1719 bad_insn = true; 1720 } 1721 bad_insn |= insn_validate (op); 1722 } 1723 1724 if ((ppc_cpu & op->flags) != 0 1725 && !(ppc_cpu & op->deprecated) 1726 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1727 { 1728 as_bad (_("duplicate %s"), op->name); 1729 bad_insn = true; 1730 } 1731 } 1732 1733 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1734 for (op = powerpc_opcodes; op < op_end; op++) 1735 str_hash_insert (ppc_hash, op->name, op, 0); 1736 1737 op_end = prefix_opcodes + prefix_num_opcodes; 1738 for (op = prefix_opcodes; op < op_end; op++) 1739 { 1740 if (ENABLE_CHECKING) 1741 { 1742 unsigned int new_opcode = PPC_PREFIX_SEG (op[0].opcode); 1743 1744 #ifdef PRINT_OPCODE_TABLE 1745 printf ("%-14s\t#%04u\tmajor op/2: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1746 op->name, (unsigned int) (op - prefix_opcodes), 1747 new_opcode, (unsigned long long) op->opcode, 1748 (unsigned long long) op->mask, (unsigned long long) op->flags); 1749 #endif 1750 1751 /* The major opcodes had better be sorted. Code in the disassembler 1752 assumes the insns are sorted according to major opcode. */ 1753 if (op != prefix_opcodes 1754 && new_opcode < PPC_PREFIX_SEG (op[-1].opcode)) 1755 { 1756 as_bad (_("major opcode is not sorted for %s"), op->name); 1757 bad_insn = true; 1758 } 1759 bad_insn |= insn_validate (op); 1760 } 1761 1762 if ((ppc_cpu & op->flags) != 0 1763 && !(ppc_cpu & op->deprecated) 1764 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1765 { 1766 as_bad (_("duplicate %s"), op->name); 1767 bad_insn = true; 1768 } 1769 } 1770 1771 if ((ppc_cpu & PPC_OPCODE_ANY) != 0) 1772 for (op = prefix_opcodes; op < op_end; op++) 1773 str_hash_insert (ppc_hash, op->name, op, 0); 1774 1775 op_end = vle_opcodes + vle_num_opcodes; 1776 for (op = vle_opcodes; op < op_end; op++) 1777 { 1778 if (ENABLE_CHECKING) 1779 { 1780 unsigned new_seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask)); 1781 1782 #ifdef PRINT_OPCODE_TABLE 1783 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n", 1784 op->name, (unsigned int) (op - vle_opcodes), 1785 (unsigned int) new_seg, (unsigned long long) op->opcode, 1786 (unsigned long long) op->mask, (unsigned long long) op->flags); 1787 #endif 1788 1789 /* The major opcodes had better be sorted. Code in the disassembler 1790 assumes the insns are sorted according to major opcode. */ 1791 if (op != vle_opcodes 1792 && new_seg < VLE_OP_TO_SEG (VLE_OP (op[-1].opcode, op[-1].mask))) 1793 { 1794 as_bad (_("major opcode is not sorted for %s"), op->name); 1795 bad_insn = true; 1796 } 1797 1798 bad_insn |= insn_validate (op); 1799 } 1800 1801 if ((ppc_cpu & op->flags) != 0 1802 && !(ppc_cpu & op->deprecated) 1803 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1804 { 1805 as_bad (_("duplicate %s"), op->name); 1806 bad_insn = true; 1807 } 1808 } 1809 1810 /* SPE2 instructions */ 1811 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2) 1812 { 1813 op_end = spe2_opcodes + spe2_num_opcodes; 1814 for (op = spe2_opcodes; op < op_end; op++) 1815 { 1816 if (ENABLE_CHECKING) 1817 { 1818 if (op != spe2_opcodes) 1819 { 1820 unsigned old_seg, new_seg; 1821 1822 old_seg = VLE_OP (op[-1].opcode, op[-1].mask); 1823 old_seg = VLE_OP_TO_SEG (old_seg); 1824 new_seg = VLE_OP (op[0].opcode, op[0].mask); 1825 new_seg = VLE_OP_TO_SEG (new_seg); 1826 1827 /* The major opcodes had better be sorted. Code in the 1828 disassembler assumes the insns are sorted according to 1829 major opcode. */ 1830 if (new_seg < old_seg) 1831 { 1832 as_bad (_("major opcode is not sorted for %s"), op->name); 1833 bad_insn = true; 1834 } 1835 } 1836 1837 bad_insn |= insn_validate (op); 1838 } 1839 1840 if ((ppc_cpu & op->flags) != 0 1841 && !(ppc_cpu & op->deprecated) 1842 && str_hash_insert (ppc_hash, op->name, op, 0) != NULL) 1843 { 1844 as_bad (_("duplicate %s"), op->name); 1845 bad_insn = true; 1846 } 1847 } 1848 1849 for (op = spe2_opcodes; op < op_end; op++) 1850 str_hash_insert (ppc_hash, op->name, op, 0); 1851 } 1852 1853 if (bad_insn) 1854 abort (); 1855 } 1856 1857 /* This function is called when the assembler starts up. It is called 1858 after the options have been parsed and the output file has been 1859 opened. */ 1860 1861 void 1862 md_begin (void) 1863 { 1864 ppc_set_cpu (); 1865 1866 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4; 1867 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4; 1868 1869 #ifdef OBJ_ELF 1870 /* Set the ELF flags if desired. */ 1871 if (ppc_flags && !msolaris) 1872 bfd_set_private_flags (stdoutput, ppc_flags); 1873 #endif 1874 1875 ppc_setup_opcodes (); 1876 1877 /* Tell the main code what the endianness is if it is not overridden 1878 by the user. */ 1879 if (!set_target_endian) 1880 { 1881 set_target_endian = 1; 1882 target_big_endian = PPC_BIG_ENDIAN; 1883 } 1884 1885 #ifdef OBJ_XCOFF 1886 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG); 1887 1888 /* Create XCOFF sections with .text in first, as it's creating dummy symbols 1889 to serve as initial csects. This forces the text csects to precede the 1890 data csects. These symbols will not be output. */ 1891 ppc_init_xcoff_section (&ppc_xcoff_text_section, text_section); 1892 ppc_init_xcoff_section (&ppc_xcoff_data_section, data_section); 1893 ppc_init_xcoff_section (&ppc_xcoff_bss_section, bss_section); 1894 #endif 1895 } 1896 1897 void 1898 ppc_cleanup (void) 1899 { 1900 #ifdef OBJ_ELF 1901 if (ppc_apuinfo_list == NULL) 1902 return; 1903 1904 /* Ok, so write the section info out. We have this layout: 1905 1906 byte data what 1907 ---- ---- ---- 1908 0 8 length of "APUinfo\0" 1909 4 (n*4) number of APU's (4 bytes each) 1910 8 2 note type 2 1911 12 "APUinfo\0" name 1912 20 APU#1 first APU's info 1913 24 APU#2 second APU's info 1914 ... ... 1915 */ 1916 { 1917 char *p; 1918 asection *seg = now_seg; 1919 subsegT subseg = now_subseg; 1920 asection *apuinfo_secp = (asection *) NULL; 1921 unsigned int i; 1922 1923 /* Create the .PPC.EMB.apuinfo section. */ 1924 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0); 1925 bfd_set_section_flags (apuinfo_secp, SEC_HAS_CONTENTS | SEC_READONLY); 1926 1927 p = frag_more (4); 1928 md_number_to_chars (p, (valueT) 8, 4); 1929 1930 p = frag_more (4); 1931 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4); 1932 1933 p = frag_more (4); 1934 md_number_to_chars (p, (valueT) 2, 4); 1935 1936 p = frag_more (8); 1937 strcpy (p, APUINFO_LABEL); 1938 1939 for (i = 0; i < ppc_apuinfo_num; i++) 1940 { 1941 p = frag_more (4); 1942 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4); 1943 } 1944 1945 frag_align (2, 0, 0); 1946 1947 /* We probably can't restore the current segment, for there likely 1948 isn't one yet... */ 1949 if (seg && subseg) 1950 subseg_set (seg, subseg); 1951 } 1952 #endif 1953 } 1954 1955 /* Insert an operand value into an instruction. */ 1956 1957 static uint64_t 1958 ppc_insert_operand (uint64_t insn, 1959 const struct powerpc_operand *operand, 1960 int64_t val, 1961 ppc_cpu_t cpu, 1962 const char *file, 1963 unsigned int line) 1964 { 1965 int64_t min, max, right; 1966 1967 max = operand->bitm; 1968 right = max & -max; 1969 min = 0; 1970 1971 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0) 1972 { 1973 /* Extend the allowed range for addis to [-32768, 65535]. 1974 Similarly for cmpli and some VLE high part insns. For 64-bit 1975 it would be good to disable this for signed fields since the 1976 value is sign extended into the high 32 bits of the register. 1977 If the value is, say, an address, then we might care about 1978 the high bits. However, gcc as of 2014-06 uses unsigned 1979 values when loading the high part of 64-bit constants using 1980 lis. */ 1981 min = ~(max >> 1) & -right; 1982 } 1983 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 1984 { 1985 max = (max >> 1) & -right; 1986 min = ~max & -right; 1987 } 1988 1989 if ((operand->flags & PPC_OPERAND_PLUS1) != 0) 1990 max++; 1991 1992 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0) 1993 { 1994 int64_t tmp = min; 1995 min = -max; 1996 max = -tmp; 1997 } 1998 1999 if (min <= max) 2000 { 2001 /* Some people write constants with the sign extension done by 2002 hand but only up to 32 bits. This shouldn't really be valid, 2003 but, to permit this code to assemble on a 64-bit host, we 2004 sign extend the 32-bit value to 64 bits if so doing makes the 2005 value valid. We only do this for operands that are 32-bits or 2006 smaller. */ 2007 if (val > max 2008 && (operand->bitm & ~0xffffffffULL) == 0 2009 && (val - (1LL << 32)) >= min 2010 && (val - (1LL << 32)) <= max 2011 && ((val - (1LL << 32)) & (right - 1)) == 0) 2012 val = val - (1LL << 32); 2013 2014 /* Similarly, people write expressions like ~(1<<15), and expect 2015 this to be OK for a 32-bit unsigned value. */ 2016 else if (val < min 2017 && (operand->bitm & ~0xffffffffULL) == 0 2018 && (val + (1LL << 32)) >= min 2019 && (val + (1LL << 32)) <= max 2020 && ((val + (1LL << 32)) & (right - 1)) == 0) 2021 val = val + (1LL << 32); 2022 2023 else if (val < min 2024 || val > max 2025 || (val & (right - 1)) != 0) 2026 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 2027 } 2028 2029 if (operand->insert) 2030 { 2031 const char *errmsg; 2032 2033 errmsg = NULL; 2034 insn = (*operand->insert) (insn, val, cpu, &errmsg); 2035 if (errmsg != (const char *) NULL) 2036 as_bad_where (file, line, "%s", errmsg); 2037 } 2038 else if (operand->shift >= 0) 2039 insn |= (val & operand->bitm) << operand->shift; 2040 else 2041 insn |= (val & operand->bitm) >> -operand->shift; 2042 2043 return insn; 2044 } 2045 2046 2047 #ifdef OBJ_ELF 2048 /* Parse @got, etc. and return the desired relocation. */ 2049 static bfd_reloc_code_real_type 2050 ppc_elf_suffix (char **str_p, expressionS *exp_p) 2051 { 2052 struct map_bfd { 2053 const char *string; 2054 unsigned int length : 8; 2055 unsigned int valid32 : 1; 2056 unsigned int valid64 : 1; 2057 unsigned int reloc; 2058 }; 2059 2060 char ident[20]; 2061 char *str = *str_p; 2062 char *str2; 2063 int ch; 2064 int len; 2065 const struct map_bfd *ptr; 2066 2067 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 2068 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 2069 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 2070 2071 static const struct map_bfd mapping[] = { 2072 MAP ("l", BFD_RELOC_LO16), 2073 MAP ("h", BFD_RELOC_HI16), 2074 MAP ("ha", BFD_RELOC_HI16_S), 2075 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN), 2076 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN), 2077 MAP ("got", BFD_RELOC_16_GOTOFF), 2078 MAP ("got@l", BFD_RELOC_LO16_GOTOFF), 2079 MAP ("got@h", BFD_RELOC_HI16_GOTOFF), 2080 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF), 2081 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF), 2082 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF), 2083 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF), 2084 MAP ("copy", BFD_RELOC_PPC_COPY), 2085 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT), 2086 MAP ("sectoff", BFD_RELOC_16_BASEREL), 2087 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL), 2088 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL), 2089 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL), 2090 MAP ("tls", BFD_RELOC_PPC_TLS), 2091 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD), 2092 MAP ("dtprel", BFD_RELOC_PPC_DTPREL), 2093 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO), 2094 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI), 2095 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA), 2096 MAP ("tprel", BFD_RELOC_PPC_TPREL), 2097 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO), 2098 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI), 2099 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA), 2100 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16), 2101 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO), 2102 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI), 2103 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA), 2104 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16), 2105 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO), 2106 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI), 2107 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA), 2108 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16), 2109 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO), 2110 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI), 2111 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA), 2112 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16), 2113 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO), 2114 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI), 2115 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA), 2116 MAP32 ("fixup", BFD_RELOC_CTOR), 2117 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL), 2118 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL), 2119 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC), 2120 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC), 2121 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL), 2122 MAP32 ("sdarel", BFD_RELOC_GPREL16), 2123 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A), 2124 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A), 2125 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A), 2126 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32), 2127 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16), 2128 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO), 2129 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI), 2130 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA), 2131 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16), 2132 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL), 2133 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16), 2134 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21), 2135 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO), 2136 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF), 2137 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16), 2138 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO), 2139 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI), 2140 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA), 2141 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD), 2142 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA), 2143 MAP32 ("xgot", BFD_RELOC_PPC_TOC16), 2144 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH), 2145 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA), 2146 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER), 2147 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S), 2148 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST), 2149 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S), 2150 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC), 2151 MAP64 ("toc", BFD_RELOC_PPC_TOC16), 2152 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO), 2153 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI), 2154 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA), 2155 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH), 2156 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA), 2157 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER), 2158 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA), 2159 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST), 2160 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA), 2161 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL), 2162 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH), 2163 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA), 2164 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER), 2165 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA), 2166 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST), 2167 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA), 2168 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC), 2169 MAP64 ("pcrel", BFD_RELOC_PPC64_PCREL34), 2170 MAP64 ("got@pcrel", BFD_RELOC_PPC64_GOT_PCREL34), 2171 MAP64 ("plt@pcrel", BFD_RELOC_PPC64_PLT_PCREL34), 2172 MAP64 ("tls@pcrel", BFD_RELOC_PPC64_TLS_PCREL), 2173 MAP64 ("got@tlsgd@pcrel", BFD_RELOC_PPC64_GOT_TLSGD_PCREL34), 2174 MAP64 ("got@tlsld@pcrel", BFD_RELOC_PPC64_GOT_TLSLD_PCREL34), 2175 MAP64 ("got@tprel@pcrel", BFD_RELOC_PPC64_GOT_TPREL_PCREL34), 2176 MAP64 ("got@dtprel@pcrel", BFD_RELOC_PPC64_GOT_DTPREL_PCREL34), 2177 MAP64 ("higher34", BFD_RELOC_PPC64_ADDR16_HIGHER34), 2178 MAP64 ("highera34", BFD_RELOC_PPC64_ADDR16_HIGHERA34), 2179 MAP64 ("highest34", BFD_RELOC_PPC64_ADDR16_HIGHEST34), 2180 MAP64 ("highesta34", BFD_RELOC_PPC64_ADDR16_HIGHESTA34), 2181 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE } 2182 }; 2183 2184 if (*str++ != '@') 2185 return BFD_RELOC_NONE; 2186 2187 for (ch = *str, str2 = ident; 2188 (str2 < ident + sizeof (ident) - 1 2189 && (ISALNUM (ch) || ch == '@')); 2190 ch = *++str) 2191 { 2192 *str2++ = TOLOWER (ch); 2193 } 2194 2195 *str2 = '\0'; 2196 len = str2 - ident; 2197 2198 ch = ident[0]; 2199 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2200 if (ch == ptr->string[0] 2201 && len == ptr->length 2202 && memcmp (ident, ptr->string, ptr->length) == 0 2203 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2204 { 2205 int reloc = ptr->reloc; 2206 2207 if (!ppc_obj64 && (exp_p->X_op == O_big || exp_p->X_add_number != 0)) 2208 { 2209 switch (reloc) 2210 { 2211 case BFD_RELOC_16_GOTOFF: 2212 case BFD_RELOC_LO16_GOTOFF: 2213 case BFD_RELOC_HI16_GOTOFF: 2214 case BFD_RELOC_HI16_S_GOTOFF: 2215 as_warn (_("symbol+offset@%s means symbol@%s+offset"), 2216 ptr->string, ptr->string); 2217 break; 2218 2219 case BFD_RELOC_PPC_GOT_TLSGD16: 2220 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 2221 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 2222 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 2223 case BFD_RELOC_PPC_GOT_TLSLD16: 2224 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 2225 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 2226 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 2227 case BFD_RELOC_PPC_GOT_DTPREL16: 2228 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 2229 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 2230 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 2231 case BFD_RELOC_PPC_GOT_TPREL16: 2232 case BFD_RELOC_PPC_GOT_TPREL16_LO: 2233 case BFD_RELOC_PPC_GOT_TPREL16_HI: 2234 case BFD_RELOC_PPC_GOT_TPREL16_HA: 2235 as_bad (_("symbol+offset@%s not supported"), ptr->string); 2236 break; 2237 } 2238 } 2239 2240 /* Now check for identifier@suffix+constant. */ 2241 if (*str == '-' || *str == '+') 2242 { 2243 char *orig_line = input_line_pointer; 2244 expressionS new_exp; 2245 2246 input_line_pointer = str; 2247 expression (&new_exp); 2248 if (new_exp.X_op == O_constant && exp_p->X_op != O_big) 2249 { 2250 exp_p->X_add_number += new_exp.X_add_number; 2251 str = input_line_pointer; 2252 } 2253 input_line_pointer = orig_line; 2254 } 2255 *str_p = str; 2256 2257 if (reloc == (int) BFD_RELOC_PPC64_TOC 2258 && exp_p->X_op == O_symbol 2259 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0) 2260 { 2261 /* Change the symbol so that the dummy .TOC. symbol can be 2262 omitted from the object file. */ 2263 exp_p->X_add_symbol = &abs_symbol; 2264 } 2265 2266 if (reloc == BFD_RELOC_PPC64_REL24_NOTOC 2267 && (ppc_cpu & PPC_OPCODE_POWER10) == 0) 2268 reloc = BFD_RELOC_PPC64_REL24_P9NOTOC; 2269 2270 return (bfd_reloc_code_real_type) reloc; 2271 } 2272 2273 return BFD_RELOC_NONE; 2274 } 2275 2276 /* Support @got, etc. on constants emitted via .short, .int etc. */ 2277 2278 bfd_reloc_code_real_type 2279 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes) 2280 { 2281 expression (exp); 2282 if (nbytes >= 2 && *input_line_pointer == '@') 2283 return ppc_elf_suffix (&input_line_pointer, exp); 2284 return BFD_RELOC_NONE; 2285 } 2286 2287 /* Warn when emitting data to code sections, unless we are emitting 2288 a relocation that ld --ppc476-workaround uses to recognise data 2289 *and* there was an unconditional branch prior to the data. */ 2290 2291 void 2292 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED, 2293 unsigned int nbytes, fixS *fix) 2294 { 2295 if (warn_476 2296 && (now_seg->flags & SEC_CODE) != 0 2297 && (nbytes != 4 2298 || fix == NULL 2299 || !(fix->fx_r_type == BFD_RELOC_32 2300 || fix->fx_r_type == BFD_RELOC_CTOR 2301 || fix->fx_r_type == BFD_RELOC_32_PCREL) 2302 || !(last_seg == now_seg && last_subseg == now_subseg) 2303 || !((last_insn & (0x3f << 26)) == (18u << 26) 2304 || ((last_insn & (0x3f << 26)) == (16u << 26) 2305 && (last_insn & (0x14 << 21)) == (0x14 << 21)) 2306 || ((last_insn & (0x3f << 26)) == (19u << 26) 2307 && (last_insn & (0x3ff << 1)) == (16u << 1) 2308 && (last_insn & (0x14 << 21)) == (0x14 << 21))))) 2309 { 2310 /* Flag that we've warned. */ 2311 if (fix != NULL) 2312 fix->fx_tcbit = 1; 2313 2314 as_warn (_("data in executable section")); 2315 } 2316 } 2317 2318 /* Solaris pseduo op to change to the .rodata section. */ 2319 static void 2320 ppc_elf_rdata (int xxx) 2321 { 2322 char *save_line = input_line_pointer; 2323 static char section[] = ".rodata\n"; 2324 2325 /* Just pretend this is .section .rodata */ 2326 input_line_pointer = section; 2327 obj_elf_section (xxx); 2328 2329 input_line_pointer = save_line; 2330 } 2331 2332 /* Pseudo op to make file scope bss items. */ 2333 static void 2334 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED) 2335 { 2336 char *name; 2337 char c; 2338 char *p; 2339 offsetT size; 2340 symbolS *symbolP; 2341 offsetT align; 2342 segT old_sec; 2343 int old_subsec; 2344 char *pfrag; 2345 int align2; 2346 2347 c = get_symbol_name (&name); 2348 2349 /* Just after name is now '\0'. */ 2350 p = input_line_pointer; 2351 *p = c; 2352 SKIP_WHITESPACE_AFTER_NAME (); 2353 if (*input_line_pointer != ',') 2354 { 2355 as_bad (_("expected comma after symbol-name: rest of line ignored.")); 2356 ignore_rest_of_line (); 2357 return; 2358 } 2359 2360 input_line_pointer++; /* skip ',' */ 2361 if ((size = get_absolute_expression ()) < 0) 2362 { 2363 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 2364 ignore_rest_of_line (); 2365 return; 2366 } 2367 2368 /* The third argument to .lcomm is the alignment. */ 2369 if (*input_line_pointer != ',') 2370 align = 8; 2371 else 2372 { 2373 ++input_line_pointer; 2374 align = get_absolute_expression (); 2375 if (align <= 0) 2376 { 2377 as_warn (_("ignoring bad alignment")); 2378 align = 8; 2379 } 2380 } 2381 2382 *p = 0; 2383 symbolP = symbol_find_or_make (name); 2384 *p = c; 2385 2386 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 2387 { 2388 as_bad (_("ignoring attempt to re-define symbol `%s'."), 2389 S_GET_NAME (symbolP)); 2390 ignore_rest_of_line (); 2391 return; 2392 } 2393 2394 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size) 2395 { 2396 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."), 2397 S_GET_NAME (symbolP), 2398 (long) S_GET_VALUE (symbolP), 2399 (long) size); 2400 2401 ignore_rest_of_line (); 2402 return; 2403 } 2404 2405 /* Allocate_bss. */ 2406 old_sec = now_seg; 2407 old_subsec = now_subseg; 2408 if (align) 2409 { 2410 /* Convert to a power of 2 alignment. */ 2411 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2); 2412 if (align != 1) 2413 { 2414 as_bad (_("common alignment not a power of 2")); 2415 ignore_rest_of_line (); 2416 return; 2417 } 2418 } 2419 else 2420 align2 = 0; 2421 2422 record_alignment (bss_section, align2); 2423 subseg_set (bss_section, 1); 2424 if (align2) 2425 frag_align (align2, 0, 0); 2426 if (S_GET_SEGMENT (symbolP) == bss_section) 2427 symbol_get_frag (symbolP)->fr_symbol = 0; 2428 symbol_set_frag (symbolP, frag_now); 2429 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size, 2430 (char *) 0); 2431 *pfrag = 0; 2432 S_SET_SIZE (symbolP, size); 2433 S_SET_SEGMENT (symbolP, bss_section); 2434 subseg_set (old_sec, old_subsec); 2435 demand_empty_rest_of_line (); 2436 } 2437 2438 /* Pseudo op to set symbol local entry point. */ 2439 static void 2440 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED) 2441 { 2442 char *name; 2443 char c = get_symbol_name (&name); 2444 char *p; 2445 expressionS exp; 2446 symbolS *sym; 2447 asymbol *bfdsym; 2448 elf_symbol_type *elfsym; 2449 2450 p = input_line_pointer; 2451 *p = c; 2452 SKIP_WHITESPACE_AFTER_NAME (); 2453 if (*input_line_pointer != ',') 2454 { 2455 *p = 0; 2456 as_bad (_("expected comma after name `%s' in .localentry directive"), 2457 name); 2458 *p = c; 2459 ignore_rest_of_line (); 2460 return; 2461 } 2462 input_line_pointer++; 2463 expression (&exp); 2464 if (exp.X_op == O_absent) 2465 { 2466 as_bad (_("missing expression in .localentry directive")); 2467 exp.X_op = O_constant; 2468 exp.X_add_number = 0; 2469 } 2470 *p = 0; 2471 sym = symbol_find_or_make (name); 2472 *p = c; 2473 2474 if (resolve_expression (&exp) 2475 && exp.X_op == O_constant) 2476 { 2477 unsigned int encoded, ok; 2478 2479 ok = 1; 2480 if (exp.X_add_number == 1 || exp.X_add_number == 7) 2481 encoded = exp.X_add_number << STO_PPC64_LOCAL_BIT; 2482 else 2483 { 2484 encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number); 2485 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded)) 2486 { 2487 as_bad (_(".localentry expression for `%s' " 2488 "is not a valid power of 2"), S_GET_NAME (sym)); 2489 ok = 0; 2490 } 2491 } 2492 if (ok) 2493 { 2494 bfdsym = symbol_get_bfdsym (sym); 2495 elfsym = elf_symbol_from (bfdsym); 2496 gas_assert (elfsym); 2497 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK; 2498 elfsym->internal_elf_sym.st_other |= encoded; 2499 if (ppc_abiversion == 0) 2500 ppc_abiversion = 2; 2501 } 2502 } 2503 else 2504 as_bad (_(".localentry expression for `%s' " 2505 "does not evaluate to a constant"), S_GET_NAME (sym)); 2506 2507 demand_empty_rest_of_line (); 2508 } 2509 2510 /* Pseudo op to set ABI version. */ 2511 static void 2512 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED) 2513 { 2514 expressionS exp; 2515 2516 expression (&exp); 2517 if (exp.X_op == O_absent) 2518 { 2519 as_bad (_("missing expression in .abiversion directive")); 2520 exp.X_op = O_constant; 2521 exp.X_add_number = 0; 2522 } 2523 2524 if (resolve_expression (&exp) 2525 && exp.X_op == O_constant) 2526 ppc_abiversion = exp.X_add_number; 2527 else 2528 as_bad (_(".abiversion expression does not evaluate to a constant")); 2529 demand_empty_rest_of_line (); 2530 } 2531 2532 /* Parse a .gnu_attribute directive. */ 2533 static void 2534 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED) 2535 { 2536 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU); 2537 2538 /* Check validity of defined powerpc tags. */ 2539 if (tag == Tag_GNU_Power_ABI_FP 2540 || tag == Tag_GNU_Power_ABI_Vector 2541 || tag == Tag_GNU_Power_ABI_Struct_Return) 2542 { 2543 unsigned int val; 2544 2545 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag); 2546 2547 if ((tag == Tag_GNU_Power_ABI_FP && val > 15) 2548 || (tag == Tag_GNU_Power_ABI_Vector && val > 3) 2549 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2)) 2550 as_warn (_("unknown .gnu_attribute value")); 2551 } 2552 } 2553 2554 /* Set ABI version in output file. */ 2555 void 2556 ppc_elf_end (void) 2557 { 2558 if (ppc_obj64 && ppc_abiversion != 0) 2559 { 2560 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI; 2561 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI; 2562 } 2563 /* Any selection of opcodes based on ppc_cpu after gas has finished 2564 parsing the file is invalid. md_apply_fix and ppc_handle_align 2565 must select opcodes based on the machine in force at the point 2566 where the fixup or alignment frag was created, not the machine in 2567 force at the end of file. */ 2568 ppc_cpu = 0; 2569 } 2570 2571 /* Validate any relocations emitted for -mrelocatable, possibly adding 2572 fixups for word relocations in writable segments, so we can adjust 2573 them at runtime. */ 2574 static void 2575 ppc_elf_validate_fix (fixS *fixp, segT seg) 2576 { 2577 if (fixp->fx_done || fixp->fx_pcrel) 2578 return; 2579 2580 switch (shlib) 2581 { 2582 case SHLIB_NONE: 2583 case SHLIB_PIC: 2584 return; 2585 2586 case SHLIB_MRELOCATABLE: 2587 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF 2588 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF 2589 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF 2590 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 2591 && fixp->fx_r_type != BFD_RELOC_16_BASEREL 2592 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL 2593 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL 2594 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL 2595 && (seg->flags & SEC_LOAD) != 0 2596 && strcmp (segment_name (seg), ".got2") != 0 2597 && strcmp (segment_name (seg), ".dtors") != 0 2598 && strcmp (segment_name (seg), ".ctors") != 0 2599 && strcmp (segment_name (seg), ".fixup") != 0 2600 && strcmp (segment_name (seg), ".gcc_except_table") != 0 2601 && strcmp (segment_name (seg), ".eh_frame") != 0 2602 && strcmp (segment_name (seg), ".ex_shared") != 0) 2603 { 2604 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0 2605 || fixp->fx_r_type != BFD_RELOC_CTOR) 2606 { 2607 as_bad_where (fixp->fx_file, fixp->fx_line, 2608 _("relocation cannot be done when using -mrelocatable")); 2609 } 2610 } 2611 return; 2612 } 2613 } 2614 2615 /* Prevent elf_frob_file_before_adjust removing a weak undefined 2616 function descriptor sym if the corresponding code sym is used. */ 2617 2618 void 2619 ppc_frob_file_before_adjust (void) 2620 { 2621 symbolS *symp; 2622 asection *toc; 2623 2624 if (!ppc_obj64) 2625 return; 2626 2627 for (symp = symbol_rootP; symp; symp = symbol_next (symp)) 2628 { 2629 const char *name; 2630 char *dotname; 2631 symbolS *dotsym; 2632 2633 name = S_GET_NAME (symp); 2634 if (name[0] == '.') 2635 continue; 2636 2637 if (! S_IS_WEAK (symp) 2638 || S_IS_DEFINED (symp)) 2639 continue; 2640 2641 dotname = concat (".", name, (char *) NULL); 2642 dotsym = symbol_find_noref (dotname, 1); 2643 free (dotname); 2644 if (dotsym != NULL && (symbol_used_p (dotsym) 2645 || symbol_used_in_reloc_p (dotsym))) 2646 symbol_mark_used (symp); 2647 2648 } 2649 2650 toc = bfd_get_section_by_name (stdoutput, ".toc"); 2651 if (toc != NULL 2652 && toc_reloc_types != has_large_toc_reloc 2653 && bfd_section_size (toc) > 0x10000) 2654 as_warn (_("TOC section size exceeds 64k")); 2655 } 2656 2657 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be 2658 emitted. Other uses of .TOC. will cause the symbol to be marked 2659 with BSF_KEEP in md_apply_fix. */ 2660 2661 void 2662 ppc_elf_adjust_symtab (void) 2663 { 2664 if (ppc_obj64) 2665 { 2666 symbolS *symp; 2667 symp = symbol_find (".TOC."); 2668 if (symp != NULL) 2669 { 2670 asymbol *bsym = symbol_get_bfdsym (symp); 2671 if ((bsym->flags & BSF_KEEP) == 0) 2672 symbol_remove (symp, &symbol_rootP, &symbol_lastP); 2673 } 2674 } 2675 } 2676 #endif /* OBJ_ELF */ 2677 2678 #ifdef OBJ_XCOFF 2679 /* Parse XCOFF relocations. */ 2680 static bfd_reloc_code_real_type 2681 ppc_xcoff_suffix (char **str_p) 2682 { 2683 struct map_bfd { 2684 const char *string; 2685 unsigned int length : 8; 2686 unsigned int valid32 : 1; 2687 unsigned int valid64 : 1; 2688 unsigned int reloc; 2689 }; 2690 2691 char ident[20]; 2692 char *str = *str_p; 2693 char *str2; 2694 int ch; 2695 int len; 2696 const struct map_bfd *ptr; 2697 2698 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc } 2699 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc } 2700 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc } 2701 2702 static const struct map_bfd mapping[] = { 2703 MAP ("l", BFD_RELOC_PPC_TOC16_LO), 2704 MAP ("u", BFD_RELOC_PPC_TOC16_HI), 2705 MAP32 ("ie", BFD_RELOC_PPC_TLSIE), 2706 MAP32 ("ld", BFD_RELOC_PPC_TLSLD), 2707 MAP32 ("le", BFD_RELOC_PPC_TLSLE), 2708 MAP32 ("m", BFD_RELOC_PPC_TLSM), 2709 MAP32 ("ml", BFD_RELOC_PPC_TLSML), 2710 MAP64 ("ie", BFD_RELOC_PPC64_TLSIE), 2711 MAP64 ("ld", BFD_RELOC_PPC64_TLSLD), 2712 MAP64 ("le", BFD_RELOC_PPC64_TLSLE), 2713 MAP64 ("m", BFD_RELOC_PPC64_TLSM), 2714 MAP64 ("ml", BFD_RELOC_PPC64_TLSML), 2715 }; 2716 2717 if (*str++ != '@') 2718 return BFD_RELOC_NONE; 2719 2720 for (ch = *str, str2 = ident; 2721 (str2 < ident + sizeof (ident) - 1 2722 && (ISALNUM (ch) || ch == '@')); 2723 ch = *++str) 2724 { 2725 *str2++ = TOLOWER (ch); 2726 } 2727 2728 *str2 = '\0'; 2729 len = str2 - ident; 2730 2731 ch = ident[0]; 2732 for (ptr = &mapping[0]; ptr->length > 0; ptr++) 2733 if (ch == ptr->string[0] 2734 && len == ptr->length 2735 && memcmp (ident, ptr->string, ptr->length) == 0 2736 && (ppc_obj64 ? ptr->valid64 : ptr->valid32)) 2737 { 2738 *str_p = str; 2739 return (bfd_reloc_code_real_type) ptr->reloc; 2740 } 2741 2742 return BFD_RELOC_NONE; 2743 } 2744 2745 /* Restore XCOFF addis instruction to ELF format. 2746 AIX often generates addis instructions using "addis RT,D(RA)" 2747 format instead of the ELF "addis RT,RA,SI" one. 2748 On entry RT_E is at the comma after RT, D_E is at the open 2749 parenthesis after D, and RA_E is at the close parenthesis after RA. */ 2750 static void 2751 ppc_xcoff_fixup_addis (char *rt_e, char *d_e, char *ra_e) 2752 { 2753 size_t ra_size = ra_e - d_e - 1; 2754 char *save_ra = xmalloc (ra_size); 2755 2756 /* Copy RA. */ 2757 memcpy (save_ra, d_e + 1, ra_size); 2758 /* Shuffle D to make room for RA, copying the comma too. */ 2759 memmove (rt_e + ra_size + 1, rt_e, d_e - rt_e); 2760 /* Erase the trailing ')', keeping any rubbish for potential errors. */ 2761 memmove (ra_e, ra_e + 1, strlen (ra_e)); 2762 /* Write RA back. */ 2763 memcpy (rt_e + 1, save_ra, ra_size); 2764 free (save_ra); 2765 } 2766 2767 /* Support @ie, etc. on constants emitted via .short, .int etc. */ 2768 2769 bfd_reloc_code_real_type 2770 ppc_xcoff_parse_cons (expressionS *exp, unsigned int nbytes) 2771 { 2772 expression (exp); 2773 if (nbytes >= 2 && *input_line_pointer == '@') 2774 return ppc_xcoff_suffix (&input_line_pointer); 2775 2776 /* There isn't any @ symbol for default TLS relocations (R_TLS). */ 2777 if (exp->X_add_symbol != NULL 2778 && (symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_TL 2779 || symbol_get_tc (exp->X_add_symbol)->symbol_class == XMC_UL)) 2780 return (ppc_obj64 ? BFD_RELOC_PPC64_TLSGD: BFD_RELOC_PPC_TLSGD); 2781 2782 return BFD_RELOC_NONE; 2783 } 2784 2785 #endif /* OBJ_XCOFF */ 2786 2787 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 2788 /* See whether a symbol is in the TOC section. */ 2789 2790 static int 2791 ppc_is_toc_sym (symbolS *sym) 2792 { 2793 #ifdef OBJ_XCOFF 2794 return (symbol_get_tc (sym)->symbol_class == XMC_TC 2795 || symbol_get_tc (sym)->symbol_class == XMC_TE 2796 || symbol_get_tc (sym)->symbol_class == XMC_TC0); 2797 #endif 2798 #ifdef OBJ_ELF 2799 const char *sname = segment_name (S_GET_SEGMENT (sym)); 2800 if (ppc_obj64) 2801 return strcmp (sname, ".toc") == 0; 2802 else 2803 return strcmp (sname, ".got") == 0; 2804 #endif 2805 } 2806 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 2807 2808 2809 #ifdef OBJ_ELF 2810 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff)) 2811 static void 2812 ppc_apuinfo_section_add (unsigned int apu, unsigned int version) 2813 { 2814 unsigned int i; 2815 2816 /* Check we don't already exist. */ 2817 for (i = 0; i < ppc_apuinfo_num; i++) 2818 if (ppc_apuinfo_list[i] == APUID (apu, version)) 2819 return; 2820 2821 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc) 2822 { 2823 if (ppc_apuinfo_num_alloc == 0) 2824 { 2825 ppc_apuinfo_num_alloc = 4; 2826 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc); 2827 } 2828 else 2829 { 2830 ppc_apuinfo_num_alloc += 4; 2831 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list, 2832 ppc_apuinfo_num_alloc); 2833 } 2834 } 2835 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version); 2836 } 2837 #undef APUID 2838 #endif 2839 2840 /* Various frobbings of labels and their addresses. */ 2841 2842 /* Symbols labelling the current insn. */ 2843 struct insn_label_list 2844 { 2845 struct insn_label_list *next; 2846 symbolS *label; 2847 }; 2848 2849 static struct insn_label_list *insn_labels; 2850 static struct insn_label_list *free_insn_labels; 2851 2852 static void 2853 ppc_record_label (symbolS *sym) 2854 { 2855 struct insn_label_list *l; 2856 2857 if (free_insn_labels == NULL) 2858 l = XNEW (struct insn_label_list); 2859 else 2860 { 2861 l = free_insn_labels; 2862 free_insn_labels = l->next; 2863 } 2864 2865 l->label = sym; 2866 l->next = insn_labels; 2867 insn_labels = l; 2868 } 2869 2870 static void 2871 ppc_clear_labels (void) 2872 { 2873 while (insn_labels != NULL) 2874 { 2875 struct insn_label_list *l = insn_labels; 2876 insn_labels = l->next; 2877 l->next = free_insn_labels; 2878 free_insn_labels = l; 2879 } 2880 } 2881 2882 void 2883 ppc_start_line_hook (void) 2884 { 2885 ppc_clear_labels (); 2886 } 2887 2888 void 2889 ppc_new_dot_label (symbolS *sym) 2890 { 2891 ppc_record_label (sym); 2892 #ifdef OBJ_XCOFF 2893 /* Anchor this label to the current csect for relocations. */ 2894 symbol_get_tc (sym)->within = ppc_current_csect; 2895 #endif 2896 } 2897 2898 void 2899 ppc_frob_label (symbolS *sym) 2900 { 2901 ppc_record_label (sym); 2902 2903 #ifdef OBJ_XCOFF 2904 /* Set the class of a label based on where it is defined. This handles 2905 symbols without suffixes. Also, move the symbol so that it follows 2906 the csect symbol. */ 2907 if (ppc_current_csect != (symbolS *) NULL) 2908 { 2909 if (symbol_get_tc (sym)->symbol_class == -1) 2910 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class; 2911 2912 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 2913 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within, 2914 &symbol_rootP, &symbol_lastP); 2915 /* Update last csect symbol. */ 2916 symbol_get_tc (ppc_current_csect)->within = sym; 2917 2918 /* Some labels like .bs are using within differently. 2919 So avoid changing it, if it's already set. */ 2920 if (symbol_get_tc (sym)->within == NULL) 2921 symbol_get_tc (sym)->within = ppc_current_csect; 2922 } 2923 #endif 2924 2925 #ifdef OBJ_ELF 2926 dwarf2_emit_label (sym); 2927 #endif 2928 } 2929 2930 /* We need to keep a list of fixups. We can't simply generate them as 2931 we go, because that would require us to first create the frag, and 2932 that would screw up references to ``.''. */ 2933 2934 struct ppc_fixup 2935 { 2936 expressionS exp; 2937 int opindex; 2938 bfd_reloc_code_real_type reloc; 2939 }; 2940 2941 #define MAX_INSN_FIXUPS (5) 2942 2943 /* Return the field size operated on by RELOC, and whether it is 2944 pc-relative in PC_RELATIVE. */ 2945 2946 static unsigned int 2947 fixup_size (bfd_reloc_code_real_type reloc, bool *pc_relative) 2948 { 2949 unsigned int size = 0; 2950 bool pcrel = false; 2951 2952 switch (reloc) 2953 { 2954 /* This switch statement must handle all BFD_RELOC values 2955 possible in instruction fixups. As is, it handles all 2956 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c, 2957 bfd/coff-rs6000.c and bfd/coff64-rs6000.c. 2958 Overkill since data and marker relocs need not be handled 2959 here, but this way we can be sure a needed fixup reloc isn't 2960 accidentally omitted. */ 2961 case BFD_RELOC_PPC_EMB_MRKREF: 2962 case BFD_RELOC_VTABLE_ENTRY: 2963 case BFD_RELOC_VTABLE_INHERIT: 2964 break; 2965 2966 case BFD_RELOC_8: 2967 size = 1; 2968 break; 2969 2970 case BFD_RELOC_16: 2971 case BFD_RELOC_16_BASEREL: 2972 case BFD_RELOC_16_GOTOFF: 2973 case BFD_RELOC_GPREL16: 2974 case BFD_RELOC_HI16: 2975 case BFD_RELOC_HI16_BASEREL: 2976 case BFD_RELOC_HI16_GOTOFF: 2977 case BFD_RELOC_HI16_PLTOFF: 2978 case BFD_RELOC_HI16_S: 2979 case BFD_RELOC_HI16_S_BASEREL: 2980 case BFD_RELOC_HI16_S_GOTOFF: 2981 case BFD_RELOC_HI16_S_PLTOFF: 2982 case BFD_RELOC_LO16: 2983 case BFD_RELOC_LO16_BASEREL: 2984 case BFD_RELOC_LO16_GOTOFF: 2985 case BFD_RELOC_LO16_PLTOFF: 2986 case BFD_RELOC_PPC64_ADDR16_DS: 2987 case BFD_RELOC_PPC64_ADDR16_HIGH: 2988 case BFD_RELOC_PPC64_ADDR16_HIGHA: 2989 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 2990 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 2991 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 2992 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 2993 case BFD_RELOC_PPC64_ADDR16_LO_DS: 2994 case BFD_RELOC_PPC64_DTPREL16_DS: 2995 case BFD_RELOC_PPC64_DTPREL16_HIGH: 2996 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 2997 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 2998 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 2999 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 3000 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 3001 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 3002 case BFD_RELOC_PPC64_GOT16_DS: 3003 case BFD_RELOC_PPC64_GOT16_LO_DS: 3004 case BFD_RELOC_PPC64_HIGHER: 3005 case BFD_RELOC_PPC64_HIGHER_S: 3006 case BFD_RELOC_PPC64_HIGHEST: 3007 case BFD_RELOC_PPC64_HIGHEST_S: 3008 case BFD_RELOC_PPC64_PLT16_LO_DS: 3009 case BFD_RELOC_PPC64_PLTGOT16: 3010 case BFD_RELOC_PPC64_PLTGOT16_DS: 3011 case BFD_RELOC_PPC64_PLTGOT16_HA: 3012 case BFD_RELOC_PPC64_PLTGOT16_HI: 3013 case BFD_RELOC_PPC64_PLTGOT16_LO: 3014 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 3015 case BFD_RELOC_PPC64_SECTOFF_DS: 3016 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 3017 case BFD_RELOC_PPC64_TOC16_DS: 3018 case BFD_RELOC_PPC64_TOC16_HA: 3019 case BFD_RELOC_PPC64_TOC16_HI: 3020 case BFD_RELOC_PPC64_TOC16_LO: 3021 case BFD_RELOC_PPC64_TOC16_LO_DS: 3022 case BFD_RELOC_PPC64_TPREL16_DS: 3023 case BFD_RELOC_PPC64_TPREL16_HIGH: 3024 case BFD_RELOC_PPC64_TPREL16_HIGHA: 3025 case BFD_RELOC_PPC64_TPREL16_HIGHER: 3026 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 3027 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 3028 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 3029 case BFD_RELOC_PPC64_TPREL16_LO_DS: 3030 #ifdef OBJ_XCOFF 3031 case BFD_RELOC_PPC_BA16: 3032 #endif 3033 case BFD_RELOC_PPC_DTPREL16: 3034 case BFD_RELOC_PPC_DTPREL16_HA: 3035 case BFD_RELOC_PPC_DTPREL16_HI: 3036 case BFD_RELOC_PPC_DTPREL16_LO: 3037 case BFD_RELOC_PPC_EMB_NADDR16: 3038 case BFD_RELOC_PPC_EMB_NADDR16_HA: 3039 case BFD_RELOC_PPC_EMB_NADDR16_HI: 3040 case BFD_RELOC_PPC_EMB_NADDR16_LO: 3041 case BFD_RELOC_PPC_EMB_RELSDA: 3042 case BFD_RELOC_PPC_EMB_RELSEC16: 3043 case BFD_RELOC_PPC_EMB_RELST_LO: 3044 case BFD_RELOC_PPC_EMB_RELST_HI: 3045 case BFD_RELOC_PPC_EMB_RELST_HA: 3046 case BFD_RELOC_PPC_EMB_SDA2I16: 3047 case BFD_RELOC_PPC_EMB_SDA2REL: 3048 case BFD_RELOC_PPC_EMB_SDAI16: 3049 case BFD_RELOC_PPC_GOT_DTPREL16: 3050 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 3051 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 3052 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3053 case BFD_RELOC_PPC_GOT_TLSGD16: 3054 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 3055 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 3056 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 3057 case BFD_RELOC_PPC_GOT_TLSLD16: 3058 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 3059 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 3060 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 3061 case BFD_RELOC_PPC_GOT_TPREL16: 3062 case BFD_RELOC_PPC_GOT_TPREL16_HA: 3063 case BFD_RELOC_PPC_GOT_TPREL16_HI: 3064 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3065 case BFD_RELOC_PPC_TOC16: 3066 case BFD_RELOC_PPC_TOC16_HI: 3067 case BFD_RELOC_PPC_TOC16_LO: 3068 case BFD_RELOC_PPC_TPREL16: 3069 case BFD_RELOC_PPC_TPREL16_HA: 3070 case BFD_RELOC_PPC_TPREL16_HI: 3071 case BFD_RELOC_PPC_TPREL16_LO: 3072 size = 2; 3073 break; 3074 3075 case BFD_RELOC_16_PCREL: 3076 case BFD_RELOC_HI16_PCREL: 3077 case BFD_RELOC_HI16_S_PCREL: 3078 case BFD_RELOC_LO16_PCREL: 3079 case BFD_RELOC_PPC64_REL16_HIGH: 3080 case BFD_RELOC_PPC64_REL16_HIGHA: 3081 case BFD_RELOC_PPC64_REL16_HIGHER: 3082 case BFD_RELOC_PPC64_REL16_HIGHER34: 3083 case BFD_RELOC_PPC64_REL16_HIGHERA: 3084 case BFD_RELOC_PPC64_REL16_HIGHERA34: 3085 case BFD_RELOC_PPC64_REL16_HIGHEST: 3086 case BFD_RELOC_PPC64_REL16_HIGHEST34: 3087 case BFD_RELOC_PPC64_REL16_HIGHESTA: 3088 case BFD_RELOC_PPC64_REL16_HIGHESTA34: 3089 #ifdef OBJ_XCOFF 3090 case BFD_RELOC_PPC_B16: 3091 #endif 3092 case BFD_RELOC_PPC_VLE_REL8: 3093 size = 2; 3094 pcrel = true; 3095 break; 3096 3097 case BFD_RELOC_32: 3098 case BFD_RELOC_32_PLTOFF: 3099 #ifdef OBJ_XCOFF 3100 case BFD_RELOC_CTOR: 3101 #endif 3102 case BFD_RELOC_PPC64_ENTRY: 3103 case BFD_RELOC_PPC_16DX_HA: 3104 #ifndef OBJ_XCOFF 3105 case BFD_RELOC_PPC_BA16: 3106 #endif 3107 case BFD_RELOC_PPC_BA16_BRNTAKEN: 3108 case BFD_RELOC_PPC_BA16_BRTAKEN: 3109 case BFD_RELOC_PPC_BA26: 3110 case BFD_RELOC_PPC_EMB_BIT_FLD: 3111 case BFD_RELOC_PPC_EMB_NADDR32: 3112 case BFD_RELOC_PPC_EMB_SDA21: 3113 case BFD_RELOC_PPC_TLS: 3114 case BFD_RELOC_PPC_TLSGD: 3115 case BFD_RELOC_PPC_TLSLD: 3116 case BFD_RELOC_PPC_TLSLE: 3117 case BFD_RELOC_PPC_TLSIE: 3118 case BFD_RELOC_PPC_TLSM: 3119 case BFD_RELOC_PPC_TLSML: 3120 case BFD_RELOC_PPC_VLE_HA16A: 3121 case BFD_RELOC_PPC_VLE_HA16D: 3122 case BFD_RELOC_PPC_VLE_HI16A: 3123 case BFD_RELOC_PPC_VLE_HI16D: 3124 case BFD_RELOC_PPC_VLE_LO16A: 3125 case BFD_RELOC_PPC_VLE_LO16D: 3126 case BFD_RELOC_PPC_VLE_SDA21: 3127 case BFD_RELOC_PPC_VLE_SDA21_LO: 3128 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3129 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 3130 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3131 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 3132 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3133 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 3134 case BFD_RELOC_PPC64_TLS_PCREL: 3135 case BFD_RELOC_RVA: 3136 size = 4; 3137 break; 3138 3139 case BFD_RELOC_24_PLT_PCREL: 3140 case BFD_RELOC_32_PCREL: 3141 case BFD_RELOC_32_PLT_PCREL: 3142 case BFD_RELOC_PPC64_REL24_NOTOC: 3143 case BFD_RELOC_PPC64_REL24_P9NOTOC: 3144 #ifndef OBJ_XCOFF 3145 case BFD_RELOC_PPC_B16: 3146 #endif 3147 case BFD_RELOC_PPC_B16_BRNTAKEN: 3148 case BFD_RELOC_PPC_B16_BRTAKEN: 3149 case BFD_RELOC_PPC_B26: 3150 case BFD_RELOC_PPC_LOCAL24PC: 3151 case BFD_RELOC_PPC_REL16DX_HA: 3152 case BFD_RELOC_PPC_VLE_REL15: 3153 case BFD_RELOC_PPC_VLE_REL24: 3154 size = 4; 3155 pcrel = true; 3156 break; 3157 3158 #ifndef OBJ_XCOFF 3159 case BFD_RELOC_CTOR: 3160 #endif 3161 case BFD_RELOC_PPC_COPY: 3162 case BFD_RELOC_PPC_DTPMOD: 3163 case BFD_RELOC_PPC_DTPREL: 3164 case BFD_RELOC_PPC_GLOB_DAT: 3165 case BFD_RELOC_PPC_TPREL: 3166 size = ppc_obj64 ? 8 : 4; 3167 break; 3168 3169 case BFD_RELOC_64: 3170 case BFD_RELOC_64_PLTOFF: 3171 case BFD_RELOC_PPC64_ADDR64_LOCAL: 3172 case BFD_RELOC_PPC64_D28: 3173 case BFD_RELOC_PPC64_D34: 3174 case BFD_RELOC_PPC64_D34_LO: 3175 case BFD_RELOC_PPC64_D34_HI30: 3176 case BFD_RELOC_PPC64_D34_HA30: 3177 case BFD_RELOC_PPC64_TPREL34: 3178 case BFD_RELOC_PPC64_DTPREL34: 3179 case BFD_RELOC_PPC64_TOC: 3180 case BFD_RELOC_PPC64_TLSGD: 3181 case BFD_RELOC_PPC64_TLSLD: 3182 case BFD_RELOC_PPC64_TLSLE: 3183 case BFD_RELOC_PPC64_TLSIE: 3184 case BFD_RELOC_PPC64_TLSM: 3185 case BFD_RELOC_PPC64_TLSML: 3186 size = 8; 3187 break; 3188 3189 case BFD_RELOC_64_PCREL: 3190 case BFD_RELOC_64_PLT_PCREL: 3191 case BFD_RELOC_PPC64_GOT_PCREL34: 3192 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 3193 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 3194 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 3195 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 3196 case BFD_RELOC_PPC64_PCREL28: 3197 case BFD_RELOC_PPC64_PCREL34: 3198 case BFD_RELOC_PPC64_PLT_PCREL34: 3199 size = 8; 3200 pcrel = true; 3201 break; 3202 3203 default: 3204 abort (); 3205 } 3206 3207 if (ENABLE_CHECKING) 3208 { 3209 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc); 3210 if (reloc_howto != NULL 3211 && (size != bfd_get_reloc_size (reloc_howto) 3212 || pcrel != reloc_howto->pc_relative)) 3213 { 3214 as_bad (_("%s howto doesn't match size/pcrel in gas"), 3215 reloc_howto->name); 3216 abort (); 3217 } 3218 } 3219 *pc_relative = pcrel; 3220 return size; 3221 } 3222 3223 #ifdef OBJ_ELF 3224 /* If we have parsed a call to __tls_get_addr, parse an argument like 3225 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg 3226 is successfully parsed, *STR is updated past the trailing 3227 parenthesis and trailing white space, and *TLS_FIX contains the 3228 reloc and arg expression. */ 3229 3230 static int 3231 parse_tls_arg (char **str, const expressionS *exp, struct ppc_fixup *tls_fix) 3232 { 3233 const char *sym_name = S_GET_NAME (exp->X_add_symbol); 3234 if (sym_name[0] == '.') 3235 ++sym_name; 3236 3237 tls_fix->reloc = BFD_RELOC_NONE; 3238 if (strncasecmp (sym_name, "__tls_get_addr", 14) == 0 3239 && (sym_name[14] == 0 3240 || strcasecmp (sym_name + 14, "_desc") == 0 3241 || strcasecmp (sym_name + 14, "_opt") == 0)) 3242 { 3243 char *hold = input_line_pointer; 3244 input_line_pointer = *str + 1; 3245 expression (&tls_fix->exp); 3246 if (tls_fix->exp.X_op == O_symbol) 3247 { 3248 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0) 3249 tls_fix->reloc = BFD_RELOC_PPC_TLSGD; 3250 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0) 3251 tls_fix->reloc = BFD_RELOC_PPC_TLSLD; 3252 if (tls_fix->reloc != BFD_RELOC_NONE) 3253 { 3254 input_line_pointer += 7; 3255 SKIP_WHITESPACE (); 3256 *str = input_line_pointer; 3257 } 3258 } 3259 input_line_pointer = hold; 3260 } 3261 return tls_fix->reloc != BFD_RELOC_NONE; 3262 } 3263 #endif 3264 3265 /* This routine is called for each instruction to be assembled. */ 3266 3267 void 3268 md_assemble (char *str) 3269 { 3270 char *s; 3271 const struct powerpc_opcode *opcode; 3272 uint64_t insn; 3273 const ppc_opindex_t *opindex_ptr; 3274 int need_paren; 3275 int next_opindex; 3276 struct ppc_fixup fixups[MAX_INSN_FIXUPS]; 3277 int fc; 3278 char *f; 3279 int addr_mask; 3280 int i; 3281 unsigned int insn_length; 3282 3283 /* Get the opcode. */ 3284 for (s = str; *s != '\0' && ! ISSPACE (*s); s++) 3285 ; 3286 if (*s != '\0') 3287 *s++ = '\0'; 3288 3289 /* Look up the opcode in the hash table. */ 3290 opcode = (const struct powerpc_opcode *) str_hash_find (ppc_hash, str); 3291 if (opcode == (const struct powerpc_opcode *) NULL) 3292 { 3293 as_bad (_("unrecognized opcode: `%s'"), str); 3294 ppc_clear_labels (); 3295 return; 3296 } 3297 3298 insn = opcode->opcode; 3299 if (!target_big_endian 3300 && ((insn & ~(1 << 26)) == 46u << 26 3301 || (insn & ~(0xc0 << 1)) == (31u << 26 | 533 << 1))) 3302 { 3303 /* lmw, stmw, lswi, lswx, stswi, stswx */ 3304 as_bad (_("`%s' invalid when little-endian"), str); 3305 ppc_clear_labels (); 3306 return; 3307 } 3308 3309 str = s; 3310 while (ISSPACE (*str)) 3311 ++str; 3312 3313 #ifdef OBJ_XCOFF 3314 /* AIX often generates addis instructions using "addis RT, D(RA)" 3315 format instead of the classic "addis RT, RA, SI" one. 3316 Restore it to the default format as it's the one encoded 3317 in ppc opcodes. */ 3318 if (!strcmp (opcode->name, "addis")) 3319 { 3320 char *rt_e = strchr (str, ','); 3321 if (rt_e != NULL 3322 && strchr (rt_e + 1, ',') == NULL) 3323 { 3324 char *d_e = strchr (rt_e + 1, '('); 3325 if (d_e != NULL && d_e != rt_e + 1) 3326 { 3327 char *ra_e = strrchr (d_e + 1, ')'); 3328 if (ra_e != NULL && ra_e != d_e + 1) 3329 ppc_xcoff_fixup_addis (rt_e, d_e, ra_e); 3330 } 3331 } 3332 } 3333 #endif 3334 3335 /* PowerPC operands are just expressions. The only real issue is 3336 that a few operand types are optional. If an instruction has 3337 multiple optional operands and one is omitted, then all optional 3338 operands past the first omitted one must also be omitted. */ 3339 int num_optional_operands = 0; 3340 int num_optional_provided = 0; 3341 3342 /* Gather the operands. */ 3343 need_paren = 0; 3344 next_opindex = 0; 3345 fc = 0; 3346 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++) 3347 { 3348 const struct powerpc_operand *operand; 3349 const char *errmsg; 3350 char *hold; 3351 expressionS ex; 3352 char endc; 3353 3354 if (next_opindex == 0) 3355 operand = &powerpc_operands[*opindex_ptr]; 3356 else 3357 { 3358 operand = &powerpc_operands[next_opindex]; 3359 next_opindex = 0; 3360 } 3361 errmsg = NULL; 3362 3363 /* If this is an optional operand, and we are skipping it, just 3364 insert the default value, usually a zero. */ 3365 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0 3366 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)) 3367 { 3368 if (num_optional_operands == 0) 3369 { 3370 const ppc_opindex_t *optr; 3371 int total = 0; 3372 int provided = 0; 3373 int omitted; 3374 3375 s = str; 3376 for (optr = opindex_ptr; *optr != 0; optr++) 3377 { 3378 const struct powerpc_operand *op; 3379 op = &powerpc_operands[*optr]; 3380 3381 ++total; 3382 3383 if ((op->flags & PPC_OPERAND_OPTIONAL) != 0 3384 && !((op->flags & PPC_OPERAND_OPTIONAL32) != 0 3385 && ppc_obj64)) 3386 ++num_optional_operands; 3387 3388 if (s != NULL && *s != '\0') 3389 { 3390 ++provided; 3391 3392 /* Look for the start of the next operand. */ 3393 if ((op->flags & PPC_OPERAND_PARENS) != 0) 3394 s = strpbrk (s, "(,"); 3395 else 3396 s = strchr (s, ','); 3397 3398 if (s != NULL) 3399 ++s; 3400 } 3401 } 3402 omitted = total - provided; 3403 num_optional_provided = num_optional_operands - omitted; 3404 } 3405 if (--num_optional_provided < 0) 3406 { 3407 uint64_t val = ppc_optional_operand_value (operand, insn, ppc_cpu, 3408 num_optional_provided); 3409 if (operand->insert) 3410 { 3411 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg); 3412 if (errmsg != (const char *) NULL) 3413 as_bad ("%s", errmsg); 3414 } 3415 else if (operand->shift >= 0) 3416 insn |= (val & operand->bitm) << operand->shift; 3417 else 3418 insn |= (val & operand->bitm) >> -operand->shift; 3419 3420 if ((operand->flags & PPC_OPERAND_NEXT) != 0) 3421 next_opindex = *opindex_ptr + 1; 3422 continue; 3423 } 3424 } 3425 3426 /* Gather the operand. */ 3427 hold = input_line_pointer; 3428 input_line_pointer = str; 3429 3430 if ((reg_names_p 3431 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0) 3432 || ((operand->flags & PPC_OPERAND_CR_REG) != 0))) 3433 || !register_name (&ex)) 3434 { 3435 char save_lex = lex_type['%']; 3436 3437 if (((operand->flags & PPC_OPERAND_CR_REG) != 0) 3438 || (operand->flags & PPC_OPERAND_CR_BIT) != 0) 3439 { 3440 cr_operand = true; 3441 lex_type['%'] |= LEX_BEGIN_NAME; 3442 } 3443 expression (&ex); 3444 cr_operand = false; 3445 lex_type['%'] = save_lex; 3446 } 3447 3448 str = input_line_pointer; 3449 input_line_pointer = hold; 3450 3451 if (ex.X_op == O_illegal) 3452 as_bad (_("illegal operand")); 3453 else if (ex.X_op == O_absent) 3454 as_bad (_("missing operand")); 3455 else if (ex.X_op == O_register) 3456 { 3457 if ((ex.X_md 3458 & ~operand->flags 3459 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR 3460 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG 3461 | PPC_OPERAND_SPR | PPC_OPERAND_GQR | PPC_OPERAND_ACC)) != 0 3462 && !((ex.X_md & PPC_OPERAND_GPR) != 0 3463 && ex.X_add_number != 0 3464 && (operand->flags & PPC_OPERAND_GPR_0) != 0)) 3465 as_warn (_("invalid register expression")); 3466 insn = ppc_insert_operand (insn, operand, ex.X_add_number, 3467 ppc_cpu, (char *) NULL, 0); 3468 } 3469 else if (ex.X_op == O_constant 3470 || (ex.X_op == O_big && ex.X_add_number > 0)) 3471 { 3472 uint64_t val; 3473 if (ex.X_op == O_constant) 3474 { 3475 val = ex.X_add_number; 3476 if (sizeof (ex.X_add_number) < sizeof (val) 3477 && (ex.X_add_number < 0) != ex.X_extrabit) 3478 val = val ^ ((addressT) -1 ^ (uint64_t) -1); 3479 } 3480 else 3481 val = generic_bignum_to_int64 (); 3482 #ifdef OBJ_ELF 3483 /* Allow @HA, @L, @H on constants. */ 3484 char *orig_str = str; 3485 bfd_reloc_code_real_type reloc = ppc_elf_suffix (&str, &ex); 3486 3487 if (ex.X_op == O_constant) 3488 { 3489 val = ex.X_add_number; 3490 if (sizeof (ex.X_add_number) < sizeof (val) 3491 && (ex.X_add_number < 0) != ex.X_extrabit) 3492 val = val ^ ((addressT) -1 ^ (uint64_t) -1); 3493 } 3494 if (reloc != BFD_RELOC_NONE) 3495 switch (reloc) 3496 { 3497 default: 3498 str = orig_str; 3499 break; 3500 3501 case BFD_RELOC_LO16: 3502 val &= 0xffff; 3503 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3504 val = SEX16 (val); 3505 break; 3506 3507 case BFD_RELOC_HI16: 3508 if (REPORT_OVERFLOW_HI && ppc_obj64) 3509 { 3510 /* PowerPC64 @h is tested for overflow. */ 3511 val = val >> 16; 3512 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3513 { 3514 uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; 3515 val = (val ^ sign) - sign; 3516 } 3517 break; 3518 } 3519 /* Fallthru */ 3520 3521 case BFD_RELOC_PPC64_ADDR16_HIGH: 3522 val = PPC_HI (val); 3523 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3524 val = SEX16 (val); 3525 break; 3526 3527 case BFD_RELOC_HI16_S: 3528 if (REPORT_OVERFLOW_HI && ppc_obj64) 3529 { 3530 /* PowerPC64 @ha is tested for overflow. */ 3531 val = (val + 0x8000) >> 16; 3532 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3533 { 3534 uint64_t sign = (((uint64_t) -1 >> 16) + 1) >> 1; 3535 val = (val ^ sign) - sign; 3536 } 3537 break; 3538 } 3539 /* Fallthru */ 3540 3541 case BFD_RELOC_PPC64_ADDR16_HIGHA: 3542 val = PPC_HA (val); 3543 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3544 val = SEX16 (val); 3545 break; 3546 3547 case BFD_RELOC_PPC64_HIGHER: 3548 val = PPC_HIGHER (val); 3549 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3550 val = SEX16 (val); 3551 break; 3552 3553 case BFD_RELOC_PPC64_HIGHER_S: 3554 val = PPC_HIGHERA (val); 3555 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3556 val = SEX16 (val); 3557 break; 3558 3559 case BFD_RELOC_PPC64_HIGHEST: 3560 val = PPC_HIGHEST (val); 3561 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3562 val = SEX16 (val); 3563 break; 3564 3565 case BFD_RELOC_PPC64_HIGHEST_S: 3566 val = PPC_HIGHESTA (val); 3567 if ((operand->flags & PPC_OPERAND_SIGNED) != 0) 3568 val = SEX16 (val); 3569 break; 3570 } 3571 #endif /* OBJ_ELF */ 3572 insn = ppc_insert_operand (insn, operand, val, ppc_cpu, NULL, 0); 3573 } 3574 else 3575 { 3576 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE; 3577 #ifdef OBJ_ELF 3578 /* Look for a __tls_get_addr arg using the insane old syntax. */ 3579 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 3580 && parse_tls_arg (&str, &ex, &fixups[fc])) 3581 { 3582 fixups[fc].opindex = *opindex_ptr; 3583 ++fc; 3584 } 3585 3586 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE) 3587 { 3588 /* If VLE-mode convert LO/HI/HA relocations. */ 3589 if (opcode->flags & PPC_OPCODE_VLE) 3590 { 3591 uint64_t tmp_insn = insn & opcode->mask; 3592 3593 int use_a_reloc = (tmp_insn == E_OR2I_INSN 3594 || tmp_insn == E_AND2I_DOT_INSN 3595 || tmp_insn == E_OR2IS_INSN 3596 || tmp_insn == E_LI_INSN 3597 || tmp_insn == E_LIS_INSN 3598 || tmp_insn == E_AND2IS_DOT_INSN); 3599 3600 3601 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN 3602 || tmp_insn == E_ADD2IS_INSN 3603 || tmp_insn == E_CMP16I_INSN 3604 || tmp_insn == E_MULL2I_INSN 3605 || tmp_insn == E_CMPL16I_INSN 3606 || tmp_insn == E_CMPH16I_INSN 3607 || tmp_insn == E_CMPHL16I_INSN); 3608 3609 switch (reloc) 3610 { 3611 default: 3612 break; 3613 3614 case BFD_RELOC_PPC_EMB_SDA21: 3615 reloc = BFD_RELOC_PPC_VLE_SDA21; 3616 break; 3617 3618 case BFD_RELOC_LO16: 3619 if (use_d_reloc) 3620 reloc = BFD_RELOC_PPC_VLE_LO16D; 3621 else if (use_a_reloc) 3622 reloc = BFD_RELOC_PPC_VLE_LO16A; 3623 break; 3624 3625 case BFD_RELOC_HI16: 3626 if (use_d_reloc) 3627 reloc = BFD_RELOC_PPC_VLE_HI16D; 3628 else if (use_a_reloc) 3629 reloc = BFD_RELOC_PPC_VLE_HI16A; 3630 break; 3631 3632 case BFD_RELOC_HI16_S: 3633 if (use_d_reloc) 3634 reloc = BFD_RELOC_PPC_VLE_HA16D; 3635 else if (use_a_reloc) 3636 reloc = BFD_RELOC_PPC_VLE_HA16A; 3637 break; 3638 3639 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 3640 if (use_d_reloc) 3641 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D; 3642 break; 3643 3644 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 3645 if (use_d_reloc) 3646 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D; 3647 break; 3648 3649 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 3650 if (use_d_reloc) 3651 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D; 3652 break; 3653 } 3654 } 3655 3656 /* TLS and other tweaks. */ 3657 switch (reloc) 3658 { 3659 default: 3660 break; 3661 3662 case BFD_RELOC_PPC_TLS: 3663 case BFD_RELOC_PPC64_TLS_PCREL: 3664 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0)) 3665 as_bad (_("@tls may not be used with \"%s\" operands"), 3666 opcode->name); 3667 else if (operand->shift != 11) 3668 as_bad (_("@tls may only be used in last operand")); 3669 else 3670 insn = ppc_insert_operand (insn, operand, 3671 ppc_obj64 ? 13 : 2, 3672 ppc_cpu, (char *) NULL, 0); 3673 break; 3674 3675 /* We'll only use the 32 (or 64) bit form of these relocations 3676 in constants. Instructions get the 16 or 34 bit form. */ 3677 case BFD_RELOC_PPC_DTPREL: 3678 if (operand->bitm == 0x3ffffffffULL) 3679 reloc = BFD_RELOC_PPC64_DTPREL34; 3680 else 3681 reloc = BFD_RELOC_PPC_DTPREL16; 3682 break; 3683 3684 case BFD_RELOC_PPC_TPREL: 3685 if (operand->bitm == 0x3ffffffffULL) 3686 reloc = BFD_RELOC_PPC64_TPREL34; 3687 else 3688 reloc = BFD_RELOC_PPC_TPREL16; 3689 break; 3690 3691 case BFD_RELOC_PPC64_PCREL34: 3692 if (operand->bitm == 0xfffffffULL) 3693 { 3694 reloc = BFD_RELOC_PPC64_PCREL28; 3695 break; 3696 } 3697 /* Fall through. */ 3698 case BFD_RELOC_PPC64_GOT_PCREL34: 3699 case BFD_RELOC_PPC64_PLT_PCREL34: 3700 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 3701 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 3702 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 3703 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 3704 if (operand->bitm != 0x3ffffffffULL 3705 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3706 as_warn (_("%s unsupported on this instruction"), "@pcrel"); 3707 break; 3708 3709 case BFD_RELOC_LO16: 3710 if (operand->bitm == 0x3ffffffffULL 3711 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3712 reloc = BFD_RELOC_PPC64_D34_LO; 3713 else if ((operand->bitm | 0xf) != 0xffff 3714 || operand->shift != 0 3715 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3716 as_warn (_("%s unsupported on this instruction"), "@l"); 3717 break; 3718 3719 case BFD_RELOC_HI16: 3720 if (operand->bitm == 0x3ffffffffULL 3721 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3722 reloc = BFD_RELOC_PPC64_D34_HI30; 3723 else if (operand->bitm != 0xffff 3724 || operand->shift != 0 3725 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3726 as_warn (_("%s unsupported on this instruction"), "@h"); 3727 break; 3728 3729 case BFD_RELOC_HI16_S: 3730 if (operand->bitm == 0x3ffffffffULL 3731 && (operand->flags & PPC_OPERAND_NEGATIVE) == 0) 3732 reloc = BFD_RELOC_PPC64_D34_HA30; 3733 else if (operand->bitm == 0xffff 3734 && operand->shift == (int) PPC_OPSHIFT_INV 3735 && opcode->opcode == (19 << 26) + (2 << 1)) 3736 /* addpcis. */ 3737 reloc = BFD_RELOC_PPC_16DX_HA; 3738 else if (operand->bitm != 0xffff 3739 || operand->shift != 0 3740 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0) 3741 as_warn (_("%s unsupported on this instruction"), "@ha"); 3742 } 3743 } 3744 #endif /* OBJ_ELF */ 3745 #ifdef OBJ_XCOFF 3746 reloc = ppc_xcoff_suffix (&str); 3747 #endif /* OBJ_XCOFF */ 3748 3749 if (reloc != BFD_RELOC_NONE) 3750 ; 3751 /* Determine a BFD reloc value based on the operand information. 3752 We are only prepared to turn a few of the operands into 3753 relocs. */ 3754 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3755 | PPC_OPERAND_ABSOLUTE)) != 0 3756 && operand->bitm == 0x3fffffc 3757 && operand->shift == 0) 3758 reloc = BFD_RELOC_PPC_B26; 3759 else if ((operand->flags & (PPC_OPERAND_RELATIVE 3760 | PPC_OPERAND_ABSOLUTE)) != 0 3761 && operand->bitm == 0xfffc 3762 && operand->shift == 0) 3763 reloc = BFD_RELOC_PPC_B16; 3764 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3765 && operand->bitm == 0x1fe 3766 && operand->shift == -1) 3767 reloc = BFD_RELOC_PPC_VLE_REL8; 3768 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3769 && operand->bitm == 0xfffe 3770 && operand->shift == 0) 3771 reloc = BFD_RELOC_PPC_VLE_REL15; 3772 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0 3773 && operand->bitm == 0x1fffffe 3774 && operand->shift == 0) 3775 reloc = BFD_RELOC_PPC_VLE_REL24; 3776 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0 3777 && (operand->bitm & 0xfff0) == 0xfff0 3778 && operand->shift == 0) 3779 { 3780 reloc = BFD_RELOC_16; 3781 #if defined OBJ_XCOFF || defined OBJ_ELF 3782 /* Note: the symbol may be not yet defined. */ 3783 if ((operand->flags & PPC_OPERAND_PARENS) != 0 3784 && ppc_is_toc_sym (ex.X_add_symbol)) 3785 { 3786 reloc = BFD_RELOC_PPC_TOC16; 3787 #ifdef OBJ_ELF 3788 as_warn (_("assuming %s on symbol"), 3789 ppc_obj64 ? "@toc" : "@xgot"); 3790 #endif 3791 } 3792 #endif 3793 } 3794 else if (operand->bitm == 0x3ffffffffULL) 3795 reloc = BFD_RELOC_PPC64_D34; 3796 else if (operand->bitm == 0xfffffffULL) 3797 reloc = BFD_RELOC_PPC64_D28; 3798 3799 /* For the absolute forms of branches, convert the PC 3800 relative form back into the absolute. */ 3801 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0) 3802 { 3803 switch (reloc) 3804 { 3805 case BFD_RELOC_PPC_B26: 3806 reloc = BFD_RELOC_PPC_BA26; 3807 break; 3808 case BFD_RELOC_PPC_B16: 3809 reloc = BFD_RELOC_PPC_BA16; 3810 break; 3811 #ifdef OBJ_ELF 3812 case BFD_RELOC_PPC_B16_BRTAKEN: 3813 reloc = BFD_RELOC_PPC_BA16_BRTAKEN; 3814 break; 3815 case BFD_RELOC_PPC_B16_BRNTAKEN: 3816 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN; 3817 break; 3818 #endif 3819 default: 3820 break; 3821 } 3822 } 3823 3824 #ifdef OBJ_ELF 3825 switch (reloc) 3826 { 3827 case BFD_RELOC_PPC_TOC16: 3828 toc_reloc_types |= has_small_toc_reloc; 3829 break; 3830 case BFD_RELOC_PPC64_TOC16_LO: 3831 case BFD_RELOC_PPC64_TOC16_HI: 3832 case BFD_RELOC_PPC64_TOC16_HA: 3833 toc_reloc_types |= has_large_toc_reloc; 3834 break; 3835 default: 3836 break; 3837 } 3838 3839 if (ppc_obj64 3840 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0) 3841 { 3842 switch (reloc) 3843 { 3844 case BFD_RELOC_16: 3845 reloc = BFD_RELOC_PPC64_ADDR16_DS; 3846 break; 3847 3848 case BFD_RELOC_LO16: 3849 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS; 3850 break; 3851 3852 case BFD_RELOC_16_GOTOFF: 3853 reloc = BFD_RELOC_PPC64_GOT16_DS; 3854 break; 3855 3856 case BFD_RELOC_LO16_GOTOFF: 3857 reloc = BFD_RELOC_PPC64_GOT16_LO_DS; 3858 break; 3859 3860 case BFD_RELOC_LO16_PLTOFF: 3861 reloc = BFD_RELOC_PPC64_PLT16_LO_DS; 3862 break; 3863 3864 case BFD_RELOC_16_BASEREL: 3865 reloc = BFD_RELOC_PPC64_SECTOFF_DS; 3866 break; 3867 3868 case BFD_RELOC_LO16_BASEREL: 3869 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS; 3870 break; 3871 3872 case BFD_RELOC_PPC_TOC16: 3873 reloc = BFD_RELOC_PPC64_TOC16_DS; 3874 break; 3875 3876 case BFD_RELOC_PPC64_TOC16_LO: 3877 reloc = BFD_RELOC_PPC64_TOC16_LO_DS; 3878 break; 3879 3880 case BFD_RELOC_PPC64_PLTGOT16: 3881 reloc = BFD_RELOC_PPC64_PLTGOT16_DS; 3882 break; 3883 3884 case BFD_RELOC_PPC64_PLTGOT16_LO: 3885 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS; 3886 break; 3887 3888 case BFD_RELOC_PPC_DTPREL16: 3889 reloc = BFD_RELOC_PPC64_DTPREL16_DS; 3890 break; 3891 3892 case BFD_RELOC_PPC_DTPREL16_LO: 3893 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS; 3894 break; 3895 3896 case BFD_RELOC_PPC_TPREL16: 3897 reloc = BFD_RELOC_PPC64_TPREL16_DS; 3898 break; 3899 3900 case BFD_RELOC_PPC_TPREL16_LO: 3901 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS; 3902 break; 3903 3904 case BFD_RELOC_PPC_GOT_DTPREL16: 3905 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 3906 case BFD_RELOC_PPC_GOT_TPREL16: 3907 case BFD_RELOC_PPC_GOT_TPREL16_LO: 3908 break; 3909 3910 default: 3911 as_bad (_("unsupported relocation for DS offset field")); 3912 break; 3913 } 3914 } 3915 3916 /* Look for a __tls_get_addr arg after any __tls_get_addr 3917 modifiers like @plt. This fixup must be emitted before 3918 the usual call fixup. */ 3919 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS 3920 && parse_tls_arg (&str, &ex, &fixups[fc])) 3921 { 3922 fixups[fc].opindex = *opindex_ptr; 3923 ++fc; 3924 } 3925 #endif 3926 3927 /* We need to generate a fixup for this expression. */ 3928 if (fc >= MAX_INSN_FIXUPS) 3929 as_fatal (_("too many fixups")); 3930 fixups[fc].exp = ex; 3931 fixups[fc].opindex = *opindex_ptr; 3932 fixups[fc].reloc = reloc; 3933 ++fc; 3934 } 3935 3936 if (need_paren) 3937 { 3938 endc = ')'; 3939 need_paren = 0; 3940 /* If expecting more operands, then we want to see "),". */ 3941 if (*str == endc && opindex_ptr[1] != 0) 3942 { 3943 do 3944 ++str; 3945 while (ISSPACE (*str)); 3946 endc = ','; 3947 } 3948 } 3949 else if ((operand->flags & PPC_OPERAND_PARENS) != 0) 3950 endc = '('; 3951 else 3952 endc = ','; 3953 3954 /* The call to expression should have advanced str past any 3955 whitespace. */ 3956 if (*str == endc) 3957 { 3958 ++str; 3959 if (endc == '(') 3960 need_paren = 1; 3961 } 3962 else if (*str != '\0') 3963 { 3964 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc); 3965 break; 3966 } 3967 else if (endc == ')') 3968 { 3969 as_bad (_("syntax error; end of line, expected `%c'"), endc); 3970 break; 3971 } 3972 } 3973 3974 while (ISSPACE (*str)) 3975 ++str; 3976 3977 if (*str != '\0') 3978 as_bad (_("junk at end of line: `%s'"), str); 3979 3980 #ifdef OBJ_ELF 3981 /* Do we need/want an APUinfo section? */ 3982 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0 3983 && !ppc_obj64) 3984 { 3985 /* These are all version "1". */ 3986 if (opcode->flags & PPC_OPCODE_SPE) 3987 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1); 3988 if (opcode->flags & PPC_OPCODE_ISEL) 3989 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1); 3990 if (opcode->flags & PPC_OPCODE_EFS) 3991 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1); 3992 if (opcode->flags & PPC_OPCODE_BRLOCK) 3993 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1); 3994 if (opcode->flags & PPC_OPCODE_PMR) 3995 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1); 3996 if (opcode->flags & PPC_OPCODE_CACHELCK) 3997 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1); 3998 if (opcode->flags & PPC_OPCODE_RFMCI) 3999 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1); 4000 /* Only set the VLE flag if the instruction has been pulled via 4001 the VLE instruction set. This way the flag is guaranteed to 4002 be set for VLE-only instructions or for VLE-only processors, 4003 however it'll remain clear for dual-mode instructions on 4004 dual-mode and, more importantly, standard-mode processors. */ 4005 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE) 4006 { 4007 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1); 4008 if (elf_section_data (now_seg) != NULL) 4009 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE; 4010 } 4011 } 4012 #endif 4013 4014 /* Write out the instruction. */ 4015 4016 addr_mask = 3; 4017 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 4018 /* All instructions can start on a 2 byte boundary for VLE. */ 4019 addr_mask = 1; 4020 4021 if (frag_now->insn_addr != addr_mask) 4022 { 4023 /* Don't emit instructions to a frag started for data, or for a 4024 CPU differing in VLE mode. Data is allowed to be misaligned, 4025 and it's possible to start a new frag in the middle of 4026 misaligned data. */ 4027 frag_wane (frag_now); 4028 frag_new (0); 4029 } 4030 4031 /* Check that insns within the frag are aligned. ppc_frag_check 4032 will ensure that the frag start address is aligned. */ 4033 if ((frag_now_fix () & addr_mask) != 0) 4034 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1); 4035 4036 /* Differentiate between two, four, and eight byte insns. */ 4037 insn_length = 4; 4038 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn)) 4039 insn_length = 2; 4040 else if ((opcode->flags & PPC_OPCODE_POWER10) != 0 4041 && PPC_PREFIX_P (insn)) 4042 { 4043 struct insn_label_list *l; 4044 4045 insn_length = 8; 4046 4047 /* 8-byte prefix instructions are not allowed to cross 64-byte 4048 boundaries. */ 4049 frag_align_code (6, 4); 4050 record_alignment (now_seg, 6); 4051 #ifdef OBJ_XCOFF 4052 /* Update alignment of the containing csect. */ 4053 if (symbol_get_tc (ppc_current_csect)->align < 6) 4054 symbol_get_tc (ppc_current_csect)->align = 6; 4055 #endif 4056 4057 /* Update "dot" in any expressions used by this instruction, and 4058 a label attached to the instruction. By "attached" we mean 4059 on the same source line as the instruction and without any 4060 intervening semicolons. */ 4061 dot_value = frag_now_fix (); 4062 dot_frag = frag_now; 4063 for (l = insn_labels; l != NULL; l = l->next) 4064 { 4065 symbol_set_frag (l->label, dot_frag); 4066 S_SET_VALUE (l->label, dot_value); 4067 } 4068 } 4069 4070 ppc_clear_labels (); 4071 4072 f = frag_more (insn_length); 4073 frag_now->insn_addr = addr_mask; 4074 4075 /* The prefix part of an 8-byte instruction always occupies the lower 4076 addressed word in a doubleword, regardless of endianness. */ 4077 if (insn_length == 8 4078 && (sizeof (insn) > sizeof (valueT) || !target_big_endian)) 4079 { 4080 md_number_to_chars (f, PPC_GET_PREFIX (insn), 4); 4081 md_number_to_chars (f + 4, PPC_GET_SUFFIX (insn), 4); 4082 } 4083 else 4084 md_number_to_chars (f, insn, insn_length); 4085 4086 last_insn = insn; 4087 last_seg = now_seg; 4088 last_subseg = now_subseg; 4089 4090 #ifdef OBJ_ELF 4091 dwarf2_emit_insn (insn_length); 4092 #endif 4093 4094 /* Create any fixups. */ 4095 for (i = 0; i < fc; i++) 4096 { 4097 fixS *fixP; 4098 if (fixups[i].reloc != BFD_RELOC_NONE) 4099 { 4100 bool pcrel; 4101 unsigned int size = fixup_size (fixups[i].reloc, &pcrel); 4102 int offset = target_big_endian ? (insn_length - size) : 0; 4103 4104 fixP = fix_new_exp (frag_now, 4105 f - frag_now->fr_literal + offset, 4106 size, 4107 &fixups[i].exp, 4108 pcrel, 4109 fixups[i].reloc); 4110 } 4111 else 4112 { 4113 const struct powerpc_operand *operand; 4114 4115 operand = &powerpc_operands[fixups[i].opindex]; 4116 fixP = fix_new_exp (frag_now, 4117 f - frag_now->fr_literal, 4118 insn_length, 4119 &fixups[i].exp, 4120 (operand->flags & PPC_OPERAND_RELATIVE) != 0, 4121 BFD_RELOC_NONE); 4122 } 4123 fixP->fx_pcrel_adjust = fixups[i].opindex; 4124 } 4125 } 4126 4127 #ifdef OBJ_ELF 4128 /* For ELF, add support for SHT_ORDERED. */ 4129 4130 int 4131 ppc_section_type (char *str, size_t len) 4132 { 4133 if (len == 7 && startswith (str, "ordered")) 4134 return SHT_ORDERED; 4135 4136 return -1; 4137 } 4138 4139 int 4140 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type) 4141 { 4142 if (type == SHT_ORDERED) 4143 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES; 4144 4145 return flags; 4146 } 4147 4148 bfd_vma 4149 ppc_elf_section_letter (int letter, const char **ptrmsg) 4150 { 4151 if (letter == 'v') 4152 return SHF_PPC_VLE; 4153 4154 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string"); 4155 return -1; 4156 } 4157 #endif /* OBJ_ELF */ 4158 4159 4160 /* Pseudo-op handling. */ 4161 4162 /* The .byte pseudo-op. This is similar to the normal .byte 4163 pseudo-op, but it can also take a single ASCII string. */ 4164 4165 static void 4166 ppc_byte (int ignore ATTRIBUTE_UNUSED) 4167 { 4168 int count = 0; 4169 4170 if (*input_line_pointer != '\"') 4171 { 4172 cons (1); 4173 return; 4174 } 4175 4176 /* Gather characters. A real double quote is doubled. Unusual 4177 characters are not permitted. */ 4178 ++input_line_pointer; 4179 while (1) 4180 { 4181 char c; 4182 4183 c = *input_line_pointer++; 4184 4185 if (c == '\"') 4186 { 4187 if (*input_line_pointer != '\"') 4188 break; 4189 ++input_line_pointer; 4190 } 4191 4192 FRAG_APPEND_1_CHAR (c); 4193 ++count; 4194 } 4195 4196 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0) 4197 as_warn (_("data in executable section")); 4198 demand_empty_rest_of_line (); 4199 } 4200 4201 #ifdef OBJ_XCOFF 4202 4203 /* XCOFF specific pseudo-op handling. */ 4204 4205 /* This is set if we are creating a .stabx symbol, since we don't want 4206 to handle symbol suffixes for such symbols. */ 4207 static bool ppc_stab_symbol; 4208 4209 /* Retrieve the visiblity input for pseudo-ops having ones. */ 4210 static unsigned short 4211 ppc_xcoff_get_visibility (void) { 4212 SKIP_WHITESPACE(); 4213 4214 if (startswith (input_line_pointer, "exported")) 4215 { 4216 input_line_pointer += 8; 4217 return SYM_V_EXPORTED; 4218 } 4219 4220 if (startswith (input_line_pointer, "hidden")) 4221 { 4222 input_line_pointer += 6; 4223 return SYM_V_HIDDEN; 4224 } 4225 4226 if (startswith (input_line_pointer, "internal")) 4227 { 4228 input_line_pointer += 8; 4229 return SYM_V_INTERNAL; 4230 } 4231 4232 if (startswith (input_line_pointer, "protected")) 4233 { 4234 input_line_pointer += 9; 4235 return SYM_V_PROTECTED; 4236 } 4237 4238 return 0; 4239 } 4240 4241 /* Retrieve visiblity using GNU syntax. */ 4242 static void ppc_GNU_visibility (int visibility) { 4243 int c; 4244 char *name; 4245 symbolS *symbolP; 4246 coff_symbol_type *coffsym; 4247 4248 do 4249 { 4250 if ((name = read_symbol_name ()) == NULL) 4251 break; 4252 symbolP = symbol_find_or_make (name); 4253 coffsym = coffsymbol (symbol_get_bfdsym (symbolP)); 4254 4255 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4256 coffsym->native->u.syment.n_type |= visibility; 4257 4258 c = *input_line_pointer; 4259 if (c == ',') 4260 { 4261 input_line_pointer ++; 4262 4263 SKIP_WHITESPACE (); 4264 4265 if (*input_line_pointer == '\n') 4266 c = '\n'; 4267 } 4268 } 4269 while (c == ','); 4270 4271 demand_empty_rest_of_line (); 4272 } 4273 4274 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common 4275 symbols in the .bss segment as though they were local common 4276 symbols, and uses a different smclas. The native Aix 4.3.3 assembler 4277 aligns .comm and .lcomm to 4 bytes. 4278 Symbols having a XMC_UL storage class are uninialized thread-local 4279 data. */ 4280 4281 static void 4282 ppc_comm (int lcomm) 4283 { 4284 asection *current_seg = now_seg; 4285 subsegT current_subseg = now_subseg; 4286 char *name; 4287 char endc; 4288 char *end_name; 4289 offsetT size; 4290 offsetT align; 4291 symbolS *lcomm_sym = NULL; 4292 symbolS *sym; 4293 char *pfrag; 4294 unsigned short visibility = 0; 4295 struct ppc_xcoff_section *section; 4296 4297 endc = get_symbol_name (&name); 4298 end_name = input_line_pointer; 4299 (void) restore_line_pointer (endc); 4300 4301 if (*input_line_pointer != ',') 4302 { 4303 as_bad (_("missing size")); 4304 ignore_rest_of_line (); 4305 return; 4306 } 4307 ++input_line_pointer; 4308 4309 size = get_absolute_expression (); 4310 if (size < 0) 4311 { 4312 as_bad (_("negative size")); 4313 ignore_rest_of_line (); 4314 return; 4315 } 4316 4317 if (! lcomm) 4318 { 4319 /* The third argument to .comm is the alignment. */ 4320 if (*input_line_pointer != ',') 4321 align = 2; 4322 else 4323 { 4324 ++input_line_pointer; 4325 align = get_absolute_expression (); 4326 if (align <= 0) 4327 { 4328 as_warn (_("ignoring bad alignment")); 4329 align = 2; 4330 } 4331 4332 /* The fourth argument to .comm is the visibility. */ 4333 if (*input_line_pointer == ',') 4334 { 4335 input_line_pointer++; 4336 visibility = ppc_xcoff_get_visibility (); 4337 if (!visibility) 4338 { 4339 as_bad (_("Unknown visibility field in .comm")); 4340 ignore_rest_of_line (); 4341 return; 4342 } 4343 } 4344 } 4345 } 4346 else 4347 { 4348 char *lcomm_name; 4349 char lcomm_endc; 4350 4351 /* The third argument to .lcomm appears to be the real local 4352 common symbol to create. References to the symbol named in 4353 the first argument are turned into references to the third 4354 argument. */ 4355 if (*input_line_pointer != ',') 4356 { 4357 as_bad (_("missing real symbol name")); 4358 ignore_rest_of_line (); 4359 return; 4360 } 4361 ++input_line_pointer; 4362 4363 lcomm_endc = get_symbol_name (&lcomm_name); 4364 4365 lcomm_sym = symbol_find_or_make (lcomm_name); 4366 4367 (void) restore_line_pointer (lcomm_endc); 4368 4369 /* The fourth argument to .lcomm is the alignment. */ 4370 if (*input_line_pointer != ',') 4371 { 4372 if (size <= 4) 4373 align = 2; 4374 else 4375 align = 3; 4376 } 4377 else 4378 { 4379 ++input_line_pointer; 4380 align = get_absolute_expression (); 4381 if (align <= 0) 4382 { 4383 as_warn (_("ignoring bad alignment")); 4384 align = 2; 4385 } 4386 } 4387 } 4388 4389 *end_name = '\0'; 4390 sym = symbol_find_or_make (name); 4391 *end_name = endc; 4392 4393 if (S_IS_DEFINED (sym) 4394 || S_GET_VALUE (sym) != 0) 4395 { 4396 as_bad (_("attempt to redefine symbol")); 4397 ignore_rest_of_line (); 4398 return; 4399 } 4400 4401 if (symbol_get_tc (sym)->symbol_class == XMC_UL 4402 || (lcomm && symbol_get_tc (lcomm_sym)->symbol_class == XMC_UL)) 4403 { 4404 section = &ppc_xcoff_tbss_section; 4405 if (!ppc_xcoff_section_is_initialized (section)) 4406 { 4407 ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); 4408 bfd_set_section_flags (section->segment, 4409 SEC_ALLOC | SEC_THREAD_LOCAL); 4410 seg_info (section->segment)->bss = 1; 4411 } 4412 } 4413 else 4414 section = &ppc_xcoff_bss_section; 4415 4416 record_alignment (section->segment, align); 4417 4418 if (! lcomm 4419 || ! S_IS_DEFINED (lcomm_sym)) 4420 { 4421 symbolS *def_sym; 4422 offsetT def_size; 4423 4424 if (! lcomm) 4425 { 4426 def_sym = sym; 4427 def_size = size; 4428 S_SET_EXTERNAL (sym); 4429 } 4430 else 4431 { 4432 symbol_get_tc (lcomm_sym)->output = 1; 4433 def_sym = lcomm_sym; 4434 def_size = 0; 4435 } 4436 4437 subseg_set (section->segment, 1); 4438 frag_align (align, 0, 0); 4439 4440 symbol_set_frag (def_sym, frag_now); 4441 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym, 4442 def_size, (char *) NULL); 4443 *pfrag = 0; 4444 S_SET_SEGMENT (def_sym, section->segment); 4445 symbol_get_tc (def_sym)->align = align; 4446 } 4447 else if (lcomm) 4448 { 4449 /* Align the size of lcomm_sym. */ 4450 symbol_get_frag (lcomm_sym)->fr_offset = 4451 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1) 4452 &~ ((1 << align) - 1)); 4453 if (align > symbol_get_tc (lcomm_sym)->align) 4454 symbol_get_tc (lcomm_sym)->align = align; 4455 } 4456 4457 if (lcomm) 4458 { 4459 /* Make sym an offset from lcomm_sym. */ 4460 S_SET_SEGMENT (sym, section->segment); 4461 symbol_set_frag (sym, symbol_get_frag (lcomm_sym)); 4462 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset); 4463 symbol_get_frag (lcomm_sym)->fr_offset += size; 4464 } 4465 4466 if (!lcomm && visibility) 4467 { 4468 /* Add visibility to .comm symbol. */ 4469 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4470 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4471 coffsym->native->u.syment.n_type |= visibility; 4472 } 4473 4474 subseg_set (current_seg, current_subseg); 4475 4476 demand_empty_rest_of_line (); 4477 } 4478 4479 /* The .csect pseudo-op. This switches us into a different 4480 subsegment. The first argument is a symbol whose value is the 4481 start of the .csect. In COFF, csect symbols get special aux 4482 entries defined by the x_csect field of union internal_auxent. The 4483 optional second argument is the alignment (the default is 2). */ 4484 4485 static void 4486 ppc_csect (int ignore ATTRIBUTE_UNUSED) 4487 { 4488 char *name; 4489 char endc; 4490 symbolS *sym; 4491 offsetT align; 4492 4493 endc = get_symbol_name (&name); 4494 4495 sym = symbol_find_or_make (name); 4496 4497 (void) restore_line_pointer (endc); 4498 4499 if (S_GET_NAME (sym)[0] == '\0') 4500 { 4501 /* An unnamed csect is assumed to be [PR]. */ 4502 symbol_get_tc (sym)->symbol_class = XMC_PR; 4503 } 4504 4505 align = 2; 4506 if (*input_line_pointer == ',') 4507 { 4508 ++input_line_pointer; 4509 align = get_absolute_expression (); 4510 } 4511 4512 ppc_change_csect (sym, align); 4513 4514 demand_empty_rest_of_line (); 4515 } 4516 4517 /* Change to a different csect. */ 4518 4519 static void 4520 ppc_change_csect (symbolS *sym, offsetT align) 4521 { 4522 if (S_IS_DEFINED (sym)) 4523 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg); 4524 else 4525 { 4526 struct ppc_xcoff_section *section; 4527 int after_toc; 4528 int hold_chunksize; 4529 symbolS *list; 4530 int is_code; 4531 segT sec; 4532 4533 /* This is a new csect. We need to look at the symbol class to 4534 figure out whether it should go in the text section or the 4535 data section. */ 4536 after_toc = 0; 4537 is_code = 0; 4538 switch (symbol_get_tc (sym)->symbol_class) 4539 { 4540 case XMC_PR: 4541 case XMC_RO: 4542 case XMC_DB: 4543 case XMC_GL: 4544 case XMC_XO: 4545 case XMC_SV: 4546 case XMC_TI: 4547 case XMC_TB: 4548 section = &ppc_xcoff_text_section; 4549 is_code = 1; 4550 break; 4551 case XMC_RW: 4552 case XMC_TC0: 4553 case XMC_TC: 4554 case XMC_TE: 4555 case XMC_DS: 4556 case XMC_UA: 4557 case XMC_UC: 4558 section = &ppc_xcoff_data_section; 4559 if (ppc_toc_csect != NULL 4560 && (symbol_get_tc (ppc_toc_csect)->subseg + 1 4561 == section->next_subsegment)) 4562 after_toc = 1; 4563 break; 4564 case XMC_BS: 4565 section = &ppc_xcoff_bss_section; 4566 break; 4567 case XMC_TL: 4568 section = &ppc_xcoff_tdata_section; 4569 /* Create .tdata section if not yet done. */ 4570 if (!ppc_xcoff_section_is_initialized (section)) 4571 { 4572 ppc_init_xcoff_section (section, subseg_new (".tdata", 0)); 4573 bfd_set_section_flags (section->segment, SEC_ALLOC 4574 | SEC_LOAD | SEC_RELOC | SEC_DATA 4575 | SEC_THREAD_LOCAL); 4576 } 4577 break; 4578 case XMC_UL: 4579 section = &ppc_xcoff_tbss_section; 4580 /* Create .tbss section if not yet done. */ 4581 if (!ppc_xcoff_section_is_initialized (section)) 4582 { 4583 ppc_init_xcoff_section (section, subseg_new (".tbss", 0)); 4584 bfd_set_section_flags (section->segment, SEC_ALLOC | 4585 SEC_THREAD_LOCAL); 4586 seg_info (section->segment)->bss = 1; 4587 } 4588 break; 4589 default: 4590 abort (); 4591 } 4592 4593 S_SET_SEGMENT (sym, section->segment); 4594 symbol_get_tc (sym)->subseg = section->next_subsegment; 4595 ++section->next_subsegment; 4596 4597 /* We set the obstack chunk size to a small value before 4598 changing subsegments, so that we don't use a lot of memory 4599 space for what may be a small section. */ 4600 hold_chunksize = chunksize; 4601 chunksize = 64; 4602 4603 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)), 4604 symbol_get_tc (sym)->subseg); 4605 4606 chunksize = hold_chunksize; 4607 4608 if (after_toc) 4609 ppc_after_toc_frag = frag_now; 4610 4611 record_alignment (sec, align); 4612 if (is_code) 4613 frag_align_code (align, 0); 4614 else 4615 frag_align (align, 0, 0); 4616 4617 symbol_set_frag (sym, frag_now); 4618 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 4619 4620 symbol_get_tc (sym)->align = align; 4621 symbol_get_tc (sym)->output = 1; 4622 symbol_get_tc (sym)->within = sym; 4623 4624 for (list = section->csects; 4625 symbol_get_tc (list)->next != (symbolS *) NULL; 4626 list = symbol_get_tc (list)->next) 4627 ; 4628 symbol_get_tc (list)->next = sym; 4629 4630 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 4631 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 4632 &symbol_lastP); 4633 } 4634 4635 ppc_current_csect = sym; 4636 } 4637 4638 static void 4639 ppc_change_debug_section (unsigned int idx, subsegT subseg) 4640 { 4641 segT sec; 4642 flagword oldflags; 4643 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx]; 4644 4645 sec = subseg_new (dw->xcoff_name, subseg); 4646 oldflags = bfd_section_flags (sec); 4647 if (oldflags == SEC_NO_FLAGS) 4648 { 4649 /* Just created section. */ 4650 gas_assert (dw_sections[idx].sect == NULL); 4651 4652 bfd_set_section_flags (sec, SEC_DEBUGGING); 4653 bfd_set_section_alignment (sec, 0); 4654 dw_sections[idx].sect = sec; 4655 } 4656 4657 /* Not anymore in a csect. */ 4658 ppc_current_csect = NULL; 4659 } 4660 4661 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is: 4662 .dwsect flag [, opt-label ] 4663 */ 4664 4665 static void 4666 ppc_dwsect (int ignore ATTRIBUTE_UNUSED) 4667 { 4668 valueT flag; 4669 symbolS *opt_label; 4670 const struct xcoff_dwsect_name *dw; 4671 struct dw_subsection *subseg; 4672 struct dw_section *dws; 4673 int i; 4674 4675 /* Find section. */ 4676 flag = get_absolute_expression (); 4677 dw = NULL; 4678 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 4679 if (xcoff_dwsect_names[i].flag == flag) 4680 { 4681 dw = &xcoff_dwsect_names[i]; 4682 break; 4683 } 4684 4685 /* Parse opt-label. */ 4686 if (*input_line_pointer == ',') 4687 { 4688 char *label; 4689 char c; 4690 4691 ++input_line_pointer; 4692 4693 c = get_symbol_name (&label); 4694 opt_label = symbol_find_or_make (label); 4695 (void) restore_line_pointer (c); 4696 } 4697 else 4698 opt_label = NULL; 4699 4700 demand_empty_rest_of_line (); 4701 4702 /* Return now in case of unknown subsection. */ 4703 if (dw == NULL) 4704 { 4705 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"), 4706 (unsigned)flag); 4707 return; 4708 } 4709 4710 /* Find the subsection. */ 4711 dws = &dw_sections[i]; 4712 subseg = NULL; 4713 if (opt_label != NULL && S_IS_DEFINED (opt_label)) 4714 { 4715 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */ 4716 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect) 4717 { 4718 as_bad (_("label %s was not defined in this dwarf section"), 4719 S_GET_NAME (opt_label)); 4720 subseg = dws->anon_subseg; 4721 opt_label = NULL; 4722 } 4723 else 4724 subseg = symbol_get_tc (opt_label)->u.dw; 4725 } 4726 4727 if (subseg != NULL) 4728 { 4729 /* Switch to the subsection. */ 4730 ppc_change_debug_section (i, subseg->subseg); 4731 } 4732 else 4733 { 4734 /* Create a new dw subsection. */ 4735 subseg = XCNEW (struct dw_subsection); 4736 4737 if (opt_label == NULL) 4738 { 4739 /* The anonymous one. */ 4740 subseg->subseg = 0; 4741 subseg->link = NULL; 4742 dws->anon_subseg = subseg; 4743 } 4744 else 4745 { 4746 /* A named one. */ 4747 if (dws->list_subseg != NULL) 4748 subseg->subseg = dws->list_subseg->subseg + 1; 4749 else 4750 subseg->subseg = 1; 4751 4752 subseg->link = dws->list_subseg; 4753 dws->list_subseg = subseg; 4754 symbol_get_tc (opt_label)->u.dw = subseg; 4755 } 4756 4757 ppc_change_debug_section (i, subseg->subseg); 4758 4759 if (dw->def_size) 4760 { 4761 /* Add the length field. */ 4762 expressionS *exp = &subseg->end_exp; 4763 int sz; 4764 4765 if (opt_label != NULL) 4766 symbol_set_value_now (opt_label); 4767 4768 /* Add the length field. Note that according to the AIX assembler 4769 manual, the size of the length field is 4 for powerpc32 but 4770 12 for powerpc64. */ 4771 if (ppc_obj64) 4772 { 4773 /* Write the 64bit marker. */ 4774 md_number_to_chars (frag_more (4), -1, 4); 4775 } 4776 4777 exp->X_op = O_subtract; 4778 exp->X_op_symbol = symbol_temp_new_now (); 4779 exp->X_add_symbol = symbol_temp_make (); 4780 4781 sz = ppc_obj64 ? 8 : 4; 4782 exp->X_add_number = -sz; 4783 emit_expr (exp, sz); 4784 } 4785 } 4786 } 4787 4788 /* This function handles the .text and .data pseudo-ops. These 4789 pseudo-ops aren't really used by XCOFF; we implement them for the 4790 convenience of people who aren't used to XCOFF. */ 4791 4792 static void 4793 ppc_section (int type) 4794 { 4795 const char *name; 4796 symbolS *sym; 4797 4798 if (type == 't') 4799 name = ".text[PR]"; 4800 else if (type == 'd') 4801 name = ".data[RW]"; 4802 else 4803 abort (); 4804 4805 sym = symbol_find_or_make (name); 4806 4807 ppc_change_csect (sym, 2); 4808 4809 demand_empty_rest_of_line (); 4810 } 4811 4812 /* This function handles the .section pseudo-op. This is mostly to 4813 give an error, since XCOFF only supports .text, .data and .bss, but 4814 we do permit the user to name the text or data section. */ 4815 4816 static void 4817 ppc_named_section (int ignore ATTRIBUTE_UNUSED) 4818 { 4819 char *user_name; 4820 const char *real_name; 4821 char c; 4822 symbolS *sym; 4823 4824 c = get_symbol_name (&user_name); 4825 4826 if (strcmp (user_name, ".text") == 0) 4827 real_name = ".text[PR]"; 4828 else if (strcmp (user_name, ".data") == 0) 4829 real_name = ".data[RW]"; 4830 else 4831 { 4832 as_bad (_("the XCOFF file format does not support arbitrary sections")); 4833 (void) restore_line_pointer (c); 4834 ignore_rest_of_line (); 4835 return; 4836 } 4837 4838 (void) restore_line_pointer (c); 4839 4840 sym = symbol_find_or_make (real_name); 4841 4842 ppc_change_csect (sym, 2); 4843 4844 demand_empty_rest_of_line (); 4845 } 4846 4847 /* The .extern pseudo-op. We create an undefined symbol. */ 4848 4849 static void 4850 ppc_extern (int ignore ATTRIBUTE_UNUSED) 4851 { 4852 char *name; 4853 symbolS *sym; 4854 4855 if ((name = read_symbol_name ()) == NULL) 4856 return; 4857 4858 sym = symbol_find_or_make (name); 4859 4860 if (*input_line_pointer == ',') 4861 { 4862 unsigned short visibility; 4863 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4864 4865 input_line_pointer++; 4866 visibility = ppc_xcoff_get_visibility (); 4867 if (!visibility) 4868 { 4869 as_bad (_("Unknown visibility field in .extern")); 4870 ignore_rest_of_line (); 4871 return; 4872 } 4873 4874 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4875 coffsym->native->u.syment.n_type |= visibility; 4876 } 4877 4878 demand_empty_rest_of_line (); 4879 } 4880 4881 /* XCOFF semantic for .globl says that the second parameter is 4882 the symbol visibility. */ 4883 4884 static void 4885 ppc_globl (int ignore ATTRIBUTE_UNUSED) 4886 { 4887 char *name; 4888 symbolS *sym; 4889 4890 if ((name = read_symbol_name ()) == NULL) 4891 return; 4892 4893 sym = symbol_find_or_make (name); 4894 S_SET_EXTERNAL (sym); 4895 4896 if (*input_line_pointer == ',') 4897 { 4898 unsigned short visibility; 4899 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4900 4901 input_line_pointer++; 4902 visibility = ppc_xcoff_get_visibility (); 4903 if (!visibility) 4904 { 4905 as_bad (_("Unknown visibility field in .globl")); 4906 ignore_rest_of_line (); 4907 return; 4908 } 4909 4910 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4911 coffsym->native->u.syment.n_type |= visibility; 4912 } 4913 4914 demand_empty_rest_of_line (); 4915 } 4916 4917 /* XCOFF semantic for .weak says that the second parameter is 4918 the symbol visibility. */ 4919 4920 static void 4921 ppc_weak (int ignore ATTRIBUTE_UNUSED) 4922 { 4923 char *name; 4924 symbolS *sym; 4925 4926 if ((name = read_symbol_name ()) == NULL) 4927 return; 4928 4929 sym = symbol_find_or_make (name); 4930 S_SET_WEAK (sym); 4931 4932 if (*input_line_pointer == ',') 4933 { 4934 unsigned short visibility; 4935 coff_symbol_type *coffsym = coffsymbol (symbol_get_bfdsym (sym)); 4936 4937 input_line_pointer++; 4938 visibility = ppc_xcoff_get_visibility (); 4939 if (!visibility) 4940 { 4941 as_bad (_("Unknown visibility field in .weak")); 4942 ignore_rest_of_line (); 4943 return; 4944 } 4945 4946 coffsym->native->u.syment.n_type &= ~SYM_V_MASK; 4947 coffsym->native->u.syment.n_type |= visibility; 4948 } 4949 4950 demand_empty_rest_of_line (); 4951 } 4952 4953 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */ 4954 4955 static void 4956 ppc_lglobl (int ignore ATTRIBUTE_UNUSED) 4957 { 4958 char *name; 4959 char endc; 4960 symbolS *sym; 4961 4962 endc = get_symbol_name (&name); 4963 4964 sym = symbol_find_or_make (name); 4965 4966 (void) restore_line_pointer (endc); 4967 4968 symbol_get_tc (sym)->output = 1; 4969 4970 demand_empty_rest_of_line (); 4971 } 4972 4973 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF 4974 relocations at the beginning of the current csect. 4975 4976 (In principle, there's no reason why the relocations _have_ to be at 4977 the beginning. Anywhere in the csect would do. However, inserting 4978 at the beginning is what the native assembler does, and it helps to 4979 deal with cases where the .ref statements follow the section contents.) 4980 4981 ??? .refs don't work for empty .csects. However, the native assembler 4982 doesn't report an error in this case, and neither yet do we. */ 4983 4984 static void 4985 ppc_ref (int ignore ATTRIBUTE_UNUSED) 4986 { 4987 char *name; 4988 char c; 4989 4990 if (ppc_current_csect == NULL) 4991 { 4992 as_bad (_(".ref outside .csect")); 4993 ignore_rest_of_line (); 4994 return; 4995 } 4996 4997 do 4998 { 4999 c = get_symbol_name (&name); 5000 5001 fix_at_start (symbol_get_frag (ppc_current_csect), 0, 5002 symbol_find_or_make (name), 0, false, BFD_RELOC_NONE); 5003 5004 *input_line_pointer = c; 5005 SKIP_WHITESPACE_AFTER_NAME (); 5006 c = *input_line_pointer; 5007 if (c == ',') 5008 { 5009 input_line_pointer++; 5010 SKIP_WHITESPACE (); 5011 if (is_end_of_line[(unsigned char) *input_line_pointer]) 5012 { 5013 as_bad (_("missing symbol name")); 5014 ignore_rest_of_line (); 5015 return; 5016 } 5017 } 5018 } 5019 while (c == ','); 5020 5021 demand_empty_rest_of_line (); 5022 } 5023 5024 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols, 5025 although I don't know why it bothers. */ 5026 5027 static void 5028 ppc_rename (int ignore ATTRIBUTE_UNUSED) 5029 { 5030 char *name; 5031 char endc; 5032 symbolS *sym; 5033 int len; 5034 5035 endc = get_symbol_name (&name); 5036 5037 sym = symbol_find_or_make (name); 5038 5039 (void) restore_line_pointer (endc); 5040 5041 if (*input_line_pointer != ',') 5042 { 5043 as_bad (_("missing rename string")); 5044 ignore_rest_of_line (); 5045 return; 5046 } 5047 ++input_line_pointer; 5048 5049 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len); 5050 5051 demand_empty_rest_of_line (); 5052 } 5053 5054 /* The .stabx pseudo-op. This is similar to a normal .stabs 5055 pseudo-op, but slightly different. A sample is 5056 .stabx "main:F-1",.main,142,0 5057 The first argument is the symbol name to create. The second is the 5058 value, and the third is the storage class. The fourth seems to be 5059 always zero, and I am assuming it is the type. */ 5060 5061 static void 5062 ppc_stabx (int ignore ATTRIBUTE_UNUSED) 5063 { 5064 char *name; 5065 int len; 5066 symbolS *sym; 5067 expressionS exp; 5068 5069 name = demand_copy_C_string (&len); 5070 5071 if (*input_line_pointer != ',') 5072 { 5073 as_bad (_("missing value")); 5074 return; 5075 } 5076 ++input_line_pointer; 5077 5078 ppc_stab_symbol = true; 5079 sym = symbol_make (name); 5080 ppc_stab_symbol = false; 5081 5082 symbol_get_tc (sym)->real_name = name; 5083 5084 (void) expression (&exp); 5085 5086 switch (exp.X_op) 5087 { 5088 case O_illegal: 5089 case O_absent: 5090 case O_big: 5091 as_bad (_("illegal .stabx expression; zero assumed")); 5092 exp.X_add_number = 0; 5093 /* Fall through. */ 5094 case O_constant: 5095 S_SET_VALUE (sym, (valueT) exp.X_add_number); 5096 symbol_set_frag (sym, &zero_address_frag); 5097 break; 5098 5099 case O_symbol: 5100 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section) 5101 symbol_set_value_expression (sym, &exp); 5102 else 5103 { 5104 S_SET_VALUE (sym, 5105 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol)); 5106 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol)); 5107 } 5108 break; 5109 5110 default: 5111 /* The value is some complex expression. This will probably 5112 fail at some later point, but this is probably the right 5113 thing to do here. */ 5114 symbol_set_value_expression (sym, &exp); 5115 break; 5116 } 5117 5118 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5119 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5120 5121 if (*input_line_pointer != ',') 5122 { 5123 as_bad (_("missing class")); 5124 return; 5125 } 5126 ++input_line_pointer; 5127 5128 S_SET_STORAGE_CLASS (sym, get_absolute_expression ()); 5129 5130 if (*input_line_pointer != ',') 5131 { 5132 as_bad (_("missing type")); 5133 return; 5134 } 5135 ++input_line_pointer; 5136 5137 S_SET_DATA_TYPE (sym, get_absolute_expression ()); 5138 5139 symbol_get_tc (sym)->output = 1; 5140 5141 if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 5142 { 5143 /* In this case : 5144 5145 .bs name 5146 .stabx "z",arrays_,133,0 5147 .es 5148 5149 .comm arrays_,13768,3 5150 5151 resolve_symbol_value will copy the exp's "within" into sym's when the 5152 offset is 0. Since this seems to be corner case problem, 5153 only do the correction for storage class C_STSYM. A better solution 5154 would be to have the tc field updated in ppc_symbol_new_hook. */ 5155 5156 if (exp.X_op == O_symbol) 5157 { 5158 if (ppc_current_block == NULL) 5159 as_bad (_(".stabx of storage class stsym must be within .bs/.es")); 5160 5161 symbol_get_tc (sym)->within = ppc_current_block; 5162 } 5163 } 5164 5165 if (exp.X_op != O_symbol 5166 || ! S_IS_EXTERNAL (exp.X_add_symbol) 5167 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section) 5168 ppc_frob_label (sym); 5169 else 5170 { 5171 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5172 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP); 5173 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol) 5174 symbol_get_tc (ppc_current_csect)->within = sym; 5175 } 5176 5177 demand_empty_rest_of_line (); 5178 } 5179 5180 /* The .file pseudo-op. On XCOFF, .file can have several parameters 5181 which are being added to the symbol table to provide additional 5182 information. */ 5183 5184 static void 5185 ppc_file (int ignore ATTRIBUTE_UNUSED) 5186 { 5187 char *sfname, *s1 = NULL, *s2 = NULL, *s3 = NULL; 5188 int length, auxnb = 1; 5189 5190 /* Some assemblers tolerate immediately following '"'. */ 5191 if ((sfname = demand_copy_string (&length)) != 0) 5192 { 5193 coff_symbol_type *coffsym; 5194 if (*input_line_pointer == ',') 5195 { 5196 ++input_line_pointer; 5197 s1 = demand_copy_string (&length); 5198 auxnb++; 5199 5200 if (*input_line_pointer == ',') 5201 { 5202 ++input_line_pointer; 5203 s2 = demand_copy_string (&length); 5204 auxnb++; 5205 5206 if (*input_line_pointer == ',') 5207 { 5208 ++input_line_pointer; 5209 s3 = demand_copy_string (&length); 5210 auxnb++; 5211 } 5212 } 5213 } 5214 5215 /* Use coff dot_file creation and adjust auxiliary entries. */ 5216 c_dot_file_symbol (sfname); 5217 S_SET_NUMBER_AUXILIARY (symbol_rootP, auxnb); 5218 coffsym = coffsymbol (symbol_get_bfdsym (symbol_rootP)); 5219 coffsym->native[1].u.auxent.x_file.x_ftype = XFT_FN; 5220 5221 if (s1) 5222 { 5223 coffsym->native[2].u.auxent.x_file.x_ftype = XFT_CT; 5224 coffsym->native[2].extrap = s1; 5225 } 5226 if (s2) 5227 { 5228 coffsym->native[3].u.auxent.x_file.x_ftype = XFT_CV; 5229 coffsym->native[3].extrap = s2; 5230 } 5231 if (s3) 5232 { 5233 coffsym->native[4].u.auxent.x_file.x_ftype = XFT_CD; 5234 coffsym->native[4].extrap = s3; 5235 } 5236 5237 demand_empty_rest_of_line (); 5238 } 5239 } 5240 5241 /* The .function pseudo-op. This takes several arguments. The first 5242 argument seems to be the external name of the symbol. The second 5243 argument seems to be the label for the start of the function. gcc 5244 uses the same name for both. I have no idea what the third and 5245 fourth arguments are meant to be. The optional fifth argument is 5246 an expression for the size of the function. In COFF this symbol 5247 gets an aux entry like that used for a csect. */ 5248 5249 static void 5250 ppc_function (int ignore ATTRIBUTE_UNUSED) 5251 { 5252 char *name; 5253 char endc; 5254 char *s; 5255 symbolS *ext_sym; 5256 symbolS *lab_sym; 5257 5258 endc = get_symbol_name (&name); 5259 5260 /* Ignore any [PR] suffix. */ 5261 name = ppc_canonicalize_symbol_name (name); 5262 s = strchr (name, '['); 5263 if (s != (char *) NULL 5264 && strcmp (s + 1, "PR]") == 0) 5265 *s = '\0'; 5266 5267 ext_sym = symbol_find_or_make (name); 5268 5269 (void) restore_line_pointer (endc); 5270 5271 if (*input_line_pointer != ',') 5272 { 5273 as_bad (_("missing symbol name")); 5274 ignore_rest_of_line (); 5275 return; 5276 } 5277 ++input_line_pointer; 5278 5279 endc = get_symbol_name (&name); 5280 5281 lab_sym = symbol_find_or_make (name); 5282 5283 (void) restore_line_pointer (endc); 5284 5285 if (ext_sym != lab_sym) 5286 { 5287 expressionS exp; 5288 5289 exp.X_op = O_symbol; 5290 exp.X_add_symbol = lab_sym; 5291 exp.X_op_symbol = NULL; 5292 exp.X_add_number = 0; 5293 exp.X_unsigned = 0; 5294 symbol_set_value_expression (ext_sym, &exp); 5295 } 5296 5297 if (symbol_get_tc (ext_sym)->symbol_class == -1) 5298 symbol_get_tc (ext_sym)->symbol_class = XMC_PR; 5299 symbol_get_tc (ext_sym)->output = 1; 5300 5301 if (*input_line_pointer == ',') 5302 { 5303 expressionS exp; 5304 5305 /* Ignore the third argument. */ 5306 ++input_line_pointer; 5307 expression (& exp); 5308 if (*input_line_pointer == ',') 5309 { 5310 /* Ignore the fourth argument. */ 5311 ++input_line_pointer; 5312 expression (& exp); 5313 if (*input_line_pointer == ',') 5314 { 5315 /* The fifth argument is the function size. 5316 If it's omitted, the size will be the containing csect. 5317 This will be donce during ppc_frob_symtab. */ 5318 ++input_line_pointer; 5319 symbol_get_tc (ext_sym)->u.size 5320 = symbol_new ("L0\001", absolute_section, 5321 &zero_address_frag, 0); 5322 pseudo_set (symbol_get_tc (ext_sym)->u.size); 5323 } 5324 } 5325 } 5326 5327 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT); 5328 SF_SET_FUNCTION (ext_sym); 5329 SF_SET_PROCESS (ext_sym); 5330 coff_add_linesym (ext_sym); 5331 5332 demand_empty_rest_of_line (); 5333 } 5334 5335 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named 5336 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym 5337 with the correct line number */ 5338 5339 static symbolS *saved_bi_sym = 0; 5340 5341 static void 5342 ppc_bf (int ignore ATTRIBUTE_UNUSED) 5343 { 5344 symbolS *sym; 5345 5346 sym = symbol_make (".bf"); 5347 S_SET_SEGMENT (sym, text_section); 5348 symbol_set_frag (sym, frag_now); 5349 S_SET_VALUE (sym, frag_now_fix ()); 5350 S_SET_STORAGE_CLASS (sym, C_FCN); 5351 5352 coff_line_base = get_absolute_expression (); 5353 5354 S_SET_NUMBER_AUXILIARY (sym, 1); 5355 SA_SET_SYM_LNNO (sym, coff_line_base); 5356 5357 /* Line number for bi. */ 5358 if (saved_bi_sym) 5359 { 5360 S_SET_VALUE (saved_bi_sym, coff_n_line_nos); 5361 saved_bi_sym = 0; 5362 } 5363 5364 5365 symbol_get_tc (sym)->output = 1; 5366 5367 ppc_frob_label (sym); 5368 5369 demand_empty_rest_of_line (); 5370 } 5371 5372 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named 5373 ".ef", except that the line number is absolute, not relative to the 5374 most recent ".bf" symbol. */ 5375 5376 static void 5377 ppc_ef (int ignore ATTRIBUTE_UNUSED) 5378 { 5379 symbolS *sym; 5380 5381 sym = symbol_make (".ef"); 5382 S_SET_SEGMENT (sym, text_section); 5383 symbol_set_frag (sym, frag_now); 5384 S_SET_VALUE (sym, frag_now_fix ()); 5385 S_SET_STORAGE_CLASS (sym, C_FCN); 5386 S_SET_NUMBER_AUXILIARY (sym, 1); 5387 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5388 symbol_get_tc (sym)->output = 1; 5389 5390 ppc_frob_label (sym); 5391 5392 demand_empty_rest_of_line (); 5393 } 5394 5395 /* The .bi and .ei pseudo-ops. These take a string argument and 5396 generates a C_BINCL or C_EINCL symbol, which goes at the start of 5397 the symbol list. The value of .bi will be know when the next .bf 5398 is encountered. */ 5399 5400 static void 5401 ppc_biei (int ei) 5402 { 5403 static symbolS *last_biei; 5404 5405 char *name; 5406 int len; 5407 symbolS *sym; 5408 symbolS *look; 5409 5410 name = demand_copy_C_string (&len); 5411 5412 /* The value of these symbols is actually file offset. Here we set 5413 the value to the index into the line number entries. In 5414 ppc_frob_symbols we set the fix_line field, which will cause BFD 5415 to do the right thing. */ 5416 5417 sym = symbol_make (name); 5418 /* obj-coff.c currently only handles line numbers correctly in the 5419 .text section. */ 5420 S_SET_SEGMENT (sym, text_section); 5421 S_SET_VALUE (sym, coff_n_line_nos); 5422 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5423 5424 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL); 5425 symbol_get_tc (sym)->output = 1; 5426 5427 /* Save bi. */ 5428 if (ei) 5429 saved_bi_sym = 0; 5430 else 5431 saved_bi_sym = sym; 5432 5433 for (look = last_biei ? last_biei : symbol_rootP; 5434 (look != (symbolS *) NULL 5435 && (S_GET_STORAGE_CLASS (look) == C_FILE 5436 || S_GET_STORAGE_CLASS (look) == C_BINCL 5437 || S_GET_STORAGE_CLASS (look) == C_EINCL)); 5438 look = symbol_next (look)) 5439 ; 5440 if (look != (symbolS *) NULL) 5441 { 5442 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5443 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP); 5444 last_biei = sym; 5445 } 5446 5447 demand_empty_rest_of_line (); 5448 } 5449 5450 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs". 5451 There is one argument, which is a csect symbol. The value of the 5452 .bs symbol is the index of this csect symbol. */ 5453 5454 static void 5455 ppc_bs (int ignore ATTRIBUTE_UNUSED) 5456 { 5457 char *name; 5458 char endc; 5459 symbolS *csect; 5460 symbolS *sym; 5461 5462 if (ppc_current_block != NULL) 5463 as_bad (_("nested .bs blocks")); 5464 5465 endc = get_symbol_name (&name); 5466 5467 csect = symbol_find_or_make (name); 5468 5469 (void) restore_line_pointer (endc); 5470 5471 sym = symbol_make (".bs"); 5472 S_SET_SEGMENT (sym, now_seg); 5473 S_SET_STORAGE_CLASS (sym, C_BSTAT); 5474 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5475 symbol_get_tc (sym)->output = 1; 5476 5477 symbol_get_tc (sym)->within = csect; 5478 5479 ppc_frob_label (sym); 5480 5481 ppc_current_block = sym; 5482 5483 demand_empty_rest_of_line (); 5484 } 5485 5486 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */ 5487 5488 static void 5489 ppc_es (int ignore ATTRIBUTE_UNUSED) 5490 { 5491 symbolS *sym; 5492 5493 if (ppc_current_block == NULL) 5494 as_bad (_(".es without preceding .bs")); 5495 5496 sym = symbol_make (".es"); 5497 S_SET_SEGMENT (sym, now_seg); 5498 S_SET_STORAGE_CLASS (sym, C_ESTAT); 5499 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5500 symbol_get_tc (sym)->output = 1; 5501 5502 ppc_frob_label (sym); 5503 5504 ppc_current_block = NULL; 5505 5506 demand_empty_rest_of_line (); 5507 } 5508 5509 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a 5510 line number. */ 5511 5512 static void 5513 ppc_bb (int ignore ATTRIBUTE_UNUSED) 5514 { 5515 symbolS *sym; 5516 5517 sym = symbol_make (".bb"); 5518 S_SET_SEGMENT (sym, text_section); 5519 symbol_set_frag (sym, frag_now); 5520 S_SET_VALUE (sym, frag_now_fix ()); 5521 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5522 5523 S_SET_NUMBER_AUXILIARY (sym, 1); 5524 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5525 5526 symbol_get_tc (sym)->output = 1; 5527 5528 SF_SET_PROCESS (sym); 5529 5530 ppc_frob_label (sym); 5531 5532 demand_empty_rest_of_line (); 5533 } 5534 5535 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a 5536 line number. */ 5537 5538 static void 5539 ppc_eb (int ignore ATTRIBUTE_UNUSED) 5540 { 5541 symbolS *sym; 5542 5543 sym = symbol_make (".eb"); 5544 S_SET_SEGMENT (sym, text_section); 5545 symbol_set_frag (sym, frag_now); 5546 S_SET_VALUE (sym, frag_now_fix ()); 5547 S_SET_STORAGE_CLASS (sym, C_BLOCK); 5548 S_SET_NUMBER_AUXILIARY (sym, 1); 5549 SA_SET_SYM_LNNO (sym, get_absolute_expression ()); 5550 symbol_get_tc (sym)->output = 1; 5551 5552 SF_SET_PROCESS (sym); 5553 5554 ppc_frob_label (sym); 5555 5556 demand_empty_rest_of_line (); 5557 } 5558 5559 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a 5560 specified name. */ 5561 5562 static void 5563 ppc_bc (int ignore ATTRIBUTE_UNUSED) 5564 { 5565 char *name; 5566 int len; 5567 symbolS *sym; 5568 5569 name = demand_copy_C_string (&len); 5570 sym = symbol_make (name); 5571 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5572 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5573 S_SET_STORAGE_CLASS (sym, C_BCOMM); 5574 S_SET_VALUE (sym, 0); 5575 symbol_get_tc (sym)->output = 1; 5576 5577 ppc_frob_label (sym); 5578 5579 demand_empty_rest_of_line (); 5580 } 5581 5582 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */ 5583 5584 static void 5585 ppc_ec (int ignore ATTRIBUTE_UNUSED) 5586 { 5587 symbolS *sym; 5588 5589 sym = symbol_make (".ec"); 5590 S_SET_SEGMENT (sym, ppc_coff_debug_section); 5591 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING; 5592 S_SET_STORAGE_CLASS (sym, C_ECOMM); 5593 S_SET_VALUE (sym, 0); 5594 symbol_get_tc (sym)->output = 1; 5595 5596 ppc_frob_label (sym); 5597 5598 demand_empty_rest_of_line (); 5599 } 5600 5601 /* The .toc pseudo-op. Switch to the .toc subsegment. */ 5602 5603 static void 5604 ppc_toc (int ignore ATTRIBUTE_UNUSED) 5605 { 5606 if (ppc_toc_csect != (symbolS *) NULL) 5607 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg); 5608 else 5609 { 5610 subsegT subseg; 5611 symbolS *sym; 5612 symbolS *list; 5613 5614 subseg = ppc_xcoff_data_section.next_subsegment; 5615 ++ppc_xcoff_data_section.next_subsegment; 5616 5617 subseg_new (segment_name (data_section), subseg); 5618 ppc_toc_frag = frag_now; 5619 5620 sym = symbol_find_or_make ("TOC[TC0]"); 5621 symbol_set_frag (sym, frag_now); 5622 S_SET_SEGMENT (sym, data_section); 5623 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5624 symbol_get_tc (sym)->subseg = subseg; 5625 symbol_get_tc (sym)->output = 1; 5626 symbol_get_tc (sym)->within = sym; 5627 5628 ppc_toc_csect = sym; 5629 5630 for (list = ppc_xcoff_data_section.csects; 5631 symbol_get_tc (list)->next != (symbolS *) NULL; 5632 list = symbol_get_tc (list)->next) 5633 ; 5634 symbol_get_tc (list)->next = sym; 5635 5636 symbol_remove (sym, &symbol_rootP, &symbol_lastP); 5637 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP, 5638 &symbol_lastP); 5639 } 5640 5641 ppc_current_csect = ppc_toc_csect; 5642 5643 demand_empty_rest_of_line (); 5644 } 5645 5646 /* The AIX assembler automatically aligns the operands of a .long or 5647 .short pseudo-op, and we want to be compatible. */ 5648 5649 static void 5650 ppc_xcoff_cons (int log_size) 5651 { 5652 frag_align (log_size, 0, 0); 5653 record_alignment (now_seg, log_size); 5654 cons (1 << log_size); 5655 } 5656 5657 static void 5658 ppc_vbyte (int dummy ATTRIBUTE_UNUSED) 5659 { 5660 expressionS exp; 5661 int byte_count; 5662 5663 (void) expression (&exp); 5664 5665 if (exp.X_op != O_constant) 5666 { 5667 as_bad (_("non-constant byte count")); 5668 return; 5669 } 5670 5671 byte_count = exp.X_add_number; 5672 5673 if (*input_line_pointer != ',') 5674 { 5675 as_bad (_("missing value")); 5676 return; 5677 } 5678 5679 ++input_line_pointer; 5680 cons (byte_count); 5681 } 5682 5683 void 5684 ppc_xcoff_end (void) 5685 { 5686 int i; 5687 5688 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++) 5689 { 5690 struct dw_section *dws = &dw_sections[i]; 5691 struct dw_subsection *dwss; 5692 5693 if (dws->anon_subseg) 5694 { 5695 dwss = dws->anon_subseg; 5696 dwss->link = dws->list_subseg; 5697 } 5698 else 5699 dwss = dws->list_subseg; 5700 5701 for (; dwss != NULL; dwss = dwss->link) 5702 if (dwss->end_exp.X_add_symbol != NULL) 5703 { 5704 subseg_set (dws->sect, dwss->subseg); 5705 symbol_set_value_now (dwss->end_exp.X_add_symbol); 5706 } 5707 } 5708 ppc_cpu = 0; 5709 } 5710 5711 #endif /* OBJ_XCOFF */ 5712 #if defined (OBJ_XCOFF) || defined (OBJ_ELF) 5713 5714 /* The .tc pseudo-op. This is used when generating either XCOFF or 5715 ELF. This takes two or more arguments. 5716 5717 When generating XCOFF output, the first argument is the name to 5718 give to this location in the toc; this will be a symbol with class 5719 TC. The rest of the arguments are N-byte values to actually put at 5720 this location in the TOC; often there is just one more argument, a 5721 relocatable symbol reference. The size of the value to store 5722 depends on target word size. A 32-bit target uses 4-byte values, a 5723 64-bit target uses 8-byte values. 5724 5725 When not generating XCOFF output, the arguments are the same, but 5726 the first argument is simply ignored. */ 5727 5728 static void 5729 ppc_tc (int ignore ATTRIBUTE_UNUSED) 5730 { 5731 #ifdef OBJ_XCOFF 5732 5733 /* Define the TOC symbol name. */ 5734 { 5735 char *name; 5736 char endc; 5737 symbolS *sym; 5738 5739 if (ppc_toc_csect == (symbolS *) NULL 5740 || ppc_toc_csect != ppc_current_csect) 5741 { 5742 as_bad (_(".tc not in .toc section")); 5743 ignore_rest_of_line (); 5744 return; 5745 } 5746 5747 endc = get_symbol_name (&name); 5748 5749 sym = symbol_find_or_make (name); 5750 5751 (void) restore_line_pointer (endc); 5752 5753 if (S_IS_DEFINED (sym)) 5754 { 5755 symbolS *label; 5756 5757 label = symbol_get_tc (ppc_current_csect)->within; 5758 if (symbol_get_tc (label)->symbol_class != XMC_TC0) 5759 { 5760 as_bad (_(".tc with no label")); 5761 ignore_rest_of_line (); 5762 return; 5763 } 5764 5765 S_SET_SEGMENT (label, S_GET_SEGMENT (sym)); 5766 symbol_set_frag (label, symbol_get_frag (sym)); 5767 S_SET_VALUE (label, S_GET_VALUE (sym)); 5768 5769 while (! is_end_of_line[(unsigned char) *input_line_pointer]) 5770 ++input_line_pointer; 5771 5772 return; 5773 } 5774 5775 S_SET_SEGMENT (sym, now_seg); 5776 symbol_set_frag (sym, frag_now); 5777 S_SET_VALUE (sym, (valueT) frag_now_fix ()); 5778 5779 /* AIX assembler seems to allow any storage class to be set in .tc. 5780 But for now, only XMC_TC and XMC_TE are supported by us. */ 5781 switch (symbol_get_tc (sym)->symbol_class) 5782 { 5783 case XMC_TC: 5784 case XMC_TE: 5785 break; 5786 5787 default: 5788 as_bad (_(".tc with storage class %d not yet supported"), 5789 symbol_get_tc (sym)->symbol_class); 5790 ignore_rest_of_line (); 5791 return; 5792 } 5793 symbol_get_tc (sym)->output = 1; 5794 5795 ppc_frob_label (sym); 5796 } 5797 5798 #endif /* OBJ_XCOFF */ 5799 #ifdef OBJ_ELF 5800 int align; 5801 5802 /* Skip the TOC symbol name. */ 5803 while (is_part_of_name (*input_line_pointer) 5804 || *input_line_pointer == ' ' 5805 || *input_line_pointer == '[' 5806 || *input_line_pointer == ']' 5807 || *input_line_pointer == '{' 5808 || *input_line_pointer == '}') 5809 ++input_line_pointer; 5810 5811 /* Align to a four/eight byte boundary. */ 5812 align = ppc_obj64 ? 3 : 2; 5813 frag_align (align, 0, 0); 5814 record_alignment (now_seg, align); 5815 #endif /* OBJ_ELF */ 5816 5817 if (*input_line_pointer != ',') 5818 demand_empty_rest_of_line (); 5819 else 5820 { 5821 ++input_line_pointer; 5822 cons (ppc_obj64 ? 8 : 4); 5823 } 5824 } 5825 5826 /* Pseudo-op .machine. */ 5827 5828 static void 5829 ppc_machine (int ignore ATTRIBUTE_UNUSED) 5830 { 5831 char c; 5832 char *cpu_string; 5833 #define MAX_HISTORY 100 5834 static ppc_cpu_t *cpu_history; 5835 static int curr_hist; 5836 5837 SKIP_WHITESPACE (); 5838 5839 c = get_symbol_name (&cpu_string); 5840 cpu_string = xstrdup (cpu_string); 5841 (void) restore_line_pointer (c); 5842 5843 if (cpu_string != NULL) 5844 { 5845 ppc_cpu_t old_cpu = ppc_cpu; 5846 char *p; 5847 5848 for (p = cpu_string; *p != 0; p++) 5849 *p = TOLOWER (*p); 5850 5851 if (strcmp (cpu_string, "push") == 0) 5852 { 5853 if (cpu_history == NULL) 5854 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY); 5855 5856 if (curr_hist >= MAX_HISTORY) 5857 as_bad (_(".machine stack overflow")); 5858 else 5859 cpu_history[curr_hist++] = ppc_cpu; 5860 } 5861 else if (strcmp (cpu_string, "pop") == 0) 5862 { 5863 if (curr_hist <= 0) 5864 as_bad (_(".machine stack underflow")); 5865 else 5866 ppc_cpu = cpu_history[--curr_hist]; 5867 } 5868 else 5869 { 5870 ppc_cpu_t new_cpu; 5871 /* Not using the global "sticky" variable here results in 5872 none of the extra functional unit command line options, 5873 -many, -maltivec, -mspe, -mspe2, -mvle, -mvsx, being in 5874 force after selecting a new cpu with .machine. 5875 ".machine altivec" and other extra functional unit 5876 options do not count as a new machine, instead they add 5877 to currently selected opcodes. */ 5878 ppc_cpu_t machine_sticky = 0; 5879 /* Unfortunately, some versions of gcc emit a .machine 5880 directive very near the start of the compiler's assembly 5881 output file. This is bad because it overrides user -Wa 5882 cpu selection. Worse, there are versions of gcc that 5883 emit the *wrong* cpu, not even respecting the -mcpu given 5884 to gcc. See gcc pr101393. And to compound the problem, 5885 as of 20220222 gcc doesn't pass the correct cpu option to 5886 gas on the command line. See gcc pr59828. Hack around 5887 this by keeping sticky options for an early .machine. */ 5888 asection *sec; 5889 for (sec = stdoutput->sections; sec != NULL; sec = sec->next) 5890 { 5891 segment_info_type *info = seg_info (sec); 5892 /* Are the frags for this section perturbed from their 5893 initial state? Even .align will count here. */ 5894 if (info != NULL 5895 && (info->frchainP->frch_root != info->frchainP->frch_last 5896 || info->frchainP->frch_root->fr_type != rs_fill 5897 || info->frchainP->frch_root->fr_fix != 0)) 5898 break; 5899 } 5900 new_cpu = ppc_parse_cpu (ppc_cpu, 5901 sec == NULL ? &sticky : &machine_sticky, 5902 cpu_string); 5903 if (new_cpu != 0) 5904 ppc_cpu = new_cpu; 5905 else 5906 as_bad (_("invalid machine `%s'"), cpu_string); 5907 } 5908 5909 if (ppc_cpu != old_cpu) 5910 ppc_setup_opcodes (); 5911 } 5912 5913 demand_empty_rest_of_line (); 5914 } 5915 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */ 5916 5917 #ifdef OBJ_XCOFF 5918 5919 /* XCOFF specific symbol and file handling. */ 5920 5921 /* Canonicalize the symbol name. We use the to force the suffix, if 5922 any, to use square brackets, and to be in upper case. */ 5923 5924 char * 5925 ppc_canonicalize_symbol_name (char *name) 5926 { 5927 char *s; 5928 5929 if (ppc_stab_symbol) 5930 return name; 5931 5932 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++) 5933 ; 5934 if (*s != '\0') 5935 { 5936 char brac; 5937 5938 if (*s == '[') 5939 brac = ']'; 5940 else 5941 { 5942 *s = '['; 5943 brac = '}'; 5944 } 5945 5946 for (s++; *s != '\0' && *s != brac; s++) 5947 *s = TOUPPER (*s); 5948 5949 if (*s == '\0' || s[1] != '\0') 5950 as_bad (_("bad symbol suffix")); 5951 5952 *s = ']'; 5953 } 5954 5955 return name; 5956 } 5957 5958 /* Set the class of a symbol based on the suffix, if any. This is 5959 called whenever a new symbol is created. */ 5960 5961 void 5962 ppc_symbol_new_hook (symbolS *sym) 5963 { 5964 struct ppc_tc_sy *tc; 5965 const char *s; 5966 5967 tc = symbol_get_tc (sym); 5968 tc->next = NULL; 5969 tc->output = 0; 5970 tc->symbol_class = -1; 5971 tc->real_name = NULL; 5972 tc->subseg = 0; 5973 tc->align = 0; 5974 tc->u.size = NULL; 5975 tc->u.dw = NULL; 5976 tc->within = NULL; 5977 5978 if (ppc_stab_symbol) 5979 return; 5980 5981 s = strchr (S_GET_NAME (sym), '['); 5982 if (s == (const char *) NULL) 5983 { 5984 /* There is no suffix. */ 5985 return; 5986 } 5987 5988 ++s; 5989 5990 switch (s[0]) 5991 { 5992 case 'B': 5993 if (strcmp (s, "BS]") == 0) 5994 tc->symbol_class = XMC_BS; 5995 break; 5996 case 'D': 5997 if (strcmp (s, "DB]") == 0) 5998 tc->symbol_class = XMC_DB; 5999 else if (strcmp (s, "DS]") == 0) 6000 tc->symbol_class = XMC_DS; 6001 break; 6002 case 'G': 6003 if (strcmp (s, "GL]") == 0) 6004 tc->symbol_class = XMC_GL; 6005 break; 6006 case 'P': 6007 if (strcmp (s, "PR]") == 0) 6008 tc->symbol_class = XMC_PR; 6009 break; 6010 case 'R': 6011 if (strcmp (s, "RO]") == 0) 6012 tc->symbol_class = XMC_RO; 6013 else if (strcmp (s, "RW]") == 0) 6014 tc->symbol_class = XMC_RW; 6015 break; 6016 case 'S': 6017 if (strcmp (s, "SV]") == 0) 6018 tc->symbol_class = XMC_SV; 6019 break; 6020 case 'T': 6021 if (strcmp (s, "TC]") == 0) 6022 tc->symbol_class = XMC_TC; 6023 else if (strcmp (s, "TI]") == 0) 6024 tc->symbol_class = XMC_TI; 6025 else if (strcmp (s, "TB]") == 0) 6026 tc->symbol_class = XMC_TB; 6027 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0) 6028 tc->symbol_class = XMC_TC0; 6029 else if (strcmp (s, "TE]") == 0) 6030 tc->symbol_class = XMC_TE; 6031 else if (strcmp (s, "TL]") == 0) 6032 tc->symbol_class = XMC_TL; 6033 break; 6034 case 'U': 6035 if (strcmp (s, "UA]") == 0) 6036 tc->symbol_class = XMC_UA; 6037 else if (strcmp (s, "UC]") == 0) 6038 tc->symbol_class = XMC_UC; 6039 else if (strcmp (s, "UL]") == 0) 6040 tc->symbol_class = XMC_UL; 6041 break; 6042 case 'X': 6043 if (strcmp (s, "XO]") == 0) 6044 tc->symbol_class = XMC_XO; 6045 break; 6046 } 6047 6048 if (tc->symbol_class == -1) 6049 as_bad (_("unrecognized symbol suffix")); 6050 } 6051 6052 /* This variable is set by ppc_frob_symbol if any absolute symbols are 6053 seen. It tells ppc_adjust_symtab whether it needs to look through 6054 the symbols. */ 6055 6056 static bool ppc_saw_abs; 6057 6058 /* Change the name of a symbol just before writing it out. Set the 6059 real name if the .rename pseudo-op was used. Otherwise, remove any 6060 class suffix. Return 1 if the symbol should not be included in the 6061 symbol table. */ 6062 6063 int 6064 ppc_frob_symbol (symbolS *sym) 6065 { 6066 static symbolS *ppc_last_function; 6067 static symbolS *set_end; 6068 6069 /* Discard symbols that should not be included in the output symbol 6070 table. */ 6071 if (! symbol_used_in_reloc_p (sym) 6072 && S_GET_STORAGE_CLASS (sym) != C_DWARF 6073 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0 6074 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6075 && ! symbol_get_tc (sym)->output 6076 && S_GET_STORAGE_CLASS (sym) != C_FILE))) 6077 return 1; 6078 6079 /* This one will disappear anyway. Don't make a csect sym for it. */ 6080 if (sym == abs_section_sym) 6081 return 1; 6082 6083 if (symbol_get_tc (sym)->real_name != (char *) NULL) 6084 S_SET_NAME (sym, symbol_get_tc (sym)->real_name); 6085 else 6086 { 6087 const char *name; 6088 const char *s; 6089 6090 name = S_GET_NAME (sym); 6091 s = strchr (name, '['); 6092 if (s != (char *) NULL) 6093 { 6094 unsigned int len; 6095 char *snew; 6096 6097 len = s - name; 6098 snew = xstrndup (name, len); 6099 6100 S_SET_NAME (sym, snew); 6101 } 6102 } 6103 6104 if (set_end != (symbolS *) NULL) 6105 { 6106 SA_SET_SYM_ENDNDX (set_end, sym); 6107 set_end = NULL; 6108 } 6109 6110 if (SF_GET_FUNCTION (sym)) 6111 { 6112 /* Make sure coff_last_function is reset. Otherwise, we won't create 6113 the auxent for the next function. */ 6114 coff_last_function = 0; 6115 ppc_last_function = sym; 6116 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL) 6117 { 6118 resolve_symbol_value (symbol_get_tc (sym)->u.size); 6119 SA_SET_SYM_FSIZE (sym, 6120 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size)); 6121 } 6122 else 6123 { 6124 /* Size of containing csect. */ 6125 symbolS* within = symbol_get_tc (sym)->within; 6126 union internal_auxent *csectaux; 6127 csectaux = &coffsymbol (symbol_get_bfdsym (within)) 6128 ->native[S_GET_NUMBER_AUXILIARY(within)].u.auxent; 6129 6130 SA_SET_SYM_FSIZE (sym, csectaux->x_csect.x_scnlen.l); 6131 } 6132 } 6133 else if (S_GET_STORAGE_CLASS (sym) == C_FCN 6134 && strcmp (S_GET_NAME (sym), ".ef") == 0) 6135 { 6136 if (ppc_last_function == (symbolS *) NULL) 6137 as_bad (_(".ef with no preceding .function")); 6138 else 6139 { 6140 set_end = ppc_last_function; 6141 ppc_last_function = NULL; 6142 6143 /* We don't have a C_EFCN symbol, but we need to force the 6144 COFF backend to believe that it has seen one. */ 6145 coff_last_function = NULL; 6146 } 6147 } 6148 6149 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym)) 6150 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0 6151 && S_GET_STORAGE_CLASS (sym) != C_FILE 6152 && S_GET_STORAGE_CLASS (sym) != C_FCN 6153 && S_GET_STORAGE_CLASS (sym) != C_BLOCK 6154 && S_GET_STORAGE_CLASS (sym) != C_BSTAT 6155 && S_GET_STORAGE_CLASS (sym) != C_ESTAT 6156 && S_GET_STORAGE_CLASS (sym) != C_BINCL 6157 && S_GET_STORAGE_CLASS (sym) != C_EINCL 6158 && S_GET_SEGMENT (sym) != ppc_coff_debug_section) 6159 S_SET_STORAGE_CLASS (sym, C_HIDEXT); 6160 6161 if (S_GET_STORAGE_CLASS (sym) == C_EXT 6162 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT 6163 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT) 6164 { 6165 int i; 6166 union internal_auxent *a; 6167 6168 /* Create a csect aux. */ 6169 i = S_GET_NUMBER_AUXILIARY (sym); 6170 S_SET_NUMBER_AUXILIARY (sym, i + 1); 6171 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent; 6172 if (symbol_get_tc (sym)->symbol_class == XMC_TC0) 6173 { 6174 /* This is the TOC table. */ 6175 know (strcmp (S_GET_NAME (sym), "TOC") == 0); 6176 a->x_csect.x_scnlen.l = 0; 6177 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 6178 } 6179 else if (symbol_get_tc (sym)->subseg != 0) 6180 { 6181 /* This is a csect symbol. x_scnlen is the size of the 6182 csect. */ 6183 if (symbol_get_tc (sym)->next == (symbolS *) NULL) 6184 a->x_csect.x_scnlen.l = (bfd_section_size (S_GET_SEGMENT (sym)) 6185 - S_GET_VALUE (sym)); 6186 else 6187 { 6188 resolve_symbol_value (symbol_get_tc (sym)->next); 6189 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next) 6190 - S_GET_VALUE (sym)); 6191 } 6192 if (symbol_get_tc (sym)->symbol_class == XMC_BS 6193 || symbol_get_tc (sym)->symbol_class == XMC_UL) 6194 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 6195 else 6196 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD; 6197 } 6198 else if (S_GET_SEGMENT (sym) == bss_section 6199 || S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) 6200 { 6201 /* This is a common symbol. */ 6202 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset; 6203 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM; 6204 if (S_GET_SEGMENT (sym) == ppc_xcoff_tbss_section.segment) 6205 symbol_get_tc (sym)->symbol_class = XMC_UL; 6206 else if (S_IS_EXTERNAL (sym)) 6207 symbol_get_tc (sym)->symbol_class = XMC_RW; 6208 else 6209 symbol_get_tc (sym)->symbol_class = XMC_BS; 6210 } 6211 else if (S_GET_SEGMENT (sym) == absolute_section) 6212 { 6213 /* This is an absolute symbol. The csect will be created by 6214 ppc_adjust_symtab. */ 6215 ppc_saw_abs = true; 6216 a->x_csect.x_smtyp = XTY_LD; 6217 if (symbol_get_tc (sym)->symbol_class == -1) 6218 symbol_get_tc (sym)->symbol_class = XMC_XO; 6219 } 6220 else if (! S_IS_DEFINED (sym)) 6221 { 6222 /* This is an external symbol. */ 6223 a->x_csect.x_scnlen.l = 0; 6224 a->x_csect.x_smtyp = XTY_ER; 6225 } 6226 else if (ppc_is_toc_sym (sym)) 6227 { 6228 symbolS *next; 6229 6230 /* This is a TOC definition. x_scnlen is the size of the 6231 TOC entry. */ 6232 next = symbol_next (sym); 6233 while (symbol_get_tc (next)->symbol_class == XMC_TC0) 6234 next = symbol_next (next); 6235 if (next == (symbolS *) NULL 6236 || (!ppc_is_toc_sym (next))) 6237 { 6238 if (ppc_after_toc_frag == (fragS *) NULL) 6239 a->x_csect.x_scnlen.l = (bfd_section_size (data_section) 6240 - S_GET_VALUE (sym)); 6241 else 6242 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address 6243 - S_GET_VALUE (sym)); 6244 } 6245 else 6246 { 6247 resolve_symbol_value (next); 6248 a->x_csect.x_scnlen.l = (S_GET_VALUE (next) 6249 - S_GET_VALUE (sym)); 6250 } 6251 a->x_csect.x_smtyp = (2 << 3) | XTY_SD; 6252 } 6253 else 6254 { 6255 symbolS *csect; 6256 6257 /* This is a normal symbol definition. x_scnlen is the 6258 symbol index of the containing csect. */ 6259 if (S_GET_SEGMENT (sym) == text_section) 6260 csect = ppc_xcoff_text_section.csects; 6261 else if (S_GET_SEGMENT (sym) == data_section) 6262 csect = ppc_xcoff_data_section.csects; 6263 else if (S_GET_SEGMENT (sym) == ppc_xcoff_tdata_section.segment) 6264 csect = ppc_xcoff_tdata_section.csects; 6265 else 6266 abort (); 6267 6268 /* Skip the initial dummy symbol. */ 6269 csect = symbol_get_tc (csect)->next; 6270 6271 if (csect == (symbolS *) NULL) 6272 { 6273 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym)); 6274 a->x_csect.x_scnlen.l = 0; 6275 } 6276 else 6277 { 6278 while (symbol_get_tc (csect)->next != (symbolS *) NULL) 6279 { 6280 resolve_symbol_value (symbol_get_tc (csect)->next); 6281 if (S_GET_VALUE (symbol_get_tc (csect)->next) 6282 > S_GET_VALUE (sym)) 6283 break; 6284 csect = symbol_get_tc (csect)->next; 6285 } 6286 6287 a->x_csect.x_scnlen.p = 6288 coffsymbol (symbol_get_bfdsym (csect))->native; 6289 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen = 6290 1; 6291 } 6292 a->x_csect.x_smtyp = XTY_LD; 6293 } 6294 6295 a->x_csect.x_parmhash = 0; 6296 a->x_csect.x_snhash = 0; 6297 if (symbol_get_tc (sym)->symbol_class == -1) 6298 a->x_csect.x_smclas = XMC_PR; 6299 else 6300 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class; 6301 a->x_csect.x_stab = 0; 6302 a->x_csect.x_snstab = 0; 6303 6304 /* Don't let the COFF backend resort these symbols. */ 6305 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END; 6306 } 6307 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT) 6308 { 6309 /* We want the value to be the symbol index of the referenced 6310 csect symbol. BFD will do that for us if we set the right 6311 flags. */ 6312 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within); 6313 combined_entry_type *c = coffsymbol (bsym)->native; 6314 6315 S_SET_VALUE (sym, (valueT) (size_t) c); 6316 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1; 6317 } 6318 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM) 6319 { 6320 symbolS *block; 6321 valueT base; 6322 6323 block = symbol_get_tc (sym)->within; 6324 if (block) 6325 { 6326 /* The value is the offset from the enclosing csect. */ 6327 symbolS *csect; 6328 6329 csect = symbol_get_tc (block)->within; 6330 resolve_symbol_value (csect); 6331 base = S_GET_VALUE (csect); 6332 } 6333 else 6334 base = 0; 6335 6336 S_SET_VALUE (sym, S_GET_VALUE (sym) - base); 6337 } 6338 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL 6339 || S_GET_STORAGE_CLASS (sym) == C_EINCL) 6340 { 6341 /* We want the value to be a file offset into the line numbers. 6342 BFD will do that for us if we set the right flags. We have 6343 already set the value correctly. */ 6344 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1; 6345 } 6346 6347 return 0; 6348 } 6349 6350 /* Adjust the symbol table. */ 6351 6352 void 6353 ppc_adjust_symtab (void) 6354 { 6355 symbolS *sym; 6356 symbolS *anchorSym; 6357 6358 /* Make sure C_DWARF symbols come right after C_FILE. 6359 As the C_FILE might not be defined yet and as C_DWARF 6360 might already be ordered, we insert them before the 6361 first symbol which isn't a C_FILE or a C_DWARF. */ 6362 for (anchorSym = symbol_rootP; anchorSym != NULL; 6363 anchorSym = symbol_next (anchorSym)) 6364 { 6365 if (S_GET_STORAGE_CLASS (anchorSym) != C_FILE 6366 && S_GET_STORAGE_CLASS (anchorSym) != C_DWARF) 6367 break; 6368 } 6369 6370 sym = anchorSym; 6371 while (sym != NULL) 6372 { 6373 if (S_GET_STORAGE_CLASS (sym) != C_DWARF) 6374 { 6375 sym = symbol_next (sym); 6376 continue; 6377 } 6378 6379 symbolS* tsym = sym; 6380 sym = symbol_next (sym); 6381 6382 symbol_remove (tsym, &symbol_rootP, &symbol_lastP); 6383 symbol_insert (tsym, anchorSym, &symbol_rootP, &symbol_lastP); 6384 } 6385 6386 /* Create csect symbols for all absolute symbols. */ 6387 6388 if (! ppc_saw_abs) 6389 return; 6390 6391 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym)) 6392 { 6393 symbolS *csect; 6394 int i; 6395 union internal_auxent *a; 6396 6397 if (S_GET_SEGMENT (sym) != absolute_section) 6398 continue; 6399 6400 csect = symbol_create (".abs[XO]", absolute_section, 6401 &zero_address_frag, S_GET_VALUE (sym)); 6402 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym); 6403 S_SET_STORAGE_CLASS (csect, C_HIDEXT); 6404 i = S_GET_NUMBER_AUXILIARY (csect); 6405 S_SET_NUMBER_AUXILIARY (csect, i + 1); 6406 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent; 6407 a->x_csect.x_scnlen.l = 0; 6408 a->x_csect.x_smtyp = XTY_SD; 6409 a->x_csect.x_parmhash = 0; 6410 a->x_csect.x_snhash = 0; 6411 a->x_csect.x_smclas = XMC_XO; 6412 a->x_csect.x_stab = 0; 6413 a->x_csect.x_snstab = 0; 6414 6415 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP); 6416 6417 i = S_GET_NUMBER_AUXILIARY (sym); 6418 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent; 6419 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native; 6420 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1; 6421 } 6422 6423 ppc_saw_abs = false; 6424 } 6425 6426 /* Set the VMA for a section. This is called on all the sections in 6427 turn. */ 6428 6429 void 6430 ppc_frob_section (asection *sec) 6431 { 6432 static bfd_vma vma = 0; 6433 6434 /* Dwarf sections start at 0. */ 6435 if (bfd_section_flags (sec) & SEC_DEBUGGING) 6436 return; 6437 6438 vma = md_section_align (sec, vma); 6439 bfd_set_section_vma (sec, vma); 6440 vma += bfd_section_size (sec); 6441 } 6442 6443 #endif /* OBJ_XCOFF */ 6444 6445 const char * 6446 md_atof (int type, char *litp, int *sizep) 6447 { 6448 return ieee_md_atof (type, litp, sizep, target_big_endian); 6449 } 6450 6451 /* Write a value out to the object file, using the appropriate 6452 endianness. */ 6453 6454 void 6455 md_number_to_chars (char *buf, valueT val, int n) 6456 { 6457 if (target_big_endian) 6458 number_to_chars_bigendian (buf, val, n); 6459 else 6460 number_to_chars_littleendian (buf, val, n); 6461 } 6462 6463 /* Align a section (I don't know why this is machine dependent). */ 6464 6465 valueT 6466 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr) 6467 { 6468 #ifdef OBJ_ELF 6469 return addr; 6470 #else 6471 int align = bfd_section_alignment (seg); 6472 6473 return ((addr + (1 << align) - 1) & -(1 << align)); 6474 #endif 6475 } 6476 6477 /* We don't have any form of relaxing. */ 6478 6479 int 6480 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED, 6481 asection *seg ATTRIBUTE_UNUSED) 6482 { 6483 abort (); 6484 return 0; 6485 } 6486 6487 /* Convert a machine dependent frag. We never generate these. */ 6488 6489 void 6490 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED, 6491 asection *sec ATTRIBUTE_UNUSED, 6492 fragS *fragp ATTRIBUTE_UNUSED) 6493 { 6494 abort (); 6495 } 6496 6497 /* We have no need to default values of symbols. */ 6498 6499 symbolS * 6500 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 6501 { 6502 return 0; 6503 } 6504 6505 /* Functions concerning relocs. */ 6506 6507 /* The location from which a PC relative jump should be calculated, 6508 given a PC relative reloc. */ 6509 6510 long 6511 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED) 6512 { 6513 return fixp->fx_frag->fr_address + fixp->fx_where; 6514 } 6515 6516 #ifdef OBJ_XCOFF 6517 6518 /* Return the surrending csect for sym when possible. */ 6519 6520 static symbolS* 6521 ppc_get_csect_to_adjust (symbolS *sym) 6522 { 6523 if (sym == NULL) 6524 return NULL; 6525 6526 valueT val = resolve_symbol_value (sym); 6527 TC_SYMFIELD_TYPE *tc = symbol_get_tc (sym); 6528 segT symseg = S_GET_SEGMENT (sym); 6529 6530 if (tc->subseg == 0 6531 && tc->symbol_class != XMC_TC0 6532 && tc->symbol_class != XMC_TC 6533 && tc->symbol_class != XMC_TE 6534 && symseg != bss_section 6535 && symseg != ppc_xcoff_tbss_section.segment 6536 /* Don't adjust if this is a reloc in the toc section. */ 6537 && (symseg != data_section 6538 || ppc_toc_csect == NULL 6539 || val < ppc_toc_frag->fr_address 6540 || (ppc_after_toc_frag != NULL 6541 && val >= ppc_after_toc_frag->fr_address))) 6542 { 6543 symbolS* csect = tc->within; 6544 6545 /* If the symbol was not declared by a label (eg: a section symbol), 6546 use the section instead of the csect. This doesn't happen in 6547 normal AIX assembly code. */ 6548 if (csect == NULL) 6549 csect = seg_info (symseg)->sym; 6550 6551 return csect; 6552 } 6553 6554 return NULL; 6555 } 6556 6557 /* This is called to see whether a fixup should be adjusted to use a 6558 section symbol. We take the opportunity to change a fixup against 6559 a symbol in the TOC subsegment into a reloc against the 6560 corresponding .tc symbol. */ 6561 6562 int 6563 ppc_fix_adjustable (fixS *fix) 6564 { 6565 valueT val = resolve_symbol_value (fix->fx_addsy); 6566 segT symseg = S_GET_SEGMENT (fix->fx_addsy); 6567 symbolS* csect; 6568 6569 if (symseg == absolute_section) 6570 return 0; 6571 6572 /* Always adjust symbols in debugging sections. */ 6573 if (bfd_section_flags (symseg) & SEC_DEBUGGING) 6574 return 1; 6575 6576 if (ppc_toc_csect != (symbolS *) NULL 6577 && fix->fx_addsy != ppc_toc_csect 6578 && symseg == data_section 6579 && val >= ppc_toc_frag->fr_address 6580 && (ppc_after_toc_frag == (fragS *) NULL 6581 || val < ppc_after_toc_frag->fr_address)) 6582 { 6583 symbolS *sy; 6584 6585 for (sy = symbol_next (ppc_toc_csect); 6586 sy != (symbolS *) NULL; 6587 sy = symbol_next (sy)) 6588 { 6589 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy); 6590 6591 if (sy_tc->symbol_class == XMC_TC0) 6592 continue; 6593 if (sy_tc->symbol_class != XMC_TC 6594 && sy_tc->symbol_class != XMC_TE) 6595 break; 6596 if (val == resolve_symbol_value (sy)) 6597 { 6598 fix->fx_addsy = sy; 6599 fix->fx_addnumber = val - ppc_toc_frag->fr_address; 6600 return 0; 6601 } 6602 } 6603 6604 as_bad_where (fix->fx_file, fix->fx_line, 6605 _("symbol in .toc does not match any .tc")); 6606 } 6607 6608 /* Possibly adjust the reloc to be against the csect. */ 6609 if ((csect = ppc_get_csect_to_adjust (fix->fx_addsy)) != NULL) 6610 { 6611 fix->fx_offset += val - symbol_get_frag (csect)->fr_address; 6612 fix->fx_addsy = csect; 6613 } 6614 6615 if ((csect = ppc_get_csect_to_adjust (fix->fx_subsy)) != NULL) 6616 { 6617 fix->fx_offset -= resolve_symbol_value (fix->fx_subsy) 6618 - symbol_get_frag (csect)->fr_address; 6619 fix->fx_subsy = csect; 6620 } 6621 6622 /* Adjust a reloc against a .lcomm symbol to be against the base 6623 .lcomm. */ 6624 if (symseg == bss_section 6625 && ! S_IS_EXTERNAL (fix->fx_addsy) 6626 && symbol_get_tc (fix->fx_addsy)->subseg == 0) 6627 { 6628 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol; 6629 6630 fix->fx_offset += val - resolve_symbol_value (sy); 6631 fix->fx_addsy = sy; 6632 } 6633 6634 return 0; 6635 } 6636 6637 /* A reloc from one csect to another must be kept. The assembler 6638 will, of course, keep relocs between sections, and it will keep 6639 absolute relocs, but we need to force it to keep PC relative relocs 6640 between two csects in the same section. */ 6641 6642 int 6643 ppc_force_relocation (fixS *fix) 6644 { 6645 /* At this point fix->fx_addsy should already have been converted to 6646 a csect symbol. If the csect does not include the fragment, then 6647 we need to force the relocation. */ 6648 if (fix->fx_pcrel 6649 && fix->fx_addsy != NULL 6650 && symbol_get_tc (fix->fx_addsy)->subseg != 0 6651 && ((symbol_get_frag (fix->fx_addsy)->fr_address 6652 > fix->fx_frag->fr_address) 6653 || (symbol_get_tc (fix->fx_addsy)->next != NULL 6654 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address 6655 <= fix->fx_frag->fr_address)))) 6656 return 1; 6657 6658 return generic_force_reloc (fix); 6659 } 6660 #endif /* OBJ_XCOFF */ 6661 6662 #ifdef OBJ_ELF 6663 /* If this function returns non-zero, it guarantees that a relocation 6664 will be emitted for a fixup. */ 6665 6666 int 6667 ppc_force_relocation (fixS *fix) 6668 { 6669 /* Branch prediction relocations must force a relocation, as must 6670 the vtable description relocs. */ 6671 switch (fix->fx_r_type) 6672 { 6673 case BFD_RELOC_PPC_B16_BRTAKEN: 6674 case BFD_RELOC_PPC_B16_BRNTAKEN: 6675 case BFD_RELOC_PPC_BA16_BRTAKEN: 6676 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6677 case BFD_RELOC_24_PLT_PCREL: 6678 case BFD_RELOC_PPC64_TOC: 6679 return 1; 6680 case BFD_RELOC_PPC_B26: 6681 case BFD_RELOC_PPC_BA26: 6682 case BFD_RELOC_PPC_B16: 6683 case BFD_RELOC_PPC_BA16: 6684 case BFD_RELOC_PPC64_REL24_NOTOC: 6685 case BFD_RELOC_PPC64_REL24_P9NOTOC: 6686 /* All branch fixups targeting a localentry symbol must 6687 force a relocation. */ 6688 if (fix->fx_addsy) 6689 { 6690 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6691 elf_symbol_type *elfsym = elf_symbol_from (bfdsym); 6692 gas_assert (elfsym); 6693 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6694 return 1; 6695 } 6696 break; 6697 default: 6698 break; 6699 } 6700 6701 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS 6702 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL) 6703 return 1; 6704 6705 return generic_force_reloc (fix); 6706 } 6707 6708 int 6709 ppc_fix_adjustable (fixS *fix) 6710 { 6711 switch (fix->fx_r_type) 6712 { 6713 /* All branch fixups targeting a localentry symbol must 6714 continue using the symbol. */ 6715 case BFD_RELOC_PPC_B26: 6716 case BFD_RELOC_PPC_BA26: 6717 case BFD_RELOC_PPC_B16: 6718 case BFD_RELOC_PPC_BA16: 6719 case BFD_RELOC_PPC_B16_BRTAKEN: 6720 case BFD_RELOC_PPC_B16_BRNTAKEN: 6721 case BFD_RELOC_PPC_BA16_BRTAKEN: 6722 case BFD_RELOC_PPC_BA16_BRNTAKEN: 6723 case BFD_RELOC_PPC64_REL24_NOTOC: 6724 case BFD_RELOC_PPC64_REL24_P9NOTOC: 6725 if (fix->fx_addsy) 6726 { 6727 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy); 6728 elf_symbol_type *elfsym = elf_symbol_from (bfdsym); 6729 gas_assert (elfsym); 6730 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0) 6731 return 0; 6732 } 6733 break; 6734 default: 6735 break; 6736 } 6737 6738 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF 6739 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF 6740 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF 6741 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF 6742 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS 6743 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS 6744 && fix->fx_r_type != BFD_RELOC_PPC64_GOT_PCREL34 6745 && fix->fx_r_type != BFD_RELOC_24_PLT_PCREL 6746 && fix->fx_r_type != BFD_RELOC_32_PLTOFF 6747 && fix->fx_r_type != BFD_RELOC_32_PLT_PCREL 6748 && fix->fx_r_type != BFD_RELOC_LO16_PLTOFF 6749 && fix->fx_r_type != BFD_RELOC_HI16_PLTOFF 6750 && fix->fx_r_type != BFD_RELOC_HI16_S_PLTOFF 6751 && fix->fx_r_type != BFD_RELOC_64_PLTOFF 6752 && fix->fx_r_type != BFD_RELOC_64_PLT_PCREL 6753 && fix->fx_r_type != BFD_RELOC_PPC64_PLT16_LO_DS 6754 && fix->fx_r_type != BFD_RELOC_PPC64_PLT_PCREL34 6755 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16 6756 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO 6757 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HI 6758 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_HA 6759 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_DS 6760 && fix->fx_r_type != BFD_RELOC_PPC64_PLTGOT16_LO_DS 6761 && fix->fx_r_type != BFD_RELOC_GPREL16 6762 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_LO16A 6763 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HI16A 6764 && fix->fx_r_type != BFD_RELOC_PPC_VLE_SDAREL_HA16A 6765 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT 6766 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY 6767 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS 6768 && fix->fx_r_type <= BFD_RELOC_PPC64_TLS_PCREL)); 6769 } 6770 #endif 6771 6772 void 6773 ppc_frag_check (struct frag *fragP) 6774 { 6775 if ((fragP->fr_address & fragP->insn_addr) != 0) 6776 as_bad_where (fragP->fr_file, fragP->fr_line, 6777 _("instruction address is not a multiple of %d"), 6778 fragP->insn_addr + 1); 6779 } 6780 6781 /* rs_align_code frag handling. */ 6782 6783 enum ppc_nop_encoding_for_rs_align_code 6784 { 6785 PPC_NOP_VANILLA, 6786 PPC_NOP_VLE, 6787 PPC_NOP_GROUP_P6, 6788 PPC_NOP_GROUP_P7 6789 }; 6790 6791 unsigned int 6792 ppc_nop_select (void) 6793 { 6794 if ((ppc_cpu & PPC_OPCODE_VLE) != 0) 6795 return PPC_NOP_VLE; 6796 if ((ppc_cpu & (PPC_OPCODE_POWER9 | PPC_OPCODE_E500MC)) == 0) 6797 { 6798 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0) 6799 return PPC_NOP_GROUP_P7; 6800 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0) 6801 return PPC_NOP_GROUP_P6; 6802 } 6803 return PPC_NOP_VANILLA; 6804 } 6805 6806 void 6807 ppc_handle_align (struct frag *fragP) 6808 { 6809 valueT count = (fragP->fr_next->fr_address 6810 - (fragP->fr_address + fragP->fr_fix)); 6811 char *dest = fragP->fr_literal + fragP->fr_fix; 6812 enum ppc_nop_encoding_for_rs_align_code nop_select = *dest & 0xff; 6813 6814 /* Pad with zeros if not inserting a whole number of instructions. 6815 We could pad with zeros up to an instruction boundary then follow 6816 with nops but odd counts indicate data in an executable section 6817 so padding with zeros is most appropriate. */ 6818 if (count == 0 6819 || (nop_select == PPC_NOP_VLE ? (count & 1) != 0 : (count & 3) != 0)) 6820 { 6821 *dest = 0; 6822 return; 6823 } 6824 6825 if (nop_select == PPC_NOP_VLE) 6826 { 6827 6828 fragP->fr_var = 2; 6829 md_number_to_chars (dest, 0x4400, 2); 6830 } 6831 else 6832 { 6833 fragP->fr_var = 4; 6834 6835 if (count > 4 * nop_limit && count < 0x2000000) 6836 { 6837 struct frag *rest; 6838 6839 /* Make a branch, then follow with nops. Insert another 6840 frag to handle the nops. */ 6841 md_number_to_chars (dest, 0x48000000 + count, 4); 6842 count -= 4; 6843 if (count == 0) 6844 return; 6845 6846 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6847 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG); 6848 fragP->fr_next = rest; 6849 fragP = rest; 6850 rest->fr_address += rest->fr_fix + 4; 6851 rest->fr_fix = 0; 6852 /* If we leave the next frag as rs_align_code we'll come here 6853 again, resulting in a bunch of branches rather than a 6854 branch followed by nops. */ 6855 rest->fr_type = rs_align; 6856 dest = rest->fr_literal; 6857 } 6858 6859 md_number_to_chars (dest, 0x60000000, 4); 6860 6861 if (nop_select >= PPC_NOP_GROUP_P6) 6862 { 6863 /* For power6, power7, and power8, we want the last nop to 6864 be a group terminating one. Do this by inserting an 6865 rs_fill frag immediately after this one, with its address 6866 set to the last nop location. This will automatically 6867 reduce the number of nops in the current frag by one. */ 6868 if (count > 4) 6869 { 6870 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4); 6871 6872 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG); 6873 group_nop->fr_address = group_nop->fr_next->fr_address - 4; 6874 group_nop->fr_fix = 0; 6875 group_nop->fr_offset = 1; 6876 group_nop->fr_type = rs_fill; 6877 fragP->fr_next = group_nop; 6878 dest = group_nop->fr_literal; 6879 } 6880 6881 if (nop_select == PPC_NOP_GROUP_P6) 6882 /* power6 group terminating nop: "ori 1,1,0". */ 6883 md_number_to_chars (dest, 0x60210000, 4); 6884 else 6885 /* power7/power8 group terminating nop: "ori 2,2,0". */ 6886 md_number_to_chars (dest, 0x60420000, 4); 6887 } 6888 } 6889 } 6890 6891 /* Apply a fixup to the object code. This is called for all the 6892 fixups we generated by the calls to fix_new_exp, above. */ 6893 6894 void 6895 md_apply_fix (fixS *fixP, valueT *valP, segT seg) 6896 { 6897 valueT value = * valP; 6898 offsetT fieldval; 6899 const struct powerpc_operand *operand; 6900 6901 #ifdef OBJ_ELF 6902 if (fixP->fx_addsy != NULL) 6903 { 6904 /* Hack around bfd_install_relocation brain damage. */ 6905 if (fixP->fx_pcrel) 6906 value += fixP->fx_frag->fr_address + fixP->fx_where; 6907 6908 if (fixP->fx_addsy == abs_section_sym) 6909 fixP->fx_done = 1; 6910 } 6911 else 6912 fixP->fx_done = 1; 6913 #else 6914 /* FIXME FIXME FIXME: The value we are passed in *valP includes 6915 the symbol values. If we are doing this relocation the code in 6916 write.c is going to call bfd_install_relocation, which is also 6917 going to use the symbol value. That means that if the reloc is 6918 fully resolved we want to use *valP since bfd_install_relocation is 6919 not being used. 6920 However, if the reloc is not fully resolved we do not want to 6921 use *valP, and must use fx_offset instead. If the relocation 6922 is PC-relative, we then need to re-apply md_pcrel_from_section 6923 to this new relocation value. */ 6924 if (fixP->fx_addsy == (symbolS *) NULL) 6925 fixP->fx_done = 1; 6926 6927 else 6928 { 6929 value = fixP->fx_offset; 6930 if (fixP->fx_pcrel) 6931 value -= md_pcrel_from_section (fixP, seg); 6932 } 6933 #endif 6934 6935 /* We are only able to convert some relocs to pc-relative. */ 6936 if (fixP->fx_pcrel) 6937 { 6938 switch (fixP->fx_r_type) 6939 { 6940 case BFD_RELOC_64: 6941 fixP->fx_r_type = BFD_RELOC_64_PCREL; 6942 break; 6943 6944 case BFD_RELOC_32: 6945 fixP->fx_r_type = BFD_RELOC_32_PCREL; 6946 break; 6947 6948 case BFD_RELOC_16: 6949 fixP->fx_r_type = BFD_RELOC_16_PCREL; 6950 break; 6951 6952 case BFD_RELOC_LO16: 6953 fixP->fx_r_type = BFD_RELOC_LO16_PCREL; 6954 break; 6955 6956 case BFD_RELOC_HI16: 6957 fixP->fx_r_type = BFD_RELOC_HI16_PCREL; 6958 break; 6959 6960 case BFD_RELOC_HI16_S: 6961 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL; 6962 break; 6963 6964 case BFD_RELOC_PPC64_ADDR16_HIGH: 6965 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGH; 6966 break; 6967 6968 case BFD_RELOC_PPC64_ADDR16_HIGHA: 6969 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHA; 6970 break; 6971 6972 case BFD_RELOC_PPC64_HIGHER: 6973 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER; 6974 break; 6975 6976 case BFD_RELOC_PPC64_HIGHER_S: 6977 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA; 6978 break; 6979 6980 case BFD_RELOC_PPC64_HIGHEST: 6981 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST; 6982 break; 6983 6984 case BFD_RELOC_PPC64_HIGHEST_S: 6985 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA; 6986 break; 6987 6988 case BFD_RELOC_PPC64_ADDR16_HIGHER34: 6989 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER34; 6990 break; 6991 6992 case BFD_RELOC_PPC64_ADDR16_HIGHERA34: 6993 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA34; 6994 break; 6995 6996 case BFD_RELOC_PPC64_ADDR16_HIGHEST34: 6997 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST34; 6998 break; 6999 7000 case BFD_RELOC_PPC64_ADDR16_HIGHESTA34: 7001 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA34; 7002 break; 7003 7004 case BFD_RELOC_PPC_16DX_HA: 7005 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7006 break; 7007 7008 case BFD_RELOC_PPC64_D34: 7009 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL34; 7010 break; 7011 7012 case BFD_RELOC_PPC64_D28: 7013 fixP->fx_r_type = BFD_RELOC_PPC64_PCREL28; 7014 break; 7015 7016 default: 7017 break; 7018 } 7019 } 7020 else if (!fixP->fx_done 7021 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA) 7022 { 7023 /* addpcis is relative to next insn address. */ 7024 value -= 4; 7025 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA; 7026 fixP->fx_pcrel = 1; 7027 } 7028 7029 operand = NULL; 7030 if (fixP->fx_pcrel_adjust != 0) 7031 { 7032 /* This is a fixup on an instruction. */ 7033 ppc_opindex_t opindex = fixP->fx_pcrel_adjust & PPC_OPINDEX_MAX; 7034 7035 operand = &powerpc_operands[opindex]; 7036 #ifdef OBJ_XCOFF 7037 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol 7038 does not generate a reloc. It uses the offset of `sym' within its 7039 csect. Other usages, such as `.long sym', generate relocs. This 7040 is the documented behaviour of non-TOC symbols. */ 7041 if ((operand->flags & PPC_OPERAND_PARENS) != 0 7042 && (operand->bitm & 0xfff0) == 0xfff0 7043 && operand->shift == 0 7044 && (operand->insert == NULL || ppc_obj64) 7045 && fixP->fx_addsy != NULL 7046 && symbol_get_tc (fixP->fx_addsy)->subseg != 0 7047 && !ppc_is_toc_sym (fixP->fx_addsy) 7048 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section) 7049 { 7050 value = fixP->fx_offset; 7051 fixP->fx_done = 1; 7052 } 7053 7054 /* During parsing of instructions, a TOC16 reloc is generated for 7055 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined 7056 in the toc. But at parse time, SYM may be not yet defined, so 7057 check again here. */ 7058 if (fixP->fx_r_type == BFD_RELOC_16 7059 && fixP->fx_addsy != NULL 7060 && ppc_is_toc_sym (fixP->fx_addsy)) 7061 fixP->fx_r_type = BFD_RELOC_PPC_TOC16; 7062 #endif 7063 } 7064 7065 /* Calculate value to be stored in field. */ 7066 fieldval = value; 7067 switch (fixP->fx_r_type) 7068 { 7069 #ifdef OBJ_ELF 7070 case BFD_RELOC_PPC64_ADDR16_LO_DS: 7071 case BFD_RELOC_PPC_VLE_LO16A: 7072 case BFD_RELOC_PPC_VLE_LO16D: 7073 #endif 7074 case BFD_RELOC_LO16: 7075 case BFD_RELOC_LO16_PCREL: 7076 fieldval = value & 0xffff; 7077 sign_extend_16: 7078 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7079 fieldval = SEX16 (fieldval); 7080 fixP->fx_no_overflow = 1; 7081 break; 7082 7083 case BFD_RELOC_HI16: 7084 case BFD_RELOC_HI16_PCREL: 7085 #ifdef OBJ_ELF 7086 if (REPORT_OVERFLOW_HI && ppc_obj64) 7087 { 7088 fieldval = value >> 16; 7089 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7090 { 7091 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7092 fieldval = ((valueT) fieldval ^ sign) - sign; 7093 } 7094 break; 7095 } 7096 /* Fallthru */ 7097 7098 case BFD_RELOC_PPC_VLE_HI16A: 7099 case BFD_RELOC_PPC_VLE_HI16D: 7100 case BFD_RELOC_PPC64_ADDR16_HIGH: 7101 #endif 7102 fieldval = PPC_HI (value); 7103 goto sign_extend_16; 7104 7105 case BFD_RELOC_HI16_S: 7106 case BFD_RELOC_HI16_S_PCREL: 7107 case BFD_RELOC_PPC_16DX_HA: 7108 case BFD_RELOC_PPC_REL16DX_HA: 7109 #ifdef OBJ_ELF 7110 if (REPORT_OVERFLOW_HI && ppc_obj64) 7111 { 7112 fieldval = (value + 0x8000) >> 16; 7113 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0) 7114 { 7115 valueT sign = (((valueT) -1 >> 16) + 1) >> 1; 7116 fieldval = ((valueT) fieldval ^ sign) - sign; 7117 } 7118 break; 7119 } 7120 /* Fallthru */ 7121 7122 case BFD_RELOC_PPC_VLE_HA16A: 7123 case BFD_RELOC_PPC_VLE_HA16D: 7124 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7125 #endif 7126 fieldval = PPC_HA (value); 7127 goto sign_extend_16; 7128 7129 #ifdef OBJ_ELF 7130 case BFD_RELOC_PPC64_HIGHER: 7131 fieldval = PPC_HIGHER (value); 7132 goto sign_extend_16; 7133 7134 case BFD_RELOC_PPC64_HIGHER_S: 7135 fieldval = PPC_HIGHERA (value); 7136 goto sign_extend_16; 7137 7138 case BFD_RELOC_PPC64_HIGHEST: 7139 fieldval = PPC_HIGHEST (value); 7140 goto sign_extend_16; 7141 7142 case BFD_RELOC_PPC64_HIGHEST_S: 7143 fieldval = PPC_HIGHESTA (value); 7144 goto sign_extend_16; 7145 #endif 7146 7147 default: 7148 break; 7149 } 7150 7151 if (operand != NULL) 7152 { 7153 /* Handle relocs in an insn. */ 7154 switch (fixP->fx_r_type) 7155 { 7156 #ifdef OBJ_ELF 7157 /* The following relocs can't be calculated by the assembler. 7158 Leave the field zero. */ 7159 case BFD_RELOC_PPC_TPREL16: 7160 case BFD_RELOC_PPC_TPREL16_LO: 7161 case BFD_RELOC_PPC_TPREL16_HI: 7162 case BFD_RELOC_PPC_TPREL16_HA: 7163 case BFD_RELOC_PPC_DTPREL16: 7164 case BFD_RELOC_PPC_DTPREL16_LO: 7165 case BFD_RELOC_PPC_DTPREL16_HI: 7166 case BFD_RELOC_PPC_DTPREL16_HA: 7167 case BFD_RELOC_PPC_GOT_TLSGD16: 7168 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7169 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7170 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7171 case BFD_RELOC_PPC_GOT_TLSLD16: 7172 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7173 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7174 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7175 case BFD_RELOC_PPC_GOT_TPREL16: 7176 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7177 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7178 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7179 case BFD_RELOC_PPC_GOT_DTPREL16: 7180 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7181 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7182 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7183 case BFD_RELOC_PPC64_TPREL16_DS: 7184 case BFD_RELOC_PPC64_TPREL16_LO_DS: 7185 case BFD_RELOC_PPC64_TPREL16_HIGH: 7186 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7187 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7188 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7189 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7190 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7191 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7192 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7193 case BFD_RELOC_PPC64_DTPREL16_DS: 7194 case BFD_RELOC_PPC64_DTPREL16_LO_DS: 7195 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7196 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7197 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7198 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7199 case BFD_RELOC_PPC64_TPREL34: 7200 case BFD_RELOC_PPC64_DTPREL34: 7201 case BFD_RELOC_PPC64_GOT_TLSGD_PCREL34: 7202 case BFD_RELOC_PPC64_GOT_TLSLD_PCREL34: 7203 case BFD_RELOC_PPC64_GOT_TPREL_PCREL34: 7204 case BFD_RELOC_PPC64_GOT_DTPREL_PCREL34: 7205 gas_assert (fixP->fx_addsy != NULL); 7206 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7207 fieldval = 0; 7208 break; 7209 7210 /* These also should leave the field zero for the same 7211 reason. Note that older versions of gas wrote values 7212 here. If we want to go back to the old behaviour, then 7213 all _LO and _LO_DS cases will need to be treated like 7214 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */ 7215 case BFD_RELOC_16_GOTOFF: 7216 case BFD_RELOC_LO16_GOTOFF: 7217 case BFD_RELOC_HI16_GOTOFF: 7218 case BFD_RELOC_HI16_S_GOTOFF: 7219 case BFD_RELOC_LO16_PLTOFF: 7220 case BFD_RELOC_HI16_PLTOFF: 7221 case BFD_RELOC_HI16_S_PLTOFF: 7222 case BFD_RELOC_GPREL16: 7223 case BFD_RELOC_16_BASEREL: 7224 case BFD_RELOC_LO16_BASEREL: 7225 case BFD_RELOC_HI16_BASEREL: 7226 case BFD_RELOC_HI16_S_BASEREL: 7227 case BFD_RELOC_PPC_TOC16: 7228 case BFD_RELOC_PPC64_TOC16_LO: 7229 case BFD_RELOC_PPC64_TOC16_HI: 7230 case BFD_RELOC_PPC64_TOC16_HA: 7231 case BFD_RELOC_PPC64_PLTGOT16: 7232 case BFD_RELOC_PPC64_PLTGOT16_LO: 7233 case BFD_RELOC_PPC64_PLTGOT16_HI: 7234 case BFD_RELOC_PPC64_PLTGOT16_HA: 7235 case BFD_RELOC_PPC64_GOT16_DS: 7236 case BFD_RELOC_PPC64_GOT16_LO_DS: 7237 case BFD_RELOC_PPC64_PLT16_LO_DS: 7238 case BFD_RELOC_PPC64_SECTOFF_DS: 7239 case BFD_RELOC_PPC64_SECTOFF_LO_DS: 7240 case BFD_RELOC_PPC64_TOC16_DS: 7241 case BFD_RELOC_PPC64_TOC16_LO_DS: 7242 case BFD_RELOC_PPC64_PLTGOT16_DS: 7243 case BFD_RELOC_PPC64_PLTGOT16_LO_DS: 7244 case BFD_RELOC_PPC_EMB_NADDR16: 7245 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7246 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7247 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7248 case BFD_RELOC_PPC_EMB_SDAI16: 7249 case BFD_RELOC_PPC_EMB_SDA2I16: 7250 case BFD_RELOC_PPC_EMB_SDA2REL: 7251 case BFD_RELOC_PPC_EMB_SDA21: 7252 case BFD_RELOC_PPC_EMB_MRKREF: 7253 case BFD_RELOC_PPC_EMB_RELSEC16: 7254 case BFD_RELOC_PPC_EMB_RELST_LO: 7255 case BFD_RELOC_PPC_EMB_RELST_HI: 7256 case BFD_RELOC_PPC_EMB_RELST_HA: 7257 case BFD_RELOC_PPC_EMB_BIT_FLD: 7258 case BFD_RELOC_PPC_EMB_RELSDA: 7259 case BFD_RELOC_PPC_VLE_SDA21: 7260 case BFD_RELOC_PPC_VLE_SDA21_LO: 7261 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7262 case BFD_RELOC_PPC_VLE_SDAREL_LO16D: 7263 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7264 case BFD_RELOC_PPC_VLE_SDAREL_HI16D: 7265 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7266 case BFD_RELOC_PPC_VLE_SDAREL_HA16D: 7267 case BFD_RELOC_PPC64_GOT_PCREL34: 7268 case BFD_RELOC_PPC64_PLT_PCREL34: 7269 gas_assert (fixP->fx_addsy != NULL); 7270 /* Fallthru */ 7271 7272 case BFD_RELOC_PPC_TLS: 7273 case BFD_RELOC_PPC_TLSGD: 7274 case BFD_RELOC_PPC_TLSLD: 7275 case BFD_RELOC_PPC64_TLS_PCREL: 7276 fieldval = 0; 7277 break; 7278 #endif 7279 7280 #ifdef OBJ_XCOFF 7281 case BFD_RELOC_PPC_B16: 7282 /* Adjust the offset to the instruction boundary. */ 7283 fieldval += 2; 7284 break; 7285 #endif 7286 7287 case BFD_RELOC_VTABLE_INHERIT: 7288 case BFD_RELOC_VTABLE_ENTRY: 7289 case BFD_RELOC_PPC_DTPMOD: 7290 case BFD_RELOC_PPC_TPREL: 7291 case BFD_RELOC_PPC_DTPREL: 7292 case BFD_RELOC_PPC_COPY: 7293 case BFD_RELOC_PPC_GLOB_DAT: 7294 case BFD_RELOC_32_PLT_PCREL: 7295 case BFD_RELOC_PPC_EMB_NADDR32: 7296 case BFD_RELOC_PPC64_TOC: 7297 case BFD_RELOC_CTOR: 7298 case BFD_RELOC_32: 7299 case BFD_RELOC_32_PCREL: 7300 case BFD_RELOC_RVA: 7301 case BFD_RELOC_64: 7302 case BFD_RELOC_64_PCREL: 7303 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7304 as_bad_where (fixP->fx_file, fixP->fx_line, 7305 _("%s unsupported as instruction fixup"), 7306 bfd_get_reloc_code_name (fixP->fx_r_type)); 7307 fixP->fx_done = 1; 7308 return; 7309 7310 default: 7311 break; 7312 } 7313 7314 #ifdef OBJ_ELF 7315 /* powerpc uses RELA style relocs, so if emitting a reloc the field 7316 contents can stay at zero. */ 7317 #define APPLY_RELOC fixP->fx_done 7318 #else 7319 #define APPLY_RELOC 1 7320 #endif 7321 /* We need to call the insert function even when fieldval is 7322 zero if the insert function would translate that zero to a 7323 bit pattern other than all zeros. */ 7324 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL) 7325 { 7326 uint64_t insn; 7327 unsigned char *where; 7328 7329 /* Fetch the instruction, insert the fully resolved operand 7330 value, and stuff the instruction back again. */ 7331 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where; 7332 if (target_big_endian) 7333 { 7334 if (fixP->fx_size < 4) 7335 insn = bfd_getb16 (where); 7336 else 7337 { 7338 insn = bfd_getb32 (where); 7339 if (fixP->fx_size > 4) 7340 insn = insn << 32 | bfd_getb32 (where + 4); 7341 } 7342 } 7343 else 7344 { 7345 if (fixP->fx_size < 4) 7346 insn = bfd_getl16 (where); 7347 else 7348 { 7349 insn = bfd_getl32 (where); 7350 if (fixP->fx_size > 4) 7351 insn = insn << 32 | bfd_getl32 (where + 4); 7352 } 7353 } 7354 insn = ppc_insert_operand (insn, operand, fieldval, 7355 fixP->tc_fix_data.ppc_cpu, 7356 fixP->fx_file, fixP->fx_line); 7357 if (target_big_endian) 7358 { 7359 if (fixP->fx_size < 4) 7360 bfd_putb16 (insn, where); 7361 else 7362 { 7363 if (fixP->fx_size > 4) 7364 { 7365 bfd_putb32 (insn, where + 4); 7366 insn >>= 32; 7367 } 7368 bfd_putb32 (insn, where); 7369 } 7370 } 7371 else 7372 { 7373 if (fixP->fx_size < 4) 7374 bfd_putl16 (insn, where); 7375 else 7376 { 7377 if (fixP->fx_size > 4) 7378 { 7379 bfd_putl32 (insn, where + 4); 7380 insn >>= 32; 7381 } 7382 bfd_putl32 (insn, where); 7383 } 7384 } 7385 } 7386 7387 if (fixP->fx_done) 7388 /* Nothing else to do here. */ 7389 return; 7390 7391 gas_assert (fixP->fx_addsy != NULL); 7392 if (fixP->fx_r_type == BFD_RELOC_NONE) 7393 { 7394 const char *sfile; 7395 unsigned int sline; 7396 7397 /* Use expr_symbol_where to see if this is an expression 7398 symbol. */ 7399 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline)) 7400 as_bad_where (fixP->fx_file, fixP->fx_line, 7401 _("unresolved expression that must be resolved")); 7402 else 7403 as_bad_where (fixP->fx_file, fixP->fx_line, 7404 _("unsupported relocation against %s"), 7405 S_GET_NAME (fixP->fx_addsy)); 7406 fixP->fx_done = 1; 7407 return; 7408 } 7409 } 7410 else 7411 { 7412 /* Handle relocs in data. */ 7413 switch (fixP->fx_r_type) 7414 { 7415 case BFD_RELOC_VTABLE_INHERIT: 7416 if (fixP->fx_addsy 7417 && !S_IS_DEFINED (fixP->fx_addsy) 7418 && !S_IS_WEAK (fixP->fx_addsy)) 7419 S_SET_WEAK (fixP->fx_addsy); 7420 /* Fallthru */ 7421 7422 case BFD_RELOC_VTABLE_ENTRY: 7423 fixP->fx_done = 0; 7424 break; 7425 7426 #ifdef OBJ_ELF 7427 /* These can appear with @l etc. in data. */ 7428 case BFD_RELOC_LO16: 7429 case BFD_RELOC_LO16_PCREL: 7430 case BFD_RELOC_HI16: 7431 case BFD_RELOC_HI16_PCREL: 7432 case BFD_RELOC_HI16_S: 7433 case BFD_RELOC_HI16_S_PCREL: 7434 case BFD_RELOC_PPC64_HIGHER: 7435 case BFD_RELOC_PPC64_HIGHER_S: 7436 case BFD_RELOC_PPC64_HIGHEST: 7437 case BFD_RELOC_PPC64_HIGHEST_S: 7438 case BFD_RELOC_PPC64_ADDR16_HIGH: 7439 case BFD_RELOC_PPC64_ADDR16_HIGHA: 7440 case BFD_RELOC_PPC64_ADDR64_LOCAL: 7441 break; 7442 7443 case BFD_RELOC_PPC_DTPMOD: 7444 case BFD_RELOC_PPC_TPREL: 7445 case BFD_RELOC_PPC_DTPREL: 7446 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7447 break; 7448 7449 /* Just punt all of these to the linker. */ 7450 case BFD_RELOC_PPC_B16_BRTAKEN: 7451 case BFD_RELOC_PPC_B16_BRNTAKEN: 7452 case BFD_RELOC_16_GOTOFF: 7453 case BFD_RELOC_LO16_GOTOFF: 7454 case BFD_RELOC_HI16_GOTOFF: 7455 case BFD_RELOC_HI16_S_GOTOFF: 7456 case BFD_RELOC_LO16_PLTOFF: 7457 case BFD_RELOC_HI16_PLTOFF: 7458 case BFD_RELOC_HI16_S_PLTOFF: 7459 case BFD_RELOC_PPC_COPY: 7460 case BFD_RELOC_PPC_GLOB_DAT: 7461 case BFD_RELOC_16_BASEREL: 7462 case BFD_RELOC_LO16_BASEREL: 7463 case BFD_RELOC_HI16_BASEREL: 7464 case BFD_RELOC_HI16_S_BASEREL: 7465 case BFD_RELOC_PPC_TLS: 7466 case BFD_RELOC_PPC_DTPREL16_LO: 7467 case BFD_RELOC_PPC_DTPREL16_HI: 7468 case BFD_RELOC_PPC_DTPREL16_HA: 7469 case BFD_RELOC_PPC_TPREL16_LO: 7470 case BFD_RELOC_PPC_TPREL16_HI: 7471 case BFD_RELOC_PPC_TPREL16_HA: 7472 case BFD_RELOC_PPC_GOT_TLSGD16: 7473 case BFD_RELOC_PPC_GOT_TLSGD16_LO: 7474 case BFD_RELOC_PPC_GOT_TLSGD16_HI: 7475 case BFD_RELOC_PPC_GOT_TLSGD16_HA: 7476 case BFD_RELOC_PPC_GOT_TLSLD16: 7477 case BFD_RELOC_PPC_GOT_TLSLD16_LO: 7478 case BFD_RELOC_PPC_GOT_TLSLD16_HI: 7479 case BFD_RELOC_PPC_GOT_TLSLD16_HA: 7480 case BFD_RELOC_PPC_GOT_DTPREL16: 7481 case BFD_RELOC_PPC_GOT_DTPREL16_LO: 7482 case BFD_RELOC_PPC_GOT_DTPREL16_HI: 7483 case BFD_RELOC_PPC_GOT_DTPREL16_HA: 7484 case BFD_RELOC_PPC_GOT_TPREL16: 7485 case BFD_RELOC_PPC_GOT_TPREL16_LO: 7486 case BFD_RELOC_PPC_GOT_TPREL16_HI: 7487 case BFD_RELOC_PPC_GOT_TPREL16_HA: 7488 case BFD_RELOC_24_PLT_PCREL: 7489 case BFD_RELOC_PPC_LOCAL24PC: 7490 case BFD_RELOC_32_PLT_PCREL: 7491 case BFD_RELOC_GPREL16: 7492 case BFD_RELOC_PPC_VLE_SDAREL_LO16A: 7493 case BFD_RELOC_PPC_VLE_SDAREL_HI16A: 7494 case BFD_RELOC_PPC_VLE_SDAREL_HA16A: 7495 case BFD_RELOC_PPC_EMB_NADDR32: 7496 case BFD_RELOC_PPC_EMB_NADDR16: 7497 case BFD_RELOC_PPC_EMB_NADDR16_LO: 7498 case BFD_RELOC_PPC_EMB_NADDR16_HI: 7499 case BFD_RELOC_PPC_EMB_NADDR16_HA: 7500 case BFD_RELOC_PPC_EMB_SDAI16: 7501 case BFD_RELOC_PPC_EMB_SDA2REL: 7502 case BFD_RELOC_PPC_EMB_SDA2I16: 7503 case BFD_RELOC_PPC_EMB_SDA21: 7504 case BFD_RELOC_PPC_VLE_SDA21_LO: 7505 case BFD_RELOC_PPC_EMB_MRKREF: 7506 case BFD_RELOC_PPC_EMB_RELSEC16: 7507 case BFD_RELOC_PPC_EMB_RELST_LO: 7508 case BFD_RELOC_PPC_EMB_RELST_HI: 7509 case BFD_RELOC_PPC_EMB_RELST_HA: 7510 case BFD_RELOC_PPC_EMB_BIT_FLD: 7511 case BFD_RELOC_PPC_EMB_RELSDA: 7512 case BFD_RELOC_PPC64_TOC: 7513 case BFD_RELOC_PPC_TOC16: 7514 case BFD_RELOC_PPC_TOC16_LO: 7515 case BFD_RELOC_PPC_TOC16_HI: 7516 case BFD_RELOC_PPC64_TOC16_LO: 7517 case BFD_RELOC_PPC64_TOC16_HI: 7518 case BFD_RELOC_PPC64_TOC16_HA: 7519 case BFD_RELOC_PPC64_DTPREL16_HIGH: 7520 case BFD_RELOC_PPC64_DTPREL16_HIGHA: 7521 case BFD_RELOC_PPC64_DTPREL16_HIGHER: 7522 case BFD_RELOC_PPC64_DTPREL16_HIGHERA: 7523 case BFD_RELOC_PPC64_DTPREL16_HIGHEST: 7524 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA: 7525 case BFD_RELOC_PPC64_TPREL16_HIGH: 7526 case BFD_RELOC_PPC64_TPREL16_HIGHA: 7527 case BFD_RELOC_PPC64_TPREL16_HIGHER: 7528 case BFD_RELOC_PPC64_TPREL16_HIGHERA: 7529 case BFD_RELOC_PPC64_TPREL16_HIGHEST: 7530 case BFD_RELOC_PPC64_TPREL16_HIGHESTA: 7531 case BFD_RELOC_PPC64_TLS_PCREL: 7532 fixP->fx_done = 0; 7533 break; 7534 #endif 7535 7536 #ifdef OBJ_XCOFF 7537 case BFD_RELOC_PPC_TLSGD: 7538 case BFD_RELOC_PPC_TLSLD: 7539 case BFD_RELOC_PPC_TLSLE: 7540 case BFD_RELOC_PPC_TLSIE: 7541 case BFD_RELOC_PPC_TLSM: 7542 case BFD_RELOC_PPC64_TLSGD: 7543 case BFD_RELOC_PPC64_TLSLD: 7544 case BFD_RELOC_PPC64_TLSLE: 7545 case BFD_RELOC_PPC64_TLSIE: 7546 case BFD_RELOC_PPC64_TLSM: 7547 gas_assert (fixP->fx_addsy != NULL); 7548 S_SET_THREAD_LOCAL (fixP->fx_addsy); 7549 break; 7550 7551 /* Officially, R_TLSML relocations must be from a TOC entry 7552 targeting itself. In practice, this TOC entry is always 7553 named (or .rename) "_$TLSML". 7554 Thus, as it doesn't seem possible to retrieve the symbol 7555 being relocated here, we simply check that the symbol 7556 targeted by R_TLSML is indeed a TOC entry named "_$TLSML". 7557 FIXME: Find a way to correctly check R_TLSML relocations 7558 as described above. */ 7559 case BFD_RELOC_PPC_TLSML: 7560 case BFD_RELOC_PPC64_TLSML: 7561 gas_assert (fixP->fx_addsy != NULL); 7562 if ((symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC 7563 || symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TE) 7564 && strcmp (symbol_get_tc (fixP->fx_addsy)->real_name, "_$TLSML") != 0) 7565 as_bad_where (fixP->fx_file, fixP->fx_line, 7566 _("R_TLSML relocation doesn't target a " 7567 "TOC entry named \"_$TLSML\": %s"), S_GET_NAME(fixP->fx_addsy)); 7568 fieldval = 0; 7569 break; 7570 7571 case BFD_RELOC_NONE: 7572 #endif 7573 case BFD_RELOC_CTOR: 7574 case BFD_RELOC_32: 7575 case BFD_RELOC_32_PCREL: 7576 case BFD_RELOC_RVA: 7577 case BFD_RELOC_64: 7578 case BFD_RELOC_64_PCREL: 7579 case BFD_RELOC_16: 7580 case BFD_RELOC_16_PCREL: 7581 case BFD_RELOC_8: 7582 break; 7583 7584 default: 7585 fprintf (stderr, 7586 _("Gas failure, reloc value %d\n"), fixP->fx_r_type); 7587 fflush (stderr); 7588 abort (); 7589 } 7590 7591 if (fixP->fx_size && APPLY_RELOC) 7592 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where, 7593 fieldval, fixP->fx_size); 7594 if (warn_476 7595 && (seg->flags & SEC_CODE) != 0 7596 && fixP->fx_size == 4 7597 && fixP->fx_done 7598 && !fixP->fx_tcbit 7599 && (fixP->fx_r_type == BFD_RELOC_32 7600 || fixP->fx_r_type == BFD_RELOC_CTOR 7601 || fixP->fx_r_type == BFD_RELOC_32_PCREL)) 7602 as_warn_where (fixP->fx_file, fixP->fx_line, 7603 _("data in executable section")); 7604 } 7605 7606 #ifdef OBJ_ELF 7607 ppc_elf_validate_fix (fixP, seg); 7608 fixP->fx_addnumber = value; 7609 7610 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately 7611 from the section contents. If we are going to be emitting a reloc 7612 then the section contents are immaterial, so don't warn if they 7613 happen to overflow. Leave such warnings to ld. */ 7614 if (!fixP->fx_done) 7615 { 7616 fixP->fx_no_overflow = 1; 7617 7618 /* Arrange to emit .TOC. as a normal symbol if used in anything 7619 but .TOC.@tocbase. */ 7620 if (ppc_obj64 7621 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC 7622 && fixP->fx_addsy != NULL 7623 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0) 7624 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP; 7625 } 7626 #else 7627 if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16 7628 || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI 7629 || fixP->fx_r_type == BFD_RELOC_PPC_TOC16_LO) 7630 { 7631 /* We want to use the offset within the toc, not the actual VMA 7632 of the symbol. */ 7633 fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) 7634 - S_GET_VALUE (ppc_toc_csect)); 7635 7636 /* The high bits must be adjusted for the low bits being signed. */ 7637 if (fixP->fx_r_type == BFD_RELOC_PPC_TOC16_HI) { 7638 fixP->fx_addnumber += 0x8000; 7639 } 7640 7641 /* Set *valP to avoid errors. */ 7642 *valP = value; 7643 } 7644 else if (fixP->fx_r_type == BFD_RELOC_PPC_TLSM 7645 || fixP->fx_r_type == BFD_RELOC_PPC64_TLSM 7646 || fixP->fx_r_type == BFD_RELOC_PPC_TLSML 7647 || fixP->fx_r_type == BFD_RELOC_PPC64_TLSML) 7648 /* AIX ld expects the section contents for these relocations 7649 to be zero. Arrange for that to occur when 7650 bfd_install_relocation is called. */ 7651 fixP->fx_addnumber = (- bfd_section_vma (S_GET_SEGMENT (fixP->fx_addsy)) 7652 - S_GET_VALUE (fixP->fx_addsy) 7653 - fieldval); 7654 else 7655 fixP->fx_addnumber = 0; 7656 #endif 7657 } 7658 7659 /* Generate a reloc for a fixup. */ 7660 7661 arelent ** 7662 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp) 7663 { 7664 static arelent *relocs[3]; 7665 arelent *reloc; 7666 7667 relocs[0] = reloc = XNEW (arelent); 7668 relocs[1] = NULL; 7669 7670 reloc->sym_ptr_ptr = XNEW (asymbol *); 7671 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 7672 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7673 /* BFD_RELOC_PPC64_TLS_PCREL generates R_PPC64_TLS with an odd r_offset. */ 7674 if (fixp->fx_r_type == BFD_RELOC_PPC64_TLS_PCREL) 7675 reloc->address++; 7676 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 7677 if (reloc->howto == (reloc_howto_type *) NULL) 7678 { 7679 as_bad_where (fixp->fx_file, fixp->fx_line, 7680 _("reloc %d not supported by object file format"), 7681 (int) fixp->fx_r_type); 7682 relocs[0] = NULL; 7683 } 7684 reloc->addend = fixp->fx_addnumber; 7685 7686 if (fixp->fx_subsy != NULL) 7687 { 7688 relocs[1] = reloc = XNEW (arelent); 7689 relocs[2] = NULL; 7690 7691 reloc->sym_ptr_ptr = XNEW (asymbol *); 7692 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy); 7693 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 7694 7695 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_PPC_NEG); 7696 reloc->addend = fixp->fx_addnumber; 7697 7698 if (reloc->howto == (reloc_howto_type *) NULL) 7699 { 7700 as_bad_subtract (fixp); 7701 free (relocs[1]->sym_ptr_ptr); 7702 free (relocs[1]); 7703 free (relocs[0]->sym_ptr_ptr); 7704 free (relocs[0]); 7705 relocs[0] = NULL; 7706 } 7707 } 7708 7709 7710 return relocs; 7711 } 7712 7713 void 7714 ppc_cfi_frame_initial_instructions (void) 7715 { 7716 cfi_add_CFA_def_cfa (1, 0); 7717 } 7718 7719 int 7720 tc_ppc_regname_to_dw2regnum (char *regname) 7721 { 7722 unsigned int regnum = -1; 7723 unsigned int i; 7724 const char *p; 7725 char *q; 7726 static struct { const char *name; int dw2regnum; } regnames[] = 7727 { 7728 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 }, 7729 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 }, 7730 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 }, 7731 { "spe_acc", 111 }, { "spefscr", 112 } 7732 }; 7733 7734 for (i = 0; i < ARRAY_SIZE (regnames); ++i) 7735 if (strcmp (regnames[i].name, regname) == 0) 7736 return regnames[i].dw2regnum; 7737 7738 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v') 7739 { 7740 p = regname + 1 + (regname[1] == '.'); 7741 regnum = strtoul (p, &q, 10); 7742 if (p == q || *q || regnum >= 32) 7743 return -1; 7744 if (regname[0] == 'f') 7745 regnum += 32; 7746 else if (regname[0] == 'v') 7747 regnum += 77; 7748 } 7749 else if (regname[0] == 'c' && regname[1] == 'r') 7750 { 7751 p = regname + 2 + (regname[2] == '.'); 7752 if (p[0] < '0' || p[0] > '7' || p[1]) 7753 return -1; 7754 regnum = p[0] - '0' + 68; 7755 } 7756 return regnum; 7757 } 7758