1 /* tc-mcore.c -- Assemble code for M*Core 2 Copyright 1999, 2000, 2001, 2002, 2003, 2005, 2006, 2007 3 Free Software Foundation, Inc. 4 5 This file is part of GAS, the GNU Assembler. 6 7 GAS is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3, or (at your option) 10 any later version. 11 12 GAS is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with GAS; see the file COPYING. If not, write to the Free 19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 20 02110-1301, USA. */ 21 22 #include "as.h" 23 #include "subsegs.h" 24 #define DEFINE_TABLE 25 #include "../opcodes/mcore-opc.h" 26 #include "safe-ctype.h" 27 28 #ifdef OBJ_ELF 29 #include "elf/mcore.h" 30 #endif 31 32 #ifndef streq 33 #define streq(a,b) (strcmp (a, b) == 0) 34 #endif 35 36 /* Forward declarations for dumb compilers. */ 37 38 /* Several places in this file insert raw instructions into the 39 object. They should use MCORE_INST_XXX macros to get the opcodes 40 and then use these two macros to crack the MCORE_INST value into 41 the appropriate byte values. */ 42 #define INST_BYTE0(x) (target_big_endian ? (((x) >> 8) & 0xFF) : ((x) & 0xFF)) 43 #define INST_BYTE1(x) (target_big_endian ? ((x) & 0xFF) : (((x) >> 8) & 0xFF)) 44 45 const char comment_chars[] = "#/"; 46 const char line_separator_chars[] = ";"; 47 const char line_comment_chars[] = "#/"; 48 49 static int do_jsri2bsr = 0; /* Change here from 1 by Cruess 19 August 97. */ 50 static int sifilter_mode = 0; 51 52 const char EXP_CHARS[] = "eE"; 53 54 /* Chars that mean this number is a floating point constant 55 As in 0f12.456 56 or 0d1.2345e12 */ 57 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 58 59 #define C(what,length) (((what) << 2) + (length)) 60 #define GET_WHAT(x) ((x >> 2)) 61 62 /* These are the two types of relaxable instruction. */ 63 #define COND_JUMP 1 64 #define UNCD_JUMP 2 65 66 #define UNDEF_DISP 0 67 #define DISP12 1 68 #define DISP32 2 69 #define UNDEF_WORD_DISP 3 70 71 #define C12_LEN 2 72 #define C32_LEN 10 /* Allow for align. */ 73 #define U12_LEN 2 74 #define U32_LEN 8 /* Allow for align. */ 75 76 typedef enum 77 { 78 M210, 79 M340 80 } 81 cpu_type; 82 83 cpu_type cpu = M340; 84 85 /* Initialize the relax table. */ 86 const relax_typeS md_relax_table[] = 87 { 88 { 0, 0, 0, 0 }, 89 { 0, 0, 0, 0 }, 90 { 0, 0, 0, 0 }, 91 { 0, 0, 0, 0 }, 92 93 /* COND_JUMP */ 94 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 95 { 2048, -2046, C12_LEN, C(COND_JUMP, DISP32) }, /* DISP12 */ 96 { 0, 0, C32_LEN, 0 }, /* DISP32 */ 97 { 0, 0, C32_LEN, 0 }, /* UNDEF_WORD_DISP */ 98 99 /* UNCD_JUMP */ 100 { 0, 0, 0, 0 }, /* UNDEF_DISP */ 101 { 2048, -2046, U12_LEN, C(UNCD_JUMP, DISP32) }, /* DISP12 */ 102 { 0, 0, U32_LEN, 0 }, /* DISP32 */ 103 { 0, 0, U32_LEN, 0 } /* UNDEF_WORD_DISP */ 104 105 }; 106 107 /* Literal pool data structures. */ 108 struct literal 109 { 110 unsigned short refcnt; 111 unsigned char ispcrel; 112 unsigned char unused; 113 expressionS e; 114 }; 115 116 #define MAX_POOL_SIZE (1024/4) 117 static struct literal litpool [MAX_POOL_SIZE]; 118 static unsigned poolsize; 119 static unsigned poolnumber; 120 static unsigned long poolspan; 121 122 /* SPANPANIC: the point at which we get too scared and force a dump 123 of the literal pool, and perhaps put a branch in place. 124 Calculated as: 125 1024 span of lrw/jmpi/jsri insn (actually span+1) 126 -2 possible alignment at the insn. 127 -2 possible alignment to get the table aligned. 128 -2 an inserted branch around the table. 129 == 1018 130 at 1018, we might be in trouble. 131 -- so we have to be smaller than 1018 and since we deal with 2-byte 132 instructions, the next good choice is 1016. 133 -- Note we have a test case that fails when we've got 1018 here. */ 134 #define SPANPANIC (1016) /* 1024 - 1 entry - 2 byte rounding. */ 135 #define SPANCLOSE (900) 136 #define SPANEXIT (600) 137 static symbolS * poolsym; /* Label for current pool. */ 138 static char poolname[8]; 139 static struct hash_control * opcode_hash_control; /* Opcode mnemonics. */ 140 141 #define POOL_END_LABEL ".LE" 142 #define POOL_START_LABEL ".LS" 143 144 static void 145 make_name (char * s, char * p, int n) 146 { 147 static const char hex[] = "0123456789ABCDEF"; 148 149 s[0] = p[0]; 150 s[1] = p[1]; 151 s[2] = p[2]; 152 s[3] = hex[(n >> 12) & 0xF]; 153 s[4] = hex[(n >> 8) & 0xF]; 154 s[5] = hex[(n >> 4) & 0xF]; 155 s[6] = hex[(n) & 0xF]; 156 s[7] = 0; 157 } 158 159 static void 160 dump_literals (int isforce) 161 { 162 unsigned int i; 163 struct literal * p; 164 symbolS * brarsym = NULL; 165 166 if (poolsize == 0) 167 return; 168 169 /* Must we branch around the literal table? */ 170 if (isforce) 171 { 172 char * output; 173 char brarname[8]; 174 175 make_name (brarname, POOL_END_LABEL, poolnumber); 176 177 brarsym = symbol_make (brarname); 178 179 symbol_table_insert (brarsym); 180 181 output = frag_var (rs_machine_dependent, 182 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 183 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 184 C (UNCD_JUMP, 0), brarsym, 0, 0); 185 output[0] = INST_BYTE0 (MCORE_INST_BR); /* br .+xxx */ 186 output[1] = INST_BYTE1 (MCORE_INST_BR); 187 } 188 189 /* Make sure that the section is sufficiently aligned and that 190 the literal table is aligned within it. */ 191 record_alignment (now_seg, 2); 192 frag_align (2, 0, 0); 193 194 colon (S_GET_NAME (poolsym)); 195 196 for (i = 0, p = litpool; i < poolsize; i++, p++) 197 emit_expr (& p->e, 4); 198 199 if (brarsym != NULL) 200 colon (S_GET_NAME (brarsym)); 201 202 poolsize = 0; 203 } 204 205 static void 206 mcore_s_literals (int ignore ATTRIBUTE_UNUSED) 207 { 208 dump_literals (0); 209 demand_empty_rest_of_line (); 210 } 211 212 /* Perform FUNC (ARG), and track number of bytes added to frag. */ 213 214 static void 215 mcore_pool_count (void (*func) (int), int arg) 216 { 217 const fragS *curr_frag = frag_now; 218 offsetT added = -frag_now_fix_octets (); 219 220 (*func) (arg); 221 222 while (curr_frag != frag_now) 223 { 224 added += curr_frag->fr_fix; 225 curr_frag = curr_frag->fr_next; 226 } 227 228 added += frag_now_fix_octets (); 229 poolspan += added; 230 } 231 232 static void 233 check_literals (int kind, int offset) 234 { 235 poolspan += offset; 236 237 /* SPANCLOSE and SPANEXIT are smaller numbers than SPANPANIC. 238 SPANPANIC means that we must dump now. 239 kind == 0 is any old instruction. 240 kind > 0 means we just had a control transfer instruction. 241 kind == 1 means within a function 242 kind == 2 means we just left a function 243 244 The dump_literals (1) call inserts a branch around the table, so 245 we first look to see if its a situation where we won't have to 246 insert a branch (e.g., the previous instruction was an unconditional 247 branch). 248 249 SPANPANIC is the point where we must dump a single-entry pool. 250 it accounts for alignments and an inserted branch. 251 the 'poolsize*2' accounts for the scenario where we do: 252 lrw r1,lit1; lrw r2,lit2; lrw r3,lit3 253 Note that the 'lit2' reference is 2 bytes further along 254 but the literal it references will be 4 bytes further along, 255 so we must consider the poolsize into this equation. 256 This is slightly over-cautious, but guarantees that we won't 257 panic because a relocation is too distant. */ 258 259 if (poolspan > SPANCLOSE && kind > 0) 260 dump_literals (0); 261 else if (poolspan > SPANEXIT && kind > 1) 262 dump_literals (0); 263 else if (poolspan >= (SPANPANIC - poolsize * 2)) 264 dump_literals (1); 265 } 266 267 static void 268 mcore_cons (int nbytes) 269 { 270 if (now_seg == text_section) 271 mcore_pool_count (cons, nbytes); 272 else 273 cons (nbytes); 274 275 /* In theory we ought to call check_literals (2,0) here in case 276 we need to dump the literal table. We cannot do this however, 277 as the directives that we are intercepting may be being used 278 to build a switch table, and we must not interfere with its 279 contents. Instead we cross our fingers and pray... */ 280 } 281 282 static void 283 mcore_float_cons (int float_type) 284 { 285 if (now_seg == text_section) 286 mcore_pool_count (float_cons, float_type); 287 else 288 float_cons (float_type); 289 290 /* See the comment in mcore_cons () about calling check_literals. 291 It is unlikely that a switch table will be constructed using 292 floating point values, but it is still likely that an indexed 293 table of floating point constants is being created by these 294 directives, so again we must not interfere with their placement. */ 295 } 296 297 static void 298 mcore_stringer (int append_zero) 299 { 300 if (now_seg == text_section) 301 mcore_pool_count (stringer, append_zero); 302 else 303 stringer (append_zero); 304 305 /* We call check_literals here in case a large number of strings are 306 being placed into the text section with a sequence of stringer 307 directives. In theory we could be upsetting something if these 308 strings are actually in an indexed table instead of referenced by 309 individual labels. Let us hope that that never happens. */ 310 check_literals (2, 0); 311 } 312 313 static void 314 mcore_fill (int unused) 315 { 316 if (now_seg == text_section) 317 mcore_pool_count (s_fill, unused); 318 else 319 s_fill (unused); 320 321 check_literals (2, 0); 322 } 323 324 /* Handle the section changing pseudo-ops. These call through to the 325 normal implementations, but they dump the literal pool first. */ 326 327 static void 328 mcore_s_text (int ignore) 329 { 330 dump_literals (0); 331 332 #ifdef OBJ_ELF 333 obj_elf_text (ignore); 334 #else 335 s_text (ignore); 336 #endif 337 } 338 339 static void 340 mcore_s_data (int ignore) 341 { 342 dump_literals (0); 343 344 #ifdef OBJ_ELF 345 obj_elf_data (ignore); 346 #else 347 s_data (ignore); 348 #endif 349 } 350 351 static void 352 mcore_s_section (int ignore) 353 { 354 /* Scan forwards to find the name of the section. If the section 355 being switched to is ".line" then this is a DWARF1 debug section 356 which is arbitrarily placed inside generated code. In this case 357 do not dump the literal pool because it is a) inefficient and 358 b) would require the generation of extra code to jump around the 359 pool. */ 360 char * ilp = input_line_pointer; 361 362 while (*ilp != 0 && ISSPACE (*ilp)) 363 ++ ilp; 364 365 if (strncmp (ilp, ".line", 5) == 0 366 && (ISSPACE (ilp[5]) || *ilp == '\n' || *ilp == '\r')) 367 ; 368 else 369 dump_literals (0); 370 371 #ifdef OBJ_ELF 372 obj_elf_section (ignore); 373 #endif 374 #ifdef OBJ_COFF 375 obj_coff_section (ignore); 376 #endif 377 } 378 379 static void 380 mcore_s_bss (int needs_align) 381 { 382 dump_literals (0); 383 384 s_lcomm_bytes (needs_align); 385 } 386 387 #ifdef OBJ_ELF 388 static void 389 mcore_s_comm (int needs_align) 390 { 391 dump_literals (0); 392 393 obj_elf_common (needs_align); 394 } 395 #endif 396 397 /* This table describes all the machine specific pseudo-ops the assembler 398 has to support. The fields are: 399 Pseudo-op name without dot 400 Function to call to execute this pseudo-op 401 Integer arg to pass to the function. */ 402 const pseudo_typeS md_pseudo_table[] = 403 { 404 { "export", s_globl, 0 }, 405 { "import", s_ignore, 0 }, 406 { "literals", mcore_s_literals, 0 }, 407 { "page", listing_eject, 0 }, 408 409 /* The following are to intercept the placement of data into the text 410 section (eg addresses for a switch table), so that the space they 411 occupy can be taken into account when deciding whether or not to 412 dump the current literal pool. 413 XXX - currently we do not cope with the .space and .dcb.d directives. */ 414 { "ascii", mcore_stringer, 8 + 0 }, 415 { "asciz", mcore_stringer, 8 + 1 }, 416 { "byte", mcore_cons, 1 }, 417 { "dc", mcore_cons, 2 }, 418 { "dc.b", mcore_cons, 1 }, 419 { "dc.d", mcore_float_cons, 'd'}, 420 { "dc.l", mcore_cons, 4 }, 421 { "dc.s", mcore_float_cons, 'f'}, 422 { "dc.w", mcore_cons, 2 }, 423 { "dc.x", mcore_float_cons, 'x'}, 424 { "double", mcore_float_cons, 'd'}, 425 { "float", mcore_float_cons, 'f'}, 426 { "hword", mcore_cons, 2 }, 427 { "int", mcore_cons, 4 }, 428 { "long", mcore_cons, 4 }, 429 { "octa", mcore_cons, 16 }, 430 { "quad", mcore_cons, 8 }, 431 { "short", mcore_cons, 2 }, 432 { "single", mcore_float_cons, 'f'}, 433 { "string", mcore_stringer, 8 + 1 }, 434 { "word", mcore_cons, 2 }, 435 { "fill", mcore_fill, 0 }, 436 437 /* Allow for the effect of section changes. */ 438 { "text", mcore_s_text, 0 }, 439 { "data", mcore_s_data, 0 }, 440 { "bss", mcore_s_bss, 1 }, 441 #ifdef OBJ_ELF 442 { "comm", mcore_s_comm, 0 }, 443 #endif 444 { "section", mcore_s_section, 0 }, 445 { "section.s", mcore_s_section, 0 }, 446 { "sect", mcore_s_section, 0 }, 447 { "sect.s", mcore_s_section, 0 }, 448 449 { 0, 0, 0 } 450 }; 451 452 /* This function is called once, at assembler startup time. This should 453 set up all the tables, etc that the MD part of the assembler needs. */ 454 455 void 456 md_begin (void) 457 { 458 const mcore_opcode_info * opcode; 459 char * prev_name = ""; 460 461 opcode_hash_control = hash_new (); 462 463 /* Insert unique names into hash table. */ 464 for (opcode = mcore_table; opcode->name; opcode ++) 465 { 466 if (! streq (prev_name, opcode->name)) 467 { 468 prev_name = opcode->name; 469 hash_insert (opcode_hash_control, opcode->name, (char *) opcode); 470 } 471 } 472 } 473 474 /* Get a log2(val). */ 475 476 static int 477 mylog2 (unsigned int val) 478 { 479 int log = -1; 480 481 while (val != 0) 482 { 483 log ++; 484 val >>= 1; 485 } 486 487 return log; 488 } 489 490 /* Try to parse a reg name. */ 491 492 static char * 493 parse_reg (char * s, unsigned * reg) 494 { 495 /* Strip leading whitespace. */ 496 while (ISSPACE (* s)) 497 ++ s; 498 499 if (TOLOWER (s[0]) == 'r') 500 { 501 if (s[1] == '1' && s[2] >= '0' && s[2] <= '5') 502 { 503 *reg = 10 + s[2] - '0'; 504 return s + 3; 505 } 506 507 if (s[1] >= '0' && s[1] <= '9') 508 { 509 *reg = s[1] - '0'; 510 return s + 2; 511 } 512 } 513 else if ( TOLOWER (s[0]) == 's' 514 && TOLOWER (s[1]) == 'p' 515 && ! ISALNUM (s[2])) 516 { 517 * reg = 0; 518 return s + 2; 519 } 520 521 as_bad (_("register expected, but saw '%.6s'"), s); 522 return s; 523 } 524 525 static struct Cregs 526 { 527 char * name; 528 unsigned int crnum; 529 } 530 cregs[] = 531 { 532 { "psr", 0}, 533 { "vbr", 1}, 534 { "epsr", 2}, 535 { "fpsr", 3}, 536 { "epc", 4}, 537 { "fpc", 5}, 538 { "ss0", 6}, 539 { "ss1", 7}, 540 { "ss2", 8}, 541 { "ss3", 9}, 542 { "ss4", 10}, 543 { "gcr", 11}, 544 { "gsr", 12}, 545 { "", 0} 546 }; 547 548 static char * 549 parse_creg (char * s, unsigned * reg) 550 { 551 int i; 552 553 /* Strip leading whitespace. */ 554 while (ISSPACE (* s)) 555 ++s; 556 557 if ((TOLOWER (s[0]) == 'c' && TOLOWER (s[1]) == 'r')) 558 { 559 if (s[2] == '3' && s[3] >= '0' && s[3] <= '1') 560 { 561 *reg = 30 + s[3] - '0'; 562 return s + 4; 563 } 564 565 if (s[2] == '2' && s[3] >= '0' && s[3] <= '9') 566 { 567 *reg = 20 + s[3] - '0'; 568 return s + 4; 569 } 570 571 if (s[2] == '1' && s[3] >= '0' && s[3] <= '9') 572 { 573 *reg = 10 + s[3] - '0'; 574 return s + 4; 575 } 576 577 if (s[2] >= '0' && s[2] <= '9') 578 { 579 *reg = s[2] - '0'; 580 return s + 3; 581 } 582 } 583 584 /* Look at alternate creg names before giving error. */ 585 for (i = 0; cregs[i].name[0] != '\0'; i++) 586 { 587 char buf [10]; 588 int length; 589 int j; 590 591 length = strlen (cregs[i].name); 592 593 for (j = 0; j < length; j++) 594 buf[j] = TOLOWER (s[j]); 595 596 if (strncmp (cregs[i].name, buf, length) == 0) 597 { 598 *reg = cregs[i].crnum; 599 return s + length; 600 } 601 } 602 603 as_bad (_("control register expected, but saw '%.6s'"), s); 604 605 return s; 606 } 607 608 static char * 609 parse_psrmod (char * s, unsigned * reg) 610 { 611 int i; 612 char buf[10]; 613 static struct psrmods 614 { 615 char * name; 616 unsigned int value; 617 } 618 psrmods[] = 619 { 620 { "ie", 1 }, 621 { "fe", 2 }, 622 { "ee", 4 }, 623 { "af", 8 } /* Really 0 and non-combinable. */ 624 }; 625 626 for (i = 0; i < 2; i++) 627 buf[i] = TOLOWER (s[i]); 628 629 for (i = sizeof (psrmods) / sizeof (psrmods[0]); i--;) 630 { 631 if (! strncmp (psrmods[i].name, buf, 2)) 632 { 633 * reg = psrmods[i].value; 634 635 return s + 2; 636 } 637 } 638 639 as_bad (_("bad/missing psr specifier")); 640 641 * reg = 0; 642 643 return s; 644 } 645 646 static char * 647 parse_exp (char * s, expressionS * e) 648 { 649 char * save; 650 char * new; 651 652 /* Skip whitespace. */ 653 while (ISSPACE (* s)) 654 ++ s; 655 656 save = input_line_pointer; 657 input_line_pointer = s; 658 659 expression (e); 660 661 if (e->X_op == O_absent) 662 as_bad (_("missing operand")); 663 664 new = input_line_pointer; 665 input_line_pointer = save; 666 667 return new; 668 } 669 670 static int 671 enter_literal (expressionS * e, int ispcrel) 672 { 673 unsigned int i; 674 struct literal * p; 675 676 if (poolsize >= MAX_POOL_SIZE - 2) 677 /* The literal pool is as full as we can handle. We have 678 to be 2 entries shy of the 1024/4=256 entries because we 679 have to allow for the branch (2 bytes) and the alignment 680 (2 bytes before the first insn referencing the pool and 681 2 bytes before the pool itself) == 6 bytes, rounds up 682 to 2 entries. */ 683 dump_literals (1); 684 685 if (poolsize == 0) 686 { 687 /* Create new literal pool. */ 688 if (++ poolnumber > 0xFFFF) 689 as_fatal (_("more than 65K literal pools")); 690 691 make_name (poolname, POOL_START_LABEL, poolnumber); 692 poolsym = symbol_make (poolname); 693 symbol_table_insert (poolsym); 694 poolspan = 0; 695 } 696 697 /* Search pool for value so we don't have duplicates. */ 698 for (p = litpool, i = 0; i < poolsize; i++, p++) 699 { 700 if (e->X_op == p->e.X_op 701 && e->X_add_symbol == p->e.X_add_symbol 702 && e->X_add_number == p->e.X_add_number 703 && ispcrel == p->ispcrel) 704 { 705 p->refcnt ++; 706 return i; 707 } 708 } 709 710 p->refcnt = 1; 711 p->ispcrel = ispcrel; 712 p->e = * e; 713 714 poolsize ++; 715 716 return i; 717 } 718 719 /* Parse a literal specification. -- either new or old syntax. 720 old syntax: the user supplies the label and places the literal. 721 new syntax: we put it into the literal pool. */ 722 723 static char * 724 parse_rt (char * s, 725 char ** outputp, 726 int ispcrel, 727 expressionS * ep) 728 { 729 expressionS e; 730 int n; 731 732 if (ep) 733 /* Indicate nothing there. */ 734 ep->X_op = O_absent; 735 736 if (*s == '[') 737 { 738 s = parse_exp (s + 1, & e); 739 740 if (*s == ']') 741 s++; 742 else 743 as_bad (_("missing ']'")); 744 } 745 else 746 { 747 s = parse_exp (s, & e); 748 749 n = enter_literal (& e, ispcrel); 750 751 if (ep) 752 *ep = e; 753 754 /* Create a reference to pool entry. */ 755 e.X_op = O_symbol; 756 e.X_add_symbol = poolsym; 757 e.X_add_number = n << 2; 758 } 759 760 * outputp = frag_more (2); 761 762 fix_new_exp (frag_now, (*outputp) - frag_now->fr_literal, 2, & e, 1, 763 BFD_RELOC_MCORE_PCREL_IMM8BY4); 764 765 return s; 766 } 767 768 static char * 769 parse_imm (char * s, 770 unsigned * val, 771 unsigned min, 772 unsigned max) 773 { 774 char * new; 775 expressionS e; 776 777 new = parse_exp (s, & e); 778 779 if (e.X_op == O_absent) 780 ; /* An error message has already been emitted. */ 781 else if (e.X_op != O_constant) 782 as_bad (_("operand must be a constant")); 783 else if ((addressT) e.X_add_number < min || (addressT) e.X_add_number > max) 784 as_bad (_("operand must be absolute in range %u..%u, not %ld"), 785 min, max, (long) e.X_add_number); 786 787 * val = e.X_add_number; 788 789 return new; 790 } 791 792 static char * 793 parse_mem (char * s, 794 unsigned * reg, 795 unsigned * off, 796 unsigned siz) 797 { 798 * off = 0; 799 800 while (ISSPACE (* s)) 801 ++ s; 802 803 if (* s == '(') 804 { 805 s = parse_reg (s + 1, reg); 806 807 while (ISSPACE (* s)) 808 ++ s; 809 810 if (* s == ',') 811 { 812 s = parse_imm (s + 1, off, 0, 63); 813 814 if (siz > 1) 815 { 816 if (siz > 2) 817 { 818 if (* off & 0x3) 819 as_bad (_("operand must be a multiple of 4")); 820 821 * off >>= 2; 822 } 823 else 824 { 825 if (* off & 0x1) 826 as_bad (_("operand must be a multiple of 2")); 827 828 * off >>= 1; 829 } 830 } 831 } 832 833 while (ISSPACE (* s)) 834 ++ s; 835 836 if (* s == ')') 837 s ++; 838 } 839 else 840 as_bad (_("base register expected")); 841 842 return s; 843 } 844 845 /* This is the guts of the machine-dependent assembler. STR points to a 846 machine dependent instruction. This function is supposed to emit 847 the frags/bytes it assembles to. */ 848 849 void 850 md_assemble (char * str) 851 { 852 char * op_start; 853 char * op_end; 854 mcore_opcode_info * opcode; 855 char * output; 856 int nlen = 0; 857 unsigned short inst; 858 unsigned reg; 859 unsigned off; 860 unsigned isize; 861 expressionS e; 862 char name[21]; 863 864 /* Drop leading whitespace. */ 865 while (ISSPACE (* str)) 866 str ++; 867 868 /* Find the op code end. */ 869 for (op_start = op_end = str; 870 nlen < 20 && !is_end_of_line [(unsigned char) *op_end] && *op_end != ' '; 871 op_end++) 872 { 873 name[nlen] = op_start[nlen]; 874 nlen++; 875 } 876 877 name [nlen] = 0; 878 879 if (nlen == 0) 880 { 881 as_bad (_("can't find opcode ")); 882 return; 883 } 884 885 opcode = (mcore_opcode_info *) hash_find (opcode_hash_control, name); 886 if (opcode == NULL) 887 { 888 as_bad (_("unknown opcode \"%s\""), name); 889 return; 890 } 891 892 inst = opcode->inst; 893 isize = 2; 894 895 switch (opcode->opclass) 896 { 897 case O0: 898 output = frag_more (2); 899 break; 900 901 case OT: 902 op_end = parse_imm (op_end + 1, & reg, 0, 3); 903 inst |= reg; 904 output = frag_more (2); 905 break; 906 907 case O1: 908 op_end = parse_reg (op_end + 1, & reg); 909 inst |= reg; 910 output = frag_more (2); 911 break; 912 913 case JMP: 914 op_end = parse_reg (op_end + 1, & reg); 915 inst |= reg; 916 output = frag_more (2); 917 /* In a sifilter mode, we emit this insn 2 times, 918 fixes problem of an interrupt during a jmp.. */ 919 if (sifilter_mode) 920 { 921 output[0] = INST_BYTE0 (inst); 922 output[1] = INST_BYTE1 (inst); 923 output = frag_more (2); 924 } 925 break; 926 927 case JSR: 928 op_end = parse_reg (op_end + 1, & reg); 929 930 if (reg == 15) 931 as_bad (_("invalid register: r15 illegal")); 932 933 inst |= reg; 934 output = frag_more (2); 935 936 if (sifilter_mode) 937 { 938 /* Replace with: bsr .+2 ; addi r15,6; jmp rx ; jmp rx. */ 939 inst = MCORE_INST_BSR; /* With 0 displacement. */ 940 output[0] = INST_BYTE0 (inst); 941 output[1] = INST_BYTE1 (inst); 942 943 output = frag_more (2); 944 inst = MCORE_INST_ADDI; 945 inst |= 15; /* addi r15,6 */ 946 inst |= (6 - 1) << 4; /* Over the jmp's. */ 947 output[0] = INST_BYTE0 (inst); 948 output[1] = INST_BYTE1 (inst); 949 950 output = frag_more (2); 951 inst = MCORE_INST_JMP | reg; 952 output[0] = INST_BYTE0 (inst); 953 output[1] = INST_BYTE1 (inst); 954 955 /* 2nd emitted in fallthrough. */ 956 output = frag_more (2); 957 } 958 break; 959 960 case OC: 961 op_end = parse_reg (op_end + 1, & reg); 962 inst |= reg; 963 964 /* Skip whitespace. */ 965 while (ISSPACE (* op_end)) 966 ++ op_end; 967 968 if (*op_end == ',') 969 { 970 op_end = parse_creg (op_end + 1, & reg); 971 inst |= reg << 4; 972 } 973 974 output = frag_more (2); 975 break; 976 977 case MULSH: 978 if (cpu == M210) 979 { 980 as_bad (_("M340 specific opcode used when assembling for M210")); 981 break; 982 } 983 /* drop through... */ 984 case O2: 985 op_end = parse_reg (op_end + 1, & reg); 986 inst |= reg; 987 988 /* Skip whitespace. */ 989 while (ISSPACE (* op_end)) 990 ++ op_end; 991 992 if (* op_end == ',') 993 { 994 op_end = parse_reg (op_end + 1, & reg); 995 inst |= reg << 4; 996 } 997 else 998 as_bad (_("second operand missing")); 999 1000 output = frag_more (2); 1001 break; 1002 1003 case X1: 1004 /* Handle both syntax-> xtrb- r1,rx OR xtrb- rx. */ 1005 op_end = parse_reg (op_end + 1, & reg); 1006 1007 /* Skip whitespace. */ 1008 while (ISSPACE (* op_end)) 1009 ++ op_end; 1010 1011 if (* op_end == ',') /* xtrb- r1,rx. */ 1012 { 1013 if (reg != 1) 1014 as_bad (_("destination register must be r1")); 1015 1016 op_end = parse_reg (op_end + 1, & reg); 1017 } 1018 1019 inst |= reg; 1020 output = frag_more (2); 1021 break; 1022 1023 case O1R1: /* div- rx,r1. */ 1024 op_end = parse_reg (op_end + 1, & reg); 1025 inst |= reg; 1026 1027 /* Skip whitespace. */ 1028 while (ISSPACE (* op_end)) 1029 ++ op_end; 1030 1031 if (* op_end == ',') 1032 { 1033 op_end = parse_reg (op_end + 1, & reg); 1034 if (reg != 1) 1035 as_bad (_("source register must be r1")); 1036 } 1037 else 1038 as_bad (_("second operand missing")); 1039 1040 output = frag_more (2); 1041 break; 1042 1043 case OI: 1044 op_end = parse_reg (op_end + 1, & reg); 1045 inst |= reg; 1046 1047 /* Skip whitespace. */ 1048 while (ISSPACE (* op_end)) 1049 ++ op_end; 1050 1051 if (* op_end == ',') 1052 { 1053 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1054 inst |= (reg - 1) << 4; 1055 } 1056 else 1057 as_bad (_("second operand missing")); 1058 1059 output = frag_more (2); 1060 break; 1061 1062 case OB: 1063 op_end = parse_reg (op_end + 1, & reg); 1064 inst |= reg; 1065 1066 /* Skip whitespace. */ 1067 while (ISSPACE (* op_end)) 1068 ++ op_end; 1069 1070 if (* op_end == ',') 1071 { 1072 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1073 inst |= reg << 4; 1074 } 1075 else 1076 as_bad (_("second operand missing")); 1077 1078 output = frag_more (2); 1079 break; 1080 1081 case OB2: 1082 /* Like OB, but arg is 2^n instead of n. */ 1083 op_end = parse_reg (op_end + 1, & reg); 1084 inst |= reg; 1085 1086 /* Skip whitespace. */ 1087 while (ISSPACE (* op_end)) 1088 ++ op_end; 1089 1090 if (* op_end == ',') 1091 { 1092 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1093 /* Further restrict the immediate to a power of two. */ 1094 if ((reg & (reg - 1)) == 0) 1095 reg = mylog2 (reg); 1096 else 1097 { 1098 reg = 0; 1099 as_bad (_("immediate is not a power of two")); 1100 } 1101 inst |= (reg) << 4; 1102 } 1103 else 1104 as_bad (_("second operand missing")); 1105 1106 output = frag_more (2); 1107 break; 1108 1109 case OBRa: /* Specific for bgeni: imm of 0->6 translate to movi. */ 1110 case OBRb: 1111 case OBRc: 1112 op_end = parse_reg (op_end + 1, & reg); 1113 inst |= reg; 1114 1115 /* Skip whitespace. */ 1116 while (ISSPACE (* op_end)) 1117 ++ op_end; 1118 1119 if (* op_end == ',') 1120 { 1121 op_end = parse_imm (op_end + 1, & reg, 0, 31); 1122 /* Immediate values of 0 -> 6 translate to movi. */ 1123 if (reg <= 6) 1124 { 1125 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1126 reg = 0x1 << reg; 1127 as_warn (_("translating bgeni to movi")); 1128 } 1129 inst &= ~ 0x01f0; 1130 inst |= reg << 4; 1131 } 1132 else 1133 as_bad (_("second operand missing")); 1134 1135 output = frag_more (2); 1136 break; 1137 1138 case OBR2: /* Like OBR, but arg is 2^n instead of n. */ 1139 op_end = parse_reg (op_end + 1, & reg); 1140 inst |= reg; 1141 1142 /* Skip whitespace. */ 1143 while (ISSPACE (* op_end)) 1144 ++ op_end; 1145 1146 if (* op_end == ',') 1147 { 1148 op_end = parse_imm (op_end + 1, & reg, 1, 1 << 31); 1149 1150 /* Further restrict the immediate to a power of two. */ 1151 if ((reg & (reg - 1)) == 0) 1152 reg = mylog2 (reg); 1153 else 1154 { 1155 reg = 0; 1156 as_bad (_("immediate is not a power of two")); 1157 } 1158 1159 /* Immediate values of 0 -> 6 translate to movi. */ 1160 if (reg <= 6) 1161 { 1162 inst = (inst & 0xF) | MCORE_INST_BGENI_ALT; 1163 reg = 0x1 << reg; 1164 as_warn (_("translating mgeni to movi")); 1165 } 1166 1167 inst |= reg << 4; 1168 } 1169 else 1170 as_bad (_("second operand missing")); 1171 1172 output = frag_more (2); 1173 break; 1174 1175 case OMa: /* Specific for bmaski: imm 1->7 translate to movi. */ 1176 case OMb: 1177 case OMc: 1178 op_end = parse_reg (op_end + 1, & reg); 1179 inst |= reg; 1180 1181 /* Skip whitespace. */ 1182 while (ISSPACE (* op_end)) 1183 ++ op_end; 1184 1185 if (* op_end == ',') 1186 { 1187 op_end = parse_imm (op_end + 1, & reg, 1, 32); 1188 1189 /* Immediate values of 1 -> 7 translate to movi. */ 1190 if (reg <= 7) 1191 { 1192 inst = (inst & 0xF) | MCORE_INST_BMASKI_ALT; 1193 reg = (0x1 << reg) - 1; 1194 inst |= reg << 4; 1195 1196 as_warn (_("translating bmaski to movi")); 1197 } 1198 else 1199 { 1200 inst &= ~ 0x01F0; 1201 inst |= (reg & 0x1F) << 4; 1202 } 1203 } 1204 else 1205 as_bad (_("second operand missing")); 1206 1207 output = frag_more (2); 1208 break; 1209 1210 case SI: 1211 op_end = parse_reg (op_end + 1, & reg); 1212 inst |= reg; 1213 1214 /* Skip whitespace. */ 1215 while (ISSPACE (* op_end)) 1216 ++ op_end; 1217 1218 if (* op_end == ',') 1219 { 1220 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1221 inst |= reg << 4; 1222 } 1223 else 1224 as_bad (_("second operand missing")); 1225 1226 output = frag_more (2); 1227 break; 1228 1229 case I7: 1230 op_end = parse_reg (op_end + 1, & reg); 1231 inst |= reg; 1232 1233 /* Skip whitespace. */ 1234 while (ISSPACE (* op_end)) 1235 ++ op_end; 1236 1237 if (* op_end == ',') 1238 { 1239 op_end = parse_imm (op_end + 1, & reg, 0, 0x7F); 1240 inst |= reg << 4; 1241 } 1242 else 1243 as_bad (_("second operand missing")); 1244 1245 output = frag_more (2); 1246 break; 1247 1248 case LS: 1249 op_end = parse_reg (op_end + 1, & reg); 1250 inst |= reg << 8; 1251 1252 /* Skip whitespace. */ 1253 while (ISSPACE (* op_end)) 1254 ++ op_end; 1255 1256 if (* op_end == ',') 1257 { 1258 int size; 1259 1260 if ((inst & 0x6000) == 0) 1261 size = 4; 1262 else if ((inst & 0x6000) == 0x4000) 1263 size = 2; 1264 else if ((inst & 0x6000) == 0x2000) 1265 size = 1; 1266 else 1267 abort (); 1268 1269 op_end = parse_mem (op_end + 1, & reg, & off, size); 1270 1271 if (off > 16) 1272 as_bad (_("displacement too large (%d)"), off); 1273 else 1274 inst |= (reg) | (off << 4); 1275 } 1276 else 1277 as_bad (_("second operand missing")); 1278 1279 output = frag_more (2); 1280 break; 1281 1282 case LR: 1283 op_end = parse_reg (op_end + 1, & reg); 1284 1285 if (reg == 0 || reg == 15) 1286 as_bad (_("Invalid register: r0 and r15 illegal")); 1287 1288 inst |= (reg << 8); 1289 1290 /* Skip whitespace. */ 1291 while (ISSPACE (* op_end)) 1292 ++ op_end; 1293 1294 if (* op_end == ',') 1295 { 1296 /* parse_rt calls frag_more() for us. */ 1297 input_line_pointer = parse_rt (op_end + 1, & output, 0, 0); 1298 op_end = input_line_pointer; 1299 } 1300 else 1301 { 1302 as_bad (_("second operand missing")); 1303 output = frag_more (2); /* save its space */ 1304 } 1305 break; 1306 1307 case LJ: 1308 input_line_pointer = parse_rt (op_end + 1, & output, 1, 0); 1309 /* parse_rt() calls frag_more() for us. */ 1310 op_end = input_line_pointer; 1311 break; 1312 1313 case RM: 1314 op_end = parse_reg (op_end + 1, & reg); 1315 1316 if (reg == 0 || reg == 15) 1317 as_bad (_("bad starting register: r0 and r15 invalid")); 1318 1319 inst |= reg; 1320 1321 /* Skip whitespace. */ 1322 while (ISSPACE (* op_end)) 1323 ++ op_end; 1324 1325 if (* op_end == '-') 1326 { 1327 op_end = parse_reg (op_end + 1, & reg); 1328 1329 if (reg != 15) 1330 as_bad (_("ending register must be r15")); 1331 1332 /* Skip whitespace. */ 1333 while (ISSPACE (* op_end)) 1334 ++ op_end; 1335 } 1336 1337 if (* op_end == ',') 1338 { 1339 op_end ++; 1340 1341 /* Skip whitespace. */ 1342 while (ISSPACE (* op_end)) 1343 ++ op_end; 1344 1345 if (* op_end == '(') 1346 { 1347 op_end = parse_reg (op_end + 1, & reg); 1348 1349 if (reg != 0) 1350 as_bad (_("bad base register: must be r0")); 1351 1352 if (* op_end == ')') 1353 op_end ++; 1354 } 1355 else 1356 as_bad (_("base register expected")); 1357 } 1358 else 1359 as_bad (_("second operand missing")); 1360 1361 output = frag_more (2); 1362 break; 1363 1364 case RQ: 1365 op_end = parse_reg (op_end + 1, & reg); 1366 1367 if (reg != 4) 1368 as_fatal (_("first register must be r4")); 1369 1370 /* Skip whitespace. */ 1371 while (ISSPACE (* op_end)) 1372 ++ op_end; 1373 1374 if (* op_end == '-') 1375 { 1376 op_end = parse_reg (op_end + 1, & reg); 1377 1378 if (reg != 7) 1379 as_fatal (_("last register must be r7")); 1380 1381 /* Skip whitespace. */ 1382 while (ISSPACE (* op_end)) 1383 ++ op_end; 1384 1385 if (* op_end == ',') 1386 { 1387 op_end ++; 1388 1389 /* Skip whitespace. */ 1390 while (ISSPACE (* op_end)) 1391 ++ op_end; 1392 1393 if (* op_end == '(') 1394 { 1395 op_end = parse_reg (op_end + 1, & reg); 1396 1397 if (reg >= 4 && reg <= 7) 1398 as_fatal ("base register cannot be r4, r5, r6, or r7"); 1399 1400 inst |= reg; 1401 1402 /* Skip whitespace. */ 1403 while (ISSPACE (* op_end)) 1404 ++ op_end; 1405 1406 if (* op_end == ')') 1407 op_end ++; 1408 } 1409 else 1410 as_bad (_("base register expected")); 1411 } 1412 else 1413 as_bad (_("second operand missing")); 1414 } 1415 else 1416 as_bad (_("reg-reg expected")); 1417 1418 output = frag_more (2); 1419 break; 1420 1421 case BR: 1422 input_line_pointer = parse_exp (op_end + 1, & e); 1423 op_end = input_line_pointer; 1424 1425 output = frag_more (2); 1426 1427 fix_new_exp (frag_now, output-frag_now->fr_literal, 1428 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM11BY2); 1429 break; 1430 1431 case BL: 1432 op_end = parse_reg (op_end + 1, & reg); 1433 inst |= reg << 4; 1434 1435 /* Skip whitespace. */ 1436 while (ISSPACE (* op_end)) 1437 ++ op_end; 1438 1439 if (* op_end == ',') 1440 { 1441 op_end = parse_exp (op_end + 1, & e); 1442 output = frag_more (2); 1443 1444 fix_new_exp (frag_now, output-frag_now->fr_literal, 1445 2, & e, 1, BFD_RELOC_MCORE_PCREL_IMM4BY2); 1446 } 1447 else 1448 { 1449 as_bad (_("second operand missing")); 1450 output = frag_more (2); 1451 } 1452 break; 1453 1454 case JC: 1455 input_line_pointer = parse_exp (op_end + 1, & e); 1456 op_end = input_line_pointer; 1457 1458 output = frag_var (rs_machine_dependent, 1459 md_relax_table[C (COND_JUMP, DISP32)].rlx_length, 1460 md_relax_table[C (COND_JUMP, DISP12)].rlx_length, 1461 C (COND_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1462 isize = C32_LEN; 1463 break; 1464 1465 case JU: 1466 input_line_pointer = parse_exp (op_end + 1, & e); 1467 op_end = input_line_pointer; 1468 1469 output = frag_var (rs_machine_dependent, 1470 md_relax_table[C (UNCD_JUMP, DISP32)].rlx_length, 1471 md_relax_table[C (UNCD_JUMP, DISP12)].rlx_length, 1472 C (UNCD_JUMP, 0), e.X_add_symbol, e.X_add_number, 0); 1473 isize = U32_LEN; 1474 break; 1475 1476 case JL: 1477 inst = MCORE_INST_JSRI; /* jsri */ 1478 input_line_pointer = parse_rt (op_end + 1, & output, 1, & e); 1479 /* parse_rt() calls frag_more for us. */ 1480 op_end = input_line_pointer; 1481 1482 /* Only do this if we know how to do it ... */ 1483 if (e.X_op != O_absent && do_jsri2bsr) 1484 { 1485 /* Look at adding the R_PCREL_JSRIMM11BY2. */ 1486 fix_new_exp (frag_now, output-frag_now->fr_literal, 1487 2, & e, 1, BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2); 1488 } 1489 break; 1490 1491 case RSI: 1492 /* SI, but imm becomes 32-imm. */ 1493 op_end = parse_reg (op_end + 1, & reg); 1494 inst |= reg; 1495 1496 /* Skip whitespace. */ 1497 while (ISSPACE (* op_end)) 1498 ++ op_end; 1499 1500 if (* op_end == ',') 1501 { 1502 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1503 1504 reg = 32 - reg; 1505 inst |= reg << 4; 1506 } 1507 else 1508 as_bad (_("second operand missing")); 1509 1510 output = frag_more (2); 1511 break; 1512 1513 case DO21: /* O2, dup rd, lit must be 1 */ 1514 op_end = parse_reg (op_end + 1, & reg); 1515 inst |= reg; 1516 inst |= reg << 4; 1517 1518 /* Skip whitespace. */ 1519 while (ISSPACE (* op_end)) 1520 ++ op_end; 1521 1522 if (* op_end == ',') 1523 { 1524 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1525 1526 if (reg != 1) 1527 as_bad (_("second operand must be 1")); 1528 } 1529 else 1530 as_bad (_("second operand missing")); 1531 1532 output = frag_more (2); 1533 break; 1534 1535 case SIa: 1536 op_end = parse_reg (op_end + 1, & reg); 1537 inst |= reg; 1538 1539 /* Skip whitespace. */ 1540 while (ISSPACE (* op_end)) 1541 ++ op_end; 1542 1543 if (* op_end == ',') 1544 { 1545 op_end = parse_imm (op_end + 1, & reg, 1, 31); 1546 1547 if (reg == 0) 1548 as_bad (_("zero used as immediate value")); 1549 1550 inst |= reg << 4; 1551 } 1552 else 1553 as_bad (_("second operand missing")); 1554 1555 output = frag_more (2); 1556 break; 1557 1558 case OPSR: 1559 if (cpu == M210) 1560 { 1561 as_bad (_("M340 specific opcode used when assembling for M210")); 1562 break; 1563 } 1564 1565 op_end = parse_psrmod (op_end + 1, & reg); 1566 1567 /* Look for further selectors. */ 1568 while (* op_end == ',') 1569 { 1570 unsigned value; 1571 1572 op_end = parse_psrmod (op_end + 1, & value); 1573 1574 if (value & reg) 1575 as_bad (_("duplicated psr bit specifier")); 1576 1577 reg |= value; 1578 } 1579 1580 if (reg > 8) 1581 as_bad (_("`af' must appear alone")); 1582 1583 inst |= (reg & 0x7); 1584 output = frag_more (2); 1585 break; 1586 1587 default: 1588 as_bad (_("unimplemented opcode \"%s\""), name); 1589 } 1590 1591 /* Drop whitespace after all the operands have been parsed. */ 1592 while (ISSPACE (* op_end)) 1593 op_end ++; 1594 1595 /* Give warning message if the insn has more operands than required. */ 1596 if (strcmp (op_end, opcode->name) && strcmp (op_end, "")) 1597 as_warn (_("ignoring operands: %s "), op_end); 1598 1599 output[0] = INST_BYTE0 (inst); 1600 output[1] = INST_BYTE1 (inst); 1601 1602 check_literals (opcode->transfer, isize); 1603 } 1604 1605 symbolS * 1606 md_undefined_symbol (char *name ATTRIBUTE_UNUSED) 1607 { 1608 return 0; 1609 } 1610 1611 void 1612 md_mcore_end (void) 1613 { 1614 dump_literals (0); 1615 subseg_set (text_section, 0); 1616 } 1617 1618 /* Various routines to kill one day. */ 1619 1620 char * 1621 md_atof (int type, char * litP, int * sizeP) 1622 { 1623 return ieee_md_atof (type, litP, sizeP, target_big_endian); 1624 } 1625 1626 const char * md_shortopts = ""; 1627 1628 enum options 1629 { 1630 OPTION_JSRI2BSR_ON = OPTION_MD_BASE, 1631 OPTION_JSRI2BSR_OFF, 1632 OPTION_SIFILTER_ON, 1633 OPTION_SIFILTER_OFF, 1634 OPTION_CPU, 1635 OPTION_EB, 1636 OPTION_EL, 1637 }; 1638 1639 struct option md_longopts[] = 1640 { 1641 { "no-jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_OFF}, 1642 { "jsri2bsr", no_argument, NULL, OPTION_JSRI2BSR_ON}, 1643 { "sifilter", no_argument, NULL, OPTION_SIFILTER_ON}, 1644 { "no-sifilter", no_argument, NULL, OPTION_SIFILTER_OFF}, 1645 { "cpu", required_argument, NULL, OPTION_CPU}, 1646 { "EB", no_argument, NULL, OPTION_EB}, 1647 { "EL", no_argument, NULL, OPTION_EL}, 1648 { NULL, no_argument, NULL, 0} 1649 }; 1650 1651 size_t md_longopts_size = sizeof (md_longopts); 1652 1653 int 1654 md_parse_option (int c, char * arg) 1655 { 1656 switch (c) 1657 { 1658 case OPTION_CPU: 1659 if (streq (arg, "210")) 1660 { 1661 cpu = M210; 1662 target_big_endian = 1; 1663 } 1664 else if (streq (arg, "340")) 1665 cpu = M340; 1666 else 1667 as_warn (_("unrecognised cpu type '%s'"), arg); 1668 break; 1669 1670 case OPTION_EB: target_big_endian = 1; break; 1671 case OPTION_EL: target_big_endian = 0; cpu = M340; break; 1672 case OPTION_JSRI2BSR_ON: do_jsri2bsr = 1; break; 1673 case OPTION_JSRI2BSR_OFF: do_jsri2bsr = 0; break; 1674 case OPTION_SIFILTER_ON: sifilter_mode = 1; break; 1675 case OPTION_SIFILTER_OFF: sifilter_mode = 0; break; 1676 default: return 0; 1677 } 1678 1679 return 1; 1680 } 1681 1682 void 1683 md_show_usage (FILE * stream) 1684 { 1685 fprintf (stream, _("\ 1686 MCORE specific options:\n\ 1687 -{no-}jsri2bsr {dis}able jsri to bsr transformation (def: dis)\n\ 1688 -{no-}sifilter {dis}able silicon filter behavior (def: dis)\n\ 1689 -cpu=[210|340] select CPU type\n\ 1690 -EB assemble for a big endian system (default)\n\ 1691 -EL assemble for a little endian system\n")); 1692 } 1693 1694 int md_short_jump_size; 1695 1696 void 1697 md_create_short_jump (char * ptr ATTRIBUTE_UNUSED, 1698 addressT from_Nddr ATTRIBUTE_UNUSED, 1699 addressT to_Nddr ATTRIBUTE_UNUSED, 1700 fragS * frag ATTRIBUTE_UNUSED, 1701 symbolS * to_symbol ATTRIBUTE_UNUSED) 1702 { 1703 as_fatal (_("failed sanity check: short_jump")); 1704 } 1705 1706 void 1707 md_create_long_jump (char * ptr ATTRIBUTE_UNUSED, 1708 addressT from_Nddr ATTRIBUTE_UNUSED, 1709 addressT to_Nddr ATTRIBUTE_UNUSED, 1710 fragS * frag ATTRIBUTE_UNUSED, 1711 symbolS * to_symbol ATTRIBUTE_UNUSED) 1712 { 1713 as_fatal (_("failed sanity check: long_jump")); 1714 } 1715 1716 /* Called after relaxing, change the frags so they know how big they are. */ 1717 1718 void 1719 md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED, 1720 segT sec ATTRIBUTE_UNUSED, 1721 fragS * fragP) 1722 { 1723 char *buffer; 1724 int targ_addr = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset; 1725 1726 buffer = fragP->fr_fix + fragP->fr_literal; 1727 1728 switch (fragP->fr_subtype) 1729 { 1730 case C (COND_JUMP, DISP12): 1731 case C (UNCD_JUMP, DISP12): 1732 { 1733 /* Get the address of the end of the instruction. */ 1734 int next_inst = fragP->fr_fix + fragP->fr_address + 2; 1735 unsigned char t0; 1736 int disp = targ_addr - next_inst; 1737 1738 if (disp & 1) 1739 as_bad (_("odd displacement at %x"), next_inst - 2); 1740 1741 disp >>= 1; 1742 1743 if (! target_big_endian) 1744 { 1745 t0 = buffer[1] & 0xF8; 1746 1747 md_number_to_chars (buffer, disp, 2); 1748 1749 buffer[1] = (buffer[1] & 0x07) | t0; 1750 } 1751 else 1752 { 1753 t0 = buffer[0] & 0xF8; 1754 1755 md_number_to_chars (buffer, disp, 2); 1756 1757 buffer[0] = (buffer[0] & 0x07) | t0; 1758 } 1759 1760 fragP->fr_fix += 2; 1761 } 1762 break; 1763 1764 case C (COND_JUMP, DISP32): 1765 case C (COND_JUMP, UNDEF_WORD_DISP): 1766 { 1767 /* A conditional branch wont fit into 12 bits so: 1768 b!cond 1f 1769 jmpi 0f 1770 .align 2 1771 0: .long disp 1772 1: 1773 1774 If the b!cond is 4 byte aligned, the literal which would 1775 go at x+4 will also be aligned. */ 1776 int first_inst = fragP->fr_fix + fragP->fr_address; 1777 int needpad = (first_inst & 3); 1778 1779 if (! target_big_endian) 1780 buffer[1] ^= 0x08; 1781 else 1782 buffer[0] ^= 0x08; /* Toggle T/F bit. */ 1783 1784 buffer[2] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1785 buffer[3] = INST_BYTE1 (MCORE_INST_JMPI); 1786 1787 if (needpad) 1788 { 1789 if (! target_big_endian) 1790 { 1791 buffer[0] = 4; /* Branch over jmpi, pad, and ptr. */ 1792 buffer[2] = 1; /* Jmpi offset of 1 gets the pointer. */ 1793 } 1794 else 1795 { 1796 buffer[1] = 4; /* Branch over jmpi, pad, and ptr. */ 1797 buffer[3] = 1; /* Jmpi offset of 1 gets the pointer. */ 1798 } 1799 1800 buffer[4] = 0; /* Alignment/pad. */ 1801 buffer[5] = 0; 1802 buffer[6] = 0; /* Space for 32 bit address. */ 1803 buffer[7] = 0; 1804 buffer[8] = 0; 1805 buffer[9] = 0; 1806 1807 /* Make reloc for the long disp. */ 1808 fix_new (fragP, fragP->fr_fix + 6, 4, 1809 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1810 1811 fragP->fr_fix += C32_LEN; 1812 } 1813 else 1814 { 1815 /* See comment below about this given gas' limitations for 1816 shrinking the fragment. '3' is the amount of code that 1817 we inserted here, but '4' is right for the space we reserved 1818 for this fragment. */ 1819 if (! target_big_endian) 1820 { 1821 buffer[0] = 3; /* Branch over jmpi, and ptr. */ 1822 buffer[2] = 0; /* Jmpi offset of 0 gets the pointer. */ 1823 } 1824 else 1825 { 1826 buffer[1] = 3; /* Branch over jmpi, and ptr. */ 1827 buffer[3] = 0; /* Jmpi offset of 0 gets the pointer. */ 1828 } 1829 1830 buffer[4] = 0; /* Space for 32 bit address. */ 1831 buffer[5] = 0; 1832 buffer[6] = 0; 1833 buffer[7] = 0; 1834 1835 /* Make reloc for the long disp. */ 1836 fix_new (fragP, fragP->fr_fix + 4, 4, 1837 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1838 fragP->fr_fix += C32_LEN; 1839 1840 /* Frag is actually shorter (see the other side of this ifdef) 1841 but gas isn't prepared for that. We have to re-adjust 1842 the branch displacement so that it goes beyond the 1843 full length of the fragment, not just what we actually 1844 filled in. */ 1845 if (! target_big_endian) 1846 buffer[0] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1847 else 1848 buffer[1] = 4; /* Jmpi, ptr, and the 'tail pad'. */ 1849 } 1850 } 1851 break; 1852 1853 case C (UNCD_JUMP, DISP32): 1854 case C (UNCD_JUMP, UNDEF_WORD_DISP): 1855 { 1856 /* An unconditional branch will not fit in 12 bits, make code which 1857 looks like: 1858 jmpi 0f 1859 .align 2 1860 0: .long disp 1861 we need a pad if "first_inst" is 4 byte aligned. 1862 [because the natural literal place is x + 2]. */ 1863 int first_inst = fragP->fr_fix + fragP->fr_address; 1864 int needpad = !(first_inst & 3); 1865 1866 buffer[0] = INST_BYTE0 (MCORE_INST_JMPI); /* Build jmpi. */ 1867 buffer[1] = INST_BYTE1 (MCORE_INST_JMPI); 1868 1869 if (needpad) 1870 { 1871 if (! target_big_endian) 1872 buffer[0] = 1; /* Jmpi offset of 1 since padded. */ 1873 else 1874 buffer[1] = 1; /* Jmpi offset of 1 since padded. */ 1875 buffer[2] = 0; /* Alignment. */ 1876 buffer[3] = 0; 1877 buffer[4] = 0; /* Space for 32 bit address. */ 1878 buffer[5] = 0; 1879 buffer[6] = 0; 1880 buffer[7] = 0; 1881 1882 /* Make reloc for the long disp. */ 1883 fix_new (fragP, fragP->fr_fix + 4, 4, 1884 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1885 1886 fragP->fr_fix += U32_LEN; 1887 } 1888 else 1889 { 1890 if (! target_big_endian) 1891 buffer[0] = 0; /* Jmpi offset of 0 if no pad. */ 1892 else 1893 buffer[1] = 0; /* Jmpi offset of 0 if no pad. */ 1894 buffer[2] = 0; /* Space for 32 bit address. */ 1895 buffer[3] = 0; 1896 buffer[4] = 0; 1897 buffer[5] = 0; 1898 1899 /* Make reloc for the long disp. */ 1900 fix_new (fragP, fragP->fr_fix + 2, 4, 1901 fragP->fr_symbol, fragP->fr_offset, 0, BFD_RELOC_32); 1902 fragP->fr_fix += U32_LEN; 1903 } 1904 } 1905 break; 1906 1907 default: 1908 abort (); 1909 } 1910 } 1911 1912 /* Applies the desired value to the specified location. 1913 Also sets up addends for 'rela' type relocations. */ 1914 1915 void 1916 md_apply_fix (fixS * fixP, 1917 valueT * valP, 1918 segT segment ATTRIBUTE_UNUSED) 1919 { 1920 char * buf = fixP->fx_where + fixP->fx_frag->fr_literal; 1921 char * file = fixP->fx_file ? fixP->fx_file : _("unknown"); 1922 const char * symname; 1923 /* Note: use offsetT because it is signed, valueT is unsigned. */ 1924 offsetT val = *valP; 1925 1926 symname = fixP->fx_addsy ? S_GET_NAME (fixP->fx_addsy) : _("<unknown>"); 1927 /* Save this for the addend in the relocation record. */ 1928 fixP->fx_addnumber = val; 1929 1930 if (fixP->fx_addsy != NULL) 1931 { 1932 #ifdef OBJ_ELF 1933 /* For ELF we can just return and let the reloc that will be generated 1934 take care of everything. For COFF we still have to insert 'val' 1935 into the insn since the addend field will be ignored. */ 1936 return; 1937 #endif 1938 } 1939 else 1940 fixP->fx_done = 1; 1941 1942 switch (fixP->fx_r_type) 1943 { 1944 /* Second byte of 2 byte opcode. */ 1945 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 1946 if ((val & 1) != 0) 1947 as_bad_where (file, fixP->fx_line, 1948 _("odd distance branch (0x%lx bytes)"), (long) val); 1949 val /= 2; 1950 if (((val & ~0x3ff) != 0) && ((val | 0x3ff) != -1)) 1951 as_bad_where (file, fixP->fx_line, 1952 _("pcrel for branch to %s too far (0x%lx)"), 1953 symname, (long) val); 1954 if (target_big_endian) 1955 { 1956 buf[0] |= ((val >> 8) & 0x7); 1957 buf[1] |= (val & 0xff); 1958 } 1959 else 1960 { 1961 buf[1] |= ((val >> 8) & 0x7); 1962 buf[0] |= (val & 0xff); 1963 } 1964 break; 1965 1966 /* Lower 8 bits of 2 byte opcode. */ 1967 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 1968 val += 3; 1969 val /= 4; 1970 if (val & ~0xff) 1971 as_bad_where (file, fixP->fx_line, 1972 _("pcrel for lrw/jmpi/jsri to %s too far (0x%lx)"), 1973 symname, (long) val); 1974 else if (! target_big_endian) 1975 buf[0] |= (val & 0xff); 1976 else 1977 buf[1] |= (val & 0xff); 1978 break; 1979 1980 /* Loopt instruction. */ 1981 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 1982 if ((val < -32) || (val > -2)) 1983 as_bad_where (file, fixP->fx_line, 1984 _("pcrel for loopt too far (0x%lx)"), (long) val); 1985 val /= 2; 1986 if (! target_big_endian) 1987 buf[0] |= (val & 0xf); 1988 else 1989 buf[1] |= (val & 0xf); 1990 break; 1991 1992 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 1993 /* Conditional linker map jsri to bsr. */ 1994 /* If its a local target and close enough, fix it. 1995 NB: >= -2k for backwards bsr; < 2k for forwards... */ 1996 if (fixP->fx_addsy == 0 && val >= -2048 && val < 2048) 1997 { 1998 long nval = (val / 2) & 0x7ff; 1999 nval |= MCORE_INST_BSR; 2000 2001 /* REPLACE the instruction, don't just modify it. */ 2002 buf[0] = INST_BYTE0 (nval); 2003 buf[1] = INST_BYTE1 (nval); 2004 } 2005 else 2006 fixP->fx_done = 0; 2007 break; 2008 2009 case BFD_RELOC_MCORE_PCREL_32: 2010 case BFD_RELOC_VTABLE_INHERIT: 2011 case BFD_RELOC_VTABLE_ENTRY: 2012 fixP->fx_done = 0; 2013 break; 2014 2015 default: 2016 if (fixP->fx_addsy != NULL) 2017 { 2018 /* If the fix is an absolute reloc based on a symbol's 2019 address, then it cannot be resolved until the final link. */ 2020 fixP->fx_done = 0; 2021 } 2022 #ifdef OBJ_ELF 2023 else 2024 #endif 2025 { 2026 if (fixP->fx_size == 4) 2027 ; 2028 else if (fixP->fx_size == 2 && val >= -32768 && val <= 32767) 2029 ; 2030 else if (fixP->fx_size == 1 && val >= -256 && val <= 255) 2031 ; 2032 else 2033 abort (); 2034 md_number_to_chars (buf, val, fixP->fx_size); 2035 } 2036 break; 2037 } 2038 } 2039 2040 void 2041 md_operand (expressionS * expressionP) 2042 { 2043 /* Ignore leading hash symbol, if poresent. */ 2044 if (* input_line_pointer == '#') 2045 { 2046 input_line_pointer ++; 2047 expression (expressionP); 2048 } 2049 } 2050 2051 int md_long_jump_size; 2052 2053 /* Called just before address relaxation, return the length 2054 by which a fragment must grow to reach it's destination. */ 2055 int 2056 md_estimate_size_before_relax (fragS * fragP, segT segment_type) 2057 { 2058 switch (fragP->fr_subtype) 2059 { 2060 default: 2061 abort (); 2062 2063 case C (UNCD_JUMP, UNDEF_DISP): 2064 /* Used to be a branch to somewhere which was unknown. */ 2065 if (!fragP->fr_symbol) 2066 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2067 else if (S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2068 fragP->fr_subtype = C (UNCD_JUMP, DISP12); 2069 else 2070 fragP->fr_subtype = C (UNCD_JUMP, UNDEF_WORD_DISP); 2071 break; 2072 2073 case C (COND_JUMP, UNDEF_DISP): 2074 /* Used to be a branch to somewhere which was unknown. */ 2075 if (fragP->fr_symbol 2076 && S_GET_SEGMENT (fragP->fr_symbol) == segment_type) 2077 /* Got a symbol and it's defined in this segment, become byte 2078 sized - maybe it will fix up */ 2079 fragP->fr_subtype = C (COND_JUMP, DISP12); 2080 else if (fragP->fr_symbol) 2081 /* Its got a segment, but its not ours, so it will always be long. */ 2082 fragP->fr_subtype = C (COND_JUMP, UNDEF_WORD_DISP); 2083 else 2084 /* We know the abs value. */ 2085 fragP->fr_subtype = C (COND_JUMP, DISP12); 2086 break; 2087 2088 case C (UNCD_JUMP, DISP12): 2089 case C (UNCD_JUMP, DISP32): 2090 case C (UNCD_JUMP, UNDEF_WORD_DISP): 2091 case C (COND_JUMP, DISP12): 2092 case C (COND_JUMP, DISP32): 2093 case C (COND_JUMP, UNDEF_WORD_DISP): 2094 /* When relaxing a section for the second time, we don't need to 2095 do anything besides return the current size. */ 2096 break; 2097 } 2098 2099 return md_relax_table[fragP->fr_subtype].rlx_length; 2100 } 2101 2102 /* Put number into target byte order. */ 2103 2104 void 2105 md_number_to_chars (char * ptr, valueT use, int nbytes) 2106 { 2107 if (target_big_endian) 2108 number_to_chars_bigendian (ptr, use, nbytes); 2109 else 2110 number_to_chars_littleendian (ptr, use, nbytes); 2111 } 2112 2113 /* Round up a section size to the appropriate boundary. */ 2114 2115 valueT 2116 md_section_align (segT segment ATTRIBUTE_UNUSED, 2117 valueT size) 2118 { 2119 /* Byte alignment is fine. */ 2120 return size; 2121 } 2122 2123 /* The location from which a PC relative jump should be calculated, 2124 given a PC relative reloc. */ 2125 2126 long 2127 md_pcrel_from_section (fixS * fixp, segT sec ATTRIBUTE_UNUSED) 2128 { 2129 #ifdef OBJ_ELF 2130 /* If the symbol is undefined or defined in another section 2131 we leave the add number alone for the linker to fix it later. 2132 Only account for the PC pre-bump (which is 2 bytes on the MCore). */ 2133 if (fixp->fx_addsy != (symbolS *) NULL 2134 && (! S_IS_DEFINED (fixp->fx_addsy) 2135 || (S_GET_SEGMENT (fixp->fx_addsy) != sec))) 2136 2137 { 2138 assert (fixp->fx_size == 2); /* must be an insn */ 2139 return fixp->fx_size; 2140 } 2141 #endif 2142 2143 /* The case where we are going to resolve things... */ 2144 return fixp->fx_size + fixp->fx_where + fixp->fx_frag->fr_address; 2145 } 2146 2147 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL)) 2148 #define MAP(SZ,PCREL,TYPE) case F (SZ, PCREL): code = (TYPE); break 2149 2150 arelent * 2151 tc_gen_reloc (asection * section ATTRIBUTE_UNUSED, fixS * fixp) 2152 { 2153 arelent * rel; 2154 bfd_reloc_code_real_type code; 2155 2156 switch (fixp->fx_r_type) 2157 { 2158 /* These confuse the size/pcrel macro approach. */ 2159 case BFD_RELOC_VTABLE_INHERIT: 2160 case BFD_RELOC_VTABLE_ENTRY: 2161 case BFD_RELOC_MCORE_PCREL_IMM4BY2: 2162 case BFD_RELOC_MCORE_PCREL_IMM8BY4: 2163 case BFD_RELOC_MCORE_PCREL_IMM11BY2: 2164 case BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2: 2165 case BFD_RELOC_RVA: 2166 code = fixp->fx_r_type; 2167 break; 2168 2169 default: 2170 switch (F (fixp->fx_size, fixp->fx_pcrel)) 2171 { 2172 MAP (1, 0, BFD_RELOC_8); 2173 MAP (2, 0, BFD_RELOC_16); 2174 MAP (4, 0, BFD_RELOC_32); 2175 MAP (1, 1, BFD_RELOC_8_PCREL); 2176 MAP (2, 1, BFD_RELOC_16_PCREL); 2177 MAP (4, 1, BFD_RELOC_32_PCREL); 2178 default: 2179 code = fixp->fx_r_type; 2180 as_bad (_("Can not do %d byte %srelocation"), 2181 fixp->fx_size, 2182 fixp->fx_pcrel ? _("pc-relative") : ""); 2183 } 2184 break; 2185 } 2186 2187 rel = xmalloc (sizeof (arelent)); 2188 rel->sym_ptr_ptr = xmalloc (sizeof (asymbol *)); 2189 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 2190 rel->address = fixp->fx_frag->fr_address + fixp->fx_where; 2191 /* Always pass the addend along! */ 2192 rel->addend = fixp->fx_addnumber; 2193 2194 rel->howto = bfd_reloc_type_lookup (stdoutput, code); 2195 2196 if (rel->howto == NULL) 2197 { 2198 as_bad_where (fixp->fx_file, fixp->fx_line, 2199 _("Cannot represent relocation type %s"), 2200 bfd_get_reloc_code_name (code)); 2201 2202 /* Set howto to a garbage value so that we can keep going. */ 2203 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32); 2204 assert (rel->howto != NULL); 2205 } 2206 2207 return rel; 2208 } 2209 2210 #ifdef OBJ_ELF 2211 /* See whether we need to force a relocation into the output file. 2212 This is used to force out switch and PC relative relocations when 2213 relaxing. */ 2214 int 2215 mcore_force_relocation (fixS * fix) 2216 { 2217 if (fix->fx_r_type == BFD_RELOC_RVA) 2218 return 1; 2219 2220 return generic_force_reloc (fix); 2221 } 2222 2223 /* Return true if the fix can be handled by GAS, false if it must 2224 be passed through to the linker. */ 2225 2226 bfd_boolean 2227 mcore_fix_adjustable (fixS * fixP) 2228 { 2229 /* We need the symbol name for the VTABLE entries. */ 2230 if ( fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT 2231 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY) 2232 return 0; 2233 2234 return 1; 2235 } 2236 #endif /* OBJ_ELF */ 2237