1 /* tc-i386.c -- Assemble Intel syntax code for ix86/x86-64 2 Copyright (C) 2009-2024 Free Software Foundation, Inc. 3 4 This file is part of GAS, the GNU Assembler. 5 6 GAS is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3, or (at your option) 9 any later version. 10 11 GAS is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with GAS; see the file COPYING. If not, write to the Free 18 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 19 02110-1301, USA. */ 20 21 static struct 22 { 23 operatorT op_modifier; /* Operand modifier. */ 24 int is_mem; /* 1 if operand is memory reference. */ 25 int is_indirect; /* 1 if operand is indirect reference. */ 26 int has_offset; /* 1 if operand has offset. */ 27 unsigned int in_offset; /* >=1 if processing operand of offset. */ 28 unsigned int in_bracket; /* >=1 if processing operand in brackets. */ 29 unsigned int in_scale; /* >=1 if processing multiplication operand 30 * in brackets. */ 31 i386_operand_type reloc_types; /* Value obtained from lex_got(). */ 32 const reg_entry *base; /* Base register (if any). */ 33 const reg_entry *index; /* Index register (if any). */ 34 offsetT scale_factor; /* Accumulated scale factor. */ 35 symbolS *seg; 36 } 37 intel_state; 38 39 /* offset X_add_symbol */ 40 #define O_offset O_md32 41 /* offset X_add_symbol */ 42 #define O_short O_md31 43 /* near ptr X_add_symbol */ 44 #define O_near_ptr O_md30 45 /* far ptr X_add_symbol */ 46 #define O_far_ptr O_md29 47 /* byte ptr X_add_symbol */ 48 #define O_byte_ptr O_md28 49 /* word ptr X_add_symbol */ 50 #define O_word_ptr O_md27 51 /* dword ptr X_add_symbol */ 52 #define O_dword_ptr O_md26 53 /* qword ptr X_add_symbol */ 54 #define O_qword_ptr O_md25 55 /* mmword ptr X_add_symbol */ 56 #define O_mmword_ptr O_qword_ptr 57 /* fword ptr X_add_symbol */ 58 #define O_fword_ptr O_md24 59 /* tbyte ptr X_add_symbol */ 60 #define O_tbyte_ptr O_md23 61 /* oword ptr X_add_symbol */ 62 #define O_oword_ptr O_md22 63 /* xmmword ptr X_add_symbol */ 64 #define O_xmmword_ptr O_oword_ptr 65 /* ymmword ptr X_add_symbol */ 66 #define O_ymmword_ptr O_md21 67 /* zmmword ptr X_add_symbol */ 68 #define O_zmmword_ptr O_md20 69 70 static struct 71 { 72 const char *name; 73 operatorT op; 74 unsigned int operands; 75 } 76 const i386_operators[] = 77 { 78 { "and", O_bit_and, 2 }, 79 { "eq", O_eq, 2 }, 80 { "ge", O_ge, 2 }, 81 { "gt", O_gt, 2 }, 82 { "le", O_le, 2 }, 83 { "lt", O_lt, 2 }, 84 { "mod", O_modulus, 2 }, 85 { "ne", O_ne, 2 }, 86 { "not", O_bit_not, 1 }, 87 { "offset", O_offset, 1 }, 88 { "or", O_bit_inclusive_or, 2 }, 89 { "shl", O_left_shift, 2 }, 90 { "short", O_short, 1 }, 91 { "shr", O_right_shift, 2 }, 92 { "xor", O_bit_exclusive_or, 2 }, 93 { NULL, O_illegal, 0 } 94 }; 95 96 static struct 97 { 98 const char *name; 99 operatorT op; 100 unsigned short sz[3]; 101 } 102 const i386_types[] = 103 { 104 #define I386_TYPE(t, n) { #t, O_##t##_ptr, { n, n, n } } 105 I386_TYPE(byte, 1), 106 I386_TYPE(word, 2), 107 I386_TYPE(dword, 4), 108 I386_TYPE(fword, 6), 109 I386_TYPE(qword, 8), 110 I386_TYPE(mmword, 8), 111 I386_TYPE(tbyte, 10), 112 I386_TYPE(oword, 16), 113 I386_TYPE(xmmword, 16), 114 I386_TYPE(ymmword, 32), 115 I386_TYPE(zmmword, 64), 116 #undef I386_TYPE 117 { "near", O_near_ptr, { 0xff04, 0xff02, 0xff08 } }, 118 { "far", O_far_ptr, { 0xff06, 0xff05, 0xff06 } }, 119 { NULL, O_illegal, { 0, 0, 0 } } 120 }; 121 122 operatorT i386_operator (const char *name, unsigned int operands, char *pc) 123 { 124 unsigned int j; 125 126 #ifdef SVR4_COMMENT_CHARS 127 if (!name && operands == 2 && *input_line_pointer == '\\') 128 switch (input_line_pointer[1]) 129 { 130 case '/': input_line_pointer += 2; return O_divide; 131 case '%': input_line_pointer += 2; return O_modulus; 132 case '*': input_line_pointer += 2; return O_multiply; 133 } 134 #endif 135 136 if (!intel_syntax) 137 return O_absent; 138 139 if (!name) 140 { 141 if (operands != 2) 142 return O_illegal; 143 switch (*input_line_pointer) 144 { 145 case ':': 146 ++input_line_pointer; 147 return O_full_ptr; 148 case '[': 149 ++input_line_pointer; 150 return O_index; 151 case '@': 152 if (this_operand >= 0 && i.reloc[this_operand] == NO_RELOC) 153 { 154 int adjust = 0; 155 char *gotfree_input_line = lex_got (&i.reloc[this_operand], 156 &adjust, 157 &intel_state.reloc_types); 158 159 if (!gotfree_input_line) 160 break; 161 free (gotfree_input_line); 162 *input_line_pointer++ = '+'; 163 memset (input_line_pointer, '0', adjust - 1); 164 input_line_pointer[adjust - 1] = ' '; 165 return O_add; 166 } 167 break; 168 } 169 return O_illegal; 170 } 171 172 /* See the quotation related comment in i386_parse_name(). */ 173 if (*pc == '"') 174 return O_absent; 175 176 for (j = 0; i386_operators[j].name; ++j) 177 if (strcasecmp (i386_operators[j].name, name) == 0) 178 { 179 if (i386_operators[j].operands 180 && i386_operators[j].operands != operands) 181 return O_illegal; 182 return i386_operators[j].op; 183 } 184 185 for (j = 0; i386_types[j].name; ++j) 186 if (strcasecmp (i386_types[j].name, name) == 0) 187 break; 188 189 if (i386_types[j].name && *pc == ' ') 190 { 191 const char *start = ++input_line_pointer; 192 char *pname; 193 char c = get_symbol_name (&pname); 194 195 if (strcasecmp (pname, "ptr") == 0 && (c != '"' || pname == start)) 196 { 197 pname[-1] = *pc; 198 *pc = c; 199 if (intel_syntax > 0 || operands != 1) 200 return O_illegal; 201 return i386_types[j].op; 202 } 203 204 if (strcasecmp (pname, "bcst") == 0 && (c != '"' || pname == start)) 205 { 206 pname[-1] = *pc; 207 *pc = c; 208 if (intel_syntax > 0 || operands != 1 209 || i386_types[j].sz[0] > 8 210 || (i386_types[j].sz[0] & (i386_types[j].sz[0] - 1))) 211 return O_illegal; 212 if (i.vec_encoding == vex_encoding_default) 213 i.vec_encoding = vex_encoding_evex; 214 else if (i.vec_encoding != vex_encoding_evex 215 && i.vec_encoding != vex_encoding_evex512) 216 return O_illegal; 217 if (!i.broadcast.bytes && !i.broadcast.type) 218 { 219 i.broadcast.bytes = i386_types[j].sz[0]; 220 i.broadcast.operand = this_operand; 221 } 222 return i386_types[j].op; 223 } 224 225 (void) restore_line_pointer (c); 226 input_line_pointer = pname - 1; 227 } 228 229 return O_absent; 230 } 231 232 static int i386_intel_parse_name (const char *name, expressionS *e) 233 { 234 unsigned int j; 235 236 if (! strcmp (name, "$")) 237 { 238 current_location (e); 239 return 1; 240 } 241 242 for (j = 0; i386_types[j].name; ++j) 243 if (strcasecmp(i386_types[j].name, name) == 0) 244 { 245 e->X_op = O_constant; 246 e->X_add_number = i386_types[j].sz[flag_code]; 247 e->X_add_symbol = NULL; 248 e->X_op_symbol = NULL; 249 return 1; 250 } 251 252 return 0; 253 } 254 255 static INLINE int i386_intel_check (const reg_entry *rreg, 256 const reg_entry *base, 257 const reg_entry *iindex) 258 { 259 if ((this_operand >= 0 260 && rreg != i.op[this_operand].regs) 261 || base != intel_state.base 262 || iindex != intel_state.index) 263 { 264 as_bad (_("invalid use of register")); 265 return 0; 266 } 267 return 1; 268 } 269 270 static INLINE void i386_intel_fold (expressionS *e, symbolS *sym) 271 { 272 expressionS *exp = symbol_get_value_expression (sym); 273 if (S_GET_SEGMENT (sym) == absolute_section) 274 { 275 offsetT val = e->X_add_number; 276 277 *e = *exp; 278 e->X_add_number += val; 279 } 280 else 281 { 282 if (exp->X_op == O_symbol 283 && strcmp (S_GET_NAME (exp->X_add_symbol), 284 GLOBAL_OFFSET_TABLE_NAME) == 0) 285 sym = exp->X_add_symbol; 286 e->X_add_symbol = sym; 287 e->X_op_symbol = NULL; 288 e->X_op = O_symbol; 289 } 290 } 291 292 static int 293 i386_intel_simplify_register (expressionS *e) 294 { 295 int reg_num; 296 297 if (this_operand < 0 || intel_state.in_offset) 298 { 299 as_bad (_("invalid use of register")); 300 return 0; 301 } 302 303 if (e->X_op == O_register) 304 reg_num = e->X_add_number; 305 else 306 reg_num = e->X_md - 1; 307 308 if (reg_num < 0 || reg_num >= (int) i386_regtab_size) 309 { 310 as_bad (_("invalid register number")); 311 return 0; 312 } 313 314 if (!check_register (&i386_regtab[reg_num])) 315 { 316 as_bad (_("register '%s%s' cannot be used here"), 317 register_prefix, i386_regtab[reg_num].reg_name); 318 return 0; 319 } 320 321 if (!intel_state.in_bracket) 322 { 323 if (i.op[this_operand].regs) 324 { 325 as_bad (_("invalid use of register")); 326 return 0; 327 } 328 if ((i386_regtab[reg_num].reg_type.bitfield.class == SReg 329 && i386_regtab[reg_num].reg_num == RegFlat) 330 || (dot_insn () 331 && i386_regtab[reg_num].reg_type.bitfield.class == ClassNone)) 332 { 333 as_bad (_("invalid use of pseudo-register")); 334 return 0; 335 } 336 i.op[this_operand].regs = i386_regtab + reg_num; 337 } 338 else if (!intel_state.index 339 && (i386_regtab[reg_num].reg_type.bitfield.xmmword 340 || i386_regtab[reg_num].reg_type.bitfield.ymmword 341 || i386_regtab[reg_num].reg_type.bitfield.zmmword 342 || i386_regtab[reg_num].reg_num == RegIZ)) 343 intel_state.index = i386_regtab + reg_num; 344 else if (!intel_state.base && !intel_state.in_scale) 345 intel_state.base = i386_regtab + reg_num; 346 else if (!intel_state.index) 347 { 348 const insn_template *t = current_templates.start; 349 350 if (intel_state.in_scale 351 || i386_regtab[reg_num].reg_type.bitfield.baseindex 352 || dot_insn () 353 || t->mnem_off == MN_bndmk 354 || t->mnem_off == MN_bndldx 355 || t->mnem_off == MN_bndstx) 356 intel_state.index = i386_regtab + reg_num; 357 else 358 { 359 /* Convert base to index and make ESP/RSP the base. */ 360 intel_state.index = intel_state.base; 361 intel_state.base = i386_regtab + reg_num; 362 } 363 } 364 else 365 { 366 /* esp is invalid as index */ 367 intel_state.index = reg_eax + ESP_REG_NUM; 368 } 369 return 2; 370 } 371 372 static int i386_intel_simplify (expressionS *); 373 374 static INLINE int i386_intel_simplify_symbol(symbolS *sym) 375 { 376 int ret = i386_intel_simplify (symbol_get_value_expression (sym)); 377 378 if (ret == 2) 379 { 380 S_SET_SEGMENT(sym, absolute_section); 381 ret = 1; 382 } 383 return ret; 384 } 385 386 static int i386_intel_simplify (expressionS *e) 387 { 388 const reg_entry *the_reg = (this_operand >= 0 389 ? i.op[this_operand].regs : NULL); 390 const reg_entry *base = intel_state.base; 391 const reg_entry *state_index = intel_state.index; 392 int ret; 393 394 if (!intel_syntax) 395 return 1; 396 397 switch (e->X_op) 398 { 399 case O_index: 400 if (e->X_add_symbol) 401 { 402 if (!i386_intel_simplify_symbol (e->X_add_symbol) 403 || !i386_intel_check(the_reg, intel_state.base, 404 intel_state.index)) 405 return 0; 406 } 407 if (!intel_state.in_offset) 408 ++intel_state.in_bracket; 409 ret = i386_intel_simplify_symbol (e->X_op_symbol); 410 if (!intel_state.in_offset) 411 --intel_state.in_bracket; 412 if (!ret) 413 return 0; 414 if (e->X_add_symbol) 415 e->X_op = O_add; 416 else 417 i386_intel_fold (e, e->X_op_symbol); 418 break; 419 420 case O_offset: 421 intel_state.has_offset = 1; 422 ++intel_state.in_offset; 423 ret = i386_intel_simplify_symbol (e->X_add_symbol); 424 --intel_state.in_offset; 425 if (!ret || !i386_intel_check(the_reg, base, state_index)) 426 return 0; 427 i386_intel_fold (e, e->X_add_symbol); 428 return ret; 429 430 case O_byte_ptr: 431 case O_word_ptr: 432 case O_dword_ptr: 433 case O_fword_ptr: 434 case O_qword_ptr: /* O_mmword_ptr */ 435 case O_tbyte_ptr: 436 case O_oword_ptr: /* O_xmmword_ptr */ 437 case O_ymmword_ptr: 438 case O_zmmword_ptr: 439 case O_near_ptr: 440 case O_far_ptr: 441 if (intel_state.op_modifier == O_absent) 442 intel_state.op_modifier = e->X_op; 443 /* FALLTHROUGH */ 444 case O_short: 445 if (symbol_get_value_expression (e->X_add_symbol)->X_op 446 == O_register) 447 { 448 as_bad (_("invalid use of register")); 449 return 0; 450 } 451 if (!i386_intel_simplify_symbol (e->X_add_symbol)) 452 return 0; 453 i386_intel_fold (e, e->X_add_symbol); 454 break; 455 456 case O_full_ptr: 457 if (symbol_get_value_expression (e->X_op_symbol)->X_op 458 == O_register) 459 { 460 as_bad (_("invalid use of register")); 461 return 0; 462 } 463 if (!i386_intel_simplify_symbol (e->X_op_symbol) 464 || !i386_intel_check(the_reg, intel_state.base, 465 intel_state.index)) 466 return 0; 467 if (!intel_state.in_offset) 468 { 469 if (!intel_state.seg) 470 intel_state.seg = e->X_add_symbol; 471 else 472 { 473 expressionS exp; 474 475 exp.X_op = O_full_ptr; 476 exp.X_add_symbol = e->X_add_symbol; 477 exp.X_op_symbol = intel_state.seg; 478 intel_state.seg = make_expr_symbol (&exp); 479 } 480 } 481 i386_intel_fold (e, e->X_op_symbol); 482 break; 483 484 case O_multiply: 485 if (this_operand >= 0 && intel_state.in_bracket) 486 { 487 expressionS *scale = NULL; 488 int has_index = (intel_state.index != NULL); 489 490 if (!intel_state.in_scale++) 491 intel_state.scale_factor = 1; 492 493 ret = i386_intel_simplify_symbol (e->X_add_symbol); 494 if (ret && !has_index && intel_state.index) 495 scale = symbol_get_value_expression (e->X_op_symbol); 496 497 if (ret) 498 ret = i386_intel_simplify_symbol (e->X_op_symbol); 499 if (ret && !scale && !has_index && intel_state.index) 500 scale = symbol_get_value_expression (e->X_add_symbol); 501 502 if (ret && scale) 503 { 504 resolve_expression (scale); 505 if (scale->X_op != O_constant 506 || intel_state.index->reg_type.bitfield.word) 507 scale->X_add_number = 0; 508 intel_state.scale_factor *= scale->X_add_number; 509 } 510 511 --intel_state.in_scale; 512 if (!ret) 513 return 0; 514 515 if (!intel_state.in_scale) 516 switch (intel_state.scale_factor) 517 { 518 case 1: 519 i.log2_scale_factor = 0; 520 break; 521 case 2: 522 i.log2_scale_factor = 1; 523 break; 524 case 4: 525 i.log2_scale_factor = 2; 526 break; 527 case 8: 528 i.log2_scale_factor = 3; 529 break; 530 default: 531 /* esp is invalid as index */ 532 intel_state.index = reg_eax + ESP_REG_NUM; 533 break; 534 } 535 536 break; 537 } 538 goto fallthrough; 539 540 case O_register: 541 ret = i386_intel_simplify_register (e); 542 if (ret == 2) 543 { 544 gas_assert (e->X_add_number < (unsigned short) -1); 545 e->X_md = (unsigned short) e->X_add_number + 1; 546 e->X_op = O_constant; 547 e->X_add_number = 0; 548 } 549 return ret; 550 551 case O_constant: 552 if (e->X_md) 553 return i386_intel_simplify_register (e); 554 555 /* FALLTHROUGH */ 556 default: 557 fallthrough: 558 if (e->X_add_symbol 559 && !i386_intel_simplify_symbol (e->X_add_symbol)) 560 return 0; 561 if (!the_reg && this_operand >= 0 562 && e->X_op == O_symbol && !e->X_add_number) 563 the_reg = i.op[this_operand].regs; 564 if (e->X_op == O_add || e->X_op == O_subtract) 565 { 566 base = intel_state.base; 567 state_index = intel_state.index; 568 } 569 if (!i386_intel_check (the_reg, base, state_index) 570 || (e->X_op_symbol 571 && !i386_intel_simplify_symbol (e->X_op_symbol)) 572 || !i386_intel_check (the_reg, 573 (e->X_op != O_add 574 ? base : intel_state.base), 575 (e->X_op != O_add 576 ? state_index : intel_state.index))) 577 return 0; 578 break; 579 } 580 581 if (this_operand >= 0 582 && e->X_op == O_symbol 583 && !intel_state.in_offset) 584 { 585 segT seg = S_GET_SEGMENT (e->X_add_symbol); 586 587 if (seg != absolute_section 588 && seg != reg_section 589 && seg != expr_section) 590 intel_state.is_mem |= 2 - !intel_state.in_bracket; 591 } 592 593 return 1; 594 } 595 596 int i386_need_index_operator (void) 597 { 598 return intel_syntax < 0; 599 } 600 601 static int 602 i386_intel_operand (char *operand_string, int got_a_float) 603 { 604 char *saved_input_line_pointer, *buf; 605 segT exp_seg; 606 expressionS exp, *expP; 607 char suffix = 0; 608 bool rc_sae_modifier = i.rounding.type != rc_none && i.rounding.modifier; 609 int ret; 610 611 /* Handle vector immediates. */ 612 if (RC_SAE_immediate (operand_string)) 613 { 614 if (i.imm_operands) 615 { 616 as_bad (_("`%s': RC/SAE operand must precede immediate operands"), 617 insn_name (current_templates.start)); 618 return 0; 619 } 620 621 return 1; 622 } 623 624 /* Initialize state structure. */ 625 intel_state.op_modifier = O_absent; 626 intel_state.is_mem = 0; 627 intel_state.is_indirect = 0; 628 intel_state.has_offset = 0; 629 intel_state.base = NULL; 630 intel_state.index = NULL; 631 intel_state.seg = NULL; 632 operand_type_set (&intel_state.reloc_types, ~0); 633 gas_assert (!intel_state.in_offset); 634 gas_assert (!intel_state.in_bracket); 635 gas_assert (!intel_state.in_scale); 636 637 saved_input_line_pointer = input_line_pointer; 638 input_line_pointer = buf = xstrdup (operand_string); 639 640 intel_syntax = -1; 641 expr_mode = expr_operator_none; 642 memset (&exp, 0, sizeof(exp)); 643 exp_seg = expression (&exp); 644 ret = i386_intel_simplify (&exp); 645 intel_syntax = 1; 646 647 SKIP_WHITESPACE (); 648 649 /* Handle vector operations. */ 650 if (*input_line_pointer == '{') 651 { 652 char *end = check_VecOperations (input_line_pointer); 653 if (end) 654 input_line_pointer = end; 655 else 656 ret = 0; 657 } 658 659 if (!is_end_of_line[(unsigned char) *input_line_pointer]) 660 { 661 if (ret) 662 as_bad (_("junk `%s' after expression"), input_line_pointer); 663 ret = 0; 664 } 665 else if (exp.X_op == O_illegal || exp.X_op == O_absent) 666 { 667 if (ret) 668 as_bad (_("invalid expression")); 669 ret = 0; 670 } 671 else if (!intel_state.has_offset 672 && input_line_pointer > buf 673 && *(input_line_pointer - 1) == ']') 674 { 675 intel_state.is_mem |= 1; 676 intel_state.is_indirect = 1; 677 } 678 679 input_line_pointer = saved_input_line_pointer; 680 free (buf); 681 682 gas_assert (!intel_state.in_offset); 683 gas_assert (!intel_state.in_bracket); 684 gas_assert (!intel_state.in_scale); 685 686 if (!ret) 687 return 0; 688 689 if (intel_state.op_modifier != O_absent 690 && current_templates.start->mnem_off != MN_lea) 691 { 692 i.types[this_operand].bitfield.unspecified = 0; 693 694 switch (intel_state.op_modifier) 695 { 696 case O_byte_ptr: 697 i.types[this_operand].bitfield.byte = 1; 698 suffix = BYTE_MNEM_SUFFIX; 699 break; 700 701 case O_word_ptr: 702 i.types[this_operand].bitfield.word = 1; 703 if (got_a_float == 2) /* "fi..." */ 704 suffix = SHORT_MNEM_SUFFIX; 705 else if (current_templates.start->mnem_off != MN_lar 706 && current_templates.start->mnem_off != MN_lsl 707 && current_templates.start->mnem_off != MN_arpl) 708 suffix = WORD_MNEM_SUFFIX; 709 break; 710 711 case O_dword_ptr: 712 i.types[this_operand].bitfield.dword = 1; 713 if ((insn_name (current_templates.start)[0] == 'l' 714 && insn_name (current_templates.start)[2] == 's' 715 && insn_name (current_templates.start)[3] == 0) 716 || current_templates.start->mnem_off == MN_bound) 717 suffix = WORD_MNEM_SUFFIX; 718 else if (flag_code != CODE_32BIT 719 && (current_templates.start->opcode_modifier.jump == JUMP 720 || current_templates.start->opcode_modifier.jump 721 == JUMP_DWORD)) 722 { 723 i.far_branch = true; 724 suffix = WORD_MNEM_SUFFIX; 725 } 726 else if (got_a_float == 1) /* "f..." */ 727 suffix = SHORT_MNEM_SUFFIX; 728 else 729 suffix = LONG_MNEM_SUFFIX; 730 break; 731 732 case O_fword_ptr: 733 i.types[this_operand].bitfield.fword = 1; 734 if (current_templates.start->mnem_off == MN_les 735 || current_templates.start->mnem_off == MN_lds 736 || current_templates.start->mnem_off == MN_lss 737 || current_templates.start->mnem_off == MN_lfs 738 || current_templates.start->mnem_off == MN_lgs) 739 suffix = LONG_MNEM_SUFFIX; 740 else if (!got_a_float) 741 { 742 if (flag_code == CODE_16BIT) 743 add_prefix (DATA_PREFIX_OPCODE); 744 i.far_branch = true; 745 } 746 break; 747 748 case O_qword_ptr: /* O_mmword_ptr */ 749 i.types[this_operand].bitfield.qword = 1; 750 if (current_templates.start->mnem_off == MN_bound 751 || got_a_float == 1) /* "f..." */ 752 suffix = LONG_MNEM_SUFFIX; 753 else 754 suffix = QWORD_MNEM_SUFFIX; 755 break; 756 757 case O_tbyte_ptr: 758 i.types[this_operand].bitfield.tbyte = 1; 759 if (got_a_float) 760 break; 761 if (flag_code == CODE_64BIT 762 && (current_templates.start->operand_types[0].bitfield.fword 763 || current_templates.start->operand_types[0].bitfield.tbyte 764 || current_templates.start->opcode_modifier.jump == JUMP_DWORD 765 || current_templates.start->opcode_modifier.jump == JUMP)) 766 suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */ 767 else 768 i.types[this_operand].bitfield.byte = 1; /* cause an error */ 769 break; 770 771 case O_oword_ptr: /* O_xmmword_ptr */ 772 i.types[this_operand].bitfield.xmmword = 1; 773 break; 774 775 case O_ymmword_ptr: 776 if (vector_size < VSZ256) 777 { 778 as_bad (_("256-bit operands disabled")); 779 return 0; 780 } 781 i.types[this_operand].bitfield.ymmword = 1; 782 break; 783 784 case O_zmmword_ptr: 785 if (vector_size < VSZ512) 786 { 787 as_bad (_("512-bit operands disabled")); 788 return 0; 789 } 790 i.types[this_operand].bitfield.zmmword = 1; 791 break; 792 793 case O_far_ptr: 794 i.far_branch = true; 795 /* FALLTHROUGH */ 796 case O_near_ptr: 797 if (current_templates.start->opcode_modifier.jump != JUMP 798 && current_templates.start->opcode_modifier.jump != JUMP_DWORD) 799 { 800 /* cause an error */ 801 i.types[this_operand].bitfield.byte = 1; 802 i.types[this_operand].bitfield.tbyte = 1; 803 suffix = i.suffix; 804 } 805 break; 806 807 default: 808 BAD_CASE (intel_state.op_modifier); 809 break; 810 } 811 812 /* Now check whether we actually want to infer an AT&T-like suffix. 813 We really only need to do this when operand size determination (incl. 814 REX.W) is going to be derived from it. For this we check whether the 815 given suffix is valid for any of the candidate templates. */ 816 if (suffix && suffix != i.suffix 817 && current_templates.start->mnem_off != MN_bound) 818 { 819 const insn_template *t; 820 821 for (t = current_templates.start; t < current_templates.end; ++t) 822 { 823 /* Operands haven't been swapped yet. */ 824 unsigned int op = t->operands - 1 - this_operand; 825 826 /* Easy checks to skip templates which won't match anyway. */ 827 if (this_operand >= t->operands 828 || t->opcode_modifier.dialect >= ATT_SYNTAX) 829 continue; 830 831 switch (suffix) 832 { 833 case BYTE_MNEM_SUFFIX: 834 if (t->opcode_modifier.no_bsuf) 835 continue; 836 break; 837 case WORD_MNEM_SUFFIX: 838 if (t->opcode_modifier.no_wsuf) 839 continue; 840 break; 841 case LONG_MNEM_SUFFIX: 842 if (t->opcode_modifier.no_lsuf) 843 continue; 844 break; 845 case QWORD_MNEM_SUFFIX: 846 if (t->opcode_modifier.no_qsuf || !q_suffix_allowed (t)) 847 continue; 848 break; 849 case SHORT_MNEM_SUFFIX: 850 if (t->opcode_modifier.no_ssuf) 851 continue; 852 break; 853 default: 854 abort (); 855 } 856 857 /* We can skip templates with swappable operands here, as one 858 operand will be a register, which operand size can be 859 determined from. */ 860 if (t->opcode_modifier.d) 861 continue; 862 863 /* In a few cases suffixes are permitted, but we can nevertheless 864 derive that these aren't going to be needed. This is only of 865 interest for insns using ModR/M. */ 866 if (!t->opcode_modifier.modrm) 867 break; 868 869 if (!t->operand_types[op].bitfield.baseindex) 870 continue; 871 872 switch (t->operand_types[op].bitfield.class) 873 { 874 case RegMMX: 875 case RegSIMD: 876 case RegMask: 877 continue; 878 } 879 880 break; 881 } 882 883 if (t == current_templates.end) 884 suffix = 0; 885 } 886 887 if (!i.suffix) 888 i.suffix = suffix; 889 else if (suffix && i.suffix != suffix) 890 { 891 as_bad (_("conflicting operand size modifiers")); 892 return 0; 893 } 894 } 895 896 /* Operands for jump/call need special consideration. */ 897 if (current_templates.start->opcode_modifier.jump == JUMP 898 || current_templates.start->opcode_modifier.jump == JUMP_DWORD 899 || current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT) 900 { 901 bool jumpabsolute = false; 902 903 if (i.op[this_operand].regs 904 || intel_state.base 905 || intel_state.index 906 || intel_state.is_mem > 1) 907 jumpabsolute = true; 908 else 909 switch (intel_state.op_modifier) 910 { 911 case O_near_ptr: 912 if (intel_state.seg) 913 jumpabsolute = true; 914 else 915 intel_state.is_mem = 1; 916 break; 917 case O_far_ptr: 918 case O_absent: 919 if (!intel_state.seg) 920 { 921 intel_state.is_mem = 1; 922 if (intel_state.op_modifier == O_absent) 923 { 924 if (intel_state.is_indirect == 1) 925 jumpabsolute = true; 926 break; 927 } 928 as_bad (_("cannot infer the segment part of the operand")); 929 return 0; 930 } 931 else if (S_GET_SEGMENT (intel_state.seg) == reg_section) 932 { 933 jumpabsolute = true; 934 if (intel_state.op_modifier == O_far_ptr) 935 i.far_branch = true; 936 } 937 else 938 { 939 i386_operand_type types; 940 941 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) 942 { 943 as_bad (_("at most %d immediate operands are allowed"), 944 MAX_IMMEDIATE_OPERANDS); 945 return 0; 946 } 947 expP = &im_expressions[i.imm_operands++]; 948 memset (expP, 0, sizeof(*expP)); 949 expP->X_op = O_symbol; 950 expP->X_add_symbol = intel_state.seg; 951 i.op[this_operand].imms = expP; 952 953 resolve_expression (expP); 954 operand_type_set (&types, ~0); 955 if (!i386_finalize_immediate (S_GET_SEGMENT (intel_state.seg), 956 expP, types, operand_string)) 957 return 0; 958 if (i.operands < MAX_OPERANDS) 959 { 960 this_operand = i.operands++; 961 i.types[this_operand].bitfield.unspecified = 1; 962 } 963 intel_state.seg = NULL; 964 intel_state.is_mem = 0; 965 } 966 break; 967 default: 968 jumpabsolute = true; 969 break; 970 } 971 if (jumpabsolute) 972 { 973 i.jumpabsolute = true; 974 intel_state.is_mem |= 1; 975 } 976 } 977 else if (intel_state.seg) 978 intel_state.is_mem |= 1; 979 980 if (i.op[this_operand].regs) 981 { 982 i386_operand_type temp; 983 984 /* Register operand. */ 985 if (intel_state.base || intel_state.index || intel_state.seg 986 || i.imm_bits[this_operand]) 987 { 988 as_bad (_("invalid operand")); 989 return 0; 990 } 991 992 temp = i.op[this_operand].regs->reg_type; 993 temp.bitfield.baseindex = 0; 994 i.types[this_operand] = operand_type_or (i.types[this_operand], 995 temp); 996 i.types[this_operand].bitfield.unspecified = 0; 997 ++i.reg_operands; 998 999 if ((i.rounding.type != rc_none && !i.rounding.modifier 1000 && temp.bitfield.class != Reg) 1001 || rc_sae_modifier) 1002 { 1003 unsigned int j; 1004 1005 for (j = 0; j < ARRAY_SIZE (RC_NamesTable); ++j) 1006 if (i.rounding.type == RC_NamesTable[j].type) 1007 break; 1008 as_bad (_("`%s': misplaced `{%s}'"), 1009 insn_name (current_templates.start), RC_NamesTable[j].name); 1010 return 0; 1011 } 1012 } 1013 else if (intel_state.base 1014 || intel_state.index 1015 || intel_state.seg 1016 || intel_state.is_mem) 1017 { 1018 /* Memory operand. */ 1019 if (i.imm_bits[this_operand]) 1020 { 1021 as_bad (_("invalid operand")); 1022 return 0; 1023 } 1024 1025 if (i.mem_operands) 1026 { 1027 /* Handle 1028 1029 call 0x9090,0x90909090 1030 lcall 0x9090,0x90909090 1031 jmp 0x9090,0x90909090 1032 ljmp 0x9090,0x90909090 1033 */ 1034 1035 if ((current_templates.start->opcode_modifier.jump == JUMP_INTERSEGMENT 1036 || current_templates.start->opcode_modifier.jump == JUMP_DWORD 1037 || current_templates.start->opcode_modifier.jump == JUMP) 1038 && this_operand == 1 1039 && intel_state.seg == NULL 1040 && i.mem_operands == 1 1041 && i.disp_operands == 1 1042 && intel_state.op_modifier == O_absent) 1043 { 1044 /* Try to process the first operand as immediate, */ 1045 this_operand = 0; 1046 if (i386_finalize_immediate (exp_seg, i.op[0].imms, 1047 intel_state.reloc_types, 1048 NULL)) 1049 { 1050 this_operand = 1; 1051 expP = &im_expressions[0]; 1052 i.op[this_operand].imms = expP; 1053 *expP = exp; 1054 1055 /* Try to process the second operand as immediate, */ 1056 if (i386_finalize_immediate (exp_seg, expP, 1057 intel_state.reloc_types, 1058 NULL)) 1059 { 1060 i.mem_operands = 0; 1061 i.disp_operands = 0; 1062 i.imm_operands = 2; 1063 i.flags[0] &= ~Operand_Mem; 1064 i.types[0].bitfield.disp16 = 0; 1065 i.types[0].bitfield.disp32 = 0; 1066 return 1; 1067 } 1068 } 1069 } 1070 } 1071 1072 /* Swap base and index in 16-bit memory operands like 1073 [si+bx]. Since i386_index_check is also used in AT&T 1074 mode we have to do this here. */ 1075 if (intel_state.base 1076 && intel_state.index 1077 && intel_state.base->reg_type.bitfield.word 1078 && intel_state.index->reg_type.bitfield.word 1079 && intel_state.base->reg_num >= 6 1080 && intel_state.index->reg_num < 6) 1081 { 1082 i.base_reg = intel_state.index; 1083 i.index_reg = intel_state.base; 1084 } 1085 else 1086 { 1087 i.base_reg = intel_state.base; 1088 i.index_reg = intel_state.index; 1089 } 1090 1091 if (i.base_reg || i.index_reg) 1092 i.types[this_operand].bitfield.baseindex = 1; 1093 1094 expP = &disp_expressions[i.disp_operands]; 1095 memcpy (expP, &exp, sizeof(exp)); 1096 resolve_expression (expP); 1097 1098 if (expP->X_op != O_constant 1099 || expP->X_add_number 1100 || !i.types[this_operand].bitfield.baseindex) 1101 { 1102 i.op[this_operand].disps = expP; 1103 i.disp_operands++; 1104 1105 i386_addressing_mode (); 1106 1107 if (flag_code == CODE_64BIT) 1108 { 1109 i.types[this_operand].bitfield.disp32 = 1; 1110 if (!i.prefix[ADDR_PREFIX]) 1111 i.types[this_operand].bitfield.disp64 = 1; 1112 } 1113 else if (!i.prefix[ADDR_PREFIX] ^ (flag_code == CODE_16BIT)) 1114 i.types[this_operand].bitfield.disp32 = 1; 1115 else 1116 i.types[this_operand].bitfield.disp16 = 1; 1117 1118 #if defined (OBJ_AOUT) || defined (OBJ_MAYBE_AOUT) 1119 /* 1120 * exp_seg is used only for verification in 1121 * i386_finalize_displacement, and we can end up seeing reg_section 1122 * here - but we know we removed all registers from the expression 1123 * (or error-ed on any remaining ones) in i386_intel_simplify. I 1124 * consider the check in i386_finalize_displacement bogus anyway, in 1125 * particular because it doesn't allow for expr_section, so I'd 1126 * rather see that check (and the similar one in 1127 * i386_finalize_immediate) use SEG_NORMAL(), but not being an a.out 1128 * expert I can't really say whether that would have other bad side 1129 * effects. 1130 */ 1131 if (OUTPUT_FLAVOR == bfd_target_aout_flavour 1132 && exp_seg == reg_section) 1133 exp_seg = expP->X_op != O_constant ? undefined_section 1134 : absolute_section; 1135 #endif 1136 1137 if (!i386_finalize_displacement (exp_seg, expP, 1138 intel_state.reloc_types, 1139 operand_string)) 1140 return 0; 1141 } 1142 1143 if (intel_state.seg) 1144 { 1145 for (ret = check_none; ; ret = operand_check) 1146 { 1147 expP = symbol_get_value_expression (intel_state.seg); 1148 if (expP->X_op != O_full_ptr 1149 || symbol_get_value_expression (expP->X_op_symbol)->X_op 1150 != O_register) 1151 break; 1152 intel_state.seg = expP->X_add_symbol; 1153 } 1154 if (expP->X_op != O_register) 1155 { 1156 as_bad (_("segment register name expected")); 1157 return 0; 1158 } 1159 if (i386_regtab[expP->X_add_number].reg_type.bitfield.class != SReg) 1160 { 1161 as_bad (_("invalid use of register")); 1162 return 0; 1163 } 1164 switch (ret) 1165 { 1166 case check_error: 1167 as_bad (_("redundant segment overrides")); 1168 return 0; 1169 case check_warning: 1170 as_warn (_("redundant segment overrides")); 1171 break; 1172 } 1173 if (i386_regtab[expP->X_add_number].reg_num == RegFlat) 1174 i.seg[i.mem_operands] = NULL; 1175 else 1176 i.seg[i.mem_operands] = &i386_regtab[expP->X_add_number]; 1177 } 1178 1179 if (!i386_index_check (operand_string)) 1180 return 0; 1181 1182 i.flags[this_operand] |= Operand_Mem; 1183 ++i.mem_operands; 1184 } 1185 else 1186 { 1187 /* Immediate. */ 1188 if (i.imm_operands >= MAX_IMMEDIATE_OPERANDS) 1189 { 1190 as_bad (_("at most %d immediate operands are allowed"), 1191 MAX_IMMEDIATE_OPERANDS); 1192 return 0; 1193 } 1194 1195 expP = &im_expressions[i.imm_operands++]; 1196 i.op[this_operand].imms = expP; 1197 *expP = exp; 1198 1199 return i386_finalize_immediate (exp_seg, expP, intel_state.reloc_types, 1200 operand_string); 1201 } 1202 1203 return 1; 1204 } 1205