1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU. 2 Copyright (C) 1989-2018 Free Software Foundation, Inc. 3 Contributed by Carnegie Mellon University, 1993. 4 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files. 5 Modified by Ken Raeburn for gas-2.x and ECOFF support. 6 Modified by Richard Henderson for ELF support. 7 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support. 8 9 This file is part of GAS, the GNU Assembler. 10 11 GAS is free software; you can redistribute it and/or modify 12 it under the terms of the GNU General Public License as published by 13 the Free Software Foundation; either version 3, or (at your option) 14 any later version. 15 16 GAS is distributed in the hope that it will be useful, 17 but WITHOUT ANY WARRANTY; without even the implied warranty of 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 GNU General Public License for more details. 20 21 You should have received a copy of the GNU General Public License 22 along with GAS; see the file COPYING. If not, write to the Free 23 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA 24 02110-1301, USA. */ 25 26 /* Mach Operating System 27 Copyright (c) 1993 Carnegie Mellon University 28 All Rights Reserved. 29 30 Permission to use, copy, modify and distribute this software and its 31 documentation is hereby granted, provided that both the copyright 32 notice and this permission notice appear in all copies of the 33 software, derivative works or modified versions, and any portions 34 thereof, and that both notices appear in supporting documentation. 35 36 CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS 37 CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR 38 ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 39 40 Carnegie Mellon requests users of this software to return to 41 42 Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU 43 School of Computer Science 44 Carnegie Mellon University 45 Pittsburgh PA 15213-3890 46 47 any improvements or extensions that they make and grant Carnegie the 48 rights to redistribute these changes. */ 49 50 #include "as.h" 51 #include "subsegs.h" 52 #include "struc-symbol.h" 53 #include "ecoff.h" 54 55 #include "opcode/alpha.h" 56 57 #ifdef OBJ_ELF 58 #include "elf/alpha.h" 59 #endif 60 61 #ifdef OBJ_EVAX 62 #include "vms.h" 63 #include "vms/egps.h" 64 #endif 65 66 #include "dwarf2dbg.h" 67 #include "dw2gencfi.h" 68 #include "safe-ctype.h" 69 70 /* Local types. */ 71 72 #define TOKENIZE_ERROR -1 73 #define TOKENIZE_ERROR_REPORT -2 74 #define MAX_INSN_FIXUPS 2 75 #define MAX_INSN_ARGS 5 76 77 /* Used since new relocation types are introduced in this 78 file (DUMMY_RELOC_LITUSE_*) */ 79 typedef int extended_bfd_reloc_code_real_type; 80 81 struct alpha_fixup 82 { 83 expressionS exp; 84 /* bfd_reloc_code_real_type reloc; */ 85 extended_bfd_reloc_code_real_type reloc; 86 #ifdef OBJ_EVAX 87 /* The symbol of the item in the linkage section. */ 88 symbolS *xtrasym; 89 90 /* The symbol of the procedure descriptor. */ 91 symbolS *procsym; 92 #endif 93 }; 94 95 struct alpha_insn 96 { 97 unsigned insn; 98 int nfixups; 99 struct alpha_fixup fixups[MAX_INSN_FIXUPS]; 100 long sequence; 101 }; 102 103 enum alpha_macro_arg 104 { 105 MACRO_EOA = 1, 106 MACRO_IR, 107 MACRO_PIR, 108 MACRO_OPIR, 109 MACRO_CPIR, 110 MACRO_FPR, 111 MACRO_EXP 112 }; 113 114 struct alpha_macro 115 { 116 const char *name; 117 void (*emit) (const expressionS *, int, const void *); 118 const void * arg; 119 enum alpha_macro_arg argsets[16]; 120 }; 121 122 /* Extra expression types. */ 123 124 #define O_pregister O_md1 /* O_register, in parentheses. */ 125 #define O_cpregister O_md2 /* + a leading comma. */ 126 127 /* The alpha_reloc_op table below depends on the ordering of these. */ 128 #define O_literal O_md3 /* !literal relocation. */ 129 #define O_lituse_addr O_md4 /* !lituse_addr relocation. */ 130 #define O_lituse_base O_md5 /* !lituse_base relocation. */ 131 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation. */ 132 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation. */ 133 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation. */ 134 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation. */ 135 #define O_lituse_jsrdirect O_md10 /* !lituse_jsrdirect relocation. */ 136 #define O_gpdisp O_md11 /* !gpdisp relocation. */ 137 #define O_gprelhigh O_md12 /* !gprelhigh relocation. */ 138 #define O_gprellow O_md13 /* !gprellow relocation. */ 139 #define O_gprel O_md14 /* !gprel relocation. */ 140 #define O_samegp O_md15 /* !samegp relocation. */ 141 #define O_tlsgd O_md16 /* !tlsgd relocation. */ 142 #define O_tlsldm O_md17 /* !tlsldm relocation. */ 143 #define O_gotdtprel O_md18 /* !gotdtprel relocation. */ 144 #define O_dtprelhi O_md19 /* !dtprelhi relocation. */ 145 #define O_dtprello O_md20 /* !dtprello relocation. */ 146 #define O_dtprel O_md21 /* !dtprel relocation. */ 147 #define O_gottprel O_md22 /* !gottprel relocation. */ 148 #define O_tprelhi O_md23 /* !tprelhi relocation. */ 149 #define O_tprello O_md24 /* !tprello relocation. */ 150 #define O_tprel O_md25 /* !tprel relocation. */ 151 152 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1) 153 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2) 154 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3) 155 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4) 156 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5) 157 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6) 158 #define DUMMY_RELOC_LITUSE_JSRDIRECT (BFD_RELOC_UNUSED + 7) 159 160 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel) 161 162 /* Macros for extracting the type and number of encoded register tokens. */ 163 164 #define is_ir_num(x) (((x) & 32) == 0) 165 #define is_fpr_num(x) (((x) & 32) != 0) 166 #define regno(x) ((x) & 31) 167 168 /* Something odd inherited from the old assembler. */ 169 170 #define note_gpreg(R) (alpha_gprmask |= (1 << (R))) 171 #define note_fpreg(R) (alpha_fprmask |= (1 << (R))) 172 173 /* Predicates for 16- and 32-bit ranges */ 174 /* XXX: The non-shift version appears to trigger a compiler bug when 175 cross-assembling from x86 w/ gcc 2.7.2. */ 176 177 #if 1 178 #define range_signed_16(x) \ 179 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1) 180 #define range_signed_32(x) \ 181 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1) 182 #else 183 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \ 184 (offsetT) (x) <= (offsetT) 0x7FFF) 185 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \ 186 (offsetT) (x) <= (offsetT) 0x7FFFFFFF) 187 #endif 188 189 /* Macros for sign extending from 16- and 32-bits. */ 190 /* XXX: The cast macros will work on all the systems that I care about, 191 but really a predicate should be found to use the non-cast forms. */ 192 193 #if 1 194 #define sign_extend_16(x) ((short) (x)) 195 #define sign_extend_32(x) ((int) (x)) 196 #else 197 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000) 198 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \ 199 ^ 0x80000000) - 0x80000000) 200 #endif 201 202 /* Macros to build tokens. */ 203 204 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \ 205 (t).X_op = O_register, \ 206 (t).X_add_number = (r)) 207 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \ 208 (t).X_op = O_pregister, \ 209 (t).X_add_number = (r)) 210 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \ 211 (t).X_op = O_cpregister, \ 212 (t).X_add_number = (r)) 213 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \ 214 (t).X_op = O_register, \ 215 (t).X_add_number = (r) + 32) 216 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \ 217 (t).X_op = O_symbol, \ 218 (t).X_add_symbol = (s), \ 219 (t).X_add_number = (a)) 220 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \ 221 (t).X_op = O_constant, \ 222 (t).X_add_number = (n)) 223 224 /* Generic assembler global variables which must be defined by all 225 targets. */ 226 227 /* Characters which always start a comment. */ 228 const char comment_chars[] = "#"; 229 230 /* Characters which start a comment at the beginning of a line. */ 231 const char line_comment_chars[] = "#"; 232 233 /* Characters which may be used to separate multiple commands on a 234 single line. */ 235 const char line_separator_chars[] = ";"; 236 237 /* Characters which are used to indicate an exponent in a floating 238 point number. */ 239 const char EXP_CHARS[] = "eE"; 240 241 /* Characters which mean that a number is a floating point constant, 242 as in 0d1.0. */ 243 /* XXX: Do all of these really get used on the alpha?? */ 244 const char FLT_CHARS[] = "rRsSfFdDxXpP"; 245 246 #ifdef OBJ_EVAX 247 const char *md_shortopts = "Fm:g+1h:HG:"; 248 #else 249 const char *md_shortopts = "Fm:gG:"; 250 #endif 251 252 struct option md_longopts[] = 253 { 254 #define OPTION_32ADDR (OPTION_MD_BASE) 255 { "32addr", no_argument, NULL, OPTION_32ADDR }, 256 #define OPTION_RELAX (OPTION_32ADDR + 1) 257 { "relax", no_argument, NULL, OPTION_RELAX }, 258 #ifdef OBJ_ELF 259 #define OPTION_MDEBUG (OPTION_RELAX + 1) 260 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1) 261 { "mdebug", no_argument, NULL, OPTION_MDEBUG }, 262 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG }, 263 #endif 264 #ifdef OBJ_EVAX 265 #define OPTION_REPLACE (OPTION_RELAX + 1) 266 #define OPTION_NOREPLACE (OPTION_REPLACE+1) 267 { "replace", no_argument, NULL, OPTION_REPLACE }, 268 { "noreplace", no_argument, NULL, OPTION_NOREPLACE }, 269 #endif 270 { NULL, no_argument, NULL, 0 } 271 }; 272 273 size_t md_longopts_size = sizeof (md_longopts); 274 275 #ifdef OBJ_EVAX 276 #define AXP_REG_R0 0 277 #define AXP_REG_R16 16 278 #define AXP_REG_R17 17 279 #undef AXP_REG_T9 280 #define AXP_REG_T9 22 281 #undef AXP_REG_T10 282 #define AXP_REG_T10 23 283 #undef AXP_REG_T11 284 #define AXP_REG_T11 24 285 #undef AXP_REG_T12 286 #define AXP_REG_T12 25 287 #define AXP_REG_AI 25 288 #undef AXP_REG_FP 289 #define AXP_REG_FP 29 290 291 #undef AXP_REG_GP 292 #define AXP_REG_GP AXP_REG_PV 293 294 #endif /* OBJ_EVAX */ 295 296 /* The cpu for which we are generating code. */ 297 static unsigned alpha_target = AXP_OPCODE_BASE; 298 static const char *alpha_target_name = "<all>"; 299 300 /* The hash table of instruction opcodes. */ 301 static struct hash_control *alpha_opcode_hash; 302 303 /* The hash table of macro opcodes. */ 304 static struct hash_control *alpha_macro_hash; 305 306 #ifdef OBJ_ECOFF 307 /* The $gp relocation symbol. */ 308 static symbolS *alpha_gp_symbol; 309 310 /* XXX: what is this, and why is it exported? */ 311 valueT alpha_gp_value; 312 #endif 313 314 /* The current $gp register. */ 315 static int alpha_gp_register = AXP_REG_GP; 316 317 /* A table of the register symbols. */ 318 static symbolS *alpha_register_table[64]; 319 320 /* Constant sections, or sections of constants. */ 321 #ifdef OBJ_ECOFF 322 static segT alpha_lita_section; 323 #endif 324 #ifdef OBJ_EVAX 325 segT alpha_link_section; 326 #endif 327 #ifndef OBJ_EVAX 328 static segT alpha_lit8_section; 329 #endif 330 331 /* Symbols referring to said sections. */ 332 #ifdef OBJ_ECOFF 333 static symbolS *alpha_lita_symbol; 334 #endif 335 #ifdef OBJ_EVAX 336 static symbolS *alpha_link_symbol; 337 #endif 338 #ifndef OBJ_EVAX 339 static symbolS *alpha_lit8_symbol; 340 #endif 341 342 /* Literal for .litX+0x8000 within .lita. */ 343 #ifdef OBJ_ECOFF 344 static offsetT alpha_lit8_literal; 345 #endif 346 347 /* Is the assembler not allowed to use $at? */ 348 static int alpha_noat_on = 0; 349 350 /* Are macros enabled? */ 351 static int alpha_macros_on = 1; 352 353 /* Are floats disabled? */ 354 static int alpha_nofloats_on = 0; 355 356 /* Are addresses 32 bit? */ 357 static int alpha_addr32_on = 0; 358 359 /* Symbol labelling the current insn. When the Alpha gas sees 360 foo: 361 .quad 0 362 and the section happens to not be on an eight byte boundary, it 363 will align both the symbol and the .quad to an eight byte boundary. */ 364 static symbolS *alpha_insn_label; 365 #if defined(OBJ_ELF) || defined (OBJ_EVAX) 366 static symbolS *alpha_prologue_label; 367 #endif 368 369 #ifdef OBJ_EVAX 370 /* Symbol associate with the current jsr instruction. */ 371 static symbolS *alpha_linkage_symbol; 372 #endif 373 374 /* Whether we should automatically align data generation pseudo-ops. 375 .align 0 will turn this off. */ 376 static int alpha_auto_align_on = 1; 377 378 /* The known current alignment of the current section. */ 379 static int alpha_current_align; 380 381 /* These are exported to ECOFF code. */ 382 unsigned long alpha_gprmask, alpha_fprmask; 383 384 /* Whether the debugging option was seen. */ 385 static int alpha_debug; 386 387 #ifdef OBJ_ELF 388 /* Whether we are emitting an mdebug section. */ 389 int alpha_flag_mdebug = -1; 390 #endif 391 392 #ifdef OBJ_EVAX 393 /* Whether to perform the VMS procedure call optimization. */ 394 int alpha_flag_replace = 1; 395 #endif 396 397 /* Don't fully resolve relocations, allowing code movement in the linker. */ 398 static int alpha_flag_relax; 399 400 /* What value to give to bfd_set_gp_size. */ 401 static int g_switch_value = 8; 402 403 #ifdef OBJ_EVAX 404 /* Collect information about current procedure here. */ 405 struct alpha_evax_procs 406 { 407 symbolS *symbol; /* Proc pdesc symbol. */ 408 int pdsckind; 409 int framereg; /* Register for frame pointer. */ 410 int framesize; /* Size of frame. */ 411 int rsa_offset; 412 int ra_save; 413 int fp_save; 414 long imask; 415 long fmask; 416 int type; 417 int prologue; 418 symbolS *handler; 419 int handler_data; 420 }; 421 422 /* Linked list of .linkage fixups. */ 423 struct alpha_linkage_fixups *alpha_linkage_fixup_root; 424 static struct alpha_linkage_fixups *alpha_linkage_fixup_tail; 425 426 /* Current procedure descriptor. */ 427 static struct alpha_evax_procs *alpha_evax_proc; 428 static struct alpha_evax_procs alpha_evax_proc_data; 429 430 static int alpha_flag_hash_long_names = 0; /* -+ */ 431 static int alpha_flag_show_after_trunc = 0; /* -H */ 432 433 /* If the -+ switch is given, then a hash is appended to any name that is 434 longer than 64 characters, else longer symbol names are truncated. */ 435 436 #endif 437 438 #ifdef RELOC_OP_P 439 /* A table to map the spelling of a relocation operand into an appropriate 440 bfd_reloc_code_real_type type. The table is assumed to be ordered such 441 that op-O_literal indexes into it. */ 442 443 #define ALPHA_RELOC_TABLE(op) \ 444 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \ 445 ? (abort (), 0) \ 446 : (int) (op) - (int) O_literal) ]) 447 448 #define DEF(NAME, RELOC, REQ, ALLOW) \ 449 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW} 450 451 static const struct alpha_reloc_op_tag 452 { 453 const char *name; /* String to lookup. */ 454 size_t length; /* Size of the string. */ 455 operatorT op; /* Which operator to use. */ 456 extended_bfd_reloc_code_real_type reloc; 457 unsigned int require_seq : 1; /* Require a sequence number. */ 458 unsigned int allow_seq : 1; /* Allow a sequence number. */ 459 } 460 alpha_reloc_op[] = 461 { 462 DEF (literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1), 463 DEF (lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1), 464 DEF (lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1), 465 DEF (lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1), 466 DEF (lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1), 467 DEF (lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1), 468 DEF (lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1), 469 DEF (lituse_jsrdirect, DUMMY_RELOC_LITUSE_JSRDIRECT, 1, 1), 470 DEF (gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1), 471 DEF (gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0), 472 DEF (gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0), 473 DEF (gprel, BFD_RELOC_GPREL16, 0, 0), 474 DEF (samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0), 475 DEF (tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1), 476 DEF (tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1), 477 DEF (gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0), 478 DEF (dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0), 479 DEF (dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0), 480 DEF (dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0), 481 DEF (gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0), 482 DEF (tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0), 483 DEF (tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0), 484 DEF (tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0), 485 }; 486 487 #undef DEF 488 489 static const int alpha_num_reloc_op 490 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op); 491 #endif /* RELOC_OP_P */ 492 493 /* Maximum # digits needed to hold the largest sequence #. */ 494 #define ALPHA_RELOC_DIGITS 25 495 496 /* Structure to hold explicit sequence information. */ 497 struct alpha_reloc_tag 498 { 499 fixS *master; /* The literal reloc. */ 500 #ifdef OBJ_EVAX 501 struct symbol *sym; /* Linkage section item symbol. */ 502 struct symbol *psym; /* Pdesc symbol. */ 503 #endif 504 fixS *slaves; /* Head of linked list of lituses. */ 505 segT segment; /* Segment relocs are in or undefined_section. */ 506 long sequence; /* Sequence #. */ 507 unsigned n_master; /* # of literals. */ 508 unsigned n_slaves; /* # of lituses. */ 509 unsigned saw_tlsgd : 1; /* True if ... */ 510 unsigned saw_tlsldm : 1; 511 unsigned saw_lu_tlsgd : 1; 512 unsigned saw_lu_tlsldm : 1; 513 unsigned multi_section_p : 1; /* True if more than one section was used. */ 514 char string[1]; /* Printable form of sequence to hash with. */ 515 }; 516 517 /* Hash table to link up literals with the appropriate lituse. */ 518 static struct hash_control *alpha_literal_hash; 519 520 /* Sequence numbers for internal use by macros. */ 521 static long next_sequence_num = -1; 522 523 /* A table of CPU names and opcode sets. */ 524 525 static const struct cpu_type 526 { 527 const char *name; 528 unsigned flags; 529 } 530 cpu_types[] = 531 { 532 /* Ad hoc convention: cpu number gets palcode, process code doesn't. 533 This supports usage under DU 4.0b that does ".arch ev4", and 534 usage in MILO that does -m21064. Probably something more 535 specific like -m21064-pal should be used, but oh well. */ 536 537 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 538 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 539 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 540 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 }, 541 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 }, 542 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX }, 543 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX 544 |AXP_OPCODE_MAX) }, 545 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 546 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 547 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 548 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 549 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX 550 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) }, 551 552 { "ev4", AXP_OPCODE_BASE }, 553 { "ev45", AXP_OPCODE_BASE }, 554 { "lca45", AXP_OPCODE_BASE }, 555 { "ev5", AXP_OPCODE_BASE }, 556 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX }, 557 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX }, 558 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 559 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 560 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX }, 561 562 { "all", AXP_OPCODE_BASE }, 563 { 0, 0 } 564 }; 565 566 /* Some instruction sets indexed by lg(size). */ 567 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL }; 568 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" }; 569 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" }; 570 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" }; 571 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" }; 572 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" }; 573 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" }; 574 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" }; 575 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL }; 576 577 static void assemble_insn (const struct alpha_opcode *, const expressionS *, int, struct alpha_insn *, extended_bfd_reloc_code_real_type); 578 static void emit_insn (struct alpha_insn *); 579 static void assemble_tokens (const char *, const expressionS *, int, int); 580 #ifdef OBJ_EVAX 581 static const char *s_alpha_section_name (void); 582 static symbolS *add_to_link_pool (symbolS *, offsetT); 583 #endif 584 585 static struct alpha_reloc_tag * 586 get_alpha_reloc_tag (long sequence) 587 { 588 char buffer[ALPHA_RELOC_DIGITS]; 589 struct alpha_reloc_tag *info; 590 591 sprintf (buffer, "!%ld", sequence); 592 593 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer); 594 if (! info) 595 { 596 size_t len = strlen (buffer); 597 const char *errmsg; 598 599 info = (struct alpha_reloc_tag *) 600 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1); 601 602 info->segment = now_seg; 603 info->sequence = sequence; 604 strcpy (info->string, buffer); 605 errmsg = hash_insert (alpha_literal_hash, info->string, (void *) info); 606 if (errmsg) 607 as_fatal ("%s", errmsg); 608 #ifdef OBJ_EVAX 609 info->sym = 0; 610 info->psym = 0; 611 #endif 612 } 613 614 return info; 615 } 616 617 #ifndef OBJ_EVAX 618 619 static void 620 alpha_adjust_relocs (bfd *abfd ATTRIBUTE_UNUSED, 621 asection *sec, 622 void * ptr ATTRIBUTE_UNUSED) 623 { 624 segment_info_type *seginfo = seg_info (sec); 625 fixS **prevP; 626 fixS *fixp; 627 fixS *next; 628 fixS *slave; 629 630 /* If seginfo is NULL, we did not create this section; don't do 631 anything with it. By using a pointer to a pointer, we can update 632 the links in place. */ 633 if (seginfo == NULL) 634 return; 635 636 /* If there are no relocations, skip the section. */ 637 if (! seginfo->fix_root) 638 return; 639 640 /* First rebuild the fixup chain without the explicit lituse and 641 gpdisp_lo16 relocs. */ 642 prevP = &seginfo->fix_root; 643 for (fixp = seginfo->fix_root; fixp; fixp = next) 644 { 645 next = fixp->fx_next; 646 fixp->fx_next = (fixS *) 0; 647 648 switch (fixp->fx_r_type) 649 { 650 case BFD_RELOC_ALPHA_LITUSE: 651 if (fixp->tc_fix_data.info->n_master == 0) 652 as_bad_where (fixp->fx_file, fixp->fx_line, 653 _("No !literal!%ld was found"), 654 fixp->tc_fix_data.info->sequence); 655 #ifdef RELOC_OP_P 656 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD) 657 { 658 if (! fixp->tc_fix_data.info->saw_tlsgd) 659 as_bad_where (fixp->fx_file, fixp->fx_line, 660 _("No !tlsgd!%ld was found"), 661 fixp->tc_fix_data.info->sequence); 662 } 663 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM) 664 { 665 if (! fixp->tc_fix_data.info->saw_tlsldm) 666 as_bad_where (fixp->fx_file, fixp->fx_line, 667 _("No !tlsldm!%ld was found"), 668 fixp->tc_fix_data.info->sequence); 669 } 670 #endif 671 break; 672 673 case BFD_RELOC_ALPHA_GPDISP_LO16: 674 if (fixp->tc_fix_data.info->n_master == 0) 675 as_bad_where (fixp->fx_file, fixp->fx_line, 676 _("No ldah !gpdisp!%ld was found"), 677 fixp->tc_fix_data.info->sequence); 678 break; 679 680 case BFD_RELOC_ALPHA_ELF_LITERAL: 681 if (fixp->tc_fix_data.info 682 && (fixp->tc_fix_data.info->saw_tlsgd 683 || fixp->tc_fix_data.info->saw_tlsldm)) 684 break; 685 /* FALLTHRU */ 686 687 default: 688 *prevP = fixp; 689 prevP = &fixp->fx_next; 690 break; 691 } 692 } 693 694 /* Go back and re-chain dependent relocations. They are currently 695 linked through the next_reloc field in reverse order, so as we 696 go through the next_reloc chain, we effectively reverse the chain 697 once again. 698 699 Except if there is more than one !literal for a given sequence 700 number. In that case, the programmer and/or compiler is not sure 701 how control flows from literal to lituse, and we can't be sure to 702 get the relaxation correct. 703 704 ??? Well, actually we could, if there are enough lituses such that 705 we can make each literal have at least one of each lituse type 706 present. Not implemented. 707 708 Also suppress the optimization if the !literals/!lituses are spread 709 in different segments. This can happen with "interesting" uses of 710 inline assembly; examples are present in the Linux kernel semaphores. */ 711 712 for (fixp = seginfo->fix_root; fixp; fixp = next) 713 { 714 next = fixp->fx_next; 715 switch (fixp->fx_r_type) 716 { 717 case BFD_RELOC_ALPHA_TLSGD: 718 case BFD_RELOC_ALPHA_TLSLDM: 719 if (!fixp->tc_fix_data.info) 720 break; 721 if (fixp->tc_fix_data.info->n_master == 0) 722 break; 723 else if (fixp->tc_fix_data.info->n_master > 1) 724 { 725 as_bad_where (fixp->fx_file, fixp->fx_line, 726 _("too many !literal!%ld for %s"), 727 fixp->tc_fix_data.info->sequence, 728 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD 729 ? "!tlsgd" : "!tlsldm")); 730 break; 731 } 732 733 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next; 734 fixp->fx_next = fixp->tc_fix_data.info->master; 735 fixp = fixp->fx_next; 736 /* Fall through. */ 737 738 case BFD_RELOC_ALPHA_ELF_LITERAL: 739 if (fixp->tc_fix_data.info 740 && fixp->tc_fix_data.info->n_master == 1 741 && ! fixp->tc_fix_data.info->multi_section_p) 742 { 743 for (slave = fixp->tc_fix_data.info->slaves; 744 slave != (fixS *) 0; 745 slave = slave->tc_fix_data.next_reloc) 746 { 747 slave->fx_next = fixp->fx_next; 748 fixp->fx_next = slave; 749 } 750 } 751 break; 752 753 case BFD_RELOC_ALPHA_GPDISP_HI16: 754 if (fixp->tc_fix_data.info->n_slaves == 0) 755 as_bad_where (fixp->fx_file, fixp->fx_line, 756 _("No lda !gpdisp!%ld was found"), 757 fixp->tc_fix_data.info->sequence); 758 else 759 { 760 slave = fixp->tc_fix_data.info->slaves; 761 slave->fx_next = next; 762 fixp->fx_next = slave; 763 } 764 break; 765 766 default: 767 break; 768 } 769 } 770 } 771 772 /* Before the relocations are written, reorder them, so that user 773 supplied !lituse relocations follow the appropriate !literal 774 relocations, and similarly for !gpdisp relocations. */ 775 776 void 777 alpha_before_fix (void) 778 { 779 if (alpha_literal_hash) 780 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL); 781 } 782 783 #endif 784 785 #ifdef DEBUG_ALPHA 786 static void 787 debug_exp (expressionS tok[], int ntok) 788 { 789 int i; 790 791 fprintf (stderr, "debug_exp: %d tokens", ntok); 792 for (i = 0; i < ntok; i++) 793 { 794 expressionS *t = &tok[i]; 795 const char *name; 796 797 switch (t->X_op) 798 { 799 default: name = "unknown"; break; 800 case O_illegal: name = "O_illegal"; break; 801 case O_absent: name = "O_absent"; break; 802 case O_constant: name = "O_constant"; break; 803 case O_symbol: name = "O_symbol"; break; 804 case O_symbol_rva: name = "O_symbol_rva"; break; 805 case O_register: name = "O_register"; break; 806 case O_big: name = "O_big"; break; 807 case O_uminus: name = "O_uminus"; break; 808 case O_bit_not: name = "O_bit_not"; break; 809 case O_logical_not: name = "O_logical_not"; break; 810 case O_multiply: name = "O_multiply"; break; 811 case O_divide: name = "O_divide"; break; 812 case O_modulus: name = "O_modulus"; break; 813 case O_left_shift: name = "O_left_shift"; break; 814 case O_right_shift: name = "O_right_shift"; break; 815 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break; 816 case O_bit_or_not: name = "O_bit_or_not"; break; 817 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break; 818 case O_bit_and: name = "O_bit_and"; break; 819 case O_add: name = "O_add"; break; 820 case O_subtract: name = "O_subtract"; break; 821 case O_eq: name = "O_eq"; break; 822 case O_ne: name = "O_ne"; break; 823 case O_lt: name = "O_lt"; break; 824 case O_le: name = "O_le"; break; 825 case O_ge: name = "O_ge"; break; 826 case O_gt: name = "O_gt"; break; 827 case O_logical_and: name = "O_logical_and"; break; 828 case O_logical_or: name = "O_logical_or"; break; 829 case O_index: name = "O_index"; break; 830 case O_pregister: name = "O_pregister"; break; 831 case O_cpregister: name = "O_cpregister"; break; 832 case O_literal: name = "O_literal"; break; 833 case O_lituse_addr: name = "O_lituse_addr"; break; 834 case O_lituse_base: name = "O_lituse_base"; break; 835 case O_lituse_bytoff: name = "O_lituse_bytoff"; break; 836 case O_lituse_jsr: name = "O_lituse_jsr"; break; 837 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break; 838 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break; 839 case O_lituse_jsrdirect: name = "O_lituse_jsrdirect"; break; 840 case O_gpdisp: name = "O_gpdisp"; break; 841 case O_gprelhigh: name = "O_gprelhigh"; break; 842 case O_gprellow: name = "O_gprellow"; break; 843 case O_gprel: name = "O_gprel"; break; 844 case O_samegp: name = "O_samegp"; break; 845 case O_tlsgd: name = "O_tlsgd"; break; 846 case O_tlsldm: name = "O_tlsldm"; break; 847 case O_gotdtprel: name = "O_gotdtprel"; break; 848 case O_dtprelhi: name = "O_dtprelhi"; break; 849 case O_dtprello: name = "O_dtprello"; break; 850 case O_dtprel: name = "O_dtprel"; break; 851 case O_gottprel: name = "O_gottprel"; break; 852 case O_tprelhi: name = "O_tprelhi"; break; 853 case O_tprello: name = "O_tprello"; break; 854 case O_tprel: name = "O_tprel"; break; 855 } 856 857 fprintf (stderr, ", %s(%s, %s, %d)", name, 858 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--", 859 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--", 860 (int) t->X_add_number); 861 } 862 fprintf (stderr, "\n"); 863 fflush (stderr); 864 } 865 #endif 866 867 /* Parse the arguments to an opcode. */ 868 869 static int 870 tokenize_arguments (char *str, 871 expressionS tok[], 872 int ntok) 873 { 874 expressionS *end_tok = tok + ntok; 875 char *old_input_line_pointer; 876 int saw_comma = 0, saw_arg = 0; 877 #ifdef DEBUG_ALPHA 878 expressionS *orig_tok = tok; 879 #endif 880 #ifdef RELOC_OP_P 881 char *p; 882 const struct alpha_reloc_op_tag *r; 883 int c, i; 884 size_t len; 885 int reloc_found_p = 0; 886 #endif 887 888 memset (tok, 0, sizeof (*tok) * ntok); 889 890 /* Save and restore input_line_pointer around this function. */ 891 old_input_line_pointer = input_line_pointer; 892 input_line_pointer = str; 893 894 #ifdef RELOC_OP_P 895 /* ??? Wrest control of ! away from the regular expression parser. */ 896 is_end_of_line[(unsigned char) '!'] = 1; 897 #endif 898 899 while (tok < end_tok && *input_line_pointer) 900 { 901 SKIP_WHITESPACE (); 902 switch (*input_line_pointer) 903 { 904 case '\0': 905 goto fini; 906 907 #ifdef RELOC_OP_P 908 case '!': 909 /* A relocation operand can be placed after the normal operand on an 910 assembly language statement, and has the following form: 911 !relocation_type!sequence_number. */ 912 if (reloc_found_p) 913 { 914 /* Only support one relocation op per insn. */ 915 as_bad (_("More than one relocation op per insn")); 916 goto err_report; 917 } 918 919 if (!saw_arg) 920 goto err; 921 922 ++input_line_pointer; 923 SKIP_WHITESPACE (); 924 c = get_symbol_name (&p); 925 926 /* Parse !relocation_type. */ 927 len = input_line_pointer - p; 928 if (len == 0) 929 { 930 as_bad (_("No relocation operand")); 931 goto err_report; 932 } 933 934 r = &alpha_reloc_op[0]; 935 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++) 936 if (len == r->length && memcmp (p, r->name, len) == 0) 937 break; 938 if (i < 0) 939 { 940 as_bad (_("Unknown relocation operand: !%s"), p); 941 goto err_report; 942 } 943 944 *input_line_pointer = c; 945 SKIP_WHITESPACE_AFTER_NAME (); 946 if (*input_line_pointer != '!') 947 { 948 if (r->require_seq) 949 { 950 as_bad (_("no sequence number after !%s"), p); 951 goto err_report; 952 } 953 954 tok->X_add_number = 0; 955 } 956 else 957 { 958 if (! r->allow_seq) 959 { 960 as_bad (_("!%s does not use a sequence number"), p); 961 goto err_report; 962 } 963 964 input_line_pointer++; 965 966 /* Parse !sequence_number. */ 967 expression (tok); 968 if (tok->X_op != O_constant || tok->X_add_number <= 0) 969 { 970 as_bad (_("Bad sequence number: !%s!%s"), 971 r->name, input_line_pointer); 972 goto err_report; 973 } 974 } 975 976 tok->X_op = r->op; 977 reloc_found_p = 1; 978 ++tok; 979 break; 980 #endif /* RELOC_OP_P */ 981 982 case ',': 983 ++input_line_pointer; 984 if (saw_comma || !saw_arg) 985 goto err; 986 saw_comma = 1; 987 break; 988 989 case '(': 990 { 991 char *hold = input_line_pointer++; 992 993 /* First try for parenthesized register ... */ 994 expression (tok); 995 if (*input_line_pointer == ')' && tok->X_op == O_register) 996 { 997 tok->X_op = (saw_comma ? O_cpregister : O_pregister); 998 saw_comma = 0; 999 saw_arg = 1; 1000 ++input_line_pointer; 1001 ++tok; 1002 break; 1003 } 1004 1005 /* ... then fall through to plain expression. */ 1006 input_line_pointer = hold; 1007 } 1008 /* Fall through. */ 1009 1010 default: 1011 if (saw_arg && !saw_comma) 1012 goto err; 1013 1014 expression (tok); 1015 if (tok->X_op == O_illegal || tok->X_op == O_absent) 1016 goto err; 1017 1018 saw_comma = 0; 1019 saw_arg = 1; 1020 ++tok; 1021 break; 1022 } 1023 } 1024 1025 fini: 1026 if (saw_comma) 1027 goto err; 1028 input_line_pointer = old_input_line_pointer; 1029 1030 #ifdef DEBUG_ALPHA 1031 debug_exp (orig_tok, ntok - (end_tok - tok)); 1032 #endif 1033 #ifdef RELOC_OP_P 1034 is_end_of_line[(unsigned char) '!'] = 0; 1035 #endif 1036 1037 return ntok - (end_tok - tok); 1038 1039 err: 1040 #ifdef RELOC_OP_P 1041 is_end_of_line[(unsigned char) '!'] = 0; 1042 #endif 1043 input_line_pointer = old_input_line_pointer; 1044 return TOKENIZE_ERROR; 1045 1046 #ifdef RELOC_OP_P 1047 err_report: 1048 is_end_of_line[(unsigned char) '!'] = 0; 1049 #endif 1050 input_line_pointer = old_input_line_pointer; 1051 return TOKENIZE_ERROR_REPORT; 1052 } 1053 1054 /* Search forward through all variants of an opcode looking for a 1055 syntax match. */ 1056 1057 static const struct alpha_opcode * 1058 find_opcode_match (const struct alpha_opcode *first_opcode, 1059 const expressionS *tok, 1060 int *pntok, 1061 int *pcpumatch) 1062 { 1063 const struct alpha_opcode *opcode = first_opcode; 1064 int ntok = *pntok; 1065 int got_cpu_match = 0; 1066 1067 do 1068 { 1069 const unsigned char *opidx; 1070 int tokidx = 0; 1071 1072 /* Don't match opcodes that don't exist on this architecture. */ 1073 if (!(opcode->flags & alpha_target)) 1074 goto match_failed; 1075 1076 got_cpu_match = 1; 1077 1078 for (opidx = opcode->operands; *opidx; ++opidx) 1079 { 1080 const struct alpha_operand *operand = &alpha_operands[*opidx]; 1081 1082 /* Only take input from real operands. */ 1083 if (operand->flags & AXP_OPERAND_FAKE) 1084 continue; 1085 1086 /* When we expect input, make sure we have it. */ 1087 if (tokidx >= ntok) 1088 { 1089 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0) 1090 goto match_failed; 1091 continue; 1092 } 1093 1094 /* Match operand type with expression type. */ 1095 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK) 1096 { 1097 case AXP_OPERAND_IR: 1098 if (tok[tokidx].X_op != O_register 1099 || !is_ir_num (tok[tokidx].X_add_number)) 1100 goto match_failed; 1101 break; 1102 case AXP_OPERAND_FPR: 1103 if (tok[tokidx].X_op != O_register 1104 || !is_fpr_num (tok[tokidx].X_add_number)) 1105 goto match_failed; 1106 break; 1107 case AXP_OPERAND_IR | AXP_OPERAND_PARENS: 1108 if (tok[tokidx].X_op != O_pregister 1109 || !is_ir_num (tok[tokidx].X_add_number)) 1110 goto match_failed; 1111 break; 1112 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA: 1113 if (tok[tokidx].X_op != O_cpregister 1114 || !is_ir_num (tok[tokidx].X_add_number)) 1115 goto match_failed; 1116 break; 1117 1118 case AXP_OPERAND_RELATIVE: 1119 case AXP_OPERAND_SIGNED: 1120 case AXP_OPERAND_UNSIGNED: 1121 switch (tok[tokidx].X_op) 1122 { 1123 case O_illegal: 1124 case O_absent: 1125 case O_register: 1126 case O_pregister: 1127 case O_cpregister: 1128 goto match_failed; 1129 1130 default: 1131 break; 1132 } 1133 break; 1134 1135 default: 1136 /* Everything else should have been fake. */ 1137 abort (); 1138 } 1139 ++tokidx; 1140 } 1141 1142 /* Possible match -- did we use all of our input? */ 1143 if (tokidx == ntok) 1144 { 1145 *pntok = ntok; 1146 return opcode; 1147 } 1148 1149 match_failed:; 1150 } 1151 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes 1152 && !strcmp (opcode->name, first_opcode->name)); 1153 1154 if (*pcpumatch) 1155 *pcpumatch = got_cpu_match; 1156 1157 return NULL; 1158 } 1159 1160 /* Given an opcode name and a pre-tokenized set of arguments, assemble 1161 the insn, but do not emit it. 1162 1163 Note that this implies no macros allowed, since we can't store more 1164 than one insn in an insn structure. */ 1165 1166 static void 1167 assemble_tokens_to_insn (const char *opname, 1168 const expressionS *tok, 1169 int ntok, 1170 struct alpha_insn *insn) 1171 { 1172 const struct alpha_opcode *opcode; 1173 1174 /* Search opcodes. */ 1175 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); 1176 if (opcode) 1177 { 1178 int cpumatch; 1179 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); 1180 if (opcode) 1181 { 1182 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED); 1183 return; 1184 } 1185 else if (cpumatch) 1186 as_bad (_("inappropriate arguments for opcode `%s'"), opname); 1187 else 1188 as_bad (_("opcode `%s' not supported for target %s"), opname, 1189 alpha_target_name); 1190 } 1191 else 1192 as_bad (_("unknown opcode `%s'"), opname); 1193 } 1194 1195 /* Build a BFD section with its flags set appropriately for the .lita, 1196 .lit8, or .lit4 sections. */ 1197 1198 static void 1199 create_literal_section (const char *name, 1200 segT *secp, 1201 symbolS **symp) 1202 { 1203 segT current_section = now_seg; 1204 int current_subsec = now_subseg; 1205 segT new_sec; 1206 1207 *secp = new_sec = subseg_new (name, 0); 1208 subseg_set (current_section, current_subsec); 1209 bfd_set_section_alignment (stdoutput, new_sec, 4); 1210 bfd_set_section_flags (stdoutput, new_sec, 1211 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY 1212 | SEC_DATA); 1213 1214 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec)); 1215 } 1216 1217 /* Load a (partial) expression into a target register. 1218 1219 If poffset is not null, after the call it will either contain 1220 O_constant 0, or a 16-bit offset appropriate for any MEM format 1221 instruction. In addition, pbasereg will be modified to point to 1222 the base register to use in that MEM format instruction. 1223 1224 In any case, *pbasereg should contain a base register to add to the 1225 expression. This will normally be either AXP_REG_ZERO or 1226 alpha_gp_register. Symbol addresses will always be loaded via $gp, 1227 so "foo($0)" is interpreted as adding the address of foo to $0; 1228 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps, 1229 but this is what OSF/1 does. 1230 1231 If explicit relocations of the form !literal!<number> are allowed, 1232 and used, then explicit_reloc with be an expression pointer. 1233 1234 Finally, the return value is nonzero if the calling macro may emit 1235 a LITUSE reloc if otherwise appropriate; the return value is the 1236 sequence number to use. */ 1237 1238 static long 1239 load_expression (int targreg, 1240 const expressionS *exp, 1241 int *pbasereg, 1242 expressionS *poffset, 1243 const char *opname) 1244 { 1245 long emit_lituse = 0; 1246 offsetT addend = exp->X_add_number; 1247 int basereg = *pbasereg; 1248 struct alpha_insn insn; 1249 expressionS newtok[3]; 1250 1251 switch (exp->X_op) 1252 { 1253 case O_symbol: 1254 { 1255 #ifdef OBJ_ECOFF 1256 offsetT lit; 1257 1258 /* Attempt to reduce .lit load by splitting the offset from 1259 its symbol when possible, but don't create a situation in 1260 which we'd fail. */ 1261 if (!range_signed_32 (addend) && 1262 (alpha_noat_on || targreg == AXP_REG_AT)) 1263 { 1264 lit = add_to_literal_pool (exp->X_add_symbol, addend, 1265 alpha_lita_section, 8); 1266 addend = 0; 1267 } 1268 else 1269 lit = add_to_literal_pool (exp->X_add_symbol, 0, 1270 alpha_lita_section, 8); 1271 1272 if (lit >= 0x8000) 1273 as_fatal (_("overflow in literal (.lita) table")); 1274 1275 /* Emit "ldq r, lit(gp)". */ 1276 1277 if (basereg != alpha_gp_register && targreg == basereg) 1278 { 1279 if (alpha_noat_on) 1280 as_bad (_("macro requires $at register while noat in effect")); 1281 if (targreg == AXP_REG_AT) 1282 as_bad (_("macro requires $at while $at in use")); 1283 1284 set_tok_reg (newtok[0], AXP_REG_AT); 1285 } 1286 else 1287 set_tok_reg (newtok[0], targreg); 1288 1289 set_tok_sym (newtok[1], alpha_lita_symbol, lit); 1290 set_tok_preg (newtok[2], alpha_gp_register); 1291 1292 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1293 1294 gas_assert (insn.nfixups == 1); 1295 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; 1296 insn.sequence = emit_lituse = next_sequence_num--; 1297 #endif /* OBJ_ECOFF */ 1298 #ifdef OBJ_ELF 1299 /* Emit "ldq r, gotoff(gp)". */ 1300 1301 if (basereg != alpha_gp_register && targreg == basereg) 1302 { 1303 if (alpha_noat_on) 1304 as_bad (_("macro requires $at register while noat in effect")); 1305 if (targreg == AXP_REG_AT) 1306 as_bad (_("macro requires $at while $at in use")); 1307 1308 set_tok_reg (newtok[0], AXP_REG_AT); 1309 } 1310 else 1311 set_tok_reg (newtok[0], targreg); 1312 1313 /* XXX: Disable this .got minimizing optimization so that we can get 1314 better instruction offset knowledge in the compiler. This happens 1315 very infrequently anyway. */ 1316 if (1 1317 || (!range_signed_32 (addend) 1318 && (alpha_noat_on || targreg == AXP_REG_AT))) 1319 { 1320 newtok[1] = *exp; 1321 addend = 0; 1322 } 1323 else 1324 set_tok_sym (newtok[1], exp->X_add_symbol, 0); 1325 1326 set_tok_preg (newtok[2], alpha_gp_register); 1327 1328 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1329 1330 gas_assert (insn.nfixups == 1); 1331 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; 1332 insn.sequence = emit_lituse = next_sequence_num--; 1333 #endif /* OBJ_ELF */ 1334 #ifdef OBJ_EVAX 1335 /* Find symbol or symbol pointer in link section. */ 1336 1337 if (exp->X_add_symbol == alpha_evax_proc->symbol) 1338 { 1339 /* Linkage-relative expression. */ 1340 set_tok_reg (newtok[0], targreg); 1341 1342 if (range_signed_16 (addend)) 1343 { 1344 set_tok_const (newtok[1], addend); 1345 addend = 0; 1346 } 1347 else 1348 { 1349 set_tok_const (newtok[1], 0); 1350 } 1351 set_tok_preg (newtok[2], basereg); 1352 assemble_tokens_to_insn ("lda", newtok, 3, &insn); 1353 } 1354 else 1355 { 1356 const char *symname = S_GET_NAME (exp->X_add_symbol); 1357 const char *ptr1, *ptr2; 1358 int symlen = strlen (symname); 1359 1360 if ((symlen > 4 && 1361 strcmp (ptr2 = &symname [symlen - 4], "..lk") == 0)) 1362 { 1363 /* Access to an item whose address is stored in the linkage 1364 section. Just read the address. */ 1365 set_tok_reg (newtok[0], targreg); 1366 1367 newtok[1] = *exp; 1368 newtok[1].X_op = O_subtract; 1369 newtok[1].X_op_symbol = alpha_evax_proc->symbol; 1370 1371 set_tok_preg (newtok[2], basereg); 1372 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1373 alpha_linkage_symbol = exp->X_add_symbol; 1374 1375 if (poffset) 1376 set_tok_const (*poffset, 0); 1377 1378 if (alpha_flag_replace && targreg == 26) 1379 { 1380 /* Add a NOP fixup for 'ldX $26,YYY..NAME..lk'. */ 1381 char *ensymname; 1382 symbolS *ensym; 1383 1384 /* Build the entry name as 'NAME..en'. */ 1385 ptr1 = strstr (symname, "..") + 2; 1386 if (ptr1 > ptr2) 1387 ptr1 = symname; 1388 ensymname = XNEWVEC (char, ptr2 - ptr1 + 5); 1389 memcpy (ensymname, ptr1, ptr2 - ptr1); 1390 memcpy (ensymname + (ptr2 - ptr1), "..en", 5); 1391 1392 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); 1393 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_NOP; 1394 ensym = symbol_find_or_make (ensymname); 1395 free (ensymname); 1396 symbol_mark_used (ensym); 1397 /* The fixup must be the same as the BFD_RELOC_ALPHA_BOH 1398 case in emit_jsrjmp. See B.4.5.2 of the OpenVMS Linker 1399 Utility Manual. */ 1400 insn.fixups[insn.nfixups].exp.X_op = O_symbol; 1401 insn.fixups[insn.nfixups].exp.X_add_symbol = ensym; 1402 insn.fixups[insn.nfixups].exp.X_add_number = 0; 1403 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; 1404 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; 1405 insn.nfixups++; 1406 1407 /* ??? Force bsym to be instantiated now, as it will be 1408 too late to do so in tc_gen_reloc. */ 1409 symbol_get_bfdsym (exp->X_add_symbol); 1410 } 1411 else if (alpha_flag_replace && targreg == 27) 1412 { 1413 /* Add a lda fixup for 'ldX $27,YYY.NAME..lk+8'. */ 1414 char *psymname; 1415 symbolS *psym; 1416 1417 /* Extract NAME. */ 1418 ptr1 = strstr (symname, "..") + 2; 1419 if (ptr1 > ptr2) 1420 ptr1 = symname; 1421 psymname = xmemdup0 (ptr1, ptr2 - ptr1); 1422 1423 gas_assert (insn.nfixups + 1 <= MAX_INSN_FIXUPS); 1424 insn.fixups[insn.nfixups].reloc = BFD_RELOC_ALPHA_LDA; 1425 psym = symbol_find_or_make (psymname); 1426 free (psymname); 1427 symbol_mark_used (psym); 1428 insn.fixups[insn.nfixups].exp.X_op = O_subtract; 1429 insn.fixups[insn.nfixups].exp.X_add_symbol = psym; 1430 insn.fixups[insn.nfixups].exp.X_op_symbol = alpha_evax_proc->symbol; 1431 insn.fixups[insn.nfixups].exp.X_add_number = 0; 1432 insn.fixups[insn.nfixups].xtrasym = alpha_linkage_symbol; 1433 insn.fixups[insn.nfixups].procsym = alpha_evax_proc->symbol; 1434 insn.nfixups++; 1435 } 1436 1437 emit_insn (&insn); 1438 return 0; 1439 } 1440 else 1441 { 1442 /* Not in the linkage section. Put the value into the linkage 1443 section. */ 1444 symbolS *linkexp; 1445 1446 if (!range_signed_32 (addend)) 1447 addend = sign_extend_32 (addend); 1448 linkexp = add_to_link_pool (exp->X_add_symbol, 0); 1449 set_tok_reg (newtok[0], targreg); 1450 set_tok_sym (newtok[1], linkexp, 0); 1451 set_tok_preg (newtok[2], basereg); 1452 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1453 } 1454 } 1455 #endif /* OBJ_EVAX */ 1456 1457 emit_insn (&insn); 1458 1459 #ifndef OBJ_EVAX 1460 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO) 1461 { 1462 /* Emit "addq r, base, r". */ 1463 1464 set_tok_reg (newtok[1], basereg); 1465 set_tok_reg (newtok[2], targreg); 1466 assemble_tokens ("addq", newtok, 3, 0); 1467 } 1468 #endif 1469 basereg = targreg; 1470 } 1471 break; 1472 1473 case O_constant: 1474 break; 1475 1476 case O_subtract: 1477 /* Assume that this difference expression will be resolved to an 1478 absolute value and that that value will fit in 16 bits. */ 1479 1480 set_tok_reg (newtok[0], targreg); 1481 newtok[1] = *exp; 1482 set_tok_preg (newtok[2], basereg); 1483 assemble_tokens (opname, newtok, 3, 0); 1484 1485 if (poffset) 1486 set_tok_const (*poffset, 0); 1487 return 0; 1488 1489 case O_big: 1490 if (exp->X_add_number > 0) 1491 as_bad (_("bignum invalid; zero assumed")); 1492 else 1493 as_bad (_("floating point number invalid; zero assumed")); 1494 addend = 0; 1495 break; 1496 1497 default: 1498 as_bad (_("can't handle expression")); 1499 addend = 0; 1500 break; 1501 } 1502 1503 if (!range_signed_32 (addend)) 1504 { 1505 #ifdef OBJ_EVAX 1506 symbolS *litexp; 1507 #else 1508 offsetT lit; 1509 long seq_num = next_sequence_num--; 1510 #endif 1511 1512 /* For 64-bit addends, just put it in the literal pool. */ 1513 #ifdef OBJ_EVAX 1514 /* Emit "ldq targreg, lit(basereg)". */ 1515 litexp = add_to_link_pool (section_symbol (absolute_section), addend); 1516 set_tok_reg (newtok[0], targreg); 1517 set_tok_sym (newtok[1], litexp, 0); 1518 set_tok_preg (newtok[2], alpha_gp_register); 1519 assemble_tokens ("ldq", newtok, 3, 0); 1520 #else 1521 1522 if (alpha_lit8_section == NULL) 1523 { 1524 create_literal_section (".lit8", 1525 &alpha_lit8_section, 1526 &alpha_lit8_symbol); 1527 1528 #ifdef OBJ_ECOFF 1529 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000, 1530 alpha_lita_section, 8); 1531 if (alpha_lit8_literal >= 0x8000) 1532 as_fatal (_("overflow in literal (.lita) table")); 1533 #endif 1534 } 1535 1536 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000; 1537 if (lit >= 0x8000) 1538 as_fatal (_("overflow in literal (.lit8) table")); 1539 1540 /* Emit "lda litreg, .lit8+0x8000". */ 1541 1542 if (targreg == basereg) 1543 { 1544 if (alpha_noat_on) 1545 as_bad (_("macro requires $at register while noat in effect")); 1546 if (targreg == AXP_REG_AT) 1547 as_bad (_("macro requires $at while $at in use")); 1548 1549 set_tok_reg (newtok[0], AXP_REG_AT); 1550 } 1551 else 1552 set_tok_reg (newtok[0], targreg); 1553 #ifdef OBJ_ECOFF 1554 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal); 1555 #endif 1556 #ifdef OBJ_ELF 1557 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000); 1558 #endif 1559 set_tok_preg (newtok[2], alpha_gp_register); 1560 1561 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1562 1563 gas_assert (insn.nfixups == 1); 1564 #ifdef OBJ_ECOFF 1565 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL; 1566 #endif 1567 #ifdef OBJ_ELF 1568 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL; 1569 #endif 1570 insn.sequence = seq_num; 1571 1572 emit_insn (&insn); 1573 1574 /* Emit "ldq litreg, lit(litreg)". */ 1575 1576 set_tok_const (newtok[1], lit); 1577 set_tok_preg (newtok[2], newtok[0].X_add_number); 1578 1579 assemble_tokens_to_insn ("ldq", newtok, 3, &insn); 1580 1581 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 1582 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 1583 insn.fixups[insn.nfixups].exp.X_op = O_absent; 1584 insn.nfixups++; 1585 insn.sequence = seq_num; 1586 emit_lituse = 0; 1587 1588 emit_insn (&insn); 1589 1590 /* Emit "addq litreg, base, target". */ 1591 1592 if (basereg != AXP_REG_ZERO) 1593 { 1594 set_tok_reg (newtok[1], basereg); 1595 set_tok_reg (newtok[2], targreg); 1596 assemble_tokens ("addq", newtok, 3, 0); 1597 } 1598 #endif /* !OBJ_EVAX */ 1599 1600 if (poffset) 1601 set_tok_const (*poffset, 0); 1602 *pbasereg = targreg; 1603 } 1604 else 1605 { 1606 offsetT low, high, extra, tmp; 1607 1608 /* For 32-bit operands, break up the addend. */ 1609 1610 low = sign_extend_16 (addend); 1611 tmp = addend - low; 1612 high = sign_extend_16 (tmp >> 16); 1613 1614 if (tmp - (high << 16)) 1615 { 1616 extra = 0x4000; 1617 tmp -= 0x40000000; 1618 high = sign_extend_16 (tmp >> 16); 1619 } 1620 else 1621 extra = 0; 1622 1623 set_tok_reg (newtok[0], targreg); 1624 set_tok_preg (newtok[2], basereg); 1625 1626 if (extra) 1627 { 1628 /* Emit "ldah r, extra(r). */ 1629 set_tok_const (newtok[1], extra); 1630 assemble_tokens ("ldah", newtok, 3, 0); 1631 set_tok_preg (newtok[2], basereg = targreg); 1632 } 1633 1634 if (high) 1635 { 1636 /* Emit "ldah r, high(r). */ 1637 set_tok_const (newtok[1], high); 1638 assemble_tokens ("ldah", newtok, 3, 0); 1639 basereg = targreg; 1640 set_tok_preg (newtok[2], basereg); 1641 } 1642 1643 if ((low && !poffset) || (!poffset && basereg != targreg)) 1644 { 1645 /* Emit "lda r, low(base)". */ 1646 set_tok_const (newtok[1], low); 1647 assemble_tokens ("lda", newtok, 3, 0); 1648 basereg = targreg; 1649 low = 0; 1650 } 1651 1652 if (poffset) 1653 set_tok_const (*poffset, low); 1654 *pbasereg = basereg; 1655 } 1656 1657 return emit_lituse; 1658 } 1659 1660 /* The lda macro differs from the lda instruction in that it handles 1661 most simple expressions, particularly symbol address loads and 1662 large constants. */ 1663 1664 static void 1665 emit_lda (const expressionS *tok, 1666 int ntok, 1667 const void * unused ATTRIBUTE_UNUSED) 1668 { 1669 int basereg; 1670 1671 if (ntok == 2) 1672 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 1673 else 1674 basereg = tok[2].X_add_number; 1675 1676 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL, "lda"); 1677 } 1678 1679 /* The ldah macro differs from the ldah instruction in that it has $31 1680 as an implied base register. */ 1681 1682 static void 1683 emit_ldah (const expressionS *tok, 1684 int ntok ATTRIBUTE_UNUSED, 1685 const void * unused ATTRIBUTE_UNUSED) 1686 { 1687 expressionS newtok[3]; 1688 1689 newtok[0] = tok[0]; 1690 newtok[1] = tok[1]; 1691 set_tok_preg (newtok[2], AXP_REG_ZERO); 1692 1693 assemble_tokens ("ldah", newtok, 3, 0); 1694 } 1695 1696 /* Called internally to handle all alignment needs. This takes care 1697 of eliding calls to frag_align if'n the cached current alignment 1698 says we've already got it, as well as taking care of the auto-align 1699 feature wrt labels. */ 1700 1701 static void 1702 alpha_align (int n, 1703 char *pfill, 1704 symbolS *label, 1705 int force ATTRIBUTE_UNUSED) 1706 { 1707 if (alpha_current_align >= n) 1708 return; 1709 1710 if (pfill == NULL) 1711 { 1712 if (subseg_text_p (now_seg)) 1713 frag_align_code (n, 0); 1714 else 1715 frag_align (n, 0, 0); 1716 } 1717 else 1718 frag_align (n, *pfill, 0); 1719 1720 alpha_current_align = n; 1721 1722 if (label != NULL && S_GET_SEGMENT (label) == now_seg) 1723 { 1724 symbol_set_frag (label, frag_now); 1725 S_SET_VALUE (label, (valueT) frag_now_fix ()); 1726 } 1727 1728 record_alignment (now_seg, n); 1729 1730 /* ??? If alpha_flag_relax && force && elf, record the requested alignment 1731 in a reloc for the linker to see. */ 1732 } 1733 1734 /* Actually output an instruction with its fixup. */ 1735 1736 static void 1737 emit_insn (struct alpha_insn *insn) 1738 { 1739 char *f; 1740 int i; 1741 1742 /* Take care of alignment duties. */ 1743 if (alpha_auto_align_on && alpha_current_align < 2) 1744 alpha_align (2, (char *) NULL, alpha_insn_label, 0); 1745 if (alpha_current_align > 2) 1746 alpha_current_align = 2; 1747 alpha_insn_label = NULL; 1748 1749 /* Write out the instruction. */ 1750 f = frag_more (4); 1751 md_number_to_chars (f, insn->insn, 4); 1752 1753 #ifdef OBJ_ELF 1754 dwarf2_emit_insn (4); 1755 #endif 1756 1757 /* Apply the fixups in order. */ 1758 for (i = 0; i < insn->nfixups; ++i) 1759 { 1760 const struct alpha_operand *operand = (const struct alpha_operand *) 0; 1761 struct alpha_fixup *fixup = &insn->fixups[i]; 1762 struct alpha_reloc_tag *info = NULL; 1763 int size, pcrel; 1764 fixS *fixP; 1765 1766 /* Some fixups are only used internally and so have no howto. */ 1767 if ((int) fixup->reloc < 0) 1768 { 1769 operand = &alpha_operands[-(int) fixup->reloc]; 1770 size = 4; 1771 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0); 1772 } 1773 else if (fixup->reloc > BFD_RELOC_UNUSED 1774 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16 1775 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16) 1776 { 1777 size = 2; 1778 pcrel = 0; 1779 } 1780 else 1781 { 1782 reloc_howto_type *reloc_howto = 1783 bfd_reloc_type_lookup (stdoutput, 1784 (bfd_reloc_code_real_type) fixup->reloc); 1785 gas_assert (reloc_howto); 1786 1787 size = bfd_get_reloc_size (reloc_howto); 1788 1789 switch (fixup->reloc) 1790 { 1791 #ifdef OBJ_EVAX 1792 case BFD_RELOC_ALPHA_NOP: 1793 case BFD_RELOC_ALPHA_BSR: 1794 case BFD_RELOC_ALPHA_LDA: 1795 case BFD_RELOC_ALPHA_BOH: 1796 break; 1797 #endif 1798 default: 1799 gas_assert (size >= 1 && size <= 4); 1800 } 1801 1802 pcrel = reloc_howto->pc_relative; 1803 } 1804 1805 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size, 1806 &fixup->exp, pcrel, (bfd_reloc_code_real_type) fixup->reloc); 1807 1808 /* Turn off complaints that the addend is too large for some fixups, 1809 and copy in the sequence number for the explicit relocations. */ 1810 switch (fixup->reloc) 1811 { 1812 case BFD_RELOC_ALPHA_HINT: 1813 case BFD_RELOC_GPREL32: 1814 case BFD_RELOC_GPREL16: 1815 case BFD_RELOC_ALPHA_GPREL_HI16: 1816 case BFD_RELOC_ALPHA_GPREL_LO16: 1817 case BFD_RELOC_ALPHA_GOTDTPREL16: 1818 case BFD_RELOC_ALPHA_DTPREL_HI16: 1819 case BFD_RELOC_ALPHA_DTPREL_LO16: 1820 case BFD_RELOC_ALPHA_DTPREL16: 1821 case BFD_RELOC_ALPHA_GOTTPREL16: 1822 case BFD_RELOC_ALPHA_TPREL_HI16: 1823 case BFD_RELOC_ALPHA_TPREL_LO16: 1824 case BFD_RELOC_ALPHA_TPREL16: 1825 fixP->fx_no_overflow = 1; 1826 break; 1827 1828 case BFD_RELOC_ALPHA_GPDISP_HI16: 1829 fixP->fx_no_overflow = 1; 1830 fixP->fx_addsy = section_symbol (now_seg); 1831 fixP->fx_offset = 0; 1832 1833 info = get_alpha_reloc_tag (insn->sequence); 1834 if (++info->n_master > 1) 1835 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence); 1836 if (info->segment != now_seg) 1837 as_bad (_("both insns for !gpdisp!%ld must be in the same section"), 1838 insn->sequence); 1839 fixP->tc_fix_data.info = info; 1840 break; 1841 1842 case BFD_RELOC_ALPHA_GPDISP_LO16: 1843 fixP->fx_no_overflow = 1; 1844 1845 info = get_alpha_reloc_tag (insn->sequence); 1846 if (++info->n_slaves > 1) 1847 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence); 1848 if (info->segment != now_seg) 1849 as_bad (_("both insns for !gpdisp!%ld must be in the same section"), 1850 insn->sequence); 1851 fixP->tc_fix_data.info = info; 1852 info->slaves = fixP; 1853 break; 1854 1855 case BFD_RELOC_ALPHA_LITERAL: 1856 case BFD_RELOC_ALPHA_ELF_LITERAL: 1857 fixP->fx_no_overflow = 1; 1858 1859 if (insn->sequence == 0) 1860 break; 1861 info = get_alpha_reloc_tag (insn->sequence); 1862 info->master = fixP; 1863 info->n_master++; 1864 if (info->segment != now_seg) 1865 info->multi_section_p = 1; 1866 fixP->tc_fix_data.info = info; 1867 break; 1868 1869 #ifdef RELOC_OP_P 1870 case DUMMY_RELOC_LITUSE_ADDR: 1871 fixP->fx_offset = LITUSE_ALPHA_ADDR; 1872 goto do_lituse; 1873 case DUMMY_RELOC_LITUSE_BASE: 1874 fixP->fx_offset = LITUSE_ALPHA_BASE; 1875 goto do_lituse; 1876 case DUMMY_RELOC_LITUSE_BYTOFF: 1877 fixP->fx_offset = LITUSE_ALPHA_BYTOFF; 1878 goto do_lituse; 1879 case DUMMY_RELOC_LITUSE_JSR: 1880 fixP->fx_offset = LITUSE_ALPHA_JSR; 1881 goto do_lituse; 1882 case DUMMY_RELOC_LITUSE_TLSGD: 1883 fixP->fx_offset = LITUSE_ALPHA_TLSGD; 1884 goto do_lituse; 1885 case DUMMY_RELOC_LITUSE_TLSLDM: 1886 fixP->fx_offset = LITUSE_ALPHA_TLSLDM; 1887 goto do_lituse; 1888 case DUMMY_RELOC_LITUSE_JSRDIRECT: 1889 fixP->fx_offset = LITUSE_ALPHA_JSRDIRECT; 1890 goto do_lituse; 1891 do_lituse: 1892 fixP->fx_addsy = section_symbol (now_seg); 1893 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE; 1894 1895 info = get_alpha_reloc_tag (insn->sequence); 1896 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD) 1897 info->saw_lu_tlsgd = 1; 1898 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM) 1899 info->saw_lu_tlsldm = 1; 1900 if (++info->n_slaves > 1) 1901 { 1902 if (info->saw_lu_tlsgd) 1903 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"), 1904 insn->sequence); 1905 else if (info->saw_lu_tlsldm) 1906 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"), 1907 insn->sequence); 1908 } 1909 fixP->tc_fix_data.info = info; 1910 fixP->tc_fix_data.next_reloc = info->slaves; 1911 info->slaves = fixP; 1912 if (info->segment != now_seg) 1913 info->multi_section_p = 1; 1914 break; 1915 1916 case BFD_RELOC_ALPHA_TLSGD: 1917 fixP->fx_no_overflow = 1; 1918 1919 if (insn->sequence == 0) 1920 break; 1921 info = get_alpha_reloc_tag (insn->sequence); 1922 if (info->saw_tlsgd) 1923 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence); 1924 else if (info->saw_tlsldm) 1925 as_bad (_("sequence number in use for !tlsldm!%ld"), 1926 insn->sequence); 1927 else 1928 info->saw_tlsgd = 1; 1929 fixP->tc_fix_data.info = info; 1930 break; 1931 1932 case BFD_RELOC_ALPHA_TLSLDM: 1933 fixP->fx_no_overflow = 1; 1934 1935 if (insn->sequence == 0) 1936 break; 1937 info = get_alpha_reloc_tag (insn->sequence); 1938 if (info->saw_tlsldm) 1939 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence); 1940 else if (info->saw_tlsgd) 1941 as_bad (_("sequence number in use for !tlsgd!%ld"), 1942 insn->sequence); 1943 else 1944 info->saw_tlsldm = 1; 1945 fixP->tc_fix_data.info = info; 1946 break; 1947 #endif 1948 #ifdef OBJ_EVAX 1949 case BFD_RELOC_ALPHA_NOP: 1950 case BFD_RELOC_ALPHA_LDA: 1951 case BFD_RELOC_ALPHA_BSR: 1952 case BFD_RELOC_ALPHA_BOH: 1953 info = get_alpha_reloc_tag (next_sequence_num--); 1954 fixP->tc_fix_data.info = info; 1955 fixP->tc_fix_data.info->sym = fixup->xtrasym; 1956 fixP->tc_fix_data.info->psym = fixup->procsym; 1957 break; 1958 #endif 1959 1960 default: 1961 if ((int) fixup->reloc < 0) 1962 { 1963 if (operand->flags & AXP_OPERAND_NOOVERFLOW) 1964 fixP->fx_no_overflow = 1; 1965 } 1966 break; 1967 } 1968 } 1969 } 1970 1971 /* Insert an operand value into an instruction. */ 1972 1973 static unsigned 1974 insert_operand (unsigned insn, 1975 const struct alpha_operand *operand, 1976 offsetT val, 1977 const char *file, 1978 unsigned line) 1979 { 1980 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW)) 1981 { 1982 offsetT min, max; 1983 1984 if (operand->flags & AXP_OPERAND_SIGNED) 1985 { 1986 max = (1 << (operand->bits - 1)) - 1; 1987 min = -(1 << (operand->bits - 1)); 1988 } 1989 else 1990 { 1991 max = (1 << operand->bits) - 1; 1992 min = 0; 1993 } 1994 1995 if (val < min || val > max) 1996 as_bad_value_out_of_range (_("operand"), val, min, max, file, line); 1997 } 1998 1999 if (operand->insert) 2000 { 2001 const char *errmsg = NULL; 2002 2003 insn = (*operand->insert) (insn, val, &errmsg); 2004 if (errmsg) 2005 as_warn ("%s", errmsg); 2006 } 2007 else 2008 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift); 2009 2010 return insn; 2011 } 2012 2013 /* Turn an opcode description and a set of arguments into 2014 an instruction and a fixup. */ 2015 2016 static void 2017 assemble_insn (const struct alpha_opcode *opcode, 2018 const expressionS *tok, 2019 int ntok, 2020 struct alpha_insn *insn, 2021 extended_bfd_reloc_code_real_type reloc) 2022 { 2023 const struct alpha_operand *reloc_operand = NULL; 2024 const expressionS *reloc_exp = NULL; 2025 const unsigned char *argidx; 2026 unsigned image; 2027 int tokidx = 0; 2028 2029 memset (insn, 0, sizeof (*insn)); 2030 image = opcode->opcode; 2031 2032 for (argidx = opcode->operands; *argidx; ++argidx) 2033 { 2034 const struct alpha_operand *operand = &alpha_operands[*argidx]; 2035 const expressionS *t = (const expressionS *) 0; 2036 2037 if (operand->flags & AXP_OPERAND_FAKE) 2038 { 2039 /* Fake operands take no value and generate no fixup. */ 2040 image = insert_operand (image, operand, 0, NULL, 0); 2041 continue; 2042 } 2043 2044 if (tokidx >= ntok) 2045 { 2046 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK) 2047 { 2048 case AXP_OPERAND_DEFAULT_FIRST: 2049 t = &tok[0]; 2050 break; 2051 case AXP_OPERAND_DEFAULT_SECOND: 2052 t = &tok[1]; 2053 break; 2054 case AXP_OPERAND_DEFAULT_ZERO: 2055 { 2056 static expressionS zero_exp; 2057 t = &zero_exp; 2058 zero_exp.X_op = O_constant; 2059 zero_exp.X_unsigned = 1; 2060 } 2061 break; 2062 default: 2063 abort (); 2064 } 2065 } 2066 else 2067 t = &tok[tokidx++]; 2068 2069 switch (t->X_op) 2070 { 2071 case O_register: 2072 case O_pregister: 2073 case O_cpregister: 2074 image = insert_operand (image, operand, regno (t->X_add_number), 2075 NULL, 0); 2076 break; 2077 2078 case O_constant: 2079 image = insert_operand (image, operand, t->X_add_number, NULL, 0); 2080 gas_assert (reloc_operand == NULL); 2081 reloc_operand = operand; 2082 reloc_exp = t; 2083 break; 2084 2085 default: 2086 /* This is only 0 for fields that should contain registers, 2087 which means this pattern shouldn't have matched. */ 2088 if (operand->default_reloc == 0) 2089 abort (); 2090 2091 /* There is one special case for which an insn receives two 2092 relocations, and thus the user-supplied reloc does not 2093 override the operand reloc. */ 2094 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT) 2095 { 2096 struct alpha_fixup *fixup; 2097 2098 if (insn->nfixups >= MAX_INSN_FIXUPS) 2099 as_fatal (_("too many fixups")); 2100 2101 fixup = &insn->fixups[insn->nfixups++]; 2102 fixup->exp = *t; 2103 fixup->reloc = BFD_RELOC_ALPHA_HINT; 2104 } 2105 else 2106 { 2107 if (reloc == BFD_RELOC_UNUSED) 2108 reloc = operand->default_reloc; 2109 2110 gas_assert (reloc_operand == NULL); 2111 reloc_operand = operand; 2112 reloc_exp = t; 2113 } 2114 break; 2115 } 2116 } 2117 2118 if (reloc != BFD_RELOC_UNUSED) 2119 { 2120 struct alpha_fixup *fixup; 2121 2122 if (insn->nfixups >= MAX_INSN_FIXUPS) 2123 as_fatal (_("too many fixups")); 2124 2125 /* ??? My but this is hacky. But the OSF/1 assembler uses the same 2126 relocation tag for both ldah and lda with gpdisp. Choose the 2127 correct internal relocation based on the opcode. */ 2128 if (reloc == BFD_RELOC_ALPHA_GPDISP) 2129 { 2130 if (strcmp (opcode->name, "ldah") == 0) 2131 reloc = BFD_RELOC_ALPHA_GPDISP_HI16; 2132 else if (strcmp (opcode->name, "lda") == 0) 2133 reloc = BFD_RELOC_ALPHA_GPDISP_LO16; 2134 else 2135 as_bad (_("invalid relocation for instruction")); 2136 } 2137 2138 /* If this is a real relocation (as opposed to a lituse hint), then 2139 the relocation width should match the operand width. 2140 Take care of -MDISP in operand table. */ 2141 else if (reloc < BFD_RELOC_UNUSED && reloc > 0) 2142 { 2143 reloc_howto_type *reloc_howto 2144 = bfd_reloc_type_lookup (stdoutput, 2145 (bfd_reloc_code_real_type) reloc); 2146 if (reloc_operand == NULL 2147 || reloc_howto->bitsize != reloc_operand->bits) 2148 { 2149 as_bad (_("invalid relocation for field")); 2150 return; 2151 } 2152 } 2153 2154 fixup = &insn->fixups[insn->nfixups++]; 2155 if (reloc_exp) 2156 fixup->exp = *reloc_exp; 2157 else 2158 fixup->exp.X_op = O_absent; 2159 fixup->reloc = reloc; 2160 } 2161 2162 insn->insn = image; 2163 } 2164 2165 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u, 2166 etc. They differ from the real instructions in that they do simple 2167 expressions like the lda macro. */ 2168 2169 static void 2170 emit_ir_load (const expressionS *tok, 2171 int ntok, 2172 const void * opname) 2173 { 2174 int basereg; 2175 long lituse; 2176 expressionS newtok[3]; 2177 struct alpha_insn insn; 2178 const char *symname 2179 = tok[1].X_add_symbol ? S_GET_NAME (tok[1].X_add_symbol): ""; 2180 int symlen = strlen (symname); 2181 2182 if (ntok == 2) 2183 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 2184 else 2185 basereg = tok[2].X_add_number; 2186 2187 lituse = load_expression (tok[0].X_add_number, &tok[1], 2188 &basereg, &newtok[1], (const char *) opname); 2189 2190 if (basereg == alpha_gp_register && 2191 (symlen > 4 && strcmp (&symname [symlen - 4], "..lk") == 0)) 2192 return; 2193 2194 newtok[0] = tok[0]; 2195 set_tok_preg (newtok[2], basereg); 2196 2197 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); 2198 2199 if (lituse) 2200 { 2201 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2202 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2203 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2204 insn.nfixups++; 2205 insn.sequence = lituse; 2206 } 2207 2208 emit_insn (&insn); 2209 } 2210 2211 /* Handle fp register loads, and both integer and fp register stores. 2212 Again, we handle simple expressions. */ 2213 2214 static void 2215 emit_loadstore (const expressionS *tok, 2216 int ntok, 2217 const void * opname) 2218 { 2219 int basereg; 2220 long lituse; 2221 expressionS newtok[3]; 2222 struct alpha_insn insn; 2223 2224 if (ntok == 2) 2225 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register); 2226 else 2227 basereg = tok[2].X_add_number; 2228 2229 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number)) 2230 { 2231 if (alpha_noat_on) 2232 as_bad (_("macro requires $at register while noat in effect")); 2233 2234 lituse = load_expression (AXP_REG_AT, &tok[1], 2235 &basereg, &newtok[1], (const char *) opname); 2236 } 2237 else 2238 { 2239 newtok[1] = tok[1]; 2240 lituse = 0; 2241 } 2242 2243 newtok[0] = tok[0]; 2244 set_tok_preg (newtok[2], basereg); 2245 2246 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn); 2247 2248 if (lituse) 2249 { 2250 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2251 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2252 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2253 insn.nfixups++; 2254 insn.sequence = lituse; 2255 } 2256 2257 emit_insn (&insn); 2258 } 2259 2260 /* Load a half-word or byte as an unsigned value. */ 2261 2262 static void 2263 emit_ldXu (const expressionS *tok, 2264 int ntok, 2265 const void * vlgsize) 2266 { 2267 if (alpha_target & AXP_OPCODE_BWX) 2268 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]); 2269 else 2270 { 2271 expressionS newtok[3]; 2272 struct alpha_insn insn; 2273 int basereg; 2274 long lituse; 2275 2276 if (alpha_noat_on) 2277 as_bad (_("macro requires $at register while noat in effect")); 2278 2279 if (ntok == 2) 2280 basereg = (tok[1].X_op == O_constant 2281 ? AXP_REG_ZERO : alpha_gp_register); 2282 else 2283 basereg = tok[2].X_add_number; 2284 2285 /* Emit "lda $at, exp". */ 2286 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); 2287 2288 /* Emit "ldq_u targ, 0($at)". */ 2289 newtok[0] = tok[0]; 2290 set_tok_const (newtok[1], 0); 2291 set_tok_preg (newtok[2], basereg); 2292 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); 2293 2294 if (lituse) 2295 { 2296 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2297 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2298 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2299 insn.nfixups++; 2300 insn.sequence = lituse; 2301 } 2302 2303 emit_insn (&insn); 2304 2305 /* Emit "extXl targ, $at, targ". */ 2306 set_tok_reg (newtok[1], basereg); 2307 newtok[2] = newtok[0]; 2308 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn); 2309 2310 if (lituse) 2311 { 2312 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2313 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2314 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2315 insn.nfixups++; 2316 insn.sequence = lituse; 2317 } 2318 2319 emit_insn (&insn); 2320 } 2321 } 2322 2323 /* Load a half-word or byte as a signed value. */ 2324 2325 static void 2326 emit_ldX (const expressionS *tok, 2327 int ntok, 2328 const void * vlgsize) 2329 { 2330 emit_ldXu (tok, ntok, vlgsize); 2331 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); 2332 } 2333 2334 /* Load an integral value from an unaligned address as an unsigned 2335 value. */ 2336 2337 static void 2338 emit_uldXu (const expressionS *tok, 2339 int ntok, 2340 const void * vlgsize) 2341 { 2342 long lgsize = (long) vlgsize; 2343 expressionS newtok[3]; 2344 2345 if (alpha_noat_on) 2346 as_bad (_("macro requires $at register while noat in effect")); 2347 2348 /* Emit "lda $at, exp". */ 2349 memcpy (newtok, tok, sizeof (expressionS) * ntok); 2350 newtok[0].X_add_number = AXP_REG_AT; 2351 assemble_tokens ("lda", newtok, ntok, 1); 2352 2353 /* Emit "ldq_u $t9, 0($at)". */ 2354 set_tok_reg (newtok[0], AXP_REG_T9); 2355 set_tok_const (newtok[1], 0); 2356 set_tok_preg (newtok[2], AXP_REG_AT); 2357 assemble_tokens ("ldq_u", newtok, 3, 1); 2358 2359 /* Emit "ldq_u $t10, size-1($at)". */ 2360 set_tok_reg (newtok[0], AXP_REG_T10); 2361 set_tok_const (newtok[1], (1 << lgsize) - 1); 2362 assemble_tokens ("ldq_u", newtok, 3, 1); 2363 2364 /* Emit "extXl $t9, $at, $t9". */ 2365 set_tok_reg (newtok[0], AXP_REG_T9); 2366 set_tok_reg (newtok[1], AXP_REG_AT); 2367 set_tok_reg (newtok[2], AXP_REG_T9); 2368 assemble_tokens (extXl_op[lgsize], newtok, 3, 1); 2369 2370 /* Emit "extXh $t10, $at, $t10". */ 2371 set_tok_reg (newtok[0], AXP_REG_T10); 2372 set_tok_reg (newtok[2], AXP_REG_T10); 2373 assemble_tokens (extXh_op[lgsize], newtok, 3, 1); 2374 2375 /* Emit "or $t9, $t10, targ". */ 2376 set_tok_reg (newtok[0], AXP_REG_T9); 2377 set_tok_reg (newtok[1], AXP_REG_T10); 2378 newtok[2] = tok[0]; 2379 assemble_tokens ("or", newtok, 3, 1); 2380 } 2381 2382 /* Load an integral value from an unaligned address as a signed value. 2383 Note that quads should get funneled to the unsigned load since we 2384 don't have to do the sign extension. */ 2385 2386 static void 2387 emit_uldX (const expressionS *tok, 2388 int ntok, 2389 const void * vlgsize) 2390 { 2391 emit_uldXu (tok, ntok, vlgsize); 2392 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1); 2393 } 2394 2395 /* Implement the ldil macro. */ 2396 2397 static void 2398 emit_ldil (const expressionS *tok, 2399 int ntok, 2400 const void * unused ATTRIBUTE_UNUSED) 2401 { 2402 expressionS newtok[2]; 2403 2404 memcpy (newtok, tok, sizeof (newtok)); 2405 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number); 2406 2407 assemble_tokens ("lda", newtok, ntok, 1); 2408 } 2409 2410 /* Store a half-word or byte. */ 2411 2412 static void 2413 emit_stX (const expressionS *tok, 2414 int ntok, 2415 const void * vlgsize) 2416 { 2417 int lgsize = (int) (long) vlgsize; 2418 2419 if (alpha_target & AXP_OPCODE_BWX) 2420 emit_loadstore (tok, ntok, stX_op[lgsize]); 2421 else 2422 { 2423 expressionS newtok[3]; 2424 struct alpha_insn insn; 2425 int basereg; 2426 long lituse; 2427 2428 if (alpha_noat_on) 2429 as_bad (_("macro requires $at register while noat in effect")); 2430 2431 if (ntok == 2) 2432 basereg = (tok[1].X_op == O_constant 2433 ? AXP_REG_ZERO : alpha_gp_register); 2434 else 2435 basereg = tok[2].X_add_number; 2436 2437 /* Emit "lda $at, exp". */ 2438 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL, "lda"); 2439 2440 /* Emit "ldq_u $t9, 0($at)". */ 2441 set_tok_reg (newtok[0], AXP_REG_T9); 2442 set_tok_const (newtok[1], 0); 2443 set_tok_preg (newtok[2], basereg); 2444 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn); 2445 2446 if (lituse) 2447 { 2448 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2449 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2450 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2451 insn.nfixups++; 2452 insn.sequence = lituse; 2453 } 2454 2455 emit_insn (&insn); 2456 2457 /* Emit "insXl src, $at, $t10". */ 2458 newtok[0] = tok[0]; 2459 set_tok_reg (newtok[1], basereg); 2460 set_tok_reg (newtok[2], AXP_REG_T10); 2461 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn); 2462 2463 if (lituse) 2464 { 2465 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2466 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2467 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2468 insn.nfixups++; 2469 insn.sequence = lituse; 2470 } 2471 2472 emit_insn (&insn); 2473 2474 /* Emit "mskXl $t9, $at, $t9". */ 2475 set_tok_reg (newtok[0], AXP_REG_T9); 2476 newtok[2] = newtok[0]; 2477 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn); 2478 2479 if (lituse) 2480 { 2481 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2482 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF; 2483 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2484 insn.nfixups++; 2485 insn.sequence = lituse; 2486 } 2487 2488 emit_insn (&insn); 2489 2490 /* Emit "or $t9, $t10, $t9". */ 2491 set_tok_reg (newtok[1], AXP_REG_T10); 2492 assemble_tokens ("or", newtok, 3, 1); 2493 2494 /* Emit "stq_u $t9, 0($at). */ 2495 set_tok_const(newtok[1], 0); 2496 set_tok_preg (newtok[2], AXP_REG_AT); 2497 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn); 2498 2499 if (lituse) 2500 { 2501 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2502 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE; 2503 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2504 insn.nfixups++; 2505 insn.sequence = lituse; 2506 } 2507 2508 emit_insn (&insn); 2509 } 2510 } 2511 2512 /* Store an integer to an unaligned address. */ 2513 2514 static void 2515 emit_ustX (const expressionS *tok, 2516 int ntok, 2517 const void * vlgsize) 2518 { 2519 int lgsize = (int) (long) vlgsize; 2520 expressionS newtok[3]; 2521 2522 /* Emit "lda $at, exp". */ 2523 memcpy (newtok, tok, sizeof (expressionS) * ntok); 2524 newtok[0].X_add_number = AXP_REG_AT; 2525 assemble_tokens ("lda", newtok, ntok, 1); 2526 2527 /* Emit "ldq_u $9, 0($at)". */ 2528 set_tok_reg (newtok[0], AXP_REG_T9); 2529 set_tok_const (newtok[1], 0); 2530 set_tok_preg (newtok[2], AXP_REG_AT); 2531 assemble_tokens ("ldq_u", newtok, 3, 1); 2532 2533 /* Emit "ldq_u $10, size-1($at)". */ 2534 set_tok_reg (newtok[0], AXP_REG_T10); 2535 set_tok_const (newtok[1], (1 << lgsize) - 1); 2536 assemble_tokens ("ldq_u", newtok, 3, 1); 2537 2538 /* Emit "insXl src, $at, $t11". */ 2539 newtok[0] = tok[0]; 2540 set_tok_reg (newtok[1], AXP_REG_AT); 2541 set_tok_reg (newtok[2], AXP_REG_T11); 2542 assemble_tokens (insXl_op[lgsize], newtok, 3, 1); 2543 2544 /* Emit "insXh src, $at, $t12". */ 2545 set_tok_reg (newtok[2], AXP_REG_T12); 2546 assemble_tokens (insXh_op[lgsize], newtok, 3, 1); 2547 2548 /* Emit "mskXl $t9, $at, $t9". */ 2549 set_tok_reg (newtok[0], AXP_REG_T9); 2550 newtok[2] = newtok[0]; 2551 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1); 2552 2553 /* Emit "mskXh $t10, $at, $t10". */ 2554 set_tok_reg (newtok[0], AXP_REG_T10); 2555 newtok[2] = newtok[0]; 2556 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1); 2557 2558 /* Emit "or $t9, $t11, $t9". */ 2559 set_tok_reg (newtok[0], AXP_REG_T9); 2560 set_tok_reg (newtok[1], AXP_REG_T11); 2561 newtok[2] = newtok[0]; 2562 assemble_tokens ("or", newtok, 3, 1); 2563 2564 /* Emit "or $t10, $t12, $t10". */ 2565 set_tok_reg (newtok[0], AXP_REG_T10); 2566 set_tok_reg (newtok[1], AXP_REG_T12); 2567 newtok[2] = newtok[0]; 2568 assemble_tokens ("or", newtok, 3, 1); 2569 2570 /* Emit "stq_u $t10, size-1($at)". */ 2571 set_tok_reg (newtok[0], AXP_REG_T10); 2572 set_tok_const (newtok[1], (1 << lgsize) - 1); 2573 set_tok_preg (newtok[2], AXP_REG_AT); 2574 assemble_tokens ("stq_u", newtok, 3, 1); 2575 2576 /* Emit "stq_u $t9, 0($at)". */ 2577 set_tok_reg (newtok[0], AXP_REG_T9); 2578 set_tok_const (newtok[1], 0); 2579 assemble_tokens ("stq_u", newtok, 3, 1); 2580 } 2581 2582 /* Sign extend a half-word or byte. The 32-bit sign extend is 2583 implemented as "addl $31, $r, $t" in the opcode table. */ 2584 2585 static void 2586 emit_sextX (const expressionS *tok, 2587 int ntok, 2588 const void * vlgsize) 2589 { 2590 long lgsize = (long) vlgsize; 2591 2592 if (alpha_target & AXP_OPCODE_BWX) 2593 assemble_tokens (sextX_op[lgsize], tok, ntok, 0); 2594 else 2595 { 2596 int bitshift = 64 - 8 * (1 << lgsize); 2597 expressionS newtok[3]; 2598 2599 /* Emit "sll src,bits,dst". */ 2600 newtok[0] = tok[0]; 2601 set_tok_const (newtok[1], bitshift); 2602 newtok[2] = tok[ntok - 1]; 2603 assemble_tokens ("sll", newtok, 3, 1); 2604 2605 /* Emit "sra dst,bits,dst". */ 2606 newtok[0] = newtok[2]; 2607 assemble_tokens ("sra", newtok, 3, 1); 2608 } 2609 } 2610 2611 /* Implement the division and modulus macros. */ 2612 2613 #ifdef OBJ_EVAX 2614 2615 /* Make register usage like in normal procedure call. 2616 Don't clobber PV and RA. */ 2617 2618 static void 2619 emit_division (const expressionS *tok, 2620 int ntok, 2621 const void * symname) 2622 { 2623 /* DIVISION and MODULUS. Yech. 2624 2625 Convert 2626 OP x,y,result 2627 to 2628 mov x,R16 # if x != R16 2629 mov y,R17 # if y != R17 2630 lda AT,__OP 2631 jsr AT,(AT),0 2632 mov R0,result 2633 2634 with appropriate optimizations if R0,R16,R17 are the registers 2635 specified by the compiler. */ 2636 2637 int xr, yr, rr; 2638 symbolS *sym; 2639 expressionS newtok[3]; 2640 2641 xr = regno (tok[0].X_add_number); 2642 yr = regno (tok[1].X_add_number); 2643 2644 if (ntok < 3) 2645 rr = xr; 2646 else 2647 rr = regno (tok[2].X_add_number); 2648 2649 /* Move the operands into the right place. */ 2650 if (yr == AXP_REG_R16 && xr == AXP_REG_R17) 2651 { 2652 /* They are in exactly the wrong order -- swap through AT. */ 2653 if (alpha_noat_on) 2654 as_bad (_("macro requires $at register while noat in effect")); 2655 2656 set_tok_reg (newtok[0], AXP_REG_R16); 2657 set_tok_reg (newtok[1], AXP_REG_AT); 2658 assemble_tokens ("mov", newtok, 2, 1); 2659 2660 set_tok_reg (newtok[0], AXP_REG_R17); 2661 set_tok_reg (newtok[1], AXP_REG_R16); 2662 assemble_tokens ("mov", newtok, 2, 1); 2663 2664 set_tok_reg (newtok[0], AXP_REG_AT); 2665 set_tok_reg (newtok[1], AXP_REG_R17); 2666 assemble_tokens ("mov", newtok, 2, 1); 2667 } 2668 else 2669 { 2670 if (yr == AXP_REG_R16) 2671 { 2672 set_tok_reg (newtok[0], AXP_REG_R16); 2673 set_tok_reg (newtok[1], AXP_REG_R17); 2674 assemble_tokens ("mov", newtok, 2, 1); 2675 } 2676 2677 if (xr != AXP_REG_R16) 2678 { 2679 set_tok_reg (newtok[0], xr); 2680 set_tok_reg (newtok[1], AXP_REG_R16); 2681 assemble_tokens ("mov", newtok, 2, 1); 2682 } 2683 2684 if (yr != AXP_REG_R16 && yr != AXP_REG_R17) 2685 { 2686 set_tok_reg (newtok[0], yr); 2687 set_tok_reg (newtok[1], AXP_REG_R17); 2688 assemble_tokens ("mov", newtok, 2, 1); 2689 } 2690 } 2691 2692 sym = symbol_find_or_make ((const char *) symname); 2693 2694 set_tok_reg (newtok[0], AXP_REG_AT); 2695 set_tok_sym (newtok[1], sym, 0); 2696 assemble_tokens ("lda", newtok, 2, 1); 2697 2698 /* Call the division routine. */ 2699 set_tok_reg (newtok[0], AXP_REG_AT); 2700 set_tok_cpreg (newtok[1], AXP_REG_AT); 2701 set_tok_const (newtok[2], 0); 2702 assemble_tokens ("jsr", newtok, 3, 1); 2703 2704 /* Move the result to the right place. */ 2705 if (rr != AXP_REG_R0) 2706 { 2707 set_tok_reg (newtok[0], AXP_REG_R0); 2708 set_tok_reg (newtok[1], rr); 2709 assemble_tokens ("mov", newtok, 2, 1); 2710 } 2711 } 2712 2713 #else /* !OBJ_EVAX */ 2714 2715 static void 2716 emit_division (const expressionS *tok, 2717 int ntok, 2718 const void * symname) 2719 { 2720 /* DIVISION and MODULUS. Yech. 2721 Convert 2722 OP x,y,result 2723 to 2724 lda pv,__OP 2725 mov x,t10 2726 mov y,t11 2727 jsr t9,(pv),__OP 2728 mov t12,result 2729 2730 with appropriate optimizations if t10,t11,t12 are the registers 2731 specified by the compiler. */ 2732 2733 int xr, yr, rr; 2734 symbolS *sym; 2735 expressionS newtok[3]; 2736 2737 xr = regno (tok[0].X_add_number); 2738 yr = regno (tok[1].X_add_number); 2739 2740 if (ntok < 3) 2741 rr = xr; 2742 else 2743 rr = regno (tok[2].X_add_number); 2744 2745 sym = symbol_find_or_make ((const char *) symname); 2746 2747 /* Move the operands into the right place. */ 2748 if (yr == AXP_REG_T10 && xr == AXP_REG_T11) 2749 { 2750 /* They are in exactly the wrong order -- swap through AT. */ 2751 if (alpha_noat_on) 2752 as_bad (_("macro requires $at register while noat in effect")); 2753 2754 set_tok_reg (newtok[0], AXP_REG_T10); 2755 set_tok_reg (newtok[1], AXP_REG_AT); 2756 assemble_tokens ("mov", newtok, 2, 1); 2757 2758 set_tok_reg (newtok[0], AXP_REG_T11); 2759 set_tok_reg (newtok[1], AXP_REG_T10); 2760 assemble_tokens ("mov", newtok, 2, 1); 2761 2762 set_tok_reg (newtok[0], AXP_REG_AT); 2763 set_tok_reg (newtok[1], AXP_REG_T11); 2764 assemble_tokens ("mov", newtok, 2, 1); 2765 } 2766 else 2767 { 2768 if (yr == AXP_REG_T10) 2769 { 2770 set_tok_reg (newtok[0], AXP_REG_T10); 2771 set_tok_reg (newtok[1], AXP_REG_T11); 2772 assemble_tokens ("mov", newtok, 2, 1); 2773 } 2774 2775 if (xr != AXP_REG_T10) 2776 { 2777 set_tok_reg (newtok[0], xr); 2778 set_tok_reg (newtok[1], AXP_REG_T10); 2779 assemble_tokens ("mov", newtok, 2, 1); 2780 } 2781 2782 if (yr != AXP_REG_T10 && yr != AXP_REG_T11) 2783 { 2784 set_tok_reg (newtok[0], yr); 2785 set_tok_reg (newtok[1], AXP_REG_T11); 2786 assemble_tokens ("mov", newtok, 2, 1); 2787 } 2788 } 2789 2790 /* Call the division routine. */ 2791 set_tok_reg (newtok[0], AXP_REG_T9); 2792 set_tok_sym (newtok[1], sym, 0); 2793 assemble_tokens ("jsr", newtok, 2, 1); 2794 2795 /* Reload the GP register. */ 2796 #ifdef OBJ_AOUT 2797 FIXME 2798 #endif 2799 #if defined(OBJ_ECOFF) || defined(OBJ_ELF) 2800 set_tok_reg (newtok[0], alpha_gp_register); 2801 set_tok_const (newtok[1], 0); 2802 set_tok_preg (newtok[2], AXP_REG_T9); 2803 assemble_tokens ("ldgp", newtok, 3, 1); 2804 #endif 2805 2806 /* Move the result to the right place. */ 2807 if (rr != AXP_REG_T12) 2808 { 2809 set_tok_reg (newtok[0], AXP_REG_T12); 2810 set_tok_reg (newtok[1], rr); 2811 assemble_tokens ("mov", newtok, 2, 1); 2812 } 2813 } 2814 2815 #endif /* !OBJ_EVAX */ 2816 2817 /* The jsr and jmp macros differ from their instruction counterparts 2818 in that they can load the target address and default most 2819 everything. */ 2820 2821 static void 2822 emit_jsrjmp (const expressionS *tok, 2823 int ntok, 2824 const void * vopname) 2825 { 2826 const char *opname = (const char *) vopname; 2827 struct alpha_insn insn; 2828 expressionS newtok[3]; 2829 int r, tokidx = 0; 2830 long lituse = 0; 2831 2832 if (tokidx < ntok && tok[tokidx].X_op == O_register) 2833 r = regno (tok[tokidx++].X_add_number); 2834 else 2835 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA; 2836 2837 set_tok_reg (newtok[0], r); 2838 2839 if (tokidx < ntok && 2840 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) 2841 r = regno (tok[tokidx++].X_add_number); 2842 #ifdef OBJ_EVAX 2843 /* Keep register if jsr $n.<sym>. */ 2844 #else 2845 else 2846 { 2847 int basereg = alpha_gp_register; 2848 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], 2849 &basereg, NULL, opname); 2850 } 2851 #endif 2852 2853 set_tok_cpreg (newtok[1], r); 2854 2855 #ifndef OBJ_EVAX 2856 if (tokidx < ntok) 2857 newtok[2] = tok[tokidx]; 2858 else 2859 #endif 2860 set_tok_const (newtok[2], 0); 2861 2862 assemble_tokens_to_insn (opname, newtok, 3, &insn); 2863 2864 if (lituse) 2865 { 2866 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2867 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR; 2868 insn.fixups[insn.nfixups].exp.X_op = O_absent; 2869 insn.nfixups++; 2870 insn.sequence = lituse; 2871 } 2872 2873 #ifdef OBJ_EVAX 2874 if (alpha_flag_replace 2875 && r == AXP_REG_RA 2876 && tok[tokidx].X_add_symbol 2877 && alpha_linkage_symbol) 2878 { 2879 /* Create a BOH reloc for 'jsr $27,NAME'. */ 2880 const char *symname = S_GET_NAME (tok[tokidx].X_add_symbol); 2881 int symlen = strlen (symname); 2882 char *ensymname; 2883 2884 /* Build the entry name as 'NAME..en'. */ 2885 ensymname = XNEWVEC (char, symlen + 5); 2886 memcpy (ensymname, symname, symlen); 2887 memcpy (ensymname + symlen, "..en", 5); 2888 2889 gas_assert (insn.nfixups < MAX_INSN_FIXUPS); 2890 if (insn.nfixups > 0) 2891 { 2892 memmove (&insn.fixups[1], &insn.fixups[0], 2893 sizeof(struct alpha_fixup) * insn.nfixups); 2894 } 2895 2896 /* The fixup must be the same as the BFD_RELOC_ALPHA_NOP 2897 case in load_expression. See B.4.5.2 of the OpenVMS 2898 Linker Utility Manual. */ 2899 insn.fixups[0].reloc = BFD_RELOC_ALPHA_BOH; 2900 insn.fixups[0].exp.X_op = O_symbol; 2901 insn.fixups[0].exp.X_add_symbol = symbol_find_or_make (ensymname); 2902 insn.fixups[0].exp.X_add_number = 0; 2903 insn.fixups[0].xtrasym = alpha_linkage_symbol; 2904 insn.fixups[0].procsym = alpha_evax_proc->symbol; 2905 insn.nfixups++; 2906 alpha_linkage_symbol = 0; 2907 free (ensymname); 2908 } 2909 #endif 2910 2911 emit_insn (&insn); 2912 } 2913 2914 /* The ret and jcr instructions differ from their instruction 2915 counterparts in that everything can be defaulted. */ 2916 2917 static void 2918 emit_retjcr (const expressionS *tok, 2919 int ntok, 2920 const void * vopname) 2921 { 2922 const char *opname = (const char *) vopname; 2923 expressionS newtok[3]; 2924 int r, tokidx = 0; 2925 2926 if (tokidx < ntok && tok[tokidx].X_op == O_register) 2927 r = regno (tok[tokidx++].X_add_number); 2928 else 2929 r = AXP_REG_ZERO; 2930 2931 set_tok_reg (newtok[0], r); 2932 2933 if (tokidx < ntok && 2934 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister)) 2935 r = regno (tok[tokidx++].X_add_number); 2936 else 2937 r = AXP_REG_RA; 2938 2939 set_tok_cpreg (newtok[1], r); 2940 2941 if (tokidx < ntok) 2942 newtok[2] = tok[tokidx]; 2943 else 2944 set_tok_const (newtok[2], strcmp (opname, "ret") == 0); 2945 2946 assemble_tokens (opname, newtok, 3, 0); 2947 } 2948 2949 /* Implement the ldgp macro. */ 2950 2951 static void 2952 emit_ldgp (const expressionS *tok ATTRIBUTE_UNUSED, 2953 int ntok ATTRIBUTE_UNUSED, 2954 const void * unused ATTRIBUTE_UNUSED) 2955 { 2956 #ifdef OBJ_AOUT 2957 FIXME 2958 #endif 2959 #if defined(OBJ_ECOFF) || defined(OBJ_ELF) 2960 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)" 2961 with appropriate constants and relocations. */ 2962 struct alpha_insn insn; 2963 expressionS newtok[3]; 2964 expressionS addend; 2965 2966 #ifdef OBJ_ECOFF 2967 if (regno (tok[2].X_add_number) == AXP_REG_PV) 2968 ecoff_set_gp_prolog_size (0); 2969 #endif 2970 2971 newtok[0] = tok[0]; 2972 set_tok_const (newtok[1], 0); 2973 newtok[2] = tok[2]; 2974 2975 assemble_tokens_to_insn ("ldah", newtok, 3, &insn); 2976 2977 addend = tok[1]; 2978 2979 #ifdef OBJ_ECOFF 2980 if (addend.X_op != O_constant) 2981 as_bad (_("can not resolve expression")); 2982 addend.X_op = O_symbol; 2983 addend.X_add_symbol = alpha_gp_symbol; 2984 #endif 2985 2986 insn.nfixups = 1; 2987 insn.fixups[0].exp = addend; 2988 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16; 2989 insn.sequence = next_sequence_num; 2990 2991 emit_insn (&insn); 2992 2993 set_tok_preg (newtok[2], tok[0].X_add_number); 2994 2995 assemble_tokens_to_insn ("lda", newtok, 3, &insn); 2996 2997 #ifdef OBJ_ECOFF 2998 addend.X_add_number += 4; 2999 #endif 3000 3001 insn.nfixups = 1; 3002 insn.fixups[0].exp = addend; 3003 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16; 3004 insn.sequence = next_sequence_num--; 3005 3006 emit_insn (&insn); 3007 #endif /* OBJ_ECOFF || OBJ_ELF */ 3008 } 3009 3010 /* The macro table. */ 3011 3012 static const struct alpha_macro alpha_macros[] = 3013 { 3014 /* Load/Store macros. */ 3015 { "lda", emit_lda, NULL, 3016 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3017 { "ldah", emit_ldah, NULL, 3018 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3019 3020 { "ldl", emit_ir_load, "ldl", 3021 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3022 { "ldl_l", emit_ir_load, "ldl_l", 3023 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3024 { "ldq", emit_ir_load, "ldq", 3025 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3026 { "ldq_l", emit_ir_load, "ldq_l", 3027 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3028 { "ldq_u", emit_ir_load, "ldq_u", 3029 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3030 { "ldf", emit_loadstore, "ldf", 3031 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3032 { "ldg", emit_loadstore, "ldg", 3033 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3034 { "lds", emit_loadstore, "lds", 3035 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3036 { "ldt", emit_loadstore, "ldt", 3037 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3038 3039 { "ldb", emit_ldX, (void *) 0, 3040 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3041 { "ldbu", emit_ldXu, (void *) 0, 3042 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3043 { "ldw", emit_ldX, (void *) 1, 3044 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3045 { "ldwu", emit_ldXu, (void *) 1, 3046 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3047 3048 { "uldw", emit_uldX, (void *) 1, 3049 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3050 { "uldwu", emit_uldXu, (void *) 1, 3051 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3052 { "uldl", emit_uldX, (void *) 2, 3053 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3054 { "uldlu", emit_uldXu, (void *) 2, 3055 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3056 { "uldq", emit_uldXu, (void *) 3, 3057 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3058 3059 { "ldgp", emit_ldgp, NULL, 3060 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } }, 3061 3062 { "ldi", emit_lda, NULL, 3063 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3064 { "ldil", emit_ldil, NULL, 3065 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3066 { "ldiq", emit_lda, NULL, 3067 { MACRO_IR, MACRO_EXP, MACRO_EOA } }, 3068 3069 { "stl", emit_loadstore, "stl", 3070 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3071 { "stl_c", emit_loadstore, "stl_c", 3072 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3073 { "stq", emit_loadstore, "stq", 3074 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3075 { "stq_c", emit_loadstore, "stq_c", 3076 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3077 { "stq_u", emit_loadstore, "stq_u", 3078 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3079 { "stf", emit_loadstore, "stf", 3080 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3081 { "stg", emit_loadstore, "stg", 3082 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3083 { "sts", emit_loadstore, "sts", 3084 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3085 { "stt", emit_loadstore, "stt", 3086 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3087 3088 { "stb", emit_stX, (void *) 0, 3089 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3090 { "stw", emit_stX, (void *) 1, 3091 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3092 { "ustw", emit_ustX, (void *) 1, 3093 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3094 { "ustl", emit_ustX, (void *) 2, 3095 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3096 { "ustq", emit_ustX, (void *) 3, 3097 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } }, 3098 3099 /* Arithmetic macros. */ 3100 3101 { "sextb", emit_sextX, (void *) 0, 3102 { MACRO_IR, MACRO_IR, MACRO_EOA, 3103 MACRO_IR, MACRO_EOA, 3104 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, 3105 { "sextw", emit_sextX, (void *) 1, 3106 { MACRO_IR, MACRO_IR, MACRO_EOA, 3107 MACRO_IR, MACRO_EOA, 3108 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } }, 3109 3110 { "divl", emit_division, "__divl", 3111 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3112 MACRO_IR, MACRO_IR, MACRO_EOA, 3113 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3114 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3115 { "divlu", emit_division, "__divlu", 3116 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3117 MACRO_IR, MACRO_IR, MACRO_EOA, 3118 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3119 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3120 { "divq", emit_division, "__divq", 3121 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3122 MACRO_IR, MACRO_IR, MACRO_EOA, 3123 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3124 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3125 { "divqu", emit_division, "__divqu", 3126 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3127 MACRO_IR, MACRO_IR, MACRO_EOA, 3128 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3129 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3130 { "reml", emit_division, "__reml", 3131 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3132 MACRO_IR, MACRO_IR, MACRO_EOA, 3133 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3134 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3135 { "remlu", emit_division, "__remlu", 3136 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3137 MACRO_IR, MACRO_IR, MACRO_EOA, 3138 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3139 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3140 { "remq", emit_division, "__remq", 3141 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3142 MACRO_IR, MACRO_IR, MACRO_EOA, 3143 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3144 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3145 { "remqu", emit_division, "__remqu", 3146 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA, 3147 MACRO_IR, MACRO_IR, MACRO_EOA, 3148 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA, 3149 MACRO_IR, MACRO_EXP, MACRO_EOA */ } }, 3150 3151 { "jsr", emit_jsrjmp, "jsr", 3152 { MACRO_PIR, MACRO_EXP, MACRO_EOA, 3153 MACRO_PIR, MACRO_EOA, 3154 MACRO_IR, MACRO_EXP, MACRO_EOA, 3155 MACRO_EXP, MACRO_EOA } }, 3156 { "jmp", emit_jsrjmp, "jmp", 3157 { MACRO_PIR, MACRO_EXP, MACRO_EOA, 3158 MACRO_PIR, MACRO_EOA, 3159 MACRO_IR, MACRO_EXP, MACRO_EOA, 3160 MACRO_EXP, MACRO_EOA } }, 3161 { "ret", emit_retjcr, "ret", 3162 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3163 MACRO_IR, MACRO_EOA, 3164 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3165 MACRO_PIR, MACRO_EOA, 3166 MACRO_EXP, MACRO_EOA, 3167 MACRO_EOA } }, 3168 { "jcr", emit_retjcr, "jcr", 3169 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3170 MACRO_IR, MACRO_EOA, 3171 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3172 MACRO_PIR, MACRO_EOA, 3173 MACRO_EXP, MACRO_EOA, 3174 MACRO_EOA } }, 3175 { "jsr_coroutine", emit_retjcr, "jcr", 3176 { MACRO_IR, MACRO_EXP, MACRO_EOA, 3177 MACRO_IR, MACRO_EOA, 3178 MACRO_PIR, MACRO_EXP, MACRO_EOA, 3179 MACRO_PIR, MACRO_EOA, 3180 MACRO_EXP, MACRO_EOA, 3181 MACRO_EOA } }, 3182 }; 3183 3184 static const unsigned int alpha_num_macros 3185 = sizeof (alpha_macros) / sizeof (*alpha_macros); 3186 3187 /* Search forward through all variants of a macro looking for a syntax 3188 match. */ 3189 3190 static const struct alpha_macro * 3191 find_macro_match (const struct alpha_macro *first_macro, 3192 const expressionS *tok, 3193 int *pntok) 3194 3195 { 3196 const struct alpha_macro *macro = first_macro; 3197 int ntok = *pntok; 3198 3199 do 3200 { 3201 const enum alpha_macro_arg *arg = macro->argsets; 3202 int tokidx = 0; 3203 3204 while (*arg) 3205 { 3206 switch (*arg) 3207 { 3208 case MACRO_EOA: 3209 if (tokidx == ntok) 3210 return macro; 3211 else 3212 tokidx = 0; 3213 break; 3214 3215 /* Index register. */ 3216 case MACRO_IR: 3217 if (tokidx >= ntok || tok[tokidx].X_op != O_register 3218 || !is_ir_num (tok[tokidx].X_add_number)) 3219 goto match_failed; 3220 ++tokidx; 3221 break; 3222 3223 /* Parenthesized index register. */ 3224 case MACRO_PIR: 3225 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister 3226 || !is_ir_num (tok[tokidx].X_add_number)) 3227 goto match_failed; 3228 ++tokidx; 3229 break; 3230 3231 /* Optional parenthesized index register. */ 3232 case MACRO_OPIR: 3233 if (tokidx < ntok && tok[tokidx].X_op == O_pregister 3234 && is_ir_num (tok[tokidx].X_add_number)) 3235 ++tokidx; 3236 break; 3237 3238 /* Leading comma with a parenthesized index register. */ 3239 case MACRO_CPIR: 3240 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister 3241 || !is_ir_num (tok[tokidx].X_add_number)) 3242 goto match_failed; 3243 ++tokidx; 3244 break; 3245 3246 /* Floating point register. */ 3247 case MACRO_FPR: 3248 if (tokidx >= ntok || tok[tokidx].X_op != O_register 3249 || !is_fpr_num (tok[tokidx].X_add_number)) 3250 goto match_failed; 3251 ++tokidx; 3252 break; 3253 3254 /* Normal expression. */ 3255 case MACRO_EXP: 3256 if (tokidx >= ntok) 3257 goto match_failed; 3258 switch (tok[tokidx].X_op) 3259 { 3260 case O_illegal: 3261 case O_absent: 3262 case O_register: 3263 case O_pregister: 3264 case O_cpregister: 3265 case O_literal: 3266 case O_lituse_base: 3267 case O_lituse_bytoff: 3268 case O_lituse_jsr: 3269 case O_gpdisp: 3270 case O_gprelhigh: 3271 case O_gprellow: 3272 case O_gprel: 3273 case O_samegp: 3274 goto match_failed; 3275 3276 default: 3277 break; 3278 } 3279 ++tokidx; 3280 break; 3281 3282 match_failed: 3283 while (*arg != MACRO_EOA) 3284 ++arg; 3285 tokidx = 0; 3286 break; 3287 } 3288 ++arg; 3289 } 3290 } 3291 while (++macro - alpha_macros < (int) alpha_num_macros 3292 && !strcmp (macro->name, first_macro->name)); 3293 3294 return NULL; 3295 } 3296 3297 /* Given an opcode name and a pre-tokenized set of arguments, take the 3298 opcode all the way through emission. */ 3299 3300 static void 3301 assemble_tokens (const char *opname, 3302 const expressionS *tok, 3303 int ntok, 3304 int local_macros_on) 3305 { 3306 int found_something = 0; 3307 const struct alpha_opcode *opcode; 3308 const struct alpha_macro *macro; 3309 int cpumatch = 1; 3310 extended_bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED; 3311 3312 #ifdef RELOC_OP_P 3313 /* If a user-specified relocation is present, this is not a macro. */ 3314 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op)) 3315 { 3316 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc; 3317 ntok--; 3318 } 3319 else 3320 #endif 3321 if (local_macros_on) 3322 { 3323 macro = ((const struct alpha_macro *) 3324 hash_find (alpha_macro_hash, opname)); 3325 if (macro) 3326 { 3327 found_something = 1; 3328 macro = find_macro_match (macro, tok, &ntok); 3329 if (macro) 3330 { 3331 (*macro->emit) (tok, ntok, macro->arg); 3332 return; 3333 } 3334 } 3335 } 3336 3337 /* Search opcodes. */ 3338 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname); 3339 if (opcode) 3340 { 3341 found_something = 1; 3342 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch); 3343 if (opcode) 3344 { 3345 struct alpha_insn insn; 3346 assemble_insn (opcode, tok, ntok, &insn, reloc); 3347 3348 /* Copy the sequence number for the reloc from the reloc token. */ 3349 if (reloc != BFD_RELOC_UNUSED) 3350 insn.sequence = tok[ntok].X_add_number; 3351 3352 emit_insn (&insn); 3353 return; 3354 } 3355 } 3356 3357 if (found_something) 3358 { 3359 if (cpumatch) 3360 as_bad (_("inappropriate arguments for opcode `%s'"), opname); 3361 else 3362 as_bad (_("opcode `%s' not supported for target %s"), opname, 3363 alpha_target_name); 3364 } 3365 else 3366 as_bad (_("unknown opcode `%s'"), opname); 3367 } 3368 3369 #ifdef OBJ_EVAX 3370 3371 /* Add sym+addend to link pool. 3372 Return offset from current procedure value (pv) to entry in link pool. 3373 3374 Add new fixup only if offset isn't 16bit. */ 3375 3376 static symbolS * 3377 add_to_link_pool (symbolS *sym, offsetT addend) 3378 { 3379 symbolS *basesym; 3380 segT current_section = now_seg; 3381 int current_subsec = now_subseg; 3382 char *p; 3383 segment_info_type *seginfo = seg_info (alpha_link_section); 3384 fixS *fixp; 3385 symbolS *linksym, *expsym; 3386 expressionS e; 3387 3388 basesym = alpha_evax_proc->symbol; 3389 3390 /* @@ This assumes all entries in a given section will be of the same 3391 size... Probably correct, but unwise to rely on. */ 3392 /* This must always be called with the same subsegment. */ 3393 3394 if (seginfo->frchainP) 3395 for (fixp = seginfo->frchainP->fix_root; 3396 fixp != (fixS *) NULL; 3397 fixp = fixp->fx_next) 3398 { 3399 if (fixp->fx_addsy == sym 3400 && fixp->fx_offset == (valueT)addend 3401 && fixp->tc_fix_data.info 3402 && fixp->tc_fix_data.info->sym 3403 && fixp->tc_fix_data.info->sym->sy_value.X_op_symbol == basesym) 3404 return fixp->tc_fix_data.info->sym; 3405 } 3406 3407 /* Not found, add a new entry. */ 3408 subseg_set (alpha_link_section, 0); 3409 linksym = symbol_new 3410 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 3411 p = frag_more (8); 3412 memset (p, 0, 8); 3413 3414 /* Create a symbol for 'basesym - linksym' (offset of the added entry). */ 3415 e.X_op = O_subtract; 3416 e.X_add_symbol = linksym; 3417 e.X_op_symbol = basesym; 3418 e.X_add_number = 0; 3419 expsym = make_expr_symbol (&e); 3420 3421 /* Create a fixup for the entry. */ 3422 fixp = fix_new 3423 (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0, BFD_RELOC_64); 3424 fixp->tc_fix_data.info = get_alpha_reloc_tag (next_sequence_num--); 3425 fixp->tc_fix_data.info->sym = expsym; 3426 3427 subseg_set (current_section, current_subsec); 3428 3429 /* Return the symbol. */ 3430 return expsym; 3431 } 3432 #endif /* OBJ_EVAX */ 3433 3434 /* Assembler directives. */ 3435 3436 /* Handle the .text pseudo-op. This is like the usual one, but it 3437 clears alpha_insn_label and restores auto alignment. */ 3438 3439 static void 3440 s_alpha_text (int i) 3441 { 3442 #ifdef OBJ_ELF 3443 obj_elf_text (i); 3444 #else 3445 s_text (i); 3446 #endif 3447 #ifdef OBJ_EVAX 3448 { 3449 symbolS * symbolP; 3450 3451 symbolP = symbol_find (".text"); 3452 if (symbolP == NULL) 3453 { 3454 symbolP = symbol_make (".text"); 3455 S_SET_SEGMENT (symbolP, text_section); 3456 symbol_table_insert (symbolP); 3457 } 3458 } 3459 #endif 3460 alpha_insn_label = NULL; 3461 alpha_auto_align_on = 1; 3462 alpha_current_align = 0; 3463 } 3464 3465 /* Handle the .data pseudo-op. This is like the usual one, but it 3466 clears alpha_insn_label and restores auto alignment. */ 3467 3468 static void 3469 s_alpha_data (int i) 3470 { 3471 #ifdef OBJ_ELF 3472 obj_elf_data (i); 3473 #else 3474 s_data (i); 3475 #endif 3476 alpha_insn_label = NULL; 3477 alpha_auto_align_on = 1; 3478 alpha_current_align = 0; 3479 } 3480 3481 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX) 3482 3483 /* Handle the OSF/1 and openVMS .comm pseudo quirks. */ 3484 3485 static void 3486 s_alpha_comm (int ignore ATTRIBUTE_UNUSED) 3487 { 3488 char *name; 3489 char c; 3490 char *p; 3491 offsetT size; 3492 symbolS *symbolP; 3493 #ifdef OBJ_EVAX 3494 offsetT temp; 3495 int log_align = 0; 3496 #endif 3497 3498 c = get_symbol_name (&name); 3499 3500 /* Just after name is now '\0'. */ 3501 p = input_line_pointer; 3502 *p = c; 3503 3504 SKIP_WHITESPACE_AFTER_NAME (); 3505 3506 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */ 3507 if (*input_line_pointer == ',') 3508 { 3509 input_line_pointer++; 3510 SKIP_WHITESPACE (); 3511 } 3512 if ((size = get_absolute_expression ()) < 0) 3513 { 3514 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size); 3515 ignore_rest_of_line (); 3516 return; 3517 } 3518 3519 *p = 0; 3520 symbolP = symbol_find_or_make (name); 3521 *p = c; 3522 3523 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP)) 3524 { 3525 as_bad (_("Ignoring attempt to re-define symbol")); 3526 ignore_rest_of_line (); 3527 return; 3528 } 3529 3530 #ifdef OBJ_EVAX 3531 if (*input_line_pointer != ',') 3532 temp = 8; /* Default alignment. */ 3533 else 3534 { 3535 input_line_pointer++; 3536 SKIP_WHITESPACE (); 3537 temp = get_absolute_expression (); 3538 } 3539 3540 /* ??? Unlike on OSF/1, the alignment factor is not in log units. */ 3541 while ((temp >>= 1) != 0) 3542 ++log_align; 3543 3544 if (*input_line_pointer == ',') 3545 { 3546 /* Extended form of the directive 3547 3548 .comm symbol, size, alignment, section 3549 3550 where the "common" semantics is transferred to the section. 3551 The symbol is effectively an alias for the section name. */ 3552 3553 segT sec; 3554 const char *sec_name; 3555 symbolS *sec_symbol; 3556 segT current_seg = now_seg; 3557 subsegT current_subseg = now_subseg; 3558 int cur_size; 3559 3560 input_line_pointer++; 3561 SKIP_WHITESPACE (); 3562 sec_name = s_alpha_section_name (); 3563 sec_symbol = symbol_find_or_make (sec_name); 3564 sec = subseg_new (sec_name, 0); 3565 S_SET_SEGMENT (sec_symbol, sec); 3566 symbol_get_bfdsym (sec_symbol)->flags |= BSF_SECTION_SYM; 3567 bfd_vms_set_section_flags (stdoutput, sec, 0, 3568 EGPS__V_OVR | EGPS__V_GBL | EGPS__V_NOMOD); 3569 record_alignment (sec, log_align); 3570 3571 /* Reuse stab_string_size to store the size of the section. */ 3572 cur_size = seg_info (sec)->stabu.stab_string_size; 3573 if ((int) size > cur_size) 3574 { 3575 char *pfrag 3576 = frag_var (rs_fill, 1, 1, (relax_substateT)0, NULL, 3577 (valueT)size - (valueT)cur_size, NULL); 3578 *pfrag = 0; 3579 seg_info (sec)->stabu.stab_string_size = (int)size; 3580 } 3581 3582 S_SET_SEGMENT (symbolP, sec); 3583 3584 subseg_set (current_seg, current_subseg); 3585 } 3586 else 3587 { 3588 /* Regular form of the directive 3589 3590 .comm symbol, size, alignment 3591 3592 where the "common" semantics in on the symbol. 3593 These symbols are assembled in the .bss section. */ 3594 3595 char *pfrag; 3596 segT current_seg = now_seg; 3597 subsegT current_subseg = now_subseg; 3598 3599 subseg_set (bss_section, 1); 3600 frag_align (log_align, 0, 0); 3601 record_alignment (bss_section, log_align); 3602 3603 symbol_set_frag (symbolP, frag_now); 3604 pfrag = frag_var (rs_org, 1, 1, (relax_substateT)0, symbolP, 3605 size, NULL); 3606 *pfrag = 0; 3607 3608 S_SET_SEGMENT (symbolP, bss_section); 3609 3610 subseg_set (current_seg, current_subseg); 3611 } 3612 #endif 3613 3614 if (S_GET_VALUE (symbolP)) 3615 { 3616 if (S_GET_VALUE (symbolP) != (valueT) size) 3617 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."), 3618 S_GET_NAME (symbolP), 3619 (long) S_GET_VALUE (symbolP), 3620 (long) size); 3621 } 3622 else 3623 { 3624 #ifndef OBJ_EVAX 3625 S_SET_VALUE (symbolP, (valueT) size); 3626 #endif 3627 S_SET_EXTERNAL (symbolP); 3628 } 3629 3630 #ifndef OBJ_EVAX 3631 know (symbolP->sy_frag == &zero_address_frag); 3632 #endif 3633 demand_empty_rest_of_line (); 3634 } 3635 3636 #endif /* ! OBJ_ELF */ 3637 3638 #ifdef OBJ_ECOFF 3639 3640 /* Handle the .rdata pseudo-op. This is like the usual one, but it 3641 clears alpha_insn_label and restores auto alignment. */ 3642 3643 static void 3644 s_alpha_rdata (int ignore ATTRIBUTE_UNUSED) 3645 { 3646 get_absolute_expression (); 3647 subseg_new (".rdata", 0); 3648 demand_empty_rest_of_line (); 3649 alpha_insn_label = NULL; 3650 alpha_auto_align_on = 1; 3651 alpha_current_align = 0; 3652 } 3653 3654 #endif 3655 3656 #ifdef OBJ_ECOFF 3657 3658 /* Handle the .sdata pseudo-op. This is like the usual one, but it 3659 clears alpha_insn_label and restores auto alignment. */ 3660 3661 static void 3662 s_alpha_sdata (int ignore ATTRIBUTE_UNUSED) 3663 { 3664 get_absolute_expression (); 3665 subseg_new (".sdata", 0); 3666 demand_empty_rest_of_line (); 3667 alpha_insn_label = NULL; 3668 alpha_auto_align_on = 1; 3669 alpha_current_align = 0; 3670 } 3671 #endif 3672 3673 #ifdef OBJ_ELF 3674 struct alpha_elf_frame_data 3675 { 3676 symbolS *func_sym; 3677 symbolS *func_end_sym; 3678 symbolS *prologue_sym; 3679 unsigned int mask; 3680 unsigned int fmask; 3681 int fp_regno; 3682 int ra_regno; 3683 offsetT frame_size; 3684 offsetT mask_offset; 3685 offsetT fmask_offset; 3686 3687 struct alpha_elf_frame_data *next; 3688 }; 3689 3690 static struct alpha_elf_frame_data *all_frame_data; 3691 static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data; 3692 static struct alpha_elf_frame_data *cur_frame_data; 3693 3694 extern int all_cfi_sections; 3695 3696 /* Handle the .section pseudo-op. This is like the usual one, but it 3697 clears alpha_insn_label and restores auto alignment. */ 3698 3699 static void 3700 s_alpha_section (int ignore ATTRIBUTE_UNUSED) 3701 { 3702 obj_elf_section (ignore); 3703 3704 alpha_insn_label = NULL; 3705 alpha_auto_align_on = 1; 3706 alpha_current_align = 0; 3707 } 3708 3709 static void 3710 s_alpha_ent (int dummy ATTRIBUTE_UNUSED) 3711 { 3712 if (ECOFF_DEBUGGING) 3713 ecoff_directive_ent (0); 3714 else 3715 { 3716 char *name, name_end; 3717 3718 name_end = get_symbol_name (&name); 3719 /* CFI_EMIT_eh_frame is the default. */ 3720 all_cfi_sections = CFI_EMIT_eh_frame; 3721 3722 if (! is_name_beginner (*name)) 3723 { 3724 as_warn (_(".ent directive has no name")); 3725 (void) restore_line_pointer (name_end); 3726 } 3727 else 3728 { 3729 symbolS *sym; 3730 3731 if (cur_frame_data) 3732 as_warn (_("nested .ent directives")); 3733 3734 sym = symbol_find_or_make (name); 3735 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; 3736 3737 cur_frame_data = XCNEW (struct alpha_elf_frame_data); 3738 cur_frame_data->func_sym = sym; 3739 3740 /* Provide sensible defaults. */ 3741 cur_frame_data->fp_regno = 30; /* sp */ 3742 cur_frame_data->ra_regno = 26; /* ra */ 3743 3744 *plast_frame_data = cur_frame_data; 3745 plast_frame_data = &cur_frame_data->next; 3746 3747 /* The .ent directive is sometimes followed by a number. Not sure 3748 what it really means, but ignore it. */ 3749 *input_line_pointer = name_end; 3750 SKIP_WHITESPACE_AFTER_NAME (); 3751 if (*input_line_pointer == ',') 3752 { 3753 input_line_pointer++; 3754 SKIP_WHITESPACE (); 3755 } 3756 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-') 3757 (void) get_absolute_expression (); 3758 } 3759 demand_empty_rest_of_line (); 3760 } 3761 } 3762 3763 static void 3764 s_alpha_end (int dummy ATTRIBUTE_UNUSED) 3765 { 3766 if (ECOFF_DEBUGGING) 3767 ecoff_directive_end (0); 3768 else 3769 { 3770 char *name, name_end; 3771 3772 name_end = get_symbol_name (&name); 3773 3774 if (! is_name_beginner (*name)) 3775 { 3776 as_warn (_(".end directive has no name")); 3777 } 3778 else 3779 { 3780 symbolS *sym; 3781 3782 sym = symbol_find (name); 3783 if (!cur_frame_data) 3784 as_warn (_(".end directive without matching .ent")); 3785 else if (sym != cur_frame_data->func_sym) 3786 as_warn (_(".end directive names different symbol than .ent")); 3787 3788 /* Create an expression to calculate the size of the function. */ 3789 if (sym && cur_frame_data) 3790 { 3791 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym); 3792 expressionS *exp = XNEW (expressionS); 3793 3794 obj->size = exp; 3795 exp->X_op = O_subtract; 3796 exp->X_add_symbol = symbol_temp_new_now (); 3797 exp->X_op_symbol = sym; 3798 exp->X_add_number = 0; 3799 3800 cur_frame_data->func_end_sym = exp->X_add_symbol; 3801 } 3802 3803 cur_frame_data = NULL; 3804 } 3805 3806 (void) restore_line_pointer (name_end); 3807 demand_empty_rest_of_line (); 3808 } 3809 } 3810 3811 static void 3812 s_alpha_mask (int fp) 3813 { 3814 if (ECOFF_DEBUGGING) 3815 { 3816 if (fp) 3817 ecoff_directive_fmask (0); 3818 else 3819 ecoff_directive_mask (0); 3820 } 3821 else 3822 { 3823 long val; 3824 offsetT offset; 3825 3826 if (!cur_frame_data) 3827 { 3828 if (fp) 3829 as_warn (_(".fmask outside of .ent")); 3830 else 3831 as_warn (_(".mask outside of .ent")); 3832 discard_rest_of_line (); 3833 return; 3834 } 3835 3836 if (get_absolute_expression_and_terminator (&val) != ',') 3837 { 3838 if (fp) 3839 as_warn (_("bad .fmask directive")); 3840 else 3841 as_warn (_("bad .mask directive")); 3842 --input_line_pointer; 3843 discard_rest_of_line (); 3844 return; 3845 } 3846 3847 offset = get_absolute_expression (); 3848 demand_empty_rest_of_line (); 3849 3850 if (fp) 3851 { 3852 cur_frame_data->fmask = val; 3853 cur_frame_data->fmask_offset = offset; 3854 } 3855 else 3856 { 3857 cur_frame_data->mask = val; 3858 cur_frame_data->mask_offset = offset; 3859 } 3860 } 3861 } 3862 3863 static void 3864 s_alpha_frame (int dummy ATTRIBUTE_UNUSED) 3865 { 3866 if (ECOFF_DEBUGGING) 3867 ecoff_directive_frame (0); 3868 else 3869 { 3870 long val; 3871 3872 if (!cur_frame_data) 3873 { 3874 as_warn (_(".frame outside of .ent")); 3875 discard_rest_of_line (); 3876 return; 3877 } 3878 3879 cur_frame_data->fp_regno = tc_get_register (1); 3880 3881 SKIP_WHITESPACE (); 3882 if (*input_line_pointer++ != ',' 3883 || get_absolute_expression_and_terminator (&val) != ',') 3884 { 3885 as_warn (_("bad .frame directive")); 3886 --input_line_pointer; 3887 discard_rest_of_line (); 3888 return; 3889 } 3890 cur_frame_data->frame_size = val; 3891 3892 cur_frame_data->ra_regno = tc_get_register (0); 3893 3894 /* Next comes the "offset of saved $a0 from $sp". In gcc terms 3895 this is current_function_pretend_args_size. There's no place 3896 to put this value, so ignore it. */ 3897 s_ignore (42); 3898 } 3899 } 3900 3901 static void 3902 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) 3903 { 3904 symbolS *sym; 3905 int arg; 3906 3907 arg = get_absolute_expression (); 3908 demand_empty_rest_of_line (); 3909 alpha_prologue_label = symbol_new 3910 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 3911 3912 if (ECOFF_DEBUGGING) 3913 sym = ecoff_get_cur_proc_sym (); 3914 else 3915 sym = cur_frame_data ? cur_frame_data->func_sym : NULL; 3916 3917 if (sym == NULL) 3918 { 3919 as_bad (_(".prologue directive without a preceding .ent directive")); 3920 return; 3921 } 3922 3923 switch (arg) 3924 { 3925 case 0: /* No PV required. */ 3926 S_SET_OTHER (sym, STO_ALPHA_NOPV 3927 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 3928 break; 3929 case 1: /* Std GP load. */ 3930 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD 3931 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 3932 break; 3933 case 2: /* Non-std use of PV. */ 3934 break; 3935 3936 default: 3937 as_bad (_("Invalid argument %d to .prologue."), arg); 3938 break; 3939 } 3940 3941 if (cur_frame_data) 3942 cur_frame_data->prologue_sym = symbol_temp_new_now (); 3943 } 3944 3945 static char *first_file_directive; 3946 3947 static void 3948 s_alpha_file (int ignore ATTRIBUTE_UNUSED) 3949 { 3950 /* Save the first .file directive we see, so that we can change our 3951 minds about whether ecoff debugging should or shouldn't be enabled. */ 3952 if (alpha_flag_mdebug < 0 && ! first_file_directive) 3953 { 3954 char *start = input_line_pointer; 3955 size_t len; 3956 3957 discard_rest_of_line (); 3958 3959 len = input_line_pointer - start; 3960 first_file_directive = xmemdup0 (start, len); 3961 3962 input_line_pointer = start; 3963 } 3964 3965 if (ECOFF_DEBUGGING) 3966 ecoff_directive_file (0); 3967 else 3968 dwarf2_directive_file (0); 3969 } 3970 3971 static void 3972 s_alpha_loc (int ignore ATTRIBUTE_UNUSED) 3973 { 3974 if (ECOFF_DEBUGGING) 3975 ecoff_directive_loc (0); 3976 else 3977 dwarf2_directive_loc (0); 3978 } 3979 3980 static void 3981 s_alpha_stab (int n) 3982 { 3983 /* If we've been undecided about mdebug, make up our minds in favour. */ 3984 if (alpha_flag_mdebug < 0) 3985 { 3986 segT sec = subseg_new (".mdebug", 0); 3987 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); 3988 bfd_set_section_alignment (stdoutput, sec, 3); 3989 3990 ecoff_read_begin_hook (); 3991 3992 if (first_file_directive) 3993 { 3994 char *save_ilp = input_line_pointer; 3995 input_line_pointer = first_file_directive; 3996 ecoff_directive_file (0); 3997 input_line_pointer = save_ilp; 3998 free (first_file_directive); 3999 } 4000 4001 alpha_flag_mdebug = 1; 4002 } 4003 s_stab (n); 4004 } 4005 4006 static void 4007 s_alpha_coff_wrapper (int which) 4008 { 4009 static void (* const fns[]) (int) = { 4010 ecoff_directive_begin, 4011 ecoff_directive_bend, 4012 ecoff_directive_def, 4013 ecoff_directive_dim, 4014 ecoff_directive_endef, 4015 ecoff_directive_scl, 4016 ecoff_directive_tag, 4017 ecoff_directive_val, 4018 }; 4019 4020 gas_assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns))); 4021 4022 if (ECOFF_DEBUGGING) 4023 (*fns[which]) (0); 4024 else 4025 { 4026 as_bad (_("ECOFF debugging is disabled.")); 4027 ignore_rest_of_line (); 4028 } 4029 } 4030 4031 /* Called at the end of assembly. Here we emit unwind info for frames 4032 unless the compiler has done it for us. */ 4033 4034 void 4035 alpha_elf_md_end (void) 4036 { 4037 struct alpha_elf_frame_data *p; 4038 4039 if (cur_frame_data) 4040 as_warn (_(".ent directive without matching .end")); 4041 4042 /* If someone has generated the unwind info themselves, great. */ 4043 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL) 4044 return; 4045 4046 /* ??? In theory we could look for functions for which we have 4047 generated unwind info via CFI directives, and those we have not. 4048 Those we have not could still get their unwind info from here. 4049 For now, do nothing if we've seen any CFI directives. Note that 4050 the above test will not trigger, as we've not emitted data yet. */ 4051 if (all_fde_data != NULL) 4052 return; 4053 4054 /* Generate .eh_frame data for the unwind directives specified. */ 4055 for (p = all_frame_data; p ; p = p->next) 4056 if (p->prologue_sym) 4057 { 4058 /* Create a temporary symbol at the same location as our 4059 function symbol. This prevents problems with globals. */ 4060 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym), 4061 S_GET_VALUE (p->func_sym), 4062 symbol_get_frag (p->func_sym))); 4063 4064 cfi_set_sections (); 4065 cfi_set_return_column (p->ra_regno); 4066 cfi_add_CFA_def_cfa_register (30); 4067 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size) 4068 { 4069 unsigned int mask; 4070 offsetT offset; 4071 4072 cfi_add_advance_loc (p->prologue_sym); 4073 4074 if (p->fp_regno != 30) 4075 if (p->frame_size != 0) 4076 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size); 4077 else 4078 cfi_add_CFA_def_cfa_register (p->fp_regno); 4079 else if (p->frame_size != 0) 4080 cfi_add_CFA_def_cfa_offset (p->frame_size); 4081 4082 mask = p->mask; 4083 offset = p->mask_offset; 4084 4085 /* Recall that $26 is special-cased and stored first. */ 4086 if ((mask >> 26) & 1) 4087 { 4088 cfi_add_CFA_offset (26, offset); 4089 offset += 8; 4090 mask &= ~(1 << 26); 4091 } 4092 while (mask) 4093 { 4094 unsigned int i; 4095 i = mask & -mask; 4096 mask ^= i; 4097 i = ffs (i) - 1; 4098 4099 cfi_add_CFA_offset (i, offset); 4100 offset += 8; 4101 } 4102 4103 mask = p->fmask; 4104 offset = p->fmask_offset; 4105 while (mask) 4106 { 4107 unsigned int i; 4108 i = mask & -mask; 4109 mask ^= i; 4110 i = ffs (i) - 1; 4111 4112 cfi_add_CFA_offset (i + 32, offset); 4113 offset += 8; 4114 } 4115 } 4116 4117 cfi_end_fde (p->func_end_sym); 4118 } 4119 } 4120 4121 static void 4122 s_alpha_usepv (int unused ATTRIBUTE_UNUSED) 4123 { 4124 char *name, name_end; 4125 char *which, which_end; 4126 symbolS *sym; 4127 int other; 4128 4129 name_end = get_symbol_name (&name); 4130 4131 if (! is_name_beginner (*name)) 4132 { 4133 as_bad (_(".usepv directive has no name")); 4134 (void) restore_line_pointer (name_end); 4135 ignore_rest_of_line (); 4136 return; 4137 } 4138 4139 sym = symbol_find_or_make (name); 4140 name_end = restore_line_pointer (name_end); 4141 if (! is_end_of_line[(unsigned char) name_end]) 4142 input_line_pointer++; 4143 4144 if (name_end != ',') 4145 { 4146 as_bad (_(".usepv directive has no type")); 4147 ignore_rest_of_line (); 4148 return; 4149 } 4150 4151 SKIP_WHITESPACE (); 4152 4153 which_end = get_symbol_name (&which); 4154 4155 if (strcmp (which, "no") == 0) 4156 other = STO_ALPHA_NOPV; 4157 else if (strcmp (which, "std") == 0) 4158 other = STO_ALPHA_STD_GPLOAD; 4159 else 4160 { 4161 as_bad (_("unknown argument for .usepv")); 4162 other = 0; 4163 } 4164 4165 (void) restore_line_pointer (which_end); 4166 demand_empty_rest_of_line (); 4167 4168 S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD)); 4169 } 4170 #endif /* OBJ_ELF */ 4171 4172 /* Standard calling conventions leaves the CFA at $30 on entry. */ 4173 4174 void 4175 alpha_cfi_frame_initial_instructions (void) 4176 { 4177 cfi_add_CFA_def_cfa_register (30); 4178 } 4179 4180 #ifdef OBJ_EVAX 4181 4182 /* Get name of section. */ 4183 static const char * 4184 s_alpha_section_name (void) 4185 { 4186 char *name; 4187 4188 SKIP_WHITESPACE (); 4189 if (*input_line_pointer == '"') 4190 { 4191 int dummy; 4192 4193 name = demand_copy_C_string (&dummy); 4194 if (name == NULL) 4195 { 4196 ignore_rest_of_line (); 4197 return NULL; 4198 } 4199 } 4200 else 4201 { 4202 char *end = input_line_pointer; 4203 4204 while (0 == strchr ("\n\t,; ", *end)) 4205 end++; 4206 if (end == input_line_pointer) 4207 { 4208 as_warn (_("missing name")); 4209 ignore_rest_of_line (); 4210 return NULL; 4211 } 4212 4213 name = xmemdup0 (input_line_pointer, end - input_line_pointer); 4214 input_line_pointer = end; 4215 } 4216 SKIP_WHITESPACE (); 4217 return name; 4218 } 4219 4220 /* Put clear/set flags in one flagword. The LSBs are flags to be set, 4221 the MSBs are the flags to be cleared. */ 4222 4223 #define EGPS__V_NO_SHIFT 16 4224 #define EGPS__V_MASK 0xffff 4225 4226 /* Parse one VMS section flag. */ 4227 4228 static flagword 4229 s_alpha_section_word (char *str, size_t len) 4230 { 4231 int no = 0; 4232 flagword flag = 0; 4233 4234 if (len == 5 && strncmp (str, "NO", 2) == 0) 4235 { 4236 no = 1; 4237 str += 2; 4238 len -= 2; 4239 } 4240 4241 if (len == 3) 4242 { 4243 if (strncmp (str, "PIC", 3) == 0) 4244 flag = EGPS__V_PIC; 4245 else if (strncmp (str, "LIB", 3) == 0) 4246 flag = EGPS__V_LIB; 4247 else if (strncmp (str, "OVR", 3) == 0) 4248 flag = EGPS__V_OVR; 4249 else if (strncmp (str, "REL", 3) == 0) 4250 flag = EGPS__V_REL; 4251 else if (strncmp (str, "GBL", 3) == 0) 4252 flag = EGPS__V_GBL; 4253 else if (strncmp (str, "SHR", 3) == 0) 4254 flag = EGPS__V_SHR; 4255 else if (strncmp (str, "EXE", 3) == 0) 4256 flag = EGPS__V_EXE; 4257 else if (strncmp (str, "WRT", 3) == 0) 4258 flag = EGPS__V_WRT; 4259 else if (strncmp (str, "VEC", 3) == 0) 4260 flag = EGPS__V_VEC; 4261 else if (strncmp (str, "MOD", 3) == 0) 4262 { 4263 flag = no ? EGPS__V_NOMOD : EGPS__V_NOMOD << EGPS__V_NO_SHIFT; 4264 no = 0; 4265 } 4266 else if (strncmp (str, "COM", 3) == 0) 4267 flag = EGPS__V_COM; 4268 } 4269 4270 if (flag == 0) 4271 { 4272 char c = str[len]; 4273 str[len] = 0; 4274 as_warn (_("unknown section attribute %s"), str); 4275 str[len] = c; 4276 return 0; 4277 } 4278 4279 if (no) 4280 return flag << EGPS__V_NO_SHIFT; 4281 else 4282 return flag; 4283 } 4284 4285 /* Handle the section specific pseudo-op. */ 4286 4287 #define EVAX_SECTION_COUNT 5 4288 4289 static const char *section_name[EVAX_SECTION_COUNT + 1] = 4290 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" }; 4291 4292 static void 4293 s_alpha_section (int secid) 4294 { 4295 const char *name; 4296 char *beg; 4297 segT sec; 4298 flagword vms_flags = 0; 4299 symbolS *symbol; 4300 4301 if (secid == 0) 4302 { 4303 name = s_alpha_section_name (); 4304 if (name == NULL) 4305 return; 4306 sec = subseg_new (name, 0); 4307 if (*input_line_pointer == ',') 4308 { 4309 /* Skip the comma. */ 4310 ++input_line_pointer; 4311 SKIP_WHITESPACE (); 4312 4313 do 4314 { 4315 char c; 4316 4317 SKIP_WHITESPACE (); 4318 c = get_symbol_name (&beg); 4319 *input_line_pointer = c; 4320 4321 vms_flags |= s_alpha_section_word (beg, input_line_pointer - beg); 4322 4323 SKIP_WHITESPACE_AFTER_NAME (); 4324 } 4325 while (*input_line_pointer++ == ','); 4326 4327 --input_line_pointer; 4328 } 4329 4330 symbol = symbol_find_or_make (name); 4331 S_SET_SEGMENT (symbol, sec); 4332 symbol_get_bfdsym (symbol)->flags |= BSF_SECTION_SYM; 4333 bfd_vms_set_section_flags 4334 (stdoutput, sec, 4335 (vms_flags >> EGPS__V_NO_SHIFT) & EGPS__V_MASK, 4336 vms_flags & EGPS__V_MASK); 4337 } 4338 else 4339 { 4340 get_absolute_expression (); 4341 subseg_new (section_name[secid], 0); 4342 } 4343 4344 demand_empty_rest_of_line (); 4345 alpha_insn_label = NULL; 4346 alpha_auto_align_on = 1; 4347 alpha_current_align = 0; 4348 } 4349 4350 static void 4351 s_alpha_literals (int ignore ATTRIBUTE_UNUSED) 4352 { 4353 subseg_new (".literals", 0); 4354 demand_empty_rest_of_line (); 4355 alpha_insn_label = NULL; 4356 alpha_auto_align_on = 1; 4357 alpha_current_align = 0; 4358 } 4359 4360 /* Parse .ent directives. */ 4361 4362 static void 4363 s_alpha_ent (int ignore ATTRIBUTE_UNUSED) 4364 { 4365 symbolS *symbol; 4366 expressionS symexpr; 4367 4368 if (alpha_evax_proc != NULL) 4369 as_bad (_("previous .ent not closed by a .end")); 4370 4371 alpha_evax_proc = &alpha_evax_proc_data; 4372 4373 alpha_evax_proc->pdsckind = 0; 4374 alpha_evax_proc->framereg = -1; 4375 alpha_evax_proc->framesize = 0; 4376 alpha_evax_proc->rsa_offset = 0; 4377 alpha_evax_proc->ra_save = AXP_REG_RA; 4378 alpha_evax_proc->fp_save = -1; 4379 alpha_evax_proc->imask = 0; 4380 alpha_evax_proc->fmask = 0; 4381 alpha_evax_proc->prologue = 0; 4382 alpha_evax_proc->type = 0; 4383 alpha_evax_proc->handler = 0; 4384 alpha_evax_proc->handler_data = 0; 4385 4386 expression (&symexpr); 4387 4388 if (symexpr.X_op != O_symbol) 4389 { 4390 as_fatal (_(".ent directive has no symbol")); 4391 demand_empty_rest_of_line (); 4392 return; 4393 } 4394 4395 symbol = make_expr_symbol (&symexpr); 4396 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION; 4397 alpha_evax_proc->symbol = symbol; 4398 4399 demand_empty_rest_of_line (); 4400 } 4401 4402 static void 4403 s_alpha_handler (int is_data) 4404 { 4405 if (is_data) 4406 alpha_evax_proc->handler_data = get_absolute_expression (); 4407 else 4408 { 4409 char *name, name_end; 4410 4411 name_end = get_symbol_name (&name); 4412 4413 if (! is_name_beginner (*name)) 4414 { 4415 as_warn (_(".handler directive has no name")); 4416 } 4417 else 4418 { 4419 symbolS *sym; 4420 4421 sym = symbol_find_or_make (name); 4422 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION; 4423 alpha_evax_proc->handler = sym; 4424 } 4425 4426 (void) restore_line_pointer (name_end); 4427 } 4428 4429 demand_empty_rest_of_line (); 4430 } 4431 4432 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */ 4433 4434 static void 4435 s_alpha_frame (int ignore ATTRIBUTE_UNUSED) 4436 { 4437 long val; 4438 int ra; 4439 4440 alpha_evax_proc->framereg = tc_get_register (1); 4441 4442 SKIP_WHITESPACE (); 4443 if (*input_line_pointer++ != ',' 4444 || get_absolute_expression_and_terminator (&val) != ',') 4445 { 4446 as_warn (_("Bad .frame directive 1./2. param")); 4447 --input_line_pointer; 4448 demand_empty_rest_of_line (); 4449 return; 4450 } 4451 4452 alpha_evax_proc->framesize = val; 4453 4454 ra = tc_get_register (1); 4455 if (ra != AXP_REG_RA) 4456 as_warn (_("Bad RA (%d) register for .frame"), ra); 4457 4458 SKIP_WHITESPACE (); 4459 if (*input_line_pointer++ != ',') 4460 { 4461 as_warn (_("Bad .frame directive 3./4. param")); 4462 --input_line_pointer; 4463 demand_empty_rest_of_line (); 4464 return; 4465 } 4466 alpha_evax_proc->rsa_offset = get_absolute_expression (); 4467 } 4468 4469 /* Parse .prologue. */ 4470 4471 static void 4472 s_alpha_prologue (int ignore ATTRIBUTE_UNUSED) 4473 { 4474 demand_empty_rest_of_line (); 4475 alpha_prologue_label = symbol_new 4476 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 4477 } 4478 4479 /* Parse .pdesc <entry_name>,{null|stack|reg} 4480 Insert a procedure descriptor. */ 4481 4482 static void 4483 s_alpha_pdesc (int ignore ATTRIBUTE_UNUSED) 4484 { 4485 char *name; 4486 char name_end; 4487 char *p; 4488 expressionS exp; 4489 symbolS *entry_sym; 4490 const char *entry_sym_name; 4491 const char *pdesc_sym_name; 4492 fixS *fixp; 4493 size_t len; 4494 4495 if (now_seg != alpha_link_section) 4496 { 4497 as_bad (_(".pdesc directive not in link (.link) section")); 4498 return; 4499 } 4500 4501 expression (&exp); 4502 if (exp.X_op != O_symbol) 4503 { 4504 as_bad (_(".pdesc directive has no entry symbol")); 4505 return; 4506 } 4507 4508 entry_sym = make_expr_symbol (&exp); 4509 entry_sym_name = S_GET_NAME (entry_sym); 4510 4511 /* Strip "..en". */ 4512 len = strlen (entry_sym_name); 4513 if (len < 4 || strcmp (entry_sym_name + len - 4, "..en") != 0) 4514 { 4515 as_bad (_(".pdesc has a bad entry symbol")); 4516 return; 4517 } 4518 len -= 4; 4519 pdesc_sym_name = S_GET_NAME (alpha_evax_proc->symbol); 4520 4521 if (!alpha_evax_proc 4522 || !S_IS_DEFINED (alpha_evax_proc->symbol) 4523 || strlen (pdesc_sym_name) != len 4524 || memcmp (entry_sym_name, pdesc_sym_name, len) != 0) 4525 { 4526 as_fatal (_(".pdesc doesn't match with last .ent")); 4527 return; 4528 } 4529 4530 /* Define pdesc symbol. */ 4531 symbol_set_value_now (alpha_evax_proc->symbol); 4532 4533 /* Save bfd symbol of proc entry in function symbol. */ 4534 ((struct evax_private_udata_struct *) 4535 symbol_get_bfdsym (alpha_evax_proc->symbol)->udata.p)->enbsym 4536 = symbol_get_bfdsym (entry_sym); 4537 4538 SKIP_WHITESPACE (); 4539 if (*input_line_pointer++ != ',') 4540 { 4541 as_warn (_("No comma after .pdesc <entryname>")); 4542 demand_empty_rest_of_line (); 4543 return; 4544 } 4545 4546 SKIP_WHITESPACE (); 4547 name_end = get_symbol_name (&name); 4548 4549 if (strncmp (name, "stack", 5) == 0) 4550 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_STACK; 4551 4552 else if (strncmp (name, "reg", 3) == 0) 4553 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_FP_REGISTER; 4554 4555 else if (strncmp (name, "null", 4) == 0) 4556 alpha_evax_proc->pdsckind = PDSC_S_K_KIND_NULL; 4557 4558 else 4559 { 4560 (void) restore_line_pointer (name_end); 4561 as_fatal (_("unknown procedure kind")); 4562 demand_empty_rest_of_line (); 4563 return; 4564 } 4565 4566 (void) restore_line_pointer (name_end); 4567 demand_empty_rest_of_line (); 4568 4569 #ifdef md_flush_pending_output 4570 md_flush_pending_output (); 4571 #endif 4572 4573 frag_align (3, 0, 0); 4574 p = frag_more (16); 4575 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0); 4576 fixp->fx_done = 1; 4577 4578 *p = alpha_evax_proc->pdsckind 4579 | ((alpha_evax_proc->framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0) 4580 | ((alpha_evax_proc->handler) ? PDSC_S_M_HANDLER_VALID : 0) 4581 | ((alpha_evax_proc->handler_data) ? PDSC_S_M_HANDLER_DATA_VALID : 0); 4582 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET; 4583 4584 switch (alpha_evax_proc->pdsckind) 4585 { 4586 case PDSC_S_K_KIND_NULL: 4587 *(p + 2) = 0; 4588 *(p + 3) = 0; 4589 break; 4590 case PDSC_S_K_KIND_FP_REGISTER: 4591 *(p + 2) = alpha_evax_proc->fp_save; 4592 *(p + 3) = alpha_evax_proc->ra_save; 4593 break; 4594 case PDSC_S_K_KIND_FP_STACK: 4595 md_number_to_chars (p + 2, (valueT) alpha_evax_proc->rsa_offset, 2); 4596 break; 4597 default: /* impossible */ 4598 break; 4599 } 4600 4601 *(p + 4) = 0; 4602 *(p + 5) = alpha_evax_proc->type & 0x0f; 4603 4604 /* Signature offset. */ 4605 md_number_to_chars (p + 6, (valueT) 0, 2); 4606 4607 fix_new_exp (frag_now, p - frag_now->fr_literal + 8, 4608 8, &exp, 0, BFD_RELOC_64); 4609 4610 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_NULL) 4611 return; 4612 4613 /* pdesc+16: Size. */ 4614 p = frag_more (6); 4615 md_number_to_chars (p, (valueT) alpha_evax_proc->framesize, 4); 4616 md_number_to_chars (p + 4, (valueT) 0, 2); 4617 4618 /* Entry length. */ 4619 exp.X_op = O_subtract; 4620 exp.X_add_symbol = alpha_prologue_label; 4621 exp.X_op_symbol = entry_sym; 4622 emit_expr (&exp, 2); 4623 4624 if (alpha_evax_proc->pdsckind == PDSC_S_K_KIND_FP_REGISTER) 4625 return; 4626 4627 /* pdesc+24: register masks. */ 4628 p = frag_more (8); 4629 md_number_to_chars (p, alpha_evax_proc->imask, 4); 4630 md_number_to_chars (p + 4, alpha_evax_proc->fmask, 4); 4631 4632 if (alpha_evax_proc->handler) 4633 { 4634 p = frag_more (8); 4635 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 4636 alpha_evax_proc->handler, 0, 0, BFD_RELOC_64); 4637 } 4638 4639 if (alpha_evax_proc->handler_data) 4640 { 4641 p = frag_more (8); 4642 md_number_to_chars (p, alpha_evax_proc->handler_data, 8); 4643 } 4644 } 4645 4646 /* Support for crash debug on vms. */ 4647 4648 static void 4649 s_alpha_name (int ignore ATTRIBUTE_UNUSED) 4650 { 4651 char *p; 4652 expressionS exp; 4653 4654 if (now_seg != alpha_link_section) 4655 { 4656 as_bad (_(".name directive not in link (.link) section")); 4657 demand_empty_rest_of_line (); 4658 return; 4659 } 4660 4661 expression (&exp); 4662 if (exp.X_op != O_symbol) 4663 { 4664 as_warn (_(".name directive has no symbol")); 4665 demand_empty_rest_of_line (); 4666 return; 4667 } 4668 4669 demand_empty_rest_of_line (); 4670 4671 #ifdef md_flush_pending_output 4672 md_flush_pending_output (); 4673 #endif 4674 4675 frag_align (3, 0, 0); 4676 p = frag_more (8); 4677 4678 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64); 4679 } 4680 4681 /* Parse .linkage <symbol>. 4682 Create a linkage pair relocation. */ 4683 4684 static void 4685 s_alpha_linkage (int ignore ATTRIBUTE_UNUSED) 4686 { 4687 expressionS exp; 4688 char *p; 4689 fixS *fixp; 4690 4691 #ifdef md_flush_pending_output 4692 md_flush_pending_output (); 4693 #endif 4694 4695 expression (&exp); 4696 if (exp.X_op != O_symbol) 4697 { 4698 as_fatal (_("No symbol after .linkage")); 4699 } 4700 else 4701 { 4702 struct alpha_linkage_fixups *linkage_fixup; 4703 4704 p = frag_more (LKP_S_K_SIZE); 4705 memset (p, 0, LKP_S_K_SIZE); 4706 fixp = fix_new_exp 4707 (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0, 4708 BFD_RELOC_ALPHA_LINKAGE); 4709 4710 if (alpha_insn_label == NULL) 4711 alpha_insn_label = symbol_new 4712 (FAKE_LABEL_NAME, now_seg, (valueT) frag_now_fix (), frag_now); 4713 4714 /* Create a linkage element. */ 4715 linkage_fixup = XNEW (struct alpha_linkage_fixups); 4716 linkage_fixup->fixp = fixp; 4717 linkage_fixup->next = NULL; 4718 linkage_fixup->label = alpha_insn_label; 4719 4720 /* Append it to the list. */ 4721 if (alpha_linkage_fixup_root == NULL) 4722 alpha_linkage_fixup_root = linkage_fixup; 4723 else 4724 alpha_linkage_fixup_tail->next = linkage_fixup; 4725 alpha_linkage_fixup_tail = linkage_fixup; 4726 } 4727 demand_empty_rest_of_line (); 4728 } 4729 4730 /* Parse .code_address <symbol>. 4731 Create a code address relocation. */ 4732 4733 static void 4734 s_alpha_code_address (int ignore ATTRIBUTE_UNUSED) 4735 { 4736 expressionS exp; 4737 char *p; 4738 4739 #ifdef md_flush_pending_output 4740 md_flush_pending_output (); 4741 #endif 4742 4743 expression (&exp); 4744 if (exp.X_op != O_symbol) 4745 as_fatal (_("No symbol after .code_address")); 4746 else 4747 { 4748 p = frag_more (8); 4749 memset (p, 0, 8); 4750 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\ 4751 BFD_RELOC_ALPHA_CODEADDR); 4752 } 4753 demand_empty_rest_of_line (); 4754 } 4755 4756 static void 4757 s_alpha_fp_save (int ignore ATTRIBUTE_UNUSED) 4758 { 4759 alpha_evax_proc->fp_save = tc_get_register (1); 4760 4761 demand_empty_rest_of_line (); 4762 } 4763 4764 static void 4765 s_alpha_mask (int ignore ATTRIBUTE_UNUSED) 4766 { 4767 long val; 4768 4769 if (get_absolute_expression_and_terminator (&val) != ',') 4770 { 4771 as_warn (_("Bad .mask directive")); 4772 --input_line_pointer; 4773 } 4774 else 4775 { 4776 alpha_evax_proc->imask = val; 4777 (void) get_absolute_expression (); 4778 } 4779 demand_empty_rest_of_line (); 4780 } 4781 4782 static void 4783 s_alpha_fmask (int ignore ATTRIBUTE_UNUSED) 4784 { 4785 long val; 4786 4787 if (get_absolute_expression_and_terminator (&val) != ',') 4788 { 4789 as_warn (_("Bad .fmask directive")); 4790 --input_line_pointer; 4791 } 4792 else 4793 { 4794 alpha_evax_proc->fmask = val; 4795 (void) get_absolute_expression (); 4796 } 4797 demand_empty_rest_of_line (); 4798 } 4799 4800 static void 4801 s_alpha_end (int ignore ATTRIBUTE_UNUSED) 4802 { 4803 char *name; 4804 char c; 4805 4806 c = get_symbol_name (&name); 4807 (void) restore_line_pointer (c); 4808 demand_empty_rest_of_line (); 4809 alpha_evax_proc = NULL; 4810 } 4811 4812 static void 4813 s_alpha_file (int ignore ATTRIBUTE_UNUSED) 4814 { 4815 symbolS *s; 4816 int length; 4817 static char case_hack[32]; 4818 4819 sprintf (case_hack, "<CASE:%01d%01d>", 4820 alpha_flag_hash_long_names, alpha_flag_show_after_trunc); 4821 4822 s = symbol_find_or_make (case_hack); 4823 symbol_get_bfdsym (s)->flags |= BSF_FILE; 4824 4825 get_absolute_expression (); 4826 s = symbol_find_or_make (demand_copy_string (&length)); 4827 symbol_get_bfdsym (s)->flags |= BSF_FILE; 4828 demand_empty_rest_of_line (); 4829 } 4830 #endif /* OBJ_EVAX */ 4831 4832 /* Handle the .gprel32 pseudo op. */ 4833 4834 static void 4835 s_alpha_gprel32 (int ignore ATTRIBUTE_UNUSED) 4836 { 4837 expressionS e; 4838 char *p; 4839 4840 SKIP_WHITESPACE (); 4841 expression (&e); 4842 4843 #ifdef OBJ_ELF 4844 switch (e.X_op) 4845 { 4846 case O_constant: 4847 e.X_add_symbol = section_symbol (absolute_section); 4848 e.X_op = O_symbol; 4849 /* FALLTHRU */ 4850 case O_symbol: 4851 break; 4852 default: 4853 abort (); 4854 } 4855 #else 4856 #ifdef OBJ_ECOFF 4857 switch (e.X_op) 4858 { 4859 case O_constant: 4860 e.X_add_symbol = section_symbol (absolute_section); 4861 /* fall through */ 4862 case O_symbol: 4863 e.X_op = O_subtract; 4864 e.X_op_symbol = alpha_gp_symbol; 4865 break; 4866 default: 4867 abort (); 4868 } 4869 #endif 4870 #endif 4871 4872 if (alpha_auto_align_on && alpha_current_align < 2) 4873 alpha_align (2, (char *) NULL, alpha_insn_label, 0); 4874 if (alpha_current_align > 2) 4875 alpha_current_align = 2; 4876 alpha_insn_label = NULL; 4877 4878 p = frag_more (4); 4879 memset (p, 0, 4); 4880 fix_new_exp (frag_now, p - frag_now->fr_literal, 4, 4881 &e, 0, BFD_RELOC_GPREL32); 4882 } 4883 4884 /* Handle floating point allocation pseudo-ops. This is like the 4885 generic version, but it makes sure the current label, if any, is 4886 correctly aligned. */ 4887 4888 static void 4889 s_alpha_float_cons (int type) 4890 { 4891 int log_size; 4892 4893 switch (type) 4894 { 4895 default: 4896 case 'f': 4897 case 'F': 4898 log_size = 2; 4899 break; 4900 4901 case 'd': 4902 case 'D': 4903 case 'G': 4904 log_size = 3; 4905 break; 4906 4907 case 'x': 4908 case 'X': 4909 case 'p': 4910 case 'P': 4911 log_size = 4; 4912 break; 4913 } 4914 4915 if (alpha_auto_align_on && alpha_current_align < log_size) 4916 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); 4917 if (alpha_current_align > log_size) 4918 alpha_current_align = log_size; 4919 alpha_insn_label = NULL; 4920 4921 float_cons (type); 4922 } 4923 4924 /* Handle the .proc pseudo op. We don't really do much with it except 4925 parse it. */ 4926 4927 static void 4928 s_alpha_proc (int is_static ATTRIBUTE_UNUSED) 4929 { 4930 char *name; 4931 char c; 4932 char *p; 4933 symbolS *symbolP; 4934 int temp; 4935 4936 /* Takes ".proc name,nargs". */ 4937 SKIP_WHITESPACE (); 4938 c = get_symbol_name (&name); 4939 p = input_line_pointer; 4940 symbolP = symbol_find_or_make (name); 4941 *p = c; 4942 SKIP_WHITESPACE_AFTER_NAME (); 4943 if (*input_line_pointer != ',') 4944 { 4945 *p = 0; 4946 as_warn (_("Expected comma after name \"%s\""), name); 4947 *p = c; 4948 temp = 0; 4949 ignore_rest_of_line (); 4950 } 4951 else 4952 { 4953 input_line_pointer++; 4954 temp = get_absolute_expression (); 4955 } 4956 /* *symbol_get_obj (symbolP) = (signed char) temp; */ 4957 (void) symbolP; 4958 as_warn (_("unhandled: .proc %s,%d"), name, temp); 4959 demand_empty_rest_of_line (); 4960 } 4961 4962 /* Handle the .set pseudo op. This is used to turn on and off most of 4963 the assembler features. */ 4964 4965 static void 4966 s_alpha_set (int x ATTRIBUTE_UNUSED) 4967 { 4968 char *name, ch, *s; 4969 int yesno = 1; 4970 4971 SKIP_WHITESPACE (); 4972 4973 ch = get_symbol_name (&name); 4974 s = name; 4975 if (s[0] == 'n' && s[1] == 'o') 4976 { 4977 yesno = 0; 4978 s += 2; 4979 } 4980 if (!strcmp ("reorder", s)) 4981 /* ignore */ ; 4982 else if (!strcmp ("at", s)) 4983 alpha_noat_on = !yesno; 4984 else if (!strcmp ("macro", s)) 4985 alpha_macros_on = yesno; 4986 else if (!strcmp ("move", s)) 4987 /* ignore */ ; 4988 else if (!strcmp ("volatile", s)) 4989 /* ignore */ ; 4990 else 4991 as_warn (_("Tried to .set unrecognized mode `%s'"), name); 4992 4993 (void) restore_line_pointer (ch); 4994 demand_empty_rest_of_line (); 4995 } 4996 4997 /* Handle the .base pseudo op. This changes the assembler's notion of 4998 the $gp register. */ 4999 5000 static void 5001 s_alpha_base (int ignore ATTRIBUTE_UNUSED) 5002 { 5003 SKIP_WHITESPACE (); 5004 5005 if (*input_line_pointer == '$') 5006 { 5007 /* $rNN form. */ 5008 input_line_pointer++; 5009 if (*input_line_pointer == 'r') 5010 input_line_pointer++; 5011 } 5012 5013 alpha_gp_register = get_absolute_expression (); 5014 if (alpha_gp_register < 0 || alpha_gp_register > 31) 5015 { 5016 alpha_gp_register = AXP_REG_GP; 5017 as_warn (_("Bad base register, using $%d."), alpha_gp_register); 5018 } 5019 5020 demand_empty_rest_of_line (); 5021 } 5022 5023 /* Handle the .align pseudo-op. This aligns to a power of two. It 5024 also adjusts any current instruction label. We treat this the same 5025 way the MIPS port does: .align 0 turns off auto alignment. */ 5026 5027 static void 5028 s_alpha_align (int ignore ATTRIBUTE_UNUSED) 5029 { 5030 int align; 5031 char fill, *pfill; 5032 long max_alignment = 16; 5033 5034 align = get_absolute_expression (); 5035 if (align > max_alignment) 5036 { 5037 align = max_alignment; 5038 as_bad (_("Alignment too large: %d. assumed"), align); 5039 } 5040 else if (align < 0) 5041 { 5042 as_warn (_("Alignment negative: 0 assumed")); 5043 align = 0; 5044 } 5045 5046 if (*input_line_pointer == ',') 5047 { 5048 input_line_pointer++; 5049 fill = get_absolute_expression (); 5050 pfill = &fill; 5051 } 5052 else 5053 pfill = NULL; 5054 5055 if (align != 0) 5056 { 5057 alpha_auto_align_on = 1; 5058 alpha_align (align, pfill, NULL, 1); 5059 } 5060 else 5061 { 5062 alpha_auto_align_on = 0; 5063 } 5064 alpha_insn_label = NULL; 5065 5066 demand_empty_rest_of_line (); 5067 } 5068 5069 /* Hook the normal string processor to reset known alignment. */ 5070 5071 static void 5072 s_alpha_stringer (int terminate) 5073 { 5074 alpha_current_align = 0; 5075 alpha_insn_label = NULL; 5076 stringer (8 + terminate); 5077 } 5078 5079 /* Hook the normal space processing to reset known alignment. */ 5080 5081 static void 5082 s_alpha_space (int ignore) 5083 { 5084 alpha_current_align = 0; 5085 alpha_insn_label = NULL; 5086 s_space (ignore); 5087 } 5088 5089 /* Hook into cons for auto-alignment. */ 5090 5091 void 5092 alpha_cons_align (int size) 5093 { 5094 int log_size; 5095 5096 log_size = 0; 5097 while ((size >>= 1) != 0) 5098 ++log_size; 5099 5100 if (alpha_auto_align_on && alpha_current_align < log_size) 5101 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0); 5102 if (alpha_current_align > log_size) 5103 alpha_current_align = log_size; 5104 alpha_insn_label = NULL; 5105 } 5106 5107 /* Here come the .uword, .ulong, and .uquad explicitly unaligned 5108 pseudos. We just turn off auto-alignment and call down to cons. */ 5109 5110 static void 5111 s_alpha_ucons (int bytes) 5112 { 5113 int hold = alpha_auto_align_on; 5114 alpha_auto_align_on = 0; 5115 cons (bytes); 5116 alpha_auto_align_on = hold; 5117 } 5118 5119 /* Switch the working cpu type. */ 5120 5121 static void 5122 s_alpha_arch (int ignored ATTRIBUTE_UNUSED) 5123 { 5124 char *name, ch; 5125 const struct cpu_type *p; 5126 5127 SKIP_WHITESPACE (); 5128 5129 ch = get_symbol_name (&name); 5130 5131 for (p = cpu_types; p->name; ++p) 5132 if (strcmp (name, p->name) == 0) 5133 { 5134 alpha_target_name = p->name, alpha_target = p->flags; 5135 goto found; 5136 } 5137 as_warn (_("Unknown CPU identifier `%s'"), name); 5138 5139 found: 5140 (void) restore_line_pointer (ch); 5141 demand_empty_rest_of_line (); 5142 } 5143 5144 #ifdef DEBUG1 5145 /* print token expression with alpha specific extension. */ 5146 5147 static void 5148 alpha_print_token (FILE *f, const expressionS *exp) 5149 { 5150 switch (exp->X_op) 5151 { 5152 case O_cpregister: 5153 putc (',', f); 5154 /* FALLTHRU */ 5155 case O_pregister: 5156 putc ('(', f); 5157 { 5158 expressionS nexp = *exp; 5159 nexp.X_op = O_register; 5160 print_expr_1 (f, &nexp); 5161 } 5162 putc (')', f); 5163 break; 5164 default: 5165 print_expr_1 (f, exp); 5166 break; 5167 } 5168 } 5169 #endif 5170 5171 /* The target specific pseudo-ops which we support. */ 5172 5173 const pseudo_typeS md_pseudo_table[] = 5174 { 5175 #ifdef OBJ_ECOFF 5176 {"comm", s_alpha_comm, 0}, /* OSF1 compiler does this. */ 5177 {"rdata", s_alpha_rdata, 0}, 5178 #endif 5179 {"text", s_alpha_text, 0}, 5180 {"data", s_alpha_data, 0}, 5181 #ifdef OBJ_ECOFF 5182 {"sdata", s_alpha_sdata, 0}, 5183 #endif 5184 #ifdef OBJ_ELF 5185 {"section", s_alpha_section, 0}, 5186 {"section.s", s_alpha_section, 0}, 5187 {"sect", s_alpha_section, 0}, 5188 {"sect.s", s_alpha_section, 0}, 5189 #endif 5190 #ifdef OBJ_EVAX 5191 {"section", s_alpha_section, 0}, 5192 {"literals", s_alpha_literals, 0}, 5193 {"pdesc", s_alpha_pdesc, 0}, 5194 {"name", s_alpha_name, 0}, 5195 {"linkage", s_alpha_linkage, 0}, 5196 {"code_address", s_alpha_code_address, 0}, 5197 {"ent", s_alpha_ent, 0}, 5198 {"frame", s_alpha_frame, 0}, 5199 {"fp_save", s_alpha_fp_save, 0}, 5200 {"mask", s_alpha_mask, 0}, 5201 {"fmask", s_alpha_fmask, 0}, 5202 {"end", s_alpha_end, 0}, 5203 {"file", s_alpha_file, 0}, 5204 {"rdata", s_alpha_section, 1}, 5205 {"comm", s_alpha_comm, 0}, 5206 {"link", s_alpha_section, 3}, 5207 {"ctors", s_alpha_section, 4}, 5208 {"dtors", s_alpha_section, 5}, 5209 {"handler", s_alpha_handler, 0}, 5210 {"handler_data", s_alpha_handler, 1}, 5211 #endif 5212 #ifdef OBJ_ELF 5213 /* Frame related pseudos. */ 5214 {"ent", s_alpha_ent, 0}, 5215 {"end", s_alpha_end, 0}, 5216 {"mask", s_alpha_mask, 0}, 5217 {"fmask", s_alpha_mask, 1}, 5218 {"frame", s_alpha_frame, 0}, 5219 {"prologue", s_alpha_prologue, 0}, 5220 {"file", s_alpha_file, 5}, 5221 {"loc", s_alpha_loc, 9}, 5222 {"stabs", s_alpha_stab, 's'}, 5223 {"stabn", s_alpha_stab, 'n'}, 5224 {"usepv", s_alpha_usepv, 0}, 5225 /* COFF debugging related pseudos. */ 5226 {"begin", s_alpha_coff_wrapper, 0}, 5227 {"bend", s_alpha_coff_wrapper, 1}, 5228 {"def", s_alpha_coff_wrapper, 2}, 5229 {"dim", s_alpha_coff_wrapper, 3}, 5230 {"endef", s_alpha_coff_wrapper, 4}, 5231 {"scl", s_alpha_coff_wrapper, 5}, 5232 {"tag", s_alpha_coff_wrapper, 6}, 5233 {"val", s_alpha_coff_wrapper, 7}, 5234 #else 5235 #ifdef OBJ_EVAX 5236 {"prologue", s_alpha_prologue, 0}, 5237 #else 5238 {"prologue", s_ignore, 0}, 5239 #endif 5240 #endif 5241 {"gprel32", s_alpha_gprel32, 0}, 5242 {"t_floating", s_alpha_float_cons, 'd'}, 5243 {"s_floating", s_alpha_float_cons, 'f'}, 5244 {"f_floating", s_alpha_float_cons, 'F'}, 5245 {"g_floating", s_alpha_float_cons, 'G'}, 5246 {"d_floating", s_alpha_float_cons, 'D'}, 5247 5248 {"proc", s_alpha_proc, 0}, 5249 {"aproc", s_alpha_proc, 1}, 5250 {"set", s_alpha_set, 0}, 5251 {"reguse", s_ignore, 0}, 5252 {"livereg", s_ignore, 0}, 5253 {"base", s_alpha_base, 0}, /*??*/ 5254 {"option", s_ignore, 0}, 5255 {"aent", s_ignore, 0}, 5256 {"ugen", s_ignore, 0}, 5257 {"eflag", s_ignore, 0}, 5258 5259 {"align", s_alpha_align, 0}, 5260 {"double", s_alpha_float_cons, 'd'}, 5261 {"float", s_alpha_float_cons, 'f'}, 5262 {"single", s_alpha_float_cons, 'f'}, 5263 {"ascii", s_alpha_stringer, 0}, 5264 {"asciz", s_alpha_stringer, 1}, 5265 {"string", s_alpha_stringer, 1}, 5266 {"space", s_alpha_space, 0}, 5267 {"skip", s_alpha_space, 0}, 5268 {"zero", s_alpha_space, 0}, 5269 5270 /* Unaligned data pseudos. */ 5271 {"uword", s_alpha_ucons, 2}, 5272 {"ulong", s_alpha_ucons, 4}, 5273 {"uquad", s_alpha_ucons, 8}, 5274 5275 #ifdef OBJ_ELF 5276 /* Dwarf wants these versions of unaligned. */ 5277 {"2byte", s_alpha_ucons, 2}, 5278 {"4byte", s_alpha_ucons, 4}, 5279 {"8byte", s_alpha_ucons, 8}, 5280 #endif 5281 5282 /* We don't do any optimizing, so we can safely ignore these. */ 5283 {"noalias", s_ignore, 0}, 5284 {"alias", s_ignore, 0}, 5285 5286 {"arch", s_alpha_arch, 0}, 5287 5288 {NULL, 0, 0}, 5289 }; 5290 5291 #ifdef OBJ_ECOFF 5292 5293 /* @@@ GP selection voodoo. All of this seems overly complicated and 5294 unnecessary; which is the primary reason it's for ECOFF only. */ 5295 5296 static inline void 5297 maybe_set_gp (asection *sec) 5298 { 5299 bfd_vma vma; 5300 5301 if (!sec) 5302 return; 5303 vma = bfd_get_section_vma (sec->owner, sec); 5304 if (vma && vma < alpha_gp_value) 5305 alpha_gp_value = vma; 5306 } 5307 5308 static void 5309 select_gp_value (void) 5310 { 5311 gas_assert (alpha_gp_value == 0); 5312 5313 /* Get minus-one in whatever width... */ 5314 alpha_gp_value = 0; 5315 alpha_gp_value--; 5316 5317 /* Select the smallest VMA of these existing sections. */ 5318 maybe_set_gp (alpha_lita_section); 5319 5320 /* @@ Will a simple 0x8000 work here? If not, why not? */ 5321 #define GP_ADJUSTMENT (0x8000 - 0x10) 5322 5323 alpha_gp_value += GP_ADJUSTMENT; 5324 5325 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value); 5326 5327 #ifdef DEBUG1 5328 printf (_("Chose GP value of %lx\n"), alpha_gp_value); 5329 #endif 5330 } 5331 #endif /* OBJ_ECOFF */ 5332 5333 #ifdef OBJ_ELF 5334 /* Map 's' to SHF_ALPHA_GPREL. */ 5335 5336 bfd_vma 5337 alpha_elf_section_letter (int letter, const char **ptr_msg) 5338 { 5339 if (letter == 's') 5340 return SHF_ALPHA_GPREL; 5341 5342 *ptr_msg = _("bad .section directive: want a,s,w,x,M,S,G,T in string"); 5343 return -1; 5344 } 5345 5346 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */ 5347 5348 flagword 5349 alpha_elf_section_flags (flagword flags, bfd_vma attr, int type ATTRIBUTE_UNUSED) 5350 { 5351 if (attr & SHF_ALPHA_GPREL) 5352 flags |= SEC_SMALL_DATA; 5353 return flags; 5354 } 5355 #endif /* OBJ_ELF */ 5356 5357 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents 5358 of an rs_align_code fragment. */ 5359 5360 void 5361 alpha_handle_align (fragS *fragp) 5362 { 5363 static unsigned char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f }; 5364 static unsigned char const nopunop[8] = 5365 { 5366 0x1f, 0x04, 0xff, 0x47, 5367 0x00, 0x00, 0xfe, 0x2f 5368 }; 5369 5370 int bytes, fix; 5371 char *p; 5372 5373 if (fragp->fr_type != rs_align_code) 5374 return; 5375 5376 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix; 5377 p = fragp->fr_literal + fragp->fr_fix; 5378 fix = 0; 5379 5380 if (bytes & 3) 5381 { 5382 fix = bytes & 3; 5383 memset (p, 0, fix); 5384 p += fix; 5385 bytes -= fix; 5386 } 5387 5388 if (bytes & 4) 5389 { 5390 memcpy (p, unop, 4); 5391 p += 4; 5392 bytes -= 4; 5393 fix += 4; 5394 } 5395 5396 memcpy (p, nopunop, 8); 5397 5398 fragp->fr_fix += fix; 5399 fragp->fr_var = 8; 5400 } 5401 5402 /* Public interface functions. */ 5403 5404 /* This function is called once, at assembler startup time. It sets 5405 up all the tables, etc. that the MD part of the assembler will 5406 need, that can be determined before arguments are parsed. */ 5407 5408 void 5409 md_begin (void) 5410 { 5411 unsigned int i; 5412 5413 /* Verify that X_op field is wide enough. */ 5414 { 5415 expressionS e; 5416 5417 e.X_op = O_max; 5418 gas_assert (e.X_op == O_max); 5419 } 5420 5421 /* Create the opcode hash table. */ 5422 alpha_opcode_hash = hash_new (); 5423 5424 for (i = 0; i < alpha_num_opcodes;) 5425 { 5426 const char *name, *retval, *slash; 5427 5428 name = alpha_opcodes[i].name; 5429 retval = hash_insert (alpha_opcode_hash, name, (void *) &alpha_opcodes[i]); 5430 if (retval) 5431 as_fatal (_("internal error: can't hash opcode `%s': %s"), 5432 name, retval); 5433 5434 /* Some opcodes include modifiers of various sorts with a "/mod" 5435 syntax, like the architecture manual suggests. However, for 5436 use with gcc at least, we also need access to those same opcodes 5437 without the "/". */ 5438 5439 if ((slash = strchr (name, '/')) != NULL) 5440 { 5441 char *p = XNEWVEC (char, strlen (name)); 5442 5443 memcpy (p, name, slash - name); 5444 strcpy (p + (slash - name), slash + 1); 5445 5446 (void) hash_insert (alpha_opcode_hash, p, (void *) &alpha_opcodes[i]); 5447 /* Ignore failures -- the opcode table does duplicate some 5448 variants in different forms, like "hw_stq" and "hw_st/q". */ 5449 } 5450 5451 while (++i < alpha_num_opcodes 5452 && (alpha_opcodes[i].name == name 5453 || !strcmp (alpha_opcodes[i].name, name))) 5454 continue; 5455 } 5456 5457 /* Create the macro hash table. */ 5458 alpha_macro_hash = hash_new (); 5459 5460 for (i = 0; i < alpha_num_macros;) 5461 { 5462 const char *name, *retval; 5463 5464 name = alpha_macros[i].name; 5465 retval = hash_insert (alpha_macro_hash, name, (void *) &alpha_macros[i]); 5466 if (retval) 5467 as_fatal (_("internal error: can't hash macro `%s': %s"), 5468 name, retval); 5469 5470 while (++i < alpha_num_macros 5471 && (alpha_macros[i].name == name 5472 || !strcmp (alpha_macros[i].name, name))) 5473 continue; 5474 } 5475 5476 /* Construct symbols for each of the registers. */ 5477 for (i = 0; i < 32; ++i) 5478 { 5479 char name[4]; 5480 5481 sprintf (name, "$%d", i); 5482 alpha_register_table[i] = symbol_create (name, reg_section, i, 5483 &zero_address_frag); 5484 } 5485 5486 for (; i < 64; ++i) 5487 { 5488 char name[5]; 5489 5490 sprintf (name, "$f%d", i - 32); 5491 alpha_register_table[i] = symbol_create (name, reg_section, i, 5492 &zero_address_frag); 5493 } 5494 5495 /* Create the special symbols and sections we'll be using. */ 5496 5497 /* So .sbss will get used for tiny objects. */ 5498 bfd_set_gp_size (stdoutput, g_switch_value); 5499 5500 #ifdef OBJ_ECOFF 5501 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol); 5502 5503 /* For handling the GP, create a symbol that won't be output in the 5504 symbol table. We'll edit it out of relocs later. */ 5505 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000, 5506 &zero_address_frag); 5507 #endif 5508 5509 #ifdef OBJ_EVAX 5510 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol); 5511 #endif 5512 5513 #ifdef OBJ_ELF 5514 if (ECOFF_DEBUGGING) 5515 { 5516 segT sec = subseg_new (".mdebug", (subsegT) 0); 5517 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY); 5518 bfd_set_section_alignment (stdoutput, sec, 3); 5519 } 5520 #endif 5521 5522 /* Create literal lookup hash table. */ 5523 alpha_literal_hash = hash_new (); 5524 5525 subseg_set (text_section, 0); 5526 } 5527 5528 /* The public interface to the instruction assembler. */ 5529 5530 void 5531 md_assemble (char *str) 5532 { 5533 /* Current maximum is 13. */ 5534 char opname[32]; 5535 expressionS tok[MAX_INSN_ARGS]; 5536 int ntok, trunclen; 5537 size_t opnamelen; 5538 5539 /* Split off the opcode. */ 5540 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819"); 5541 trunclen = (opnamelen < sizeof (opname) - 1 5542 ? opnamelen 5543 : sizeof (opname) - 1); 5544 memcpy (opname, str, trunclen); 5545 opname[trunclen] = '\0'; 5546 5547 /* Tokenize the rest of the line. */ 5548 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0) 5549 { 5550 if (ntok != TOKENIZE_ERROR_REPORT) 5551 as_bad (_("syntax error")); 5552 5553 return; 5554 } 5555 5556 /* Finish it off. */ 5557 assemble_tokens (opname, tok, ntok, alpha_macros_on); 5558 } 5559 5560 /* Round up a section's size to the appropriate boundary. */ 5561 5562 valueT 5563 md_section_align (segT seg, valueT size) 5564 { 5565 int align = bfd_get_section_alignment (stdoutput, seg); 5566 valueT mask = ((valueT) 1 << align) - 1; 5567 5568 return (size + mask) & ~mask; 5569 } 5570 5571 /* Turn a string in input_line_pointer into a floating point constant 5572 of type TYPE, and store the appropriate bytes in *LITP. The number 5573 of LITTLENUMS emitted is stored in *SIZEP. An error message is 5574 returned, or NULL on OK. */ 5575 5576 const char * 5577 md_atof (int type, char *litP, int *sizeP) 5578 { 5579 extern const char *vax_md_atof (int, char *, int *); 5580 5581 switch (type) 5582 { 5583 /* VAX floats. */ 5584 case 'G': 5585 /* vax_md_atof() doesn't like "G" for some reason. */ 5586 type = 'g'; 5587 /* Fall through. */ 5588 case 'F': 5589 case 'D': 5590 return vax_md_atof (type, litP, sizeP); 5591 5592 default: 5593 return ieee_md_atof (type, litP, sizeP, FALSE); 5594 } 5595 } 5596 5597 /* Take care of the target-specific command-line options. */ 5598 5599 int 5600 md_parse_option (int c, const char *arg) 5601 { 5602 switch (c) 5603 { 5604 case 'F': 5605 alpha_nofloats_on = 1; 5606 break; 5607 5608 case OPTION_32ADDR: 5609 alpha_addr32_on = 1; 5610 break; 5611 5612 case 'g': 5613 alpha_debug = 1; 5614 break; 5615 5616 case 'G': 5617 g_switch_value = atoi (arg); 5618 break; 5619 5620 case 'm': 5621 { 5622 const struct cpu_type *p; 5623 5624 for (p = cpu_types; p->name; ++p) 5625 if (strcmp (arg, p->name) == 0) 5626 { 5627 alpha_target_name = p->name, alpha_target = p->flags; 5628 goto found; 5629 } 5630 as_warn (_("Unknown CPU identifier `%s'"), arg); 5631 found:; 5632 } 5633 break; 5634 5635 #ifdef OBJ_EVAX 5636 case '+': /* For g++. Hash any name > 63 chars long. */ 5637 alpha_flag_hash_long_names = 1; 5638 break; 5639 5640 case 'H': /* Show new symbol after hash truncation. */ 5641 alpha_flag_show_after_trunc = 1; 5642 break; 5643 5644 case 'h': /* For gnu-c/vax compatibility. */ 5645 break; 5646 5647 case OPTION_REPLACE: 5648 alpha_flag_replace = 1; 5649 break; 5650 5651 case OPTION_NOREPLACE: 5652 alpha_flag_replace = 0; 5653 break; 5654 #endif 5655 5656 case OPTION_RELAX: 5657 alpha_flag_relax = 1; 5658 break; 5659 5660 #ifdef OBJ_ELF 5661 case OPTION_MDEBUG: 5662 alpha_flag_mdebug = 1; 5663 break; 5664 case OPTION_NO_MDEBUG: 5665 alpha_flag_mdebug = 0; 5666 break; 5667 #endif 5668 5669 default: 5670 return 0; 5671 } 5672 5673 return 1; 5674 } 5675 5676 /* Print a description of the command-line options that we accept. */ 5677 5678 void 5679 md_show_usage (FILE *stream) 5680 { 5681 fputs (_("\ 5682 Alpha options:\n\ 5683 -32addr treat addresses as 32-bit values\n\ 5684 -F lack floating point instructions support\n\ 5685 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\ 5686 specify variant of Alpha architecture\n\ 5687 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\ 5688 these variants include PALcode opcodes\n"), 5689 stream); 5690 #ifdef OBJ_EVAX 5691 fputs (_("\ 5692 VMS options:\n\ 5693 -+ encode (don't truncate) names longer than 64 characters\n\ 5694 -H show new symbol after hash truncation\n\ 5695 -replace/-noreplace enable or disable the optimization of procedure calls\n"), 5696 stream); 5697 #endif 5698 } 5699 5700 /* Decide from what point a pc-relative relocation is relative to, 5701 relative to the pc-relative fixup. Er, relatively speaking. */ 5702 5703 long 5704 md_pcrel_from (fixS *fixP) 5705 { 5706 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address; 5707 5708 switch (fixP->fx_r_type) 5709 { 5710 case BFD_RELOC_23_PCREL_S2: 5711 case BFD_RELOC_ALPHA_HINT: 5712 case BFD_RELOC_ALPHA_BRSGP: 5713 return addr + 4; 5714 default: 5715 return addr; 5716 } 5717 } 5718 5719 /* Attempt to simplify or even eliminate a fixup. The return value is 5720 ignored; perhaps it was once meaningful, but now it is historical. 5721 To indicate that a fixup has been eliminated, set fixP->fx_done. 5722 5723 For ELF, here it is that we transform the GPDISP_HI16 reloc we used 5724 internally into the GPDISP reloc used externally. We had to do 5725 this so that we'd have the GPDISP_LO16 reloc as a tag to compute 5726 the distance to the "lda" instruction for setting the addend to 5727 GPDISP. */ 5728 5729 void 5730 md_apply_fix (fixS *fixP, valueT * valP, segT seg) 5731 { 5732 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where; 5733 valueT value = * valP; 5734 unsigned image, size; 5735 5736 switch (fixP->fx_r_type) 5737 { 5738 /* The GPDISP relocations are processed internally with a symbol 5739 referring to the current function's section; we need to drop 5740 in a value which, when added to the address of the start of 5741 the function, gives the desired GP. */ 5742 case BFD_RELOC_ALPHA_GPDISP_HI16: 5743 { 5744 fixS *next = fixP->fx_next; 5745 5746 /* With user-specified !gpdisp relocations, we can be missing 5747 the matching LO16 reloc. We will have already issued an 5748 error message. */ 5749 if (next) 5750 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where 5751 - fixP->fx_frag->fr_address - fixP->fx_where); 5752 5753 value = (value - sign_extend_16 (value)) >> 16; 5754 } 5755 #ifdef OBJ_ELF 5756 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP; 5757 #endif 5758 goto do_reloc_gp; 5759 5760 case BFD_RELOC_ALPHA_GPDISP_LO16: 5761 value = sign_extend_16 (value); 5762 fixP->fx_offset = 0; 5763 #ifdef OBJ_ELF 5764 fixP->fx_done = 1; 5765 #endif 5766 5767 do_reloc_gp: 5768 fixP->fx_addsy = section_symbol (seg); 5769 md_number_to_chars (fixpos, value, 2); 5770 break; 5771 5772 case BFD_RELOC_16: 5773 if (fixP->fx_pcrel) 5774 fixP->fx_r_type = BFD_RELOC_16_PCREL; 5775 size = 2; 5776 goto do_reloc_xx; 5777 5778 case BFD_RELOC_32: 5779 if (fixP->fx_pcrel) 5780 fixP->fx_r_type = BFD_RELOC_32_PCREL; 5781 size = 4; 5782 goto do_reloc_xx; 5783 5784 case BFD_RELOC_64: 5785 if (fixP->fx_pcrel) 5786 fixP->fx_r_type = BFD_RELOC_64_PCREL; 5787 size = 8; 5788 5789 do_reloc_xx: 5790 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5791 { 5792 md_number_to_chars (fixpos, value, size); 5793 goto done; 5794 } 5795 return; 5796 5797 #ifdef OBJ_ECOFF 5798 case BFD_RELOC_GPREL32: 5799 gas_assert (fixP->fx_subsy == alpha_gp_symbol); 5800 fixP->fx_subsy = 0; 5801 /* FIXME: inherited this obliviousness of `value' -- why? */ 5802 md_number_to_chars (fixpos, -alpha_gp_value, 4); 5803 break; 5804 #else 5805 case BFD_RELOC_GPREL32: 5806 #endif 5807 case BFD_RELOC_GPREL16: 5808 case BFD_RELOC_ALPHA_GPREL_HI16: 5809 case BFD_RELOC_ALPHA_GPREL_LO16: 5810 return; 5811 5812 case BFD_RELOC_23_PCREL_S2: 5813 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5814 { 5815 image = bfd_getl32 (fixpos); 5816 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF); 5817 goto write_done; 5818 } 5819 return; 5820 5821 case BFD_RELOC_ALPHA_HINT: 5822 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0) 5823 { 5824 image = bfd_getl32 (fixpos); 5825 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); 5826 goto write_done; 5827 } 5828 return; 5829 5830 #ifdef OBJ_ELF 5831 case BFD_RELOC_ALPHA_BRSGP: 5832 return; 5833 5834 case BFD_RELOC_ALPHA_TLSGD: 5835 case BFD_RELOC_ALPHA_TLSLDM: 5836 case BFD_RELOC_ALPHA_GOTDTPREL16: 5837 case BFD_RELOC_ALPHA_DTPREL_HI16: 5838 case BFD_RELOC_ALPHA_DTPREL_LO16: 5839 case BFD_RELOC_ALPHA_DTPREL16: 5840 case BFD_RELOC_ALPHA_GOTTPREL16: 5841 case BFD_RELOC_ALPHA_TPREL_HI16: 5842 case BFD_RELOC_ALPHA_TPREL_LO16: 5843 case BFD_RELOC_ALPHA_TPREL16: 5844 if (fixP->fx_addsy) 5845 S_SET_THREAD_LOCAL (fixP->fx_addsy); 5846 return; 5847 #endif 5848 5849 #ifdef OBJ_ECOFF 5850 case BFD_RELOC_ALPHA_LITERAL: 5851 md_number_to_chars (fixpos, value, 2); 5852 return; 5853 #endif 5854 case BFD_RELOC_ALPHA_ELF_LITERAL: 5855 case BFD_RELOC_ALPHA_LITUSE: 5856 case BFD_RELOC_ALPHA_LINKAGE: 5857 case BFD_RELOC_ALPHA_CODEADDR: 5858 return; 5859 5860 #ifdef OBJ_EVAX 5861 case BFD_RELOC_ALPHA_NOP: 5862 value -= (8 + 4); /* PC-relative, base is jsr+4. */ 5863 5864 /* From B.4.5.2 of the OpenVMS Linker Utility Manual: 5865 "Finally, the ETIR$C_STC_BSR command passes the same address 5866 as ETIR$C_STC_NOP (so that they will fail or succeed together), 5867 and the same test is done again." */ 5868 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5869 { 5870 fixP->fx_addnumber = -value; 5871 return; 5872 } 5873 5874 if ((abs (value) >> 2) & ~0xfffff) 5875 goto done; 5876 else 5877 { 5878 /* Change to a nop. */ 5879 image = 0x47FF041F; 5880 goto write_done; 5881 } 5882 5883 case BFD_RELOC_ALPHA_LDA: 5884 /* fixup_segment sets fixP->fx_addsy to NULL when it can pre-compute 5885 the value for an O_subtract. */ 5886 if (fixP->fx_addsy 5887 && S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5888 { 5889 fixP->fx_addnumber = symbol_get_bfdsym (fixP->fx_subsy)->value; 5890 return; 5891 } 5892 5893 if ((abs (value)) & ~0x7fff) 5894 goto done; 5895 else 5896 { 5897 /* Change to an lda. */ 5898 image = 0x237B0000 | (value & 0xFFFF); 5899 goto write_done; 5900 } 5901 5902 case BFD_RELOC_ALPHA_BSR: 5903 case BFD_RELOC_ALPHA_BOH: 5904 value -= 4; /* PC-relative, base is jsr+4. */ 5905 5906 /* See comment in the BFD_RELOC_ALPHA_NOP case above. */ 5907 if (S_GET_SEGMENT (fixP->fx_addsy) == undefined_section) 5908 { 5909 fixP->fx_addnumber = -value; 5910 return; 5911 } 5912 5913 if ((abs (value) >> 2) & ~0xfffff) 5914 { 5915 /* Out of range. */ 5916 if (fixP->fx_r_type == BFD_RELOC_ALPHA_BOH) 5917 { 5918 /* Add a hint. */ 5919 image = bfd_getl32(fixpos); 5920 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF); 5921 goto write_done; 5922 } 5923 goto done; 5924 } 5925 else 5926 { 5927 /* Change to a branch. */ 5928 image = 0xD3400000 | ((value >> 2) & 0x1FFFFF); 5929 goto write_done; 5930 } 5931 #endif 5932 5933 case BFD_RELOC_VTABLE_INHERIT: 5934 case BFD_RELOC_VTABLE_ENTRY: 5935 return; 5936 5937 default: 5938 { 5939 const struct alpha_operand *operand; 5940 5941 if ((int) fixP->fx_r_type >= 0) 5942 as_fatal (_("unhandled relocation type %s"), 5943 bfd_get_reloc_code_name (fixP->fx_r_type)); 5944 5945 gas_assert (-(int) fixP->fx_r_type < (int) alpha_num_operands); 5946 operand = &alpha_operands[-(int) fixP->fx_r_type]; 5947 5948 /* The rest of these fixups only exist internally during symbol 5949 resolution and have no representation in the object file. 5950 Therefore they must be completely resolved as constants. */ 5951 5952 if (fixP->fx_addsy != 0 5953 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section) 5954 as_bad_where (fixP->fx_file, fixP->fx_line, 5955 _("non-absolute expression in constant field")); 5956 5957 image = bfd_getl32 (fixpos); 5958 image = insert_operand (image, operand, (offsetT) value, 5959 fixP->fx_file, fixP->fx_line); 5960 } 5961 goto write_done; 5962 } 5963 5964 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0) 5965 return; 5966 else 5967 { 5968 as_warn_where (fixP->fx_file, fixP->fx_line, 5969 _("type %d reloc done?\n"), (int) fixP->fx_r_type); 5970 goto done; 5971 } 5972 5973 write_done: 5974 md_number_to_chars (fixpos, image, 4); 5975 5976 done: 5977 fixP->fx_done = 1; 5978 } 5979 5980 /* Look for a register name in the given symbol. */ 5981 5982 symbolS * 5983 md_undefined_symbol (char *name) 5984 { 5985 if (*name == '$') 5986 { 5987 int is_float = 0, num; 5988 5989 switch (*++name) 5990 { 5991 case 'f': 5992 if (name[1] == 'p' && name[2] == '\0') 5993 return alpha_register_table[AXP_REG_FP]; 5994 is_float = 32; 5995 /* Fall through. */ 5996 5997 case 'r': 5998 if (!ISDIGIT (*++name)) 5999 break; 6000 /* Fall through. */ 6001 6002 case '0': case '1': case '2': case '3': case '4': 6003 case '5': case '6': case '7': case '8': case '9': 6004 if (name[1] == '\0') 6005 num = name[0] - '0'; 6006 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0') 6007 { 6008 num = (name[0] - '0') * 10 + name[1] - '0'; 6009 if (num >= 32) 6010 break; 6011 } 6012 else 6013 break; 6014 6015 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT) 6016 as_warn (_("Used $at without \".set noat\"")); 6017 return alpha_register_table[num + is_float]; 6018 6019 case 'a': 6020 if (name[1] == 't' && name[2] == '\0') 6021 { 6022 if (!alpha_noat_on) 6023 as_warn (_("Used $at without \".set noat\"")); 6024 return alpha_register_table[AXP_REG_AT]; 6025 } 6026 break; 6027 6028 case 'g': 6029 if (name[1] == 'p' && name[2] == '\0') 6030 return alpha_register_table[alpha_gp_register]; 6031 break; 6032 6033 case 's': 6034 if (name[1] == 'p' && name[2] == '\0') 6035 return alpha_register_table[AXP_REG_SP]; 6036 break; 6037 } 6038 } 6039 return NULL; 6040 } 6041 6042 #ifdef OBJ_ECOFF 6043 /* @@@ Magic ECOFF bits. */ 6044 6045 void 6046 alpha_frob_ecoff_data (void) 6047 { 6048 select_gp_value (); 6049 /* $zero and $f31 are read-only. */ 6050 alpha_gprmask &= ~1; 6051 alpha_fprmask &= ~1; 6052 } 6053 #endif 6054 6055 /* Hook to remember a recently defined label so that the auto-align 6056 code can adjust the symbol after we know what alignment will be 6057 required. */ 6058 6059 void 6060 alpha_define_label (symbolS *sym) 6061 { 6062 alpha_insn_label = sym; 6063 #ifdef OBJ_ELF 6064 dwarf2_emit_label (sym); 6065 #endif 6066 } 6067 6068 /* Return true if we must always emit a reloc for a type and false if 6069 there is some hope of resolving it at assembly time. */ 6070 6071 int 6072 alpha_force_relocation (fixS *f) 6073 { 6074 if (alpha_flag_relax) 6075 return 1; 6076 6077 switch (f->fx_r_type) 6078 { 6079 case BFD_RELOC_ALPHA_GPDISP_HI16: 6080 case BFD_RELOC_ALPHA_GPDISP_LO16: 6081 case BFD_RELOC_ALPHA_GPDISP: 6082 case BFD_RELOC_ALPHA_LITERAL: 6083 case BFD_RELOC_ALPHA_ELF_LITERAL: 6084 case BFD_RELOC_ALPHA_LITUSE: 6085 case BFD_RELOC_GPREL16: 6086 case BFD_RELOC_GPREL32: 6087 case BFD_RELOC_ALPHA_GPREL_HI16: 6088 case BFD_RELOC_ALPHA_GPREL_LO16: 6089 case BFD_RELOC_ALPHA_LINKAGE: 6090 case BFD_RELOC_ALPHA_CODEADDR: 6091 case BFD_RELOC_ALPHA_BRSGP: 6092 case BFD_RELOC_ALPHA_TLSGD: 6093 case BFD_RELOC_ALPHA_TLSLDM: 6094 case BFD_RELOC_ALPHA_GOTDTPREL16: 6095 case BFD_RELOC_ALPHA_DTPREL_HI16: 6096 case BFD_RELOC_ALPHA_DTPREL_LO16: 6097 case BFD_RELOC_ALPHA_DTPREL16: 6098 case BFD_RELOC_ALPHA_GOTTPREL16: 6099 case BFD_RELOC_ALPHA_TPREL_HI16: 6100 case BFD_RELOC_ALPHA_TPREL_LO16: 6101 case BFD_RELOC_ALPHA_TPREL16: 6102 #ifdef OBJ_EVAX 6103 case BFD_RELOC_ALPHA_NOP: 6104 case BFD_RELOC_ALPHA_BSR: 6105 case BFD_RELOC_ALPHA_LDA: 6106 case BFD_RELOC_ALPHA_BOH: 6107 #endif 6108 return 1; 6109 6110 default: 6111 break; 6112 } 6113 6114 return generic_force_reloc (f); 6115 } 6116 6117 /* Return true if we can partially resolve a relocation now. */ 6118 6119 int 6120 alpha_fix_adjustable (fixS *f) 6121 { 6122 /* Are there any relocation types for which we must generate a 6123 reloc but we can adjust the values contained within it? */ 6124 switch (f->fx_r_type) 6125 { 6126 case BFD_RELOC_ALPHA_GPDISP_HI16: 6127 case BFD_RELOC_ALPHA_GPDISP_LO16: 6128 case BFD_RELOC_ALPHA_GPDISP: 6129 return 0; 6130 6131 case BFD_RELOC_ALPHA_LITERAL: 6132 case BFD_RELOC_ALPHA_ELF_LITERAL: 6133 case BFD_RELOC_ALPHA_LITUSE: 6134 case BFD_RELOC_ALPHA_LINKAGE: 6135 case BFD_RELOC_ALPHA_CODEADDR: 6136 return 1; 6137 6138 case BFD_RELOC_VTABLE_ENTRY: 6139 case BFD_RELOC_VTABLE_INHERIT: 6140 return 0; 6141 6142 case BFD_RELOC_GPREL16: 6143 case BFD_RELOC_GPREL32: 6144 case BFD_RELOC_ALPHA_GPREL_HI16: 6145 case BFD_RELOC_ALPHA_GPREL_LO16: 6146 case BFD_RELOC_23_PCREL_S2: 6147 case BFD_RELOC_16: 6148 case BFD_RELOC_32: 6149 case BFD_RELOC_64: 6150 case BFD_RELOC_ALPHA_HINT: 6151 return 1; 6152 6153 case BFD_RELOC_ALPHA_TLSGD: 6154 case BFD_RELOC_ALPHA_TLSLDM: 6155 case BFD_RELOC_ALPHA_GOTDTPREL16: 6156 case BFD_RELOC_ALPHA_DTPREL_HI16: 6157 case BFD_RELOC_ALPHA_DTPREL_LO16: 6158 case BFD_RELOC_ALPHA_DTPREL16: 6159 case BFD_RELOC_ALPHA_GOTTPREL16: 6160 case BFD_RELOC_ALPHA_TPREL_HI16: 6161 case BFD_RELOC_ALPHA_TPREL_LO16: 6162 case BFD_RELOC_ALPHA_TPREL16: 6163 /* ??? No idea why we can't return a reference to .tbss+10, but 6164 we're preventing this in the other assemblers. Follow for now. */ 6165 return 0; 6166 6167 #ifdef OBJ_ELF 6168 case BFD_RELOC_ALPHA_BRSGP: 6169 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and 6170 let it get resolved at assembly time. */ 6171 { 6172 symbolS *sym = f->fx_addsy; 6173 const char *name; 6174 int offset = 0; 6175 6176 if (generic_force_reloc (f)) 6177 return 0; 6178 6179 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD) 6180 { 6181 case STO_ALPHA_NOPV: 6182 break; 6183 case STO_ALPHA_STD_GPLOAD: 6184 offset = 8; 6185 break; 6186 default: 6187 if (S_IS_LOCAL (sym)) 6188 name = "<local>"; 6189 else 6190 name = S_GET_NAME (sym); 6191 as_bad_where (f->fx_file, f->fx_line, 6192 _("!samegp reloc against symbol without .prologue: %s"), 6193 name); 6194 break; 6195 } 6196 f->fx_r_type = BFD_RELOC_23_PCREL_S2; 6197 f->fx_offset += offset; 6198 return 1; 6199 } 6200 #endif 6201 #ifdef OBJ_EVAX 6202 case BFD_RELOC_ALPHA_NOP: 6203 case BFD_RELOC_ALPHA_BSR: 6204 case BFD_RELOC_ALPHA_LDA: 6205 case BFD_RELOC_ALPHA_BOH: 6206 return 1; 6207 #endif 6208 6209 default: 6210 return 1; 6211 } 6212 } 6213 6214 /* Generate the BFD reloc to be stuck in the object file from the 6215 fixup used internally in the assembler. */ 6216 6217 arelent * 6218 tc_gen_reloc (asection *sec ATTRIBUTE_UNUSED, 6219 fixS *fixp) 6220 { 6221 arelent *reloc; 6222 6223 reloc = XNEW (arelent); 6224 reloc->sym_ptr_ptr = XNEW (asymbol *); 6225 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy); 6226 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where; 6227 6228 /* Make sure none of our internal relocations make it this far. 6229 They'd better have been fully resolved by this point. */ 6230 gas_assert ((int) fixp->fx_r_type > 0); 6231 6232 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type); 6233 if (reloc->howto == NULL) 6234 { 6235 as_bad_where (fixp->fx_file, fixp->fx_line, 6236 _("cannot represent `%s' relocation in object file"), 6237 bfd_get_reloc_code_name (fixp->fx_r_type)); 6238 return NULL; 6239 } 6240 6241 if (!fixp->fx_pcrel != !reloc->howto->pc_relative) 6242 as_fatal (_("internal error? cannot generate `%s' relocation"), 6243 bfd_get_reloc_code_name (fixp->fx_r_type)); 6244 6245 gas_assert (!fixp->fx_pcrel == !reloc->howto->pc_relative); 6246 6247 reloc->addend = fixp->fx_offset; 6248 6249 #ifdef OBJ_ECOFF 6250 /* Fake out bfd_perform_relocation. sigh. */ 6251 /* ??? Better would be to use the special_function hook. */ 6252 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL) 6253 reloc->addend = -alpha_gp_value; 6254 #endif 6255 6256 #ifdef OBJ_EVAX 6257 switch (fixp->fx_r_type) 6258 { 6259 struct evax_private_udata_struct *udata; 6260 const char *pname; 6261 int pname_len; 6262 6263 case BFD_RELOC_ALPHA_LINKAGE: 6264 /* Copy the linkage index. */ 6265 reloc->addend = fixp->fx_addnumber; 6266 break; 6267 6268 case BFD_RELOC_ALPHA_NOP: 6269 case BFD_RELOC_ALPHA_BSR: 6270 case BFD_RELOC_ALPHA_LDA: 6271 case BFD_RELOC_ALPHA_BOH: 6272 pname = symbol_get_bfdsym (fixp->fx_addsy)->name; 6273 6274 /* We need the non-suffixed name of the procedure. Beware that 6275 the main symbol might be equated so look it up and take its name. */ 6276 pname_len = strlen (pname); 6277 if (pname_len > 4 && strcmp (pname + pname_len - 4, "..en") == 0) 6278 { 6279 symbolS *sym; 6280 char *my_pname = xmemdup0 (pname, pname_len - 4); 6281 sym = symbol_find (my_pname); 6282 free (my_pname); 6283 if (sym == NULL) 6284 abort (); 6285 6286 while (symbol_equated_reloc_p (sym)) 6287 { 6288 symbolS *n = symbol_get_value_expression (sym)->X_add_symbol; 6289 6290 /* We must avoid looping, as that can occur with a badly 6291 written program. */ 6292 if (n == sym) 6293 break; 6294 sym = n; 6295 } 6296 pname = symbol_get_bfdsym (sym)->name; 6297 } 6298 6299 udata = XNEW (struct evax_private_udata_struct); 6300 udata->enbsym = symbol_get_bfdsym (fixp->fx_addsy); 6301 udata->bsym = symbol_get_bfdsym (fixp->tc_fix_data.info->psym); 6302 udata->origname = (char *)pname; 6303 udata->lkindex = ((struct evax_private_udata_struct *) 6304 symbol_get_bfdsym (fixp->tc_fix_data.info->sym)->udata.p)->lkindex; 6305 reloc->sym_ptr_ptr = (void *)udata; 6306 reloc->addend = fixp->fx_addnumber; 6307 6308 default: 6309 break; 6310 } 6311 #endif 6312 6313 return reloc; 6314 } 6315 6316 /* Parse a register name off of the input_line and return a register 6317 number. Gets md_undefined_symbol above to do the register name 6318 matching for us. 6319 6320 Only called as a part of processing the ECOFF .frame directive. */ 6321 6322 int 6323 tc_get_register (int frame ATTRIBUTE_UNUSED) 6324 { 6325 int framereg = AXP_REG_SP; 6326 6327 SKIP_WHITESPACE (); 6328 if (*input_line_pointer == '$') 6329 { 6330 char *s; 6331 char c = get_symbol_name (&s); 6332 symbolS *sym = md_undefined_symbol (s); 6333 6334 *strchr (s, '\0') = c; 6335 if (sym && (framereg = S_GET_VALUE (sym)) <= 31) 6336 goto found; 6337 } 6338 as_warn (_("frame reg expected, using $%d."), framereg); 6339 6340 found: 6341 note_gpreg (framereg); 6342 return framereg; 6343 } 6344 6345 /* This is called before the symbol table is processed. In order to 6346 work with gcc when using mips-tfile, we must keep all local labels. 6347 However, in other cases, we want to discard them. If we were 6348 called with -g, but we didn't see any debugging information, it may 6349 mean that gcc is smuggling debugging information through to 6350 mips-tfile, in which case we must generate all local labels. */ 6351 6352 #ifdef OBJ_ECOFF 6353 6354 void 6355 alpha_frob_file_before_adjust (void) 6356 { 6357 if (alpha_debug != 0 6358 && ! ecoff_debugging_seen) 6359 flag_keep_locals = 1; 6360 } 6361 6362 #endif /* OBJ_ECOFF */ 6363 6364 /* The Alpha has support for some VAX floating point types, as well as for 6365 IEEE floating point. We consider IEEE to be the primary floating point 6366 format, and sneak in the VAX floating point support here. */ 6367 #include "config/atof-vax.c" 6368