1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2022 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include "bfd.h" 23 #include "libbfd.h" 24 #include "elf-bfd.h" 25 #include "elf/rl78.h" 26 #include "libiberty.h" 27 28 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 29 30 #define RL78REL(n,sz,bit,mask,shift,complain,pcrel) \ 31 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 32 bfd_elf_generic_reloc, "R_RL78_" #n, false, 0, mask, false) 33 34 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, 35 asection *, bfd *, char **); 36 37 #define RL78_OP_REL(n,sz,bit,mask,shift,complain,pcrel) \ 38 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 39 rl78_special_reloc, "R_RL78_" #n, false, 0, mask, false) 40 41 /* Note that the relocations around 0x7f are internal to this file; 42 feel free to move them as needed to avoid conflicts with published 43 relocation numbers. */ 44 45 static reloc_howto_type rl78_elf_howto_table [] = 46 { 47 RL78REL (NONE, 0, 0, 0, 0, dont, false), 48 RL78REL (DIR32, 4, 32, 0xffffffff, 0, dont, false), 49 RL78REL (DIR24S, 4, 24, 0xffffff, 0, signed, false), 50 RL78REL (DIR16, 2, 16, 0xffff, 0, bitfield, false), 51 RL78REL (DIR16U, 2, 16, 0xffff, 0, unsigned, false), 52 RL78REL (DIR16S, 2, 16, 0xffff, 0, bitfield, false), 53 RL78REL (DIR8, 1, 8, 0xff, 0, dont, false), 54 RL78REL (DIR8U, 1, 8, 0xff, 0, unsigned, false), 55 RL78REL (DIR8S, 1, 8, 0xff, 0, bitfield, false), 56 RL78REL (DIR24S_PCREL, 4, 24, 0xffffff, 0, signed, true), 57 RL78REL (DIR16S_PCREL, 2, 16, 0xffff, 0, signed, true), 58 RL78REL (DIR8S_PCREL, 1, 8, 0xff, 0, signed, true), 59 RL78REL (DIR16UL, 2, 16, 0xffff, 2, unsigned, false), 60 RL78REL (DIR16UW, 2, 16, 0xffff, 1, unsigned, false), 61 RL78REL (DIR8UL, 1, 8, 0xff, 2, unsigned, false), 62 RL78REL (DIR8UW, 1, 8, 0xff, 1, unsigned, false), 63 RL78REL (DIR32_REV, 4, 32, 0xffffffff, 0, dont, false), 64 RL78REL (DIR16_REV, 2, 16, 0xffff, 0, bitfield, false), 65 RL78REL (DIR3U_PCREL, 1, 3, 0x7, 0, unsigned, true), 66 67 EMPTY_HOWTO (0x13), 68 EMPTY_HOWTO (0x14), 69 EMPTY_HOWTO (0x15), 70 EMPTY_HOWTO (0x16), 71 EMPTY_HOWTO (0x17), 72 EMPTY_HOWTO (0x18), 73 EMPTY_HOWTO (0x19), 74 EMPTY_HOWTO (0x1a), 75 EMPTY_HOWTO (0x1b), 76 EMPTY_HOWTO (0x1c), 77 EMPTY_HOWTO (0x1d), 78 EMPTY_HOWTO (0x1e), 79 EMPTY_HOWTO (0x1f), 80 81 EMPTY_HOWTO (0x20), 82 EMPTY_HOWTO (0x21), 83 EMPTY_HOWTO (0x22), 84 EMPTY_HOWTO (0x23), 85 EMPTY_HOWTO (0x24), 86 EMPTY_HOWTO (0x25), 87 EMPTY_HOWTO (0x26), 88 EMPTY_HOWTO (0x27), 89 EMPTY_HOWTO (0x28), 90 EMPTY_HOWTO (0x29), 91 EMPTY_HOWTO (0x2a), 92 EMPTY_HOWTO (0x2b), 93 EMPTY_HOWTO (0x2c), 94 95 RL78REL (RH_RELAX, 0, 0, 0, 0, dont, false), 96 RL78REL (RH_SFR, 1, 8, 0xff, 0, unsigned, false), 97 RL78REL (RH_SADDR, 1, 8, 0xff, 0, unsigned, false), 98 99 EMPTY_HOWTO (0x30), 100 EMPTY_HOWTO (0x31), 101 EMPTY_HOWTO (0x32), 102 EMPTY_HOWTO (0x33), 103 EMPTY_HOWTO (0x34), 104 EMPTY_HOWTO (0x35), 105 EMPTY_HOWTO (0x36), 106 EMPTY_HOWTO (0x37), 107 EMPTY_HOWTO (0x38), 108 EMPTY_HOWTO (0x39), 109 EMPTY_HOWTO (0x3a), 110 EMPTY_HOWTO (0x3b), 111 EMPTY_HOWTO (0x3c), 112 EMPTY_HOWTO (0x3d), 113 EMPTY_HOWTO (0x3e), 114 EMPTY_HOWTO (0x3f), 115 EMPTY_HOWTO (0x40), 116 117 RL78_OP_REL (ABS32, 4, 32, 0xffffffff, 0, dont, false), 118 RL78_OP_REL (ABS24S, 4, 24, 0xffffff, 0, signed, false), 119 RL78_OP_REL (ABS16, 2, 16, 0xffff, 0, bitfield, false), 120 RL78_OP_REL (ABS16U, 2, 16, 0xffff, 0, unsigned, false), 121 RL78_OP_REL (ABS16S, 2, 16, 0xffff, 0, signed, false), 122 RL78_OP_REL (ABS8, 1, 8, 0xff, 0, bitfield, false), 123 RL78_OP_REL (ABS8U, 1, 8, 0xff, 0, unsigned, false), 124 RL78_OP_REL (ABS8S, 1, 8, 0xff, 0, signed, false), 125 RL78_OP_REL (ABS24S_PCREL, 4, 24, 0xffffff, 0, signed, true), 126 RL78_OP_REL (ABS16S_PCREL, 2, 16, 0xffff, 0, signed, true), 127 RL78_OP_REL (ABS8S_PCREL, 1, 8, 0xff, 0, signed, true), 128 RL78_OP_REL (ABS16UL, 2, 16, 0xffff, 0, unsigned, false), 129 RL78_OP_REL (ABS16UW, 2, 16, 0xffff, 0, unsigned, false), 130 RL78_OP_REL (ABS8UL, 1, 8, 0xff, 0, unsigned, false), 131 RL78_OP_REL (ABS8UW, 1, 8, 0xff, 0, unsigned, false), 132 RL78_OP_REL (ABS32_REV, 4, 32, 0xffffffff, 0, dont, false), 133 RL78_OP_REL (ABS16_REV, 2, 16, 0xffff, 0, bitfield, false), 134 135 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 136 137 EMPTY_HOWTO (0x52), 138 EMPTY_HOWTO (0x53), 139 EMPTY_HOWTO (0x54), 140 EMPTY_HOWTO (0x55), 141 EMPTY_HOWTO (0x56), 142 EMPTY_HOWTO (0x57), 143 EMPTY_HOWTO (0x58), 144 EMPTY_HOWTO (0x59), 145 EMPTY_HOWTO (0x5a), 146 EMPTY_HOWTO (0x5b), 147 EMPTY_HOWTO (0x5c), 148 EMPTY_HOWTO (0x5d), 149 EMPTY_HOWTO (0x5e), 150 EMPTY_HOWTO (0x5f), 151 EMPTY_HOWTO (0x60), 152 EMPTY_HOWTO (0x61), 153 EMPTY_HOWTO (0x62), 154 EMPTY_HOWTO (0x63), 155 EMPTY_HOWTO (0x64), 156 EMPTY_HOWTO (0x65), 157 EMPTY_HOWTO (0x66), 158 EMPTY_HOWTO (0x67), 159 EMPTY_HOWTO (0x68), 160 EMPTY_HOWTO (0x69), 161 EMPTY_HOWTO (0x6a), 162 EMPTY_HOWTO (0x6b), 163 EMPTY_HOWTO (0x6c), 164 EMPTY_HOWTO (0x6d), 165 EMPTY_HOWTO (0x6e), 166 EMPTY_HOWTO (0x6f), 167 EMPTY_HOWTO (0x70), 168 EMPTY_HOWTO (0x71), 169 EMPTY_HOWTO (0x72), 170 EMPTY_HOWTO (0x73), 171 EMPTY_HOWTO (0x74), 172 EMPTY_HOWTO (0x75), 173 EMPTY_HOWTO (0x76), 174 EMPTY_HOWTO (0x77), 175 176 EMPTY_HOWTO (0x78), 177 EMPTY_HOWTO (0x79), 178 EMPTY_HOWTO (0x7a), 179 EMPTY_HOWTO (0x7b), 180 EMPTY_HOWTO (0x7c), 181 EMPTY_HOWTO (0x7d), 182 EMPTY_HOWTO (0x7e), 183 EMPTY_HOWTO (0x7f), 184 185 RL78_OP_REL (SYM, 0, 0, 0, 0, dont, false), 186 RL78_OP_REL (OPneg, 0, 0, 0, 0, dont, false), 187 RL78_OP_REL (OPadd, 0, 0, 0, 0, dont, false), 188 RL78_OP_REL (OPsub, 0, 0, 0, 0, dont, false), 189 RL78_OP_REL (OPmul, 0, 0, 0, 0, dont, false), 190 RL78_OP_REL (OPdiv, 0, 0, 0, 0, dont, false), 191 RL78_OP_REL (OPshla, 0, 0, 0, 0, dont, false), 192 RL78_OP_REL (OPshra, 0, 0, 0, 0, dont, false), 193 RL78_OP_REL (OPsctsize, 0, 0, 0, 0, dont, false), 194 EMPTY_HOWTO (0x89), 195 EMPTY_HOWTO (0x8a), 196 EMPTY_HOWTO (0x8b), 197 EMPTY_HOWTO (0x8c), 198 RL78_OP_REL (OPscttop, 0, 0, 0, 0, dont, false), 199 EMPTY_HOWTO (0x8e), 200 EMPTY_HOWTO (0x8f), 201 RL78_OP_REL (OPand, 0, 0, 0, 0, dont, false), 202 RL78_OP_REL (OPor, 0, 0, 0, 0, dont, false), 203 RL78_OP_REL (OPxor, 0, 0, 0, 0, dont, false), 204 RL78_OP_REL (OPnot, 0, 0, 0, 0, dont, false), 205 RL78_OP_REL (OPmod, 0, 0, 0, 0, dont, false), 206 RL78_OP_REL (OPromtop, 0, 0, 0, 0, dont, false), 207 RL78_OP_REL (OPramtop, 0, 0, 0, 0, dont, false) 208 }; 209 210 /* Map BFD reloc types to RL78 ELF reloc types. */ 211 212 struct rl78_reloc_map 213 { 214 bfd_reloc_code_real_type bfd_reloc_val; 215 unsigned int rl78_reloc_val; 216 }; 217 218 static const struct rl78_reloc_map rl78_reloc_map [] = 219 { 220 { BFD_RELOC_NONE, R_RL78_NONE }, 221 { BFD_RELOC_8, R_RL78_DIR8S }, 222 { BFD_RELOC_16, R_RL78_DIR16S }, 223 { BFD_RELOC_24, R_RL78_DIR24S }, 224 { BFD_RELOC_32, R_RL78_DIR32 }, 225 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 226 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 227 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 228 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 229 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 230 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 231 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 232 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 233 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 234 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 235 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 236 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 237 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 238 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 239 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 240 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 241 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 242 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 243 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 244 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 245 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, 246 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 247 }; 248 249 static reloc_howto_type * 250 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 251 bfd_reloc_code_real_type code) 252 { 253 unsigned int i; 254 255 if (code == BFD_RELOC_RL78_32_OP) 256 return rl78_elf_howto_table + R_RL78_DIR32; 257 258 for (i = ARRAY_SIZE (rl78_reloc_map); i--;) 259 if (rl78_reloc_map [i].bfd_reloc_val == code) 260 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 261 262 return NULL; 263 } 264 265 static reloc_howto_type * 266 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 267 { 268 unsigned int i; 269 270 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 271 if (rl78_elf_howto_table[i].name != NULL 272 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 273 return rl78_elf_howto_table + i; 274 275 return NULL; 276 } 277 278 /* Set the howto pointer for an RL78 ELF reloc. */ 279 280 static bool 281 rl78_info_to_howto_rela (bfd * abfd, 282 arelent * cache_ptr, 283 Elf_Internal_Rela * dst) 284 { 285 unsigned int r_type; 286 287 r_type = ELF32_R_TYPE (dst->r_info); 288 if (r_type >= (unsigned int) R_RL78_max) 289 { 290 /* xgettext:c-format */ 291 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 292 abfd, r_type); 293 bfd_set_error (bfd_error_bad_value); 294 return false; 295 } 296 cache_ptr->howto = rl78_elf_howto_table + r_type; 297 return true; 298 } 299 300 static bfd_vma 301 get_symbol_value (const char * name, 302 struct bfd_link_info * info, 303 bfd * input_bfd, 304 asection * input_section, 305 int offset) 306 { 307 struct bfd_link_hash_entry * h; 308 309 if (info == NULL) 310 return 0; 311 312 h = bfd_link_hash_lookup (info->hash, name, false, false, true); 313 314 if (h == NULL 315 || (h->type != bfd_link_hash_defined 316 && h->type != bfd_link_hash_defweak)) 317 { 318 (*info->callbacks->undefined_symbol) 319 (info, name, input_bfd, input_section, offset, true); 320 return 0; 321 } 322 323 return (h->u.def.value 324 + h->u.def.section->output_section->vma 325 + h->u.def.section->output_offset); 326 } 327 328 static bfd_vma 329 get_romstart (struct bfd_link_info * info, 330 bfd * abfd, 331 asection * sec, 332 int offset) 333 { 334 static bool cached = false; 335 static bfd_vma cached_value = 0; 336 337 if (!cached) 338 { 339 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 340 cached = true; 341 } 342 return cached_value; 343 } 344 345 static bfd_vma 346 get_ramstart (struct bfd_link_info * info, 347 bfd * abfd, 348 asection * sec, 349 int offset) 350 { 351 static bool cached = false; 352 static bfd_vma cached_value = 0; 353 354 if (!cached) 355 { 356 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 357 cached = true; 358 } 359 return cached_value; 360 } 361 362 #define NUM_STACK_ENTRIES 16 363 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 364 static unsigned int rl78_stack_top; 365 366 static inline void 367 rl78_stack_push (bfd_vma val, bfd_reloc_status_type *r) 368 { 369 if (rl78_stack_top < NUM_STACK_ENTRIES) 370 rl78_stack[rl78_stack_top++] = val; 371 else 372 *r = bfd_reloc_dangerous; 373 } 374 375 static inline bfd_vma 376 rl78_stack_pop (bfd_reloc_status_type *r) 377 { 378 if (rl78_stack_top > 0) 379 return rl78_stack[-- rl78_stack_top]; 380 else 381 *r = bfd_reloc_dangerous; 382 return 0; 383 } 384 385 /* Special handling for RL78 complex relocs. Returns the 386 value of the reloc, or 0 for relocs which do not generate 387 a result. SYMVAL is the value of the symbol for relocs 388 which use a symbolic argument. */ 389 390 static bfd_vma 391 rl78_compute_complex_reloc (unsigned long r_type, 392 bfd_vma symval, 393 asection *input_section, 394 bfd_reloc_status_type *r, 395 char **error_message) 396 { 397 int32_t tmp1, tmp2; 398 bfd_vma relocation = 0; 399 bfd_reloc_status_type stat = bfd_reloc_ok; 400 401 switch (r_type) 402 { 403 default: 404 stat = bfd_reloc_notsupported; 405 break; 406 407 case R_RL78_ABS24S_PCREL: 408 case R_RL78_ABS16S_PCREL: 409 case R_RL78_ABS8S_PCREL: 410 relocation = rl78_stack_pop (&stat); 411 relocation -= input_section->output_section->vma + input_section->output_offset; 412 break; 413 414 case R_RL78_ABS32: 415 case R_RL78_ABS32_REV: 416 case R_RL78_ABS16: 417 case R_RL78_ABS16_REV: 418 case R_RL78_ABS16S: 419 case R_RL78_ABS16U: 420 case R_RL78_ABS8: 421 case R_RL78_ABS8U: 422 case R_RL78_ABS8S: 423 relocation = rl78_stack_pop (&stat); 424 break; 425 426 case R_RL78_ABS16UL: 427 case R_RL78_ABS8UL: 428 relocation = rl78_stack_pop (&stat) >> 2; 429 break;; 430 431 case R_RL78_ABS16UW: 432 case R_RL78_ABS8UW: 433 relocation = rl78_stack_pop (&stat) >> 1; 434 break; 435 436 /* The rest of the relocs compute values and then push them onto the stack. */ 437 case R_RL78_OPramtop: 438 case R_RL78_OPromtop: 439 case R_RL78_SYM: 440 rl78_stack_push (symval, &stat); 441 break; 442 443 case R_RL78_OPneg: 444 tmp1 = rl78_stack_pop (&stat); 445 tmp1 = - tmp1; 446 rl78_stack_push (tmp1, &stat); 447 break; 448 449 case R_RL78_OPadd: 450 tmp2 = rl78_stack_pop (&stat); 451 tmp1 = rl78_stack_pop (&stat); 452 tmp1 += tmp2; 453 rl78_stack_push (tmp1, &stat); 454 break; 455 456 case R_RL78_OPsub: 457 /* For the expression "A - B", the assembler pushes A, 458 then B, then OPSUB. So the first op we pop is B, not A. */ 459 tmp2 = rl78_stack_pop (&stat); /* B */ 460 tmp1 = rl78_stack_pop (&stat); /* A */ 461 tmp1 -= tmp2; /* A - B */ 462 rl78_stack_push (tmp1, &stat); 463 break; 464 465 case R_RL78_OPmul: 466 tmp2 = rl78_stack_pop (&stat); 467 tmp1 = rl78_stack_pop (&stat); 468 tmp1 *= tmp2; 469 rl78_stack_push (tmp1, &stat); 470 break; 471 472 case R_RL78_OPdiv: 473 tmp2 = rl78_stack_pop (&stat); 474 tmp1 = rl78_stack_pop (&stat); 475 if (tmp2 != 0) 476 tmp1 /= tmp2; 477 else 478 { 479 tmp1 = 0; 480 stat = bfd_reloc_overflow; 481 } 482 rl78_stack_push (tmp1, &stat); 483 break; 484 485 case R_RL78_OPshla: 486 tmp2 = rl78_stack_pop (&stat); 487 tmp1 = rl78_stack_pop (&stat); 488 tmp1 <<= tmp2; 489 rl78_stack_push (tmp1, &stat); 490 break; 491 492 case R_RL78_OPshra: 493 tmp2 = rl78_stack_pop (&stat); 494 tmp1 = rl78_stack_pop (&stat); 495 tmp1 >>= tmp2; 496 rl78_stack_push (tmp1, &stat); 497 break; 498 499 case R_RL78_OPsctsize: 500 rl78_stack_push (input_section->size, &stat); 501 break; 502 503 case R_RL78_OPscttop: 504 rl78_stack_push (input_section->output_section->vma, &stat); 505 break; 506 507 case R_RL78_OPand: 508 tmp2 = rl78_stack_pop (&stat); 509 tmp1 = rl78_stack_pop (&stat); 510 tmp1 &= tmp2; 511 rl78_stack_push (tmp1, &stat); 512 break; 513 514 case R_RL78_OPor: 515 tmp2 = rl78_stack_pop (&stat); 516 tmp1 = rl78_stack_pop (&stat); 517 tmp1 |= tmp2; 518 rl78_stack_push (tmp1, &stat); 519 break; 520 521 case R_RL78_OPxor: 522 tmp2 = rl78_stack_pop (&stat); 523 tmp1 = rl78_stack_pop (&stat); 524 tmp1 ^= tmp2; 525 rl78_stack_push (tmp1, &stat); 526 break; 527 528 case R_RL78_OPnot: 529 tmp1 = rl78_stack_pop (&stat); 530 tmp1 = ~ tmp1; 531 rl78_stack_push (tmp1, &stat); 532 break; 533 534 case R_RL78_OPmod: 535 tmp2 = rl78_stack_pop (&stat); 536 tmp1 = rl78_stack_pop (&stat); 537 if (tmp2 != 0) 538 tmp1 %= tmp2; 539 else 540 { 541 tmp1 = 0; 542 stat = bfd_reloc_overflow; 543 } 544 rl78_stack_push (tmp1, &stat); 545 break; 546 } 547 548 if (r) 549 { 550 if (stat == bfd_reloc_dangerous) 551 *error_message = (_("RL78 reloc stack overflow/underflow")); 552 else if (stat == bfd_reloc_overflow) 553 { 554 stat = bfd_reloc_dangerous; 555 *error_message = (_("RL78 reloc divide by zero")); 556 } 557 *r = stat; 558 } 559 return relocation; 560 } 561 562 /* Check whether RELOCATION overflows a relocation field described by 563 HOWTO. */ 564 565 static bfd_reloc_status_type 566 check_overflow (reloc_howto_type *howto, bfd_vma relocation) 567 { 568 switch (howto->complain_on_overflow) 569 { 570 case complain_overflow_dont: 571 break; 572 573 case complain_overflow_bitfield: 574 if ((bfd_signed_vma) relocation < -(1LL << (howto->bitsize - 1)) 575 || (bfd_signed_vma) relocation >= 1LL << howto->bitsize) 576 return bfd_reloc_overflow; 577 break; 578 579 case complain_overflow_signed: 580 if ((bfd_signed_vma) relocation < -(1LL << (howto->bitsize - 1)) 581 || (bfd_signed_vma) relocation >= 1LL << (howto->bitsize - 1)) 582 return bfd_reloc_overflow; 583 break; 584 585 case complain_overflow_unsigned: 586 if (relocation >= 1ULL << howto->bitsize) 587 return bfd_reloc_overflow; 588 break; 589 } 590 return bfd_reloc_ok; 591 } 592 593 static bfd_reloc_status_type 594 rl78_special_reloc (bfd * input_bfd, 595 arelent * reloc, 596 asymbol * symbol, 597 void * data, 598 asection * input_section, 599 bfd * output_bfd ATTRIBUTE_UNUSED, 600 char ** error_message) 601 { 602 bfd_reloc_status_type r = bfd_reloc_ok; 603 bfd_vma relocation = 0; 604 unsigned long r_type = reloc->howto->type; 605 bfd_byte * contents = data; 606 607 /* If necessary, compute the symbolic value of the relocation. */ 608 switch (r_type) 609 { 610 case R_RL78_SYM: 611 relocation = (symbol->value 612 + symbol->section->output_section->vma 613 + symbol->section->output_offset 614 + reloc->addend); 615 break; 616 617 case R_RL78_OPromtop: 618 relocation = get_romstart (NULL, input_bfd, input_section, 619 reloc->address); 620 break; 621 622 case R_RL78_OPramtop: 623 relocation = get_ramstart (NULL, input_bfd, input_section, 624 reloc->address); 625 break; 626 } 627 628 /* Get the value of the relocation. */ 629 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section, 630 &r, error_message); 631 632 if (STACK_REL_P (r_type)) 633 { 634 bfd_size_type limit; 635 unsigned int nbytes; 636 637 if (r == bfd_reloc_ok) 638 r = check_overflow (reloc->howto, relocation); 639 640 if (r_type == R_RL78_ABS16_REV) 641 relocation = ((relocation & 0xff) << 8) | ((relocation >> 8) & 0xff); 642 else if (r_type == R_RL78_ABS32_REV) 643 relocation = (((relocation & 0xff) << 24) 644 | ((relocation & 0xff00) << 8) 645 | ((relocation >> 8) & 0xff00) 646 | ((relocation >> 24) & 0xff)); 647 648 limit = bfd_get_section_limit_octets (input_bfd, input_section); 649 nbytes = reloc->howto->bitsize / 8; 650 if (reloc->address < limit 651 && nbytes <= limit - reloc->address) 652 { 653 unsigned int i; 654 655 for (i = 0; i < nbytes; i++) 656 { 657 contents[reloc->address + i] = relocation; 658 relocation >>= 8; 659 } 660 } 661 else 662 r = bfd_reloc_outofrange; 663 } 664 665 return r; 666 } 667 668 #define OP(i) (contents[rel->r_offset + (i)]) 669 670 /* Relocate an RL78 ELF section. 671 There is some attempt to make this function usable for many architectures, 672 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 673 if only to serve as a learning tool. 674 675 The RELOCATE_SECTION function is called by the new ELF backend linker 676 to handle the relocations for a section. 677 678 The relocs are always passed as Rela structures; if the section 679 actually uses Rel structures, the r_addend field will always be 680 zero. 681 682 This function is responsible for adjusting the section contents as 683 necessary, and (if using Rela relocs and generating a relocatable 684 output file) adjusting the reloc addend as necessary. 685 686 This function does not have to worry about setting the reloc 687 address or the reloc symbol index. 688 689 LOCAL_SYMS is a pointer to the swapped in local symbols. 690 691 LOCAL_SECTIONS is an array giving the section in the input file 692 corresponding to the st_shndx field of each local symbol. 693 694 The global hash table entry for the global symbols can be found 695 via elf_sym_hashes (input_bfd). 696 697 When generating relocatable output, this function must handle 698 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 699 going to be the section symbol corresponding to the output 700 section, which means that the addend must be adjusted 701 accordingly. */ 702 703 static int 704 rl78_elf_relocate_section 705 (bfd * output_bfd, 706 struct bfd_link_info * info, 707 bfd * input_bfd, 708 asection * input_section, 709 bfd_byte * contents, 710 Elf_Internal_Rela * relocs, 711 Elf_Internal_Sym * local_syms, 712 asection ** local_sections) 713 { 714 Elf_Internal_Shdr * symtab_hdr; 715 struct elf_link_hash_entry ** sym_hashes; 716 Elf_Internal_Rela * rel; 717 Elf_Internal_Rela * relend; 718 asection *splt; 719 bool ret; 720 721 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 722 sym_hashes = elf_sym_hashes (input_bfd); 723 relend = relocs + input_section->reloc_count; 724 725 splt = elf_hash_table (info)->splt; 726 ret = true; 727 for (rel = relocs; rel < relend; rel ++) 728 { 729 reloc_howto_type *howto; 730 unsigned long r_symndx; 731 Elf_Internal_Sym *sym; 732 asection *sec; 733 struct elf_link_hash_entry *h; 734 bfd_vma relocation; 735 bfd_reloc_status_type r; 736 const char *name = NULL; 737 bool unresolved_reloc = true; 738 int r_type; 739 char *error_message; 740 741 r_type = ELF32_R_TYPE (rel->r_info); 742 r_symndx = ELF32_R_SYM (rel->r_info); 743 744 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 745 h = NULL; 746 sym = NULL; 747 sec = NULL; 748 relocation = 0; 749 750 if (r_symndx < symtab_hdr->sh_info) 751 { 752 sym = local_syms + r_symndx; 753 sec = local_sections [r_symndx]; 754 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 755 756 name = bfd_elf_string_from_elf_section 757 (input_bfd, symtab_hdr->sh_link, sym->st_name); 758 name = sym->st_name == 0 ? bfd_section_name (sec) : name; 759 } 760 else 761 { 762 bool warned ATTRIBUTE_UNUSED; 763 bool ignored ATTRIBUTE_UNUSED; 764 765 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 766 r_symndx, symtab_hdr, sym_hashes, h, 767 sec, relocation, unresolved_reloc, 768 warned, ignored); 769 770 name = h->root.root.string; 771 } 772 773 if (sec != NULL && discarded_section (sec)) 774 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 775 rel, 1, relend, howto, 0, contents); 776 777 if (bfd_link_relocatable (info)) 778 { 779 /* This is a relocatable link. We don't have to change 780 anything, unless the reloc is against a section symbol, 781 in which case we have to adjust according to where the 782 section symbol winds up in the output section. */ 783 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 784 rel->r_addend += sec->output_offset; 785 continue; 786 } 787 788 switch (ELF32_R_TYPE (rel->r_info)) 789 { 790 case R_RL78_DIR16S: 791 { 792 bfd_vma *plt_offset; 793 794 if (h != NULL) 795 plt_offset = &h->plt.offset; 796 else 797 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 798 799 if (! valid_16bit_address (relocation)) 800 { 801 /* If this is the first time we've processed this symbol, 802 fill in the plt entry with the correct symbol address. */ 803 if ((*plt_offset & 1) == 0) 804 { 805 unsigned int x; 806 807 x = 0x000000ec; /* br !!abs24 */ 808 x |= (relocation << 8) & 0xffffff00; 809 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 810 *plt_offset |= 1; 811 } 812 813 relocation = (splt->output_section->vma 814 + splt->output_offset 815 + (*plt_offset & -2)); 816 if (name) 817 { 818 char *newname = bfd_malloc (strlen(name)+5); 819 strcpy (newname, name); 820 strcat(newname, ".plt"); 821 _bfd_generic_link_add_one_symbol (info, 822 input_bfd, 823 newname, 824 BSF_FUNCTION | BSF_WEAK, 825 splt, 826 (*plt_offset & -2), 827 0, 828 1, 829 0, 830 0); 831 } 832 } 833 } 834 break; 835 } 836 837 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 838 /* If the symbol is undefined and weak 839 then the relocation resolves to zero. */ 840 relocation = 0; 841 else 842 { 843 if (howto->pc_relative) 844 { 845 relocation -= (input_section->output_section->vma 846 + input_section->output_offset 847 + rel->r_offset); 848 relocation -= bfd_get_reloc_size (howto); 849 } 850 851 relocation += rel->r_addend; 852 } 853 854 r = bfd_reloc_ok; 855 if (howto->bitsize != 0 856 && (rel->r_offset >= input_section->size 857 || ((howto->bitsize + 7u) / 8 858 > input_section->size - rel->r_offset))) 859 r = bfd_reloc_outofrange; 860 else 861 switch (r_type) 862 { 863 case R_RL78_NONE: 864 break; 865 866 case R_RL78_RH_RELAX: 867 break; 868 869 case R_RL78_DIR8S_PCREL: 870 OP (0) = relocation; 871 break; 872 873 case R_RL78_DIR8S: 874 OP (0) = relocation; 875 break; 876 877 case R_RL78_DIR8U: 878 OP (0) = relocation; 879 break; 880 881 case R_RL78_DIR16S_PCREL: 882 OP (0) = relocation; 883 OP (1) = relocation >> 8; 884 break; 885 886 case R_RL78_DIR16S: 887 if ((relocation & 0xf0000) == 0xf0000) 888 relocation &= 0xffff; 889 OP (0) = relocation; 890 OP (1) = relocation >> 8; 891 break; 892 893 case R_RL78_DIR16U: 894 OP (0) = relocation; 895 OP (1) = relocation >> 8; 896 break; 897 898 case R_RL78_DIR16: 899 OP (0) = relocation; 900 OP (1) = relocation >> 8; 901 break; 902 903 case R_RL78_DIR16_REV: 904 OP (1) = relocation; 905 OP (0) = relocation >> 8; 906 break; 907 908 case R_RL78_DIR3U_PCREL: 909 OP (0) &= 0xf8; 910 OP (0) |= relocation & 0x07; 911 /* Map [3, 10] to [0, 7]. The code below using howto 912 bitsize will check for unsigned overflow. */ 913 relocation -= 3; 914 break; 915 916 case R_RL78_DIR24S_PCREL: 917 OP (0) = relocation; 918 OP (1) = relocation >> 8; 919 OP (2) = relocation >> 16; 920 break; 921 922 case R_RL78_DIR24S: 923 OP (0) = relocation; 924 OP (1) = relocation >> 8; 925 OP (2) = relocation >> 16; 926 break; 927 928 case R_RL78_DIR32: 929 OP (0) = relocation; 930 OP (1) = relocation >> 8; 931 OP (2) = relocation >> 16; 932 OP (3) = relocation >> 24; 933 break; 934 935 case R_RL78_DIR32_REV: 936 OP (3) = relocation; 937 OP (2) = relocation >> 8; 938 OP (1) = relocation >> 16; 939 OP (0) = relocation >> 24; 940 break; 941 942 case R_RL78_RH_SFR: 943 relocation -= 0xfff00; 944 OP (0) = relocation; 945 break; 946 947 case R_RL78_RH_SADDR: 948 relocation -= 0xffe20; 949 OP (0) = relocation; 950 break; 951 952 /* Complex reloc handling: */ 953 case R_RL78_ABS32: 954 case R_RL78_ABS32_REV: 955 case R_RL78_ABS24S_PCREL: 956 case R_RL78_ABS24S: 957 case R_RL78_ABS16: 958 case R_RL78_ABS16_REV: 959 case R_RL78_ABS16S_PCREL: 960 case R_RL78_ABS16S: 961 case R_RL78_ABS16U: 962 case R_RL78_ABS16UL: 963 case R_RL78_ABS16UW: 964 case R_RL78_ABS8: 965 case R_RL78_ABS8U: 966 case R_RL78_ABS8UL: 967 case R_RL78_ABS8UW: 968 case R_RL78_ABS8S_PCREL: 969 case R_RL78_ABS8S: 970 case R_RL78_OPneg: 971 case R_RL78_OPadd: 972 case R_RL78_OPsub: 973 case R_RL78_OPmul: 974 case R_RL78_OPdiv: 975 case R_RL78_OPshla: 976 case R_RL78_OPshra: 977 case R_RL78_OPsctsize: 978 case R_RL78_OPscttop: 979 case R_RL78_OPand: 980 case R_RL78_OPor: 981 case R_RL78_OPxor: 982 case R_RL78_OPnot: 983 case R_RL78_OPmod: 984 relocation = rl78_compute_complex_reloc (r_type, 0, input_section, 985 &r, &error_message); 986 987 switch (r_type) 988 { 989 case R_RL78_ABS32: 990 OP (0) = relocation; 991 OP (1) = relocation >> 8; 992 OP (2) = relocation >> 16; 993 OP (3) = relocation >> 24; 994 break; 995 996 case R_RL78_ABS32_REV: 997 OP (3) = relocation; 998 OP (2) = relocation >> 8; 999 OP (1) = relocation >> 16; 1000 OP (0) = relocation >> 24; 1001 break; 1002 1003 case R_RL78_ABS24S_PCREL: 1004 case R_RL78_ABS24S: 1005 OP (0) = relocation; 1006 OP (1) = relocation >> 8; 1007 OP (2) = relocation >> 16; 1008 break; 1009 1010 case R_RL78_ABS16: 1011 OP (0) = relocation; 1012 OP (1) = relocation >> 8; 1013 break; 1014 1015 case R_RL78_ABS16_REV: 1016 OP (1) = relocation; 1017 OP (0) = relocation >> 8; 1018 break; 1019 1020 case R_RL78_ABS16S_PCREL: 1021 case R_RL78_ABS16S: 1022 OP (0) = relocation; 1023 OP (1) = relocation >> 8; 1024 break; 1025 1026 case R_RL78_ABS16U: 1027 case R_RL78_ABS16UL: 1028 case R_RL78_ABS16UW: 1029 OP (0) = relocation; 1030 OP (1) = relocation >> 8; 1031 break; 1032 1033 case R_RL78_ABS8: 1034 OP (0) = relocation; 1035 break; 1036 1037 case R_RL78_ABS8U: 1038 case R_RL78_ABS8UL: 1039 case R_RL78_ABS8UW: 1040 OP (0) = relocation; 1041 break; 1042 1043 case R_RL78_ABS8S_PCREL: 1044 case R_RL78_ABS8S: 1045 OP (0) = relocation; 1046 break; 1047 1048 default: 1049 break; 1050 } 1051 break; 1052 1053 case R_RL78_SYM: 1054 if (r_symndx < symtab_hdr->sh_info) 1055 relocation = sec->output_section->vma + sec->output_offset 1056 + sym->st_value + rel->r_addend; 1057 else if (h != NULL 1058 && (h->root.type == bfd_link_hash_defined 1059 || h->root.type == bfd_link_hash_defweak)) 1060 relocation = h->root.u.def.value 1061 + sec->output_section->vma 1062 + sec->output_offset 1063 + rel->r_addend; 1064 else 1065 { 1066 relocation = 0; 1067 if (h->root.type != bfd_link_hash_undefweak) 1068 _bfd_error_handler 1069 (_("warning: RL78_SYM reloc with an unknown symbol")); 1070 } 1071 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1072 &r, &error_message); 1073 break; 1074 1075 case R_RL78_OPromtop: 1076 relocation = get_romstart (info, input_bfd, input_section, 1077 rel->r_offset); 1078 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1079 &r, &error_message); 1080 break; 1081 1082 case R_RL78_OPramtop: 1083 relocation = get_ramstart (info, input_bfd, input_section, 1084 rel->r_offset); 1085 (void) rl78_compute_complex_reloc (r_type, relocation, input_section, 1086 &r, &error_message); 1087 break; 1088 1089 default: 1090 r = bfd_reloc_notsupported; 1091 break; 1092 } 1093 1094 if (r == bfd_reloc_ok) 1095 r = check_overflow (howto, relocation); 1096 1097 if (r != bfd_reloc_ok) 1098 { 1099 switch (r) 1100 { 1101 case bfd_reloc_overflow: 1102 (*info->callbacks->reloc_overflow) 1103 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1104 input_bfd, input_section, rel->r_offset); 1105 break; 1106 1107 case bfd_reloc_undefined: 1108 (*info->callbacks->undefined_symbol) 1109 (info, name, input_bfd, input_section, rel->r_offset, true); 1110 break; 1111 1112 case bfd_reloc_outofrange: 1113 /* xgettext:c-format */ 1114 (*info->callbacks->einfo) 1115 (_("%H: %s out of range\n"), 1116 input_bfd, input_section, rel->r_offset, howto->name); 1117 break; 1118 1119 case bfd_reloc_notsupported: 1120 /* xgettext:c-format */ 1121 (*info->callbacks->einfo) 1122 (_("%H: relocation type %u is not supported\n"), 1123 input_bfd, input_section, rel->r_offset, r_type); 1124 break; 1125 1126 case bfd_reloc_dangerous: 1127 (*info->callbacks->reloc_dangerous) 1128 (info, error_message, input_bfd, input_section, rel->r_offset); 1129 break; 1130 1131 default: 1132 /* xgettext:c-format */ 1133 (*info->callbacks->einfo) 1134 (_("%H: relocation %s returns an unrecognized value %x\n"), 1135 input_bfd, input_section, rel->r_offset, howto->name, r); 1136 break; 1137 } 1138 ret = false; 1139 } 1140 } 1141 1142 return ret; 1143 } 1144 1145 /* Function to set the ELF flag bits. */ 1146 1147 static bool 1148 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1149 { 1150 elf_elfheader (abfd)->e_flags = flags; 1151 elf_flags_init (abfd) = true; 1152 return true; 1153 } 1154 1155 static bool no_warn_mismatch = false; 1156 1157 void bfd_elf32_rl78_set_target_flags (bool); 1158 1159 void 1160 bfd_elf32_rl78_set_target_flags (bool user_no_warn_mismatch) 1161 { 1162 no_warn_mismatch = user_no_warn_mismatch; 1163 } 1164 1165 static const char * 1166 rl78_cpu_name (flagword flags) 1167 { 1168 switch (flags & E_FLAG_RL78_CPU_MASK) 1169 { 1170 default: return ""; 1171 case E_FLAG_RL78_G10: return "G10"; 1172 case E_FLAG_RL78_G13: return "G13"; 1173 case E_FLAG_RL78_G14: return "G14"; 1174 } 1175 } 1176 1177 /* Merge backend specific data from an object file to the output 1178 object file when linking. */ 1179 1180 static bool 1181 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 1182 { 1183 bfd *obfd = info->output_bfd; 1184 flagword new_flags; 1185 flagword old_flags; 1186 bool error = false; 1187 1188 new_flags = elf_elfheader (ibfd)->e_flags; 1189 old_flags = elf_elfheader (obfd)->e_flags; 1190 1191 if (!elf_flags_init (obfd)) 1192 { 1193 /* First call, no flags set. */ 1194 elf_flags_init (obfd) = true; 1195 elf_elfheader (obfd)->e_flags = new_flags; 1196 } 1197 else if (old_flags != new_flags) 1198 { 1199 flagword changed_flags = old_flags ^ new_flags; 1200 1201 if (changed_flags & E_FLAG_RL78_CPU_MASK) 1202 { 1203 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; 1204 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; 1205 1206 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) 1207 /* It does not matter what new_cpu may have. */; 1208 else if (out_cpu == E_FLAG_RL78_ANY_CPU) 1209 { 1210 if (in_cpu == E_FLAG_RL78_G10) 1211 { 1212 /* G10 files can only be linked with other G10 files. 1213 If the output is set to "any" this means that it is 1214 a G14 file that does not use hardware multiply/divide, 1215 but that is still incompatible with the G10 ABI. */ 1216 error = true; 1217 1218 _bfd_error_handler 1219 /* xgettext:c-format */ 1220 (_("RL78 ABI conflict: G10 file %pB cannot be linked" 1221 " with %s file %pB"), 1222 ibfd, rl78_cpu_name (out_cpu), obfd); 1223 } 1224 else 1225 { 1226 old_flags &= ~ E_FLAG_RL78_CPU_MASK; 1227 old_flags |= in_cpu; 1228 elf_elfheader (obfd)->e_flags = old_flags; 1229 } 1230 } 1231 else 1232 { 1233 error = true; 1234 1235 _bfd_error_handler 1236 /* xgettext:c-format */ 1237 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"), 1238 rl78_cpu_name (in_cpu), ibfd, 1239 rl78_cpu_name (out_cpu), obfd); 1240 } 1241 } 1242 1243 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1244 { 1245 _bfd_error_handler 1246 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1247 1248 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1249 /* xgettext:c-format */ 1250 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1251 obfd, ibfd); 1252 else 1253 /* xgettext:c-format */ 1254 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1255 ibfd, obfd); 1256 error = true; 1257 } 1258 } 1259 1260 return !error; 1261 } 1262 1263 static bool 1264 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1265 { 1266 FILE * file = (FILE *) ptr; 1267 flagword flags; 1268 1269 BFD_ASSERT (abfd != NULL && ptr != NULL); 1270 1271 /* Print normal ELF private data. */ 1272 _bfd_elf_print_private_bfd_data (abfd, ptr); 1273 1274 flags = elf_elfheader (abfd)->e_flags; 1275 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1276 1277 if (flags & E_FLAG_RL78_CPU_MASK) 1278 fprintf (file, " [%s]", rl78_cpu_name (flags)); 1279 1280 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1281 fprintf (file, _(" [64-bit doubles]")); 1282 1283 fputc ('\n', file); 1284 return true; 1285 } 1286 1287 /* Return the MACH for an e_flags value. */ 1288 1289 static int 1290 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) 1291 { 1292 return bfd_mach_rl78; 1293 } 1294 1295 static bool 1296 rl78_elf_object_p (bfd * abfd) 1297 { 1298 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1299 elf32_rl78_machine (abfd)); 1300 return true; 1301 } 1302 1303 /* support PLT for 16-bit references to 24-bit functions. */ 1304 1305 /* We support 16-bit pointers to code above 64k by generating a thunk 1306 below 64k containing a JMP instruction to the final address. */ 1307 1308 static bool 1309 rl78_elf_check_relocs 1310 (bfd * abfd, 1311 struct bfd_link_info * info, 1312 asection * sec, 1313 const Elf_Internal_Rela * relocs) 1314 { 1315 Elf_Internal_Shdr * symtab_hdr; 1316 struct elf_link_hash_entry ** sym_hashes; 1317 const Elf_Internal_Rela * rel; 1318 const Elf_Internal_Rela * rel_end; 1319 bfd_vma *local_plt_offsets; 1320 asection *splt; 1321 bfd *dynobj; 1322 1323 if (bfd_link_relocatable (info)) 1324 return true; 1325 1326 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1327 sym_hashes = elf_sym_hashes (abfd); 1328 local_plt_offsets = elf_local_got_offsets (abfd); 1329 dynobj = elf_hash_table(info)->dynobj; 1330 1331 rel_end = relocs + sec->reloc_count; 1332 for (rel = relocs; rel < rel_end; rel++) 1333 { 1334 struct elf_link_hash_entry *h; 1335 unsigned long r_symndx; 1336 bfd_vma *offset; 1337 1338 r_symndx = ELF32_R_SYM (rel->r_info); 1339 if (r_symndx < symtab_hdr->sh_info) 1340 h = NULL; 1341 else 1342 { 1343 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1344 while (h->root.type == bfd_link_hash_indirect 1345 || h->root.type == bfd_link_hash_warning) 1346 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1347 } 1348 1349 switch (ELF32_R_TYPE (rel->r_info)) 1350 { 1351 /* This relocation describes a 16-bit pointer to a function. 1352 We may need to allocate a thunk in low memory; reserve memory 1353 for it now. */ 1354 case R_RL78_DIR16S: 1355 if (dynobj == NULL) 1356 elf_hash_table (info)->dynobj = dynobj = abfd; 1357 splt = elf_hash_table (info)->splt; 1358 if (splt == NULL) 1359 { 1360 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1361 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1362 | SEC_READONLY | SEC_CODE); 1363 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1364 flags); 1365 elf_hash_table (info)->splt = splt; 1366 if (splt == NULL 1367 || !bfd_set_section_alignment (splt, 1)) 1368 return false; 1369 } 1370 1371 if (h != NULL) 1372 offset = &h->plt.offset; 1373 else 1374 { 1375 if (local_plt_offsets == NULL) 1376 { 1377 size_t size; 1378 unsigned int i; 1379 1380 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1381 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1382 if (local_plt_offsets == NULL) 1383 return false; 1384 elf_local_got_offsets (abfd) = local_plt_offsets; 1385 1386 for (i = 0; i < symtab_hdr->sh_info; i++) 1387 local_plt_offsets[i] = (bfd_vma) -1; 1388 } 1389 offset = &local_plt_offsets[r_symndx]; 1390 } 1391 1392 if (*offset == (bfd_vma) -1) 1393 { 1394 *offset = splt->size; 1395 splt->size += 4; 1396 } 1397 break; 1398 } 1399 } 1400 1401 return true; 1402 } 1403 1404 /* This must exist if dynobj is ever set. */ 1405 1406 static bool 1407 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1408 struct bfd_link_info *info) 1409 { 1410 bfd *dynobj; 1411 asection *splt; 1412 1413 if (!elf_hash_table (info)->dynamic_sections_created) 1414 return true; 1415 1416 /* As an extra sanity check, verify that all plt entries have been 1417 filled in. However, relaxing might have changed the relocs so 1418 that some plt entries don't get filled in, so we have to skip 1419 this check if we're relaxing. Unfortunately, check_relocs is 1420 called before relaxation. */ 1421 1422 if (info->relax_trip > 0) 1423 return true; 1424 1425 dynobj = elf_hash_table (info)->dynobj; 1426 splt = elf_hash_table (info)->splt; 1427 if (dynobj != NULL && splt != NULL) 1428 { 1429 bfd_byte *contents = splt->contents; 1430 unsigned int i, size = splt->size; 1431 1432 for (i = 0; i < size; i += 4) 1433 { 1434 unsigned int x = bfd_get_32 (dynobj, contents + i); 1435 BFD_ASSERT (x != 0); 1436 } 1437 } 1438 1439 return true; 1440 } 1441 1442 static bool 1443 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1444 struct bfd_link_info *info) 1445 { 1446 bfd *dynobj; 1447 asection *splt; 1448 1449 if (bfd_link_relocatable (info)) 1450 return true; 1451 1452 dynobj = elf_hash_table (info)->dynobj; 1453 if (dynobj == NULL) 1454 return true; 1455 1456 splt = elf_hash_table (info)->splt; 1457 BFD_ASSERT (splt != NULL); 1458 1459 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1460 if (splt->contents == NULL) 1461 return false; 1462 1463 return true; 1464 } 1465 1466 1467 1468 /* Handle relaxing. */ 1469 1470 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1471 is within the low 64k, remove any entry for it in the plt. */ 1472 1473 struct relax_plt_data 1474 { 1475 asection *splt; 1476 bool *again; 1477 }; 1478 1479 static bool 1480 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1481 { 1482 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1483 1484 if (h->plt.offset != (bfd_vma) -1) 1485 { 1486 bfd_vma address; 1487 1488 if (h->root.type == bfd_link_hash_undefined 1489 || h->root.type == bfd_link_hash_undefweak) 1490 address = 0; 1491 else 1492 address = (h->root.u.def.section->output_section->vma 1493 + h->root.u.def.section->output_offset 1494 + h->root.u.def.value); 1495 1496 if (valid_16bit_address (address)) 1497 { 1498 h->plt.offset = -1; 1499 data->splt->size -= 4; 1500 *data->again = true; 1501 } 1502 } 1503 1504 return true; 1505 } 1506 1507 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1508 previously had a plt entry, give it a new entry offset. */ 1509 1510 static bool 1511 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1512 { 1513 bfd_vma *entry = (bfd_vma *) xdata; 1514 1515 if (h->plt.offset != (bfd_vma) -1) 1516 { 1517 h->plt.offset = *entry; 1518 *entry += 4; 1519 } 1520 1521 return true; 1522 } 1523 1524 static bool 1525 rl78_elf_relax_plt_section (bfd *dynobj, 1526 asection *splt, 1527 struct bfd_link_info *info, 1528 bool *again) 1529 { 1530 struct relax_plt_data relax_plt_data; 1531 bfd *ibfd; 1532 1533 /* Assume nothing changes. */ 1534 *again = false; 1535 1536 if (bfd_link_relocatable (info)) 1537 return true; 1538 1539 /* We only relax the .plt section at the moment. */ 1540 if (dynobj != elf_hash_table (info)->dynobj 1541 || strcmp (splt->name, ".plt") != 0) 1542 return true; 1543 1544 /* Quick check for an empty plt. */ 1545 if (splt->size == 0) 1546 return true; 1547 1548 /* Map across all global symbols; see which ones happen to 1549 fall in the low 64k. */ 1550 relax_plt_data.splt = splt; 1551 relax_plt_data.again = again; 1552 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1553 &relax_plt_data); 1554 1555 /* Likewise for local symbols, though that's somewhat less convenient 1556 as we have to walk the list of input bfds and swap in symbol data. */ 1557 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1558 { 1559 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1560 Elf_Internal_Shdr *symtab_hdr; 1561 Elf_Internal_Sym *isymbuf = NULL; 1562 unsigned int idx; 1563 1564 if (! local_plt_offsets) 1565 continue; 1566 1567 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1568 if (symtab_hdr->sh_info != 0) 1569 { 1570 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1571 if (isymbuf == NULL) 1572 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1573 symtab_hdr->sh_info, 0, 1574 NULL, NULL, NULL); 1575 if (isymbuf == NULL) 1576 return false; 1577 } 1578 1579 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1580 { 1581 Elf_Internal_Sym *isym; 1582 asection *tsec; 1583 bfd_vma address; 1584 1585 if (local_plt_offsets[idx] == (bfd_vma) -1) 1586 continue; 1587 1588 isym = &isymbuf[idx]; 1589 if (isym->st_shndx == SHN_UNDEF) 1590 continue; 1591 else if (isym->st_shndx == SHN_ABS) 1592 tsec = bfd_abs_section_ptr; 1593 else if (isym->st_shndx == SHN_COMMON) 1594 tsec = bfd_com_section_ptr; 1595 else 1596 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1597 1598 address = (tsec->output_section->vma 1599 + tsec->output_offset 1600 + isym->st_value); 1601 if (valid_16bit_address (address)) 1602 { 1603 local_plt_offsets[idx] = -1; 1604 splt->size -= 4; 1605 *again = true; 1606 } 1607 } 1608 1609 if (isymbuf != NULL 1610 && symtab_hdr->contents != (unsigned char *) isymbuf) 1611 { 1612 if (! info->keep_memory) 1613 free (isymbuf); 1614 else 1615 { 1616 /* Cache the symbols for elf_link_input_bfd. */ 1617 symtab_hdr->contents = (unsigned char *) isymbuf; 1618 } 1619 } 1620 } 1621 1622 /* If we changed anything, walk the symbols again to reallocate 1623 .plt entry addresses. */ 1624 if (*again && splt->size > 0) 1625 { 1626 bfd_vma entry = 0; 1627 1628 elf_link_hash_traverse (elf_hash_table (info), 1629 rl78_relax_plt_realloc, &entry); 1630 1631 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1632 { 1633 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1634 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1635 unsigned int idx; 1636 1637 if (! local_plt_offsets) 1638 continue; 1639 1640 for (idx = 0; idx < nlocals; ++idx) 1641 if (local_plt_offsets[idx] != (bfd_vma) -1) 1642 { 1643 local_plt_offsets[idx] = entry; 1644 entry += 4; 1645 } 1646 } 1647 } 1648 1649 return true; 1650 } 1651 1652 /* Delete some bytes from a section while relaxing. */ 1653 1654 static bool 1655 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1656 Elf_Internal_Rela *alignment_rel, int force_snip) 1657 { 1658 Elf_Internal_Shdr * symtab_hdr; 1659 unsigned int sec_shndx; 1660 bfd_byte * contents; 1661 Elf_Internal_Rela * irel; 1662 Elf_Internal_Rela * irelend; 1663 Elf_Internal_Sym * isym; 1664 Elf_Internal_Sym * isymend; 1665 bfd_vma toaddr; 1666 unsigned int symcount; 1667 struct elf_link_hash_entry ** sym_hashes; 1668 struct elf_link_hash_entry ** end_hashes; 1669 1670 if (!alignment_rel) 1671 force_snip = 1; 1672 1673 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1674 1675 contents = elf_section_data (sec)->this_hdr.contents; 1676 1677 /* The deletion must stop at the next alignment boundary, if 1678 ALIGNMENT_REL is non-NULL. */ 1679 toaddr = sec->size; 1680 if (alignment_rel) 1681 toaddr = alignment_rel->r_offset; 1682 1683 irel = elf_section_data (sec)->relocs; 1684 if (irel == NULL) 1685 { 1686 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, true); 1687 irel = elf_section_data (sec)->relocs; 1688 } 1689 1690 irelend = irel + sec->reloc_count; 1691 1692 /* Actually delete the bytes. */ 1693 memmove (contents + addr, contents + addr + count, 1694 (size_t) (toaddr - addr - count)); 1695 1696 /* If we don't have an alignment marker to worry about, we can just 1697 shrink the section. Otherwise, we have to fill in the newly 1698 created gap with NOP insns (0x03). */ 1699 if (force_snip) 1700 sec->size -= count; 1701 else 1702 memset (contents + toaddr - count, 0x03, count); 1703 1704 /* Adjust all the relocs. */ 1705 for (; irel && irel < irelend; irel++) 1706 { 1707 /* Get the new reloc address. */ 1708 if (irel->r_offset > addr 1709 && (irel->r_offset < toaddr 1710 || (force_snip && irel->r_offset == toaddr))) 1711 irel->r_offset -= count; 1712 1713 /* If we see an ALIGN marker at the end of the gap, we move it 1714 to the beginning of the gap, since marking these gaps is what 1715 they're for. */ 1716 if (irel->r_offset == toaddr 1717 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1718 && irel->r_addend & RL78_RELAXA_ALIGN) 1719 irel->r_offset -= count; 1720 } 1721 1722 /* Adjust the local symbols defined in this section. */ 1723 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1724 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1725 isymend = isym + symtab_hdr->sh_info; 1726 1727 for (; isym < isymend; isym++) 1728 { 1729 /* If the symbol is in the range of memory we just moved, we 1730 have to adjust its value. */ 1731 if (isym->st_shndx == sec_shndx 1732 && isym->st_value > addr 1733 && isym->st_value < toaddr) 1734 isym->st_value -= count; 1735 1736 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1737 *end* is in the moved bytes but it's *start* isn't), then we 1738 must adjust its size. */ 1739 if (isym->st_shndx == sec_shndx 1740 && isym->st_value < addr 1741 && isym->st_value + isym->st_size > addr 1742 && isym->st_value + isym->st_size < toaddr) 1743 isym->st_size -= count; 1744 } 1745 1746 /* Now adjust the global symbols defined in this section. */ 1747 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1748 - symtab_hdr->sh_info); 1749 sym_hashes = elf_sym_hashes (abfd); 1750 end_hashes = sym_hashes + symcount; 1751 1752 for (; sym_hashes < end_hashes; sym_hashes++) 1753 { 1754 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1755 1756 if ((sym_hash->root.type == bfd_link_hash_defined 1757 || sym_hash->root.type == bfd_link_hash_defweak) 1758 && sym_hash->root.u.def.section == sec) 1759 { 1760 /* As above, adjust the value if needed. */ 1761 if (sym_hash->root.u.def.value > addr 1762 && sym_hash->root.u.def.value < toaddr) 1763 sym_hash->root.u.def.value -= count; 1764 1765 /* As above, adjust the size if needed. */ 1766 if (sym_hash->root.u.def.value < addr 1767 && sym_hash->root.u.def.value + sym_hash->size > addr 1768 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1769 sym_hash->size -= count; 1770 } 1771 } 1772 1773 return true; 1774 } 1775 1776 /* Used to sort relocs by address. If relocs have the same address, 1777 we maintain their relative order, except that R_RL78_RH_RELAX 1778 alignment relocs must be the first reloc for any given address. */ 1779 1780 static void 1781 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1782 { 1783 int i; 1784 bool again; 1785 bool swappit; 1786 1787 /* This is almost a classic bubblesort. It's the slowest sort, but 1788 we're taking advantage of the fact that the relocations are 1789 mostly in order already (the assembler emits them that way) and 1790 we need relocs with the same address to remain in the same 1791 relative order. */ 1792 again = true; 1793 while (again) 1794 { 1795 again = false; 1796 for (i = 0; i < count - 1; i ++) 1797 { 1798 if (r[i].r_offset > r[i + 1].r_offset) 1799 swappit = true; 1800 else if (r[i].r_offset < r[i + 1].r_offset) 1801 swappit = false; 1802 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1803 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1804 swappit = true; 1805 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1806 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1807 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1808 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1809 swappit = true; 1810 else 1811 swappit = false; 1812 1813 if (swappit) 1814 { 1815 Elf_Internal_Rela tmp; 1816 1817 tmp = r[i]; 1818 r[i] = r[i + 1]; 1819 r[i + 1] = tmp; 1820 /* If we do move a reloc back, re-scan to see if it 1821 needs to be moved even further back. This avoids 1822 most of the O(n^2) behavior for our cases. */ 1823 if (i > 0) 1824 i -= 2; 1825 again = true; 1826 } 1827 } 1828 } 1829 } 1830 1831 1832 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1833 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1834 lrel, abfd, sec, link_info, scale) 1835 1836 static bfd_vma 1837 rl78_offset_for_reloc (bfd * abfd, 1838 Elf_Internal_Rela * rel, 1839 Elf_Internal_Shdr * symtab_hdr, 1840 bfd_byte * shndx_buf ATTRIBUTE_UNUSED, 1841 Elf_Internal_Sym * intsyms, 1842 Elf_Internal_Rela ** lrel, 1843 bfd * input_bfd, 1844 asection * input_section, 1845 struct bfd_link_info * info, 1846 int * scale) 1847 { 1848 bfd_vma symval; 1849 1850 *scale = 1; 1851 1852 /* REL is the first of 1..N relocations. We compute the symbol 1853 value for each relocation, then combine them if needed. LREL 1854 gets a pointer to the last relocation used. */ 1855 while (1) 1856 { 1857 unsigned long r_type; 1858 1859 /* Get the value of the symbol referred to by the reloc. */ 1860 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1861 { 1862 /* A local symbol. */ 1863 Elf_Internal_Sym *isym; 1864 asection *ssec; 1865 1866 isym = intsyms + ELF32_R_SYM (rel->r_info); 1867 1868 if (isym->st_shndx == SHN_UNDEF) 1869 ssec = bfd_und_section_ptr; 1870 else if (isym->st_shndx == SHN_ABS) 1871 ssec = bfd_abs_section_ptr; 1872 else if (isym->st_shndx == SHN_COMMON) 1873 ssec = bfd_com_section_ptr; 1874 else 1875 ssec = bfd_section_from_elf_index (abfd, 1876 isym->st_shndx); 1877 1878 /* Initial symbol value. */ 1879 symval = isym->st_value; 1880 1881 /* GAS may have made this symbol relative to a section, in 1882 which case, we have to add the addend to find the 1883 symbol. */ 1884 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1885 symval += rel->r_addend; 1886 1887 if (ssec) 1888 { 1889 if ((ssec->flags & SEC_MERGE) 1890 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1891 symval = _bfd_merged_section_offset (abfd, & ssec, 1892 elf_section_data (ssec)->sec_info, 1893 symval); 1894 } 1895 1896 /* Now make the offset relative to where the linker is putting it. */ 1897 if (ssec) 1898 symval += 1899 ssec->output_section->vma + ssec->output_offset; 1900 1901 symval += rel->r_addend; 1902 } 1903 else 1904 { 1905 unsigned long indx; 1906 struct elf_link_hash_entry * h; 1907 1908 /* An external symbol. */ 1909 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1910 h = elf_sym_hashes (abfd)[indx]; 1911 BFD_ASSERT (h != NULL); 1912 1913 if (h->root.type != bfd_link_hash_defined 1914 && h->root.type != bfd_link_hash_defweak) 1915 { 1916 /* This appears to be a reference to an undefined 1917 symbol. Just ignore it--it will be caught by the 1918 regular reloc processing. */ 1919 if (lrel) 1920 *lrel = rel; 1921 return 0; 1922 } 1923 1924 symval = (h->root.u.def.value 1925 + h->root.u.def.section->output_section->vma 1926 + h->root.u.def.section->output_offset); 1927 1928 symval += rel->r_addend; 1929 } 1930 1931 r_type = ELF32_R_TYPE (rel->r_info); 1932 switch (r_type) 1933 { 1934 case R_RL78_SYM: 1935 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1936 NULL, NULL); 1937 break; 1938 1939 case R_RL78_OPromtop: 1940 symval = get_romstart (info, input_bfd, input_section, rel->r_offset); 1941 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1942 NULL, NULL); 1943 break; 1944 1945 case R_RL78_OPramtop: 1946 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1947 (void) rl78_compute_complex_reloc (r_type, symval, input_section, 1948 NULL, NULL); 1949 break; 1950 1951 case R_RL78_OPneg: 1952 case R_RL78_OPadd: 1953 case R_RL78_OPsub: 1954 case R_RL78_OPmul: 1955 case R_RL78_OPdiv: 1956 case R_RL78_OPshla: 1957 case R_RL78_OPshra: 1958 case R_RL78_OPsctsize: 1959 case R_RL78_OPscttop: 1960 case R_RL78_OPand: 1961 case R_RL78_OPor: 1962 case R_RL78_OPxor: 1963 case R_RL78_OPnot: 1964 case R_RL78_OPmod: 1965 (void) rl78_compute_complex_reloc (r_type, 0, input_section, 1966 NULL, NULL); 1967 break; 1968 1969 case R_RL78_DIR16UL: 1970 case R_RL78_DIR8UL: 1971 case R_RL78_ABS16UL: 1972 case R_RL78_ABS8UL: 1973 *scale = 4; 1974 goto reloc_computes_value; 1975 1976 case R_RL78_DIR16UW: 1977 case R_RL78_DIR8UW: 1978 case R_RL78_ABS16UW: 1979 case R_RL78_ABS8UW: 1980 *scale = 2; 1981 goto reloc_computes_value; 1982 1983 default: 1984 reloc_computes_value: 1985 symval = rl78_compute_complex_reloc (r_type, symval, input_section, 1986 NULL, NULL); 1987 /* Fall through. */ 1988 case R_RL78_DIR32: 1989 case R_RL78_DIR24S: 1990 case R_RL78_DIR16: 1991 case R_RL78_DIR16U: 1992 case R_RL78_DIR16S: 1993 case R_RL78_DIR24S_PCREL: 1994 case R_RL78_DIR16S_PCREL: 1995 case R_RL78_DIR8S_PCREL: 1996 if (lrel) 1997 *lrel = rel; 1998 return symval; 1999 } 2000 2001 rel ++; 2002 } 2003 } 2004 2005 const struct { 2006 int prefix; /* or -1 for "no prefix" */ 2007 int insn; /* or -1 for "end of list" */ 2008 int insn_for_saddr; /* or -1 for "no alternative" */ 2009 int insn_for_sfr; /* or -1 for "no alternative" */ 2010 } relax_addr16[] = { 2011 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 2012 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 2013 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 2014 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 2015 2016 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 2017 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 2018 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 2019 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 2020 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 2021 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 2022 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 2023 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 2024 2025 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 2026 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 2027 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 2028 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 2029 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 2030 2031 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 2032 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 2033 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 2034 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 2035 2036 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 2037 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 2038 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 2039 2040 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 2041 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 2042 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 2043 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 2044 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 2045 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 2046 2047 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 2048 2049 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 2050 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 2051 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 2052 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 2053 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 2054 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 2055 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 2056 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 2057 2058 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 2059 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 2060 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 2061 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 2062 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 2063 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 2064 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 2065 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 2066 2067 { -1, -1, -1, -1 } 2068 }; 2069 2070 /* Relax one section. */ 2071 2072 static bool 2073 rl78_elf_relax_section (bfd *abfd, 2074 asection *sec, 2075 struct bfd_link_info *link_info, 2076 bool *again) 2077 { 2078 Elf_Internal_Shdr * symtab_hdr; 2079 Elf_Internal_Shdr * shndx_hdr; 2080 Elf_Internal_Rela * internal_relocs; 2081 Elf_Internal_Rela * free_relocs = NULL; 2082 Elf_Internal_Rela * irel; 2083 Elf_Internal_Rela * srel; 2084 Elf_Internal_Rela * irelend; 2085 Elf_Internal_Rela * next_alignment; 2086 bfd_byte * contents = NULL; 2087 bfd_byte * free_contents = NULL; 2088 Elf_Internal_Sym * intsyms = NULL; 2089 Elf_Internal_Sym * free_intsyms = NULL; 2090 bfd_byte * shndx_buf = NULL; 2091 bfd_vma pc; 2092 bfd_vma symval ATTRIBUTE_UNUSED = 0; 2093 int pcrel ATTRIBUTE_UNUSED = 0; 2094 int code ATTRIBUTE_UNUSED = 0; 2095 int section_alignment_glue; 2096 int scale; 2097 2098 if (abfd == elf_hash_table (link_info)->dynobj 2099 && strcmp (sec->name, ".plt") == 0) 2100 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 2101 2102 /* Assume nothing changes. */ 2103 *again = false; 2104 2105 /* We don't have to do anything for a relocatable link, if 2106 this section does not have relocs, or if this is not a 2107 code section. */ 2108 if (bfd_link_relocatable (link_info) 2109 || (sec->flags & SEC_RELOC) == 0 2110 || sec->reloc_count == 0 2111 || (sec->flags & SEC_CODE) == 0) 2112 return true; 2113 2114 symtab_hdr = & elf_symtab_hdr (abfd); 2115 if (elf_symtab_shndx_list (abfd)) 2116 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2117 else 2118 shndx_hdr = NULL; 2119 2120 /* Get the section contents. */ 2121 if (elf_section_data (sec)->this_hdr.contents != NULL) 2122 contents = elf_section_data (sec)->this_hdr.contents; 2123 /* Go get them off disk. */ 2124 else 2125 { 2126 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2127 goto error_return; 2128 elf_section_data (sec)->this_hdr.contents = contents; 2129 } 2130 2131 /* Read this BFD's symbols. */ 2132 /* Get cached copy if it exists. */ 2133 if (symtab_hdr->contents != NULL) 2134 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2135 else 2136 { 2137 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2138 symtab_hdr->contents = (bfd_byte *) intsyms; 2139 } 2140 2141 if (shndx_hdr && shndx_hdr->sh_size != 0) 2142 { 2143 size_t amt; 2144 2145 if (_bfd_mul_overflow (symtab_hdr->sh_info, 2146 sizeof (Elf_External_Sym_Shndx), &amt)) 2147 { 2148 bfd_set_error (bfd_error_no_memory); 2149 goto error_return; 2150 } 2151 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0) 2152 goto error_return; 2153 shndx_buf = _bfd_malloc_and_read (abfd, amt, amt); 2154 if (shndx_buf == NULL) 2155 goto error_return; 2156 shndx_hdr->contents = shndx_buf; 2157 } 2158 2159 /* Get a copy of the native relocations. */ 2160 internal_relocs = (_bfd_elf_link_read_relocs 2161 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2162 link_info->keep_memory)); 2163 if (internal_relocs == NULL) 2164 goto error_return; 2165 if (! link_info->keep_memory) 2166 free_relocs = internal_relocs; 2167 2168 /* The RL_ relocs must be just before the operand relocs they go 2169 with, so we must sort them to guarantee this. We use bubblesort 2170 instead of qsort so we can guarantee that relocs with the same 2171 address remain in the same relative order. */ 2172 reloc_bubblesort (internal_relocs, sec->reloc_count); 2173 2174 /* Walk through them looking for relaxing opportunities. */ 2175 irelend = internal_relocs + sec->reloc_count; 2176 2177 2178 /* This will either be NULL or a pointer to the next alignment 2179 relocation. */ 2180 next_alignment = internal_relocs; 2181 2182 /* We calculate worst case shrinkage caused by alignment directives. 2183 No fool-proof, but better than either ignoring the problem or 2184 doing heavy duty analysis of all the alignment markers in all 2185 input sections. */ 2186 section_alignment_glue = 0; 2187 for (irel = internal_relocs; irel < irelend; irel++) 2188 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2189 && irel->r_addend & RL78_RELAXA_ALIGN) 2190 { 2191 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2192 2193 if (section_alignment_glue < this_glue) 2194 section_alignment_glue = this_glue; 2195 } 2196 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2197 shrinkage. */ 2198 section_alignment_glue *= 2; 2199 2200 for (irel = internal_relocs; irel < irelend; irel++) 2201 { 2202 unsigned char *insn; 2203 int nrelocs; 2204 2205 /* The insns we care about are all marked with one of these. */ 2206 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2207 continue; 2208 2209 if (irel->r_addend & RL78_RELAXA_ALIGN 2210 || next_alignment == internal_relocs) 2211 { 2212 /* When we delete bytes, we need to maintain all the alignments 2213 indicated. In addition, we need to be careful about relaxing 2214 jumps across alignment boundaries - these displacements 2215 *grow* when we delete bytes. For now, don't shrink 2216 displacements across an alignment boundary, just in case. 2217 Note that this only affects relocations to the same 2218 section. */ 2219 next_alignment += 2; 2220 while (next_alignment < irelend 2221 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2222 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2223 next_alignment ++; 2224 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2225 next_alignment = NULL; 2226 } 2227 2228 /* When we hit alignment markers, see if we've shrunk enough 2229 before them to reduce the gap without violating the alignment 2230 requirements. */ 2231 if (irel->r_addend & RL78_RELAXA_ALIGN) 2232 { 2233 /* At this point, the next relocation *should* be the ELIGN 2234 end marker. */ 2235 Elf_Internal_Rela *erel = irel + 1; 2236 unsigned int alignment, nbytes; 2237 2238 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2239 continue; 2240 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2241 continue; 2242 2243 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2244 2245 if (erel->r_offset - irel->r_offset < alignment) 2246 continue; 2247 2248 nbytes = erel->r_offset - irel->r_offset; 2249 nbytes /= alignment; 2250 nbytes *= alignment; 2251 2252 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, 2253 next_alignment, erel->r_offset == sec->size); 2254 *again = true; 2255 2256 continue; 2257 } 2258 2259 if (irel->r_addend & RL78_RELAXA_ELIGN) 2260 continue; 2261 2262 insn = contents + irel->r_offset; 2263 2264 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2265 2266 /* At this point, we have an insn that is a candidate for linker 2267 relaxation. There are NRELOCS relocs following that may be 2268 relaxed, although each reloc may be made of more than one 2269 reloc entry (such as gp-rel symbols). */ 2270 2271 /* Get the value of the symbol referred to by the reloc. Just 2272 in case this is the last reloc in the list, use the RL's 2273 addend to choose between this reloc (no addend) or the next 2274 (yes addend, which means at least one following reloc). */ 2275 2276 /* srel points to the "current" reloction for this insn - 2277 actually the last reloc for a given operand, which is the one 2278 we need to update. We check the relaxations in the same 2279 order that the relocations happen, so we'll just push it 2280 along as we go. */ 2281 srel = irel; 2282 2283 pc = sec->output_section->vma + sec->output_offset 2284 + srel->r_offset; 2285 2286 #define GET_RELOC \ 2287 BFD_ASSERT (nrelocs > 0); \ 2288 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2289 pcrel = symval - pc + srel->r_addend; \ 2290 nrelocs --; 2291 2292 #define SNIPNR(offset, nbytes) \ 2293 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2294 2295 #define SNIP(offset, nbytes, newtype) \ 2296 SNIPNR (offset, nbytes); \ 2297 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2298 2299 /* The order of these bit tests must match the order that the 2300 relocs appear in. Since we sorted those by offset, we can 2301 predict them. */ 2302 2303 /*----------------------------------------------------------------------*/ 2304 /* EF ad BR $rel8 pcrel 2305 ED al ah BR !abs16 abs 2306 EE al ah BR $!rel16 pcrel 2307 EC al ah as BR !!abs20 abs 2308 2309 FD al ah CALL !abs16 abs 2310 FE al ah CALL $!rel16 pcrel 2311 FC al ah as CALL !!abs20 abs 2312 2313 DC ad BC $rel8 2314 DE ad BNC $rel8 2315 DD ad BZ $rel8 2316 DF ad BNZ $rel8 2317 61 C3 ad BH $rel8 2318 61 D3 ad BNH $rel8 2319 61 C8 EF ad SKC ; BR $rel8 2320 61 D8 EF ad SKNC ; BR $rel8 2321 61 E8 EF ad SKZ ; BR $rel8 2322 61 F8 EF ad SKNZ ; BR $rel8 2323 61 E3 EF ad SKH ; BR $rel8 2324 61 F3 EF ad SKNH ; BR $rel8 2325 */ 2326 2327 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2328 { 2329 /* SKIP opcodes that skip non-branches will have a relax tag 2330 but no corresponding symbol to relax against; we just 2331 skip those. */ 2332 if (irel->r_addend & RL78_RELAXA_RNUM) 2333 { 2334 GET_RELOC; 2335 } 2336 2337 switch (insn[0]) 2338 { 2339 case 0xdc: /* BC */ 2340 case 0xdd: /* BZ */ 2341 case 0xde: /* BNC */ 2342 case 0xdf: /* BNZ */ 2343 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ 2344 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ 2345 { 2346 /* This is a "long" conditional as generated by gas: 2347 DC 03 EE ad.dr */ 2348 if (pcrel < 127 2349 && pcrel > -127) 2350 { 2351 insn[0] ^= 0x02; /* invert conditional */ 2352 SNIPNR (4, 1); 2353 SNIP (1, 2, R_RL78_DIR8S_PCREL); 2354 insn[1] = pcrel; 2355 *again = true; 2356 } 2357 } 2358 break; 2359 2360 case 0xec: /* BR !!abs20 */ 2361 2362 if (pcrel < 127 2363 && pcrel > -127) 2364 { 2365 insn[0] = 0xef; 2366 insn[1] = pcrel; 2367 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2368 *again = true; 2369 } 2370 else if (symval < 65536) 2371 { 2372 insn[0] = 0xed; 2373 insn[1] = symval & 0xff; 2374 insn[2] = symval >> 8; 2375 SNIP (2, 1, R_RL78_DIR16U); 2376 *again = true; 2377 } 2378 else if (pcrel < 32767 2379 && pcrel > -32767) 2380 { 2381 insn[0] = 0xee; 2382 insn[1] = pcrel & 0xff; 2383 insn[2] = pcrel >> 8; 2384 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2385 *again = true; 2386 } 2387 break; 2388 2389 case 0xee: /* BR $!pcrel16 */ 2390 case 0xed: /* BR $!abs16 */ 2391 if (pcrel < 127 2392 && pcrel > -127) 2393 { 2394 insn[0] = 0xef; 2395 insn[1] = pcrel; 2396 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2397 *again = true; 2398 } 2399 break; 2400 2401 case 0xfc: /* CALL !!abs20 */ 2402 if (symval < 65536) 2403 { 2404 insn[0] = 0xfd; 2405 insn[1] = symval & 0xff; 2406 insn[2] = symval >> 8; 2407 SNIP (2, 1, R_RL78_DIR16U); 2408 *again = true; 2409 } 2410 else if (pcrel < 32767 2411 && pcrel > -32767) 2412 { 2413 insn[0] = 0xfe; 2414 insn[1] = pcrel & 0xff; 2415 insn[2] = pcrel >> 8; 2416 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2417 *again = true; 2418 } 2419 break; 2420 2421 case 0x61: /* PREFIX */ 2422 /* For SKIP/BR, we change the BR opcode and delete the 2423 SKIP. That way, we don't have to find and change the 2424 relocation for the BR. */ 2425 /* Note that, for the case where we're skipping some 2426 other insn, we have no "other" reloc but that's safe 2427 here anyway. */ 2428 switch (insn[1]) 2429 { 2430 case 0xd3: /* BNH */ 2431 case 0xc3: /* BH */ 2432 if (insn[2] == 0x03 && insn[3] == 0xee 2433 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ 2434 { 2435 /* Another long branch by gas: 2436 61 D3 03 EE ad.dr */ 2437 if (pcrel < 127 2438 && pcrel > -127) 2439 { 2440 insn[1] ^= 0x10; /* invert conditional */ 2441 SNIPNR (5, 1); 2442 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2443 insn[2] = pcrel; 2444 *again = true; 2445 } 2446 } 2447 break; 2448 2449 case 0xc8: /* SKC */ 2450 if (insn[2] == 0xef) 2451 { 2452 insn[2] = 0xde; /* BNC */ 2453 SNIPNR (0, 2); 2454 } 2455 break; 2456 2457 case 0xd8: /* SKNC */ 2458 if (insn[2] == 0xef) 2459 { 2460 insn[2] = 0xdc; /* BC */ 2461 SNIPNR (0, 2); 2462 } 2463 break; 2464 2465 case 0xe8: /* SKZ */ 2466 if (insn[2] == 0xef) 2467 { 2468 insn[2] = 0xdf; /* BNZ */ 2469 SNIPNR (0, 2); 2470 } 2471 break; 2472 2473 case 0xf8: /* SKNZ */ 2474 if (insn[2] == 0xef) 2475 { 2476 insn[2] = 0xdd; /* BZ */ 2477 SNIPNR (0, 2); 2478 } 2479 break; 2480 2481 case 0xe3: /* SKH */ 2482 if (insn[2] == 0xef) 2483 { 2484 insn[2] = 0xd3; /* BNH */ 2485 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2486 } 2487 break; 2488 2489 case 0xf3: /* SKNH */ 2490 if (insn[2] == 0xef) 2491 { 2492 insn[2] = 0xc3; /* BH */ 2493 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2494 } 2495 break; 2496 } 2497 break; 2498 } 2499 } 2500 2501 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 2502 && nrelocs > 0) 2503 { 2504 /*----------------------------------------------------------------------*/ 2505 /* Some insns have both a 16-bit address operand and an 8-bit 2506 variant if the address is within a special range: 2507 2508 Address 16-bit operand SADDR range SFR range 2509 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2510 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2511 2512 The RELAX_ADDR16[] array has the insn encodings for the 2513 16-bit operand version, as well as the SFR and SADDR 2514 variants. We only need to replace the encodings and 2515 adjust the operand. 2516 2517 Note: we intentionally do not attempt to decode and skip 2518 any ES: prefix, as adding ES: means the addr16 (likely) 2519 no longer points to saddr/sfr space. 2520 */ 2521 2522 int is_sfr; 2523 int is_saddr; 2524 int idx; 2525 int poff; 2526 2527 GET_RELOC; 2528 2529 if (0xffe20 <= symval && symval <= 0xfffff) 2530 { 2531 2532 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2533 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2534 2535 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2536 { 2537 if (relax_addr16[idx].prefix != -1 2538 && insn[0] == relax_addr16[idx].prefix 2539 && insn[1] == relax_addr16[idx].insn) 2540 { 2541 poff = 1; 2542 } 2543 else if (relax_addr16[idx].prefix == -1 2544 && insn[0] == relax_addr16[idx].insn) 2545 { 2546 poff = 0; 2547 } 2548 else 2549 continue; 2550 2551 /* We have a matched insn, and poff is 0 or 1 depending 2552 on the base pattern size. */ 2553 2554 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2555 { 2556 insn[poff] = relax_addr16[idx].insn_for_sfr; 2557 SNIP (poff+2, 1, R_RL78_RH_SFR); 2558 } 2559 2560 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2561 { 2562 insn[poff] = relax_addr16[idx].insn_for_saddr; 2563 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2564 } 2565 } 2566 } 2567 } 2568 /*----------------------------------------------------------------------*/ 2569 } 2570 2571 return true; 2572 2573 error_return: 2574 free (free_relocs); 2575 free (free_contents); 2576 2577 if (shndx_buf != NULL) 2578 { 2579 shndx_hdr->contents = NULL; 2580 free (shndx_buf); 2581 } 2582 2583 free (free_intsyms); 2584 2585 return true; 2586 } 2587 2588 2589 2590 #define ELF_ARCH bfd_arch_rl78 2591 #define ELF_MACHINE_CODE EM_RL78 2592 #define ELF_MAXPAGESIZE 0x1000 2593 2594 #define TARGET_LITTLE_SYM rl78_elf32_vec 2595 #define TARGET_LITTLE_NAME "elf32-rl78" 2596 2597 #define elf_info_to_howto_rel NULL 2598 #define elf_info_to_howto rl78_info_to_howto_rela 2599 #define elf_backend_object_p rl78_elf_object_p 2600 #define elf_backend_relocate_section rl78_elf_relocate_section 2601 #define elf_symbol_leading_char ('_') 2602 #define elf_backend_can_gc_sections 1 2603 2604 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2605 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2606 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2607 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2608 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2609 2610 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2611 #define elf_backend_check_relocs rl78_elf_check_relocs 2612 #define elf_backend_always_size_sections \ 2613 rl78_elf_always_size_sections 2614 #define elf_backend_finish_dynamic_sections \ 2615 rl78_elf_finish_dynamic_sections 2616 2617 #include "elf32-target.h" 2618