1 /* 32-bit ELF support for ARM 2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 3 2008, 2009, 2010 Free Software Foundation, Inc. 4 5 This file is part of BFD, the Binary File Descriptor library. 6 7 This program is free software; you can redistribute it and/or modify 8 it under the terms of the GNU General Public License as published by 9 the Free Software Foundation; either version 3 of the License, or 10 (at your option) any later version. 11 12 This program is distributed in the hope that it will be useful, 13 but WITHOUT ANY WARRANTY; without even the implied warranty of 14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 GNU General Public License for more details. 16 17 You should have received a copy of the GNU General Public License 18 along with this program; if not, write to the Free Software 19 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 20 MA 02110-1301, USA. */ 21 22 #include "sysdep.h" 23 #include <limits.h> 24 25 #include "bfd.h" 26 #include "libiberty.h" 27 #include "libbfd.h" 28 #include "elf-bfd.h" 29 #include "elf-vxworks.h" 30 #include "elf/arm.h" 31 32 /* Return the relocation section associated with NAME. HTAB is the 33 bfd's elf32_arm_link_hash_entry. */ 34 #define RELOC_SECTION(HTAB, NAME) \ 35 ((HTAB)->use_rel ? ".rel" NAME : ".rela" NAME) 36 37 /* Return size of a relocation entry. HTAB is the bfd's 38 elf32_arm_link_hash_entry. */ 39 #define RELOC_SIZE(HTAB) \ 40 ((HTAB)->use_rel \ 41 ? sizeof (Elf32_External_Rel) \ 42 : sizeof (Elf32_External_Rela)) 43 44 /* Return function to swap relocations in. HTAB is the bfd's 45 elf32_arm_link_hash_entry. */ 46 #define SWAP_RELOC_IN(HTAB) \ 47 ((HTAB)->use_rel \ 48 ? bfd_elf32_swap_reloc_in \ 49 : bfd_elf32_swap_reloca_in) 50 51 /* Return function to swap relocations out. HTAB is the bfd's 52 elf32_arm_link_hash_entry. */ 53 #define SWAP_RELOC_OUT(HTAB) \ 54 ((HTAB)->use_rel \ 55 ? bfd_elf32_swap_reloc_out \ 56 : bfd_elf32_swap_reloca_out) 57 58 #define elf_info_to_howto 0 59 #define elf_info_to_howto_rel elf32_arm_info_to_howto 60 61 #define ARM_ELF_ABI_VERSION 0 62 #define ARM_ELF_OS_ABI_VERSION ELFOSABI_ARM 63 64 static bfd_boolean elf32_arm_write_section (bfd *output_bfd, 65 struct bfd_link_info *link_info, 66 asection *sec, 67 bfd_byte *contents); 68 69 /* Note: code such as elf32_arm_reloc_type_lookup expect to use e.g. 70 R_ARM_PC24 as an index into this, and find the R_ARM_PC24 HOWTO 71 in that slot. */ 72 73 static reloc_howto_type elf32_arm_howto_table_1[] = 74 { 75 /* No relocation. */ 76 HOWTO (R_ARM_NONE, /* type */ 77 0, /* rightshift */ 78 0, /* size (0 = byte, 1 = short, 2 = long) */ 79 0, /* bitsize */ 80 FALSE, /* pc_relative */ 81 0, /* bitpos */ 82 complain_overflow_dont,/* complain_on_overflow */ 83 bfd_elf_generic_reloc, /* special_function */ 84 "R_ARM_NONE", /* name */ 85 FALSE, /* partial_inplace */ 86 0, /* src_mask */ 87 0, /* dst_mask */ 88 FALSE), /* pcrel_offset */ 89 90 HOWTO (R_ARM_PC24, /* type */ 91 2, /* rightshift */ 92 2, /* size (0 = byte, 1 = short, 2 = long) */ 93 24, /* bitsize */ 94 TRUE, /* pc_relative */ 95 0, /* bitpos */ 96 complain_overflow_signed,/* complain_on_overflow */ 97 bfd_elf_generic_reloc, /* special_function */ 98 "R_ARM_PC24", /* name */ 99 FALSE, /* partial_inplace */ 100 0x00ffffff, /* src_mask */ 101 0x00ffffff, /* dst_mask */ 102 TRUE), /* pcrel_offset */ 103 104 /* 32 bit absolute */ 105 HOWTO (R_ARM_ABS32, /* type */ 106 0, /* rightshift */ 107 2, /* size (0 = byte, 1 = short, 2 = long) */ 108 32, /* bitsize */ 109 FALSE, /* pc_relative */ 110 0, /* bitpos */ 111 complain_overflow_bitfield,/* complain_on_overflow */ 112 bfd_elf_generic_reloc, /* special_function */ 113 "R_ARM_ABS32", /* name */ 114 FALSE, /* partial_inplace */ 115 0xffffffff, /* src_mask */ 116 0xffffffff, /* dst_mask */ 117 FALSE), /* pcrel_offset */ 118 119 /* standard 32bit pc-relative reloc */ 120 HOWTO (R_ARM_REL32, /* type */ 121 0, /* rightshift */ 122 2, /* size (0 = byte, 1 = short, 2 = long) */ 123 32, /* bitsize */ 124 TRUE, /* pc_relative */ 125 0, /* bitpos */ 126 complain_overflow_bitfield,/* complain_on_overflow */ 127 bfd_elf_generic_reloc, /* special_function */ 128 "R_ARM_REL32", /* name */ 129 FALSE, /* partial_inplace */ 130 0xffffffff, /* src_mask */ 131 0xffffffff, /* dst_mask */ 132 TRUE), /* pcrel_offset */ 133 134 /* 8 bit absolute - R_ARM_LDR_PC_G0 in AAELF */ 135 HOWTO (R_ARM_LDR_PC_G0, /* type */ 136 0, /* rightshift */ 137 0, /* size (0 = byte, 1 = short, 2 = long) */ 138 32, /* bitsize */ 139 TRUE, /* pc_relative */ 140 0, /* bitpos */ 141 complain_overflow_dont,/* complain_on_overflow */ 142 bfd_elf_generic_reloc, /* special_function */ 143 "R_ARM_LDR_PC_G0", /* name */ 144 FALSE, /* partial_inplace */ 145 0xffffffff, /* src_mask */ 146 0xffffffff, /* dst_mask */ 147 TRUE), /* pcrel_offset */ 148 149 /* 16 bit absolute */ 150 HOWTO (R_ARM_ABS16, /* type */ 151 0, /* rightshift */ 152 1, /* size (0 = byte, 1 = short, 2 = long) */ 153 16, /* bitsize */ 154 FALSE, /* pc_relative */ 155 0, /* bitpos */ 156 complain_overflow_bitfield,/* complain_on_overflow */ 157 bfd_elf_generic_reloc, /* special_function */ 158 "R_ARM_ABS16", /* name */ 159 FALSE, /* partial_inplace */ 160 0x0000ffff, /* src_mask */ 161 0x0000ffff, /* dst_mask */ 162 FALSE), /* pcrel_offset */ 163 164 /* 12 bit absolute */ 165 HOWTO (R_ARM_ABS12, /* type */ 166 0, /* rightshift */ 167 2, /* size (0 = byte, 1 = short, 2 = long) */ 168 12, /* bitsize */ 169 FALSE, /* pc_relative */ 170 0, /* bitpos */ 171 complain_overflow_bitfield,/* complain_on_overflow */ 172 bfd_elf_generic_reloc, /* special_function */ 173 "R_ARM_ABS12", /* name */ 174 FALSE, /* partial_inplace */ 175 0x00000fff, /* src_mask */ 176 0x00000fff, /* dst_mask */ 177 FALSE), /* pcrel_offset */ 178 179 HOWTO (R_ARM_THM_ABS5, /* type */ 180 6, /* rightshift */ 181 1, /* size (0 = byte, 1 = short, 2 = long) */ 182 5, /* bitsize */ 183 FALSE, /* pc_relative */ 184 0, /* bitpos */ 185 complain_overflow_bitfield,/* complain_on_overflow */ 186 bfd_elf_generic_reloc, /* special_function */ 187 "R_ARM_THM_ABS5", /* name */ 188 FALSE, /* partial_inplace */ 189 0x000007e0, /* src_mask */ 190 0x000007e0, /* dst_mask */ 191 FALSE), /* pcrel_offset */ 192 193 /* 8 bit absolute */ 194 HOWTO (R_ARM_ABS8, /* type */ 195 0, /* rightshift */ 196 0, /* size (0 = byte, 1 = short, 2 = long) */ 197 8, /* bitsize */ 198 FALSE, /* pc_relative */ 199 0, /* bitpos */ 200 complain_overflow_bitfield,/* complain_on_overflow */ 201 bfd_elf_generic_reloc, /* special_function */ 202 "R_ARM_ABS8", /* name */ 203 FALSE, /* partial_inplace */ 204 0x000000ff, /* src_mask */ 205 0x000000ff, /* dst_mask */ 206 FALSE), /* pcrel_offset */ 207 208 HOWTO (R_ARM_SBREL32, /* type */ 209 0, /* rightshift */ 210 2, /* size (0 = byte, 1 = short, 2 = long) */ 211 32, /* bitsize */ 212 FALSE, /* pc_relative */ 213 0, /* bitpos */ 214 complain_overflow_dont,/* complain_on_overflow */ 215 bfd_elf_generic_reloc, /* special_function */ 216 "R_ARM_SBREL32", /* name */ 217 FALSE, /* partial_inplace */ 218 0xffffffff, /* src_mask */ 219 0xffffffff, /* dst_mask */ 220 FALSE), /* pcrel_offset */ 221 222 HOWTO (R_ARM_THM_CALL, /* type */ 223 1, /* rightshift */ 224 2, /* size (0 = byte, 1 = short, 2 = long) */ 225 24, /* bitsize */ 226 TRUE, /* pc_relative */ 227 0, /* bitpos */ 228 complain_overflow_signed,/* complain_on_overflow */ 229 bfd_elf_generic_reloc, /* special_function */ 230 "R_ARM_THM_CALL", /* name */ 231 FALSE, /* partial_inplace */ 232 0x07ff07ff, /* src_mask */ 233 0x07ff07ff, /* dst_mask */ 234 TRUE), /* pcrel_offset */ 235 236 HOWTO (R_ARM_THM_PC8, /* type */ 237 1, /* rightshift */ 238 1, /* size (0 = byte, 1 = short, 2 = long) */ 239 8, /* bitsize */ 240 TRUE, /* pc_relative */ 241 0, /* bitpos */ 242 complain_overflow_signed,/* complain_on_overflow */ 243 bfd_elf_generic_reloc, /* special_function */ 244 "R_ARM_THM_PC8", /* name */ 245 FALSE, /* partial_inplace */ 246 0x000000ff, /* src_mask */ 247 0x000000ff, /* dst_mask */ 248 TRUE), /* pcrel_offset */ 249 250 HOWTO (R_ARM_BREL_ADJ, /* type */ 251 1, /* rightshift */ 252 1, /* size (0 = byte, 1 = short, 2 = long) */ 253 32, /* bitsize */ 254 FALSE, /* pc_relative */ 255 0, /* bitpos */ 256 complain_overflow_signed,/* complain_on_overflow */ 257 bfd_elf_generic_reloc, /* special_function */ 258 "R_ARM_BREL_ADJ", /* name */ 259 FALSE, /* partial_inplace */ 260 0xffffffff, /* src_mask */ 261 0xffffffff, /* dst_mask */ 262 FALSE), /* pcrel_offset */ 263 264 HOWTO (R_ARM_SWI24, /* type */ 265 0, /* rightshift */ 266 0, /* size (0 = byte, 1 = short, 2 = long) */ 267 0, /* bitsize */ 268 FALSE, /* pc_relative */ 269 0, /* bitpos */ 270 complain_overflow_signed,/* complain_on_overflow */ 271 bfd_elf_generic_reloc, /* special_function */ 272 "R_ARM_SWI24", /* name */ 273 FALSE, /* partial_inplace */ 274 0x00000000, /* src_mask */ 275 0x00000000, /* dst_mask */ 276 FALSE), /* pcrel_offset */ 277 278 HOWTO (R_ARM_THM_SWI8, /* type */ 279 0, /* rightshift */ 280 0, /* size (0 = byte, 1 = short, 2 = long) */ 281 0, /* bitsize */ 282 FALSE, /* pc_relative */ 283 0, /* bitpos */ 284 complain_overflow_signed,/* complain_on_overflow */ 285 bfd_elf_generic_reloc, /* special_function */ 286 "R_ARM_SWI8", /* name */ 287 FALSE, /* partial_inplace */ 288 0x00000000, /* src_mask */ 289 0x00000000, /* dst_mask */ 290 FALSE), /* pcrel_offset */ 291 292 /* BLX instruction for the ARM. */ 293 HOWTO (R_ARM_XPC25, /* type */ 294 2, /* rightshift */ 295 2, /* size (0 = byte, 1 = short, 2 = long) */ 296 25, /* bitsize */ 297 TRUE, /* pc_relative */ 298 0, /* bitpos */ 299 complain_overflow_signed,/* complain_on_overflow */ 300 bfd_elf_generic_reloc, /* special_function */ 301 "R_ARM_XPC25", /* name */ 302 FALSE, /* partial_inplace */ 303 0x00ffffff, /* src_mask */ 304 0x00ffffff, /* dst_mask */ 305 TRUE), /* pcrel_offset */ 306 307 /* BLX instruction for the Thumb. */ 308 HOWTO (R_ARM_THM_XPC22, /* type */ 309 2, /* rightshift */ 310 2, /* size (0 = byte, 1 = short, 2 = long) */ 311 22, /* bitsize */ 312 TRUE, /* pc_relative */ 313 0, /* bitpos */ 314 complain_overflow_signed,/* complain_on_overflow */ 315 bfd_elf_generic_reloc, /* special_function */ 316 "R_ARM_THM_XPC22", /* name */ 317 FALSE, /* partial_inplace */ 318 0x07ff07ff, /* src_mask */ 319 0x07ff07ff, /* dst_mask */ 320 TRUE), /* pcrel_offset */ 321 322 /* Dynamic TLS relocations. */ 323 324 HOWTO (R_ARM_TLS_DTPMOD32, /* type */ 325 0, /* rightshift */ 326 2, /* size (0 = byte, 1 = short, 2 = long) */ 327 32, /* bitsize */ 328 FALSE, /* pc_relative */ 329 0, /* bitpos */ 330 complain_overflow_bitfield,/* complain_on_overflow */ 331 bfd_elf_generic_reloc, /* special_function */ 332 "R_ARM_TLS_DTPMOD32", /* name */ 333 TRUE, /* partial_inplace */ 334 0xffffffff, /* src_mask */ 335 0xffffffff, /* dst_mask */ 336 FALSE), /* pcrel_offset */ 337 338 HOWTO (R_ARM_TLS_DTPOFF32, /* type */ 339 0, /* rightshift */ 340 2, /* size (0 = byte, 1 = short, 2 = long) */ 341 32, /* bitsize */ 342 FALSE, /* pc_relative */ 343 0, /* bitpos */ 344 complain_overflow_bitfield,/* complain_on_overflow */ 345 bfd_elf_generic_reloc, /* special_function */ 346 "R_ARM_TLS_DTPOFF32", /* name */ 347 TRUE, /* partial_inplace */ 348 0xffffffff, /* src_mask */ 349 0xffffffff, /* dst_mask */ 350 FALSE), /* pcrel_offset */ 351 352 HOWTO (R_ARM_TLS_TPOFF32, /* type */ 353 0, /* rightshift */ 354 2, /* size (0 = byte, 1 = short, 2 = long) */ 355 32, /* bitsize */ 356 FALSE, /* pc_relative */ 357 0, /* bitpos */ 358 complain_overflow_bitfield,/* complain_on_overflow */ 359 bfd_elf_generic_reloc, /* special_function */ 360 "R_ARM_TLS_TPOFF32", /* name */ 361 TRUE, /* partial_inplace */ 362 0xffffffff, /* src_mask */ 363 0xffffffff, /* dst_mask */ 364 FALSE), /* pcrel_offset */ 365 366 /* Relocs used in ARM Linux */ 367 368 HOWTO (R_ARM_COPY, /* type */ 369 0, /* rightshift */ 370 2, /* size (0 = byte, 1 = short, 2 = long) */ 371 32, /* bitsize */ 372 FALSE, /* pc_relative */ 373 0, /* bitpos */ 374 complain_overflow_bitfield,/* complain_on_overflow */ 375 bfd_elf_generic_reloc, /* special_function */ 376 "R_ARM_COPY", /* name */ 377 TRUE, /* partial_inplace */ 378 0xffffffff, /* src_mask */ 379 0xffffffff, /* dst_mask */ 380 FALSE), /* pcrel_offset */ 381 382 HOWTO (R_ARM_GLOB_DAT, /* type */ 383 0, /* rightshift */ 384 2, /* size (0 = byte, 1 = short, 2 = long) */ 385 32, /* bitsize */ 386 FALSE, /* pc_relative */ 387 0, /* bitpos */ 388 complain_overflow_bitfield,/* complain_on_overflow */ 389 bfd_elf_generic_reloc, /* special_function */ 390 "R_ARM_GLOB_DAT", /* name */ 391 TRUE, /* partial_inplace */ 392 0xffffffff, /* src_mask */ 393 0xffffffff, /* dst_mask */ 394 FALSE), /* pcrel_offset */ 395 396 HOWTO (R_ARM_JUMP_SLOT, /* type */ 397 0, /* rightshift */ 398 2, /* size (0 = byte, 1 = short, 2 = long) */ 399 32, /* bitsize */ 400 FALSE, /* pc_relative */ 401 0, /* bitpos */ 402 complain_overflow_bitfield,/* complain_on_overflow */ 403 bfd_elf_generic_reloc, /* special_function */ 404 "R_ARM_JUMP_SLOT", /* name */ 405 TRUE, /* partial_inplace */ 406 0xffffffff, /* src_mask */ 407 0xffffffff, /* dst_mask */ 408 FALSE), /* pcrel_offset */ 409 410 HOWTO (R_ARM_RELATIVE, /* type */ 411 0, /* rightshift */ 412 2, /* size (0 = byte, 1 = short, 2 = long) */ 413 32, /* bitsize */ 414 FALSE, /* pc_relative */ 415 0, /* bitpos */ 416 complain_overflow_bitfield,/* complain_on_overflow */ 417 bfd_elf_generic_reloc, /* special_function */ 418 "R_ARM_RELATIVE", /* name */ 419 TRUE, /* partial_inplace */ 420 0xffffffff, /* src_mask */ 421 0xffffffff, /* dst_mask */ 422 FALSE), /* pcrel_offset */ 423 424 HOWTO (R_ARM_GOTOFF32, /* type */ 425 0, /* rightshift */ 426 2, /* size (0 = byte, 1 = short, 2 = long) */ 427 32, /* bitsize */ 428 FALSE, /* pc_relative */ 429 0, /* bitpos */ 430 complain_overflow_bitfield,/* complain_on_overflow */ 431 bfd_elf_generic_reloc, /* special_function */ 432 "R_ARM_GOTOFF32", /* name */ 433 TRUE, /* partial_inplace */ 434 0xffffffff, /* src_mask */ 435 0xffffffff, /* dst_mask */ 436 FALSE), /* pcrel_offset */ 437 438 HOWTO (R_ARM_GOTPC, /* type */ 439 0, /* rightshift */ 440 2, /* size (0 = byte, 1 = short, 2 = long) */ 441 32, /* bitsize */ 442 TRUE, /* pc_relative */ 443 0, /* bitpos */ 444 complain_overflow_bitfield,/* complain_on_overflow */ 445 bfd_elf_generic_reloc, /* special_function */ 446 "R_ARM_GOTPC", /* name */ 447 TRUE, /* partial_inplace */ 448 0xffffffff, /* src_mask */ 449 0xffffffff, /* dst_mask */ 450 TRUE), /* pcrel_offset */ 451 452 HOWTO (R_ARM_GOT32, /* type */ 453 0, /* rightshift */ 454 2, /* size (0 = byte, 1 = short, 2 = long) */ 455 32, /* bitsize */ 456 FALSE, /* pc_relative */ 457 0, /* bitpos */ 458 complain_overflow_bitfield,/* complain_on_overflow */ 459 bfd_elf_generic_reloc, /* special_function */ 460 "R_ARM_GOT32", /* name */ 461 TRUE, /* partial_inplace */ 462 0xffffffff, /* src_mask */ 463 0xffffffff, /* dst_mask */ 464 FALSE), /* pcrel_offset */ 465 466 HOWTO (R_ARM_PLT32, /* type */ 467 2, /* rightshift */ 468 2, /* size (0 = byte, 1 = short, 2 = long) */ 469 24, /* bitsize */ 470 TRUE, /* pc_relative */ 471 0, /* bitpos */ 472 complain_overflow_bitfield,/* complain_on_overflow */ 473 bfd_elf_generic_reloc, /* special_function */ 474 "R_ARM_PLT32", /* name */ 475 FALSE, /* partial_inplace */ 476 0x00ffffff, /* src_mask */ 477 0x00ffffff, /* dst_mask */ 478 TRUE), /* pcrel_offset */ 479 480 HOWTO (R_ARM_CALL, /* type */ 481 2, /* rightshift */ 482 2, /* size (0 = byte, 1 = short, 2 = long) */ 483 24, /* bitsize */ 484 TRUE, /* pc_relative */ 485 0, /* bitpos */ 486 complain_overflow_signed,/* complain_on_overflow */ 487 bfd_elf_generic_reloc, /* special_function */ 488 "R_ARM_CALL", /* name */ 489 FALSE, /* partial_inplace */ 490 0x00ffffff, /* src_mask */ 491 0x00ffffff, /* dst_mask */ 492 TRUE), /* pcrel_offset */ 493 494 HOWTO (R_ARM_JUMP24, /* type */ 495 2, /* rightshift */ 496 2, /* size (0 = byte, 1 = short, 2 = long) */ 497 24, /* bitsize */ 498 TRUE, /* pc_relative */ 499 0, /* bitpos */ 500 complain_overflow_signed,/* complain_on_overflow */ 501 bfd_elf_generic_reloc, /* special_function */ 502 "R_ARM_JUMP24", /* name */ 503 FALSE, /* partial_inplace */ 504 0x00ffffff, /* src_mask */ 505 0x00ffffff, /* dst_mask */ 506 TRUE), /* pcrel_offset */ 507 508 HOWTO (R_ARM_THM_JUMP24, /* type */ 509 1, /* rightshift */ 510 2, /* size (0 = byte, 1 = short, 2 = long) */ 511 24, /* bitsize */ 512 TRUE, /* pc_relative */ 513 0, /* bitpos */ 514 complain_overflow_signed,/* complain_on_overflow */ 515 bfd_elf_generic_reloc, /* special_function */ 516 "R_ARM_THM_JUMP24", /* name */ 517 FALSE, /* partial_inplace */ 518 0x07ff2fff, /* src_mask */ 519 0x07ff2fff, /* dst_mask */ 520 TRUE), /* pcrel_offset */ 521 522 HOWTO (R_ARM_BASE_ABS, /* type */ 523 0, /* rightshift */ 524 2, /* size (0 = byte, 1 = short, 2 = long) */ 525 32, /* bitsize */ 526 FALSE, /* pc_relative */ 527 0, /* bitpos */ 528 complain_overflow_dont,/* complain_on_overflow */ 529 bfd_elf_generic_reloc, /* special_function */ 530 "R_ARM_BASE_ABS", /* name */ 531 FALSE, /* partial_inplace */ 532 0xffffffff, /* src_mask */ 533 0xffffffff, /* dst_mask */ 534 FALSE), /* pcrel_offset */ 535 536 HOWTO (R_ARM_ALU_PCREL7_0, /* type */ 537 0, /* rightshift */ 538 2, /* size (0 = byte, 1 = short, 2 = long) */ 539 12, /* bitsize */ 540 TRUE, /* pc_relative */ 541 0, /* bitpos */ 542 complain_overflow_dont,/* complain_on_overflow */ 543 bfd_elf_generic_reloc, /* special_function */ 544 "R_ARM_ALU_PCREL_7_0", /* name */ 545 FALSE, /* partial_inplace */ 546 0x00000fff, /* src_mask */ 547 0x00000fff, /* dst_mask */ 548 TRUE), /* pcrel_offset */ 549 550 HOWTO (R_ARM_ALU_PCREL15_8, /* type */ 551 0, /* rightshift */ 552 2, /* size (0 = byte, 1 = short, 2 = long) */ 553 12, /* bitsize */ 554 TRUE, /* pc_relative */ 555 8, /* bitpos */ 556 complain_overflow_dont,/* complain_on_overflow */ 557 bfd_elf_generic_reloc, /* special_function */ 558 "R_ARM_ALU_PCREL_15_8",/* name */ 559 FALSE, /* partial_inplace */ 560 0x00000fff, /* src_mask */ 561 0x00000fff, /* dst_mask */ 562 TRUE), /* pcrel_offset */ 563 564 HOWTO (R_ARM_ALU_PCREL23_15, /* type */ 565 0, /* rightshift */ 566 2, /* size (0 = byte, 1 = short, 2 = long) */ 567 12, /* bitsize */ 568 TRUE, /* pc_relative */ 569 16, /* bitpos */ 570 complain_overflow_dont,/* complain_on_overflow */ 571 bfd_elf_generic_reloc, /* special_function */ 572 "R_ARM_ALU_PCREL_23_15",/* name */ 573 FALSE, /* partial_inplace */ 574 0x00000fff, /* src_mask */ 575 0x00000fff, /* dst_mask */ 576 TRUE), /* pcrel_offset */ 577 578 HOWTO (R_ARM_LDR_SBREL_11_0, /* type */ 579 0, /* rightshift */ 580 2, /* size (0 = byte, 1 = short, 2 = long) */ 581 12, /* bitsize */ 582 FALSE, /* pc_relative */ 583 0, /* bitpos */ 584 complain_overflow_dont,/* complain_on_overflow */ 585 bfd_elf_generic_reloc, /* special_function */ 586 "R_ARM_LDR_SBREL_11_0",/* name */ 587 FALSE, /* partial_inplace */ 588 0x00000fff, /* src_mask */ 589 0x00000fff, /* dst_mask */ 590 FALSE), /* pcrel_offset */ 591 592 HOWTO (R_ARM_ALU_SBREL_19_12, /* type */ 593 0, /* rightshift */ 594 2, /* size (0 = byte, 1 = short, 2 = long) */ 595 8, /* bitsize */ 596 FALSE, /* pc_relative */ 597 12, /* bitpos */ 598 complain_overflow_dont,/* complain_on_overflow */ 599 bfd_elf_generic_reloc, /* special_function */ 600 "R_ARM_ALU_SBREL_19_12",/* name */ 601 FALSE, /* partial_inplace */ 602 0x000ff000, /* src_mask */ 603 0x000ff000, /* dst_mask */ 604 FALSE), /* pcrel_offset */ 605 606 HOWTO (R_ARM_ALU_SBREL_27_20, /* type */ 607 0, /* rightshift */ 608 2, /* size (0 = byte, 1 = short, 2 = long) */ 609 8, /* bitsize */ 610 FALSE, /* pc_relative */ 611 20, /* bitpos */ 612 complain_overflow_dont,/* complain_on_overflow */ 613 bfd_elf_generic_reloc, /* special_function */ 614 "R_ARM_ALU_SBREL_27_20",/* name */ 615 FALSE, /* partial_inplace */ 616 0x0ff00000, /* src_mask */ 617 0x0ff00000, /* dst_mask */ 618 FALSE), /* pcrel_offset */ 619 620 HOWTO (R_ARM_TARGET1, /* type */ 621 0, /* rightshift */ 622 2, /* size (0 = byte, 1 = short, 2 = long) */ 623 32, /* bitsize */ 624 FALSE, /* pc_relative */ 625 0, /* bitpos */ 626 complain_overflow_dont,/* complain_on_overflow */ 627 bfd_elf_generic_reloc, /* special_function */ 628 "R_ARM_TARGET1", /* name */ 629 FALSE, /* partial_inplace */ 630 0xffffffff, /* src_mask */ 631 0xffffffff, /* dst_mask */ 632 FALSE), /* pcrel_offset */ 633 634 HOWTO (R_ARM_ROSEGREL32, /* type */ 635 0, /* rightshift */ 636 2, /* size (0 = byte, 1 = short, 2 = long) */ 637 32, /* bitsize */ 638 FALSE, /* pc_relative */ 639 0, /* bitpos */ 640 complain_overflow_dont,/* complain_on_overflow */ 641 bfd_elf_generic_reloc, /* special_function */ 642 "R_ARM_ROSEGREL32", /* name */ 643 FALSE, /* partial_inplace */ 644 0xffffffff, /* src_mask */ 645 0xffffffff, /* dst_mask */ 646 FALSE), /* pcrel_offset */ 647 648 HOWTO (R_ARM_V4BX, /* type */ 649 0, /* rightshift */ 650 2, /* size (0 = byte, 1 = short, 2 = long) */ 651 32, /* bitsize */ 652 FALSE, /* pc_relative */ 653 0, /* bitpos */ 654 complain_overflow_dont,/* complain_on_overflow */ 655 bfd_elf_generic_reloc, /* special_function */ 656 "R_ARM_V4BX", /* name */ 657 FALSE, /* partial_inplace */ 658 0xffffffff, /* src_mask */ 659 0xffffffff, /* dst_mask */ 660 FALSE), /* pcrel_offset */ 661 662 HOWTO (R_ARM_TARGET2, /* type */ 663 0, /* rightshift */ 664 2, /* size (0 = byte, 1 = short, 2 = long) */ 665 32, /* bitsize */ 666 FALSE, /* pc_relative */ 667 0, /* bitpos */ 668 complain_overflow_signed,/* complain_on_overflow */ 669 bfd_elf_generic_reloc, /* special_function */ 670 "R_ARM_TARGET2", /* name */ 671 FALSE, /* partial_inplace */ 672 0xffffffff, /* src_mask */ 673 0xffffffff, /* dst_mask */ 674 TRUE), /* pcrel_offset */ 675 676 HOWTO (R_ARM_PREL31, /* type */ 677 0, /* rightshift */ 678 2, /* size (0 = byte, 1 = short, 2 = long) */ 679 31, /* bitsize */ 680 TRUE, /* pc_relative */ 681 0, /* bitpos */ 682 complain_overflow_signed,/* complain_on_overflow */ 683 bfd_elf_generic_reloc, /* special_function */ 684 "R_ARM_PREL31", /* name */ 685 FALSE, /* partial_inplace */ 686 0x7fffffff, /* src_mask */ 687 0x7fffffff, /* dst_mask */ 688 TRUE), /* pcrel_offset */ 689 690 HOWTO (R_ARM_MOVW_ABS_NC, /* type */ 691 0, /* rightshift */ 692 2, /* size (0 = byte, 1 = short, 2 = long) */ 693 16, /* bitsize */ 694 FALSE, /* pc_relative */ 695 0, /* bitpos */ 696 complain_overflow_dont,/* complain_on_overflow */ 697 bfd_elf_generic_reloc, /* special_function */ 698 "R_ARM_MOVW_ABS_NC", /* name */ 699 FALSE, /* partial_inplace */ 700 0x000f0fff, /* src_mask */ 701 0x000f0fff, /* dst_mask */ 702 FALSE), /* pcrel_offset */ 703 704 HOWTO (R_ARM_MOVT_ABS, /* type */ 705 0, /* rightshift */ 706 2, /* size (0 = byte, 1 = short, 2 = long) */ 707 16, /* bitsize */ 708 FALSE, /* pc_relative */ 709 0, /* bitpos */ 710 complain_overflow_bitfield,/* complain_on_overflow */ 711 bfd_elf_generic_reloc, /* special_function */ 712 "R_ARM_MOVT_ABS", /* name */ 713 FALSE, /* partial_inplace */ 714 0x000f0fff, /* src_mask */ 715 0x000f0fff, /* dst_mask */ 716 FALSE), /* pcrel_offset */ 717 718 HOWTO (R_ARM_MOVW_PREL_NC, /* type */ 719 0, /* rightshift */ 720 2, /* size (0 = byte, 1 = short, 2 = long) */ 721 16, /* bitsize */ 722 TRUE, /* pc_relative */ 723 0, /* bitpos */ 724 complain_overflow_dont,/* complain_on_overflow */ 725 bfd_elf_generic_reloc, /* special_function */ 726 "R_ARM_MOVW_PREL_NC", /* name */ 727 FALSE, /* partial_inplace */ 728 0x000f0fff, /* src_mask */ 729 0x000f0fff, /* dst_mask */ 730 TRUE), /* pcrel_offset */ 731 732 HOWTO (R_ARM_MOVT_PREL, /* type */ 733 0, /* rightshift */ 734 2, /* size (0 = byte, 1 = short, 2 = long) */ 735 16, /* bitsize */ 736 TRUE, /* pc_relative */ 737 0, /* bitpos */ 738 complain_overflow_bitfield,/* complain_on_overflow */ 739 bfd_elf_generic_reloc, /* special_function */ 740 "R_ARM_MOVT_PREL", /* name */ 741 FALSE, /* partial_inplace */ 742 0x000f0fff, /* src_mask */ 743 0x000f0fff, /* dst_mask */ 744 TRUE), /* pcrel_offset */ 745 746 HOWTO (R_ARM_THM_MOVW_ABS_NC, /* type */ 747 0, /* rightshift */ 748 2, /* size (0 = byte, 1 = short, 2 = long) */ 749 16, /* bitsize */ 750 FALSE, /* pc_relative */ 751 0, /* bitpos */ 752 complain_overflow_dont,/* complain_on_overflow */ 753 bfd_elf_generic_reloc, /* special_function */ 754 "R_ARM_THM_MOVW_ABS_NC",/* name */ 755 FALSE, /* partial_inplace */ 756 0x040f70ff, /* src_mask */ 757 0x040f70ff, /* dst_mask */ 758 FALSE), /* pcrel_offset */ 759 760 HOWTO (R_ARM_THM_MOVT_ABS, /* type */ 761 0, /* rightshift */ 762 2, /* size (0 = byte, 1 = short, 2 = long) */ 763 16, /* bitsize */ 764 FALSE, /* pc_relative */ 765 0, /* bitpos */ 766 complain_overflow_bitfield,/* complain_on_overflow */ 767 bfd_elf_generic_reloc, /* special_function */ 768 "R_ARM_THM_MOVT_ABS", /* name */ 769 FALSE, /* partial_inplace */ 770 0x040f70ff, /* src_mask */ 771 0x040f70ff, /* dst_mask */ 772 FALSE), /* pcrel_offset */ 773 774 HOWTO (R_ARM_THM_MOVW_PREL_NC,/* type */ 775 0, /* rightshift */ 776 2, /* size (0 = byte, 1 = short, 2 = long) */ 777 16, /* bitsize */ 778 TRUE, /* pc_relative */ 779 0, /* bitpos */ 780 complain_overflow_dont,/* complain_on_overflow */ 781 bfd_elf_generic_reloc, /* special_function */ 782 "R_ARM_THM_MOVW_PREL_NC",/* name */ 783 FALSE, /* partial_inplace */ 784 0x040f70ff, /* src_mask */ 785 0x040f70ff, /* dst_mask */ 786 TRUE), /* pcrel_offset */ 787 788 HOWTO (R_ARM_THM_MOVT_PREL, /* type */ 789 0, /* rightshift */ 790 2, /* size (0 = byte, 1 = short, 2 = long) */ 791 16, /* bitsize */ 792 TRUE, /* pc_relative */ 793 0, /* bitpos */ 794 complain_overflow_bitfield,/* complain_on_overflow */ 795 bfd_elf_generic_reloc, /* special_function */ 796 "R_ARM_THM_MOVT_PREL", /* name */ 797 FALSE, /* partial_inplace */ 798 0x040f70ff, /* src_mask */ 799 0x040f70ff, /* dst_mask */ 800 TRUE), /* pcrel_offset */ 801 802 HOWTO (R_ARM_THM_JUMP19, /* type */ 803 1, /* rightshift */ 804 2, /* size (0 = byte, 1 = short, 2 = long) */ 805 19, /* bitsize */ 806 TRUE, /* pc_relative */ 807 0, /* bitpos */ 808 complain_overflow_signed,/* complain_on_overflow */ 809 bfd_elf_generic_reloc, /* special_function */ 810 "R_ARM_THM_JUMP19", /* name */ 811 FALSE, /* partial_inplace */ 812 0x043f2fff, /* src_mask */ 813 0x043f2fff, /* dst_mask */ 814 TRUE), /* pcrel_offset */ 815 816 HOWTO (R_ARM_THM_JUMP6, /* type */ 817 1, /* rightshift */ 818 1, /* size (0 = byte, 1 = short, 2 = long) */ 819 6, /* bitsize */ 820 TRUE, /* pc_relative */ 821 0, /* bitpos */ 822 complain_overflow_unsigned,/* complain_on_overflow */ 823 bfd_elf_generic_reloc, /* special_function */ 824 "R_ARM_THM_JUMP6", /* name */ 825 FALSE, /* partial_inplace */ 826 0x02f8, /* src_mask */ 827 0x02f8, /* dst_mask */ 828 TRUE), /* pcrel_offset */ 829 830 /* These are declared as 13-bit signed relocations because we can 831 address -4095 .. 4095(base) by altering ADDW to SUBW or vice 832 versa. */ 833 HOWTO (R_ARM_THM_ALU_PREL_11_0,/* type */ 834 0, /* rightshift */ 835 2, /* size (0 = byte, 1 = short, 2 = long) */ 836 13, /* bitsize */ 837 TRUE, /* pc_relative */ 838 0, /* bitpos */ 839 complain_overflow_dont,/* complain_on_overflow */ 840 bfd_elf_generic_reloc, /* special_function */ 841 "R_ARM_THM_ALU_PREL_11_0",/* name */ 842 FALSE, /* partial_inplace */ 843 0xffffffff, /* src_mask */ 844 0xffffffff, /* dst_mask */ 845 TRUE), /* pcrel_offset */ 846 847 HOWTO (R_ARM_THM_PC12, /* type */ 848 0, /* rightshift */ 849 2, /* size (0 = byte, 1 = short, 2 = long) */ 850 13, /* bitsize */ 851 TRUE, /* pc_relative */ 852 0, /* bitpos */ 853 complain_overflow_dont,/* complain_on_overflow */ 854 bfd_elf_generic_reloc, /* special_function */ 855 "R_ARM_THM_PC12", /* name */ 856 FALSE, /* partial_inplace */ 857 0xffffffff, /* src_mask */ 858 0xffffffff, /* dst_mask */ 859 TRUE), /* pcrel_offset */ 860 861 HOWTO (R_ARM_ABS32_NOI, /* type */ 862 0, /* rightshift */ 863 2, /* size (0 = byte, 1 = short, 2 = long) */ 864 32, /* bitsize */ 865 FALSE, /* pc_relative */ 866 0, /* bitpos */ 867 complain_overflow_dont,/* complain_on_overflow */ 868 bfd_elf_generic_reloc, /* special_function */ 869 "R_ARM_ABS32_NOI", /* name */ 870 FALSE, /* partial_inplace */ 871 0xffffffff, /* src_mask */ 872 0xffffffff, /* dst_mask */ 873 FALSE), /* pcrel_offset */ 874 875 HOWTO (R_ARM_REL32_NOI, /* type */ 876 0, /* rightshift */ 877 2, /* size (0 = byte, 1 = short, 2 = long) */ 878 32, /* bitsize */ 879 TRUE, /* pc_relative */ 880 0, /* bitpos */ 881 complain_overflow_dont,/* complain_on_overflow */ 882 bfd_elf_generic_reloc, /* special_function */ 883 "R_ARM_REL32_NOI", /* name */ 884 FALSE, /* partial_inplace */ 885 0xffffffff, /* src_mask */ 886 0xffffffff, /* dst_mask */ 887 FALSE), /* pcrel_offset */ 888 889 /* Group relocations. */ 890 891 HOWTO (R_ARM_ALU_PC_G0_NC, /* type */ 892 0, /* rightshift */ 893 2, /* size (0 = byte, 1 = short, 2 = long) */ 894 32, /* bitsize */ 895 TRUE, /* pc_relative */ 896 0, /* bitpos */ 897 complain_overflow_dont,/* complain_on_overflow */ 898 bfd_elf_generic_reloc, /* special_function */ 899 "R_ARM_ALU_PC_G0_NC", /* name */ 900 FALSE, /* partial_inplace */ 901 0xffffffff, /* src_mask */ 902 0xffffffff, /* dst_mask */ 903 TRUE), /* pcrel_offset */ 904 905 HOWTO (R_ARM_ALU_PC_G0, /* type */ 906 0, /* rightshift */ 907 2, /* size (0 = byte, 1 = short, 2 = long) */ 908 32, /* bitsize */ 909 TRUE, /* pc_relative */ 910 0, /* bitpos */ 911 complain_overflow_dont,/* complain_on_overflow */ 912 bfd_elf_generic_reloc, /* special_function */ 913 "R_ARM_ALU_PC_G0", /* name */ 914 FALSE, /* partial_inplace */ 915 0xffffffff, /* src_mask */ 916 0xffffffff, /* dst_mask */ 917 TRUE), /* pcrel_offset */ 918 919 HOWTO (R_ARM_ALU_PC_G1_NC, /* type */ 920 0, /* rightshift */ 921 2, /* size (0 = byte, 1 = short, 2 = long) */ 922 32, /* bitsize */ 923 TRUE, /* pc_relative */ 924 0, /* bitpos */ 925 complain_overflow_dont,/* complain_on_overflow */ 926 bfd_elf_generic_reloc, /* special_function */ 927 "R_ARM_ALU_PC_G1_NC", /* name */ 928 FALSE, /* partial_inplace */ 929 0xffffffff, /* src_mask */ 930 0xffffffff, /* dst_mask */ 931 TRUE), /* pcrel_offset */ 932 933 HOWTO (R_ARM_ALU_PC_G1, /* type */ 934 0, /* rightshift */ 935 2, /* size (0 = byte, 1 = short, 2 = long) */ 936 32, /* bitsize */ 937 TRUE, /* pc_relative */ 938 0, /* bitpos */ 939 complain_overflow_dont,/* complain_on_overflow */ 940 bfd_elf_generic_reloc, /* special_function */ 941 "R_ARM_ALU_PC_G1", /* name */ 942 FALSE, /* partial_inplace */ 943 0xffffffff, /* src_mask */ 944 0xffffffff, /* dst_mask */ 945 TRUE), /* pcrel_offset */ 946 947 HOWTO (R_ARM_ALU_PC_G2, /* type */ 948 0, /* rightshift */ 949 2, /* size (0 = byte, 1 = short, 2 = long) */ 950 32, /* bitsize */ 951 TRUE, /* pc_relative */ 952 0, /* bitpos */ 953 complain_overflow_dont,/* complain_on_overflow */ 954 bfd_elf_generic_reloc, /* special_function */ 955 "R_ARM_ALU_PC_G2", /* name */ 956 FALSE, /* partial_inplace */ 957 0xffffffff, /* src_mask */ 958 0xffffffff, /* dst_mask */ 959 TRUE), /* pcrel_offset */ 960 961 HOWTO (R_ARM_LDR_PC_G1, /* type */ 962 0, /* rightshift */ 963 2, /* size (0 = byte, 1 = short, 2 = long) */ 964 32, /* bitsize */ 965 TRUE, /* pc_relative */ 966 0, /* bitpos */ 967 complain_overflow_dont,/* complain_on_overflow */ 968 bfd_elf_generic_reloc, /* special_function */ 969 "R_ARM_LDR_PC_G1", /* name */ 970 FALSE, /* partial_inplace */ 971 0xffffffff, /* src_mask */ 972 0xffffffff, /* dst_mask */ 973 TRUE), /* pcrel_offset */ 974 975 HOWTO (R_ARM_LDR_PC_G2, /* type */ 976 0, /* rightshift */ 977 2, /* size (0 = byte, 1 = short, 2 = long) */ 978 32, /* bitsize */ 979 TRUE, /* pc_relative */ 980 0, /* bitpos */ 981 complain_overflow_dont,/* complain_on_overflow */ 982 bfd_elf_generic_reloc, /* special_function */ 983 "R_ARM_LDR_PC_G2", /* name */ 984 FALSE, /* partial_inplace */ 985 0xffffffff, /* src_mask */ 986 0xffffffff, /* dst_mask */ 987 TRUE), /* pcrel_offset */ 988 989 HOWTO (R_ARM_LDRS_PC_G0, /* type */ 990 0, /* rightshift */ 991 2, /* size (0 = byte, 1 = short, 2 = long) */ 992 32, /* bitsize */ 993 TRUE, /* pc_relative */ 994 0, /* bitpos */ 995 complain_overflow_dont,/* complain_on_overflow */ 996 bfd_elf_generic_reloc, /* special_function */ 997 "R_ARM_LDRS_PC_G0", /* name */ 998 FALSE, /* partial_inplace */ 999 0xffffffff, /* src_mask */ 1000 0xffffffff, /* dst_mask */ 1001 TRUE), /* pcrel_offset */ 1002 1003 HOWTO (R_ARM_LDRS_PC_G1, /* type */ 1004 0, /* rightshift */ 1005 2, /* size (0 = byte, 1 = short, 2 = long) */ 1006 32, /* bitsize */ 1007 TRUE, /* pc_relative */ 1008 0, /* bitpos */ 1009 complain_overflow_dont,/* complain_on_overflow */ 1010 bfd_elf_generic_reloc, /* special_function */ 1011 "R_ARM_LDRS_PC_G1", /* name */ 1012 FALSE, /* partial_inplace */ 1013 0xffffffff, /* src_mask */ 1014 0xffffffff, /* dst_mask */ 1015 TRUE), /* pcrel_offset */ 1016 1017 HOWTO (R_ARM_LDRS_PC_G2, /* type */ 1018 0, /* rightshift */ 1019 2, /* size (0 = byte, 1 = short, 2 = long) */ 1020 32, /* bitsize */ 1021 TRUE, /* pc_relative */ 1022 0, /* bitpos */ 1023 complain_overflow_dont,/* complain_on_overflow */ 1024 bfd_elf_generic_reloc, /* special_function */ 1025 "R_ARM_LDRS_PC_G2", /* name */ 1026 FALSE, /* partial_inplace */ 1027 0xffffffff, /* src_mask */ 1028 0xffffffff, /* dst_mask */ 1029 TRUE), /* pcrel_offset */ 1030 1031 HOWTO (R_ARM_LDC_PC_G0, /* type */ 1032 0, /* rightshift */ 1033 2, /* size (0 = byte, 1 = short, 2 = long) */ 1034 32, /* bitsize */ 1035 TRUE, /* pc_relative */ 1036 0, /* bitpos */ 1037 complain_overflow_dont,/* complain_on_overflow */ 1038 bfd_elf_generic_reloc, /* special_function */ 1039 "R_ARM_LDC_PC_G0", /* name */ 1040 FALSE, /* partial_inplace */ 1041 0xffffffff, /* src_mask */ 1042 0xffffffff, /* dst_mask */ 1043 TRUE), /* pcrel_offset */ 1044 1045 HOWTO (R_ARM_LDC_PC_G1, /* type */ 1046 0, /* rightshift */ 1047 2, /* size (0 = byte, 1 = short, 2 = long) */ 1048 32, /* bitsize */ 1049 TRUE, /* pc_relative */ 1050 0, /* bitpos */ 1051 complain_overflow_dont,/* complain_on_overflow */ 1052 bfd_elf_generic_reloc, /* special_function */ 1053 "R_ARM_LDC_PC_G1", /* name */ 1054 FALSE, /* partial_inplace */ 1055 0xffffffff, /* src_mask */ 1056 0xffffffff, /* dst_mask */ 1057 TRUE), /* pcrel_offset */ 1058 1059 HOWTO (R_ARM_LDC_PC_G2, /* type */ 1060 0, /* rightshift */ 1061 2, /* size (0 = byte, 1 = short, 2 = long) */ 1062 32, /* bitsize */ 1063 TRUE, /* pc_relative */ 1064 0, /* bitpos */ 1065 complain_overflow_dont,/* complain_on_overflow */ 1066 bfd_elf_generic_reloc, /* special_function */ 1067 "R_ARM_LDC_PC_G2", /* name */ 1068 FALSE, /* partial_inplace */ 1069 0xffffffff, /* src_mask */ 1070 0xffffffff, /* dst_mask */ 1071 TRUE), /* pcrel_offset */ 1072 1073 HOWTO (R_ARM_ALU_SB_G0_NC, /* type */ 1074 0, /* rightshift */ 1075 2, /* size (0 = byte, 1 = short, 2 = long) */ 1076 32, /* bitsize */ 1077 TRUE, /* pc_relative */ 1078 0, /* bitpos */ 1079 complain_overflow_dont,/* complain_on_overflow */ 1080 bfd_elf_generic_reloc, /* special_function */ 1081 "R_ARM_ALU_SB_G0_NC", /* name */ 1082 FALSE, /* partial_inplace */ 1083 0xffffffff, /* src_mask */ 1084 0xffffffff, /* dst_mask */ 1085 TRUE), /* pcrel_offset */ 1086 1087 HOWTO (R_ARM_ALU_SB_G0, /* type */ 1088 0, /* rightshift */ 1089 2, /* size (0 = byte, 1 = short, 2 = long) */ 1090 32, /* bitsize */ 1091 TRUE, /* pc_relative */ 1092 0, /* bitpos */ 1093 complain_overflow_dont,/* complain_on_overflow */ 1094 bfd_elf_generic_reloc, /* special_function */ 1095 "R_ARM_ALU_SB_G0", /* name */ 1096 FALSE, /* partial_inplace */ 1097 0xffffffff, /* src_mask */ 1098 0xffffffff, /* dst_mask */ 1099 TRUE), /* pcrel_offset */ 1100 1101 HOWTO (R_ARM_ALU_SB_G1_NC, /* type */ 1102 0, /* rightshift */ 1103 2, /* size (0 = byte, 1 = short, 2 = long) */ 1104 32, /* bitsize */ 1105 TRUE, /* pc_relative */ 1106 0, /* bitpos */ 1107 complain_overflow_dont,/* complain_on_overflow */ 1108 bfd_elf_generic_reloc, /* special_function */ 1109 "R_ARM_ALU_SB_G1_NC", /* name */ 1110 FALSE, /* partial_inplace */ 1111 0xffffffff, /* src_mask */ 1112 0xffffffff, /* dst_mask */ 1113 TRUE), /* pcrel_offset */ 1114 1115 HOWTO (R_ARM_ALU_SB_G1, /* type */ 1116 0, /* rightshift */ 1117 2, /* size (0 = byte, 1 = short, 2 = long) */ 1118 32, /* bitsize */ 1119 TRUE, /* pc_relative */ 1120 0, /* bitpos */ 1121 complain_overflow_dont,/* complain_on_overflow */ 1122 bfd_elf_generic_reloc, /* special_function */ 1123 "R_ARM_ALU_SB_G1", /* name */ 1124 FALSE, /* partial_inplace */ 1125 0xffffffff, /* src_mask */ 1126 0xffffffff, /* dst_mask */ 1127 TRUE), /* pcrel_offset */ 1128 1129 HOWTO (R_ARM_ALU_SB_G2, /* type */ 1130 0, /* rightshift */ 1131 2, /* size (0 = byte, 1 = short, 2 = long) */ 1132 32, /* bitsize */ 1133 TRUE, /* pc_relative */ 1134 0, /* bitpos */ 1135 complain_overflow_dont,/* complain_on_overflow */ 1136 bfd_elf_generic_reloc, /* special_function */ 1137 "R_ARM_ALU_SB_G2", /* name */ 1138 FALSE, /* partial_inplace */ 1139 0xffffffff, /* src_mask */ 1140 0xffffffff, /* dst_mask */ 1141 TRUE), /* pcrel_offset */ 1142 1143 HOWTO (R_ARM_LDR_SB_G0, /* type */ 1144 0, /* rightshift */ 1145 2, /* size (0 = byte, 1 = short, 2 = long) */ 1146 32, /* bitsize */ 1147 TRUE, /* pc_relative */ 1148 0, /* bitpos */ 1149 complain_overflow_dont,/* complain_on_overflow */ 1150 bfd_elf_generic_reloc, /* special_function */ 1151 "R_ARM_LDR_SB_G0", /* name */ 1152 FALSE, /* partial_inplace */ 1153 0xffffffff, /* src_mask */ 1154 0xffffffff, /* dst_mask */ 1155 TRUE), /* pcrel_offset */ 1156 1157 HOWTO (R_ARM_LDR_SB_G1, /* type */ 1158 0, /* rightshift */ 1159 2, /* size (0 = byte, 1 = short, 2 = long) */ 1160 32, /* bitsize */ 1161 TRUE, /* pc_relative */ 1162 0, /* bitpos */ 1163 complain_overflow_dont,/* complain_on_overflow */ 1164 bfd_elf_generic_reloc, /* special_function */ 1165 "R_ARM_LDR_SB_G1", /* name */ 1166 FALSE, /* partial_inplace */ 1167 0xffffffff, /* src_mask */ 1168 0xffffffff, /* dst_mask */ 1169 TRUE), /* pcrel_offset */ 1170 1171 HOWTO (R_ARM_LDR_SB_G2, /* type */ 1172 0, /* rightshift */ 1173 2, /* size (0 = byte, 1 = short, 2 = long) */ 1174 32, /* bitsize */ 1175 TRUE, /* pc_relative */ 1176 0, /* bitpos */ 1177 complain_overflow_dont,/* complain_on_overflow */ 1178 bfd_elf_generic_reloc, /* special_function */ 1179 "R_ARM_LDR_SB_G2", /* name */ 1180 FALSE, /* partial_inplace */ 1181 0xffffffff, /* src_mask */ 1182 0xffffffff, /* dst_mask */ 1183 TRUE), /* pcrel_offset */ 1184 1185 HOWTO (R_ARM_LDRS_SB_G0, /* type */ 1186 0, /* rightshift */ 1187 2, /* size (0 = byte, 1 = short, 2 = long) */ 1188 32, /* bitsize */ 1189 TRUE, /* pc_relative */ 1190 0, /* bitpos */ 1191 complain_overflow_dont,/* complain_on_overflow */ 1192 bfd_elf_generic_reloc, /* special_function */ 1193 "R_ARM_LDRS_SB_G0", /* name */ 1194 FALSE, /* partial_inplace */ 1195 0xffffffff, /* src_mask */ 1196 0xffffffff, /* dst_mask */ 1197 TRUE), /* pcrel_offset */ 1198 1199 HOWTO (R_ARM_LDRS_SB_G1, /* type */ 1200 0, /* rightshift */ 1201 2, /* size (0 = byte, 1 = short, 2 = long) */ 1202 32, /* bitsize */ 1203 TRUE, /* pc_relative */ 1204 0, /* bitpos */ 1205 complain_overflow_dont,/* complain_on_overflow */ 1206 bfd_elf_generic_reloc, /* special_function */ 1207 "R_ARM_LDRS_SB_G1", /* name */ 1208 FALSE, /* partial_inplace */ 1209 0xffffffff, /* src_mask */ 1210 0xffffffff, /* dst_mask */ 1211 TRUE), /* pcrel_offset */ 1212 1213 HOWTO (R_ARM_LDRS_SB_G2, /* type */ 1214 0, /* rightshift */ 1215 2, /* size (0 = byte, 1 = short, 2 = long) */ 1216 32, /* bitsize */ 1217 TRUE, /* pc_relative */ 1218 0, /* bitpos */ 1219 complain_overflow_dont,/* complain_on_overflow */ 1220 bfd_elf_generic_reloc, /* special_function */ 1221 "R_ARM_LDRS_SB_G2", /* name */ 1222 FALSE, /* partial_inplace */ 1223 0xffffffff, /* src_mask */ 1224 0xffffffff, /* dst_mask */ 1225 TRUE), /* pcrel_offset */ 1226 1227 HOWTO (R_ARM_LDC_SB_G0, /* type */ 1228 0, /* rightshift */ 1229 2, /* size (0 = byte, 1 = short, 2 = long) */ 1230 32, /* bitsize */ 1231 TRUE, /* pc_relative */ 1232 0, /* bitpos */ 1233 complain_overflow_dont,/* complain_on_overflow */ 1234 bfd_elf_generic_reloc, /* special_function */ 1235 "R_ARM_LDC_SB_G0", /* name */ 1236 FALSE, /* partial_inplace */ 1237 0xffffffff, /* src_mask */ 1238 0xffffffff, /* dst_mask */ 1239 TRUE), /* pcrel_offset */ 1240 1241 HOWTO (R_ARM_LDC_SB_G1, /* type */ 1242 0, /* rightshift */ 1243 2, /* size (0 = byte, 1 = short, 2 = long) */ 1244 32, /* bitsize */ 1245 TRUE, /* pc_relative */ 1246 0, /* bitpos */ 1247 complain_overflow_dont,/* complain_on_overflow */ 1248 bfd_elf_generic_reloc, /* special_function */ 1249 "R_ARM_LDC_SB_G1", /* name */ 1250 FALSE, /* partial_inplace */ 1251 0xffffffff, /* src_mask */ 1252 0xffffffff, /* dst_mask */ 1253 TRUE), /* pcrel_offset */ 1254 1255 HOWTO (R_ARM_LDC_SB_G2, /* type */ 1256 0, /* rightshift */ 1257 2, /* size (0 = byte, 1 = short, 2 = long) */ 1258 32, /* bitsize */ 1259 TRUE, /* pc_relative */ 1260 0, /* bitpos */ 1261 complain_overflow_dont,/* complain_on_overflow */ 1262 bfd_elf_generic_reloc, /* special_function */ 1263 "R_ARM_LDC_SB_G2", /* name */ 1264 FALSE, /* partial_inplace */ 1265 0xffffffff, /* src_mask */ 1266 0xffffffff, /* dst_mask */ 1267 TRUE), /* pcrel_offset */ 1268 1269 /* End of group relocations. */ 1270 1271 HOWTO (R_ARM_MOVW_BREL_NC, /* type */ 1272 0, /* rightshift */ 1273 2, /* size (0 = byte, 1 = short, 2 = long) */ 1274 16, /* bitsize */ 1275 FALSE, /* pc_relative */ 1276 0, /* bitpos */ 1277 complain_overflow_dont,/* complain_on_overflow */ 1278 bfd_elf_generic_reloc, /* special_function */ 1279 "R_ARM_MOVW_BREL_NC", /* name */ 1280 FALSE, /* partial_inplace */ 1281 0x0000ffff, /* src_mask */ 1282 0x0000ffff, /* dst_mask */ 1283 FALSE), /* pcrel_offset */ 1284 1285 HOWTO (R_ARM_MOVT_BREL, /* type */ 1286 0, /* rightshift */ 1287 2, /* size (0 = byte, 1 = short, 2 = long) */ 1288 16, /* bitsize */ 1289 FALSE, /* pc_relative */ 1290 0, /* bitpos */ 1291 complain_overflow_bitfield,/* complain_on_overflow */ 1292 bfd_elf_generic_reloc, /* special_function */ 1293 "R_ARM_MOVT_BREL", /* name */ 1294 FALSE, /* partial_inplace */ 1295 0x0000ffff, /* src_mask */ 1296 0x0000ffff, /* dst_mask */ 1297 FALSE), /* pcrel_offset */ 1298 1299 HOWTO (R_ARM_MOVW_BREL, /* type */ 1300 0, /* rightshift */ 1301 2, /* size (0 = byte, 1 = short, 2 = long) */ 1302 16, /* bitsize */ 1303 FALSE, /* pc_relative */ 1304 0, /* bitpos */ 1305 complain_overflow_dont,/* complain_on_overflow */ 1306 bfd_elf_generic_reloc, /* special_function */ 1307 "R_ARM_MOVW_BREL", /* name */ 1308 FALSE, /* partial_inplace */ 1309 0x0000ffff, /* src_mask */ 1310 0x0000ffff, /* dst_mask */ 1311 FALSE), /* pcrel_offset */ 1312 1313 HOWTO (R_ARM_THM_MOVW_BREL_NC,/* type */ 1314 0, /* rightshift */ 1315 2, /* size (0 = byte, 1 = short, 2 = long) */ 1316 16, /* bitsize */ 1317 FALSE, /* pc_relative */ 1318 0, /* bitpos */ 1319 complain_overflow_dont,/* complain_on_overflow */ 1320 bfd_elf_generic_reloc, /* special_function */ 1321 "R_ARM_THM_MOVW_BREL_NC",/* name */ 1322 FALSE, /* partial_inplace */ 1323 0x040f70ff, /* src_mask */ 1324 0x040f70ff, /* dst_mask */ 1325 FALSE), /* pcrel_offset */ 1326 1327 HOWTO (R_ARM_THM_MOVT_BREL, /* type */ 1328 0, /* rightshift */ 1329 2, /* size (0 = byte, 1 = short, 2 = long) */ 1330 16, /* bitsize */ 1331 FALSE, /* pc_relative */ 1332 0, /* bitpos */ 1333 complain_overflow_bitfield,/* complain_on_overflow */ 1334 bfd_elf_generic_reloc, /* special_function */ 1335 "R_ARM_THM_MOVT_BREL", /* name */ 1336 FALSE, /* partial_inplace */ 1337 0x040f70ff, /* src_mask */ 1338 0x040f70ff, /* dst_mask */ 1339 FALSE), /* pcrel_offset */ 1340 1341 HOWTO (R_ARM_THM_MOVW_BREL, /* type */ 1342 0, /* rightshift */ 1343 2, /* size (0 = byte, 1 = short, 2 = long) */ 1344 16, /* bitsize */ 1345 FALSE, /* pc_relative */ 1346 0, /* bitpos */ 1347 complain_overflow_dont,/* complain_on_overflow */ 1348 bfd_elf_generic_reloc, /* special_function */ 1349 "R_ARM_THM_MOVW_BREL", /* name */ 1350 FALSE, /* partial_inplace */ 1351 0x040f70ff, /* src_mask */ 1352 0x040f70ff, /* dst_mask */ 1353 FALSE), /* pcrel_offset */ 1354 1355 EMPTY_HOWTO (90), /* Unallocated. */ 1356 EMPTY_HOWTO (91), 1357 EMPTY_HOWTO (92), 1358 EMPTY_HOWTO (93), 1359 1360 HOWTO (R_ARM_PLT32_ABS, /* type */ 1361 0, /* rightshift */ 1362 2, /* size (0 = byte, 1 = short, 2 = long) */ 1363 32, /* bitsize */ 1364 FALSE, /* pc_relative */ 1365 0, /* bitpos */ 1366 complain_overflow_dont,/* complain_on_overflow */ 1367 bfd_elf_generic_reloc, /* special_function */ 1368 "R_ARM_PLT32_ABS", /* name */ 1369 FALSE, /* partial_inplace */ 1370 0xffffffff, /* src_mask */ 1371 0xffffffff, /* dst_mask */ 1372 FALSE), /* pcrel_offset */ 1373 1374 HOWTO (R_ARM_GOT_ABS, /* type */ 1375 0, /* rightshift */ 1376 2, /* size (0 = byte, 1 = short, 2 = long) */ 1377 32, /* bitsize */ 1378 FALSE, /* pc_relative */ 1379 0, /* bitpos */ 1380 complain_overflow_dont,/* complain_on_overflow */ 1381 bfd_elf_generic_reloc, /* special_function */ 1382 "R_ARM_GOT_ABS", /* name */ 1383 FALSE, /* partial_inplace */ 1384 0xffffffff, /* src_mask */ 1385 0xffffffff, /* dst_mask */ 1386 FALSE), /* pcrel_offset */ 1387 1388 HOWTO (R_ARM_GOT_PREL, /* type */ 1389 0, /* rightshift */ 1390 2, /* size (0 = byte, 1 = short, 2 = long) */ 1391 32, /* bitsize */ 1392 TRUE, /* pc_relative */ 1393 0, /* bitpos */ 1394 complain_overflow_dont, /* complain_on_overflow */ 1395 bfd_elf_generic_reloc, /* special_function */ 1396 "R_ARM_GOT_PREL", /* name */ 1397 FALSE, /* partial_inplace */ 1398 0xffffffff, /* src_mask */ 1399 0xffffffff, /* dst_mask */ 1400 TRUE), /* pcrel_offset */ 1401 1402 HOWTO (R_ARM_GOT_BREL12, /* type */ 1403 0, /* rightshift */ 1404 2, /* size (0 = byte, 1 = short, 2 = long) */ 1405 12, /* bitsize */ 1406 FALSE, /* pc_relative */ 1407 0, /* bitpos */ 1408 complain_overflow_bitfield,/* complain_on_overflow */ 1409 bfd_elf_generic_reloc, /* special_function */ 1410 "R_ARM_GOT_BREL12", /* name */ 1411 FALSE, /* partial_inplace */ 1412 0x00000fff, /* src_mask */ 1413 0x00000fff, /* dst_mask */ 1414 FALSE), /* pcrel_offset */ 1415 1416 HOWTO (R_ARM_GOTOFF12, /* type */ 1417 0, /* rightshift */ 1418 2, /* size (0 = byte, 1 = short, 2 = long) */ 1419 12, /* bitsize */ 1420 FALSE, /* pc_relative */ 1421 0, /* bitpos */ 1422 complain_overflow_bitfield,/* complain_on_overflow */ 1423 bfd_elf_generic_reloc, /* special_function */ 1424 "R_ARM_GOTOFF12", /* name */ 1425 FALSE, /* partial_inplace */ 1426 0x00000fff, /* src_mask */ 1427 0x00000fff, /* dst_mask */ 1428 FALSE), /* pcrel_offset */ 1429 1430 EMPTY_HOWTO (R_ARM_GOTRELAX), /* reserved for future GOT-load optimizations */ 1431 1432 /* GNU extension to record C++ vtable member usage */ 1433 HOWTO (R_ARM_GNU_VTENTRY, /* type */ 1434 0, /* rightshift */ 1435 2, /* size (0 = byte, 1 = short, 2 = long) */ 1436 0, /* bitsize */ 1437 FALSE, /* pc_relative */ 1438 0, /* bitpos */ 1439 complain_overflow_dont, /* complain_on_overflow */ 1440 _bfd_elf_rel_vtable_reloc_fn, /* special_function */ 1441 "R_ARM_GNU_VTENTRY", /* name */ 1442 FALSE, /* partial_inplace */ 1443 0, /* src_mask */ 1444 0, /* dst_mask */ 1445 FALSE), /* pcrel_offset */ 1446 1447 /* GNU extension to record C++ vtable hierarchy */ 1448 HOWTO (R_ARM_GNU_VTINHERIT, /* type */ 1449 0, /* rightshift */ 1450 2, /* size (0 = byte, 1 = short, 2 = long) */ 1451 0, /* bitsize */ 1452 FALSE, /* pc_relative */ 1453 0, /* bitpos */ 1454 complain_overflow_dont, /* complain_on_overflow */ 1455 NULL, /* special_function */ 1456 "R_ARM_GNU_VTINHERIT", /* name */ 1457 FALSE, /* partial_inplace */ 1458 0, /* src_mask */ 1459 0, /* dst_mask */ 1460 FALSE), /* pcrel_offset */ 1461 1462 HOWTO (R_ARM_THM_JUMP11, /* type */ 1463 1, /* rightshift */ 1464 1, /* size (0 = byte, 1 = short, 2 = long) */ 1465 11, /* bitsize */ 1466 TRUE, /* pc_relative */ 1467 0, /* bitpos */ 1468 complain_overflow_signed, /* complain_on_overflow */ 1469 bfd_elf_generic_reloc, /* special_function */ 1470 "R_ARM_THM_JUMP11", /* name */ 1471 FALSE, /* partial_inplace */ 1472 0x000007ff, /* src_mask */ 1473 0x000007ff, /* dst_mask */ 1474 TRUE), /* pcrel_offset */ 1475 1476 HOWTO (R_ARM_THM_JUMP8, /* type */ 1477 1, /* rightshift */ 1478 1, /* size (0 = byte, 1 = short, 2 = long) */ 1479 8, /* bitsize */ 1480 TRUE, /* pc_relative */ 1481 0, /* bitpos */ 1482 complain_overflow_signed, /* complain_on_overflow */ 1483 bfd_elf_generic_reloc, /* special_function */ 1484 "R_ARM_THM_JUMP8", /* name */ 1485 FALSE, /* partial_inplace */ 1486 0x000000ff, /* src_mask */ 1487 0x000000ff, /* dst_mask */ 1488 TRUE), /* pcrel_offset */ 1489 1490 /* TLS relocations */ 1491 HOWTO (R_ARM_TLS_GD32, /* type */ 1492 0, /* rightshift */ 1493 2, /* size (0 = byte, 1 = short, 2 = long) */ 1494 32, /* bitsize */ 1495 FALSE, /* pc_relative */ 1496 0, /* bitpos */ 1497 complain_overflow_bitfield,/* complain_on_overflow */ 1498 NULL, /* special_function */ 1499 "R_ARM_TLS_GD32", /* name */ 1500 TRUE, /* partial_inplace */ 1501 0xffffffff, /* src_mask */ 1502 0xffffffff, /* dst_mask */ 1503 FALSE), /* pcrel_offset */ 1504 1505 HOWTO (R_ARM_TLS_LDM32, /* type */ 1506 0, /* rightshift */ 1507 2, /* size (0 = byte, 1 = short, 2 = long) */ 1508 32, /* bitsize */ 1509 FALSE, /* pc_relative */ 1510 0, /* bitpos */ 1511 complain_overflow_bitfield,/* complain_on_overflow */ 1512 bfd_elf_generic_reloc, /* special_function */ 1513 "R_ARM_TLS_LDM32", /* name */ 1514 TRUE, /* partial_inplace */ 1515 0xffffffff, /* src_mask */ 1516 0xffffffff, /* dst_mask */ 1517 FALSE), /* pcrel_offset */ 1518 1519 HOWTO (R_ARM_TLS_LDO32, /* type */ 1520 0, /* rightshift */ 1521 2, /* size (0 = byte, 1 = short, 2 = long) */ 1522 32, /* bitsize */ 1523 FALSE, /* pc_relative */ 1524 0, /* bitpos */ 1525 complain_overflow_bitfield,/* complain_on_overflow */ 1526 bfd_elf_generic_reloc, /* special_function */ 1527 "R_ARM_TLS_LDO32", /* name */ 1528 TRUE, /* partial_inplace */ 1529 0xffffffff, /* src_mask */ 1530 0xffffffff, /* dst_mask */ 1531 FALSE), /* pcrel_offset */ 1532 1533 HOWTO (R_ARM_TLS_IE32, /* type */ 1534 0, /* rightshift */ 1535 2, /* size (0 = byte, 1 = short, 2 = long) */ 1536 32, /* bitsize */ 1537 FALSE, /* pc_relative */ 1538 0, /* bitpos */ 1539 complain_overflow_bitfield,/* complain_on_overflow */ 1540 NULL, /* special_function */ 1541 "R_ARM_TLS_IE32", /* name */ 1542 TRUE, /* partial_inplace */ 1543 0xffffffff, /* src_mask */ 1544 0xffffffff, /* dst_mask */ 1545 FALSE), /* pcrel_offset */ 1546 1547 HOWTO (R_ARM_TLS_LE32, /* type */ 1548 0, /* rightshift */ 1549 2, /* size (0 = byte, 1 = short, 2 = long) */ 1550 32, /* bitsize */ 1551 FALSE, /* pc_relative */ 1552 0, /* bitpos */ 1553 complain_overflow_bitfield,/* complain_on_overflow */ 1554 bfd_elf_generic_reloc, /* special_function */ 1555 "R_ARM_TLS_LE32", /* name */ 1556 TRUE, /* partial_inplace */ 1557 0xffffffff, /* src_mask */ 1558 0xffffffff, /* dst_mask */ 1559 FALSE), /* pcrel_offset */ 1560 1561 HOWTO (R_ARM_TLS_LDO12, /* type */ 1562 0, /* rightshift */ 1563 2, /* size (0 = byte, 1 = short, 2 = long) */ 1564 12, /* bitsize */ 1565 FALSE, /* pc_relative */ 1566 0, /* bitpos */ 1567 complain_overflow_bitfield,/* complain_on_overflow */ 1568 bfd_elf_generic_reloc, /* special_function */ 1569 "R_ARM_TLS_LDO12", /* name */ 1570 FALSE, /* partial_inplace */ 1571 0x00000fff, /* src_mask */ 1572 0x00000fff, /* dst_mask */ 1573 FALSE), /* pcrel_offset */ 1574 1575 HOWTO (R_ARM_TLS_LE12, /* type */ 1576 0, /* rightshift */ 1577 2, /* size (0 = byte, 1 = short, 2 = long) */ 1578 12, /* bitsize */ 1579 FALSE, /* pc_relative */ 1580 0, /* bitpos */ 1581 complain_overflow_bitfield,/* complain_on_overflow */ 1582 bfd_elf_generic_reloc, /* special_function */ 1583 "R_ARM_TLS_LE12", /* name */ 1584 FALSE, /* partial_inplace */ 1585 0x00000fff, /* src_mask */ 1586 0x00000fff, /* dst_mask */ 1587 FALSE), /* pcrel_offset */ 1588 1589 HOWTO (R_ARM_TLS_IE12GP, /* type */ 1590 0, /* rightshift */ 1591 2, /* size (0 = byte, 1 = short, 2 = long) */ 1592 12, /* bitsize */ 1593 FALSE, /* pc_relative */ 1594 0, /* bitpos */ 1595 complain_overflow_bitfield,/* complain_on_overflow */ 1596 bfd_elf_generic_reloc, /* special_function */ 1597 "R_ARM_TLS_IE12GP", /* name */ 1598 FALSE, /* partial_inplace */ 1599 0x00000fff, /* src_mask */ 1600 0x00000fff, /* dst_mask */ 1601 FALSE), /* pcrel_offset */ 1602 }; 1603 1604 /* 112-127 private relocations 1605 128 R_ARM_ME_TOO, obsolete 1606 129-255 unallocated in AAELF. 1607 1608 249-255 extended, currently unused, relocations: */ 1609 1610 static reloc_howto_type elf32_arm_howto_table_2[4] = 1611 { 1612 HOWTO (R_ARM_RREL32, /* type */ 1613 0, /* rightshift */ 1614 0, /* size (0 = byte, 1 = short, 2 = long) */ 1615 0, /* bitsize */ 1616 FALSE, /* pc_relative */ 1617 0, /* bitpos */ 1618 complain_overflow_dont,/* complain_on_overflow */ 1619 bfd_elf_generic_reloc, /* special_function */ 1620 "R_ARM_RREL32", /* name */ 1621 FALSE, /* partial_inplace */ 1622 0, /* src_mask */ 1623 0, /* dst_mask */ 1624 FALSE), /* pcrel_offset */ 1625 1626 HOWTO (R_ARM_RABS32, /* type */ 1627 0, /* rightshift */ 1628 0, /* size (0 = byte, 1 = short, 2 = long) */ 1629 0, /* bitsize */ 1630 FALSE, /* pc_relative */ 1631 0, /* bitpos */ 1632 complain_overflow_dont,/* complain_on_overflow */ 1633 bfd_elf_generic_reloc, /* special_function */ 1634 "R_ARM_RABS32", /* name */ 1635 FALSE, /* partial_inplace */ 1636 0, /* src_mask */ 1637 0, /* dst_mask */ 1638 FALSE), /* pcrel_offset */ 1639 1640 HOWTO (R_ARM_RPC24, /* type */ 1641 0, /* rightshift */ 1642 0, /* size (0 = byte, 1 = short, 2 = long) */ 1643 0, /* bitsize */ 1644 FALSE, /* pc_relative */ 1645 0, /* bitpos */ 1646 complain_overflow_dont,/* complain_on_overflow */ 1647 bfd_elf_generic_reloc, /* special_function */ 1648 "R_ARM_RPC24", /* name */ 1649 FALSE, /* partial_inplace */ 1650 0, /* src_mask */ 1651 0, /* dst_mask */ 1652 FALSE), /* pcrel_offset */ 1653 1654 HOWTO (R_ARM_RBASE, /* type */ 1655 0, /* rightshift */ 1656 0, /* size (0 = byte, 1 = short, 2 = long) */ 1657 0, /* bitsize */ 1658 FALSE, /* pc_relative */ 1659 0, /* bitpos */ 1660 complain_overflow_dont,/* complain_on_overflow */ 1661 bfd_elf_generic_reloc, /* special_function */ 1662 "R_ARM_RBASE", /* name */ 1663 FALSE, /* partial_inplace */ 1664 0, /* src_mask */ 1665 0, /* dst_mask */ 1666 FALSE) /* pcrel_offset */ 1667 }; 1668 1669 static reloc_howto_type * 1670 elf32_arm_howto_from_type (unsigned int r_type) 1671 { 1672 if (r_type < ARRAY_SIZE (elf32_arm_howto_table_1)) 1673 return &elf32_arm_howto_table_1[r_type]; 1674 1675 if (r_type >= R_ARM_RREL32 1676 && r_type < R_ARM_RREL32 + ARRAY_SIZE (elf32_arm_howto_table_2)) 1677 return &elf32_arm_howto_table_2[r_type - R_ARM_RREL32]; 1678 1679 return NULL; 1680 } 1681 1682 static void 1683 elf32_arm_info_to_howto (bfd * abfd ATTRIBUTE_UNUSED, arelent * bfd_reloc, 1684 Elf_Internal_Rela * elf_reloc) 1685 { 1686 unsigned int r_type; 1687 1688 r_type = ELF32_R_TYPE (elf_reloc->r_info); 1689 bfd_reloc->howto = elf32_arm_howto_from_type (r_type); 1690 } 1691 1692 struct elf32_arm_reloc_map 1693 { 1694 bfd_reloc_code_real_type bfd_reloc_val; 1695 unsigned char elf_reloc_val; 1696 }; 1697 1698 /* All entries in this list must also be present in elf32_arm_howto_table. */ 1699 static const struct elf32_arm_reloc_map elf32_arm_reloc_map[] = 1700 { 1701 {BFD_RELOC_NONE, R_ARM_NONE}, 1702 {BFD_RELOC_ARM_PCREL_BRANCH, R_ARM_PC24}, 1703 {BFD_RELOC_ARM_PCREL_CALL, R_ARM_CALL}, 1704 {BFD_RELOC_ARM_PCREL_JUMP, R_ARM_JUMP24}, 1705 {BFD_RELOC_ARM_PCREL_BLX, R_ARM_XPC25}, 1706 {BFD_RELOC_THUMB_PCREL_BLX, R_ARM_THM_XPC22}, 1707 {BFD_RELOC_32, R_ARM_ABS32}, 1708 {BFD_RELOC_32_PCREL, R_ARM_REL32}, 1709 {BFD_RELOC_8, R_ARM_ABS8}, 1710 {BFD_RELOC_16, R_ARM_ABS16}, 1711 {BFD_RELOC_ARM_OFFSET_IMM, R_ARM_ABS12}, 1712 {BFD_RELOC_ARM_THUMB_OFFSET, R_ARM_THM_ABS5}, 1713 {BFD_RELOC_THUMB_PCREL_BRANCH25, R_ARM_THM_JUMP24}, 1714 {BFD_RELOC_THUMB_PCREL_BRANCH23, R_ARM_THM_CALL}, 1715 {BFD_RELOC_THUMB_PCREL_BRANCH12, R_ARM_THM_JUMP11}, 1716 {BFD_RELOC_THUMB_PCREL_BRANCH20, R_ARM_THM_JUMP19}, 1717 {BFD_RELOC_THUMB_PCREL_BRANCH9, R_ARM_THM_JUMP8}, 1718 {BFD_RELOC_THUMB_PCREL_BRANCH7, R_ARM_THM_JUMP6}, 1719 {BFD_RELOC_ARM_GLOB_DAT, R_ARM_GLOB_DAT}, 1720 {BFD_RELOC_ARM_JUMP_SLOT, R_ARM_JUMP_SLOT}, 1721 {BFD_RELOC_ARM_RELATIVE, R_ARM_RELATIVE}, 1722 {BFD_RELOC_ARM_GOTOFF, R_ARM_GOTOFF32}, 1723 {BFD_RELOC_ARM_GOTPC, R_ARM_GOTPC}, 1724 {BFD_RELOC_ARM_GOT_PREL, R_ARM_GOT_PREL}, 1725 {BFD_RELOC_ARM_GOT32, R_ARM_GOT32}, 1726 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, 1727 {BFD_RELOC_ARM_TARGET1, R_ARM_TARGET1}, 1728 {BFD_RELOC_ARM_ROSEGREL32, R_ARM_ROSEGREL32}, 1729 {BFD_RELOC_ARM_SBREL32, R_ARM_SBREL32}, 1730 {BFD_RELOC_ARM_PREL31, R_ARM_PREL31}, 1731 {BFD_RELOC_ARM_TARGET2, R_ARM_TARGET2}, 1732 {BFD_RELOC_ARM_PLT32, R_ARM_PLT32}, 1733 {BFD_RELOC_ARM_TLS_GD32, R_ARM_TLS_GD32}, 1734 {BFD_RELOC_ARM_TLS_LDO32, R_ARM_TLS_LDO32}, 1735 {BFD_RELOC_ARM_TLS_LDM32, R_ARM_TLS_LDM32}, 1736 {BFD_RELOC_ARM_TLS_DTPMOD32, R_ARM_TLS_DTPMOD32}, 1737 {BFD_RELOC_ARM_TLS_DTPOFF32, R_ARM_TLS_DTPOFF32}, 1738 {BFD_RELOC_ARM_TLS_TPOFF32, R_ARM_TLS_TPOFF32}, 1739 {BFD_RELOC_ARM_TLS_IE32, R_ARM_TLS_IE32}, 1740 {BFD_RELOC_ARM_TLS_LE32, R_ARM_TLS_LE32}, 1741 {BFD_RELOC_VTABLE_INHERIT, R_ARM_GNU_VTINHERIT}, 1742 {BFD_RELOC_VTABLE_ENTRY, R_ARM_GNU_VTENTRY}, 1743 {BFD_RELOC_ARM_MOVW, R_ARM_MOVW_ABS_NC}, 1744 {BFD_RELOC_ARM_MOVT, R_ARM_MOVT_ABS}, 1745 {BFD_RELOC_ARM_MOVW_PCREL, R_ARM_MOVW_PREL_NC}, 1746 {BFD_RELOC_ARM_MOVT_PCREL, R_ARM_MOVT_PREL}, 1747 {BFD_RELOC_ARM_THUMB_MOVW, R_ARM_THM_MOVW_ABS_NC}, 1748 {BFD_RELOC_ARM_THUMB_MOVT, R_ARM_THM_MOVT_ABS}, 1749 {BFD_RELOC_ARM_THUMB_MOVW_PCREL, R_ARM_THM_MOVW_PREL_NC}, 1750 {BFD_RELOC_ARM_THUMB_MOVT_PCREL, R_ARM_THM_MOVT_PREL}, 1751 {BFD_RELOC_ARM_ALU_PC_G0_NC, R_ARM_ALU_PC_G0_NC}, 1752 {BFD_RELOC_ARM_ALU_PC_G0, R_ARM_ALU_PC_G0}, 1753 {BFD_RELOC_ARM_ALU_PC_G1_NC, R_ARM_ALU_PC_G1_NC}, 1754 {BFD_RELOC_ARM_ALU_PC_G1, R_ARM_ALU_PC_G1}, 1755 {BFD_RELOC_ARM_ALU_PC_G2, R_ARM_ALU_PC_G2}, 1756 {BFD_RELOC_ARM_LDR_PC_G0, R_ARM_LDR_PC_G0}, 1757 {BFD_RELOC_ARM_LDR_PC_G1, R_ARM_LDR_PC_G1}, 1758 {BFD_RELOC_ARM_LDR_PC_G2, R_ARM_LDR_PC_G2}, 1759 {BFD_RELOC_ARM_LDRS_PC_G0, R_ARM_LDRS_PC_G0}, 1760 {BFD_RELOC_ARM_LDRS_PC_G1, R_ARM_LDRS_PC_G1}, 1761 {BFD_RELOC_ARM_LDRS_PC_G2, R_ARM_LDRS_PC_G2}, 1762 {BFD_RELOC_ARM_LDC_PC_G0, R_ARM_LDC_PC_G0}, 1763 {BFD_RELOC_ARM_LDC_PC_G1, R_ARM_LDC_PC_G1}, 1764 {BFD_RELOC_ARM_LDC_PC_G2, R_ARM_LDC_PC_G2}, 1765 {BFD_RELOC_ARM_ALU_SB_G0_NC, R_ARM_ALU_SB_G0_NC}, 1766 {BFD_RELOC_ARM_ALU_SB_G0, R_ARM_ALU_SB_G0}, 1767 {BFD_RELOC_ARM_ALU_SB_G1_NC, R_ARM_ALU_SB_G1_NC}, 1768 {BFD_RELOC_ARM_ALU_SB_G1, R_ARM_ALU_SB_G1}, 1769 {BFD_RELOC_ARM_ALU_SB_G2, R_ARM_ALU_SB_G2}, 1770 {BFD_RELOC_ARM_LDR_SB_G0, R_ARM_LDR_SB_G0}, 1771 {BFD_RELOC_ARM_LDR_SB_G1, R_ARM_LDR_SB_G1}, 1772 {BFD_RELOC_ARM_LDR_SB_G2, R_ARM_LDR_SB_G2}, 1773 {BFD_RELOC_ARM_LDRS_SB_G0, R_ARM_LDRS_SB_G0}, 1774 {BFD_RELOC_ARM_LDRS_SB_G1, R_ARM_LDRS_SB_G1}, 1775 {BFD_RELOC_ARM_LDRS_SB_G2, R_ARM_LDRS_SB_G2}, 1776 {BFD_RELOC_ARM_LDC_SB_G0, R_ARM_LDC_SB_G0}, 1777 {BFD_RELOC_ARM_LDC_SB_G1, R_ARM_LDC_SB_G1}, 1778 {BFD_RELOC_ARM_LDC_SB_G2, R_ARM_LDC_SB_G2}, 1779 {BFD_RELOC_ARM_V4BX, R_ARM_V4BX} 1780 }; 1781 1782 static reloc_howto_type * 1783 elf32_arm_reloc_type_lookup (bfd *abfd ATTRIBUTE_UNUSED, 1784 bfd_reloc_code_real_type code) 1785 { 1786 unsigned int i; 1787 1788 for (i = 0; i < ARRAY_SIZE (elf32_arm_reloc_map); i ++) 1789 if (elf32_arm_reloc_map[i].bfd_reloc_val == code) 1790 return elf32_arm_howto_from_type (elf32_arm_reloc_map[i].elf_reloc_val); 1791 1792 return NULL; 1793 } 1794 1795 static reloc_howto_type * 1796 elf32_arm_reloc_name_lookup (bfd *abfd ATTRIBUTE_UNUSED, 1797 const char *r_name) 1798 { 1799 unsigned int i; 1800 1801 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_1); i++) 1802 if (elf32_arm_howto_table_1[i].name != NULL 1803 && strcasecmp (elf32_arm_howto_table_1[i].name, r_name) == 0) 1804 return &elf32_arm_howto_table_1[i]; 1805 1806 for (i = 0; i < ARRAY_SIZE (elf32_arm_howto_table_2); i++) 1807 if (elf32_arm_howto_table_2[i].name != NULL 1808 && strcasecmp (elf32_arm_howto_table_2[i].name, r_name) == 0) 1809 return &elf32_arm_howto_table_2[i]; 1810 1811 return NULL; 1812 } 1813 1814 /* Support for core dump NOTE sections. */ 1815 1816 static bfd_boolean 1817 elf32_arm_nabi_grok_prstatus (bfd *abfd, Elf_Internal_Note *note) 1818 { 1819 int offset; 1820 size_t size; 1821 1822 switch (note->descsz) 1823 { 1824 default: 1825 return FALSE; 1826 1827 case 148: /* Linux/ARM 32-bit. */ 1828 /* pr_cursig */ 1829 elf_tdata (abfd)->core_signal = bfd_get_16 (abfd, note->descdata + 12); 1830 1831 /* pr_pid */ 1832 elf_tdata (abfd)->core_lwpid = bfd_get_32 (abfd, note->descdata + 24); 1833 1834 /* pr_reg */ 1835 offset = 72; 1836 size = 72; 1837 1838 break; 1839 } 1840 1841 /* Make a ".reg/999" section. */ 1842 return _bfd_elfcore_make_pseudosection (abfd, ".reg", 1843 size, note->descpos + offset); 1844 } 1845 1846 static bfd_boolean 1847 elf32_arm_nabi_grok_psinfo (bfd *abfd, Elf_Internal_Note *note) 1848 { 1849 switch (note->descsz) 1850 { 1851 default: 1852 return FALSE; 1853 1854 case 124: /* Linux/ARM elf_prpsinfo. */ 1855 elf_tdata (abfd)->core_program 1856 = _bfd_elfcore_strndup (abfd, note->descdata + 28, 16); 1857 elf_tdata (abfd)->core_command 1858 = _bfd_elfcore_strndup (abfd, note->descdata + 44, 80); 1859 } 1860 1861 /* Note that for some reason, a spurious space is tacked 1862 onto the end of the args in some (at least one anyway) 1863 implementations, so strip it off if it exists. */ 1864 { 1865 char *command = elf_tdata (abfd)->core_command; 1866 int n = strlen (command); 1867 1868 if (0 < n && command[n - 1] == ' ') 1869 command[n - 1] = '\0'; 1870 } 1871 1872 return TRUE; 1873 } 1874 1875 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vec 1876 #define TARGET_LITTLE_NAME "elf32-littlearm" 1877 #define TARGET_BIG_SYM bfd_elf32_bigarm_vec 1878 #define TARGET_BIG_NAME "elf32-bigarm" 1879 1880 #define elf_backend_grok_prstatus elf32_arm_nabi_grok_prstatus 1881 #define elf_backend_grok_psinfo elf32_arm_nabi_grok_psinfo 1882 1883 typedef unsigned long int insn32; 1884 typedef unsigned short int insn16; 1885 1886 /* In lieu of proper flags, assume all EABIv4 or later objects are 1887 interworkable. */ 1888 #define INTERWORK_FLAG(abfd) \ 1889 (EF_ARM_EABI_VERSION (elf_elfheader (abfd)->e_flags) >= EF_ARM_EABI_VER4 \ 1890 || (elf_elfheader (abfd)->e_flags & EF_ARM_INTERWORK) \ 1891 || ((abfd)->flags & BFD_LINKER_CREATED)) 1892 1893 /* The linker script knows the section names for placement. 1894 The entry_names are used to do simple name mangling on the stubs. 1895 Given a function name, and its type, the stub can be found. The 1896 name can be changed. The only requirement is the %s be present. */ 1897 #define THUMB2ARM_GLUE_SECTION_NAME ".glue_7t" 1898 #define THUMB2ARM_GLUE_ENTRY_NAME "__%s_from_thumb" 1899 1900 #define ARM2THUMB_GLUE_SECTION_NAME ".glue_7" 1901 #define ARM2THUMB_GLUE_ENTRY_NAME "__%s_from_arm" 1902 1903 #define VFP11_ERRATUM_VENEER_SECTION_NAME ".vfp11_veneer" 1904 #define VFP11_ERRATUM_VENEER_ENTRY_NAME "__vfp11_veneer_%x" 1905 1906 #define ARM_BX_GLUE_SECTION_NAME ".v4_bx" 1907 #define ARM_BX_GLUE_ENTRY_NAME "__bx_r%d" 1908 1909 #define STUB_ENTRY_NAME "__%s_veneer" 1910 1911 /* The name of the dynamic interpreter. This is put in the .interp 1912 section. */ 1913 #define ELF_DYNAMIC_INTERPRETER "/usr/lib/ld.so.1" 1914 1915 #ifdef FOUR_WORD_PLT 1916 1917 /* The first entry in a procedure linkage table looks like 1918 this. It is set up so that any shared library function that is 1919 called before the relocation has been set up calls the dynamic 1920 linker first. */ 1921 static const bfd_vma elf32_arm_plt0_entry [] = 1922 { 1923 0xe52de004, /* str lr, [sp, #-4]! */ 1924 0xe59fe010, /* ldr lr, [pc, #16] */ 1925 0xe08fe00e, /* add lr, pc, lr */ 1926 0xe5bef008, /* ldr pc, [lr, #8]! */ 1927 }; 1928 1929 /* Subsequent entries in a procedure linkage table look like 1930 this. */ 1931 static const bfd_vma elf32_arm_plt_entry [] = 1932 { 1933 0xe28fc600, /* add ip, pc, #NN */ 1934 0xe28cca00, /* add ip, ip, #NN */ 1935 0xe5bcf000, /* ldr pc, [ip, #NN]! */ 1936 0x00000000, /* unused */ 1937 }; 1938 1939 #else 1940 1941 /* The first entry in a procedure linkage table looks like 1942 this. It is set up so that any shared library function that is 1943 called before the relocation has been set up calls the dynamic 1944 linker first. */ 1945 static const bfd_vma elf32_arm_plt0_entry [] = 1946 { 1947 0xe52de004, /* str lr, [sp, #-4]! */ 1948 0xe59fe004, /* ldr lr, [pc, #4] */ 1949 0xe08fe00e, /* add lr, pc, lr */ 1950 0xe5bef008, /* ldr pc, [lr, #8]! */ 1951 0x00000000, /* &GOT[0] - . */ 1952 }; 1953 1954 /* Subsequent entries in a procedure linkage table look like 1955 this. */ 1956 static const bfd_vma elf32_arm_plt_entry [] = 1957 { 1958 0xe28fc600, /* add ip, pc, #0xNN00000 */ 1959 0xe28cca00, /* add ip, ip, #0xNN000 */ 1960 0xe5bcf000, /* ldr pc, [ip, #0xNNN]! */ 1961 }; 1962 1963 #endif 1964 1965 /* The format of the first entry in the procedure linkage table 1966 for a VxWorks executable. */ 1967 static const bfd_vma elf32_arm_vxworks_exec_plt0_entry[] = 1968 { 1969 0xe52dc008, /* str ip,[sp,#-8]! */ 1970 0xe59fc000, /* ldr ip,[pc] */ 1971 0xe59cf008, /* ldr pc,[ip,#8] */ 1972 0x00000000, /* .long _GLOBAL_OFFSET_TABLE_ */ 1973 }; 1974 1975 /* The format of subsequent entries in a VxWorks executable. */ 1976 static const bfd_vma elf32_arm_vxworks_exec_plt_entry[] = 1977 { 1978 0xe59fc000, /* ldr ip,[pc] */ 1979 0xe59cf000, /* ldr pc,[ip] */ 1980 0x00000000, /* .long @got */ 1981 0xe59fc000, /* ldr ip,[pc] */ 1982 0xea000000, /* b _PLT */ 1983 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ 1984 }; 1985 1986 /* The format of entries in a VxWorks shared library. */ 1987 static const bfd_vma elf32_arm_vxworks_shared_plt_entry[] = 1988 { 1989 0xe59fc000, /* ldr ip,[pc] */ 1990 0xe79cf009, /* ldr pc,[ip,r9] */ 1991 0x00000000, /* .long @got */ 1992 0xe59fc000, /* ldr ip,[pc] */ 1993 0xe599f008, /* ldr pc,[r9,#8] */ 1994 0x00000000, /* .long @pltindex*sizeof(Elf32_Rela) */ 1995 }; 1996 1997 /* An initial stub used if the PLT entry is referenced from Thumb code. */ 1998 #define PLT_THUMB_STUB_SIZE 4 1999 static const bfd_vma elf32_arm_plt_thumb_stub [] = 2000 { 2001 0x4778, /* bx pc */ 2002 0x46c0 /* nop */ 2003 }; 2004 2005 /* The entries in a PLT when using a DLL-based target with multiple 2006 address spaces. */ 2007 static const bfd_vma elf32_arm_symbian_plt_entry [] = 2008 { 2009 0xe51ff004, /* ldr pc, [pc, #-4] */ 2010 0x00000000, /* dcd R_ARM_GLOB_DAT(X) */ 2011 }; 2012 2013 #define ARM_MAX_FWD_BRANCH_OFFSET ((((1 << 23) - 1) << 2) + 8) 2014 #define ARM_MAX_BWD_BRANCH_OFFSET ((-((1 << 23) << 2)) + 8) 2015 #define THM_MAX_FWD_BRANCH_OFFSET ((1 << 22) -2 + 4) 2016 #define THM_MAX_BWD_BRANCH_OFFSET (-(1 << 22) + 4) 2017 #define THM2_MAX_FWD_BRANCH_OFFSET (((1 << 24) - 2) + 4) 2018 #define THM2_MAX_BWD_BRANCH_OFFSET (-(1 << 24) + 4) 2019 2020 enum stub_insn_type 2021 { 2022 THUMB16_TYPE = 1, 2023 THUMB32_TYPE, 2024 ARM_TYPE, 2025 DATA_TYPE 2026 }; 2027 2028 #define THUMB16_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 0} 2029 /* A bit of a hack. A Thumb conditional branch, in which the proper condition 2030 is inserted in arm_build_one_stub(). */ 2031 #define THUMB16_BCOND_INSN(X) {(X), THUMB16_TYPE, R_ARM_NONE, 1} 2032 #define THUMB32_INSN(X) {(X), THUMB32_TYPE, R_ARM_NONE, 0} 2033 #define THUMB32_B_INSN(X, Z) {(X), THUMB32_TYPE, R_ARM_THM_JUMP24, (Z)} 2034 #define ARM_INSN(X) {(X), ARM_TYPE, R_ARM_NONE, 0} 2035 #define ARM_REL_INSN(X, Z) {(X), ARM_TYPE, R_ARM_JUMP24, (Z)} 2036 #define DATA_WORD(X,Y,Z) {(X), DATA_TYPE, (Y), (Z)} 2037 2038 typedef struct 2039 { 2040 bfd_vma data; 2041 enum stub_insn_type type; 2042 unsigned int r_type; 2043 int reloc_addend; 2044 } insn_sequence; 2045 2046 /* Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx 2047 to reach the stub if necessary. */ 2048 static const insn_sequence elf32_arm_stub_long_branch_any_any[] = 2049 { 2050 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ 2051 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ 2052 }; 2053 2054 /* V4T Arm -> Thumb long branch stub. Used on V4T where blx is not 2055 available. */ 2056 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb[] = 2057 { 2058 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ 2059 ARM_INSN(0xe12fff1c), /* bx ip */ 2060 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ 2061 }; 2062 2063 /* Thumb -> Thumb long branch stub. Used on M-profile architectures. */ 2064 static const insn_sequence elf32_arm_stub_long_branch_thumb_only[] = 2065 { 2066 THUMB16_INSN(0xb401), /* push {r0} */ 2067 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ 2068 THUMB16_INSN(0x4684), /* mov ip, r0 */ 2069 THUMB16_INSN(0xbc01), /* pop {r0} */ 2070 THUMB16_INSN(0x4760), /* bx ip */ 2071 THUMB16_INSN(0xbf00), /* nop */ 2072 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ 2073 }; 2074 2075 /* V4T Thumb -> Thumb long branch stub. Using the stack is not 2076 allowed. */ 2077 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb[] = 2078 { 2079 THUMB16_INSN(0x4778), /* bx pc */ 2080 THUMB16_INSN(0x46c0), /* nop */ 2081 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ 2082 ARM_INSN(0xe12fff1c), /* bx ip */ 2083 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ 2084 }; 2085 2086 /* V4T Thumb -> ARM long branch stub. Used on V4T where blx is not 2087 available. */ 2088 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm[] = 2089 { 2090 THUMB16_INSN(0x4778), /* bx pc */ 2091 THUMB16_INSN(0x46c0), /* nop */ 2092 ARM_INSN(0xe51ff004), /* ldr pc, [pc, #-4] */ 2093 DATA_WORD(0, R_ARM_ABS32, 0), /* dcd R_ARM_ABS32(X) */ 2094 }; 2095 2096 /* V4T Thumb -> ARM short branch stub. Shorter variant of the above 2097 one, when the destination is close enough. */ 2098 static const insn_sequence elf32_arm_stub_short_branch_v4t_thumb_arm[] = 2099 { 2100 THUMB16_INSN(0x4778), /* bx pc */ 2101 THUMB16_INSN(0x46c0), /* nop */ 2102 ARM_REL_INSN(0xea000000, -8), /* b (X-8) */ 2103 }; 2104 2105 /* ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use 2106 blx to reach the stub if necessary. */ 2107 static const insn_sequence elf32_arm_stub_long_branch_any_arm_pic[] = 2108 { 2109 ARM_INSN(0xe59fc000), /* ldr ip, [pc] */ 2110 ARM_INSN(0xe08ff00c), /* add pc, pc, ip */ 2111 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X-4) */ 2112 }; 2113 2114 /* ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use 2115 blx to reach the stub if necessary. We can not add into pc; 2116 it is not guaranteed to mode switch (different in ARMv6 and 2117 ARMv7). */ 2118 static const insn_sequence elf32_arm_stub_long_branch_any_thumb_pic[] = 2119 { 2120 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ 2121 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ 2122 ARM_INSN(0xe12fff1c), /* bx ip */ 2123 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ 2124 }; 2125 2126 /* V4T ARM -> ARM long branch stub, PIC. */ 2127 static const insn_sequence elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] = 2128 { 2129 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ 2130 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ 2131 ARM_INSN(0xe12fff1c), /* bx ip */ 2132 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ 2133 }; 2134 2135 /* V4T Thumb -> ARM long branch stub, PIC. */ 2136 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] = 2137 { 2138 THUMB16_INSN(0x4778), /* bx pc */ 2139 THUMB16_INSN(0x46c0), /* nop */ 2140 ARM_INSN(0xe59fc000), /* ldr ip, [pc, #0] */ 2141 ARM_INSN(0xe08cf00f), /* add pc, ip, pc */ 2142 DATA_WORD(0, R_ARM_REL32, -4), /* dcd R_ARM_REL32(X) */ 2143 }; 2144 2145 /* Thumb -> Thumb long branch stub, PIC. Used on M-profile 2146 architectures. */ 2147 static const insn_sequence elf32_arm_stub_long_branch_thumb_only_pic[] = 2148 { 2149 THUMB16_INSN(0xb401), /* push {r0} */ 2150 THUMB16_INSN(0x4802), /* ldr r0, [pc, #8] */ 2151 THUMB16_INSN(0x46fc), /* mov ip, pc */ 2152 THUMB16_INSN(0x4484), /* add ip, r0 */ 2153 THUMB16_INSN(0xbc01), /* pop {r0} */ 2154 THUMB16_INSN(0x4760), /* bx ip */ 2155 DATA_WORD(0, R_ARM_REL32, 4), /* dcd R_ARM_REL32(X) */ 2156 }; 2157 2158 /* V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not 2159 allowed. */ 2160 static const insn_sequence elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] = 2161 { 2162 THUMB16_INSN(0x4778), /* bx pc */ 2163 THUMB16_INSN(0x46c0), /* nop */ 2164 ARM_INSN(0xe59fc004), /* ldr ip, [pc, #4] */ 2165 ARM_INSN(0xe08fc00c), /* add ip, pc, ip */ 2166 ARM_INSN(0xe12fff1c), /* bx ip */ 2167 DATA_WORD(0, R_ARM_REL32, 0), /* dcd R_ARM_REL32(X) */ 2168 }; 2169 2170 /* Cortex-A8 erratum-workaround stubs. */ 2171 2172 /* Stub used for conditional branches (which may be beyond +/-1MB away, so we 2173 can't use a conditional branch to reach this stub). */ 2174 2175 static const insn_sequence elf32_arm_stub_a8_veneer_b_cond[] = 2176 { 2177 THUMB16_BCOND_INSN(0xd001), /* b<cond>.n true. */ 2178 THUMB32_B_INSN(0xf000b800, -4), /* b.w insn_after_original_branch. */ 2179 THUMB32_B_INSN(0xf000b800, -4) /* true: b.w original_branch_dest. */ 2180 }; 2181 2182 /* Stub used for b.w and bl.w instructions. */ 2183 2184 static const insn_sequence elf32_arm_stub_a8_veneer_b[] = 2185 { 2186 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ 2187 }; 2188 2189 static const insn_sequence elf32_arm_stub_a8_veneer_bl[] = 2190 { 2191 THUMB32_B_INSN(0xf000b800, -4) /* b.w original_branch_dest. */ 2192 }; 2193 2194 /* Stub used for Thumb-2 blx.w instructions. We modified the original blx.w 2195 instruction (which switches to ARM mode) to point to this stub. Jump to the 2196 real destination using an ARM-mode branch. */ 2197 2198 static const insn_sequence elf32_arm_stub_a8_veneer_blx[] = 2199 { 2200 ARM_REL_INSN(0xea000000, -8) /* b original_branch_dest. */ 2201 }; 2202 2203 /* Section name for stubs is the associated section name plus this 2204 string. */ 2205 #define STUB_SUFFIX ".stub" 2206 2207 /* One entry per long/short branch stub defined above. */ 2208 #define DEF_STUBS \ 2209 DEF_STUB(long_branch_any_any) \ 2210 DEF_STUB(long_branch_v4t_arm_thumb) \ 2211 DEF_STUB(long_branch_thumb_only) \ 2212 DEF_STUB(long_branch_v4t_thumb_thumb) \ 2213 DEF_STUB(long_branch_v4t_thumb_arm) \ 2214 DEF_STUB(short_branch_v4t_thumb_arm) \ 2215 DEF_STUB(long_branch_any_arm_pic) \ 2216 DEF_STUB(long_branch_any_thumb_pic) \ 2217 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \ 2218 DEF_STUB(long_branch_v4t_arm_thumb_pic) \ 2219 DEF_STUB(long_branch_v4t_thumb_arm_pic) \ 2220 DEF_STUB(long_branch_thumb_only_pic) \ 2221 DEF_STUB(a8_veneer_b_cond) \ 2222 DEF_STUB(a8_veneer_b) \ 2223 DEF_STUB(a8_veneer_bl) \ 2224 DEF_STUB(a8_veneer_blx) 2225 2226 #define DEF_STUB(x) arm_stub_##x, 2227 enum elf32_arm_stub_type { 2228 arm_stub_none, 2229 DEF_STUBS 2230 /* Note the first a8_veneer type */ 2231 arm_stub_a8_veneer_lwm = arm_stub_a8_veneer_b_cond 2232 }; 2233 #undef DEF_STUB 2234 2235 typedef struct 2236 { 2237 const insn_sequence* template_sequence; 2238 int template_size; 2239 } stub_def; 2240 2241 #define DEF_STUB(x) {elf32_arm_stub_##x, ARRAY_SIZE(elf32_arm_stub_##x)}, 2242 static const stub_def stub_definitions[] = { 2243 {NULL, 0}, 2244 DEF_STUBS 2245 }; 2246 2247 struct elf32_arm_stub_hash_entry 2248 { 2249 /* Base hash table entry structure. */ 2250 struct bfd_hash_entry root; 2251 2252 /* The stub section. */ 2253 asection *stub_sec; 2254 2255 /* Offset within stub_sec of the beginning of this stub. */ 2256 bfd_vma stub_offset; 2257 2258 /* Given the symbol's value and its section we can determine its final 2259 value when building the stubs (so the stub knows where to jump). */ 2260 bfd_vma target_value; 2261 asection *target_section; 2262 2263 /* Offset to apply to relocation referencing target_value. */ 2264 bfd_vma target_addend; 2265 2266 /* The instruction which caused this stub to be generated (only valid for 2267 Cortex-A8 erratum workaround stubs at present). */ 2268 unsigned long orig_insn; 2269 2270 /* The stub type. */ 2271 enum elf32_arm_stub_type stub_type; 2272 /* Its encoding size in bytes. */ 2273 int stub_size; 2274 /* Its template. */ 2275 const insn_sequence *stub_template; 2276 /* The size of the template (number of entries). */ 2277 int stub_template_size; 2278 2279 /* The symbol table entry, if any, that this was derived from. */ 2280 struct elf32_arm_link_hash_entry *h; 2281 2282 /* Destination symbol type (STT_ARM_TFUNC, ...) */ 2283 unsigned char st_type; 2284 2285 /* Where this stub is being called from, or, in the case of combined 2286 stub sections, the first input section in the group. */ 2287 asection *id_sec; 2288 2289 /* The name for the local symbol at the start of this stub. The 2290 stub name in the hash table has to be unique; this does not, so 2291 it can be friendlier. */ 2292 char *output_name; 2293 }; 2294 2295 /* Used to build a map of a section. This is required for mixed-endian 2296 code/data. */ 2297 2298 typedef struct elf32_elf_section_map 2299 { 2300 bfd_vma vma; 2301 char type; 2302 } 2303 elf32_arm_section_map; 2304 2305 /* Information about a VFP11 erratum veneer, or a branch to such a veneer. */ 2306 2307 typedef enum 2308 { 2309 VFP11_ERRATUM_BRANCH_TO_ARM_VENEER, 2310 VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER, 2311 VFP11_ERRATUM_ARM_VENEER, 2312 VFP11_ERRATUM_THUMB_VENEER 2313 } 2314 elf32_vfp11_erratum_type; 2315 2316 typedef struct elf32_vfp11_erratum_list 2317 { 2318 struct elf32_vfp11_erratum_list *next; 2319 bfd_vma vma; 2320 union 2321 { 2322 struct 2323 { 2324 struct elf32_vfp11_erratum_list *veneer; 2325 unsigned int vfp_insn; 2326 } b; 2327 struct 2328 { 2329 struct elf32_vfp11_erratum_list *branch; 2330 unsigned int id; 2331 } v; 2332 } u; 2333 elf32_vfp11_erratum_type type; 2334 } 2335 elf32_vfp11_erratum_list; 2336 2337 typedef enum 2338 { 2339 DELETE_EXIDX_ENTRY, 2340 INSERT_EXIDX_CANTUNWIND_AT_END 2341 } 2342 arm_unwind_edit_type; 2343 2344 /* A (sorted) list of edits to apply to an unwind table. */ 2345 typedef struct arm_unwind_table_edit 2346 { 2347 arm_unwind_edit_type type; 2348 /* Note: we sometimes want to insert an unwind entry corresponding to a 2349 section different from the one we're currently writing out, so record the 2350 (text) section this edit relates to here. */ 2351 asection *linked_section; 2352 unsigned int index; 2353 struct arm_unwind_table_edit *next; 2354 } 2355 arm_unwind_table_edit; 2356 2357 typedef struct _arm_elf_section_data 2358 { 2359 /* Information about mapping symbols. */ 2360 struct bfd_elf_section_data elf; 2361 unsigned int mapcount; 2362 unsigned int mapsize; 2363 elf32_arm_section_map *map; 2364 /* Information about CPU errata. */ 2365 unsigned int erratumcount; 2366 elf32_vfp11_erratum_list *erratumlist; 2367 /* Information about unwind tables. */ 2368 union 2369 { 2370 /* Unwind info attached to a text section. */ 2371 struct 2372 { 2373 asection *arm_exidx_sec; 2374 } text; 2375 2376 /* Unwind info attached to an .ARM.exidx section. */ 2377 struct 2378 { 2379 arm_unwind_table_edit *unwind_edit_list; 2380 arm_unwind_table_edit *unwind_edit_tail; 2381 } exidx; 2382 } u; 2383 } 2384 _arm_elf_section_data; 2385 2386 #define elf32_arm_section_data(sec) \ 2387 ((_arm_elf_section_data *) elf_section_data (sec)) 2388 2389 /* A fix which might be required for Cortex-A8 Thumb-2 branch/TLB erratum. 2390 These fixes are subject to a relaxation procedure (in elf32_arm_size_stubs), 2391 so may be created multiple times: we use an array of these entries whilst 2392 relaxing which we can refresh easily, then create stubs for each potentially 2393 erratum-triggering instruction once we've settled on a solution. */ 2394 2395 struct a8_erratum_fix { 2396 bfd *input_bfd; 2397 asection *section; 2398 bfd_vma offset; 2399 bfd_vma addend; 2400 unsigned long orig_insn; 2401 char *stub_name; 2402 enum elf32_arm_stub_type stub_type; 2403 int st_type; 2404 }; 2405 2406 /* A table of relocs applied to branches which might trigger Cortex-A8 2407 erratum. */ 2408 2409 struct a8_erratum_reloc { 2410 bfd_vma from; 2411 bfd_vma destination; 2412 struct elf32_arm_link_hash_entry *hash; 2413 const char *sym_name; 2414 unsigned int r_type; 2415 unsigned char st_type; 2416 bfd_boolean non_a8_stub; 2417 }; 2418 2419 /* The size of the thread control block. */ 2420 #define TCB_SIZE 8 2421 2422 struct elf_arm_obj_tdata 2423 { 2424 struct elf_obj_tdata root; 2425 2426 /* tls_type for each local got entry. */ 2427 char *local_got_tls_type; 2428 2429 /* Zero to warn when linking objects with incompatible enum sizes. */ 2430 int no_enum_size_warning; 2431 2432 /* Zero to warn when linking objects with incompatible wchar_t sizes. */ 2433 int no_wchar_size_warning; 2434 }; 2435 2436 #define elf_arm_tdata(bfd) \ 2437 ((struct elf_arm_obj_tdata *) (bfd)->tdata.any) 2438 2439 #define elf32_arm_local_got_tls_type(bfd) \ 2440 (elf_arm_tdata (bfd)->local_got_tls_type) 2441 2442 #define is_arm_elf(bfd) \ 2443 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \ 2444 && elf_tdata (bfd) != NULL \ 2445 && elf_object_id (bfd) == ARM_ELF_DATA) 2446 2447 static bfd_boolean 2448 elf32_arm_mkobject (bfd *abfd) 2449 { 2450 return bfd_elf_allocate_object (abfd, sizeof (struct elf_arm_obj_tdata), 2451 ARM_ELF_DATA); 2452 } 2453 2454 /* The ARM linker needs to keep track of the number of relocs that it 2455 decides to copy in check_relocs for each symbol. This is so that 2456 it can discard PC relative relocs if it doesn't need them when 2457 linking with -Bsymbolic. We store the information in a field 2458 extending the regular ELF linker hash table. */ 2459 2460 /* This structure keeps track of the number of relocs we have copied 2461 for a given symbol. */ 2462 struct elf32_arm_relocs_copied 2463 { 2464 /* Next section. */ 2465 struct elf32_arm_relocs_copied * next; 2466 /* A section in dynobj. */ 2467 asection * section; 2468 /* Number of relocs copied in this section. */ 2469 bfd_size_type count; 2470 /* Number of PC-relative relocs copied in this section. */ 2471 bfd_size_type pc_count; 2472 }; 2473 2474 #define elf32_arm_hash_entry(ent) ((struct elf32_arm_link_hash_entry *)(ent)) 2475 2476 /* Arm ELF linker hash entry. */ 2477 struct elf32_arm_link_hash_entry 2478 { 2479 struct elf_link_hash_entry root; 2480 2481 /* Number of PC relative relocs copied for this symbol. */ 2482 struct elf32_arm_relocs_copied * relocs_copied; 2483 2484 /* We reference count Thumb references to a PLT entry separately, 2485 so that we can emit the Thumb trampoline only if needed. */ 2486 bfd_signed_vma plt_thumb_refcount; 2487 2488 /* Some references from Thumb code may be eliminated by BL->BLX 2489 conversion, so record them separately. */ 2490 bfd_signed_vma plt_maybe_thumb_refcount; 2491 2492 /* Since PLT entries have variable size if the Thumb prologue is 2493 used, we need to record the index into .got.plt instead of 2494 recomputing it from the PLT offset. */ 2495 bfd_signed_vma plt_got_offset; 2496 2497 #define GOT_UNKNOWN 0 2498 #define GOT_NORMAL 1 2499 #define GOT_TLS_GD 2 2500 #define GOT_TLS_IE 4 2501 unsigned char tls_type; 2502 2503 /* The symbol marking the real symbol location for exported thumb 2504 symbols with Arm stubs. */ 2505 struct elf_link_hash_entry *export_glue; 2506 2507 /* A pointer to the most recently used stub hash entry against this 2508 symbol. */ 2509 struct elf32_arm_stub_hash_entry *stub_cache; 2510 }; 2511 2512 /* Traverse an arm ELF linker hash table. */ 2513 #define elf32_arm_link_hash_traverse(table, func, info) \ 2514 (elf_link_hash_traverse \ 2515 (&(table)->root, \ 2516 (bfd_boolean (*) (struct elf_link_hash_entry *, void *)) (func), \ 2517 (info))) 2518 2519 /* Get the ARM elf linker hash table from a link_info structure. */ 2520 #define elf32_arm_hash_table(info) \ 2521 (elf_hash_table_id ((struct elf_link_hash_table *) ((info)->hash)) \ 2522 == ARM_ELF_DATA ? ((struct elf32_arm_link_hash_table *) ((info)->hash)) : NULL) 2523 2524 #define arm_stub_hash_lookup(table, string, create, copy) \ 2525 ((struct elf32_arm_stub_hash_entry *) \ 2526 bfd_hash_lookup ((table), (string), (create), (copy))) 2527 2528 /* Array to keep track of which stub sections have been created, and 2529 information on stub grouping. */ 2530 struct map_stub 2531 { 2532 /* This is the section to which stubs in the group will be 2533 attached. */ 2534 asection *link_sec; 2535 /* The stub section. */ 2536 asection *stub_sec; 2537 }; 2538 2539 /* ARM ELF linker hash table. */ 2540 struct elf32_arm_link_hash_table 2541 { 2542 /* The main hash table. */ 2543 struct elf_link_hash_table root; 2544 2545 /* The size in bytes of the section containing the Thumb-to-ARM glue. */ 2546 bfd_size_type thumb_glue_size; 2547 2548 /* The size in bytes of the section containing the ARM-to-Thumb glue. */ 2549 bfd_size_type arm_glue_size; 2550 2551 /* The size in bytes of section containing the ARMv4 BX veneers. */ 2552 bfd_size_type bx_glue_size; 2553 2554 /* Offsets of ARMv4 BX veneers. Bit1 set if present, and Bit0 set when 2555 veneer has been populated. */ 2556 bfd_vma bx_glue_offset[15]; 2557 2558 /* The size in bytes of the section containing glue for VFP11 erratum 2559 veneers. */ 2560 bfd_size_type vfp11_erratum_glue_size; 2561 2562 /* A table of fix locations for Cortex-A8 Thumb-2 branch/TLB erratum. This 2563 holds Cortex-A8 erratum fix locations between elf32_arm_size_stubs() and 2564 elf32_arm_write_section(). */ 2565 struct a8_erratum_fix *a8_erratum_fixes; 2566 unsigned int num_a8_erratum_fixes; 2567 2568 /* An arbitrary input BFD chosen to hold the glue sections. */ 2569 bfd * bfd_of_glue_owner; 2570 2571 /* Nonzero to output a BE8 image. */ 2572 int byteswap_code; 2573 2574 /* Zero if R_ARM_TARGET1 means R_ARM_ABS32. 2575 Nonzero if R_ARM_TARGET1 means R_ARM_REL32. */ 2576 int target1_is_rel; 2577 2578 /* The relocation to use for R_ARM_TARGET2 relocations. */ 2579 int target2_reloc; 2580 2581 /* 0 = Ignore R_ARM_V4BX. 2582 1 = Convert BX to MOV PC. 2583 2 = Generate v4 interworing stubs. */ 2584 int fix_v4bx; 2585 2586 /* Whether we should fix the Cortex-A8 Thumb-2 branch/TLB erratum. */ 2587 int fix_cortex_a8; 2588 2589 /* Nonzero if the ARM/Thumb BLX instructions are available for use. */ 2590 int use_blx; 2591 2592 /* What sort of code sequences we should look for which may trigger the 2593 VFP11 denorm erratum. */ 2594 bfd_arm_vfp11_fix vfp11_fix; 2595 2596 /* Global counter for the number of fixes we have emitted. */ 2597 int num_vfp11_fixes; 2598 2599 /* Nonzero to force PIC branch veneers. */ 2600 int pic_veneer; 2601 2602 /* The number of bytes in the initial entry in the PLT. */ 2603 bfd_size_type plt_header_size; 2604 2605 /* The number of bytes in the subsequent PLT etries. */ 2606 bfd_size_type plt_entry_size; 2607 2608 /* True if the target system is VxWorks. */ 2609 int vxworks_p; 2610 2611 /* True if the target system is Symbian OS. */ 2612 int symbian_p; 2613 2614 /* True if the target uses REL relocations. */ 2615 int use_rel; 2616 2617 /* Short-cuts to get to dynamic linker sections. */ 2618 asection *sgot; 2619 asection *sgotplt; 2620 asection *srelgot; 2621 asection *splt; 2622 asection *srelplt; 2623 asection *sdynbss; 2624 asection *srelbss; 2625 2626 /* The (unloaded but important) VxWorks .rela.plt.unloaded section. */ 2627 asection *srelplt2; 2628 2629 /* Data for R_ARM_TLS_LDM32 relocations. */ 2630 union 2631 { 2632 bfd_signed_vma refcount; 2633 bfd_vma offset; 2634 } tls_ldm_got; 2635 2636 /* Small local sym cache. */ 2637 struct sym_cache sym_cache; 2638 2639 /* For convenience in allocate_dynrelocs. */ 2640 bfd * obfd; 2641 2642 /* The stub hash table. */ 2643 struct bfd_hash_table stub_hash_table; 2644 2645 /* Linker stub bfd. */ 2646 bfd *stub_bfd; 2647 2648 /* Linker call-backs. */ 2649 asection * (*add_stub_section) (const char *, asection *); 2650 void (*layout_sections_again) (void); 2651 2652 /* Array to keep track of which stub sections have been created, and 2653 information on stub grouping. */ 2654 struct map_stub *stub_group; 2655 2656 /* Number of elements in stub_group. */ 2657 int top_id; 2658 2659 /* Assorted information used by elf32_arm_size_stubs. */ 2660 unsigned int bfd_count; 2661 int top_index; 2662 asection **input_list; 2663 }; 2664 2665 /* Create an entry in an ARM ELF linker hash table. */ 2666 2667 static struct bfd_hash_entry * 2668 elf32_arm_link_hash_newfunc (struct bfd_hash_entry * entry, 2669 struct bfd_hash_table * table, 2670 const char * string) 2671 { 2672 struct elf32_arm_link_hash_entry * ret = 2673 (struct elf32_arm_link_hash_entry *) entry; 2674 2675 /* Allocate the structure if it has not already been allocated by a 2676 subclass. */ 2677 if (ret == NULL) 2678 ret = (struct elf32_arm_link_hash_entry *) 2679 bfd_hash_allocate (table, sizeof (struct elf32_arm_link_hash_entry)); 2680 if (ret == NULL) 2681 return (struct bfd_hash_entry *) ret; 2682 2683 /* Call the allocation method of the superclass. */ 2684 ret = ((struct elf32_arm_link_hash_entry *) 2685 _bfd_elf_link_hash_newfunc ((struct bfd_hash_entry *) ret, 2686 table, string)); 2687 if (ret != NULL) 2688 { 2689 ret->relocs_copied = NULL; 2690 ret->tls_type = GOT_UNKNOWN; 2691 ret->plt_thumb_refcount = 0; 2692 ret->plt_maybe_thumb_refcount = 0; 2693 ret->plt_got_offset = -1; 2694 ret->export_glue = NULL; 2695 2696 ret->stub_cache = NULL; 2697 } 2698 2699 return (struct bfd_hash_entry *) ret; 2700 } 2701 2702 /* Initialize an entry in the stub hash table. */ 2703 2704 static struct bfd_hash_entry * 2705 stub_hash_newfunc (struct bfd_hash_entry *entry, 2706 struct bfd_hash_table *table, 2707 const char *string) 2708 { 2709 /* Allocate the structure if it has not already been allocated by a 2710 subclass. */ 2711 if (entry == NULL) 2712 { 2713 entry = (struct bfd_hash_entry *) 2714 bfd_hash_allocate (table, sizeof (struct elf32_arm_stub_hash_entry)); 2715 if (entry == NULL) 2716 return entry; 2717 } 2718 2719 /* Call the allocation method of the superclass. */ 2720 entry = bfd_hash_newfunc (entry, table, string); 2721 if (entry != NULL) 2722 { 2723 struct elf32_arm_stub_hash_entry *eh; 2724 2725 /* Initialize the local fields. */ 2726 eh = (struct elf32_arm_stub_hash_entry *) entry; 2727 eh->stub_sec = NULL; 2728 eh->stub_offset = 0; 2729 eh->target_value = 0; 2730 eh->target_section = NULL; 2731 eh->target_addend = 0; 2732 eh->orig_insn = 0; 2733 eh->stub_type = arm_stub_none; 2734 eh->stub_size = 0; 2735 eh->stub_template = NULL; 2736 eh->stub_template_size = 0; 2737 eh->h = NULL; 2738 eh->id_sec = NULL; 2739 eh->output_name = NULL; 2740 } 2741 2742 return entry; 2743 } 2744 2745 /* Create .got, .gotplt, and .rel(a).got sections in DYNOBJ, and set up 2746 shortcuts to them in our hash table. */ 2747 2748 static bfd_boolean 2749 create_got_section (bfd *dynobj, struct bfd_link_info *info) 2750 { 2751 struct elf32_arm_link_hash_table *htab; 2752 2753 htab = elf32_arm_hash_table (info); 2754 if (htab == NULL) 2755 return FALSE; 2756 2757 /* BPABI objects never have a GOT, or associated sections. */ 2758 if (htab->symbian_p) 2759 return TRUE; 2760 2761 if (! _bfd_elf_create_got_section (dynobj, info)) 2762 return FALSE; 2763 2764 htab->sgot = bfd_get_section_by_name (dynobj, ".got"); 2765 htab->sgotplt = bfd_get_section_by_name (dynobj, ".got.plt"); 2766 if (!htab->sgot || !htab->sgotplt) 2767 abort (); 2768 2769 htab->srelgot = bfd_get_section_by_name (dynobj, 2770 RELOC_SECTION (htab, ".got")); 2771 if (htab->srelgot == NULL) 2772 return FALSE; 2773 return TRUE; 2774 } 2775 2776 /* Create .plt, .rel(a).plt, .got, .got.plt, .rel(a).got, .dynbss, and 2777 .rel(a).bss sections in DYNOBJ, and set up shortcuts to them in our 2778 hash table. */ 2779 2780 static bfd_boolean 2781 elf32_arm_create_dynamic_sections (bfd *dynobj, struct bfd_link_info *info) 2782 { 2783 struct elf32_arm_link_hash_table *htab; 2784 2785 htab = elf32_arm_hash_table (info); 2786 if (htab == NULL) 2787 return FALSE; 2788 2789 if (!htab->sgot && !create_got_section (dynobj, info)) 2790 return FALSE; 2791 2792 if (!_bfd_elf_create_dynamic_sections (dynobj, info)) 2793 return FALSE; 2794 2795 htab->splt = bfd_get_section_by_name (dynobj, ".plt"); 2796 htab->srelplt = bfd_get_section_by_name (dynobj, 2797 RELOC_SECTION (htab, ".plt")); 2798 htab->sdynbss = bfd_get_section_by_name (dynobj, ".dynbss"); 2799 if (!info->shared) 2800 htab->srelbss = bfd_get_section_by_name (dynobj, 2801 RELOC_SECTION (htab, ".bss")); 2802 2803 if (htab->vxworks_p) 2804 { 2805 if (!elf_vxworks_create_dynamic_sections (dynobj, info, &htab->srelplt2)) 2806 return FALSE; 2807 2808 if (info->shared) 2809 { 2810 htab->plt_header_size = 0; 2811 htab->plt_entry_size 2812 = 4 * ARRAY_SIZE (elf32_arm_vxworks_shared_plt_entry); 2813 } 2814 else 2815 { 2816 htab->plt_header_size 2817 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt0_entry); 2818 htab->plt_entry_size 2819 = 4 * ARRAY_SIZE (elf32_arm_vxworks_exec_plt_entry); 2820 } 2821 } 2822 2823 if (!htab->splt 2824 || !htab->srelplt 2825 || !htab->sdynbss 2826 || (!info->shared && !htab->srelbss)) 2827 abort (); 2828 2829 return TRUE; 2830 } 2831 2832 /* Copy the extra info we tack onto an elf_link_hash_entry. */ 2833 2834 static void 2835 elf32_arm_copy_indirect_symbol (struct bfd_link_info *info, 2836 struct elf_link_hash_entry *dir, 2837 struct elf_link_hash_entry *ind) 2838 { 2839 struct elf32_arm_link_hash_entry *edir, *eind; 2840 2841 edir = (struct elf32_arm_link_hash_entry *) dir; 2842 eind = (struct elf32_arm_link_hash_entry *) ind; 2843 2844 if (eind->relocs_copied != NULL) 2845 { 2846 if (edir->relocs_copied != NULL) 2847 { 2848 struct elf32_arm_relocs_copied **pp; 2849 struct elf32_arm_relocs_copied *p; 2850 2851 /* Add reloc counts against the indirect sym to the direct sym 2852 list. Merge any entries against the same section. */ 2853 for (pp = &eind->relocs_copied; (p = *pp) != NULL; ) 2854 { 2855 struct elf32_arm_relocs_copied *q; 2856 2857 for (q = edir->relocs_copied; q != NULL; q = q->next) 2858 if (q->section == p->section) 2859 { 2860 q->pc_count += p->pc_count; 2861 q->count += p->count; 2862 *pp = p->next; 2863 break; 2864 } 2865 if (q == NULL) 2866 pp = &p->next; 2867 } 2868 *pp = edir->relocs_copied; 2869 } 2870 2871 edir->relocs_copied = eind->relocs_copied; 2872 eind->relocs_copied = NULL; 2873 } 2874 2875 if (ind->root.type == bfd_link_hash_indirect) 2876 { 2877 /* Copy over PLT info. */ 2878 edir->plt_thumb_refcount += eind->plt_thumb_refcount; 2879 eind->plt_thumb_refcount = 0; 2880 edir->plt_maybe_thumb_refcount += eind->plt_maybe_thumb_refcount; 2881 eind->plt_maybe_thumb_refcount = 0; 2882 2883 if (dir->got.refcount <= 0) 2884 { 2885 edir->tls_type = eind->tls_type; 2886 eind->tls_type = GOT_UNKNOWN; 2887 } 2888 } 2889 2890 _bfd_elf_link_hash_copy_indirect (info, dir, ind); 2891 } 2892 2893 /* Create an ARM elf linker hash table. */ 2894 2895 static struct bfd_link_hash_table * 2896 elf32_arm_link_hash_table_create (bfd *abfd) 2897 { 2898 struct elf32_arm_link_hash_table *ret; 2899 bfd_size_type amt = sizeof (struct elf32_arm_link_hash_table); 2900 2901 ret = (struct elf32_arm_link_hash_table *) bfd_malloc (amt); 2902 if (ret == NULL) 2903 return NULL; 2904 2905 if (!_bfd_elf_link_hash_table_init (& ret->root, abfd, 2906 elf32_arm_link_hash_newfunc, 2907 sizeof (struct elf32_arm_link_hash_entry), 2908 ARM_ELF_DATA)) 2909 { 2910 free (ret); 2911 return NULL; 2912 } 2913 2914 ret->sgot = NULL; 2915 ret->sgotplt = NULL; 2916 ret->srelgot = NULL; 2917 ret->splt = NULL; 2918 ret->srelplt = NULL; 2919 ret->sdynbss = NULL; 2920 ret->srelbss = NULL; 2921 ret->srelplt2 = NULL; 2922 ret->thumb_glue_size = 0; 2923 ret->arm_glue_size = 0; 2924 ret->bx_glue_size = 0; 2925 memset (ret->bx_glue_offset, 0, sizeof (ret->bx_glue_offset)); 2926 ret->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; 2927 ret->vfp11_erratum_glue_size = 0; 2928 ret->num_vfp11_fixes = 0; 2929 ret->fix_cortex_a8 = 0; 2930 ret->bfd_of_glue_owner = NULL; 2931 ret->byteswap_code = 0; 2932 ret->target1_is_rel = 0; 2933 ret->target2_reloc = R_ARM_NONE; 2934 #ifdef FOUR_WORD_PLT 2935 ret->plt_header_size = 16; 2936 ret->plt_entry_size = 16; 2937 #else 2938 ret->plt_header_size = 20; 2939 ret->plt_entry_size = 12; 2940 #endif 2941 ret->fix_v4bx = 0; 2942 ret->use_blx = 0; 2943 ret->vxworks_p = 0; 2944 ret->symbian_p = 0; 2945 ret->use_rel = 1; 2946 ret->sym_cache.abfd = NULL; 2947 ret->obfd = abfd; 2948 ret->tls_ldm_got.refcount = 0; 2949 ret->stub_bfd = NULL; 2950 ret->add_stub_section = NULL; 2951 ret->layout_sections_again = NULL; 2952 ret->stub_group = NULL; 2953 ret->top_id = 0; 2954 ret->bfd_count = 0; 2955 ret->top_index = 0; 2956 ret->input_list = NULL; 2957 2958 if (!bfd_hash_table_init (&ret->stub_hash_table, stub_hash_newfunc, 2959 sizeof (struct elf32_arm_stub_hash_entry))) 2960 { 2961 free (ret); 2962 return NULL; 2963 } 2964 2965 return &ret->root.root; 2966 } 2967 2968 /* Free the derived linker hash table. */ 2969 2970 static void 2971 elf32_arm_hash_table_free (struct bfd_link_hash_table *hash) 2972 { 2973 struct elf32_arm_link_hash_table *ret 2974 = (struct elf32_arm_link_hash_table *) hash; 2975 2976 bfd_hash_table_free (&ret->stub_hash_table); 2977 _bfd_generic_link_hash_table_free (hash); 2978 } 2979 2980 /* Determine if we're dealing with a Thumb only architecture. */ 2981 2982 static bfd_boolean 2983 using_thumb_only (struct elf32_arm_link_hash_table *globals) 2984 { 2985 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 2986 Tag_CPU_arch); 2987 int profile; 2988 2989 if (arch == TAG_CPU_ARCH_V6_M || arch == TAG_CPU_ARCH_V6S_M) 2990 return TRUE; 2991 2992 if (arch != TAG_CPU_ARCH_V7 && arch != TAG_CPU_ARCH_V7E_M) 2993 return FALSE; 2994 2995 profile = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 2996 Tag_CPU_arch_profile); 2997 2998 return profile == 'M'; 2999 } 3000 3001 /* Determine if we're dealing with a Thumb-2 object. */ 3002 3003 static bfd_boolean 3004 using_thumb2 (struct elf32_arm_link_hash_table *globals) 3005 { 3006 int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 3007 Tag_CPU_arch); 3008 return arch == TAG_CPU_ARCH_V6T2 || arch >= TAG_CPU_ARCH_V7; 3009 } 3010 3011 /* Determine what kind of NOPs are available. */ 3012 3013 static bfd_boolean 3014 arch_has_arm_nop (struct elf32_arm_link_hash_table *globals) 3015 { 3016 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 3017 Tag_CPU_arch); 3018 return arch == TAG_CPU_ARCH_V6T2 3019 || arch == TAG_CPU_ARCH_V6K 3020 || arch == TAG_CPU_ARCH_V7 3021 || arch == TAG_CPU_ARCH_V7E_M; 3022 } 3023 3024 static bfd_boolean 3025 arch_has_thumb2_nop (struct elf32_arm_link_hash_table *globals) 3026 { 3027 const int arch = bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 3028 Tag_CPU_arch); 3029 return (arch == TAG_CPU_ARCH_V6T2 || arch == TAG_CPU_ARCH_V7 3030 || arch == TAG_CPU_ARCH_V7E_M); 3031 } 3032 3033 static bfd_boolean 3034 arm_stub_is_thumb (enum elf32_arm_stub_type stub_type) 3035 { 3036 switch (stub_type) 3037 { 3038 case arm_stub_long_branch_thumb_only: 3039 case arm_stub_long_branch_v4t_thumb_arm: 3040 case arm_stub_short_branch_v4t_thumb_arm: 3041 case arm_stub_long_branch_v4t_thumb_arm_pic: 3042 case arm_stub_long_branch_thumb_only_pic: 3043 return TRUE; 3044 case arm_stub_none: 3045 BFD_FAIL (); 3046 return FALSE; 3047 break; 3048 default: 3049 return FALSE; 3050 } 3051 } 3052 3053 /* Determine the type of stub needed, if any, for a call. */ 3054 3055 static enum elf32_arm_stub_type 3056 arm_type_of_stub (struct bfd_link_info *info, 3057 asection *input_sec, 3058 const Elf_Internal_Rela *rel, 3059 int *actual_st_type, 3060 struct elf32_arm_link_hash_entry *hash, 3061 bfd_vma destination, 3062 asection *sym_sec, 3063 bfd *input_bfd, 3064 const char *name) 3065 { 3066 bfd_vma location; 3067 bfd_signed_vma branch_offset; 3068 unsigned int r_type; 3069 struct elf32_arm_link_hash_table * globals; 3070 int thumb2; 3071 int thumb_only; 3072 enum elf32_arm_stub_type stub_type = arm_stub_none; 3073 int use_plt = 0; 3074 int st_type = *actual_st_type; 3075 3076 /* We don't know the actual type of destination in case it is of 3077 type STT_SECTION: give up. */ 3078 if (st_type == STT_SECTION) 3079 return stub_type; 3080 3081 globals = elf32_arm_hash_table (info); 3082 if (globals == NULL) 3083 return stub_type; 3084 3085 thumb_only = using_thumb_only (globals); 3086 3087 thumb2 = using_thumb2 (globals); 3088 3089 /* Determine where the call point is. */ 3090 location = (input_sec->output_offset 3091 + input_sec->output_section->vma 3092 + rel->r_offset); 3093 3094 r_type = ELF32_R_TYPE (rel->r_info); 3095 3096 /* Keep a simpler condition, for the sake of clarity. */ 3097 if (globals->splt != NULL 3098 && hash != NULL 3099 && hash->root.plt.offset != (bfd_vma) -1) 3100 { 3101 use_plt = 1; 3102 3103 /* Note when dealing with PLT entries: the main PLT stub is in 3104 ARM mode, so if the branch is in Thumb mode, another 3105 Thumb->ARM stub will be inserted later just before the ARM 3106 PLT stub. We don't take this extra distance into account 3107 here, because if a long branch stub is needed, we'll add a 3108 Thumb->Arm one and branch directly to the ARM PLT entry 3109 because it avoids spreading offset corrections in several 3110 places. */ 3111 3112 destination = (globals->splt->output_section->vma 3113 + globals->splt->output_offset 3114 + hash->root.plt.offset); 3115 st_type = STT_FUNC; 3116 } 3117 3118 branch_offset = (bfd_signed_vma)(destination - location); 3119 3120 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) 3121 { 3122 /* Handle cases where: 3123 - this call goes too far (different Thumb/Thumb2 max 3124 distance) 3125 - it's a Thumb->Arm call and blx is not available, or it's a 3126 Thumb->Arm branch (not bl). A stub is needed in this case, 3127 but only if this call is not through a PLT entry. Indeed, 3128 PLT stubs handle mode switching already. 3129 */ 3130 if ((!thumb2 3131 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET 3132 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET))) 3133 || (thumb2 3134 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET 3135 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET))) 3136 || ((st_type != STT_ARM_TFUNC) 3137 && (((r_type == R_ARM_THM_CALL) && !globals->use_blx) 3138 || (r_type == R_ARM_THM_JUMP24)) 3139 && !use_plt)) 3140 { 3141 if (st_type == STT_ARM_TFUNC) 3142 { 3143 /* Thumb to thumb. */ 3144 if (!thumb_only) 3145 { 3146 stub_type = (info->shared | globals->pic_veneer) 3147 /* PIC stubs. */ 3148 ? ((globals->use_blx 3149 && (r_type ==R_ARM_THM_CALL)) 3150 /* V5T and above. Stub starts with ARM code, so 3151 we must be able to switch mode before 3152 reaching it, which is only possible for 'bl' 3153 (ie R_ARM_THM_CALL relocation). */ 3154 ? arm_stub_long_branch_any_thumb_pic 3155 /* On V4T, use Thumb code only. */ 3156 : arm_stub_long_branch_v4t_thumb_thumb_pic) 3157 3158 /* non-PIC stubs. */ 3159 : ((globals->use_blx 3160 && (r_type ==R_ARM_THM_CALL)) 3161 /* V5T and above. */ 3162 ? arm_stub_long_branch_any_any 3163 /* V4T. */ 3164 : arm_stub_long_branch_v4t_thumb_thumb); 3165 } 3166 else 3167 { 3168 stub_type = (info->shared | globals->pic_veneer) 3169 /* PIC stub. */ 3170 ? arm_stub_long_branch_thumb_only_pic 3171 /* non-PIC stub. */ 3172 : arm_stub_long_branch_thumb_only; 3173 } 3174 } 3175 else 3176 { 3177 /* Thumb to arm. */ 3178 if (sym_sec != NULL 3179 && sym_sec->owner != NULL 3180 && !INTERWORK_FLAG (sym_sec->owner)) 3181 { 3182 (*_bfd_error_handler) 3183 (_("%B(%s): warning: interworking not enabled.\n" 3184 " first occurrence: %B: Thumb call to ARM"), 3185 sym_sec->owner, input_bfd, name); 3186 } 3187 3188 stub_type = (info->shared | globals->pic_veneer) 3189 /* PIC stubs. */ 3190 ? ((globals->use_blx 3191 && (r_type ==R_ARM_THM_CALL)) 3192 /* V5T and above. */ 3193 ? arm_stub_long_branch_any_arm_pic 3194 /* V4T PIC stub. */ 3195 : arm_stub_long_branch_v4t_thumb_arm_pic) 3196 3197 /* non-PIC stubs. */ 3198 : ((globals->use_blx 3199 && (r_type ==R_ARM_THM_CALL)) 3200 /* V5T and above. */ 3201 ? arm_stub_long_branch_any_any 3202 /* V4T. */ 3203 : arm_stub_long_branch_v4t_thumb_arm); 3204 3205 /* Handle v4t short branches. */ 3206 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm) 3207 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET) 3208 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET)) 3209 stub_type = arm_stub_short_branch_v4t_thumb_arm; 3210 } 3211 } 3212 } 3213 else if (r_type == R_ARM_CALL 3214 || r_type == R_ARM_JUMP24 3215 || r_type == R_ARM_PLT32) 3216 { 3217 if (st_type == STT_ARM_TFUNC) 3218 { 3219 /* Arm to thumb. */ 3220 3221 if (sym_sec != NULL 3222 && sym_sec->owner != NULL 3223 && !INTERWORK_FLAG (sym_sec->owner)) 3224 { 3225 (*_bfd_error_handler) 3226 (_("%B(%s): warning: interworking not enabled.\n" 3227 " first occurrence: %B: ARM call to Thumb"), 3228 sym_sec->owner, input_bfd, name); 3229 } 3230 3231 /* We have an extra 2-bytes reach because of 3232 the mode change (bit 24 (H) of BLX encoding). */ 3233 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2) 3234 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET) 3235 || ((r_type == R_ARM_CALL) && !globals->use_blx) 3236 || (r_type == R_ARM_JUMP24) 3237 || (r_type == R_ARM_PLT32)) 3238 { 3239 stub_type = (info->shared | globals->pic_veneer) 3240 /* PIC stubs. */ 3241 ? ((globals->use_blx) 3242 /* V5T and above. */ 3243 ? arm_stub_long_branch_any_thumb_pic 3244 /* V4T stub. */ 3245 : arm_stub_long_branch_v4t_arm_thumb_pic) 3246 3247 /* non-PIC stubs. */ 3248 : ((globals->use_blx) 3249 /* V5T and above. */ 3250 ? arm_stub_long_branch_any_any 3251 /* V4T. */ 3252 : arm_stub_long_branch_v4t_arm_thumb); 3253 } 3254 } 3255 else 3256 { 3257 /* Arm to arm. */ 3258 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET 3259 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)) 3260 { 3261 stub_type = (info->shared | globals->pic_veneer) 3262 /* PIC stubs. */ 3263 ? arm_stub_long_branch_any_arm_pic 3264 /* non-PIC stubs. */ 3265 : arm_stub_long_branch_any_any; 3266 } 3267 } 3268 } 3269 3270 /* If a stub is needed, record the actual destination type. */ 3271 if (stub_type != arm_stub_none) 3272 *actual_st_type = st_type; 3273 3274 return stub_type; 3275 } 3276 3277 /* Build a name for an entry in the stub hash table. */ 3278 3279 static char * 3280 elf32_arm_stub_name (const asection *input_section, 3281 const asection *sym_sec, 3282 const struct elf32_arm_link_hash_entry *hash, 3283 const Elf_Internal_Rela *rel, 3284 enum elf32_arm_stub_type stub_type) 3285 { 3286 char *stub_name; 3287 bfd_size_type len; 3288 3289 if (hash) 3290 { 3291 len = 8 + 1 + strlen (hash->root.root.root.string) + 1 + 8 + 1 + 2 + 1; 3292 stub_name = (char *) bfd_malloc (len); 3293 if (stub_name != NULL) 3294 sprintf (stub_name, "%08x_%s+%x_%d", 3295 input_section->id & 0xffffffff, 3296 hash->root.root.root.string, 3297 (int) rel->r_addend & 0xffffffff, 3298 (int) stub_type); 3299 } 3300 else 3301 { 3302 len = 8 + 1 + 8 + 1 + 8 + 1 + 8 + 1 + 2 + 1; 3303 stub_name = (char *) bfd_malloc (len); 3304 if (stub_name != NULL) 3305 sprintf (stub_name, "%08x_%x:%x+%x_%d", 3306 input_section->id & 0xffffffff, 3307 sym_sec->id & 0xffffffff, 3308 (int) ELF32_R_SYM (rel->r_info) & 0xffffffff, 3309 (int) rel->r_addend & 0xffffffff, 3310 (int) stub_type); 3311 } 3312 3313 return stub_name; 3314 } 3315 3316 /* Look up an entry in the stub hash. Stub entries are cached because 3317 creating the stub name takes a bit of time. */ 3318 3319 static struct elf32_arm_stub_hash_entry * 3320 elf32_arm_get_stub_entry (const asection *input_section, 3321 const asection *sym_sec, 3322 struct elf_link_hash_entry *hash, 3323 const Elf_Internal_Rela *rel, 3324 struct elf32_arm_link_hash_table *htab, 3325 enum elf32_arm_stub_type stub_type) 3326 { 3327 struct elf32_arm_stub_hash_entry *stub_entry; 3328 struct elf32_arm_link_hash_entry *h = (struct elf32_arm_link_hash_entry *) hash; 3329 const asection *id_sec; 3330 3331 if ((input_section->flags & SEC_CODE) == 0) 3332 return NULL; 3333 3334 /* If this input section is part of a group of sections sharing one 3335 stub section, then use the id of the first section in the group. 3336 Stub names need to include a section id, as there may well be 3337 more than one stub used to reach say, printf, and we need to 3338 distinguish between them. */ 3339 id_sec = htab->stub_group[input_section->id].link_sec; 3340 3341 if (h != NULL && h->stub_cache != NULL 3342 && h->stub_cache->h == h 3343 && h->stub_cache->id_sec == id_sec 3344 && h->stub_cache->stub_type == stub_type) 3345 { 3346 stub_entry = h->stub_cache; 3347 } 3348 else 3349 { 3350 char *stub_name; 3351 3352 stub_name = elf32_arm_stub_name (id_sec, sym_sec, h, rel, stub_type); 3353 if (stub_name == NULL) 3354 return NULL; 3355 3356 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, 3357 stub_name, FALSE, FALSE); 3358 if (h != NULL) 3359 h->stub_cache = stub_entry; 3360 3361 free (stub_name); 3362 } 3363 3364 return stub_entry; 3365 } 3366 3367 /* Find or create a stub section. Returns a pointer to the stub section, and 3368 the section to which the stub section will be attached (in *LINK_SEC_P). 3369 LINK_SEC_P may be NULL. */ 3370 3371 static asection * 3372 elf32_arm_create_or_find_stub_sec (asection **link_sec_p, asection *section, 3373 struct elf32_arm_link_hash_table *htab) 3374 { 3375 asection *link_sec; 3376 asection *stub_sec; 3377 3378 link_sec = htab->stub_group[section->id].link_sec; 3379 stub_sec = htab->stub_group[section->id].stub_sec; 3380 if (stub_sec == NULL) 3381 { 3382 stub_sec = htab->stub_group[link_sec->id].stub_sec; 3383 if (stub_sec == NULL) 3384 { 3385 size_t namelen; 3386 bfd_size_type len; 3387 char *s_name; 3388 3389 namelen = strlen (link_sec->name); 3390 len = namelen + sizeof (STUB_SUFFIX); 3391 s_name = (char *) bfd_alloc (htab->stub_bfd, len); 3392 if (s_name == NULL) 3393 return NULL; 3394 3395 memcpy (s_name, link_sec->name, namelen); 3396 memcpy (s_name + namelen, STUB_SUFFIX, sizeof (STUB_SUFFIX)); 3397 stub_sec = (*htab->add_stub_section) (s_name, link_sec); 3398 if (stub_sec == NULL) 3399 return NULL; 3400 htab->stub_group[link_sec->id].stub_sec = stub_sec; 3401 } 3402 htab->stub_group[section->id].stub_sec = stub_sec; 3403 } 3404 3405 if (link_sec_p) 3406 *link_sec_p = link_sec; 3407 3408 return stub_sec; 3409 } 3410 3411 /* Add a new stub entry to the stub hash. Not all fields of the new 3412 stub entry are initialised. */ 3413 3414 static struct elf32_arm_stub_hash_entry * 3415 elf32_arm_add_stub (const char *stub_name, 3416 asection *section, 3417 struct elf32_arm_link_hash_table *htab) 3418 { 3419 asection *link_sec; 3420 asection *stub_sec; 3421 struct elf32_arm_stub_hash_entry *stub_entry; 3422 3423 stub_sec = elf32_arm_create_or_find_stub_sec (&link_sec, section, htab); 3424 if (stub_sec == NULL) 3425 return NULL; 3426 3427 /* Enter this entry into the linker stub hash table. */ 3428 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, 3429 TRUE, FALSE); 3430 if (stub_entry == NULL) 3431 { 3432 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), 3433 section->owner, 3434 stub_name); 3435 return NULL; 3436 } 3437 3438 stub_entry->stub_sec = stub_sec; 3439 stub_entry->stub_offset = 0; 3440 stub_entry->id_sec = link_sec; 3441 3442 return stub_entry; 3443 } 3444 3445 /* Store an Arm insn into an output section not processed by 3446 elf32_arm_write_section. */ 3447 3448 static void 3449 put_arm_insn (struct elf32_arm_link_hash_table * htab, 3450 bfd * output_bfd, bfd_vma val, void * ptr) 3451 { 3452 if (htab->byteswap_code != bfd_little_endian (output_bfd)) 3453 bfd_putl32 (val, ptr); 3454 else 3455 bfd_putb32 (val, ptr); 3456 } 3457 3458 /* Store a 16-bit Thumb insn into an output section not processed by 3459 elf32_arm_write_section. */ 3460 3461 static void 3462 put_thumb_insn (struct elf32_arm_link_hash_table * htab, 3463 bfd * output_bfd, bfd_vma val, void * ptr) 3464 { 3465 if (htab->byteswap_code != bfd_little_endian (output_bfd)) 3466 bfd_putl16 (val, ptr); 3467 else 3468 bfd_putb16 (val, ptr); 3469 } 3470 3471 static bfd_reloc_status_type elf32_arm_final_link_relocate 3472 (reloc_howto_type *, bfd *, bfd *, asection *, bfd_byte *, 3473 Elf_Internal_Rela *, bfd_vma, struct bfd_link_info *, asection *, 3474 const char *, int, struct elf_link_hash_entry *, bfd_boolean *, char **); 3475 3476 static unsigned int 3477 arm_stub_required_alignment (enum elf32_arm_stub_type stub_type) 3478 { 3479 switch (stub_type) 3480 { 3481 case arm_stub_a8_veneer_b_cond: 3482 case arm_stub_a8_veneer_b: 3483 case arm_stub_a8_veneer_bl: 3484 return 2; 3485 3486 case arm_stub_long_branch_any_any: 3487 case arm_stub_long_branch_v4t_arm_thumb: 3488 case arm_stub_long_branch_thumb_only: 3489 case arm_stub_long_branch_v4t_thumb_thumb: 3490 case arm_stub_long_branch_v4t_thumb_arm: 3491 case arm_stub_short_branch_v4t_thumb_arm: 3492 case arm_stub_long_branch_any_arm_pic: 3493 case arm_stub_long_branch_any_thumb_pic: 3494 case arm_stub_long_branch_v4t_thumb_thumb_pic: 3495 case arm_stub_long_branch_v4t_arm_thumb_pic: 3496 case arm_stub_long_branch_v4t_thumb_arm_pic: 3497 case arm_stub_long_branch_thumb_only_pic: 3498 case arm_stub_a8_veneer_blx: 3499 return 4; 3500 3501 default: 3502 abort (); /* Should be unreachable. */ 3503 } 3504 } 3505 3506 static bfd_boolean 3507 arm_build_one_stub (struct bfd_hash_entry *gen_entry, 3508 void * in_arg) 3509 { 3510 #define MAXRELOCS 2 3511 struct elf32_arm_stub_hash_entry *stub_entry; 3512 struct elf32_arm_link_hash_table *globals; 3513 struct bfd_link_info *info; 3514 asection *stub_sec; 3515 bfd *stub_bfd; 3516 bfd_byte *loc; 3517 bfd_vma sym_value; 3518 int template_size; 3519 int size; 3520 const insn_sequence *template_sequence; 3521 int i; 3522 int stub_reloc_idx[MAXRELOCS] = {-1, -1}; 3523 int stub_reloc_offset[MAXRELOCS] = {0, 0}; 3524 int nrelocs = 0; 3525 3526 /* Massage our args to the form they really have. */ 3527 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; 3528 info = (struct bfd_link_info *) in_arg; 3529 3530 globals = elf32_arm_hash_table (info); 3531 if (globals == NULL) 3532 return FALSE; 3533 3534 stub_sec = stub_entry->stub_sec; 3535 3536 if ((globals->fix_cortex_a8 < 0) 3537 != (arm_stub_required_alignment (stub_entry->stub_type) == 2)) 3538 /* We have to do less-strictly-aligned fixes last. */ 3539 return TRUE; 3540 3541 /* Make a note of the offset within the stubs for this entry. */ 3542 stub_entry->stub_offset = stub_sec->size; 3543 loc = stub_sec->contents + stub_entry->stub_offset; 3544 3545 stub_bfd = stub_sec->owner; 3546 3547 /* This is the address of the stub destination. */ 3548 sym_value = (stub_entry->target_value 3549 + stub_entry->target_section->output_offset 3550 + stub_entry->target_section->output_section->vma); 3551 3552 template_sequence = stub_entry->stub_template; 3553 template_size = stub_entry->stub_template_size; 3554 3555 size = 0; 3556 for (i = 0; i < template_size; i++) 3557 { 3558 switch (template_sequence[i].type) 3559 { 3560 case THUMB16_TYPE: 3561 { 3562 bfd_vma data = (bfd_vma) template_sequence[i].data; 3563 if (template_sequence[i].reloc_addend != 0) 3564 { 3565 /* We've borrowed the reloc_addend field to mean we should 3566 insert a condition code into this (Thumb-1 branch) 3567 instruction. See THUMB16_BCOND_INSN. */ 3568 BFD_ASSERT ((data & 0xff00) == 0xd000); 3569 data |= ((stub_entry->orig_insn >> 22) & 0xf) << 8; 3570 } 3571 bfd_put_16 (stub_bfd, data, loc + size); 3572 size += 2; 3573 } 3574 break; 3575 3576 case THUMB32_TYPE: 3577 bfd_put_16 (stub_bfd, 3578 (template_sequence[i].data >> 16) & 0xffff, 3579 loc + size); 3580 bfd_put_16 (stub_bfd, template_sequence[i].data & 0xffff, 3581 loc + size + 2); 3582 if (template_sequence[i].r_type != R_ARM_NONE) 3583 { 3584 stub_reloc_idx[nrelocs] = i; 3585 stub_reloc_offset[nrelocs++] = size; 3586 } 3587 size += 4; 3588 break; 3589 3590 case ARM_TYPE: 3591 bfd_put_32 (stub_bfd, template_sequence[i].data, 3592 loc + size); 3593 /* Handle cases where the target is encoded within the 3594 instruction. */ 3595 if (template_sequence[i].r_type == R_ARM_JUMP24) 3596 { 3597 stub_reloc_idx[nrelocs] = i; 3598 stub_reloc_offset[nrelocs++] = size; 3599 } 3600 size += 4; 3601 break; 3602 3603 case DATA_TYPE: 3604 bfd_put_32 (stub_bfd, template_sequence[i].data, loc + size); 3605 stub_reloc_idx[nrelocs] = i; 3606 stub_reloc_offset[nrelocs++] = size; 3607 size += 4; 3608 break; 3609 3610 default: 3611 BFD_FAIL (); 3612 return FALSE; 3613 } 3614 } 3615 3616 stub_sec->size += size; 3617 3618 /* Stub size has already been computed in arm_size_one_stub. Check 3619 consistency. */ 3620 BFD_ASSERT (size == stub_entry->stub_size); 3621 3622 /* Destination is Thumb. Force bit 0 to 1 to reflect this. */ 3623 if (stub_entry->st_type == STT_ARM_TFUNC) 3624 sym_value |= 1; 3625 3626 /* Assume there is at least one and at most MAXRELOCS entries to relocate 3627 in each stub. */ 3628 BFD_ASSERT (nrelocs != 0 && nrelocs <= MAXRELOCS); 3629 3630 for (i = 0; i < nrelocs; i++) 3631 if (template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP24 3632 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_JUMP19 3633 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_CALL 3634 || template_sequence[stub_reloc_idx[i]].r_type == R_ARM_THM_XPC22) 3635 { 3636 Elf_Internal_Rela rel; 3637 bfd_boolean unresolved_reloc; 3638 char *error_message; 3639 int sym_flags 3640 = (template_sequence[stub_reloc_idx[i]].r_type != R_ARM_THM_XPC22) 3641 ? STT_ARM_TFUNC : 0; 3642 bfd_vma points_to = sym_value + stub_entry->target_addend; 3643 3644 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; 3645 rel.r_info = ELF32_R_INFO (0, 3646 template_sequence[stub_reloc_idx[i]].r_type); 3647 rel.r_addend = template_sequence[stub_reloc_idx[i]].reloc_addend; 3648 3649 if (stub_entry->stub_type == arm_stub_a8_veneer_b_cond && i == 0) 3650 /* The first relocation in the elf32_arm_stub_a8_veneer_b_cond[] 3651 template should refer back to the instruction after the original 3652 branch. */ 3653 points_to = sym_value; 3654 3655 /* There may be unintended consequences if this is not true. */ 3656 BFD_ASSERT (stub_entry->h == NULL); 3657 3658 /* Note: _bfd_final_link_relocate doesn't handle these relocations 3659 properly. We should probably use this function unconditionally, 3660 rather than only for certain relocations listed in the enclosing 3661 conditional, for the sake of consistency. */ 3662 elf32_arm_final_link_relocate (elf32_arm_howto_from_type 3663 (template_sequence[stub_reloc_idx[i]].r_type), 3664 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, 3665 points_to, info, stub_entry->target_section, "", sym_flags, 3666 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, 3667 &error_message); 3668 } 3669 else 3670 { 3671 Elf_Internal_Rela rel; 3672 bfd_boolean unresolved_reloc; 3673 char *error_message; 3674 bfd_vma points_to = sym_value + stub_entry->target_addend 3675 + template_sequence[stub_reloc_idx[i]].reloc_addend; 3676 3677 rel.r_offset = stub_entry->stub_offset + stub_reloc_offset[i]; 3678 rel.r_info = ELF32_R_INFO (0, 3679 template_sequence[stub_reloc_idx[i]].r_type); 3680 rel.r_addend = 0; 3681 3682 elf32_arm_final_link_relocate (elf32_arm_howto_from_type 3683 (template_sequence[stub_reloc_idx[i]].r_type), 3684 stub_bfd, info->output_bfd, stub_sec, stub_sec->contents, &rel, 3685 points_to, info, stub_entry->target_section, "", stub_entry->st_type, 3686 (struct elf_link_hash_entry *) stub_entry->h, &unresolved_reloc, 3687 &error_message); 3688 } 3689 3690 return TRUE; 3691 #undef MAXRELOCS 3692 } 3693 3694 /* Calculate the template, template size and instruction size for a stub. 3695 Return value is the instruction size. */ 3696 3697 static unsigned int 3698 find_stub_size_and_template (enum elf32_arm_stub_type stub_type, 3699 const insn_sequence **stub_template, 3700 int *stub_template_size) 3701 { 3702 const insn_sequence *template_sequence = NULL; 3703 int template_size = 0, i; 3704 unsigned int size; 3705 3706 template_sequence = stub_definitions[stub_type].template_sequence; 3707 if (stub_template) 3708 *stub_template = template_sequence; 3709 3710 template_size = stub_definitions[stub_type].template_size; 3711 if (stub_template_size) 3712 *stub_template_size = template_size; 3713 3714 size = 0; 3715 for (i = 0; i < template_size; i++) 3716 { 3717 switch (template_sequence[i].type) 3718 { 3719 case THUMB16_TYPE: 3720 size += 2; 3721 break; 3722 3723 case ARM_TYPE: 3724 case THUMB32_TYPE: 3725 case DATA_TYPE: 3726 size += 4; 3727 break; 3728 3729 default: 3730 BFD_FAIL (); 3731 return 0; 3732 } 3733 } 3734 3735 return size; 3736 } 3737 3738 /* As above, but don't actually build the stub. Just bump offset so 3739 we know stub section sizes. */ 3740 3741 static bfd_boolean 3742 arm_size_one_stub (struct bfd_hash_entry *gen_entry, 3743 void *in_arg ATTRIBUTE_UNUSED) 3744 { 3745 struct elf32_arm_stub_hash_entry *stub_entry; 3746 const insn_sequence *template_sequence; 3747 int template_size, size; 3748 3749 /* Massage our args to the form they really have. */ 3750 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; 3751 3752 BFD_ASSERT((stub_entry->stub_type > arm_stub_none) 3753 && stub_entry->stub_type < ARRAY_SIZE(stub_definitions)); 3754 3755 size = find_stub_size_and_template (stub_entry->stub_type, &template_sequence, 3756 &template_size); 3757 3758 stub_entry->stub_size = size; 3759 stub_entry->stub_template = template_sequence; 3760 stub_entry->stub_template_size = template_size; 3761 3762 size = (size + 7) & ~7; 3763 stub_entry->stub_sec->size += size; 3764 3765 return TRUE; 3766 } 3767 3768 /* External entry points for sizing and building linker stubs. */ 3769 3770 /* Set up various things so that we can make a list of input sections 3771 for each output section included in the link. Returns -1 on error, 3772 0 when no stubs will be needed, and 1 on success. */ 3773 3774 int 3775 elf32_arm_setup_section_lists (bfd *output_bfd, 3776 struct bfd_link_info *info) 3777 { 3778 bfd *input_bfd; 3779 unsigned int bfd_count; 3780 int top_id, top_index; 3781 asection *section; 3782 asection **input_list, **list; 3783 bfd_size_type amt; 3784 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); 3785 3786 if (htab == NULL) 3787 return 0; 3788 if (! is_elf_hash_table (htab)) 3789 return 0; 3790 3791 /* Count the number of input BFDs and find the top input section id. */ 3792 for (input_bfd = info->input_bfds, bfd_count = 0, top_id = 0; 3793 input_bfd != NULL; 3794 input_bfd = input_bfd->link_next) 3795 { 3796 bfd_count += 1; 3797 for (section = input_bfd->sections; 3798 section != NULL; 3799 section = section->next) 3800 { 3801 if (top_id < section->id) 3802 top_id = section->id; 3803 } 3804 } 3805 htab->bfd_count = bfd_count; 3806 3807 amt = sizeof (struct map_stub) * (top_id + 1); 3808 htab->stub_group = (struct map_stub *) bfd_zmalloc (amt); 3809 if (htab->stub_group == NULL) 3810 return -1; 3811 htab->top_id = top_id; 3812 3813 /* We can't use output_bfd->section_count here to find the top output 3814 section index as some sections may have been removed, and 3815 _bfd_strip_section_from_output doesn't renumber the indices. */ 3816 for (section = output_bfd->sections, top_index = 0; 3817 section != NULL; 3818 section = section->next) 3819 { 3820 if (top_index < section->index) 3821 top_index = section->index; 3822 } 3823 3824 htab->top_index = top_index; 3825 amt = sizeof (asection *) * (top_index + 1); 3826 input_list = (asection **) bfd_malloc (amt); 3827 htab->input_list = input_list; 3828 if (input_list == NULL) 3829 return -1; 3830 3831 /* For sections we aren't interested in, mark their entries with a 3832 value we can check later. */ 3833 list = input_list + top_index; 3834 do 3835 *list = bfd_abs_section_ptr; 3836 while (list-- != input_list); 3837 3838 for (section = output_bfd->sections; 3839 section != NULL; 3840 section = section->next) 3841 { 3842 if ((section->flags & SEC_CODE) != 0) 3843 input_list[section->index] = NULL; 3844 } 3845 3846 return 1; 3847 } 3848 3849 /* The linker repeatedly calls this function for each input section, 3850 in the order that input sections are linked into output sections. 3851 Build lists of input sections to determine groupings between which 3852 we may insert linker stubs. */ 3853 3854 void 3855 elf32_arm_next_input_section (struct bfd_link_info *info, 3856 asection *isec) 3857 { 3858 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); 3859 3860 if (htab == NULL) 3861 return; 3862 3863 if (isec->output_section->index <= htab->top_index) 3864 { 3865 asection **list = htab->input_list + isec->output_section->index; 3866 3867 if (*list != bfd_abs_section_ptr && (isec->flags & SEC_CODE) != 0) 3868 { 3869 /* Steal the link_sec pointer for our list. */ 3870 #define PREV_SEC(sec) (htab->stub_group[(sec)->id].link_sec) 3871 /* This happens to make the list in reverse order, 3872 which we reverse later. */ 3873 PREV_SEC (isec) = *list; 3874 *list = isec; 3875 } 3876 } 3877 } 3878 3879 /* See whether we can group stub sections together. Grouping stub 3880 sections may result in fewer stubs. More importantly, we need to 3881 put all .init* and .fini* stubs at the end of the .init or 3882 .fini output sections respectively, because glibc splits the 3883 _init and _fini functions into multiple parts. Putting a stub in 3884 the middle of a function is not a good idea. */ 3885 3886 static void 3887 group_sections (struct elf32_arm_link_hash_table *htab, 3888 bfd_size_type stub_group_size, 3889 bfd_boolean stubs_always_after_branch) 3890 { 3891 asection **list = htab->input_list; 3892 3893 do 3894 { 3895 asection *tail = *list; 3896 asection *head; 3897 3898 if (tail == bfd_abs_section_ptr) 3899 continue; 3900 3901 /* Reverse the list: we must avoid placing stubs at the 3902 beginning of the section because the beginning of the text 3903 section may be required for an interrupt vector in bare metal 3904 code. */ 3905 #define NEXT_SEC PREV_SEC 3906 head = NULL; 3907 while (tail != NULL) 3908 { 3909 /* Pop from tail. */ 3910 asection *item = tail; 3911 tail = PREV_SEC (item); 3912 3913 /* Push on head. */ 3914 NEXT_SEC (item) = head; 3915 head = item; 3916 } 3917 3918 while (head != NULL) 3919 { 3920 asection *curr; 3921 asection *next; 3922 bfd_vma stub_group_start = head->output_offset; 3923 bfd_vma end_of_next; 3924 3925 curr = head; 3926 while (NEXT_SEC (curr) != NULL) 3927 { 3928 next = NEXT_SEC (curr); 3929 end_of_next = next->output_offset + next->size; 3930 if (end_of_next - stub_group_start >= stub_group_size) 3931 /* End of NEXT is too far from start, so stop. */ 3932 break; 3933 /* Add NEXT to the group. */ 3934 curr = next; 3935 } 3936 3937 /* OK, the size from the start to the start of CURR is less 3938 than stub_group_size and thus can be handled by one stub 3939 section. (Or the head section is itself larger than 3940 stub_group_size, in which case we may be toast.) 3941 We should really be keeping track of the total size of 3942 stubs added here, as stubs contribute to the final output 3943 section size. */ 3944 do 3945 { 3946 next = NEXT_SEC (head); 3947 /* Set up this stub group. */ 3948 htab->stub_group[head->id].link_sec = curr; 3949 } 3950 while (head != curr && (head = next) != NULL); 3951 3952 /* But wait, there's more! Input sections up to stub_group_size 3953 bytes after the stub section can be handled by it too. */ 3954 if (!stubs_always_after_branch) 3955 { 3956 stub_group_start = curr->output_offset + curr->size; 3957 3958 while (next != NULL) 3959 { 3960 end_of_next = next->output_offset + next->size; 3961 if (end_of_next - stub_group_start >= stub_group_size) 3962 /* End of NEXT is too far from stubs, so stop. */ 3963 break; 3964 /* Add NEXT to the stub group. */ 3965 head = next; 3966 next = NEXT_SEC (head); 3967 htab->stub_group[head->id].link_sec = curr; 3968 } 3969 } 3970 head = next; 3971 } 3972 } 3973 while (list++ != htab->input_list + htab->top_index); 3974 3975 free (htab->input_list); 3976 #undef PREV_SEC 3977 #undef NEXT_SEC 3978 } 3979 3980 /* Comparison function for sorting/searching relocations relating to Cortex-A8 3981 erratum fix. */ 3982 3983 static int 3984 a8_reloc_compare (const void *a, const void *b) 3985 { 3986 const struct a8_erratum_reloc *ra = (const struct a8_erratum_reloc *) a; 3987 const struct a8_erratum_reloc *rb = (const struct a8_erratum_reloc *) b; 3988 3989 if (ra->from < rb->from) 3990 return -1; 3991 else if (ra->from > rb->from) 3992 return 1; 3993 else 3994 return 0; 3995 } 3996 3997 static struct elf_link_hash_entry *find_thumb_glue (struct bfd_link_info *, 3998 const char *, char **); 3999 4000 /* Helper function to scan code for sequences which might trigger the Cortex-A8 4001 branch/TLB erratum. Fill in the table described by A8_FIXES_P, 4002 NUM_A8_FIXES_P, A8_FIX_TABLE_SIZE_P. Returns true if an error occurs, false 4003 otherwise. */ 4004 4005 static bfd_boolean 4006 cortex_a8_erratum_scan (bfd *input_bfd, 4007 struct bfd_link_info *info, 4008 struct a8_erratum_fix **a8_fixes_p, 4009 unsigned int *num_a8_fixes_p, 4010 unsigned int *a8_fix_table_size_p, 4011 struct a8_erratum_reloc *a8_relocs, 4012 unsigned int num_a8_relocs, 4013 unsigned prev_num_a8_fixes, 4014 bfd_boolean *stub_changed_p) 4015 { 4016 asection *section; 4017 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); 4018 struct a8_erratum_fix *a8_fixes = *a8_fixes_p; 4019 unsigned int num_a8_fixes = *num_a8_fixes_p; 4020 unsigned int a8_fix_table_size = *a8_fix_table_size_p; 4021 4022 if (htab == NULL) 4023 return FALSE; 4024 4025 for (section = input_bfd->sections; 4026 section != NULL; 4027 section = section->next) 4028 { 4029 bfd_byte *contents = NULL; 4030 struct _arm_elf_section_data *sec_data; 4031 unsigned int span; 4032 bfd_vma base_vma; 4033 4034 if (elf_section_type (section) != SHT_PROGBITS 4035 || (elf_section_flags (section) & SHF_EXECINSTR) == 0 4036 || (section->flags & SEC_EXCLUDE) != 0 4037 || (section->sec_info_type == ELF_INFO_TYPE_JUST_SYMS) 4038 || (section->output_section == bfd_abs_section_ptr)) 4039 continue; 4040 4041 base_vma = section->output_section->vma + section->output_offset; 4042 4043 if (elf_section_data (section)->this_hdr.contents != NULL) 4044 contents = elf_section_data (section)->this_hdr.contents; 4045 else if (! bfd_malloc_and_get_section (input_bfd, section, &contents)) 4046 return TRUE; 4047 4048 sec_data = elf32_arm_section_data (section); 4049 4050 for (span = 0; span < sec_data->mapcount; span++) 4051 { 4052 unsigned int span_start = sec_data->map[span].vma; 4053 unsigned int span_end = (span == sec_data->mapcount - 1) 4054 ? section->size : sec_data->map[span + 1].vma; 4055 unsigned int i; 4056 char span_type = sec_data->map[span].type; 4057 bfd_boolean last_was_32bit = FALSE, last_was_branch = FALSE; 4058 4059 if (span_type != 't') 4060 continue; 4061 4062 /* Span is entirely within a single 4KB region: skip scanning. */ 4063 if (((base_vma + span_start) & ~0xfff) 4064 == ((base_vma + span_end) & ~0xfff)) 4065 continue; 4066 4067 /* Scan for 32-bit Thumb-2 branches which span two 4K regions, where: 4068 4069 * The opcode is BLX.W, BL.W, B.W, Bcc.W 4070 * The branch target is in the same 4KB region as the 4071 first half of the branch. 4072 * The instruction before the branch is a 32-bit 4073 length non-branch instruction. */ 4074 for (i = span_start; i < span_end;) 4075 { 4076 unsigned int insn = bfd_getl16 (&contents[i]); 4077 bfd_boolean insn_32bit = FALSE, is_blx = FALSE, is_b = FALSE; 4078 bfd_boolean is_bl = FALSE, is_bcc = FALSE, is_32bit_branch; 4079 4080 if ((insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000) 4081 insn_32bit = TRUE; 4082 4083 if (insn_32bit) 4084 { 4085 /* Load the rest of the insn (in manual-friendly order). */ 4086 insn = (insn << 16) | bfd_getl16 (&contents[i + 2]); 4087 4088 /* Encoding T4: B<c>.W. */ 4089 is_b = (insn & 0xf800d000) == 0xf0009000; 4090 /* Encoding T1: BL<c>.W. */ 4091 is_bl = (insn & 0xf800d000) == 0xf000d000; 4092 /* Encoding T2: BLX<c>.W. */ 4093 is_blx = (insn & 0xf800d000) == 0xf000c000; 4094 /* Encoding T3: B<c>.W (not permitted in IT block). */ 4095 is_bcc = (insn & 0xf800d000) == 0xf0008000 4096 && (insn & 0x07f00000) != 0x03800000; 4097 } 4098 4099 is_32bit_branch = is_b || is_bl || is_blx || is_bcc; 4100 4101 if (((base_vma + i) & 0xfff) == 0xffe 4102 && insn_32bit 4103 && is_32bit_branch 4104 && last_was_32bit 4105 && ! last_was_branch) 4106 { 4107 bfd_signed_vma offset = 0; 4108 bfd_boolean force_target_arm = FALSE; 4109 bfd_boolean force_target_thumb = FALSE; 4110 bfd_vma target; 4111 enum elf32_arm_stub_type stub_type = arm_stub_none; 4112 struct a8_erratum_reloc key, *found; 4113 bfd_boolean use_plt = FALSE; 4114 4115 key.from = base_vma + i; 4116 found = (struct a8_erratum_reloc *) 4117 bsearch (&key, a8_relocs, num_a8_relocs, 4118 sizeof (struct a8_erratum_reloc), 4119 &a8_reloc_compare); 4120 4121 if (found) 4122 { 4123 char *error_message = NULL; 4124 struct elf_link_hash_entry *entry; 4125 4126 /* We don't care about the error returned from this 4127 function, only if there is glue or not. */ 4128 entry = find_thumb_glue (info, found->sym_name, 4129 &error_message); 4130 4131 if (entry) 4132 found->non_a8_stub = TRUE; 4133 4134 /* Keep a simpler condition, for the sake of clarity. */ 4135 if (htab->splt != NULL && found->hash != NULL 4136 && found->hash->root.plt.offset != (bfd_vma) -1) 4137 use_plt = TRUE; 4138 4139 if (found->r_type == R_ARM_THM_CALL) 4140 { 4141 if (found->st_type != STT_ARM_TFUNC || use_plt) 4142 force_target_arm = TRUE; 4143 else 4144 force_target_thumb = TRUE; 4145 } 4146 } 4147 4148 /* Check if we have an offending branch instruction. */ 4149 4150 if (found && found->non_a8_stub) 4151 /* We've already made a stub for this instruction, e.g. 4152 it's a long branch or a Thumb->ARM stub. Assume that 4153 stub will suffice to work around the A8 erratum (see 4154 setting of always_after_branch above). */ 4155 ; 4156 else if (is_bcc) 4157 { 4158 offset = (insn & 0x7ff) << 1; 4159 offset |= (insn & 0x3f0000) >> 4; 4160 offset |= (insn & 0x2000) ? 0x40000 : 0; 4161 offset |= (insn & 0x800) ? 0x80000 : 0; 4162 offset |= (insn & 0x4000000) ? 0x100000 : 0; 4163 if (offset & 0x100000) 4164 offset |= ~ ((bfd_signed_vma) 0xfffff); 4165 stub_type = arm_stub_a8_veneer_b_cond; 4166 } 4167 else if (is_b || is_bl || is_blx) 4168 { 4169 int s = (insn & 0x4000000) != 0; 4170 int j1 = (insn & 0x2000) != 0; 4171 int j2 = (insn & 0x800) != 0; 4172 int i1 = !(j1 ^ s); 4173 int i2 = !(j2 ^ s); 4174 4175 offset = (insn & 0x7ff) << 1; 4176 offset |= (insn & 0x3ff0000) >> 4; 4177 offset |= i2 << 22; 4178 offset |= i1 << 23; 4179 offset |= s << 24; 4180 if (offset & 0x1000000) 4181 offset |= ~ ((bfd_signed_vma) 0xffffff); 4182 4183 if (is_blx) 4184 offset &= ~ ((bfd_signed_vma) 3); 4185 4186 stub_type = is_blx ? arm_stub_a8_veneer_blx : 4187 is_bl ? arm_stub_a8_veneer_bl : arm_stub_a8_veneer_b; 4188 } 4189 4190 if (stub_type != arm_stub_none) 4191 { 4192 bfd_vma pc_for_insn = base_vma + i + 4; 4193 4194 /* The original instruction is a BL, but the target is 4195 an ARM instruction. If we were not making a stub, 4196 the BL would have been converted to a BLX. Use the 4197 BLX stub instead in that case. */ 4198 if (htab->use_blx && force_target_arm 4199 && stub_type == arm_stub_a8_veneer_bl) 4200 { 4201 stub_type = arm_stub_a8_veneer_blx; 4202 is_blx = TRUE; 4203 is_bl = FALSE; 4204 } 4205 /* Conversely, if the original instruction was 4206 BLX but the target is Thumb mode, use the BL 4207 stub. */ 4208 else if (force_target_thumb 4209 && stub_type == arm_stub_a8_veneer_blx) 4210 { 4211 stub_type = arm_stub_a8_veneer_bl; 4212 is_blx = FALSE; 4213 is_bl = TRUE; 4214 } 4215 4216 if (is_blx) 4217 pc_for_insn &= ~ ((bfd_vma) 3); 4218 4219 /* If we found a relocation, use the proper destination, 4220 not the offset in the (unrelocated) instruction. 4221 Note this is always done if we switched the stub type 4222 above. */ 4223 if (found) 4224 offset = 4225 (bfd_signed_vma) (found->destination - pc_for_insn); 4226 4227 /* If the stub will use a Thumb-mode branch to a 4228 PLT target, redirect it to the preceding Thumb 4229 entry point. */ 4230 if (stub_type != arm_stub_a8_veneer_blx && use_plt) 4231 offset -= PLT_THUMB_STUB_SIZE; 4232 4233 target = pc_for_insn + offset; 4234 4235 /* The BLX stub is ARM-mode code. Adjust the offset to 4236 take the different PC value (+8 instead of +4) into 4237 account. */ 4238 if (stub_type == arm_stub_a8_veneer_blx) 4239 offset += 4; 4240 4241 if (((base_vma + i) & ~0xfff) == (target & ~0xfff)) 4242 { 4243 char *stub_name = NULL; 4244 4245 if (num_a8_fixes == a8_fix_table_size) 4246 { 4247 a8_fix_table_size *= 2; 4248 a8_fixes = (struct a8_erratum_fix *) 4249 bfd_realloc (a8_fixes, 4250 sizeof (struct a8_erratum_fix) 4251 * a8_fix_table_size); 4252 } 4253 4254 if (num_a8_fixes < prev_num_a8_fixes) 4255 { 4256 /* If we're doing a subsequent scan, 4257 check if we've found the same fix as 4258 before, and try and reuse the stub 4259 name. */ 4260 stub_name = a8_fixes[num_a8_fixes].stub_name; 4261 if ((a8_fixes[num_a8_fixes].section != section) 4262 || (a8_fixes[num_a8_fixes].offset != i)) 4263 { 4264 free (stub_name); 4265 stub_name = NULL; 4266 *stub_changed_p = TRUE; 4267 } 4268 } 4269 4270 if (!stub_name) 4271 { 4272 stub_name = (char *) bfd_malloc (8 + 1 + 8 + 1); 4273 if (stub_name != NULL) 4274 sprintf (stub_name, "%x:%x", section->id, i); 4275 } 4276 4277 a8_fixes[num_a8_fixes].input_bfd = input_bfd; 4278 a8_fixes[num_a8_fixes].section = section; 4279 a8_fixes[num_a8_fixes].offset = i; 4280 a8_fixes[num_a8_fixes].addend = offset; 4281 a8_fixes[num_a8_fixes].orig_insn = insn; 4282 a8_fixes[num_a8_fixes].stub_name = stub_name; 4283 a8_fixes[num_a8_fixes].stub_type = stub_type; 4284 a8_fixes[num_a8_fixes].st_type = 4285 is_blx ? STT_FUNC : STT_ARM_TFUNC; 4286 4287 num_a8_fixes++; 4288 } 4289 } 4290 } 4291 4292 i += insn_32bit ? 4 : 2; 4293 last_was_32bit = insn_32bit; 4294 last_was_branch = is_32bit_branch; 4295 } 4296 } 4297 4298 if (elf_section_data (section)->this_hdr.contents == NULL) 4299 free (contents); 4300 } 4301 4302 *a8_fixes_p = a8_fixes; 4303 *num_a8_fixes_p = num_a8_fixes; 4304 *a8_fix_table_size_p = a8_fix_table_size; 4305 4306 return FALSE; 4307 } 4308 4309 /* Determine and set the size of the stub section for a final link. 4310 4311 The basic idea here is to examine all the relocations looking for 4312 PC-relative calls to a target that is unreachable with a "bl" 4313 instruction. */ 4314 4315 bfd_boolean 4316 elf32_arm_size_stubs (bfd *output_bfd, 4317 bfd *stub_bfd, 4318 struct bfd_link_info *info, 4319 bfd_signed_vma group_size, 4320 asection * (*add_stub_section) (const char *, asection *), 4321 void (*layout_sections_again) (void)) 4322 { 4323 bfd_size_type stub_group_size; 4324 bfd_boolean stubs_always_after_branch; 4325 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); 4326 struct a8_erratum_fix *a8_fixes = NULL; 4327 unsigned int num_a8_fixes = 0, a8_fix_table_size = 10; 4328 struct a8_erratum_reloc *a8_relocs = NULL; 4329 unsigned int num_a8_relocs = 0, a8_reloc_table_size = 10, i; 4330 4331 if (htab == NULL) 4332 return FALSE; 4333 4334 if (htab->fix_cortex_a8) 4335 { 4336 a8_fixes = (struct a8_erratum_fix *) 4337 bfd_zmalloc (sizeof (struct a8_erratum_fix) * a8_fix_table_size); 4338 a8_relocs = (struct a8_erratum_reloc *) 4339 bfd_zmalloc (sizeof (struct a8_erratum_reloc) * a8_reloc_table_size); 4340 } 4341 4342 /* Propagate mach to stub bfd, because it may not have been 4343 finalized when we created stub_bfd. */ 4344 bfd_set_arch_mach (stub_bfd, bfd_get_arch (output_bfd), 4345 bfd_get_mach (output_bfd)); 4346 4347 /* Stash our params away. */ 4348 htab->stub_bfd = stub_bfd; 4349 htab->add_stub_section = add_stub_section; 4350 htab->layout_sections_again = layout_sections_again; 4351 stubs_always_after_branch = group_size < 0; 4352 4353 /* The Cortex-A8 erratum fix depends on stubs not being in the same 4K page 4354 as the first half of a 32-bit branch straddling two 4K pages. This is a 4355 crude way of enforcing that. */ 4356 if (htab->fix_cortex_a8) 4357 stubs_always_after_branch = 1; 4358 4359 if (group_size < 0) 4360 stub_group_size = -group_size; 4361 else 4362 stub_group_size = group_size; 4363 4364 if (stub_group_size == 1) 4365 { 4366 /* Default values. */ 4367 /* Thumb branch range is +-4MB has to be used as the default 4368 maximum size (a given section can contain both ARM and Thumb 4369 code, so the worst case has to be taken into account). 4370 4371 This value is 24K less than that, which allows for 2025 4372 12-byte stubs. If we exceed that, then we will fail to link. 4373 The user will have to relink with an explicit group size 4374 option. */ 4375 stub_group_size = 4170000; 4376 } 4377 4378 group_sections (htab, stub_group_size, stubs_always_after_branch); 4379 4380 /* If we're applying the cortex A8 fix, we need to determine the 4381 program header size now, because we cannot change it later -- 4382 that could alter section placements. Notice the A8 erratum fix 4383 ends up requiring the section addresses to remain unchanged 4384 modulo the page size. That's something we cannot represent 4385 inside BFD, and we don't want to force the section alignment to 4386 be the page size. */ 4387 if (htab->fix_cortex_a8) 4388 (*htab->layout_sections_again) (); 4389 4390 while (1) 4391 { 4392 bfd *input_bfd; 4393 unsigned int bfd_indx; 4394 asection *stub_sec; 4395 bfd_boolean stub_changed = FALSE; 4396 unsigned prev_num_a8_fixes = num_a8_fixes; 4397 4398 num_a8_fixes = 0; 4399 for (input_bfd = info->input_bfds, bfd_indx = 0; 4400 input_bfd != NULL; 4401 input_bfd = input_bfd->link_next, bfd_indx++) 4402 { 4403 Elf_Internal_Shdr *symtab_hdr; 4404 asection *section; 4405 Elf_Internal_Sym *local_syms = NULL; 4406 4407 num_a8_relocs = 0; 4408 4409 /* We'll need the symbol table in a second. */ 4410 symtab_hdr = &elf_tdata (input_bfd)->symtab_hdr; 4411 if (symtab_hdr->sh_info == 0) 4412 continue; 4413 4414 /* Walk over each section attached to the input bfd. */ 4415 for (section = input_bfd->sections; 4416 section != NULL; 4417 section = section->next) 4418 { 4419 Elf_Internal_Rela *internal_relocs, *irelaend, *irela; 4420 4421 /* If there aren't any relocs, then there's nothing more 4422 to do. */ 4423 if ((section->flags & SEC_RELOC) == 0 4424 || section->reloc_count == 0 4425 || (section->flags & SEC_CODE) == 0) 4426 continue; 4427 4428 /* If this section is a link-once section that will be 4429 discarded, then don't create any stubs. */ 4430 if (section->output_section == NULL 4431 || section->output_section->owner != output_bfd) 4432 continue; 4433 4434 /* Get the relocs. */ 4435 internal_relocs 4436 = _bfd_elf_link_read_relocs (input_bfd, section, NULL, 4437 NULL, info->keep_memory); 4438 if (internal_relocs == NULL) 4439 goto error_ret_free_local; 4440 4441 /* Now examine each relocation. */ 4442 irela = internal_relocs; 4443 irelaend = irela + section->reloc_count; 4444 for (; irela < irelaend; irela++) 4445 { 4446 unsigned int r_type, r_indx; 4447 enum elf32_arm_stub_type stub_type; 4448 struct elf32_arm_stub_hash_entry *stub_entry; 4449 asection *sym_sec; 4450 bfd_vma sym_value; 4451 bfd_vma destination; 4452 struct elf32_arm_link_hash_entry *hash; 4453 const char *sym_name; 4454 char *stub_name; 4455 const asection *id_sec; 4456 int st_type; 4457 bfd_boolean created_stub = FALSE; 4458 4459 r_type = ELF32_R_TYPE (irela->r_info); 4460 r_indx = ELF32_R_SYM (irela->r_info); 4461 4462 if (r_type >= (unsigned int) R_ARM_max) 4463 { 4464 bfd_set_error (bfd_error_bad_value); 4465 error_ret_free_internal: 4466 if (elf_section_data (section)->relocs == NULL) 4467 free (internal_relocs); 4468 goto error_ret_free_local; 4469 } 4470 4471 /* Only look for stubs on branch instructions. */ 4472 if ((r_type != (unsigned int) R_ARM_CALL) 4473 && (r_type != (unsigned int) R_ARM_THM_CALL) 4474 && (r_type != (unsigned int) R_ARM_JUMP24) 4475 && (r_type != (unsigned int) R_ARM_THM_JUMP19) 4476 && (r_type != (unsigned int) R_ARM_THM_XPC22) 4477 && (r_type != (unsigned int) R_ARM_THM_JUMP24) 4478 && (r_type != (unsigned int) R_ARM_PLT32)) 4479 continue; 4480 4481 /* Now determine the call target, its name, value, 4482 section. */ 4483 sym_sec = NULL; 4484 sym_value = 0; 4485 destination = 0; 4486 hash = NULL; 4487 sym_name = NULL; 4488 if (r_indx < symtab_hdr->sh_info) 4489 { 4490 /* It's a local symbol. */ 4491 Elf_Internal_Sym *sym; 4492 4493 if (local_syms == NULL) 4494 { 4495 local_syms 4496 = (Elf_Internal_Sym *) symtab_hdr->contents; 4497 if (local_syms == NULL) 4498 local_syms 4499 = bfd_elf_get_elf_syms (input_bfd, symtab_hdr, 4500 symtab_hdr->sh_info, 0, 4501 NULL, NULL, NULL); 4502 if (local_syms == NULL) 4503 goto error_ret_free_internal; 4504 } 4505 4506 sym = local_syms + r_indx; 4507 if (sym->st_shndx == SHN_UNDEF) 4508 sym_sec = bfd_und_section_ptr; 4509 else if (sym->st_shndx == SHN_ABS) 4510 sym_sec = bfd_abs_section_ptr; 4511 else if (sym->st_shndx == SHN_COMMON) 4512 sym_sec = bfd_com_section_ptr; 4513 else 4514 sym_sec = 4515 bfd_section_from_elf_index (input_bfd, sym->st_shndx); 4516 4517 if (!sym_sec) 4518 /* This is an undefined symbol. It can never 4519 be resolved. */ 4520 continue; 4521 4522 if (ELF_ST_TYPE (sym->st_info) != STT_SECTION) 4523 sym_value = sym->st_value; 4524 destination = (sym_value + irela->r_addend 4525 + sym_sec->output_offset 4526 + sym_sec->output_section->vma); 4527 st_type = ELF_ST_TYPE (sym->st_info); 4528 sym_name 4529 = bfd_elf_string_from_elf_section (input_bfd, 4530 symtab_hdr->sh_link, 4531 sym->st_name); 4532 } 4533 else 4534 { 4535 /* It's an external symbol. */ 4536 int e_indx; 4537 4538 e_indx = r_indx - symtab_hdr->sh_info; 4539 hash = ((struct elf32_arm_link_hash_entry *) 4540 elf_sym_hashes (input_bfd)[e_indx]); 4541 4542 while (hash->root.root.type == bfd_link_hash_indirect 4543 || hash->root.root.type == bfd_link_hash_warning) 4544 hash = ((struct elf32_arm_link_hash_entry *) 4545 hash->root.root.u.i.link); 4546 4547 if (hash->root.root.type == bfd_link_hash_defined 4548 || hash->root.root.type == bfd_link_hash_defweak) 4549 { 4550 sym_sec = hash->root.root.u.def.section; 4551 sym_value = hash->root.root.u.def.value; 4552 4553 struct elf32_arm_link_hash_table *globals = 4554 elf32_arm_hash_table (info); 4555 4556 /* For a destination in a shared library, 4557 use the PLT stub as target address to 4558 decide whether a branch stub is 4559 needed. */ 4560 if (globals != NULL 4561 && globals->splt != NULL 4562 && hash != NULL 4563 && hash->root.plt.offset != (bfd_vma) -1) 4564 { 4565 sym_sec = globals->splt; 4566 sym_value = hash->root.plt.offset; 4567 if (sym_sec->output_section != NULL) 4568 destination = (sym_value 4569 + sym_sec->output_offset 4570 + sym_sec->output_section->vma); 4571 } 4572 else if (sym_sec->output_section != NULL) 4573 destination = (sym_value + irela->r_addend 4574 + sym_sec->output_offset 4575 + sym_sec->output_section->vma); 4576 } 4577 else if ((hash->root.root.type == bfd_link_hash_undefined) 4578 || (hash->root.root.type == bfd_link_hash_undefweak)) 4579 { 4580 /* For a shared library, use the PLT stub as 4581 target address to decide whether a long 4582 branch stub is needed. 4583 For absolute code, they cannot be handled. */ 4584 struct elf32_arm_link_hash_table *globals = 4585 elf32_arm_hash_table (info); 4586 4587 if (globals != NULL 4588 && globals->splt != NULL 4589 && hash != NULL 4590 && hash->root.plt.offset != (bfd_vma) -1) 4591 { 4592 sym_sec = globals->splt; 4593 sym_value = hash->root.plt.offset; 4594 if (sym_sec->output_section != NULL) 4595 destination = (sym_value 4596 + sym_sec->output_offset 4597 + sym_sec->output_section->vma); 4598 } 4599 else 4600 continue; 4601 } 4602 else 4603 { 4604 bfd_set_error (bfd_error_bad_value); 4605 goto error_ret_free_internal; 4606 } 4607 st_type = ELF_ST_TYPE (hash->root.type); 4608 sym_name = hash->root.root.root.string; 4609 } 4610 4611 do 4612 { 4613 /* Determine what (if any) linker stub is needed. */ 4614 stub_type = arm_type_of_stub (info, section, irela, 4615 &st_type, hash, 4616 destination, sym_sec, 4617 input_bfd, sym_name); 4618 if (stub_type == arm_stub_none) 4619 break; 4620 4621 /* Support for grouping stub sections. */ 4622 id_sec = htab->stub_group[section->id].link_sec; 4623 4624 /* Get the name of this stub. */ 4625 stub_name = elf32_arm_stub_name (id_sec, sym_sec, hash, 4626 irela, stub_type); 4627 if (!stub_name) 4628 goto error_ret_free_internal; 4629 4630 /* We've either created a stub for this reloc already, 4631 or we are about to. */ 4632 created_stub = TRUE; 4633 4634 stub_entry = arm_stub_hash_lookup 4635 (&htab->stub_hash_table, stub_name, 4636 FALSE, FALSE); 4637 if (stub_entry != NULL) 4638 { 4639 /* The proper stub has already been created. */ 4640 free (stub_name); 4641 stub_entry->target_value = sym_value; 4642 break; 4643 } 4644 4645 stub_entry = elf32_arm_add_stub (stub_name, section, 4646 htab); 4647 if (stub_entry == NULL) 4648 { 4649 free (stub_name); 4650 goto error_ret_free_internal; 4651 } 4652 4653 stub_entry->target_value = sym_value; 4654 stub_entry->target_section = sym_sec; 4655 stub_entry->stub_type = stub_type; 4656 stub_entry->h = hash; 4657 stub_entry->st_type = st_type; 4658 4659 if (sym_name == NULL) 4660 sym_name = "unnamed"; 4661 stub_entry->output_name = (char *) 4662 bfd_alloc (htab->stub_bfd, 4663 sizeof (THUMB2ARM_GLUE_ENTRY_NAME) 4664 + strlen (sym_name)); 4665 if (stub_entry->output_name == NULL) 4666 { 4667 free (stub_name); 4668 goto error_ret_free_internal; 4669 } 4670 4671 /* For historical reasons, use the existing names for 4672 ARM-to-Thumb and Thumb-to-ARM stubs. */ 4673 if ( ((r_type == (unsigned int) R_ARM_THM_CALL) 4674 || (r_type == (unsigned int) R_ARM_THM_JUMP24)) 4675 && st_type != STT_ARM_TFUNC) 4676 sprintf (stub_entry->output_name, 4677 THUMB2ARM_GLUE_ENTRY_NAME, sym_name); 4678 else if ( ((r_type == (unsigned int) R_ARM_CALL) 4679 || (r_type == (unsigned int) R_ARM_JUMP24)) 4680 && st_type == STT_ARM_TFUNC) 4681 sprintf (stub_entry->output_name, 4682 ARM2THUMB_GLUE_ENTRY_NAME, sym_name); 4683 else 4684 sprintf (stub_entry->output_name, STUB_ENTRY_NAME, 4685 sym_name); 4686 4687 stub_changed = TRUE; 4688 } 4689 while (0); 4690 4691 /* Look for relocations which might trigger Cortex-A8 4692 erratum. */ 4693 if (htab->fix_cortex_a8 4694 && (r_type == (unsigned int) R_ARM_THM_JUMP24 4695 || r_type == (unsigned int) R_ARM_THM_JUMP19 4696 || r_type == (unsigned int) R_ARM_THM_CALL 4697 || r_type == (unsigned int) R_ARM_THM_XPC22)) 4698 { 4699 bfd_vma from = section->output_section->vma 4700 + section->output_offset 4701 + irela->r_offset; 4702 4703 if ((from & 0xfff) == 0xffe) 4704 { 4705 /* Found a candidate. Note we haven't checked the 4706 destination is within 4K here: if we do so (and 4707 don't create an entry in a8_relocs) we can't tell 4708 that a branch should have been relocated when 4709 scanning later. */ 4710 if (num_a8_relocs == a8_reloc_table_size) 4711 { 4712 a8_reloc_table_size *= 2; 4713 a8_relocs = (struct a8_erratum_reloc *) 4714 bfd_realloc (a8_relocs, 4715 sizeof (struct a8_erratum_reloc) 4716 * a8_reloc_table_size); 4717 } 4718 4719 a8_relocs[num_a8_relocs].from = from; 4720 a8_relocs[num_a8_relocs].destination = destination; 4721 a8_relocs[num_a8_relocs].r_type = r_type; 4722 a8_relocs[num_a8_relocs].st_type = st_type; 4723 a8_relocs[num_a8_relocs].sym_name = sym_name; 4724 a8_relocs[num_a8_relocs].non_a8_stub = created_stub; 4725 a8_relocs[num_a8_relocs].hash = hash; 4726 4727 num_a8_relocs++; 4728 } 4729 } 4730 } 4731 4732 /* We're done with the internal relocs, free them. */ 4733 if (elf_section_data (section)->relocs == NULL) 4734 free (internal_relocs); 4735 } 4736 4737 if (htab->fix_cortex_a8) 4738 { 4739 /* Sort relocs which might apply to Cortex-A8 erratum. */ 4740 qsort (a8_relocs, num_a8_relocs, 4741 sizeof (struct a8_erratum_reloc), 4742 &a8_reloc_compare); 4743 4744 /* Scan for branches which might trigger Cortex-A8 erratum. */ 4745 if (cortex_a8_erratum_scan (input_bfd, info, &a8_fixes, 4746 &num_a8_fixes, &a8_fix_table_size, 4747 a8_relocs, num_a8_relocs, 4748 prev_num_a8_fixes, &stub_changed) 4749 != 0) 4750 goto error_ret_free_local; 4751 } 4752 } 4753 4754 if (prev_num_a8_fixes != num_a8_fixes) 4755 stub_changed = TRUE; 4756 4757 if (!stub_changed) 4758 break; 4759 4760 /* OK, we've added some stubs. Find out the new size of the 4761 stub sections. */ 4762 for (stub_sec = htab->stub_bfd->sections; 4763 stub_sec != NULL; 4764 stub_sec = stub_sec->next) 4765 { 4766 /* Ignore non-stub sections. */ 4767 if (!strstr (stub_sec->name, STUB_SUFFIX)) 4768 continue; 4769 4770 stub_sec->size = 0; 4771 } 4772 4773 bfd_hash_traverse (&htab->stub_hash_table, arm_size_one_stub, htab); 4774 4775 /* Add Cortex-A8 erratum veneers to stub section sizes too. */ 4776 if (htab->fix_cortex_a8) 4777 for (i = 0; i < num_a8_fixes; i++) 4778 { 4779 stub_sec = elf32_arm_create_or_find_stub_sec (NULL, 4780 a8_fixes[i].section, htab); 4781 4782 if (stub_sec == NULL) 4783 goto error_ret_free_local; 4784 4785 stub_sec->size 4786 += find_stub_size_and_template (a8_fixes[i].stub_type, NULL, 4787 NULL); 4788 } 4789 4790 4791 /* Ask the linker to do its stuff. */ 4792 (*htab->layout_sections_again) (); 4793 } 4794 4795 /* Add stubs for Cortex-A8 erratum fixes now. */ 4796 if (htab->fix_cortex_a8) 4797 { 4798 for (i = 0; i < num_a8_fixes; i++) 4799 { 4800 struct elf32_arm_stub_hash_entry *stub_entry; 4801 char *stub_name = a8_fixes[i].stub_name; 4802 asection *section = a8_fixes[i].section; 4803 unsigned int section_id = a8_fixes[i].section->id; 4804 asection *link_sec = htab->stub_group[section_id].link_sec; 4805 asection *stub_sec = htab->stub_group[section_id].stub_sec; 4806 const insn_sequence *template_sequence; 4807 int template_size, size = 0; 4808 4809 stub_entry = arm_stub_hash_lookup (&htab->stub_hash_table, stub_name, 4810 TRUE, FALSE); 4811 if (stub_entry == NULL) 4812 { 4813 (*_bfd_error_handler) (_("%s: cannot create stub entry %s"), 4814 section->owner, 4815 stub_name); 4816 return FALSE; 4817 } 4818 4819 stub_entry->stub_sec = stub_sec; 4820 stub_entry->stub_offset = 0; 4821 stub_entry->id_sec = link_sec; 4822 stub_entry->stub_type = a8_fixes[i].stub_type; 4823 stub_entry->target_section = a8_fixes[i].section; 4824 stub_entry->target_value = a8_fixes[i].offset; 4825 stub_entry->target_addend = a8_fixes[i].addend; 4826 stub_entry->orig_insn = a8_fixes[i].orig_insn; 4827 stub_entry->st_type = a8_fixes[i].st_type; 4828 4829 size = find_stub_size_and_template (a8_fixes[i].stub_type, 4830 &template_sequence, 4831 &template_size); 4832 4833 stub_entry->stub_size = size; 4834 stub_entry->stub_template = template_sequence; 4835 stub_entry->stub_template_size = template_size; 4836 } 4837 4838 /* Stash the Cortex-A8 erratum fix array for use later in 4839 elf32_arm_write_section(). */ 4840 htab->a8_erratum_fixes = a8_fixes; 4841 htab->num_a8_erratum_fixes = num_a8_fixes; 4842 } 4843 else 4844 { 4845 htab->a8_erratum_fixes = NULL; 4846 htab->num_a8_erratum_fixes = 0; 4847 } 4848 return TRUE; 4849 4850 error_ret_free_local: 4851 return FALSE; 4852 } 4853 4854 /* Build all the stubs associated with the current output file. The 4855 stubs are kept in a hash table attached to the main linker hash 4856 table. We also set up the .plt entries for statically linked PIC 4857 functions here. This function is called via arm_elf_finish in the 4858 linker. */ 4859 4860 bfd_boolean 4861 elf32_arm_build_stubs (struct bfd_link_info *info) 4862 { 4863 asection *stub_sec; 4864 struct bfd_hash_table *table; 4865 struct elf32_arm_link_hash_table *htab; 4866 4867 htab = elf32_arm_hash_table (info); 4868 if (htab == NULL) 4869 return FALSE; 4870 4871 for (stub_sec = htab->stub_bfd->sections; 4872 stub_sec != NULL; 4873 stub_sec = stub_sec->next) 4874 { 4875 bfd_size_type size; 4876 4877 /* Ignore non-stub sections. */ 4878 if (!strstr (stub_sec->name, STUB_SUFFIX)) 4879 continue; 4880 4881 /* Allocate memory to hold the linker stubs. */ 4882 size = stub_sec->size; 4883 stub_sec->contents = (unsigned char *) bfd_zalloc (htab->stub_bfd, size); 4884 if (stub_sec->contents == NULL && size != 0) 4885 return FALSE; 4886 stub_sec->size = 0; 4887 } 4888 4889 /* Build the stubs as directed by the stub hash table. */ 4890 table = &htab->stub_hash_table; 4891 bfd_hash_traverse (table, arm_build_one_stub, info); 4892 if (htab->fix_cortex_a8) 4893 { 4894 /* Place the cortex a8 stubs last. */ 4895 htab->fix_cortex_a8 = -1; 4896 bfd_hash_traverse (table, arm_build_one_stub, info); 4897 } 4898 4899 return TRUE; 4900 } 4901 4902 /* Locate the Thumb encoded calling stub for NAME. */ 4903 4904 static struct elf_link_hash_entry * 4905 find_thumb_glue (struct bfd_link_info *link_info, 4906 const char *name, 4907 char **error_message) 4908 { 4909 char *tmp_name; 4910 struct elf_link_hash_entry *hash; 4911 struct elf32_arm_link_hash_table *hash_table; 4912 4913 /* We need a pointer to the armelf specific hash table. */ 4914 hash_table = elf32_arm_hash_table (link_info); 4915 if (hash_table == NULL) 4916 return NULL; 4917 4918 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) 4919 + strlen (THUMB2ARM_GLUE_ENTRY_NAME) + 1); 4920 4921 BFD_ASSERT (tmp_name); 4922 4923 sprintf (tmp_name, THUMB2ARM_GLUE_ENTRY_NAME, name); 4924 4925 hash = elf_link_hash_lookup 4926 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); 4927 4928 if (hash == NULL 4929 && asprintf (error_message, _("unable to find THUMB glue '%s' for '%s'"), 4930 tmp_name, name) == -1) 4931 *error_message = (char *) bfd_errmsg (bfd_error_system_call); 4932 4933 free (tmp_name); 4934 4935 return hash; 4936 } 4937 4938 /* Locate the ARM encoded calling stub for NAME. */ 4939 4940 static struct elf_link_hash_entry * 4941 find_arm_glue (struct bfd_link_info *link_info, 4942 const char *name, 4943 char **error_message) 4944 { 4945 char *tmp_name; 4946 struct elf_link_hash_entry *myh; 4947 struct elf32_arm_link_hash_table *hash_table; 4948 4949 /* We need a pointer to the elfarm specific hash table. */ 4950 hash_table = elf32_arm_hash_table (link_info); 4951 if (hash_table == NULL) 4952 return NULL; 4953 4954 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) 4955 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); 4956 4957 BFD_ASSERT (tmp_name); 4958 4959 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 4960 4961 myh = elf_link_hash_lookup 4962 (&(hash_table)->root, tmp_name, FALSE, FALSE, TRUE); 4963 4964 if (myh == NULL 4965 && asprintf (error_message, _("unable to find ARM glue '%s' for '%s'"), 4966 tmp_name, name) == -1) 4967 *error_message = (char *) bfd_errmsg (bfd_error_system_call); 4968 4969 free (tmp_name); 4970 4971 return myh; 4972 } 4973 4974 /* ARM->Thumb glue (static images): 4975 4976 .arm 4977 __func_from_arm: 4978 ldr r12, __func_addr 4979 bx r12 4980 __func_addr: 4981 .word func @ behave as if you saw a ARM_32 reloc. 4982 4983 (v5t static images) 4984 .arm 4985 __func_from_arm: 4986 ldr pc, __func_addr 4987 __func_addr: 4988 .word func @ behave as if you saw a ARM_32 reloc. 4989 4990 (relocatable images) 4991 .arm 4992 __func_from_arm: 4993 ldr r12, __func_offset 4994 add r12, r12, pc 4995 bx r12 4996 __func_offset: 4997 .word func - . */ 4998 4999 #define ARM2THUMB_STATIC_GLUE_SIZE 12 5000 static const insn32 a2t1_ldr_insn = 0xe59fc000; 5001 static const insn32 a2t2_bx_r12_insn = 0xe12fff1c; 5002 static const insn32 a2t3_func_addr_insn = 0x00000001; 5003 5004 #define ARM2THUMB_V5_STATIC_GLUE_SIZE 8 5005 static const insn32 a2t1v5_ldr_insn = 0xe51ff004; 5006 static const insn32 a2t2v5_func_addr_insn = 0x00000001; 5007 5008 #define ARM2THUMB_PIC_GLUE_SIZE 16 5009 static const insn32 a2t1p_ldr_insn = 0xe59fc004; 5010 static const insn32 a2t2p_add_pc_insn = 0xe08cc00f; 5011 static const insn32 a2t3p_bx_r12_insn = 0xe12fff1c; 5012 5013 /* Thumb->ARM: Thumb->(non-interworking aware) ARM 5014 5015 .thumb .thumb 5016 .align 2 .align 2 5017 __func_from_thumb: __func_from_thumb: 5018 bx pc push {r6, lr} 5019 nop ldr r6, __func_addr 5020 .arm mov lr, pc 5021 b func bx r6 5022 .arm 5023 ;; back_to_thumb 5024 ldmia r13! {r6, lr} 5025 bx lr 5026 __func_addr: 5027 .word func */ 5028 5029 #define THUMB2ARM_GLUE_SIZE 8 5030 static const insn16 t2a1_bx_pc_insn = 0x4778; 5031 static const insn16 t2a2_noop_insn = 0x46c0; 5032 static const insn32 t2a3_b_insn = 0xea000000; 5033 5034 #define VFP11_ERRATUM_VENEER_SIZE 8 5035 5036 #define ARM_BX_VENEER_SIZE 12 5037 static const insn32 armbx1_tst_insn = 0xe3100001; 5038 static const insn32 armbx2_moveq_insn = 0x01a0f000; 5039 static const insn32 armbx3_bx_insn = 0xe12fff10; 5040 5041 #ifndef ELFARM_NABI_C_INCLUDED 5042 static void 5043 arm_allocate_glue_section_space (bfd * abfd, bfd_size_type size, const char * name) 5044 { 5045 asection * s; 5046 bfd_byte * contents; 5047 5048 if (size == 0) 5049 { 5050 /* Do not include empty glue sections in the output. */ 5051 if (abfd != NULL) 5052 { 5053 s = bfd_get_section_by_name (abfd, name); 5054 if (s != NULL) 5055 s->flags |= SEC_EXCLUDE; 5056 } 5057 return; 5058 } 5059 5060 BFD_ASSERT (abfd != NULL); 5061 5062 s = bfd_get_section_by_name (abfd, name); 5063 BFD_ASSERT (s != NULL); 5064 5065 contents = (bfd_byte *) bfd_alloc (abfd, size); 5066 5067 BFD_ASSERT (s->size == size); 5068 s->contents = contents; 5069 } 5070 5071 bfd_boolean 5072 bfd_elf32_arm_allocate_interworking_sections (struct bfd_link_info * info) 5073 { 5074 struct elf32_arm_link_hash_table * globals; 5075 5076 globals = elf32_arm_hash_table (info); 5077 BFD_ASSERT (globals != NULL); 5078 5079 arm_allocate_glue_section_space (globals->bfd_of_glue_owner, 5080 globals->arm_glue_size, 5081 ARM2THUMB_GLUE_SECTION_NAME); 5082 5083 arm_allocate_glue_section_space (globals->bfd_of_glue_owner, 5084 globals->thumb_glue_size, 5085 THUMB2ARM_GLUE_SECTION_NAME); 5086 5087 arm_allocate_glue_section_space (globals->bfd_of_glue_owner, 5088 globals->vfp11_erratum_glue_size, 5089 VFP11_ERRATUM_VENEER_SECTION_NAME); 5090 5091 arm_allocate_glue_section_space (globals->bfd_of_glue_owner, 5092 globals->bx_glue_size, 5093 ARM_BX_GLUE_SECTION_NAME); 5094 5095 return TRUE; 5096 } 5097 5098 /* Allocate space and symbols for calling a Thumb function from Arm mode. 5099 returns the symbol identifying the stub. */ 5100 5101 static struct elf_link_hash_entry * 5102 record_arm_to_thumb_glue (struct bfd_link_info * link_info, 5103 struct elf_link_hash_entry * h) 5104 { 5105 const char * name = h->root.root.string; 5106 asection * s; 5107 char * tmp_name; 5108 struct elf_link_hash_entry * myh; 5109 struct bfd_link_hash_entry * bh; 5110 struct elf32_arm_link_hash_table * globals; 5111 bfd_vma val; 5112 bfd_size_type size; 5113 5114 globals = elf32_arm_hash_table (link_info); 5115 BFD_ASSERT (globals != NULL); 5116 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 5117 5118 s = bfd_get_section_by_name 5119 (globals->bfd_of_glue_owner, ARM2THUMB_GLUE_SECTION_NAME); 5120 5121 BFD_ASSERT (s != NULL); 5122 5123 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen (name) 5124 + strlen (ARM2THUMB_GLUE_ENTRY_NAME) + 1); 5125 5126 BFD_ASSERT (tmp_name); 5127 5128 sprintf (tmp_name, ARM2THUMB_GLUE_ENTRY_NAME, name); 5129 5130 myh = elf_link_hash_lookup 5131 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); 5132 5133 if (myh != NULL) 5134 { 5135 /* We've already seen this guy. */ 5136 free (tmp_name); 5137 return myh; 5138 } 5139 5140 /* The only trick here is using hash_table->arm_glue_size as the value. 5141 Even though the section isn't allocated yet, this is where we will be 5142 putting it. The +1 on the value marks that the stub has not been 5143 output yet - not that it is a Thumb function. */ 5144 bh = NULL; 5145 val = globals->arm_glue_size + 1; 5146 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, 5147 tmp_name, BSF_GLOBAL, s, val, 5148 NULL, TRUE, FALSE, &bh); 5149 5150 myh = (struct elf_link_hash_entry *) bh; 5151 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); 5152 myh->forced_local = 1; 5153 5154 free (tmp_name); 5155 5156 if (link_info->shared || globals->root.is_relocatable_executable 5157 || globals->pic_veneer) 5158 size = ARM2THUMB_PIC_GLUE_SIZE; 5159 else if (globals->use_blx) 5160 size = ARM2THUMB_V5_STATIC_GLUE_SIZE; 5161 else 5162 size = ARM2THUMB_STATIC_GLUE_SIZE; 5163 5164 s->size += size; 5165 globals->arm_glue_size += size; 5166 5167 return myh; 5168 } 5169 5170 /* Allocate space for ARMv4 BX veneers. */ 5171 5172 static void 5173 record_arm_bx_glue (struct bfd_link_info * link_info, int reg) 5174 { 5175 asection * s; 5176 struct elf32_arm_link_hash_table *globals; 5177 char *tmp_name; 5178 struct elf_link_hash_entry *myh; 5179 struct bfd_link_hash_entry *bh; 5180 bfd_vma val; 5181 5182 /* BX PC does not need a veneer. */ 5183 if (reg == 15) 5184 return; 5185 5186 globals = elf32_arm_hash_table (link_info); 5187 BFD_ASSERT (globals != NULL); 5188 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 5189 5190 /* Check if this veneer has already been allocated. */ 5191 if (globals->bx_glue_offset[reg]) 5192 return; 5193 5194 s = bfd_get_section_by_name 5195 (globals->bfd_of_glue_owner, ARM_BX_GLUE_SECTION_NAME); 5196 5197 BFD_ASSERT (s != NULL); 5198 5199 /* Add symbol for veneer. */ 5200 tmp_name = (char *) 5201 bfd_malloc ((bfd_size_type) strlen (ARM_BX_GLUE_ENTRY_NAME) + 1); 5202 5203 BFD_ASSERT (tmp_name); 5204 5205 sprintf (tmp_name, ARM_BX_GLUE_ENTRY_NAME, reg); 5206 5207 myh = elf_link_hash_lookup 5208 (&(globals)->root, tmp_name, FALSE, FALSE, FALSE); 5209 5210 BFD_ASSERT (myh == NULL); 5211 5212 bh = NULL; 5213 val = globals->bx_glue_size; 5214 _bfd_generic_link_add_one_symbol (link_info, globals->bfd_of_glue_owner, 5215 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, 5216 NULL, TRUE, FALSE, &bh); 5217 5218 myh = (struct elf_link_hash_entry *) bh; 5219 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); 5220 myh->forced_local = 1; 5221 5222 s->size += ARM_BX_VENEER_SIZE; 5223 globals->bx_glue_offset[reg] = globals->bx_glue_size | 2; 5224 globals->bx_glue_size += ARM_BX_VENEER_SIZE; 5225 } 5226 5227 5228 /* Add an entry to the code/data map for section SEC. */ 5229 5230 static void 5231 elf32_arm_section_map_add (asection *sec, char type, bfd_vma vma) 5232 { 5233 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); 5234 unsigned int newidx; 5235 5236 if (sec_data->map == NULL) 5237 { 5238 sec_data->map = (elf32_arm_section_map *) 5239 bfd_malloc (sizeof (elf32_arm_section_map)); 5240 sec_data->mapcount = 0; 5241 sec_data->mapsize = 1; 5242 } 5243 5244 newidx = sec_data->mapcount++; 5245 5246 if (sec_data->mapcount > sec_data->mapsize) 5247 { 5248 sec_data->mapsize *= 2; 5249 sec_data->map = (elf32_arm_section_map *) 5250 bfd_realloc_or_free (sec_data->map, sec_data->mapsize 5251 * sizeof (elf32_arm_section_map)); 5252 } 5253 5254 if (sec_data->map) 5255 { 5256 sec_data->map[newidx].vma = vma; 5257 sec_data->map[newidx].type = type; 5258 } 5259 } 5260 5261 5262 /* Record information about a VFP11 denorm-erratum veneer. Only ARM-mode 5263 veneers are handled for now. */ 5264 5265 static bfd_vma 5266 record_vfp11_erratum_veneer (struct bfd_link_info *link_info, 5267 elf32_vfp11_erratum_list *branch, 5268 bfd *branch_bfd, 5269 asection *branch_sec, 5270 unsigned int offset) 5271 { 5272 asection *s; 5273 struct elf32_arm_link_hash_table *hash_table; 5274 char *tmp_name; 5275 struct elf_link_hash_entry *myh; 5276 struct bfd_link_hash_entry *bh; 5277 bfd_vma val; 5278 struct _arm_elf_section_data *sec_data; 5279 elf32_vfp11_erratum_list *newerr; 5280 5281 hash_table = elf32_arm_hash_table (link_info); 5282 BFD_ASSERT (hash_table != NULL); 5283 BFD_ASSERT (hash_table->bfd_of_glue_owner != NULL); 5284 5285 s = bfd_get_section_by_name 5286 (hash_table->bfd_of_glue_owner, VFP11_ERRATUM_VENEER_SECTION_NAME); 5287 5288 sec_data = elf32_arm_section_data (s); 5289 5290 BFD_ASSERT (s != NULL); 5291 5292 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen 5293 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); 5294 5295 BFD_ASSERT (tmp_name); 5296 5297 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, 5298 hash_table->num_vfp11_fixes); 5299 5300 myh = elf_link_hash_lookup 5301 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); 5302 5303 BFD_ASSERT (myh == NULL); 5304 5305 bh = NULL; 5306 val = hash_table->vfp11_erratum_glue_size; 5307 _bfd_generic_link_add_one_symbol (link_info, hash_table->bfd_of_glue_owner, 5308 tmp_name, BSF_FUNCTION | BSF_LOCAL, s, val, 5309 NULL, TRUE, FALSE, &bh); 5310 5311 myh = (struct elf_link_hash_entry *) bh; 5312 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); 5313 myh->forced_local = 1; 5314 5315 /* Link veneer back to calling location. */ 5316 sec_data->erratumcount += 1; 5317 newerr = (elf32_vfp11_erratum_list *) 5318 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); 5319 5320 newerr->type = VFP11_ERRATUM_ARM_VENEER; 5321 newerr->vma = -1; 5322 newerr->u.v.branch = branch; 5323 newerr->u.v.id = hash_table->num_vfp11_fixes; 5324 branch->u.b.veneer = newerr; 5325 5326 newerr->next = sec_data->erratumlist; 5327 sec_data->erratumlist = newerr; 5328 5329 /* A symbol for the return from the veneer. */ 5330 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", 5331 hash_table->num_vfp11_fixes); 5332 5333 myh = elf_link_hash_lookup 5334 (&(hash_table)->root, tmp_name, FALSE, FALSE, FALSE); 5335 5336 if (myh != NULL) 5337 abort (); 5338 5339 bh = NULL; 5340 val = offset + 4; 5341 _bfd_generic_link_add_one_symbol (link_info, branch_bfd, tmp_name, BSF_LOCAL, 5342 branch_sec, val, NULL, TRUE, FALSE, &bh); 5343 5344 myh = (struct elf_link_hash_entry *) bh; 5345 myh->type = ELF_ST_INFO (STB_LOCAL, STT_FUNC); 5346 myh->forced_local = 1; 5347 5348 free (tmp_name); 5349 5350 /* Generate a mapping symbol for the veneer section, and explicitly add an 5351 entry for that symbol to the code/data map for the section. */ 5352 if (hash_table->vfp11_erratum_glue_size == 0) 5353 { 5354 bh = NULL; 5355 /* FIXME: Creates an ARM symbol. Thumb mode will need attention if it 5356 ever requires this erratum fix. */ 5357 _bfd_generic_link_add_one_symbol (link_info, 5358 hash_table->bfd_of_glue_owner, "$a", 5359 BSF_LOCAL, s, 0, NULL, 5360 TRUE, FALSE, &bh); 5361 5362 myh = (struct elf_link_hash_entry *) bh; 5363 myh->type = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); 5364 myh->forced_local = 1; 5365 5366 /* The elf32_arm_init_maps function only cares about symbols from input 5367 BFDs. We must make a note of this generated mapping symbol 5368 ourselves so that code byteswapping works properly in 5369 elf32_arm_write_section. */ 5370 elf32_arm_section_map_add (s, 'a', 0); 5371 } 5372 5373 s->size += VFP11_ERRATUM_VENEER_SIZE; 5374 hash_table->vfp11_erratum_glue_size += VFP11_ERRATUM_VENEER_SIZE; 5375 hash_table->num_vfp11_fixes++; 5376 5377 /* The offset of the veneer. */ 5378 return val; 5379 } 5380 5381 #define ARM_GLUE_SECTION_FLAGS \ 5382 (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_CODE \ 5383 | SEC_READONLY | SEC_LINKER_CREATED) 5384 5385 /* Create a fake section for use by the ARM backend of the linker. */ 5386 5387 static bfd_boolean 5388 arm_make_glue_section (bfd * abfd, const char * name) 5389 { 5390 asection * sec; 5391 5392 sec = bfd_get_section_by_name (abfd, name); 5393 if (sec != NULL) 5394 /* Already made. */ 5395 return TRUE; 5396 5397 sec = bfd_make_section_with_flags (abfd, name, ARM_GLUE_SECTION_FLAGS); 5398 5399 if (sec == NULL 5400 || !bfd_set_section_alignment (abfd, sec, 2)) 5401 return FALSE; 5402 5403 /* Set the gc mark to prevent the section from being removed by garbage 5404 collection, despite the fact that no relocs refer to this section. */ 5405 sec->gc_mark = 1; 5406 5407 return TRUE; 5408 } 5409 5410 /* Add the glue sections to ABFD. This function is called from the 5411 linker scripts in ld/emultempl/{armelf}.em. */ 5412 5413 bfd_boolean 5414 bfd_elf32_arm_add_glue_sections_to_bfd (bfd *abfd, 5415 struct bfd_link_info *info) 5416 { 5417 /* If we are only performing a partial 5418 link do not bother adding the glue. */ 5419 if (info->relocatable) 5420 return TRUE; 5421 5422 return arm_make_glue_section (abfd, ARM2THUMB_GLUE_SECTION_NAME) 5423 && arm_make_glue_section (abfd, THUMB2ARM_GLUE_SECTION_NAME) 5424 && arm_make_glue_section (abfd, VFP11_ERRATUM_VENEER_SECTION_NAME) 5425 && arm_make_glue_section (abfd, ARM_BX_GLUE_SECTION_NAME); 5426 } 5427 5428 /* Select a BFD to be used to hold the sections used by the glue code. 5429 This function is called from the linker scripts in ld/emultempl/ 5430 {armelf/pe}.em. */ 5431 5432 bfd_boolean 5433 bfd_elf32_arm_get_bfd_for_interworking (bfd *abfd, struct bfd_link_info *info) 5434 { 5435 struct elf32_arm_link_hash_table *globals; 5436 5437 /* If we are only performing a partial link 5438 do not bother getting a bfd to hold the glue. */ 5439 if (info->relocatable) 5440 return TRUE; 5441 5442 /* Make sure we don't attach the glue sections to a dynamic object. */ 5443 BFD_ASSERT (!(abfd->flags & DYNAMIC)); 5444 5445 globals = elf32_arm_hash_table (info); 5446 BFD_ASSERT (globals != NULL); 5447 5448 if (globals->bfd_of_glue_owner != NULL) 5449 return TRUE; 5450 5451 /* Save the bfd for later use. */ 5452 globals->bfd_of_glue_owner = abfd; 5453 5454 return TRUE; 5455 } 5456 5457 static void 5458 check_use_blx (struct elf32_arm_link_hash_table *globals) 5459 { 5460 if (bfd_elf_get_obj_attr_int (globals->obfd, OBJ_ATTR_PROC, 5461 Tag_CPU_arch) > 2) 5462 globals->use_blx = 1; 5463 } 5464 5465 bfd_boolean 5466 bfd_elf32_arm_process_before_allocation (bfd *abfd, 5467 struct bfd_link_info *link_info) 5468 { 5469 Elf_Internal_Shdr *symtab_hdr; 5470 Elf_Internal_Rela *internal_relocs = NULL; 5471 Elf_Internal_Rela *irel, *irelend; 5472 bfd_byte *contents = NULL; 5473 5474 asection *sec; 5475 struct elf32_arm_link_hash_table *globals; 5476 5477 /* If we are only performing a partial link do not bother 5478 to construct any glue. */ 5479 if (link_info->relocatable) 5480 return TRUE; 5481 5482 /* Here we have a bfd that is to be included on the link. We have a 5483 hook to do reloc rummaging, before section sizes are nailed down. */ 5484 globals = elf32_arm_hash_table (link_info); 5485 BFD_ASSERT (globals != NULL); 5486 5487 check_use_blx (globals); 5488 5489 if (globals->byteswap_code && !bfd_big_endian (abfd)) 5490 { 5491 _bfd_error_handler (_("%B: BE8 images only valid in big-endian mode."), 5492 abfd); 5493 return FALSE; 5494 } 5495 5496 /* PR 5398: If we have not decided to include any loadable sections in 5497 the output then we will not have a glue owner bfd. This is OK, it 5498 just means that there is nothing else for us to do here. */ 5499 if (globals->bfd_of_glue_owner == NULL) 5500 return TRUE; 5501 5502 /* Rummage around all the relocs and map the glue vectors. */ 5503 sec = abfd->sections; 5504 5505 if (sec == NULL) 5506 return TRUE; 5507 5508 for (; sec != NULL; sec = sec->next) 5509 { 5510 if (sec->reloc_count == 0) 5511 continue; 5512 5513 if ((sec->flags & SEC_EXCLUDE) != 0) 5514 continue; 5515 5516 symtab_hdr = & elf_symtab_hdr (abfd); 5517 5518 /* Load the relocs. */ 5519 internal_relocs 5520 = _bfd_elf_link_read_relocs (abfd, sec, NULL, NULL, FALSE); 5521 5522 if (internal_relocs == NULL) 5523 goto error_return; 5524 5525 irelend = internal_relocs + sec->reloc_count; 5526 for (irel = internal_relocs; irel < irelend; irel++) 5527 { 5528 long r_type; 5529 unsigned long r_index; 5530 5531 struct elf_link_hash_entry *h; 5532 5533 r_type = ELF32_R_TYPE (irel->r_info); 5534 r_index = ELF32_R_SYM (irel->r_info); 5535 5536 /* These are the only relocation types we care about. */ 5537 if ( r_type != R_ARM_PC24 5538 && (r_type != R_ARM_V4BX || globals->fix_v4bx < 2)) 5539 continue; 5540 5541 /* Get the section contents if we haven't done so already. */ 5542 if (contents == NULL) 5543 { 5544 /* Get cached copy if it exists. */ 5545 if (elf_section_data (sec)->this_hdr.contents != NULL) 5546 contents = elf_section_data (sec)->this_hdr.contents; 5547 else 5548 { 5549 /* Go get them off disk. */ 5550 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 5551 goto error_return; 5552 } 5553 } 5554 5555 if (r_type == R_ARM_V4BX) 5556 { 5557 int reg; 5558 5559 reg = bfd_get_32 (abfd, contents + irel->r_offset) & 0xf; 5560 record_arm_bx_glue (link_info, reg); 5561 continue; 5562 } 5563 5564 /* If the relocation is not against a symbol it cannot concern us. */ 5565 h = NULL; 5566 5567 /* We don't care about local symbols. */ 5568 if (r_index < symtab_hdr->sh_info) 5569 continue; 5570 5571 /* This is an external symbol. */ 5572 r_index -= symtab_hdr->sh_info; 5573 h = (struct elf_link_hash_entry *) 5574 elf_sym_hashes (abfd)[r_index]; 5575 5576 /* If the relocation is against a static symbol it must be within 5577 the current section and so cannot be a cross ARM/Thumb relocation. */ 5578 if (h == NULL) 5579 continue; 5580 5581 /* If the call will go through a PLT entry then we do not need 5582 glue. */ 5583 if (globals->splt != NULL && h->plt.offset != (bfd_vma) -1) 5584 continue; 5585 5586 switch (r_type) 5587 { 5588 case R_ARM_PC24: 5589 /* This one is a call from arm code. We need to look up 5590 the target of the call. If it is a thumb target, we 5591 insert glue. */ 5592 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC) 5593 record_arm_to_thumb_glue (link_info, h); 5594 break; 5595 5596 default: 5597 abort (); 5598 } 5599 } 5600 5601 if (contents != NULL 5602 && elf_section_data (sec)->this_hdr.contents != contents) 5603 free (contents); 5604 contents = NULL; 5605 5606 if (internal_relocs != NULL 5607 && elf_section_data (sec)->relocs != internal_relocs) 5608 free (internal_relocs); 5609 internal_relocs = NULL; 5610 } 5611 5612 return TRUE; 5613 5614 error_return: 5615 if (contents != NULL 5616 && elf_section_data (sec)->this_hdr.contents != contents) 5617 free (contents); 5618 if (internal_relocs != NULL 5619 && elf_section_data (sec)->relocs != internal_relocs) 5620 free (internal_relocs); 5621 5622 return FALSE; 5623 } 5624 #endif 5625 5626 5627 /* Initialise maps of ARM/Thumb/data for input BFDs. */ 5628 5629 void 5630 bfd_elf32_arm_init_maps (bfd *abfd) 5631 { 5632 Elf_Internal_Sym *isymbuf; 5633 Elf_Internal_Shdr *hdr; 5634 unsigned int i, localsyms; 5635 5636 /* PR 7093: Make sure that we are dealing with an arm elf binary. */ 5637 if (! is_arm_elf (abfd)) 5638 return; 5639 5640 if ((abfd->flags & DYNAMIC) != 0) 5641 return; 5642 5643 hdr = & elf_symtab_hdr (abfd); 5644 localsyms = hdr->sh_info; 5645 5646 /* Obtain a buffer full of symbols for this BFD. The hdr->sh_info field 5647 should contain the number of local symbols, which should come before any 5648 global symbols. Mapping symbols are always local. */ 5649 isymbuf = bfd_elf_get_elf_syms (abfd, hdr, localsyms, 0, NULL, NULL, 5650 NULL); 5651 5652 /* No internal symbols read? Skip this BFD. */ 5653 if (isymbuf == NULL) 5654 return; 5655 5656 for (i = 0; i < localsyms; i++) 5657 { 5658 Elf_Internal_Sym *isym = &isymbuf[i]; 5659 asection *sec = bfd_section_from_elf_index (abfd, isym->st_shndx); 5660 const char *name; 5661 5662 if (sec != NULL 5663 && ELF_ST_BIND (isym->st_info) == STB_LOCAL) 5664 { 5665 name = bfd_elf_string_from_elf_section (abfd, 5666 hdr->sh_link, isym->st_name); 5667 5668 if (bfd_is_arm_special_symbol_name (name, 5669 BFD_ARM_SPECIAL_SYM_TYPE_MAP)) 5670 elf32_arm_section_map_add (sec, name[1], isym->st_value); 5671 } 5672 } 5673 } 5674 5675 5676 /* Auto-select enabling of Cortex-A8 erratum fix if the user didn't explicitly 5677 say what they wanted. */ 5678 5679 void 5680 bfd_elf32_arm_set_cortex_a8_fix (bfd *obfd, struct bfd_link_info *link_info) 5681 { 5682 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); 5683 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); 5684 5685 if (globals == NULL) 5686 return; 5687 5688 if (globals->fix_cortex_a8 == -1) 5689 { 5690 /* Turn on Cortex-A8 erratum workaround for ARMv7-A. */ 5691 if (out_attr[Tag_CPU_arch].i == TAG_CPU_ARCH_V7 5692 && (out_attr[Tag_CPU_arch_profile].i == 'A' 5693 || out_attr[Tag_CPU_arch_profile].i == 0)) 5694 globals->fix_cortex_a8 = 1; 5695 else 5696 globals->fix_cortex_a8 = 0; 5697 } 5698 } 5699 5700 5701 void 5702 bfd_elf32_arm_set_vfp11_fix (bfd *obfd, struct bfd_link_info *link_info) 5703 { 5704 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); 5705 obj_attribute *out_attr = elf_known_obj_attributes_proc (obfd); 5706 5707 if (globals == NULL) 5708 return; 5709 /* We assume that ARMv7+ does not need the VFP11 denorm erratum fix. */ 5710 if (out_attr[Tag_CPU_arch].i >= TAG_CPU_ARCH_V7) 5711 { 5712 switch (globals->vfp11_fix) 5713 { 5714 case BFD_ARM_VFP11_FIX_DEFAULT: 5715 case BFD_ARM_VFP11_FIX_NONE: 5716 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; 5717 break; 5718 5719 default: 5720 /* Give a warning, but do as the user requests anyway. */ 5721 (*_bfd_error_handler) (_("%B: warning: selected VFP11 erratum " 5722 "workaround is not necessary for target architecture"), obfd); 5723 } 5724 } 5725 else if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_DEFAULT) 5726 /* For earlier architectures, we might need the workaround, but do not 5727 enable it by default. If users is running with broken hardware, they 5728 must enable the erratum fix explicitly. */ 5729 globals->vfp11_fix = BFD_ARM_VFP11_FIX_NONE; 5730 } 5731 5732 5733 enum bfd_arm_vfp11_pipe 5734 { 5735 VFP11_FMAC, 5736 VFP11_LS, 5737 VFP11_DS, 5738 VFP11_BAD 5739 }; 5740 5741 /* Return a VFP register number. This is encoded as RX:X for single-precision 5742 registers, or X:RX for double-precision registers, where RX is the group of 5743 four bits in the instruction encoding and X is the single extension bit. 5744 RX and X fields are specified using their lowest (starting) bit. The return 5745 value is: 5746 5747 0...31: single-precision registers s0...s31 5748 32...63: double-precision registers d0...d31. 5749 5750 Although X should be zero for VFP11 (encoding d0...d15 only), we might 5751 encounter VFP3 instructions, so we allow the full range for DP registers. */ 5752 5753 static unsigned int 5754 bfd_arm_vfp11_regno (unsigned int insn, bfd_boolean is_double, unsigned int rx, 5755 unsigned int x) 5756 { 5757 if (is_double) 5758 return (((insn >> rx) & 0xf) | (((insn >> x) & 1) << 4)) + 32; 5759 else 5760 return (((insn >> rx) & 0xf) << 1) | ((insn >> x) & 1); 5761 } 5762 5763 /* Set bits in *WMASK according to a register number REG as encoded by 5764 bfd_arm_vfp11_regno(). Ignore d16-d31. */ 5765 5766 static void 5767 bfd_arm_vfp11_write_mask (unsigned int *wmask, unsigned int reg) 5768 { 5769 if (reg < 32) 5770 *wmask |= 1 << reg; 5771 else if (reg < 48) 5772 *wmask |= 3 << ((reg - 32) * 2); 5773 } 5774 5775 /* Return TRUE if WMASK overwrites anything in REGS. */ 5776 5777 static bfd_boolean 5778 bfd_arm_vfp11_antidependency (unsigned int wmask, int *regs, int numregs) 5779 { 5780 int i; 5781 5782 for (i = 0; i < numregs; i++) 5783 { 5784 unsigned int reg = regs[i]; 5785 5786 if (reg < 32 && (wmask & (1 << reg)) != 0) 5787 return TRUE; 5788 5789 reg -= 32; 5790 5791 if (reg >= 16) 5792 continue; 5793 5794 if ((wmask & (3 << (reg * 2))) != 0) 5795 return TRUE; 5796 } 5797 5798 return FALSE; 5799 } 5800 5801 /* In this function, we're interested in two things: finding input registers 5802 for VFP data-processing instructions, and finding the set of registers which 5803 arbitrary VFP instructions may write to. We use a 32-bit unsigned int to 5804 hold the written set, so FLDM etc. are easy to deal with (we're only 5805 interested in 32 SP registers or 16 dp registers, due to the VFP version 5806 implemented by the chip in question). DP registers are marked by setting 5807 both SP registers in the write mask). */ 5808 5809 static enum bfd_arm_vfp11_pipe 5810 bfd_arm_vfp11_insn_decode (unsigned int insn, unsigned int *destmask, int *regs, 5811 int *numregs) 5812 { 5813 enum bfd_arm_vfp11_pipe vpipe = VFP11_BAD; 5814 bfd_boolean is_double = ((insn & 0xf00) == 0xb00) ? 1 : 0; 5815 5816 if ((insn & 0x0f000e10) == 0x0e000a00) /* A data-processing insn. */ 5817 { 5818 unsigned int pqrs; 5819 unsigned int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); 5820 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); 5821 5822 pqrs = ((insn & 0x00800000) >> 20) 5823 | ((insn & 0x00300000) >> 19) 5824 | ((insn & 0x00000040) >> 6); 5825 5826 switch (pqrs) 5827 { 5828 case 0: /* fmac[sd]. */ 5829 case 1: /* fnmac[sd]. */ 5830 case 2: /* fmsc[sd]. */ 5831 case 3: /* fnmsc[sd]. */ 5832 vpipe = VFP11_FMAC; 5833 bfd_arm_vfp11_write_mask (destmask, fd); 5834 regs[0] = fd; 5835 regs[1] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ 5836 regs[2] = fm; 5837 *numregs = 3; 5838 break; 5839 5840 case 4: /* fmul[sd]. */ 5841 case 5: /* fnmul[sd]. */ 5842 case 6: /* fadd[sd]. */ 5843 case 7: /* fsub[sd]. */ 5844 vpipe = VFP11_FMAC; 5845 goto vfp_binop; 5846 5847 case 8: /* fdiv[sd]. */ 5848 vpipe = VFP11_DS; 5849 vfp_binop: 5850 bfd_arm_vfp11_write_mask (destmask, fd); 5851 regs[0] = bfd_arm_vfp11_regno (insn, is_double, 16, 7); /* Fn. */ 5852 regs[1] = fm; 5853 *numregs = 2; 5854 break; 5855 5856 case 15: /* extended opcode. */ 5857 { 5858 unsigned int extn = ((insn >> 15) & 0x1e) 5859 | ((insn >> 7) & 1); 5860 5861 switch (extn) 5862 { 5863 case 0: /* fcpy[sd]. */ 5864 case 1: /* fabs[sd]. */ 5865 case 2: /* fneg[sd]. */ 5866 case 8: /* fcmp[sd]. */ 5867 case 9: /* fcmpe[sd]. */ 5868 case 10: /* fcmpz[sd]. */ 5869 case 11: /* fcmpez[sd]. */ 5870 case 16: /* fuito[sd]. */ 5871 case 17: /* fsito[sd]. */ 5872 case 24: /* ftoui[sd]. */ 5873 case 25: /* ftouiz[sd]. */ 5874 case 26: /* ftosi[sd]. */ 5875 case 27: /* ftosiz[sd]. */ 5876 /* These instructions will not bounce due to underflow. */ 5877 *numregs = 0; 5878 vpipe = VFP11_FMAC; 5879 break; 5880 5881 case 3: /* fsqrt[sd]. */ 5882 /* fsqrt cannot underflow, but it can (perhaps) overwrite 5883 registers to cause the erratum in previous instructions. */ 5884 bfd_arm_vfp11_write_mask (destmask, fd); 5885 vpipe = VFP11_DS; 5886 break; 5887 5888 case 15: /* fcvt{ds,sd}. */ 5889 { 5890 int rnum = 0; 5891 5892 bfd_arm_vfp11_write_mask (destmask, fd); 5893 5894 /* Only FCVTSD can underflow. */ 5895 if ((insn & 0x100) != 0) 5896 regs[rnum++] = fm; 5897 5898 *numregs = rnum; 5899 5900 vpipe = VFP11_FMAC; 5901 } 5902 break; 5903 5904 default: 5905 return VFP11_BAD; 5906 } 5907 } 5908 break; 5909 5910 default: 5911 return VFP11_BAD; 5912 } 5913 } 5914 /* Two-register transfer. */ 5915 else if ((insn & 0x0fe00ed0) == 0x0c400a10) 5916 { 5917 unsigned int fm = bfd_arm_vfp11_regno (insn, is_double, 0, 5); 5918 5919 if ((insn & 0x100000) == 0) 5920 { 5921 if (is_double) 5922 bfd_arm_vfp11_write_mask (destmask, fm); 5923 else 5924 { 5925 bfd_arm_vfp11_write_mask (destmask, fm); 5926 bfd_arm_vfp11_write_mask (destmask, fm + 1); 5927 } 5928 } 5929 5930 vpipe = VFP11_LS; 5931 } 5932 else if ((insn & 0x0e100e00) == 0x0c100a00) /* A load insn. */ 5933 { 5934 int fd = bfd_arm_vfp11_regno (insn, is_double, 12, 22); 5935 unsigned int puw = ((insn >> 21) & 0x1) | (((insn >> 23) & 3) << 1); 5936 5937 switch (puw) 5938 { 5939 case 0: /* Two-reg transfer. We should catch these above. */ 5940 abort (); 5941 5942 case 2: /* fldm[sdx]. */ 5943 case 3: 5944 case 5: 5945 { 5946 unsigned int i, offset = insn & 0xff; 5947 5948 if (is_double) 5949 offset >>= 1; 5950 5951 for (i = fd; i < fd + offset; i++) 5952 bfd_arm_vfp11_write_mask (destmask, i); 5953 } 5954 break; 5955 5956 case 4: /* fld[sd]. */ 5957 case 6: 5958 bfd_arm_vfp11_write_mask (destmask, fd); 5959 break; 5960 5961 default: 5962 return VFP11_BAD; 5963 } 5964 5965 vpipe = VFP11_LS; 5966 } 5967 /* Single-register transfer. Note L==0. */ 5968 else if ((insn & 0x0f100e10) == 0x0e000a10) 5969 { 5970 unsigned int opcode = (insn >> 21) & 7; 5971 unsigned int fn = bfd_arm_vfp11_regno (insn, is_double, 16, 7); 5972 5973 switch (opcode) 5974 { 5975 case 0: /* fmsr/fmdlr. */ 5976 case 1: /* fmdhr. */ 5977 /* Mark fmdhr and fmdlr as writing to the whole of the DP 5978 destination register. I don't know if this is exactly right, 5979 but it is the conservative choice. */ 5980 bfd_arm_vfp11_write_mask (destmask, fn); 5981 break; 5982 5983 case 7: /* fmxr. */ 5984 break; 5985 } 5986 5987 vpipe = VFP11_LS; 5988 } 5989 5990 return vpipe; 5991 } 5992 5993 5994 static int elf32_arm_compare_mapping (const void * a, const void * b); 5995 5996 5997 /* Look for potentially-troublesome code sequences which might trigger the 5998 VFP11 denormal/antidependency erratum. See, e.g., the ARM1136 errata sheet 5999 (available from ARM) for details of the erratum. A short version is 6000 described in ld.texinfo. */ 6001 6002 bfd_boolean 6003 bfd_elf32_arm_vfp11_erratum_scan (bfd *abfd, struct bfd_link_info *link_info) 6004 { 6005 asection *sec; 6006 bfd_byte *contents = NULL; 6007 int state = 0; 6008 int regs[3], numregs = 0; 6009 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); 6010 int use_vector = (globals->vfp11_fix == BFD_ARM_VFP11_FIX_VECTOR); 6011 6012 if (globals == NULL) 6013 return FALSE; 6014 6015 /* We use a simple FSM to match troublesome VFP11 instruction sequences. 6016 The states transition as follows: 6017 6018 0 -> 1 (vector) or 0 -> 2 (scalar) 6019 A VFP FMAC-pipeline instruction has been seen. Fill 6020 regs[0]..regs[numregs-1] with its input operands. Remember this 6021 instruction in 'first_fmac'. 6022 6023 1 -> 2 6024 Any instruction, except for a VFP instruction which overwrites 6025 regs[*]. 6026 6027 1 -> 3 [ -> 0 ] or 6028 2 -> 3 [ -> 0 ] 6029 A VFP instruction has been seen which overwrites any of regs[*]. 6030 We must make a veneer! Reset state to 0 before examining next 6031 instruction. 6032 6033 2 -> 0 6034 If we fail to match anything in state 2, reset to state 0 and reset 6035 the instruction pointer to the instruction after 'first_fmac'. 6036 6037 If the VFP11 vector mode is in use, there must be at least two unrelated 6038 instructions between anti-dependent VFP11 instructions to properly avoid 6039 triggering the erratum, hence the use of the extra state 1. */ 6040 6041 /* If we are only performing a partial link do not bother 6042 to construct any glue. */ 6043 if (link_info->relocatable) 6044 return TRUE; 6045 6046 /* Skip if this bfd does not correspond to an ELF image. */ 6047 if (! is_arm_elf (abfd)) 6048 return TRUE; 6049 6050 /* We should have chosen a fix type by the time we get here. */ 6051 BFD_ASSERT (globals->vfp11_fix != BFD_ARM_VFP11_FIX_DEFAULT); 6052 6053 if (globals->vfp11_fix == BFD_ARM_VFP11_FIX_NONE) 6054 return TRUE; 6055 6056 /* Skip this BFD if it corresponds to an executable or dynamic object. */ 6057 if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0) 6058 return TRUE; 6059 6060 for (sec = abfd->sections; sec != NULL; sec = sec->next) 6061 { 6062 unsigned int i, span, first_fmac = 0, veneer_of_insn = 0; 6063 struct _arm_elf_section_data *sec_data; 6064 6065 /* If we don't have executable progbits, we're not interested in this 6066 section. Also skip if section is to be excluded. */ 6067 if (elf_section_type (sec) != SHT_PROGBITS 6068 || (elf_section_flags (sec) & SHF_EXECINSTR) == 0 6069 || (sec->flags & SEC_EXCLUDE) != 0 6070 || sec->sec_info_type == ELF_INFO_TYPE_JUST_SYMS 6071 || sec->output_section == bfd_abs_section_ptr 6072 || strcmp (sec->name, VFP11_ERRATUM_VENEER_SECTION_NAME) == 0) 6073 continue; 6074 6075 sec_data = elf32_arm_section_data (sec); 6076 6077 if (sec_data->mapcount == 0) 6078 continue; 6079 6080 if (elf_section_data (sec)->this_hdr.contents != NULL) 6081 contents = elf_section_data (sec)->this_hdr.contents; 6082 else if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 6083 goto error_return; 6084 6085 qsort (sec_data->map, sec_data->mapcount, sizeof (elf32_arm_section_map), 6086 elf32_arm_compare_mapping); 6087 6088 for (span = 0; span < sec_data->mapcount; span++) 6089 { 6090 unsigned int span_start = sec_data->map[span].vma; 6091 unsigned int span_end = (span == sec_data->mapcount - 1) 6092 ? sec->size : sec_data->map[span + 1].vma; 6093 char span_type = sec_data->map[span].type; 6094 6095 /* FIXME: Only ARM mode is supported at present. We may need to 6096 support Thumb-2 mode also at some point. */ 6097 if (span_type != 'a') 6098 continue; 6099 6100 for (i = span_start; i < span_end;) 6101 { 6102 unsigned int next_i = i + 4; 6103 unsigned int insn = bfd_big_endian (abfd) 6104 ? (contents[i] << 24) 6105 | (contents[i + 1] << 16) 6106 | (contents[i + 2] << 8) 6107 | contents[i + 3] 6108 : (contents[i + 3] << 24) 6109 | (contents[i + 2] << 16) 6110 | (contents[i + 1] << 8) 6111 | contents[i]; 6112 unsigned int writemask = 0; 6113 enum bfd_arm_vfp11_pipe vpipe; 6114 6115 switch (state) 6116 { 6117 case 0: 6118 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, regs, 6119 &numregs); 6120 /* I'm assuming the VFP11 erratum can trigger with denorm 6121 operands on either the FMAC or the DS pipeline. This might 6122 lead to slightly overenthusiastic veneer insertion. */ 6123 if (vpipe == VFP11_FMAC || vpipe == VFP11_DS) 6124 { 6125 state = use_vector ? 1 : 2; 6126 first_fmac = i; 6127 veneer_of_insn = insn; 6128 } 6129 break; 6130 6131 case 1: 6132 { 6133 int other_regs[3], other_numregs; 6134 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, 6135 other_regs, 6136 &other_numregs); 6137 if (vpipe != VFP11_BAD 6138 && bfd_arm_vfp11_antidependency (writemask, regs, 6139 numregs)) 6140 state = 3; 6141 else 6142 state = 2; 6143 } 6144 break; 6145 6146 case 2: 6147 { 6148 int other_regs[3], other_numregs; 6149 vpipe = bfd_arm_vfp11_insn_decode (insn, &writemask, 6150 other_regs, 6151 &other_numregs); 6152 if (vpipe != VFP11_BAD 6153 && bfd_arm_vfp11_antidependency (writemask, regs, 6154 numregs)) 6155 state = 3; 6156 else 6157 { 6158 state = 0; 6159 next_i = first_fmac + 4; 6160 } 6161 } 6162 break; 6163 6164 case 3: 6165 abort (); /* Should be unreachable. */ 6166 } 6167 6168 if (state == 3) 6169 { 6170 elf32_vfp11_erratum_list *newerr =(elf32_vfp11_erratum_list *) 6171 bfd_zmalloc (sizeof (elf32_vfp11_erratum_list)); 6172 6173 elf32_arm_section_data (sec)->erratumcount += 1; 6174 6175 newerr->u.b.vfp_insn = veneer_of_insn; 6176 6177 switch (span_type) 6178 { 6179 case 'a': 6180 newerr->type = VFP11_ERRATUM_BRANCH_TO_ARM_VENEER; 6181 break; 6182 6183 default: 6184 abort (); 6185 } 6186 6187 record_vfp11_erratum_veneer (link_info, newerr, abfd, sec, 6188 first_fmac); 6189 6190 newerr->vma = -1; 6191 6192 newerr->next = sec_data->erratumlist; 6193 sec_data->erratumlist = newerr; 6194 6195 state = 0; 6196 } 6197 6198 i = next_i; 6199 } 6200 } 6201 6202 if (contents != NULL 6203 && elf_section_data (sec)->this_hdr.contents != contents) 6204 free (contents); 6205 contents = NULL; 6206 } 6207 6208 return TRUE; 6209 6210 error_return: 6211 if (contents != NULL 6212 && elf_section_data (sec)->this_hdr.contents != contents) 6213 free (contents); 6214 6215 return FALSE; 6216 } 6217 6218 /* Find virtual-memory addresses for VFP11 erratum veneers and return locations 6219 after sections have been laid out, using specially-named symbols. */ 6220 6221 void 6222 bfd_elf32_arm_vfp11_fix_veneer_locations (bfd *abfd, 6223 struct bfd_link_info *link_info) 6224 { 6225 asection *sec; 6226 struct elf32_arm_link_hash_table *globals; 6227 char *tmp_name; 6228 6229 if (link_info->relocatable) 6230 return; 6231 6232 /* Skip if this bfd does not correspond to an ELF image. */ 6233 if (! is_arm_elf (abfd)) 6234 return; 6235 6236 globals = elf32_arm_hash_table (link_info); 6237 if (globals == NULL) 6238 return; 6239 6240 tmp_name = (char *) bfd_malloc ((bfd_size_type) strlen 6241 (VFP11_ERRATUM_VENEER_ENTRY_NAME) + 10); 6242 6243 for (sec = abfd->sections; sec != NULL; sec = sec->next) 6244 { 6245 struct _arm_elf_section_data *sec_data = elf32_arm_section_data (sec); 6246 elf32_vfp11_erratum_list *errnode = sec_data->erratumlist; 6247 6248 for (; errnode != NULL; errnode = errnode->next) 6249 { 6250 struct elf_link_hash_entry *myh; 6251 bfd_vma vma; 6252 6253 switch (errnode->type) 6254 { 6255 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: 6256 case VFP11_ERRATUM_BRANCH_TO_THUMB_VENEER: 6257 /* Find veneer symbol. */ 6258 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME, 6259 errnode->u.b.veneer->u.v.id); 6260 6261 myh = elf_link_hash_lookup 6262 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); 6263 6264 if (myh == NULL) 6265 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " 6266 "`%s'"), abfd, tmp_name); 6267 6268 vma = myh->root.u.def.section->output_section->vma 6269 + myh->root.u.def.section->output_offset 6270 + myh->root.u.def.value; 6271 6272 errnode->u.b.veneer->vma = vma; 6273 break; 6274 6275 case VFP11_ERRATUM_ARM_VENEER: 6276 case VFP11_ERRATUM_THUMB_VENEER: 6277 /* Find return location. */ 6278 sprintf (tmp_name, VFP11_ERRATUM_VENEER_ENTRY_NAME "_r", 6279 errnode->u.v.id); 6280 6281 myh = elf_link_hash_lookup 6282 (&(globals)->root, tmp_name, FALSE, FALSE, TRUE); 6283 6284 if (myh == NULL) 6285 (*_bfd_error_handler) (_("%B: unable to find VFP11 veneer " 6286 "`%s'"), abfd, tmp_name); 6287 6288 vma = myh->root.u.def.section->output_section->vma 6289 + myh->root.u.def.section->output_offset 6290 + myh->root.u.def.value; 6291 6292 errnode->u.v.branch->vma = vma; 6293 break; 6294 6295 default: 6296 abort (); 6297 } 6298 } 6299 } 6300 6301 free (tmp_name); 6302 } 6303 6304 6305 /* Set target relocation values needed during linking. */ 6306 6307 void 6308 bfd_elf32_arm_set_target_relocs (struct bfd *output_bfd, 6309 struct bfd_link_info *link_info, 6310 int target1_is_rel, 6311 char * target2_type, 6312 int fix_v4bx, 6313 int use_blx, 6314 bfd_arm_vfp11_fix vfp11_fix, 6315 int no_enum_warn, int no_wchar_warn, 6316 int pic_veneer, int fix_cortex_a8) 6317 { 6318 struct elf32_arm_link_hash_table *globals; 6319 6320 globals = elf32_arm_hash_table (link_info); 6321 if (globals == NULL) 6322 return; 6323 6324 globals->target1_is_rel = target1_is_rel; 6325 if (strcmp (target2_type, "rel") == 0) 6326 globals->target2_reloc = R_ARM_REL32; 6327 else if (strcmp (target2_type, "abs") == 0) 6328 globals->target2_reloc = R_ARM_ABS32; 6329 else if (strcmp (target2_type, "got-rel") == 0) 6330 globals->target2_reloc = R_ARM_GOT_PREL; 6331 else 6332 { 6333 _bfd_error_handler (_("Invalid TARGET2 relocation type '%s'."), 6334 target2_type); 6335 } 6336 globals->fix_v4bx = fix_v4bx; 6337 globals->use_blx |= use_blx; 6338 globals->vfp11_fix = vfp11_fix; 6339 globals->pic_veneer = pic_veneer; 6340 globals->fix_cortex_a8 = fix_cortex_a8; 6341 6342 BFD_ASSERT (is_arm_elf (output_bfd)); 6343 elf_arm_tdata (output_bfd)->no_enum_size_warning = no_enum_warn; 6344 elf_arm_tdata (output_bfd)->no_wchar_size_warning = no_wchar_warn; 6345 } 6346 6347 /* Replace the target offset of a Thumb bl or b.w instruction. */ 6348 6349 static void 6350 insert_thumb_branch (bfd *abfd, long int offset, bfd_byte *insn) 6351 { 6352 bfd_vma upper; 6353 bfd_vma lower; 6354 int reloc_sign; 6355 6356 BFD_ASSERT ((offset & 1) == 0); 6357 6358 upper = bfd_get_16 (abfd, insn); 6359 lower = bfd_get_16 (abfd, insn + 2); 6360 reloc_sign = (offset < 0) ? 1 : 0; 6361 upper = (upper & ~(bfd_vma) 0x7ff) 6362 | ((offset >> 12) & 0x3ff) 6363 | (reloc_sign << 10); 6364 lower = (lower & ~(bfd_vma) 0x2fff) 6365 | (((!((offset >> 23) & 1)) ^ reloc_sign) << 13) 6366 | (((!((offset >> 22) & 1)) ^ reloc_sign) << 11) 6367 | ((offset >> 1) & 0x7ff); 6368 bfd_put_16 (abfd, upper, insn); 6369 bfd_put_16 (abfd, lower, insn + 2); 6370 } 6371 6372 /* Thumb code calling an ARM function. */ 6373 6374 static int 6375 elf32_thumb_to_arm_stub (struct bfd_link_info * info, 6376 const char * name, 6377 bfd * input_bfd, 6378 bfd * output_bfd, 6379 asection * input_section, 6380 bfd_byte * hit_data, 6381 asection * sym_sec, 6382 bfd_vma offset, 6383 bfd_signed_vma addend, 6384 bfd_vma val, 6385 char **error_message) 6386 { 6387 asection * s = 0; 6388 bfd_vma my_offset; 6389 long int ret_offset; 6390 struct elf_link_hash_entry * myh; 6391 struct elf32_arm_link_hash_table * globals; 6392 6393 myh = find_thumb_glue (info, name, error_message); 6394 if (myh == NULL) 6395 return FALSE; 6396 6397 globals = elf32_arm_hash_table (info); 6398 BFD_ASSERT (globals != NULL); 6399 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 6400 6401 my_offset = myh->root.u.def.value; 6402 6403 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 6404 THUMB2ARM_GLUE_SECTION_NAME); 6405 6406 BFD_ASSERT (s != NULL); 6407 BFD_ASSERT (s->contents != NULL); 6408 BFD_ASSERT (s->output_section != NULL); 6409 6410 if ((my_offset & 0x01) == 0x01) 6411 { 6412 if (sym_sec != NULL 6413 && sym_sec->owner != NULL 6414 && !INTERWORK_FLAG (sym_sec->owner)) 6415 { 6416 (*_bfd_error_handler) 6417 (_("%B(%s): warning: interworking not enabled.\n" 6418 " first occurrence: %B: thumb call to arm"), 6419 sym_sec->owner, input_bfd, name); 6420 6421 return FALSE; 6422 } 6423 6424 --my_offset; 6425 myh->root.u.def.value = my_offset; 6426 6427 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a1_bx_pc_insn, 6428 s->contents + my_offset); 6429 6430 put_thumb_insn (globals, output_bfd, (bfd_vma) t2a2_noop_insn, 6431 s->contents + my_offset + 2); 6432 6433 ret_offset = 6434 /* Address of destination of the stub. */ 6435 ((bfd_signed_vma) val) 6436 - ((bfd_signed_vma) 6437 /* Offset from the start of the current section 6438 to the start of the stubs. */ 6439 (s->output_offset 6440 /* Offset of the start of this stub from the start of the stubs. */ 6441 + my_offset 6442 /* Address of the start of the current section. */ 6443 + s->output_section->vma) 6444 /* The branch instruction is 4 bytes into the stub. */ 6445 + 4 6446 /* ARM branches work from the pc of the instruction + 8. */ 6447 + 8); 6448 6449 put_arm_insn (globals, output_bfd, 6450 (bfd_vma) t2a3_b_insn | ((ret_offset >> 2) & 0x00FFFFFF), 6451 s->contents + my_offset + 4); 6452 } 6453 6454 BFD_ASSERT (my_offset <= globals->thumb_glue_size); 6455 6456 /* Now go back and fix up the original BL insn to point to here. */ 6457 ret_offset = 6458 /* Address of where the stub is located. */ 6459 (s->output_section->vma + s->output_offset + my_offset) 6460 /* Address of where the BL is located. */ 6461 - (input_section->output_section->vma + input_section->output_offset 6462 + offset) 6463 /* Addend in the relocation. */ 6464 - addend 6465 /* Biassing for PC-relative addressing. */ 6466 - 8; 6467 6468 insert_thumb_branch (input_bfd, ret_offset, hit_data - input_section->vma); 6469 6470 return TRUE; 6471 } 6472 6473 /* Populate an Arm to Thumb stub. Returns the stub symbol. */ 6474 6475 static struct elf_link_hash_entry * 6476 elf32_arm_create_thumb_stub (struct bfd_link_info * info, 6477 const char * name, 6478 bfd * input_bfd, 6479 bfd * output_bfd, 6480 asection * sym_sec, 6481 bfd_vma val, 6482 asection * s, 6483 char ** error_message) 6484 { 6485 bfd_vma my_offset; 6486 long int ret_offset; 6487 struct elf_link_hash_entry * myh; 6488 struct elf32_arm_link_hash_table * globals; 6489 6490 myh = find_arm_glue (info, name, error_message); 6491 if (myh == NULL) 6492 return NULL; 6493 6494 globals = elf32_arm_hash_table (info); 6495 BFD_ASSERT (globals != NULL); 6496 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 6497 6498 my_offset = myh->root.u.def.value; 6499 6500 if ((my_offset & 0x01) == 0x01) 6501 { 6502 if (sym_sec != NULL 6503 && sym_sec->owner != NULL 6504 && !INTERWORK_FLAG (sym_sec->owner)) 6505 { 6506 (*_bfd_error_handler) 6507 (_("%B(%s): warning: interworking not enabled.\n" 6508 " first occurrence: %B: arm call to thumb"), 6509 sym_sec->owner, input_bfd, name); 6510 } 6511 6512 --my_offset; 6513 myh->root.u.def.value = my_offset; 6514 6515 if (info->shared || globals->root.is_relocatable_executable 6516 || globals->pic_veneer) 6517 { 6518 /* For relocatable objects we can't use absolute addresses, 6519 so construct the address from a relative offset. */ 6520 /* TODO: If the offset is small it's probably worth 6521 constructing the address with adds. */ 6522 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1p_ldr_insn, 6523 s->contents + my_offset); 6524 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2p_add_pc_insn, 6525 s->contents + my_offset + 4); 6526 put_arm_insn (globals, output_bfd, (bfd_vma) a2t3p_bx_r12_insn, 6527 s->contents + my_offset + 8); 6528 /* Adjust the offset by 4 for the position of the add, 6529 and 8 for the pipeline offset. */ 6530 ret_offset = (val - (s->output_offset 6531 + s->output_section->vma 6532 + my_offset + 12)) 6533 | 1; 6534 bfd_put_32 (output_bfd, ret_offset, 6535 s->contents + my_offset + 12); 6536 } 6537 else if (globals->use_blx) 6538 { 6539 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1v5_ldr_insn, 6540 s->contents + my_offset); 6541 6542 /* It's a thumb address. Add the low order bit. */ 6543 bfd_put_32 (output_bfd, val | a2t2v5_func_addr_insn, 6544 s->contents + my_offset + 4); 6545 } 6546 else 6547 { 6548 put_arm_insn (globals, output_bfd, (bfd_vma) a2t1_ldr_insn, 6549 s->contents + my_offset); 6550 6551 put_arm_insn (globals, output_bfd, (bfd_vma) a2t2_bx_r12_insn, 6552 s->contents + my_offset + 4); 6553 6554 /* It's a thumb address. Add the low order bit. */ 6555 bfd_put_32 (output_bfd, val | a2t3_func_addr_insn, 6556 s->contents + my_offset + 8); 6557 6558 my_offset += 12; 6559 } 6560 } 6561 6562 BFD_ASSERT (my_offset <= globals->arm_glue_size); 6563 6564 return myh; 6565 } 6566 6567 /* Arm code calling a Thumb function. */ 6568 6569 static int 6570 elf32_arm_to_thumb_stub (struct bfd_link_info * info, 6571 const char * name, 6572 bfd * input_bfd, 6573 bfd * output_bfd, 6574 asection * input_section, 6575 bfd_byte * hit_data, 6576 asection * sym_sec, 6577 bfd_vma offset, 6578 bfd_signed_vma addend, 6579 bfd_vma val, 6580 char **error_message) 6581 { 6582 unsigned long int tmp; 6583 bfd_vma my_offset; 6584 asection * s; 6585 long int ret_offset; 6586 struct elf_link_hash_entry * myh; 6587 struct elf32_arm_link_hash_table * globals; 6588 6589 globals = elf32_arm_hash_table (info); 6590 BFD_ASSERT (globals != NULL); 6591 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 6592 6593 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 6594 ARM2THUMB_GLUE_SECTION_NAME); 6595 BFD_ASSERT (s != NULL); 6596 BFD_ASSERT (s->contents != NULL); 6597 BFD_ASSERT (s->output_section != NULL); 6598 6599 myh = elf32_arm_create_thumb_stub (info, name, input_bfd, output_bfd, 6600 sym_sec, val, s, error_message); 6601 if (!myh) 6602 return FALSE; 6603 6604 my_offset = myh->root.u.def.value; 6605 tmp = bfd_get_32 (input_bfd, hit_data); 6606 tmp = tmp & 0xFF000000; 6607 6608 /* Somehow these are both 4 too far, so subtract 8. */ 6609 ret_offset = (s->output_offset 6610 + my_offset 6611 + s->output_section->vma 6612 - (input_section->output_offset 6613 + input_section->output_section->vma 6614 + offset + addend) 6615 - 8); 6616 6617 tmp = tmp | ((ret_offset >> 2) & 0x00FFFFFF); 6618 6619 bfd_put_32 (output_bfd, (bfd_vma) tmp, hit_data - input_section->vma); 6620 6621 return TRUE; 6622 } 6623 6624 /* Populate Arm stub for an exported Thumb function. */ 6625 6626 static bfd_boolean 6627 elf32_arm_to_thumb_export_stub (struct elf_link_hash_entry *h, void * inf) 6628 { 6629 struct bfd_link_info * info = (struct bfd_link_info *) inf; 6630 asection * s; 6631 struct elf_link_hash_entry * myh; 6632 struct elf32_arm_link_hash_entry *eh; 6633 struct elf32_arm_link_hash_table * globals; 6634 asection *sec; 6635 bfd_vma val; 6636 char *error_message; 6637 6638 eh = elf32_arm_hash_entry (h); 6639 /* Allocate stubs for exported Thumb functions on v4t. */ 6640 if (eh->export_glue == NULL) 6641 return TRUE; 6642 6643 globals = elf32_arm_hash_table (info); 6644 BFD_ASSERT (globals != NULL); 6645 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 6646 6647 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 6648 ARM2THUMB_GLUE_SECTION_NAME); 6649 BFD_ASSERT (s != NULL); 6650 BFD_ASSERT (s->contents != NULL); 6651 BFD_ASSERT (s->output_section != NULL); 6652 6653 sec = eh->export_glue->root.u.def.section; 6654 6655 BFD_ASSERT (sec->output_section != NULL); 6656 6657 val = eh->export_glue->root.u.def.value + sec->output_offset 6658 + sec->output_section->vma; 6659 6660 myh = elf32_arm_create_thumb_stub (info, h->root.root.string, 6661 h->root.u.def.section->owner, 6662 globals->obfd, sec, val, s, 6663 &error_message); 6664 BFD_ASSERT (myh); 6665 return TRUE; 6666 } 6667 6668 /* Populate ARMv4 BX veneers. Returns the absolute adress of the veneer. */ 6669 6670 static bfd_vma 6671 elf32_arm_bx_glue (struct bfd_link_info * info, int reg) 6672 { 6673 bfd_byte *p; 6674 bfd_vma glue_addr; 6675 asection *s; 6676 struct elf32_arm_link_hash_table *globals; 6677 6678 globals = elf32_arm_hash_table (info); 6679 BFD_ASSERT (globals != NULL); 6680 BFD_ASSERT (globals->bfd_of_glue_owner != NULL); 6681 6682 s = bfd_get_section_by_name (globals->bfd_of_glue_owner, 6683 ARM_BX_GLUE_SECTION_NAME); 6684 BFD_ASSERT (s != NULL); 6685 BFD_ASSERT (s->contents != NULL); 6686 BFD_ASSERT (s->output_section != NULL); 6687 6688 BFD_ASSERT (globals->bx_glue_offset[reg] & 2); 6689 6690 glue_addr = globals->bx_glue_offset[reg] & ~(bfd_vma)3; 6691 6692 if ((globals->bx_glue_offset[reg] & 1) == 0) 6693 { 6694 p = s->contents + glue_addr; 6695 bfd_put_32 (globals->obfd, armbx1_tst_insn + (reg << 16), p); 6696 bfd_put_32 (globals->obfd, armbx2_moveq_insn + reg, p + 4); 6697 bfd_put_32 (globals->obfd, armbx3_bx_insn + reg, p + 8); 6698 globals->bx_glue_offset[reg] |= 1; 6699 } 6700 6701 return glue_addr + s->output_section->vma + s->output_offset; 6702 } 6703 6704 /* Generate Arm stubs for exported Thumb symbols. */ 6705 static void 6706 elf32_arm_begin_write_processing (bfd *abfd ATTRIBUTE_UNUSED, 6707 struct bfd_link_info *link_info) 6708 { 6709 struct elf32_arm_link_hash_table * globals; 6710 6711 if (link_info == NULL) 6712 /* Ignore this if we are not called by the ELF backend linker. */ 6713 return; 6714 6715 globals = elf32_arm_hash_table (link_info); 6716 if (globals == NULL) 6717 return; 6718 6719 /* If blx is available then exported Thumb symbols are OK and there is 6720 nothing to do. */ 6721 if (globals->use_blx) 6722 return; 6723 6724 elf_link_hash_traverse (&globals->root, elf32_arm_to_thumb_export_stub, 6725 link_info); 6726 } 6727 6728 /* Some relocations map to different relocations depending on the 6729 target. Return the real relocation. */ 6730 6731 static int 6732 arm_real_reloc_type (struct elf32_arm_link_hash_table * globals, 6733 int r_type) 6734 { 6735 switch (r_type) 6736 { 6737 case R_ARM_TARGET1: 6738 if (globals->target1_is_rel) 6739 return R_ARM_REL32; 6740 else 6741 return R_ARM_ABS32; 6742 6743 case R_ARM_TARGET2: 6744 return globals->target2_reloc; 6745 6746 default: 6747 return r_type; 6748 } 6749 } 6750 6751 /* Return the base VMA address which should be subtracted from real addresses 6752 when resolving @dtpoff relocation. 6753 This is PT_TLS segment p_vaddr. */ 6754 6755 static bfd_vma 6756 dtpoff_base (struct bfd_link_info *info) 6757 { 6758 /* If tls_sec is NULL, we should have signalled an error already. */ 6759 if (elf_hash_table (info)->tls_sec == NULL) 6760 return 0; 6761 return elf_hash_table (info)->tls_sec->vma; 6762 } 6763 6764 /* Return the relocation value for @tpoff relocation 6765 if STT_TLS virtual address is ADDRESS. */ 6766 6767 static bfd_vma 6768 tpoff (struct bfd_link_info *info, bfd_vma address) 6769 { 6770 struct elf_link_hash_table *htab = elf_hash_table (info); 6771 bfd_vma base; 6772 6773 /* If tls_sec is NULL, we should have signalled an error already. */ 6774 if (htab->tls_sec == NULL) 6775 return 0; 6776 base = align_power ((bfd_vma) TCB_SIZE, htab->tls_sec->alignment_power); 6777 return address - htab->tls_sec->vma + base; 6778 } 6779 6780 /* Perform an R_ARM_ABS12 relocation on the field pointed to by DATA. 6781 VALUE is the relocation value. */ 6782 6783 static bfd_reloc_status_type 6784 elf32_arm_abs12_reloc (bfd *abfd, void *data, bfd_vma value) 6785 { 6786 if (value > 0xfff) 6787 return bfd_reloc_overflow; 6788 6789 value |= bfd_get_32 (abfd, data) & 0xfffff000; 6790 bfd_put_32 (abfd, value, data); 6791 return bfd_reloc_ok; 6792 } 6793 6794 /* For a given value of n, calculate the value of G_n as required to 6795 deal with group relocations. We return it in the form of an 6796 encoded constant-and-rotation, together with the final residual. If n is 6797 specified as less than zero, then final_residual is filled with the 6798 input value and no further action is performed. */ 6799 6800 static bfd_vma 6801 calculate_group_reloc_mask (bfd_vma value, int n, bfd_vma *final_residual) 6802 { 6803 int current_n; 6804 bfd_vma g_n; 6805 bfd_vma encoded_g_n = 0; 6806 bfd_vma residual = value; /* Also known as Y_n. */ 6807 6808 for (current_n = 0; current_n <= n; current_n++) 6809 { 6810 int shift; 6811 6812 /* Calculate which part of the value to mask. */ 6813 if (residual == 0) 6814 shift = 0; 6815 else 6816 { 6817 int msb; 6818 6819 /* Determine the most significant bit in the residual and 6820 align the resulting value to a 2-bit boundary. */ 6821 for (msb = 30; msb >= 0; msb -= 2) 6822 if (residual & (3 << msb)) 6823 break; 6824 6825 /* The desired shift is now (msb - 6), or zero, whichever 6826 is the greater. */ 6827 shift = msb - 6; 6828 if (shift < 0) 6829 shift = 0; 6830 } 6831 6832 /* Calculate g_n in 32-bit as well as encoded constant+rotation form. */ 6833 g_n = residual & (0xff << shift); 6834 encoded_g_n = (g_n >> shift) 6835 | ((g_n <= 0xff ? 0 : (32 - shift) / 2) << 8); 6836 6837 /* Calculate the residual for the next time around. */ 6838 residual &= ~g_n; 6839 } 6840 6841 *final_residual = residual; 6842 6843 return encoded_g_n; 6844 } 6845 6846 /* Given an ARM instruction, determine whether it is an ADD or a SUB. 6847 Returns 1 if it is an ADD, -1 if it is a SUB, and 0 otherwise. */ 6848 6849 static int 6850 identify_add_or_sub (bfd_vma insn) 6851 { 6852 int opcode = insn & 0x1e00000; 6853 6854 if (opcode == 1 << 23) /* ADD */ 6855 return 1; 6856 6857 if (opcode == 1 << 22) /* SUB */ 6858 return -1; 6859 6860 return 0; 6861 } 6862 6863 /* Perform a relocation as part of a final link. */ 6864 6865 static bfd_reloc_status_type 6866 elf32_arm_final_link_relocate (reloc_howto_type * howto, 6867 bfd * input_bfd, 6868 bfd * output_bfd, 6869 asection * input_section, 6870 bfd_byte * contents, 6871 Elf_Internal_Rela * rel, 6872 bfd_vma value, 6873 struct bfd_link_info * info, 6874 asection * sym_sec, 6875 const char * sym_name, 6876 int sym_flags, 6877 struct elf_link_hash_entry * h, 6878 bfd_boolean * unresolved_reloc_p, 6879 char ** error_message) 6880 { 6881 unsigned long r_type = howto->type; 6882 unsigned long r_symndx; 6883 bfd_byte * hit_data = contents + rel->r_offset; 6884 bfd * dynobj = NULL; 6885 bfd_vma * local_got_offsets; 6886 asection * sgot = NULL; 6887 asection * splt = NULL; 6888 asection * sreloc = NULL; 6889 bfd_vma addend; 6890 bfd_signed_vma signed_addend; 6891 struct elf32_arm_link_hash_table * globals; 6892 6893 globals = elf32_arm_hash_table (info); 6894 if (globals == NULL) 6895 return bfd_reloc_notsupported; 6896 6897 BFD_ASSERT (is_arm_elf (input_bfd)); 6898 6899 /* Some relocation types map to different relocations depending on the 6900 target. We pick the right one here. */ 6901 r_type = arm_real_reloc_type (globals, r_type); 6902 if (r_type != howto->type) 6903 howto = elf32_arm_howto_from_type (r_type); 6904 6905 /* If the start address has been set, then set the EF_ARM_HASENTRY 6906 flag. Setting this more than once is redundant, but the cost is 6907 not too high, and it keeps the code simple. 6908 6909 The test is done here, rather than somewhere else, because the 6910 start address is only set just before the final link commences. 6911 6912 Note - if the user deliberately sets a start address of 0, the 6913 flag will not be set. */ 6914 if (bfd_get_start_address (output_bfd) != 0) 6915 elf_elfheader (output_bfd)->e_flags |= EF_ARM_HASENTRY; 6916 6917 dynobj = elf_hash_table (info)->dynobj; 6918 if (dynobj) 6919 { 6920 sgot = bfd_get_section_by_name (dynobj, ".got"); 6921 splt = bfd_get_section_by_name (dynobj, ".plt"); 6922 } 6923 local_got_offsets = elf_local_got_offsets (input_bfd); 6924 r_symndx = ELF32_R_SYM (rel->r_info); 6925 6926 if (globals->use_rel) 6927 { 6928 addend = bfd_get_32 (input_bfd, hit_data) & howto->src_mask; 6929 6930 if (addend & ((howto->src_mask + 1) >> 1)) 6931 { 6932 signed_addend = -1; 6933 signed_addend &= ~ howto->src_mask; 6934 signed_addend |= addend; 6935 } 6936 else 6937 signed_addend = addend; 6938 } 6939 else 6940 addend = signed_addend = rel->r_addend; 6941 6942 switch (r_type) 6943 { 6944 case R_ARM_NONE: 6945 /* We don't need to find a value for this symbol. It's just a 6946 marker. */ 6947 *unresolved_reloc_p = FALSE; 6948 return bfd_reloc_ok; 6949 6950 case R_ARM_ABS12: 6951 if (!globals->vxworks_p) 6952 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); 6953 6954 case R_ARM_PC24: 6955 case R_ARM_ABS32: 6956 case R_ARM_ABS32_NOI: 6957 case R_ARM_REL32: 6958 case R_ARM_REL32_NOI: 6959 case R_ARM_CALL: 6960 case R_ARM_JUMP24: 6961 case R_ARM_XPC25: 6962 case R_ARM_PREL31: 6963 case R_ARM_PLT32: 6964 /* Handle relocations which should use the PLT entry. ABS32/REL32 6965 will use the symbol's value, which may point to a PLT entry, but we 6966 don't need to handle that here. If we created a PLT entry, all 6967 branches in this object should go to it, except if the PLT is too 6968 far away, in which case a long branch stub should be inserted. */ 6969 if ((r_type != R_ARM_ABS32 && r_type != R_ARM_REL32 6970 && r_type != R_ARM_ABS32_NOI && r_type != R_ARM_REL32_NOI 6971 && r_type != R_ARM_CALL 6972 && r_type != R_ARM_JUMP24 6973 && r_type != R_ARM_PLT32) 6974 && h != NULL 6975 && splt != NULL 6976 && h->plt.offset != (bfd_vma) -1) 6977 { 6978 /* If we've created a .plt section, and assigned a PLT entry to 6979 this function, it should not be known to bind locally. If 6980 it were, we would have cleared the PLT entry. */ 6981 BFD_ASSERT (!SYMBOL_CALLS_LOCAL (info, h)); 6982 6983 value = (splt->output_section->vma 6984 + splt->output_offset 6985 + h->plt.offset); 6986 *unresolved_reloc_p = FALSE; 6987 return _bfd_final_link_relocate (howto, input_bfd, input_section, 6988 contents, rel->r_offset, value, 6989 rel->r_addend); 6990 } 6991 6992 /* When generating a shared object or relocatable executable, these 6993 relocations are copied into the output file to be resolved at 6994 run time. */ 6995 if ((info->shared || globals->root.is_relocatable_executable) 6996 && (input_section->flags & SEC_ALLOC) 6997 && !(globals->vxworks_p 6998 && strcmp (input_section->output_section->name, 6999 ".tls_vars") == 0) 7000 && ((r_type != R_ARM_REL32 && r_type != R_ARM_REL32_NOI) 7001 || !SYMBOL_CALLS_LOCAL (info, h)) 7002 && (!strstr (input_section->name, STUB_SUFFIX)) 7003 && (h == NULL 7004 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 7005 || h->root.type != bfd_link_hash_undefweak) 7006 && r_type != R_ARM_PC24 7007 && r_type != R_ARM_CALL 7008 && r_type != R_ARM_JUMP24 7009 && r_type != R_ARM_PREL31 7010 && r_type != R_ARM_PLT32) 7011 { 7012 Elf_Internal_Rela outrel; 7013 bfd_byte *loc; 7014 bfd_boolean skip, relocate; 7015 7016 *unresolved_reloc_p = FALSE; 7017 7018 if (sreloc == NULL) 7019 { 7020 sreloc = _bfd_elf_get_dynamic_reloc_section (input_bfd, input_section, 7021 ! globals->use_rel); 7022 7023 if (sreloc == NULL) 7024 return bfd_reloc_notsupported; 7025 } 7026 7027 skip = FALSE; 7028 relocate = FALSE; 7029 7030 outrel.r_addend = addend; 7031 outrel.r_offset = 7032 _bfd_elf_section_offset (output_bfd, info, input_section, 7033 rel->r_offset); 7034 if (outrel.r_offset == (bfd_vma) -1) 7035 skip = TRUE; 7036 else if (outrel.r_offset == (bfd_vma) -2) 7037 skip = TRUE, relocate = TRUE; 7038 outrel.r_offset += (input_section->output_section->vma 7039 + input_section->output_offset); 7040 7041 if (skip) 7042 memset (&outrel, 0, sizeof outrel); 7043 else if (h != NULL 7044 && h->dynindx != -1 7045 && (!info->shared 7046 || !info->symbolic 7047 || !h->def_regular)) 7048 outrel.r_info = ELF32_R_INFO (h->dynindx, r_type); 7049 else 7050 { 7051 int symbol; 7052 7053 /* This symbol is local, or marked to become local. */ 7054 if (sym_flags == STT_ARM_TFUNC) 7055 value |= 1; 7056 if (globals->symbian_p) 7057 { 7058 asection *osec; 7059 7060 /* On Symbian OS, the data segment and text segement 7061 can be relocated independently. Therefore, we 7062 must indicate the segment to which this 7063 relocation is relative. The BPABI allows us to 7064 use any symbol in the right segment; we just use 7065 the section symbol as it is convenient. (We 7066 cannot use the symbol given by "h" directly as it 7067 will not appear in the dynamic symbol table.) 7068 7069 Note that the dynamic linker ignores the section 7070 symbol value, so we don't subtract osec->vma 7071 from the emitted reloc addend. */ 7072 if (sym_sec) 7073 osec = sym_sec->output_section; 7074 else 7075 osec = input_section->output_section; 7076 symbol = elf_section_data (osec)->dynindx; 7077 if (symbol == 0) 7078 { 7079 struct elf_link_hash_table *htab = elf_hash_table (info); 7080 7081 if ((osec->flags & SEC_READONLY) == 0 7082 && htab->data_index_section != NULL) 7083 osec = htab->data_index_section; 7084 else 7085 osec = htab->text_index_section; 7086 symbol = elf_section_data (osec)->dynindx; 7087 } 7088 BFD_ASSERT (symbol != 0); 7089 } 7090 else 7091 /* On SVR4-ish systems, the dynamic loader cannot 7092 relocate the text and data segments independently, 7093 so the symbol does not matter. */ 7094 symbol = 0; 7095 outrel.r_info = ELF32_R_INFO (symbol, R_ARM_RELATIVE); 7096 if (globals->use_rel) 7097 relocate = TRUE; 7098 else 7099 outrel.r_addend += value; 7100 } 7101 7102 loc = sreloc->contents; 7103 loc += sreloc->reloc_count++ * RELOC_SIZE (globals); 7104 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 7105 7106 /* If this reloc is against an external symbol, we do not want to 7107 fiddle with the addend. Otherwise, we need to include the symbol 7108 value so that it becomes an addend for the dynamic reloc. */ 7109 if (! relocate) 7110 return bfd_reloc_ok; 7111 7112 return _bfd_final_link_relocate (howto, input_bfd, input_section, 7113 contents, rel->r_offset, value, 7114 (bfd_vma) 0); 7115 } 7116 else switch (r_type) 7117 { 7118 case R_ARM_ABS12: 7119 return elf32_arm_abs12_reloc (input_bfd, hit_data, value + addend); 7120 7121 case R_ARM_XPC25: /* Arm BLX instruction. */ 7122 case R_ARM_CALL: 7123 case R_ARM_JUMP24: 7124 case R_ARM_PC24: /* Arm B/BL instruction. */ 7125 case R_ARM_PLT32: 7126 { 7127 struct elf32_arm_stub_hash_entry *stub_entry = NULL; 7128 7129 if (r_type == R_ARM_XPC25) 7130 { 7131 /* Check for Arm calling Arm function. */ 7132 /* FIXME: Should we translate the instruction into a BL 7133 instruction instead ? */ 7134 if (sym_flags != STT_ARM_TFUNC) 7135 (*_bfd_error_handler) 7136 (_("\%B: Warning: Arm BLX instruction targets Arm function '%s'."), 7137 input_bfd, 7138 h ? h->root.root.string : "(local)"); 7139 } 7140 else if (r_type == R_ARM_PC24) 7141 { 7142 /* Check for Arm calling Thumb function. */ 7143 if (sym_flags == STT_ARM_TFUNC) 7144 { 7145 if (elf32_arm_to_thumb_stub (info, sym_name, input_bfd, 7146 output_bfd, input_section, 7147 hit_data, sym_sec, rel->r_offset, 7148 signed_addend, value, 7149 error_message)) 7150 return bfd_reloc_ok; 7151 else 7152 return bfd_reloc_dangerous; 7153 } 7154 } 7155 7156 /* Check if a stub has to be inserted because the 7157 destination is too far or we are changing mode. */ 7158 if ( r_type == R_ARM_CALL 7159 || r_type == R_ARM_JUMP24 7160 || r_type == R_ARM_PLT32) 7161 { 7162 enum elf32_arm_stub_type stub_type = arm_stub_none; 7163 struct elf32_arm_link_hash_entry *hash; 7164 7165 hash = (struct elf32_arm_link_hash_entry *) h; 7166 stub_type = arm_type_of_stub (info, input_section, rel, 7167 &sym_flags, hash, 7168 value, sym_sec, 7169 input_bfd, sym_name); 7170 7171 if (stub_type != arm_stub_none) 7172 { 7173 /* The target is out of reach, so redirect the 7174 branch to the local stub for this function. */ 7175 7176 stub_entry = elf32_arm_get_stub_entry (input_section, 7177 sym_sec, h, 7178 rel, globals, 7179 stub_type); 7180 if (stub_entry != NULL) 7181 value = (stub_entry->stub_offset 7182 + stub_entry->stub_sec->output_offset 7183 + stub_entry->stub_sec->output_section->vma); 7184 } 7185 else 7186 { 7187 /* If the call goes through a PLT entry, make sure to 7188 check distance to the right destination address. */ 7189 if (h != NULL 7190 && splt != NULL 7191 && h->plt.offset != (bfd_vma) -1) 7192 { 7193 value = (splt->output_section->vma 7194 + splt->output_offset 7195 + h->plt.offset); 7196 *unresolved_reloc_p = FALSE; 7197 /* The PLT entry is in ARM mode, regardless of the 7198 target function. */ 7199 sym_flags = STT_FUNC; 7200 } 7201 } 7202 } 7203 7204 /* The ARM ELF ABI says that this reloc is computed as: S - P + A 7205 where: 7206 S is the address of the symbol in the relocation. 7207 P is address of the instruction being relocated. 7208 A is the addend (extracted from the instruction) in bytes. 7209 7210 S is held in 'value'. 7211 P is the base address of the section containing the 7212 instruction plus the offset of the reloc into that 7213 section, ie: 7214 (input_section->output_section->vma + 7215 input_section->output_offset + 7216 rel->r_offset). 7217 A is the addend, converted into bytes, ie: 7218 (signed_addend * 4) 7219 7220 Note: None of these operations have knowledge of the pipeline 7221 size of the processor, thus it is up to the assembler to 7222 encode this information into the addend. */ 7223 value -= (input_section->output_section->vma 7224 + input_section->output_offset); 7225 value -= rel->r_offset; 7226 if (globals->use_rel) 7227 value += (signed_addend << howto->size); 7228 else 7229 /* RELA addends do not have to be adjusted by howto->size. */ 7230 value += signed_addend; 7231 7232 signed_addend = value; 7233 signed_addend >>= howto->rightshift; 7234 7235 /* A branch to an undefined weak symbol is turned into a jump to 7236 the next instruction unless a PLT entry will be created. 7237 Do the same for local undefined symbols (but not for STN_UNDEF). 7238 The jump to the next instruction is optimized as a NOP depending 7239 on the architecture. */ 7240 if (h ? (h->root.type == bfd_link_hash_undefweak 7241 && !(splt != NULL && h->plt.offset != (bfd_vma) -1)) 7242 : r_symndx != STN_UNDEF && bfd_is_und_section (sym_sec)) 7243 { 7244 value = (bfd_get_32 (input_bfd, hit_data) & 0xf0000000); 7245 7246 if (arch_has_arm_nop (globals)) 7247 value |= 0x0320f000; 7248 else 7249 value |= 0x01a00000; /* Using pre-UAL nop: mov r0, r0. */ 7250 } 7251 else 7252 { 7253 /* Perform a signed range check. */ 7254 if ( signed_addend > ((bfd_signed_vma) (howto->dst_mask >> 1)) 7255 || signed_addend < - ((bfd_signed_vma) ((howto->dst_mask + 1) >> 1))) 7256 return bfd_reloc_overflow; 7257 7258 addend = (value & 2); 7259 7260 value = (signed_addend & howto->dst_mask) 7261 | (bfd_get_32 (input_bfd, hit_data) & (~ howto->dst_mask)); 7262 7263 if (r_type == R_ARM_CALL) 7264 { 7265 /* Set the H bit in the BLX instruction. */ 7266 if (sym_flags == STT_ARM_TFUNC) 7267 { 7268 if (addend) 7269 value |= (1 << 24); 7270 else 7271 value &= ~(bfd_vma)(1 << 24); 7272 } 7273 7274 /* Select the correct instruction (BL or BLX). */ 7275 /* Only if we are not handling a BL to a stub. In this 7276 case, mode switching is performed by the stub. */ 7277 if (sym_flags == STT_ARM_TFUNC && !stub_entry) 7278 value |= (1 << 28); 7279 else 7280 { 7281 value &= ~(bfd_vma)(1 << 28); 7282 value |= (1 << 24); 7283 } 7284 } 7285 } 7286 } 7287 break; 7288 7289 case R_ARM_ABS32: 7290 value += addend; 7291 if (sym_flags == STT_ARM_TFUNC) 7292 value |= 1; 7293 break; 7294 7295 case R_ARM_ABS32_NOI: 7296 value += addend; 7297 break; 7298 7299 case R_ARM_REL32: 7300 value += addend; 7301 if (sym_flags == STT_ARM_TFUNC) 7302 value |= 1; 7303 value -= (input_section->output_section->vma 7304 + input_section->output_offset + rel->r_offset); 7305 break; 7306 7307 case R_ARM_REL32_NOI: 7308 value += addend; 7309 value -= (input_section->output_section->vma 7310 + input_section->output_offset + rel->r_offset); 7311 break; 7312 7313 case R_ARM_PREL31: 7314 value -= (input_section->output_section->vma 7315 + input_section->output_offset + rel->r_offset); 7316 value += signed_addend; 7317 if (! h || h->root.type != bfd_link_hash_undefweak) 7318 { 7319 /* Check for overflow. */ 7320 if ((value ^ (value >> 1)) & (1 << 30)) 7321 return bfd_reloc_overflow; 7322 } 7323 value &= 0x7fffffff; 7324 value |= (bfd_get_32 (input_bfd, hit_data) & 0x80000000); 7325 if (sym_flags == STT_ARM_TFUNC) 7326 value |= 1; 7327 break; 7328 } 7329 7330 bfd_put_32 (input_bfd, value, hit_data); 7331 return bfd_reloc_ok; 7332 7333 case R_ARM_ABS8: 7334 value += addend; 7335 7336 /* There is no way to tell whether the user intended to use a signed or 7337 unsigned addend. When checking for overflow we accept either, 7338 as specified by the AAELF. */ 7339 if ((long) value > 0xff || (long) value < -0x80) 7340 return bfd_reloc_overflow; 7341 7342 bfd_put_8 (input_bfd, value, hit_data); 7343 return bfd_reloc_ok; 7344 7345 case R_ARM_ABS16: 7346 value += addend; 7347 7348 /* See comment for R_ARM_ABS8. */ 7349 if ((long) value > 0xffff || (long) value < -0x8000) 7350 return bfd_reloc_overflow; 7351 7352 bfd_put_16 (input_bfd, value, hit_data); 7353 return bfd_reloc_ok; 7354 7355 case R_ARM_THM_ABS5: 7356 /* Support ldr and str instructions for the thumb. */ 7357 if (globals->use_rel) 7358 { 7359 /* Need to refetch addend. */ 7360 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; 7361 /* ??? Need to determine shift amount from operand size. */ 7362 addend >>= howto->rightshift; 7363 } 7364 value += addend; 7365 7366 /* ??? Isn't value unsigned? */ 7367 if ((long) value > 0x1f || (long) value < -0x10) 7368 return bfd_reloc_overflow; 7369 7370 /* ??? Value needs to be properly shifted into place first. */ 7371 value |= bfd_get_16 (input_bfd, hit_data) & 0xf83f; 7372 bfd_put_16 (input_bfd, value, hit_data); 7373 return bfd_reloc_ok; 7374 7375 case R_ARM_THM_ALU_PREL_11_0: 7376 /* Corresponds to: addw.w reg, pc, #offset (and similarly for subw). */ 7377 { 7378 bfd_vma insn; 7379 bfd_signed_vma relocation; 7380 7381 insn = (bfd_get_16 (input_bfd, hit_data) << 16) 7382 | bfd_get_16 (input_bfd, hit_data + 2); 7383 7384 if (globals->use_rel) 7385 { 7386 signed_addend = (insn & 0xff) | ((insn & 0x7000) >> 4) 7387 | ((insn & (1 << 26)) >> 15); 7388 if (insn & 0xf00000) 7389 signed_addend = -signed_addend; 7390 } 7391 7392 relocation = value + signed_addend; 7393 relocation -= (input_section->output_section->vma 7394 + input_section->output_offset 7395 + rel->r_offset); 7396 7397 value = abs (relocation); 7398 7399 if (value >= 0x1000) 7400 return bfd_reloc_overflow; 7401 7402 insn = (insn & 0xfb0f8f00) | (value & 0xff) 7403 | ((value & 0x700) << 4) 7404 | ((value & 0x800) << 15); 7405 if (relocation < 0) 7406 insn |= 0xa00000; 7407 7408 bfd_put_16 (input_bfd, insn >> 16, hit_data); 7409 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); 7410 7411 return bfd_reloc_ok; 7412 } 7413 7414 case R_ARM_THM_PC8: 7415 /* PR 10073: This reloc is not generated by the GNU toolchain, 7416 but it is supported for compatibility with third party libraries 7417 generated by other compilers, specifically the ARM/IAR. */ 7418 { 7419 bfd_vma insn; 7420 bfd_signed_vma relocation; 7421 7422 insn = bfd_get_16 (input_bfd, hit_data); 7423 7424 if (globals->use_rel) 7425 addend = (insn & 0x00ff) << 2; 7426 7427 relocation = value + addend; 7428 relocation -= (input_section->output_section->vma 7429 + input_section->output_offset 7430 + rel->r_offset); 7431 7432 value = abs (relocation); 7433 7434 /* We do not check for overflow of this reloc. Although strictly 7435 speaking this is incorrect, it appears to be necessary in order 7436 to work with IAR generated relocs. Since GCC and GAS do not 7437 generate R_ARM_THM_PC8 relocs, the lack of a check should not be 7438 a problem for them. */ 7439 value &= 0x3fc; 7440 7441 insn = (insn & 0xff00) | (value >> 2); 7442 7443 bfd_put_16 (input_bfd, insn, hit_data); 7444 7445 return bfd_reloc_ok; 7446 } 7447 7448 case R_ARM_THM_PC12: 7449 /* Corresponds to: ldr.w reg, [pc, #offset]. */ 7450 { 7451 bfd_vma insn; 7452 bfd_signed_vma relocation; 7453 7454 insn = (bfd_get_16 (input_bfd, hit_data) << 16) 7455 | bfd_get_16 (input_bfd, hit_data + 2); 7456 7457 if (globals->use_rel) 7458 { 7459 signed_addend = insn & 0xfff; 7460 if (!(insn & (1 << 23))) 7461 signed_addend = -signed_addend; 7462 } 7463 7464 relocation = value + signed_addend; 7465 relocation -= (input_section->output_section->vma 7466 + input_section->output_offset 7467 + rel->r_offset); 7468 7469 value = abs (relocation); 7470 7471 if (value >= 0x1000) 7472 return bfd_reloc_overflow; 7473 7474 insn = (insn & 0xff7ff000) | value; 7475 if (relocation >= 0) 7476 insn |= (1 << 23); 7477 7478 bfd_put_16 (input_bfd, insn >> 16, hit_data); 7479 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); 7480 7481 return bfd_reloc_ok; 7482 } 7483 7484 case R_ARM_THM_XPC22: 7485 case R_ARM_THM_CALL: 7486 case R_ARM_THM_JUMP24: 7487 /* Thumb BL (branch long instruction). */ 7488 { 7489 bfd_vma relocation; 7490 bfd_vma reloc_sign; 7491 bfd_boolean overflow = FALSE; 7492 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); 7493 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); 7494 bfd_signed_vma reloc_signed_max; 7495 bfd_signed_vma reloc_signed_min; 7496 bfd_vma check; 7497 bfd_signed_vma signed_check; 7498 int bitsize; 7499 const int thumb2 = using_thumb2 (globals); 7500 7501 /* A branch to an undefined weak symbol is turned into a jump to 7502 the next instruction unless a PLT entry will be created. 7503 The jump to the next instruction is optimized as a NOP.W for 7504 Thumb-2 enabled architectures. */ 7505 if (h && h->root.type == bfd_link_hash_undefweak 7506 && !(splt != NULL && h->plt.offset != (bfd_vma) -1)) 7507 { 7508 if (arch_has_thumb2_nop (globals)) 7509 { 7510 bfd_put_16 (input_bfd, 0xf3af, hit_data); 7511 bfd_put_16 (input_bfd, 0x8000, hit_data + 2); 7512 } 7513 else 7514 { 7515 bfd_put_16 (input_bfd, 0xe000, hit_data); 7516 bfd_put_16 (input_bfd, 0xbf00, hit_data + 2); 7517 } 7518 return bfd_reloc_ok; 7519 } 7520 7521 /* Fetch the addend. We use the Thumb-2 encoding (backwards compatible 7522 with Thumb-1) involving the J1 and J2 bits. */ 7523 if (globals->use_rel) 7524 { 7525 bfd_vma s = (upper_insn & (1 << 10)) >> 10; 7526 bfd_vma upper = upper_insn & 0x3ff; 7527 bfd_vma lower = lower_insn & 0x7ff; 7528 bfd_vma j1 = (lower_insn & (1 << 13)) >> 13; 7529 bfd_vma j2 = (lower_insn & (1 << 11)) >> 11; 7530 bfd_vma i1 = j1 ^ s ? 0 : 1; 7531 bfd_vma i2 = j2 ^ s ? 0 : 1; 7532 7533 addend = (i1 << 23) | (i2 << 22) | (upper << 12) | (lower << 1); 7534 /* Sign extend. */ 7535 addend = (addend | ((s ? 0 : 1) << 24)) - (1 << 24); 7536 7537 signed_addend = addend; 7538 } 7539 7540 if (r_type == R_ARM_THM_XPC22) 7541 { 7542 /* Check for Thumb to Thumb call. */ 7543 /* FIXME: Should we translate the instruction into a BL 7544 instruction instead ? */ 7545 if (sym_flags == STT_ARM_TFUNC) 7546 (*_bfd_error_handler) 7547 (_("%B: Warning: Thumb BLX instruction targets thumb function '%s'."), 7548 input_bfd, 7549 h ? h->root.root.string : "(local)"); 7550 } 7551 else 7552 { 7553 /* If it is not a call to Thumb, assume call to Arm. 7554 If it is a call relative to a section name, then it is not a 7555 function call at all, but rather a long jump. Calls through 7556 the PLT do not require stubs. */ 7557 if (sym_flags != STT_ARM_TFUNC && sym_flags != STT_SECTION 7558 && (h == NULL || splt == NULL 7559 || h->plt.offset == (bfd_vma) -1)) 7560 { 7561 if (globals->use_blx && r_type == R_ARM_THM_CALL) 7562 { 7563 /* Convert BL to BLX. */ 7564 lower_insn = (lower_insn & ~0x1000) | 0x0800; 7565 } 7566 else if (( r_type != R_ARM_THM_CALL) 7567 && (r_type != R_ARM_THM_JUMP24)) 7568 { 7569 if (elf32_thumb_to_arm_stub 7570 (info, sym_name, input_bfd, output_bfd, input_section, 7571 hit_data, sym_sec, rel->r_offset, signed_addend, value, 7572 error_message)) 7573 return bfd_reloc_ok; 7574 else 7575 return bfd_reloc_dangerous; 7576 } 7577 } 7578 else if (sym_flags == STT_ARM_TFUNC && globals->use_blx 7579 && r_type == R_ARM_THM_CALL) 7580 { 7581 /* Make sure this is a BL. */ 7582 lower_insn |= 0x1800; 7583 } 7584 } 7585 7586 enum elf32_arm_stub_type stub_type = arm_stub_none; 7587 if (r_type == R_ARM_THM_CALL || r_type == R_ARM_THM_JUMP24) 7588 { 7589 /* Check if a stub has to be inserted because the destination 7590 is too far. */ 7591 struct elf32_arm_stub_hash_entry *stub_entry; 7592 struct elf32_arm_link_hash_entry *hash; 7593 7594 hash = (struct elf32_arm_link_hash_entry *) h; 7595 7596 stub_type = arm_type_of_stub (info, input_section, rel, 7597 &sym_flags, hash, value, sym_sec, 7598 input_bfd, sym_name); 7599 7600 if (stub_type != arm_stub_none) 7601 { 7602 /* The target is out of reach or we are changing modes, so 7603 redirect the branch to the local stub for this 7604 function. */ 7605 stub_entry = elf32_arm_get_stub_entry (input_section, 7606 sym_sec, h, 7607 rel, globals, 7608 stub_type); 7609 if (stub_entry != NULL) 7610 value = (stub_entry->stub_offset 7611 + stub_entry->stub_sec->output_offset 7612 + stub_entry->stub_sec->output_section->vma); 7613 7614 /* If this call becomes a call to Arm, force BLX. */ 7615 if (globals->use_blx && (r_type == R_ARM_THM_CALL)) 7616 { 7617 if ((stub_entry 7618 && !arm_stub_is_thumb (stub_entry->stub_type)) 7619 || (sym_flags != STT_ARM_TFUNC)) 7620 lower_insn = (lower_insn & ~0x1000) | 0x0800; 7621 } 7622 } 7623 } 7624 7625 /* Handle calls via the PLT. */ 7626 if (stub_type == arm_stub_none 7627 && h != NULL 7628 && splt != NULL 7629 && h->plt.offset != (bfd_vma) -1) 7630 { 7631 value = (splt->output_section->vma 7632 + splt->output_offset 7633 + h->plt.offset); 7634 7635 if (globals->use_blx && r_type == R_ARM_THM_CALL) 7636 { 7637 /* If the Thumb BLX instruction is available, convert 7638 the BL to a BLX instruction to call the ARM-mode 7639 PLT entry. */ 7640 lower_insn = (lower_insn & ~0x1000) | 0x0800; 7641 sym_flags = STT_FUNC; 7642 } 7643 else 7644 { 7645 /* Target the Thumb stub before the ARM PLT entry. */ 7646 value -= PLT_THUMB_STUB_SIZE; 7647 sym_flags = STT_ARM_TFUNC; 7648 } 7649 *unresolved_reloc_p = FALSE; 7650 } 7651 7652 relocation = value + signed_addend; 7653 7654 relocation -= (input_section->output_section->vma 7655 + input_section->output_offset 7656 + rel->r_offset); 7657 7658 check = relocation >> howto->rightshift; 7659 7660 /* If this is a signed value, the rightshift just dropped 7661 leading 1 bits (assuming twos complement). */ 7662 if ((bfd_signed_vma) relocation >= 0) 7663 signed_check = check; 7664 else 7665 signed_check = check | ~((bfd_vma) -1 >> howto->rightshift); 7666 7667 /* Calculate the permissable maximum and minimum values for 7668 this relocation according to whether we're relocating for 7669 Thumb-2 or not. */ 7670 bitsize = howto->bitsize; 7671 if (!thumb2) 7672 bitsize -= 2; 7673 reloc_signed_max = (1 << (bitsize - 1)) - 1; 7674 reloc_signed_min = ~reloc_signed_max; 7675 7676 /* Assumes two's complement. */ 7677 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) 7678 overflow = TRUE; 7679 7680 if ((lower_insn & 0x5000) == 0x4000) 7681 /* For a BLX instruction, make sure that the relocation is rounded up 7682 to a word boundary. This follows the semantics of the instruction 7683 which specifies that bit 1 of the target address will come from bit 7684 1 of the base address. */ 7685 relocation = (relocation + 2) & ~ 3; 7686 7687 /* Put RELOCATION back into the insn. Assumes two's complement. 7688 We use the Thumb-2 encoding, which is safe even if dealing with 7689 a Thumb-1 instruction by virtue of our overflow check above. */ 7690 reloc_sign = (signed_check < 0) ? 1 : 0; 7691 upper_insn = (upper_insn & ~(bfd_vma) 0x7ff) 7692 | ((relocation >> 12) & 0x3ff) 7693 | (reloc_sign << 10); 7694 lower_insn = (lower_insn & ~(bfd_vma) 0x2fff) 7695 | (((!((relocation >> 23) & 1)) ^ reloc_sign) << 13) 7696 | (((!((relocation >> 22) & 1)) ^ reloc_sign) << 11) 7697 | ((relocation >> 1) & 0x7ff); 7698 7699 /* Put the relocated value back in the object file: */ 7700 bfd_put_16 (input_bfd, upper_insn, hit_data); 7701 bfd_put_16 (input_bfd, lower_insn, hit_data + 2); 7702 7703 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); 7704 } 7705 break; 7706 7707 case R_ARM_THM_JUMP19: 7708 /* Thumb32 conditional branch instruction. */ 7709 { 7710 bfd_vma relocation; 7711 bfd_boolean overflow = FALSE; 7712 bfd_vma upper_insn = bfd_get_16 (input_bfd, hit_data); 7713 bfd_vma lower_insn = bfd_get_16 (input_bfd, hit_data + 2); 7714 bfd_signed_vma reloc_signed_max = 0xffffe; 7715 bfd_signed_vma reloc_signed_min = -0x100000; 7716 bfd_signed_vma signed_check; 7717 7718 /* Need to refetch the addend, reconstruct the top three bits, 7719 and squish the two 11 bit pieces together. */ 7720 if (globals->use_rel) 7721 { 7722 bfd_vma S = (upper_insn & 0x0400) >> 10; 7723 bfd_vma upper = (upper_insn & 0x003f); 7724 bfd_vma J1 = (lower_insn & 0x2000) >> 13; 7725 bfd_vma J2 = (lower_insn & 0x0800) >> 11; 7726 bfd_vma lower = (lower_insn & 0x07ff); 7727 7728 upper |= J1 << 6; 7729 upper |= J2 << 7; 7730 upper |= (!S) << 8; 7731 upper -= 0x0100; /* Sign extend. */ 7732 7733 addend = (upper << 12) | (lower << 1); 7734 signed_addend = addend; 7735 } 7736 7737 /* Handle calls via the PLT. */ 7738 if (h != NULL && splt != NULL && h->plt.offset != (bfd_vma) -1) 7739 { 7740 value = (splt->output_section->vma 7741 + splt->output_offset 7742 + h->plt.offset); 7743 /* Target the Thumb stub before the ARM PLT entry. */ 7744 value -= PLT_THUMB_STUB_SIZE; 7745 *unresolved_reloc_p = FALSE; 7746 } 7747 7748 /* ??? Should handle interworking? GCC might someday try to 7749 use this for tail calls. */ 7750 7751 relocation = value + signed_addend; 7752 relocation -= (input_section->output_section->vma 7753 + input_section->output_offset 7754 + rel->r_offset); 7755 signed_check = (bfd_signed_vma) relocation; 7756 7757 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) 7758 overflow = TRUE; 7759 7760 /* Put RELOCATION back into the insn. */ 7761 { 7762 bfd_vma S = (relocation & 0x00100000) >> 20; 7763 bfd_vma J2 = (relocation & 0x00080000) >> 19; 7764 bfd_vma J1 = (relocation & 0x00040000) >> 18; 7765 bfd_vma hi = (relocation & 0x0003f000) >> 12; 7766 bfd_vma lo = (relocation & 0x00000ffe) >> 1; 7767 7768 upper_insn = (upper_insn & 0xfbc0) | (S << 10) | hi; 7769 lower_insn = (lower_insn & 0xd000) | (J1 << 13) | (J2 << 11) | lo; 7770 } 7771 7772 /* Put the relocated value back in the object file: */ 7773 bfd_put_16 (input_bfd, upper_insn, hit_data); 7774 bfd_put_16 (input_bfd, lower_insn, hit_data + 2); 7775 7776 return (overflow ? bfd_reloc_overflow : bfd_reloc_ok); 7777 } 7778 7779 case R_ARM_THM_JUMP11: 7780 case R_ARM_THM_JUMP8: 7781 case R_ARM_THM_JUMP6: 7782 /* Thumb B (branch) instruction). */ 7783 { 7784 bfd_signed_vma relocation; 7785 bfd_signed_vma reloc_signed_max = (1 << (howto->bitsize - 1)) - 1; 7786 bfd_signed_vma reloc_signed_min = ~ reloc_signed_max; 7787 bfd_signed_vma signed_check; 7788 7789 /* CZB cannot jump backward. */ 7790 if (r_type == R_ARM_THM_JUMP6) 7791 reloc_signed_min = 0; 7792 7793 if (globals->use_rel) 7794 { 7795 /* Need to refetch addend. */ 7796 addend = bfd_get_16 (input_bfd, hit_data) & howto->src_mask; 7797 if (addend & ((howto->src_mask + 1) >> 1)) 7798 { 7799 signed_addend = -1; 7800 signed_addend &= ~ howto->src_mask; 7801 signed_addend |= addend; 7802 } 7803 else 7804 signed_addend = addend; 7805 /* The value in the insn has been right shifted. We need to 7806 undo this, so that we can perform the address calculation 7807 in terms of bytes. */ 7808 signed_addend <<= howto->rightshift; 7809 } 7810 relocation = value + signed_addend; 7811 7812 relocation -= (input_section->output_section->vma 7813 + input_section->output_offset 7814 + rel->r_offset); 7815 7816 relocation >>= howto->rightshift; 7817 signed_check = relocation; 7818 7819 if (r_type == R_ARM_THM_JUMP6) 7820 relocation = ((relocation & 0x0020) << 4) | ((relocation & 0x001f) << 3); 7821 else 7822 relocation &= howto->dst_mask; 7823 relocation |= (bfd_get_16 (input_bfd, hit_data) & (~ howto->dst_mask)); 7824 7825 bfd_put_16 (input_bfd, relocation, hit_data); 7826 7827 /* Assumes two's complement. */ 7828 if (signed_check > reloc_signed_max || signed_check < reloc_signed_min) 7829 return bfd_reloc_overflow; 7830 7831 return bfd_reloc_ok; 7832 } 7833 7834 case R_ARM_ALU_PCREL7_0: 7835 case R_ARM_ALU_PCREL15_8: 7836 case R_ARM_ALU_PCREL23_15: 7837 { 7838 bfd_vma insn; 7839 bfd_vma relocation; 7840 7841 insn = bfd_get_32 (input_bfd, hit_data); 7842 if (globals->use_rel) 7843 { 7844 /* Extract the addend. */ 7845 addend = (insn & 0xff) << ((insn & 0xf00) >> 7); 7846 signed_addend = addend; 7847 } 7848 relocation = value + signed_addend; 7849 7850 relocation -= (input_section->output_section->vma 7851 + input_section->output_offset 7852 + rel->r_offset); 7853 insn = (insn & ~0xfff) 7854 | ((howto->bitpos << 7) & 0xf00) 7855 | ((relocation >> howto->bitpos) & 0xff); 7856 bfd_put_32 (input_bfd, value, hit_data); 7857 } 7858 return bfd_reloc_ok; 7859 7860 case R_ARM_GNU_VTINHERIT: 7861 case R_ARM_GNU_VTENTRY: 7862 return bfd_reloc_ok; 7863 7864 case R_ARM_GOTOFF32: 7865 /* Relocation is relative to the start of the 7866 global offset table. */ 7867 7868 BFD_ASSERT (sgot != NULL); 7869 if (sgot == NULL) 7870 return bfd_reloc_notsupported; 7871 7872 /* If we are addressing a Thumb function, we need to adjust the 7873 address by one, so that attempts to call the function pointer will 7874 correctly interpret it as Thumb code. */ 7875 if (sym_flags == STT_ARM_TFUNC) 7876 value += 1; 7877 7878 /* Note that sgot->output_offset is not involved in this 7879 calculation. We always want the start of .got. If we 7880 define _GLOBAL_OFFSET_TABLE in a different way, as is 7881 permitted by the ABI, we might have to change this 7882 calculation. */ 7883 value -= sgot->output_section->vma; 7884 return _bfd_final_link_relocate (howto, input_bfd, input_section, 7885 contents, rel->r_offset, value, 7886 rel->r_addend); 7887 7888 case R_ARM_GOTPC: 7889 /* Use global offset table as symbol value. */ 7890 BFD_ASSERT (sgot != NULL); 7891 7892 if (sgot == NULL) 7893 return bfd_reloc_notsupported; 7894 7895 *unresolved_reloc_p = FALSE; 7896 value = sgot->output_section->vma; 7897 return _bfd_final_link_relocate (howto, input_bfd, input_section, 7898 contents, rel->r_offset, value, 7899 rel->r_addend); 7900 7901 case R_ARM_GOT32: 7902 case R_ARM_GOT_PREL: 7903 /* Relocation is to the entry for this symbol in the 7904 global offset table. */ 7905 if (sgot == NULL) 7906 return bfd_reloc_notsupported; 7907 7908 if (h != NULL) 7909 { 7910 bfd_vma off; 7911 bfd_boolean dyn; 7912 7913 off = h->got.offset; 7914 BFD_ASSERT (off != (bfd_vma) -1); 7915 dyn = globals->root.dynamic_sections_created; 7916 7917 if (! WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) 7918 || (info->shared 7919 && SYMBOL_REFERENCES_LOCAL (info, h)) 7920 || (ELF_ST_VISIBILITY (h->other) 7921 && h->root.type == bfd_link_hash_undefweak)) 7922 { 7923 /* This is actually a static link, or it is a -Bsymbolic link 7924 and the symbol is defined locally. We must initialize this 7925 entry in the global offset table. Since the offset must 7926 always be a multiple of 4, we use the least significant bit 7927 to record whether we have initialized it already. 7928 7929 When doing a dynamic link, we create a .rel(a).got relocation 7930 entry to initialize the value. This is done in the 7931 finish_dynamic_symbol routine. */ 7932 if ((off & 1) != 0) 7933 off &= ~1; 7934 else 7935 { 7936 /* If we are addressing a Thumb function, we need to 7937 adjust the address by one, so that attempts to 7938 call the function pointer will correctly 7939 interpret it as Thumb code. */ 7940 if (sym_flags == STT_ARM_TFUNC) 7941 value |= 1; 7942 7943 bfd_put_32 (output_bfd, value, sgot->contents + off); 7944 h->got.offset |= 1; 7945 } 7946 } 7947 else 7948 *unresolved_reloc_p = FALSE; 7949 7950 value = sgot->output_offset + off; 7951 } 7952 else 7953 { 7954 bfd_vma off; 7955 7956 BFD_ASSERT (local_got_offsets != NULL && 7957 local_got_offsets[r_symndx] != (bfd_vma) -1); 7958 7959 off = local_got_offsets[r_symndx]; 7960 7961 /* The offset must always be a multiple of 4. We use the 7962 least significant bit to record whether we have already 7963 generated the necessary reloc. */ 7964 if ((off & 1) != 0) 7965 off &= ~1; 7966 else 7967 { 7968 /* If we are addressing a Thumb function, we need to 7969 adjust the address by one, so that attempts to 7970 call the function pointer will correctly 7971 interpret it as Thumb code. */ 7972 if (sym_flags == STT_ARM_TFUNC) 7973 value |= 1; 7974 7975 if (globals->use_rel) 7976 bfd_put_32 (output_bfd, value, sgot->contents + off); 7977 7978 if (info->shared) 7979 { 7980 asection * srelgot; 7981 Elf_Internal_Rela outrel; 7982 bfd_byte *loc; 7983 7984 srelgot = (bfd_get_section_by_name 7985 (dynobj, RELOC_SECTION (globals, ".got"))); 7986 BFD_ASSERT (srelgot != NULL); 7987 7988 outrel.r_addend = addend + value; 7989 outrel.r_offset = (sgot->output_section->vma 7990 + sgot->output_offset 7991 + off); 7992 outrel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); 7993 loc = srelgot->contents; 7994 loc += srelgot->reloc_count++ * RELOC_SIZE (globals); 7995 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 7996 } 7997 7998 local_got_offsets[r_symndx] |= 1; 7999 } 8000 8001 value = sgot->output_offset + off; 8002 } 8003 if (r_type != R_ARM_GOT32) 8004 value += sgot->output_section->vma; 8005 8006 return _bfd_final_link_relocate (howto, input_bfd, input_section, 8007 contents, rel->r_offset, value, 8008 rel->r_addend); 8009 8010 case R_ARM_TLS_LDO32: 8011 value = value - dtpoff_base (info); 8012 8013 return _bfd_final_link_relocate (howto, input_bfd, input_section, 8014 contents, rel->r_offset, value, 8015 rel->r_addend); 8016 8017 case R_ARM_TLS_LDM32: 8018 { 8019 bfd_vma off; 8020 8021 if (globals->sgot == NULL) 8022 abort (); 8023 8024 off = globals->tls_ldm_got.offset; 8025 8026 if ((off & 1) != 0) 8027 off &= ~1; 8028 else 8029 { 8030 /* If we don't know the module number, create a relocation 8031 for it. */ 8032 if (info->shared) 8033 { 8034 Elf_Internal_Rela outrel; 8035 bfd_byte *loc; 8036 8037 if (globals->srelgot == NULL) 8038 abort (); 8039 8040 outrel.r_addend = 0; 8041 outrel.r_offset = (globals->sgot->output_section->vma 8042 + globals->sgot->output_offset + off); 8043 outrel.r_info = ELF32_R_INFO (0, R_ARM_TLS_DTPMOD32); 8044 8045 if (globals->use_rel) 8046 bfd_put_32 (output_bfd, outrel.r_addend, 8047 globals->sgot->contents + off); 8048 8049 loc = globals->srelgot->contents; 8050 loc += globals->srelgot->reloc_count++ * RELOC_SIZE (globals); 8051 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 8052 } 8053 else 8054 bfd_put_32 (output_bfd, 1, globals->sgot->contents + off); 8055 8056 globals->tls_ldm_got.offset |= 1; 8057 } 8058 8059 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off 8060 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); 8061 8062 return _bfd_final_link_relocate (howto, input_bfd, input_section, 8063 contents, rel->r_offset, value, 8064 rel->r_addend); 8065 } 8066 8067 case R_ARM_TLS_GD32: 8068 case R_ARM_TLS_IE32: 8069 { 8070 bfd_vma off; 8071 int indx; 8072 char tls_type; 8073 8074 if (globals->sgot == NULL) 8075 abort (); 8076 8077 indx = 0; 8078 if (h != NULL) 8079 { 8080 bfd_boolean dyn; 8081 dyn = globals->root.dynamic_sections_created; 8082 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) 8083 && (!info->shared 8084 || !SYMBOL_REFERENCES_LOCAL (info, h))) 8085 { 8086 *unresolved_reloc_p = FALSE; 8087 indx = h->dynindx; 8088 } 8089 off = h->got.offset; 8090 tls_type = ((struct elf32_arm_link_hash_entry *) h)->tls_type; 8091 } 8092 else 8093 { 8094 if (local_got_offsets == NULL) 8095 abort (); 8096 off = local_got_offsets[r_symndx]; 8097 tls_type = elf32_arm_local_got_tls_type (input_bfd)[r_symndx]; 8098 } 8099 8100 if (tls_type == GOT_UNKNOWN) 8101 abort (); 8102 8103 if ((off & 1) != 0) 8104 off &= ~1; 8105 else 8106 { 8107 bfd_boolean need_relocs = FALSE; 8108 Elf_Internal_Rela outrel; 8109 bfd_byte *loc = NULL; 8110 int cur_off = off; 8111 8112 /* The GOT entries have not been initialized yet. Do it 8113 now, and emit any relocations. If both an IE GOT and a 8114 GD GOT are necessary, we emit the GD first. */ 8115 8116 if ((info->shared || indx != 0) 8117 && (h == NULL 8118 || ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 8119 || h->root.type != bfd_link_hash_undefweak)) 8120 { 8121 need_relocs = TRUE; 8122 if (globals->srelgot == NULL) 8123 abort (); 8124 loc = globals->srelgot->contents; 8125 loc += globals->srelgot->reloc_count * RELOC_SIZE (globals); 8126 } 8127 8128 if (tls_type & GOT_TLS_GD) 8129 { 8130 if (need_relocs) 8131 { 8132 outrel.r_addend = 0; 8133 outrel.r_offset = (globals->sgot->output_section->vma 8134 + globals->sgot->output_offset 8135 + cur_off); 8136 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_DTPMOD32); 8137 8138 if (globals->use_rel) 8139 bfd_put_32 (output_bfd, outrel.r_addend, 8140 globals->sgot->contents + cur_off); 8141 8142 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 8143 globals->srelgot->reloc_count++; 8144 loc += RELOC_SIZE (globals); 8145 8146 if (indx == 0) 8147 bfd_put_32 (output_bfd, value - dtpoff_base (info), 8148 globals->sgot->contents + cur_off + 4); 8149 else 8150 { 8151 outrel.r_addend = 0; 8152 outrel.r_info = ELF32_R_INFO (indx, 8153 R_ARM_TLS_DTPOFF32); 8154 outrel.r_offset += 4; 8155 8156 if (globals->use_rel) 8157 bfd_put_32 (output_bfd, outrel.r_addend, 8158 globals->sgot->contents + cur_off + 4); 8159 8160 8161 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 8162 globals->srelgot->reloc_count++; 8163 loc += RELOC_SIZE (globals); 8164 } 8165 } 8166 else 8167 { 8168 /* If we are not emitting relocations for a 8169 general dynamic reference, then we must be in a 8170 static link or an executable link with the 8171 symbol binding locally. Mark it as belonging 8172 to module 1, the executable. */ 8173 bfd_put_32 (output_bfd, 1, 8174 globals->sgot->contents + cur_off); 8175 bfd_put_32 (output_bfd, value - dtpoff_base (info), 8176 globals->sgot->contents + cur_off + 4); 8177 } 8178 8179 cur_off += 8; 8180 } 8181 8182 if (tls_type & GOT_TLS_IE) 8183 { 8184 if (need_relocs) 8185 { 8186 if (indx == 0) 8187 outrel.r_addend = value - dtpoff_base (info); 8188 else 8189 outrel.r_addend = 0; 8190 outrel.r_offset = (globals->sgot->output_section->vma 8191 + globals->sgot->output_offset 8192 + cur_off); 8193 outrel.r_info = ELF32_R_INFO (indx, R_ARM_TLS_TPOFF32); 8194 8195 if (globals->use_rel) 8196 bfd_put_32 (output_bfd, outrel.r_addend, 8197 globals->sgot->contents + cur_off); 8198 8199 SWAP_RELOC_OUT (globals) (output_bfd, &outrel, loc); 8200 globals->srelgot->reloc_count++; 8201 loc += RELOC_SIZE (globals); 8202 } 8203 else 8204 bfd_put_32 (output_bfd, tpoff (info, value), 8205 globals->sgot->contents + cur_off); 8206 cur_off += 4; 8207 } 8208 8209 if (h != NULL) 8210 h->got.offset |= 1; 8211 else 8212 local_got_offsets[r_symndx] |= 1; 8213 } 8214 8215 if ((tls_type & GOT_TLS_GD) && r_type != R_ARM_TLS_GD32) 8216 off += 8; 8217 value = globals->sgot->output_section->vma + globals->sgot->output_offset + off 8218 - (input_section->output_section->vma + input_section->output_offset + rel->r_offset); 8219 8220 return _bfd_final_link_relocate (howto, input_bfd, input_section, 8221 contents, rel->r_offset, value, 8222 rel->r_addend); 8223 } 8224 8225 case R_ARM_TLS_LE32: 8226 if (info->shared) 8227 { 8228 (*_bfd_error_handler) 8229 (_("%B(%A+0x%lx): R_ARM_TLS_LE32 relocation not permitted in shared object"), 8230 input_bfd, input_section, 8231 (long) rel->r_offset, howto->name); 8232 return (bfd_reloc_status_type) FALSE; 8233 } 8234 else 8235 value = tpoff (info, value); 8236 8237 return _bfd_final_link_relocate (howto, input_bfd, input_section, 8238 contents, rel->r_offset, value, 8239 rel->r_addend); 8240 8241 case R_ARM_V4BX: 8242 if (globals->fix_v4bx) 8243 { 8244 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8245 8246 /* Ensure that we have a BX instruction. */ 8247 BFD_ASSERT ((insn & 0x0ffffff0) == 0x012fff10); 8248 8249 if (globals->fix_v4bx == 2 && (insn & 0xf) != 0xf) 8250 { 8251 /* Branch to veneer. */ 8252 bfd_vma glue_addr; 8253 glue_addr = elf32_arm_bx_glue (info, insn & 0xf); 8254 glue_addr -= input_section->output_section->vma 8255 + input_section->output_offset 8256 + rel->r_offset + 8; 8257 insn = (insn & 0xf0000000) | 0x0a000000 8258 | ((glue_addr >> 2) & 0x00ffffff); 8259 } 8260 else 8261 { 8262 /* Preserve Rm (lowest four bits) and the condition code 8263 (highest four bits). Other bits encode MOV PC,Rm. */ 8264 insn = (insn & 0xf000000f) | 0x01a0f000; 8265 } 8266 8267 bfd_put_32 (input_bfd, insn, hit_data); 8268 } 8269 return bfd_reloc_ok; 8270 8271 case R_ARM_MOVW_ABS_NC: 8272 case R_ARM_MOVT_ABS: 8273 case R_ARM_MOVW_PREL_NC: 8274 case R_ARM_MOVT_PREL: 8275 /* Until we properly support segment-base-relative addressing then 8276 we assume the segment base to be zero, as for the group relocations. 8277 Thus R_ARM_MOVW_BREL_NC has the same semantics as R_ARM_MOVW_ABS_NC 8278 and R_ARM_MOVT_BREL has the same semantics as R_ARM_MOVT_ABS. */ 8279 case R_ARM_MOVW_BREL_NC: 8280 case R_ARM_MOVW_BREL: 8281 case R_ARM_MOVT_BREL: 8282 { 8283 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8284 8285 if (globals->use_rel) 8286 { 8287 addend = ((insn >> 4) & 0xf000) | (insn & 0xfff); 8288 signed_addend = (addend ^ 0x8000) - 0x8000; 8289 } 8290 8291 value += signed_addend; 8292 8293 if (r_type == R_ARM_MOVW_PREL_NC || r_type == R_ARM_MOVT_PREL) 8294 value -= (input_section->output_section->vma 8295 + input_section->output_offset + rel->r_offset); 8296 8297 if (r_type == R_ARM_MOVW_BREL && value >= 0x10000) 8298 return bfd_reloc_overflow; 8299 8300 if (sym_flags == STT_ARM_TFUNC) 8301 value |= 1; 8302 8303 if (r_type == R_ARM_MOVT_ABS || r_type == R_ARM_MOVT_PREL 8304 || r_type == R_ARM_MOVT_BREL) 8305 value >>= 16; 8306 8307 insn &= 0xfff0f000; 8308 insn |= value & 0xfff; 8309 insn |= (value & 0xf000) << 4; 8310 bfd_put_32 (input_bfd, insn, hit_data); 8311 } 8312 return bfd_reloc_ok; 8313 8314 case R_ARM_THM_MOVW_ABS_NC: 8315 case R_ARM_THM_MOVT_ABS: 8316 case R_ARM_THM_MOVW_PREL_NC: 8317 case R_ARM_THM_MOVT_PREL: 8318 /* Until we properly support segment-base-relative addressing then 8319 we assume the segment base to be zero, as for the above relocations. 8320 Thus R_ARM_THM_MOVW_BREL_NC has the same semantics as 8321 R_ARM_THM_MOVW_ABS_NC and R_ARM_THM_MOVT_BREL has the same semantics 8322 as R_ARM_THM_MOVT_ABS. */ 8323 case R_ARM_THM_MOVW_BREL_NC: 8324 case R_ARM_THM_MOVW_BREL: 8325 case R_ARM_THM_MOVT_BREL: 8326 { 8327 bfd_vma insn; 8328 8329 insn = bfd_get_16 (input_bfd, hit_data) << 16; 8330 insn |= bfd_get_16 (input_bfd, hit_data + 2); 8331 8332 if (globals->use_rel) 8333 { 8334 addend = ((insn >> 4) & 0xf000) 8335 | ((insn >> 15) & 0x0800) 8336 | ((insn >> 4) & 0x0700) 8337 | (insn & 0x00ff); 8338 signed_addend = (addend ^ 0x8000) - 0x8000; 8339 } 8340 8341 value += signed_addend; 8342 8343 if (r_type == R_ARM_THM_MOVW_PREL_NC || r_type == R_ARM_THM_MOVT_PREL) 8344 value -= (input_section->output_section->vma 8345 + input_section->output_offset + rel->r_offset); 8346 8347 if (r_type == R_ARM_THM_MOVW_BREL && value >= 0x10000) 8348 return bfd_reloc_overflow; 8349 8350 if (sym_flags == STT_ARM_TFUNC) 8351 value |= 1; 8352 8353 if (r_type == R_ARM_THM_MOVT_ABS || r_type == R_ARM_THM_MOVT_PREL 8354 || r_type == R_ARM_THM_MOVT_BREL) 8355 value >>= 16; 8356 8357 insn &= 0xfbf08f00; 8358 insn |= (value & 0xf000) << 4; 8359 insn |= (value & 0x0800) << 15; 8360 insn |= (value & 0x0700) << 4; 8361 insn |= (value & 0x00ff); 8362 8363 bfd_put_16 (input_bfd, insn >> 16, hit_data); 8364 bfd_put_16 (input_bfd, insn & 0xffff, hit_data + 2); 8365 } 8366 return bfd_reloc_ok; 8367 8368 case R_ARM_ALU_PC_G0_NC: 8369 case R_ARM_ALU_PC_G1_NC: 8370 case R_ARM_ALU_PC_G0: 8371 case R_ARM_ALU_PC_G1: 8372 case R_ARM_ALU_PC_G2: 8373 case R_ARM_ALU_SB_G0_NC: 8374 case R_ARM_ALU_SB_G1_NC: 8375 case R_ARM_ALU_SB_G0: 8376 case R_ARM_ALU_SB_G1: 8377 case R_ARM_ALU_SB_G2: 8378 { 8379 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8380 bfd_vma pc = input_section->output_section->vma 8381 + input_section->output_offset + rel->r_offset; 8382 /* sb should be the origin of the *segment* containing the symbol. 8383 It is not clear how to obtain this OS-dependent value, so we 8384 make an arbitrary choice of zero. */ 8385 bfd_vma sb = 0; 8386 bfd_vma residual; 8387 bfd_vma g_n; 8388 bfd_signed_vma signed_value; 8389 int group = 0; 8390 8391 /* Determine which group of bits to select. */ 8392 switch (r_type) 8393 { 8394 case R_ARM_ALU_PC_G0_NC: 8395 case R_ARM_ALU_PC_G0: 8396 case R_ARM_ALU_SB_G0_NC: 8397 case R_ARM_ALU_SB_G0: 8398 group = 0; 8399 break; 8400 8401 case R_ARM_ALU_PC_G1_NC: 8402 case R_ARM_ALU_PC_G1: 8403 case R_ARM_ALU_SB_G1_NC: 8404 case R_ARM_ALU_SB_G1: 8405 group = 1; 8406 break; 8407 8408 case R_ARM_ALU_PC_G2: 8409 case R_ARM_ALU_SB_G2: 8410 group = 2; 8411 break; 8412 8413 default: 8414 abort (); 8415 } 8416 8417 /* If REL, extract the addend from the insn. If RELA, it will 8418 have already been fetched for us. */ 8419 if (globals->use_rel) 8420 { 8421 int negative; 8422 bfd_vma constant = insn & 0xff; 8423 bfd_vma rotation = (insn & 0xf00) >> 8; 8424 8425 if (rotation == 0) 8426 signed_addend = constant; 8427 else 8428 { 8429 /* Compensate for the fact that in the instruction, the 8430 rotation is stored in multiples of 2 bits. */ 8431 rotation *= 2; 8432 8433 /* Rotate "constant" right by "rotation" bits. */ 8434 signed_addend = (constant >> rotation) | 8435 (constant << (8 * sizeof (bfd_vma) - rotation)); 8436 } 8437 8438 /* Determine if the instruction is an ADD or a SUB. 8439 (For REL, this determines the sign of the addend.) */ 8440 negative = identify_add_or_sub (insn); 8441 if (negative == 0) 8442 { 8443 (*_bfd_error_handler) 8444 (_("%B(%A+0x%lx): Only ADD or SUB instructions are allowed for ALU group relocations"), 8445 input_bfd, input_section, 8446 (long) rel->r_offset, howto->name); 8447 return bfd_reloc_overflow; 8448 } 8449 8450 signed_addend *= negative; 8451 } 8452 8453 /* Compute the value (X) to go in the place. */ 8454 if (r_type == R_ARM_ALU_PC_G0_NC 8455 || r_type == R_ARM_ALU_PC_G1_NC 8456 || r_type == R_ARM_ALU_PC_G0 8457 || r_type == R_ARM_ALU_PC_G1 8458 || r_type == R_ARM_ALU_PC_G2) 8459 /* PC relative. */ 8460 signed_value = value - pc + signed_addend; 8461 else 8462 /* Section base relative. */ 8463 signed_value = value - sb + signed_addend; 8464 8465 /* If the target symbol is a Thumb function, then set the 8466 Thumb bit in the address. */ 8467 if (sym_flags == STT_ARM_TFUNC) 8468 signed_value |= 1; 8469 8470 /* Calculate the value of the relevant G_n, in encoded 8471 constant-with-rotation format. */ 8472 g_n = calculate_group_reloc_mask (abs (signed_value), group, 8473 &residual); 8474 8475 /* Check for overflow if required. */ 8476 if ((r_type == R_ARM_ALU_PC_G0 8477 || r_type == R_ARM_ALU_PC_G1 8478 || r_type == R_ARM_ALU_PC_G2 8479 || r_type == R_ARM_ALU_SB_G0 8480 || r_type == R_ARM_ALU_SB_G1 8481 || r_type == R_ARM_ALU_SB_G2) && residual != 0) 8482 { 8483 (*_bfd_error_handler) 8484 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), 8485 input_bfd, input_section, 8486 (long) rel->r_offset, abs (signed_value), howto->name); 8487 return bfd_reloc_overflow; 8488 } 8489 8490 /* Mask out the value and the ADD/SUB part of the opcode; take care 8491 not to destroy the S bit. */ 8492 insn &= 0xff1ff000; 8493 8494 /* Set the opcode according to whether the value to go in the 8495 place is negative. */ 8496 if (signed_value < 0) 8497 insn |= 1 << 22; 8498 else 8499 insn |= 1 << 23; 8500 8501 /* Encode the offset. */ 8502 insn |= g_n; 8503 8504 bfd_put_32 (input_bfd, insn, hit_data); 8505 } 8506 return bfd_reloc_ok; 8507 8508 case R_ARM_LDR_PC_G0: 8509 case R_ARM_LDR_PC_G1: 8510 case R_ARM_LDR_PC_G2: 8511 case R_ARM_LDR_SB_G0: 8512 case R_ARM_LDR_SB_G1: 8513 case R_ARM_LDR_SB_G2: 8514 { 8515 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8516 bfd_vma pc = input_section->output_section->vma 8517 + input_section->output_offset + rel->r_offset; 8518 bfd_vma sb = 0; /* See note above. */ 8519 bfd_vma residual; 8520 bfd_signed_vma signed_value; 8521 int group = 0; 8522 8523 /* Determine which groups of bits to calculate. */ 8524 switch (r_type) 8525 { 8526 case R_ARM_LDR_PC_G0: 8527 case R_ARM_LDR_SB_G0: 8528 group = 0; 8529 break; 8530 8531 case R_ARM_LDR_PC_G1: 8532 case R_ARM_LDR_SB_G1: 8533 group = 1; 8534 break; 8535 8536 case R_ARM_LDR_PC_G2: 8537 case R_ARM_LDR_SB_G2: 8538 group = 2; 8539 break; 8540 8541 default: 8542 abort (); 8543 } 8544 8545 /* If REL, extract the addend from the insn. If RELA, it will 8546 have already been fetched for us. */ 8547 if (globals->use_rel) 8548 { 8549 int negative = (insn & (1 << 23)) ? 1 : -1; 8550 signed_addend = negative * (insn & 0xfff); 8551 } 8552 8553 /* Compute the value (X) to go in the place. */ 8554 if (r_type == R_ARM_LDR_PC_G0 8555 || r_type == R_ARM_LDR_PC_G1 8556 || r_type == R_ARM_LDR_PC_G2) 8557 /* PC relative. */ 8558 signed_value = value - pc + signed_addend; 8559 else 8560 /* Section base relative. */ 8561 signed_value = value - sb + signed_addend; 8562 8563 /* Calculate the value of the relevant G_{n-1} to obtain 8564 the residual at that stage. */ 8565 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); 8566 8567 /* Check for overflow. */ 8568 if (residual >= 0x1000) 8569 { 8570 (*_bfd_error_handler) 8571 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), 8572 input_bfd, input_section, 8573 (long) rel->r_offset, abs (signed_value), howto->name); 8574 return bfd_reloc_overflow; 8575 } 8576 8577 /* Mask out the value and U bit. */ 8578 insn &= 0xff7ff000; 8579 8580 /* Set the U bit if the value to go in the place is non-negative. */ 8581 if (signed_value >= 0) 8582 insn |= 1 << 23; 8583 8584 /* Encode the offset. */ 8585 insn |= residual; 8586 8587 bfd_put_32 (input_bfd, insn, hit_data); 8588 } 8589 return bfd_reloc_ok; 8590 8591 case R_ARM_LDRS_PC_G0: 8592 case R_ARM_LDRS_PC_G1: 8593 case R_ARM_LDRS_PC_G2: 8594 case R_ARM_LDRS_SB_G0: 8595 case R_ARM_LDRS_SB_G1: 8596 case R_ARM_LDRS_SB_G2: 8597 { 8598 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8599 bfd_vma pc = input_section->output_section->vma 8600 + input_section->output_offset + rel->r_offset; 8601 bfd_vma sb = 0; /* See note above. */ 8602 bfd_vma residual; 8603 bfd_signed_vma signed_value; 8604 int group = 0; 8605 8606 /* Determine which groups of bits to calculate. */ 8607 switch (r_type) 8608 { 8609 case R_ARM_LDRS_PC_G0: 8610 case R_ARM_LDRS_SB_G0: 8611 group = 0; 8612 break; 8613 8614 case R_ARM_LDRS_PC_G1: 8615 case R_ARM_LDRS_SB_G1: 8616 group = 1; 8617 break; 8618 8619 case R_ARM_LDRS_PC_G2: 8620 case R_ARM_LDRS_SB_G2: 8621 group = 2; 8622 break; 8623 8624 default: 8625 abort (); 8626 } 8627 8628 /* If REL, extract the addend from the insn. If RELA, it will 8629 have already been fetched for us. */ 8630 if (globals->use_rel) 8631 { 8632 int negative = (insn & (1 << 23)) ? 1 : -1; 8633 signed_addend = negative * (((insn & 0xf00) >> 4) + (insn & 0xf)); 8634 } 8635 8636 /* Compute the value (X) to go in the place. */ 8637 if (r_type == R_ARM_LDRS_PC_G0 8638 || r_type == R_ARM_LDRS_PC_G1 8639 || r_type == R_ARM_LDRS_PC_G2) 8640 /* PC relative. */ 8641 signed_value = value - pc + signed_addend; 8642 else 8643 /* Section base relative. */ 8644 signed_value = value - sb + signed_addend; 8645 8646 /* Calculate the value of the relevant G_{n-1} to obtain 8647 the residual at that stage. */ 8648 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); 8649 8650 /* Check for overflow. */ 8651 if (residual >= 0x100) 8652 { 8653 (*_bfd_error_handler) 8654 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), 8655 input_bfd, input_section, 8656 (long) rel->r_offset, abs (signed_value), howto->name); 8657 return bfd_reloc_overflow; 8658 } 8659 8660 /* Mask out the value and U bit. */ 8661 insn &= 0xff7ff0f0; 8662 8663 /* Set the U bit if the value to go in the place is non-negative. */ 8664 if (signed_value >= 0) 8665 insn |= 1 << 23; 8666 8667 /* Encode the offset. */ 8668 insn |= ((residual & 0xf0) << 4) | (residual & 0xf); 8669 8670 bfd_put_32 (input_bfd, insn, hit_data); 8671 } 8672 return bfd_reloc_ok; 8673 8674 case R_ARM_LDC_PC_G0: 8675 case R_ARM_LDC_PC_G1: 8676 case R_ARM_LDC_PC_G2: 8677 case R_ARM_LDC_SB_G0: 8678 case R_ARM_LDC_SB_G1: 8679 case R_ARM_LDC_SB_G2: 8680 { 8681 bfd_vma insn = bfd_get_32 (input_bfd, hit_data); 8682 bfd_vma pc = input_section->output_section->vma 8683 + input_section->output_offset + rel->r_offset; 8684 bfd_vma sb = 0; /* See note above. */ 8685 bfd_vma residual; 8686 bfd_signed_vma signed_value; 8687 int group = 0; 8688 8689 /* Determine which groups of bits to calculate. */ 8690 switch (r_type) 8691 { 8692 case R_ARM_LDC_PC_G0: 8693 case R_ARM_LDC_SB_G0: 8694 group = 0; 8695 break; 8696 8697 case R_ARM_LDC_PC_G1: 8698 case R_ARM_LDC_SB_G1: 8699 group = 1; 8700 break; 8701 8702 case R_ARM_LDC_PC_G2: 8703 case R_ARM_LDC_SB_G2: 8704 group = 2; 8705 break; 8706 8707 default: 8708 abort (); 8709 } 8710 8711 /* If REL, extract the addend from the insn. If RELA, it will 8712 have already been fetched for us. */ 8713 if (globals->use_rel) 8714 { 8715 int negative = (insn & (1 << 23)) ? 1 : -1; 8716 signed_addend = negative * ((insn & 0xff) << 2); 8717 } 8718 8719 /* Compute the value (X) to go in the place. */ 8720 if (r_type == R_ARM_LDC_PC_G0 8721 || r_type == R_ARM_LDC_PC_G1 8722 || r_type == R_ARM_LDC_PC_G2) 8723 /* PC relative. */ 8724 signed_value = value - pc + signed_addend; 8725 else 8726 /* Section base relative. */ 8727 signed_value = value - sb + signed_addend; 8728 8729 /* Calculate the value of the relevant G_{n-1} to obtain 8730 the residual at that stage. */ 8731 calculate_group_reloc_mask (abs (signed_value), group - 1, &residual); 8732 8733 /* Check for overflow. (The absolute value to go in the place must be 8734 divisible by four and, after having been divided by four, must 8735 fit in eight bits.) */ 8736 if ((residual & 0x3) != 0 || residual >= 0x400) 8737 { 8738 (*_bfd_error_handler) 8739 (_("%B(%A+0x%lx): Overflow whilst splitting 0x%lx for group relocation %s"), 8740 input_bfd, input_section, 8741 (long) rel->r_offset, abs (signed_value), howto->name); 8742 return bfd_reloc_overflow; 8743 } 8744 8745 /* Mask out the value and U bit. */ 8746 insn &= 0xff7fff00; 8747 8748 /* Set the U bit if the value to go in the place is non-negative. */ 8749 if (signed_value >= 0) 8750 insn |= 1 << 23; 8751 8752 /* Encode the offset. */ 8753 insn |= residual >> 2; 8754 8755 bfd_put_32 (input_bfd, insn, hit_data); 8756 } 8757 return bfd_reloc_ok; 8758 8759 default: 8760 return bfd_reloc_notsupported; 8761 } 8762 } 8763 8764 /* Add INCREMENT to the reloc (of type HOWTO) at ADDRESS. */ 8765 static void 8766 arm_add_to_rel (bfd * abfd, 8767 bfd_byte * address, 8768 reloc_howto_type * howto, 8769 bfd_signed_vma increment) 8770 { 8771 bfd_signed_vma addend; 8772 8773 if (howto->type == R_ARM_THM_CALL 8774 || howto->type == R_ARM_THM_JUMP24) 8775 { 8776 int upper_insn, lower_insn; 8777 int upper, lower; 8778 8779 upper_insn = bfd_get_16 (abfd, address); 8780 lower_insn = bfd_get_16 (abfd, address + 2); 8781 upper = upper_insn & 0x7ff; 8782 lower = lower_insn & 0x7ff; 8783 8784 addend = (upper << 12) | (lower << 1); 8785 addend += increment; 8786 addend >>= 1; 8787 8788 upper_insn = (upper_insn & 0xf800) | ((addend >> 11) & 0x7ff); 8789 lower_insn = (lower_insn & 0xf800) | (addend & 0x7ff); 8790 8791 bfd_put_16 (abfd, (bfd_vma) upper_insn, address); 8792 bfd_put_16 (abfd, (bfd_vma) lower_insn, address + 2); 8793 } 8794 else 8795 { 8796 bfd_vma contents; 8797 8798 contents = bfd_get_32 (abfd, address); 8799 8800 /* Get the (signed) value from the instruction. */ 8801 addend = contents & howto->src_mask; 8802 if (addend & ((howto->src_mask + 1) >> 1)) 8803 { 8804 bfd_signed_vma mask; 8805 8806 mask = -1; 8807 mask &= ~ howto->src_mask; 8808 addend |= mask; 8809 } 8810 8811 /* Add in the increment, (which is a byte value). */ 8812 switch (howto->type) 8813 { 8814 default: 8815 addend += increment; 8816 break; 8817 8818 case R_ARM_PC24: 8819 case R_ARM_PLT32: 8820 case R_ARM_CALL: 8821 case R_ARM_JUMP24: 8822 addend <<= howto->size; 8823 addend += increment; 8824 8825 /* Should we check for overflow here ? */ 8826 8827 /* Drop any undesired bits. */ 8828 addend >>= howto->rightshift; 8829 break; 8830 } 8831 8832 contents = (contents & ~ howto->dst_mask) | (addend & howto->dst_mask); 8833 8834 bfd_put_32 (abfd, contents, address); 8835 } 8836 } 8837 8838 #define IS_ARM_TLS_RELOC(R_TYPE) \ 8839 ((R_TYPE) == R_ARM_TLS_GD32 \ 8840 || (R_TYPE) == R_ARM_TLS_LDO32 \ 8841 || (R_TYPE) == R_ARM_TLS_LDM32 \ 8842 || (R_TYPE) == R_ARM_TLS_DTPOFF32 \ 8843 || (R_TYPE) == R_ARM_TLS_DTPMOD32 \ 8844 || (R_TYPE) == R_ARM_TLS_TPOFF32 \ 8845 || (R_TYPE) == R_ARM_TLS_LE32 \ 8846 || (R_TYPE) == R_ARM_TLS_IE32) 8847 8848 /* Relocate an ARM ELF section. */ 8849 8850 static bfd_boolean 8851 elf32_arm_relocate_section (bfd * output_bfd, 8852 struct bfd_link_info * info, 8853 bfd * input_bfd, 8854 asection * input_section, 8855 bfd_byte * contents, 8856 Elf_Internal_Rela * relocs, 8857 Elf_Internal_Sym * local_syms, 8858 asection ** local_sections) 8859 { 8860 Elf_Internal_Shdr *symtab_hdr; 8861 struct elf_link_hash_entry **sym_hashes; 8862 Elf_Internal_Rela *rel; 8863 Elf_Internal_Rela *relend; 8864 const char *name; 8865 struct elf32_arm_link_hash_table * globals; 8866 8867 globals = elf32_arm_hash_table (info); 8868 if (globals == NULL) 8869 return FALSE; 8870 8871 symtab_hdr = & elf_symtab_hdr (input_bfd); 8872 sym_hashes = elf_sym_hashes (input_bfd); 8873 8874 rel = relocs; 8875 relend = relocs + input_section->reloc_count; 8876 for (; rel < relend; rel++) 8877 { 8878 int r_type; 8879 reloc_howto_type * howto; 8880 unsigned long r_symndx; 8881 Elf_Internal_Sym * sym; 8882 asection * sec; 8883 struct elf_link_hash_entry * h; 8884 bfd_vma relocation; 8885 bfd_reloc_status_type r; 8886 arelent bfd_reloc; 8887 char sym_type; 8888 bfd_boolean unresolved_reloc = FALSE; 8889 char *error_message = NULL; 8890 8891 r_symndx = ELF32_R_SYM (rel->r_info); 8892 r_type = ELF32_R_TYPE (rel->r_info); 8893 r_type = arm_real_reloc_type (globals, r_type); 8894 8895 if ( r_type == R_ARM_GNU_VTENTRY 8896 || r_type == R_ARM_GNU_VTINHERIT) 8897 continue; 8898 8899 bfd_reloc.howto = elf32_arm_howto_from_type (r_type); 8900 howto = bfd_reloc.howto; 8901 8902 h = NULL; 8903 sym = NULL; 8904 sec = NULL; 8905 8906 if (r_symndx < symtab_hdr->sh_info) 8907 { 8908 sym = local_syms + r_symndx; 8909 sym_type = ELF32_ST_TYPE (sym->st_info); 8910 sec = local_sections[r_symndx]; 8911 8912 /* An object file might have a reference to a local 8913 undefined symbol. This is a daft object file, but we 8914 should at least do something about it. V4BX & NONE 8915 relocations do not use the symbol and are explicitly 8916 allowed to use the undefined symbol, so allow those. 8917 Likewise for relocations against STN_UNDEF. */ 8918 if (r_type != R_ARM_V4BX 8919 && r_type != R_ARM_NONE 8920 && r_symndx != STN_UNDEF 8921 && bfd_is_und_section (sec) 8922 && ELF_ST_BIND (sym->st_info) != STB_WEAK) 8923 { 8924 if (!info->callbacks->undefined_symbol 8925 (info, bfd_elf_string_from_elf_section 8926 (input_bfd, symtab_hdr->sh_link, sym->st_name), 8927 input_bfd, input_section, 8928 rel->r_offset, TRUE)) 8929 return FALSE; 8930 } 8931 8932 if (globals->use_rel) 8933 { 8934 relocation = (sec->output_section->vma 8935 + sec->output_offset 8936 + sym->st_value); 8937 if (!info->relocatable 8938 && (sec->flags & SEC_MERGE) 8939 && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 8940 { 8941 asection *msec; 8942 bfd_vma addend, value; 8943 8944 switch (r_type) 8945 { 8946 case R_ARM_MOVW_ABS_NC: 8947 case R_ARM_MOVT_ABS: 8948 value = bfd_get_32 (input_bfd, contents + rel->r_offset); 8949 addend = ((value & 0xf0000) >> 4) | (value & 0xfff); 8950 addend = (addend ^ 0x8000) - 0x8000; 8951 break; 8952 8953 case R_ARM_THM_MOVW_ABS_NC: 8954 case R_ARM_THM_MOVT_ABS: 8955 value = bfd_get_16 (input_bfd, contents + rel->r_offset) 8956 << 16; 8957 value |= bfd_get_16 (input_bfd, 8958 contents + rel->r_offset + 2); 8959 addend = ((value & 0xf7000) >> 4) | (value & 0xff) 8960 | ((value & 0x04000000) >> 15); 8961 addend = (addend ^ 0x8000) - 0x8000; 8962 break; 8963 8964 default: 8965 if (howto->rightshift 8966 || (howto->src_mask & (howto->src_mask + 1))) 8967 { 8968 (*_bfd_error_handler) 8969 (_("%B(%A+0x%lx): %s relocation against SEC_MERGE section"), 8970 input_bfd, input_section, 8971 (long) rel->r_offset, howto->name); 8972 return FALSE; 8973 } 8974 8975 value = bfd_get_32 (input_bfd, contents + rel->r_offset); 8976 8977 /* Get the (signed) value from the instruction. */ 8978 addend = value & howto->src_mask; 8979 if (addend & ((howto->src_mask + 1) >> 1)) 8980 { 8981 bfd_signed_vma mask; 8982 8983 mask = -1; 8984 mask &= ~ howto->src_mask; 8985 addend |= mask; 8986 } 8987 break; 8988 } 8989 8990 msec = sec; 8991 addend = 8992 _bfd_elf_rel_local_sym (output_bfd, sym, &msec, addend) 8993 - relocation; 8994 addend += msec->output_section->vma + msec->output_offset; 8995 8996 /* Cases here must match those in the preceeding 8997 switch statement. */ 8998 switch (r_type) 8999 { 9000 case R_ARM_MOVW_ABS_NC: 9001 case R_ARM_MOVT_ABS: 9002 value = (value & 0xfff0f000) | ((addend & 0xf000) << 4) 9003 | (addend & 0xfff); 9004 bfd_put_32 (input_bfd, value, contents + rel->r_offset); 9005 break; 9006 9007 case R_ARM_THM_MOVW_ABS_NC: 9008 case R_ARM_THM_MOVT_ABS: 9009 value = (value & 0xfbf08f00) | ((addend & 0xf700) << 4) 9010 | (addend & 0xff) | ((addend & 0x0800) << 15); 9011 bfd_put_16 (input_bfd, value >> 16, 9012 contents + rel->r_offset); 9013 bfd_put_16 (input_bfd, value, 9014 contents + rel->r_offset + 2); 9015 break; 9016 9017 default: 9018 value = (value & ~ howto->dst_mask) 9019 | (addend & howto->dst_mask); 9020 bfd_put_32 (input_bfd, value, contents + rel->r_offset); 9021 break; 9022 } 9023 } 9024 } 9025 else 9026 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, &sec, rel); 9027 } 9028 else 9029 { 9030 bfd_boolean warned; 9031 9032 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 9033 r_symndx, symtab_hdr, sym_hashes, 9034 h, sec, relocation, 9035 unresolved_reloc, warned); 9036 9037 sym_type = h->type; 9038 } 9039 9040 if (sec != NULL && elf_discarded_section (sec)) 9041 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 9042 rel, relend, howto, contents); 9043 9044 if (info->relocatable) 9045 { 9046 /* This is a relocatable link. We don't have to change 9047 anything, unless the reloc is against a section symbol, 9048 in which case we have to adjust according to where the 9049 section symbol winds up in the output section. */ 9050 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 9051 { 9052 if (globals->use_rel) 9053 arm_add_to_rel (input_bfd, contents + rel->r_offset, 9054 howto, (bfd_signed_vma) sec->output_offset); 9055 else 9056 rel->r_addend += sec->output_offset; 9057 } 9058 continue; 9059 } 9060 9061 if (h != NULL) 9062 name = h->root.root.string; 9063 else 9064 { 9065 name = (bfd_elf_string_from_elf_section 9066 (input_bfd, symtab_hdr->sh_link, sym->st_name)); 9067 if (name == NULL || *name == '\0') 9068 name = bfd_section_name (input_bfd, sec); 9069 } 9070 9071 if (r_symndx != STN_UNDEF 9072 && r_type != R_ARM_NONE 9073 && (h == NULL 9074 || h->root.type == bfd_link_hash_defined 9075 || h->root.type == bfd_link_hash_defweak) 9076 && IS_ARM_TLS_RELOC (r_type) != (sym_type == STT_TLS)) 9077 { 9078 (*_bfd_error_handler) 9079 ((sym_type == STT_TLS 9080 ? _("%B(%A+0x%lx): %s used with TLS symbol %s") 9081 : _("%B(%A+0x%lx): %s used with non-TLS symbol %s")), 9082 input_bfd, 9083 input_section, 9084 (long) rel->r_offset, 9085 howto->name, 9086 name); 9087 } 9088 9089 r = elf32_arm_final_link_relocate (howto, input_bfd, output_bfd, 9090 input_section, contents, rel, 9091 relocation, info, sec, name, 9092 (h ? ELF_ST_TYPE (h->type) : 9093 ELF_ST_TYPE (sym->st_info)), h, 9094 &unresolved_reloc, &error_message); 9095 9096 /* Dynamic relocs are not propagated for SEC_DEBUGGING sections 9097 because such sections are not SEC_ALLOC and thus ld.so will 9098 not process them. */ 9099 if (unresolved_reloc 9100 && !((input_section->flags & SEC_DEBUGGING) != 0 9101 && h->def_dynamic)) 9102 { 9103 (*_bfd_error_handler) 9104 (_("%B(%A+0x%lx): unresolvable %s relocation against symbol `%s'"), 9105 input_bfd, 9106 input_section, 9107 (long) rel->r_offset, 9108 howto->name, 9109 h->root.root.string); 9110 return FALSE; 9111 } 9112 9113 if (r != bfd_reloc_ok) 9114 { 9115 switch (r) 9116 { 9117 case bfd_reloc_overflow: 9118 /* If the overflowing reloc was to an undefined symbol, 9119 we have already printed one error message and there 9120 is no point complaining again. */ 9121 if ((! h || 9122 h->root.type != bfd_link_hash_undefined) 9123 && (!((*info->callbacks->reloc_overflow) 9124 (info, (h ? &h->root : NULL), name, howto->name, 9125 (bfd_vma) 0, input_bfd, input_section, 9126 rel->r_offset)))) 9127 return FALSE; 9128 break; 9129 9130 case bfd_reloc_undefined: 9131 if (!((*info->callbacks->undefined_symbol) 9132 (info, name, input_bfd, input_section, 9133 rel->r_offset, TRUE))) 9134 return FALSE; 9135 break; 9136 9137 case bfd_reloc_outofrange: 9138 error_message = _("out of range"); 9139 goto common_error; 9140 9141 case bfd_reloc_notsupported: 9142 error_message = _("unsupported relocation"); 9143 goto common_error; 9144 9145 case bfd_reloc_dangerous: 9146 /* error_message should already be set. */ 9147 goto common_error; 9148 9149 default: 9150 error_message = _("unknown error"); 9151 /* Fall through. */ 9152 9153 common_error: 9154 BFD_ASSERT (error_message != NULL); 9155 if (!((*info->callbacks->reloc_dangerous) 9156 (info, error_message, input_bfd, input_section, 9157 rel->r_offset))) 9158 return FALSE; 9159 break; 9160 } 9161 } 9162 } 9163 9164 return TRUE; 9165 } 9166 9167 /* Add a new unwind edit to the list described by HEAD, TAIL. If TINDEX is zero, 9168 adds the edit to the start of the list. (The list must be built in order of 9169 ascending TINDEX: the function's callers are primarily responsible for 9170 maintaining that condition). */ 9171 9172 static void 9173 add_unwind_table_edit (arm_unwind_table_edit **head, 9174 arm_unwind_table_edit **tail, 9175 arm_unwind_edit_type type, 9176 asection *linked_section, 9177 unsigned int tindex) 9178 { 9179 arm_unwind_table_edit *new_edit = (arm_unwind_table_edit *) 9180 xmalloc (sizeof (arm_unwind_table_edit)); 9181 9182 new_edit->type = type; 9183 new_edit->linked_section = linked_section; 9184 new_edit->index = tindex; 9185 9186 if (tindex > 0) 9187 { 9188 new_edit->next = NULL; 9189 9190 if (*tail) 9191 (*tail)->next = new_edit; 9192 9193 (*tail) = new_edit; 9194 9195 if (!*head) 9196 (*head) = new_edit; 9197 } 9198 else 9199 { 9200 new_edit->next = *head; 9201 9202 if (!*tail) 9203 *tail = new_edit; 9204 9205 *head = new_edit; 9206 } 9207 } 9208 9209 static _arm_elf_section_data *get_arm_elf_section_data (asection *); 9210 9211 /* Increase the size of EXIDX_SEC by ADJUST bytes. ADJUST mau be negative. */ 9212 static void 9213 adjust_exidx_size(asection *exidx_sec, int adjust) 9214 { 9215 asection *out_sec; 9216 9217 if (!exidx_sec->rawsize) 9218 exidx_sec->rawsize = exidx_sec->size; 9219 9220 bfd_set_section_size (exidx_sec->owner, exidx_sec, exidx_sec->size + adjust); 9221 out_sec = exidx_sec->output_section; 9222 /* Adjust size of output section. */ 9223 bfd_set_section_size (out_sec->owner, out_sec, out_sec->size +adjust); 9224 } 9225 9226 /* Insert an EXIDX_CANTUNWIND marker at the end of a section. */ 9227 static void 9228 insert_cantunwind_after(asection *text_sec, asection *exidx_sec) 9229 { 9230 struct _arm_elf_section_data *exidx_arm_data; 9231 9232 exidx_arm_data = get_arm_elf_section_data (exidx_sec); 9233 add_unwind_table_edit ( 9234 &exidx_arm_data->u.exidx.unwind_edit_list, 9235 &exidx_arm_data->u.exidx.unwind_edit_tail, 9236 INSERT_EXIDX_CANTUNWIND_AT_END, text_sec, UINT_MAX); 9237 9238 adjust_exidx_size(exidx_sec, 8); 9239 } 9240 9241 /* Scan .ARM.exidx tables, and create a list describing edits which should be 9242 made to those tables, such that: 9243 9244 1. Regions without unwind data are marked with EXIDX_CANTUNWIND entries. 9245 2. Duplicate entries are merged together (EXIDX_CANTUNWIND, or unwind 9246 codes which have been inlined into the index). 9247 9248 If MERGE_EXIDX_ENTRIES is false, duplicate entries are not merged. 9249 9250 The edits are applied when the tables are written 9251 (in elf32_arm_write_section). 9252 */ 9253 9254 bfd_boolean 9255 elf32_arm_fix_exidx_coverage (asection **text_section_order, 9256 unsigned int num_text_sections, 9257 struct bfd_link_info *info, 9258 bfd_boolean merge_exidx_entries) 9259 { 9260 bfd *inp; 9261 unsigned int last_second_word = 0, i; 9262 asection *last_exidx_sec = NULL; 9263 asection *last_text_sec = NULL; 9264 int last_unwind_type = -1; 9265 9266 /* Walk over all EXIDX sections, and create backlinks from the corrsponding 9267 text sections. */ 9268 for (inp = info->input_bfds; inp != NULL; inp = inp->link_next) 9269 { 9270 asection *sec; 9271 9272 for (sec = inp->sections; sec != NULL; sec = sec->next) 9273 { 9274 struct bfd_elf_section_data *elf_sec = elf_section_data (sec); 9275 Elf_Internal_Shdr *hdr = &elf_sec->this_hdr; 9276 9277 if (!hdr || hdr->sh_type != SHT_ARM_EXIDX) 9278 continue; 9279 9280 if (elf_sec->linked_to) 9281 { 9282 Elf_Internal_Shdr *linked_hdr 9283 = &elf_section_data (elf_sec->linked_to)->this_hdr; 9284 struct _arm_elf_section_data *linked_sec_arm_data 9285 = get_arm_elf_section_data (linked_hdr->bfd_section); 9286 9287 if (linked_sec_arm_data == NULL) 9288 continue; 9289 9290 /* Link this .ARM.exidx section back from the text section it 9291 describes. */ 9292 linked_sec_arm_data->u.text.arm_exidx_sec = sec; 9293 } 9294 } 9295 } 9296 9297 /* Walk all text sections in order of increasing VMA. Eilminate duplicate 9298 index table entries (EXIDX_CANTUNWIND and inlined unwind opcodes), 9299 and add EXIDX_CANTUNWIND entries for sections with no unwind table data. */ 9300 9301 for (i = 0; i < num_text_sections; i++) 9302 { 9303 asection *sec = text_section_order[i]; 9304 asection *exidx_sec; 9305 struct _arm_elf_section_data *arm_data = get_arm_elf_section_data (sec); 9306 struct _arm_elf_section_data *exidx_arm_data; 9307 bfd_byte *contents = NULL; 9308 int deleted_exidx_bytes = 0; 9309 bfd_vma j; 9310 arm_unwind_table_edit *unwind_edit_head = NULL; 9311 arm_unwind_table_edit *unwind_edit_tail = NULL; 9312 Elf_Internal_Shdr *hdr; 9313 bfd *ibfd; 9314 9315 if (arm_data == NULL) 9316 continue; 9317 9318 exidx_sec = arm_data->u.text.arm_exidx_sec; 9319 if (exidx_sec == NULL) 9320 { 9321 /* Section has no unwind data. */ 9322 if (last_unwind_type == 0 || !last_exidx_sec) 9323 continue; 9324 9325 /* Ignore zero sized sections. */ 9326 if (sec->size == 0) 9327 continue; 9328 9329 insert_cantunwind_after(last_text_sec, last_exidx_sec); 9330 last_unwind_type = 0; 9331 continue; 9332 } 9333 9334 /* Skip /DISCARD/ sections. */ 9335 if (bfd_is_abs_section (exidx_sec->output_section)) 9336 continue; 9337 9338 hdr = &elf_section_data (exidx_sec)->this_hdr; 9339 if (hdr->sh_type != SHT_ARM_EXIDX) 9340 continue; 9341 9342 exidx_arm_data = get_arm_elf_section_data (exidx_sec); 9343 if (exidx_arm_data == NULL) 9344 continue; 9345 9346 ibfd = exidx_sec->owner; 9347 9348 if (hdr->contents != NULL) 9349 contents = hdr->contents; 9350 else if (! bfd_malloc_and_get_section (ibfd, exidx_sec, &contents)) 9351 /* An error? */ 9352 continue; 9353 9354 for (j = 0; j < hdr->sh_size; j += 8) 9355 { 9356 unsigned int second_word = bfd_get_32 (ibfd, contents + j + 4); 9357 int unwind_type; 9358 int elide = 0; 9359 9360 /* An EXIDX_CANTUNWIND entry. */ 9361 if (second_word == 1) 9362 { 9363 if (last_unwind_type == 0) 9364 elide = 1; 9365 unwind_type = 0; 9366 } 9367 /* Inlined unwinding data. Merge if equal to previous. */ 9368 else if ((second_word & 0x80000000) != 0) 9369 { 9370 if (merge_exidx_entries 9371 && last_second_word == second_word && last_unwind_type == 1) 9372 elide = 1; 9373 unwind_type = 1; 9374 last_second_word = second_word; 9375 } 9376 /* Normal table entry. In theory we could merge these too, 9377 but duplicate entries are likely to be much less common. */ 9378 else 9379 unwind_type = 2; 9380 9381 if (elide) 9382 { 9383 add_unwind_table_edit (&unwind_edit_head, &unwind_edit_tail, 9384 DELETE_EXIDX_ENTRY, NULL, j / 8); 9385 9386 deleted_exidx_bytes += 8; 9387 } 9388 9389 last_unwind_type = unwind_type; 9390 } 9391 9392 /* Free contents if we allocated it ourselves. */ 9393 if (contents != hdr->contents) 9394 free (contents); 9395 9396 /* Record edits to be applied later (in elf32_arm_write_section). */ 9397 exidx_arm_data->u.exidx.unwind_edit_list = unwind_edit_head; 9398 exidx_arm_data->u.exidx.unwind_edit_tail = unwind_edit_tail; 9399 9400 if (deleted_exidx_bytes > 0) 9401 adjust_exidx_size(exidx_sec, -deleted_exidx_bytes); 9402 9403 last_exidx_sec = exidx_sec; 9404 last_text_sec = sec; 9405 } 9406 9407 /* Add terminating CANTUNWIND entry. */ 9408 if (last_exidx_sec && last_unwind_type != 0) 9409 insert_cantunwind_after(last_text_sec, last_exidx_sec); 9410 9411 return TRUE; 9412 } 9413 9414 static bfd_boolean 9415 elf32_arm_output_glue_section (struct bfd_link_info *info, bfd *obfd, 9416 bfd *ibfd, const char *name) 9417 { 9418 asection *sec, *osec; 9419 9420 sec = bfd_get_section_by_name (ibfd, name); 9421 if (sec == NULL || (sec->flags & SEC_EXCLUDE) != 0) 9422 return TRUE; 9423 9424 osec = sec->output_section; 9425 if (elf32_arm_write_section (obfd, info, sec, sec->contents)) 9426 return TRUE; 9427 9428 if (! bfd_set_section_contents (obfd, osec, sec->contents, 9429 sec->output_offset, sec->size)) 9430 return FALSE; 9431 9432 return TRUE; 9433 } 9434 9435 static bfd_boolean 9436 elf32_arm_final_link (bfd *abfd, struct bfd_link_info *info) 9437 { 9438 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (info); 9439 asection *sec, *osec; 9440 9441 if (globals == NULL) 9442 return FALSE; 9443 9444 /* Invoke the regular ELF backend linker to do all the work. */ 9445 if (!bfd_elf_final_link (abfd, info)) 9446 return FALSE; 9447 9448 /* Process stub sections (eg BE8 encoding, ...). */ 9449 struct elf32_arm_link_hash_table *htab = elf32_arm_hash_table (info); 9450 int i; 9451 for (i=0; i<htab->top_id; i++) 9452 { 9453 sec = htab->stub_group[i].stub_sec; 9454 /* Only process it once, in its link_sec slot. */ 9455 if (sec && i == htab->stub_group[i].link_sec->id) 9456 { 9457 osec = sec->output_section; 9458 elf32_arm_write_section (abfd, info, sec, sec->contents); 9459 if (! bfd_set_section_contents (abfd, osec, sec->contents, 9460 sec->output_offset, sec->size)) 9461 return FALSE; 9462 } 9463 } 9464 9465 /* Write out any glue sections now that we have created all the 9466 stubs. */ 9467 if (globals->bfd_of_glue_owner != NULL) 9468 { 9469 if (! elf32_arm_output_glue_section (info, abfd, 9470 globals->bfd_of_glue_owner, 9471 ARM2THUMB_GLUE_SECTION_NAME)) 9472 return FALSE; 9473 9474 if (! elf32_arm_output_glue_section (info, abfd, 9475 globals->bfd_of_glue_owner, 9476 THUMB2ARM_GLUE_SECTION_NAME)) 9477 return FALSE; 9478 9479 if (! elf32_arm_output_glue_section (info, abfd, 9480 globals->bfd_of_glue_owner, 9481 VFP11_ERRATUM_VENEER_SECTION_NAME)) 9482 return FALSE; 9483 9484 if (! elf32_arm_output_glue_section (info, abfd, 9485 globals->bfd_of_glue_owner, 9486 ARM_BX_GLUE_SECTION_NAME)) 9487 return FALSE; 9488 } 9489 9490 return TRUE; 9491 } 9492 9493 /* Set the right machine number. */ 9494 9495 static bfd_boolean 9496 elf32_arm_object_p (bfd *abfd) 9497 { 9498 unsigned int mach; 9499 9500 mach = bfd_arm_get_mach_from_notes (abfd, ARM_NOTE_SECTION); 9501 9502 if (mach != bfd_mach_arm_unknown) 9503 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); 9504 9505 else if (elf_elfheader (abfd)->e_flags & EF_ARM_MAVERICK_FLOAT) 9506 bfd_default_set_arch_mach (abfd, bfd_arch_arm, bfd_mach_arm_ep9312); 9507 9508 else 9509 bfd_default_set_arch_mach (abfd, bfd_arch_arm, mach); 9510 9511 return TRUE; 9512 } 9513 9514 /* Function to keep ARM specific flags in the ELF header. */ 9515 9516 static bfd_boolean 9517 elf32_arm_set_private_flags (bfd *abfd, flagword flags) 9518 { 9519 if (elf_flags_init (abfd) 9520 && elf_elfheader (abfd)->e_flags != flags) 9521 { 9522 if (EF_ARM_EABI_VERSION (flags) == EF_ARM_EABI_UNKNOWN) 9523 { 9524 if (flags & EF_ARM_INTERWORK) 9525 (*_bfd_error_handler) 9526 (_("Warning: Not setting interworking flag of %B since it has already been specified as non-interworking"), 9527 abfd); 9528 else 9529 _bfd_error_handler 9530 (_("Warning: Clearing the interworking flag of %B due to outside request"), 9531 abfd); 9532 } 9533 } 9534 else 9535 { 9536 elf_elfheader (abfd)->e_flags = flags; 9537 elf_flags_init (abfd) = TRUE; 9538 } 9539 9540 return TRUE; 9541 } 9542 9543 /* Copy backend specific data from one object module to another. */ 9544 9545 static bfd_boolean 9546 elf32_arm_copy_private_bfd_data (bfd *ibfd, bfd *obfd) 9547 { 9548 flagword in_flags; 9549 flagword out_flags; 9550 9551 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) 9552 return TRUE; 9553 9554 in_flags = elf_elfheader (ibfd)->e_flags; 9555 out_flags = elf_elfheader (obfd)->e_flags; 9556 9557 if (elf_flags_init (obfd) 9558 && EF_ARM_EABI_VERSION (out_flags) == EF_ARM_EABI_UNKNOWN 9559 && in_flags != out_flags) 9560 { 9561 /* Cannot mix APCS26 and APCS32 code. */ 9562 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) 9563 return FALSE; 9564 9565 /* Cannot mix float APCS and non-float APCS code. */ 9566 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) 9567 return FALSE; 9568 9569 /* If the src and dest have different interworking flags 9570 then turn off the interworking bit. */ 9571 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) 9572 { 9573 if (out_flags & EF_ARM_INTERWORK) 9574 _bfd_error_handler 9575 (_("Warning: Clearing the interworking flag of %B because non-interworking code in %B has been linked with it"), 9576 obfd, ibfd); 9577 9578 in_flags &= ~EF_ARM_INTERWORK; 9579 } 9580 9581 /* Likewise for PIC, though don't warn for this case. */ 9582 if ((in_flags & EF_ARM_PIC) != (out_flags & EF_ARM_PIC)) 9583 in_flags &= ~EF_ARM_PIC; 9584 } 9585 9586 elf_elfheader (obfd)->e_flags = in_flags; 9587 elf_flags_init (obfd) = TRUE; 9588 9589 /* Also copy the EI_OSABI field. */ 9590 elf_elfheader (obfd)->e_ident[EI_OSABI] = 9591 elf_elfheader (ibfd)->e_ident[EI_OSABI]; 9592 9593 /* Copy object attributes. */ 9594 _bfd_elf_copy_obj_attributes (ibfd, obfd); 9595 9596 return TRUE; 9597 } 9598 9599 /* Values for Tag_ABI_PCS_R9_use. */ 9600 enum 9601 { 9602 AEABI_R9_V6, 9603 AEABI_R9_SB, 9604 AEABI_R9_TLS, 9605 AEABI_R9_unused 9606 }; 9607 9608 /* Values for Tag_ABI_PCS_RW_data. */ 9609 enum 9610 { 9611 AEABI_PCS_RW_data_absolute, 9612 AEABI_PCS_RW_data_PCrel, 9613 AEABI_PCS_RW_data_SBrel, 9614 AEABI_PCS_RW_data_unused 9615 }; 9616 9617 /* Values for Tag_ABI_enum_size. */ 9618 enum 9619 { 9620 AEABI_enum_unused, 9621 AEABI_enum_short, 9622 AEABI_enum_wide, 9623 AEABI_enum_forced_wide 9624 }; 9625 9626 /* Determine whether an object attribute tag takes an integer, a 9627 string or both. */ 9628 9629 static int 9630 elf32_arm_obj_attrs_arg_type (int tag) 9631 { 9632 if (tag == Tag_compatibility) 9633 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_STR_VAL; 9634 else if (tag == Tag_nodefaults) 9635 return ATTR_TYPE_FLAG_INT_VAL | ATTR_TYPE_FLAG_NO_DEFAULT; 9636 else if (tag == Tag_CPU_raw_name || tag == Tag_CPU_name) 9637 return ATTR_TYPE_FLAG_STR_VAL; 9638 else if (tag < 32) 9639 return ATTR_TYPE_FLAG_INT_VAL; 9640 else 9641 return (tag & 1) != 0 ? ATTR_TYPE_FLAG_STR_VAL : ATTR_TYPE_FLAG_INT_VAL; 9642 } 9643 9644 /* The ABI defines that Tag_conformance should be emitted first, and that 9645 Tag_nodefaults should be second (if either is defined). This sets those 9646 two positions, and bumps up the position of all the remaining tags to 9647 compensate. */ 9648 static int 9649 elf32_arm_obj_attrs_order (int num) 9650 { 9651 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE) 9652 return Tag_conformance; 9653 if (num == LEAST_KNOWN_OBJ_ATTRIBUTE + 1) 9654 return Tag_nodefaults; 9655 if ((num - 2) < Tag_nodefaults) 9656 return num - 2; 9657 if ((num - 1) < Tag_conformance) 9658 return num - 1; 9659 return num; 9660 } 9661 9662 /* Attribute numbers >=64 (mod 128) can be safely ignored. */ 9663 static bfd_boolean 9664 elf32_arm_obj_attrs_handle_unknown (bfd *abfd, int tag) 9665 { 9666 if ((tag & 127) < 64) 9667 { 9668 _bfd_error_handler 9669 (_("%B: Unknown mandatory EABI object attribute %d"), 9670 abfd, tag); 9671 bfd_set_error (bfd_error_bad_value); 9672 return FALSE; 9673 } 9674 else 9675 { 9676 _bfd_error_handler 9677 (_("Warning: %B: Unknown EABI object attribute %d"), 9678 abfd, tag); 9679 return TRUE; 9680 } 9681 } 9682 9683 /* Read the architecture from the Tag_also_compatible_with attribute, if any. 9684 Returns -1 if no architecture could be read. */ 9685 9686 static int 9687 get_secondary_compatible_arch (bfd *abfd) 9688 { 9689 obj_attribute *attr = 9690 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; 9691 9692 /* Note: the tag and its argument below are uleb128 values, though 9693 currently-defined values fit in one byte for each. */ 9694 if (attr->s 9695 && attr->s[0] == Tag_CPU_arch 9696 && (attr->s[1] & 128) != 128 9697 && attr->s[2] == 0) 9698 return attr->s[1]; 9699 9700 /* This tag is "safely ignorable", so don't complain if it looks funny. */ 9701 return -1; 9702 } 9703 9704 /* Set, or unset, the architecture of the Tag_also_compatible_with attribute. 9705 The tag is removed if ARCH is -1. */ 9706 9707 static void 9708 set_secondary_compatible_arch (bfd *abfd, int arch) 9709 { 9710 obj_attribute *attr = 9711 &elf_known_obj_attributes_proc (abfd)[Tag_also_compatible_with]; 9712 9713 if (arch == -1) 9714 { 9715 attr->s = NULL; 9716 return; 9717 } 9718 9719 /* Note: the tag and its argument below are uleb128 values, though 9720 currently-defined values fit in one byte for each. */ 9721 if (!attr->s) 9722 attr->s = (char *) bfd_alloc (abfd, 3); 9723 attr->s[0] = Tag_CPU_arch; 9724 attr->s[1] = arch; 9725 attr->s[2] = '\0'; 9726 } 9727 9728 /* Combine two values for Tag_CPU_arch, taking secondary compatibility tags 9729 into account. */ 9730 9731 static int 9732 tag_cpu_arch_combine (bfd *ibfd, int oldtag, int *secondary_compat_out, 9733 int newtag, int secondary_compat) 9734 { 9735 #define T(X) TAG_CPU_ARCH_##X 9736 int tagl, tagh, result; 9737 const int v6t2[] = 9738 { 9739 T(V6T2), /* PRE_V4. */ 9740 T(V6T2), /* V4. */ 9741 T(V6T2), /* V4T. */ 9742 T(V6T2), /* V5T. */ 9743 T(V6T2), /* V5TE. */ 9744 T(V6T2), /* V5TEJ. */ 9745 T(V6T2), /* V6. */ 9746 T(V7), /* V6KZ. */ 9747 T(V6T2) /* V6T2. */ 9748 }; 9749 const int v6k[] = 9750 { 9751 T(V6K), /* PRE_V4. */ 9752 T(V6K), /* V4. */ 9753 T(V6K), /* V4T. */ 9754 T(V6K), /* V5T. */ 9755 T(V6K), /* V5TE. */ 9756 T(V6K), /* V5TEJ. */ 9757 T(V6K), /* V6. */ 9758 T(V6KZ), /* V6KZ. */ 9759 T(V7), /* V6T2. */ 9760 T(V6K) /* V6K. */ 9761 }; 9762 const int v7[] = 9763 { 9764 T(V7), /* PRE_V4. */ 9765 T(V7), /* V4. */ 9766 T(V7), /* V4T. */ 9767 T(V7), /* V5T. */ 9768 T(V7), /* V5TE. */ 9769 T(V7), /* V5TEJ. */ 9770 T(V7), /* V6. */ 9771 T(V7), /* V6KZ. */ 9772 T(V7), /* V6T2. */ 9773 T(V7), /* V6K. */ 9774 T(V7) /* V7. */ 9775 }; 9776 const int v6_m[] = 9777 { 9778 -1, /* PRE_V4. */ 9779 -1, /* V4. */ 9780 T(V6K), /* V4T. */ 9781 T(V6K), /* V5T. */ 9782 T(V6K), /* V5TE. */ 9783 T(V6K), /* V5TEJ. */ 9784 T(V6K), /* V6. */ 9785 T(V6KZ), /* V6KZ. */ 9786 T(V7), /* V6T2. */ 9787 T(V6K), /* V6K. */ 9788 T(V7), /* V7. */ 9789 T(V6_M) /* V6_M. */ 9790 }; 9791 const int v6s_m[] = 9792 { 9793 -1, /* PRE_V4. */ 9794 -1, /* V4. */ 9795 T(V6K), /* V4T. */ 9796 T(V6K), /* V5T. */ 9797 T(V6K), /* V5TE. */ 9798 T(V6K), /* V5TEJ. */ 9799 T(V6K), /* V6. */ 9800 T(V6KZ), /* V6KZ. */ 9801 T(V7), /* V6T2. */ 9802 T(V6K), /* V6K. */ 9803 T(V7), /* V7. */ 9804 T(V6S_M), /* V6_M. */ 9805 T(V6S_M) /* V6S_M. */ 9806 }; 9807 const int v7e_m[] = 9808 { 9809 -1, /* PRE_V4. */ 9810 -1, /* V4. */ 9811 T(V7E_M), /* V4T. */ 9812 T(V7E_M), /* V5T. */ 9813 T(V7E_M), /* V5TE. */ 9814 T(V7E_M), /* V5TEJ. */ 9815 T(V7E_M), /* V6. */ 9816 T(V7E_M), /* V6KZ. */ 9817 T(V7E_M), /* V6T2. */ 9818 T(V7E_M), /* V6K. */ 9819 T(V7E_M), /* V7. */ 9820 T(V7E_M), /* V6_M. */ 9821 T(V7E_M), /* V6S_M. */ 9822 T(V7E_M) /* V7E_M. */ 9823 }; 9824 const int v4t_plus_v6_m[] = 9825 { 9826 -1, /* PRE_V4. */ 9827 -1, /* V4. */ 9828 T(V4T), /* V4T. */ 9829 T(V5T), /* V5T. */ 9830 T(V5TE), /* V5TE. */ 9831 T(V5TEJ), /* V5TEJ. */ 9832 T(V6), /* V6. */ 9833 T(V6KZ), /* V6KZ. */ 9834 T(V6T2), /* V6T2. */ 9835 T(V6K), /* V6K. */ 9836 T(V7), /* V7. */ 9837 T(V6_M), /* V6_M. */ 9838 T(V6S_M), /* V6S_M. */ 9839 T(V7E_M), /* V7E_M. */ 9840 T(V4T_PLUS_V6_M) /* V4T plus V6_M. */ 9841 }; 9842 const int *comb[] = 9843 { 9844 v6t2, 9845 v6k, 9846 v7, 9847 v6_m, 9848 v6s_m, 9849 v7e_m, 9850 /* Pseudo-architecture. */ 9851 v4t_plus_v6_m 9852 }; 9853 9854 /* Check we've not got a higher architecture than we know about. */ 9855 9856 if (oldtag > MAX_TAG_CPU_ARCH || newtag > MAX_TAG_CPU_ARCH) 9857 { 9858 _bfd_error_handler (_("error: %B: Unknown CPU architecture"), ibfd); 9859 return -1; 9860 } 9861 9862 /* Override old tag if we have a Tag_also_compatible_with on the output. */ 9863 9864 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T)) 9865 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M))) 9866 oldtag = T(V4T_PLUS_V6_M); 9867 9868 /* And override the new tag if we have a Tag_also_compatible_with on the 9869 input. */ 9870 9871 if ((newtag == T(V6_M) && secondary_compat == T(V4T)) 9872 || (newtag == T(V4T) && secondary_compat == T(V6_M))) 9873 newtag = T(V4T_PLUS_V6_M); 9874 9875 tagl = (oldtag < newtag) ? oldtag : newtag; 9876 result = tagh = (oldtag > newtag) ? oldtag : newtag; 9877 9878 /* Architectures before V6KZ add features monotonically. */ 9879 if (tagh <= TAG_CPU_ARCH_V6KZ) 9880 return result; 9881 9882 result = comb[tagh - T(V6T2)][tagl]; 9883 9884 /* Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M) 9885 as the canonical version. */ 9886 if (result == T(V4T_PLUS_V6_M)) 9887 { 9888 result = T(V4T); 9889 *secondary_compat_out = T(V6_M); 9890 } 9891 else 9892 *secondary_compat_out = -1; 9893 9894 if (result == -1) 9895 { 9896 _bfd_error_handler (_("error: %B: Conflicting CPU architectures %d/%d"), 9897 ibfd, oldtag, newtag); 9898 return -1; 9899 } 9900 9901 return result; 9902 #undef T 9903 } 9904 9905 /* Merge EABI object attributes from IBFD into OBFD. Raise an error if there 9906 are conflicting attributes. */ 9907 9908 static bfd_boolean 9909 elf32_arm_merge_eabi_attributes (bfd *ibfd, bfd *obfd) 9910 { 9911 obj_attribute *in_attr; 9912 obj_attribute *out_attr; 9913 /* Some tags have 0 = don't care, 1 = strong requirement, 9914 2 = weak requirement. */ 9915 static const int order_021[3] = {0, 2, 1}; 9916 int i; 9917 bfd_boolean result = TRUE; 9918 9919 /* Skip the linker stubs file. This preserves previous behavior 9920 of accepting unknown attributes in the first input file - but 9921 is that a bug? */ 9922 if (ibfd->flags & BFD_LINKER_CREATED) 9923 return TRUE; 9924 9925 if (!elf_known_obj_attributes_proc (obfd)[0].i) 9926 { 9927 /* This is the first object. Copy the attributes. */ 9928 _bfd_elf_copy_obj_attributes (ibfd, obfd); 9929 9930 out_attr = elf_known_obj_attributes_proc (obfd); 9931 9932 /* Use the Tag_null value to indicate the attributes have been 9933 initialized. */ 9934 out_attr[0].i = 1; 9935 9936 /* We do not output objects with Tag_MPextension_use_legacy - we move 9937 the attribute's value to Tag_MPextension_use. */ 9938 if (out_attr[Tag_MPextension_use_legacy].i != 0) 9939 { 9940 if (out_attr[Tag_MPextension_use].i != 0 9941 && out_attr[Tag_MPextension_use_legacy].i 9942 != out_attr[Tag_MPextension_use].i) 9943 { 9944 _bfd_error_handler 9945 (_("Error: %B has both the current and legacy " 9946 "Tag_MPextension_use attributes"), ibfd); 9947 result = FALSE; 9948 } 9949 9950 out_attr[Tag_MPextension_use] = 9951 out_attr[Tag_MPextension_use_legacy]; 9952 out_attr[Tag_MPextension_use_legacy].type = 0; 9953 out_attr[Tag_MPextension_use_legacy].i = 0; 9954 } 9955 9956 return result; 9957 } 9958 9959 in_attr = elf_known_obj_attributes_proc (ibfd); 9960 out_attr = elf_known_obj_attributes_proc (obfd); 9961 /* This needs to happen before Tag_ABI_FP_number_model is merged. */ 9962 if (in_attr[Tag_ABI_VFP_args].i != out_attr[Tag_ABI_VFP_args].i) 9963 { 9964 /* Ignore mismatches if the object doesn't use floating point. */ 9965 if (out_attr[Tag_ABI_FP_number_model].i == 0) 9966 out_attr[Tag_ABI_VFP_args].i = in_attr[Tag_ABI_VFP_args].i; 9967 else if (in_attr[Tag_ABI_FP_number_model].i != 0) 9968 { 9969 _bfd_error_handler 9970 (_("error: %B uses VFP register arguments, %B does not"), 9971 in_attr[Tag_ABI_VFP_args].i ? ibfd : obfd, 9972 in_attr[Tag_ABI_VFP_args].i ? obfd : ibfd); 9973 result = FALSE; 9974 } 9975 } 9976 9977 for (i = LEAST_KNOWN_OBJ_ATTRIBUTE; i < NUM_KNOWN_OBJ_ATTRIBUTES; i++) 9978 { 9979 /* Merge this attribute with existing attributes. */ 9980 switch (i) 9981 { 9982 case Tag_CPU_raw_name: 9983 case Tag_CPU_name: 9984 /* These are merged after Tag_CPU_arch. */ 9985 break; 9986 9987 case Tag_ABI_optimization_goals: 9988 case Tag_ABI_FP_optimization_goals: 9989 /* Use the first value seen. */ 9990 break; 9991 9992 case Tag_CPU_arch: 9993 { 9994 int secondary_compat = -1, secondary_compat_out = -1; 9995 unsigned int saved_out_attr = out_attr[i].i; 9996 static const char *name_table[] = { 9997 /* These aren't real CPU names, but we can't guess 9998 that from the architecture version alone. */ 9999 "Pre v4", 10000 "ARM v4", 10001 "ARM v4T", 10002 "ARM v5T", 10003 "ARM v5TE", 10004 "ARM v5TEJ", 10005 "ARM v6", 10006 "ARM v6KZ", 10007 "ARM v6T2", 10008 "ARM v6K", 10009 "ARM v7", 10010 "ARM v6-M", 10011 "ARM v6S-M" 10012 }; 10013 10014 /* Merge Tag_CPU_arch and Tag_also_compatible_with. */ 10015 secondary_compat = get_secondary_compatible_arch (ibfd); 10016 secondary_compat_out = get_secondary_compatible_arch (obfd); 10017 out_attr[i].i = tag_cpu_arch_combine (ibfd, out_attr[i].i, 10018 &secondary_compat_out, 10019 in_attr[i].i, 10020 secondary_compat); 10021 set_secondary_compatible_arch (obfd, secondary_compat_out); 10022 10023 /* Merge Tag_CPU_name and Tag_CPU_raw_name. */ 10024 if (out_attr[i].i == saved_out_attr) 10025 ; /* Leave the names alone. */ 10026 else if (out_attr[i].i == in_attr[i].i) 10027 { 10028 /* The output architecture has been changed to match the 10029 input architecture. Use the input names. */ 10030 out_attr[Tag_CPU_name].s = in_attr[Tag_CPU_name].s 10031 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_name].s) 10032 : NULL; 10033 out_attr[Tag_CPU_raw_name].s = in_attr[Tag_CPU_raw_name].s 10034 ? _bfd_elf_attr_strdup (obfd, in_attr[Tag_CPU_raw_name].s) 10035 : NULL; 10036 } 10037 else 10038 { 10039 out_attr[Tag_CPU_name].s = NULL; 10040 out_attr[Tag_CPU_raw_name].s = NULL; 10041 } 10042 10043 /* If we still don't have a value for Tag_CPU_name, 10044 make one up now. Tag_CPU_raw_name remains blank. */ 10045 if (out_attr[Tag_CPU_name].s == NULL 10046 && out_attr[i].i < ARRAY_SIZE (name_table)) 10047 out_attr[Tag_CPU_name].s = 10048 _bfd_elf_attr_strdup (obfd, name_table[out_attr[i].i]); 10049 } 10050 break; 10051 10052 case Tag_ARM_ISA_use: 10053 case Tag_THUMB_ISA_use: 10054 case Tag_WMMX_arch: 10055 case Tag_Advanced_SIMD_arch: 10056 /* ??? Do Advanced_SIMD (NEON) and WMMX conflict? */ 10057 case Tag_ABI_FP_rounding: 10058 case Tag_ABI_FP_exceptions: 10059 case Tag_ABI_FP_user_exceptions: 10060 case Tag_ABI_FP_number_model: 10061 case Tag_FP_HP_extension: 10062 case Tag_CPU_unaligned_access: 10063 case Tag_T2EE_use: 10064 case Tag_MPextension_use: 10065 /* Use the largest value specified. */ 10066 if (in_attr[i].i > out_attr[i].i) 10067 out_attr[i].i = in_attr[i].i; 10068 break; 10069 10070 case Tag_ABI_align_preserved: 10071 case Tag_ABI_PCS_RO_data: 10072 /* Use the smallest value specified. */ 10073 if (in_attr[i].i < out_attr[i].i) 10074 out_attr[i].i = in_attr[i].i; 10075 break; 10076 10077 case Tag_ABI_align_needed: 10078 if ((in_attr[i].i > 0 || out_attr[i].i > 0) 10079 && (in_attr[Tag_ABI_align_preserved].i == 0 10080 || out_attr[Tag_ABI_align_preserved].i == 0)) 10081 { 10082 /* This error message should be enabled once all non-conformant 10083 binaries in the toolchain have had the attributes set 10084 properly. 10085 _bfd_error_handler 10086 (_("error: %B: 8-byte data alignment conflicts with %B"), 10087 obfd, ibfd); 10088 result = FALSE; */ 10089 } 10090 /* Fall through. */ 10091 case Tag_ABI_FP_denormal: 10092 case Tag_ABI_PCS_GOT_use: 10093 /* Use the "greatest" from the sequence 0, 2, 1, or the largest 10094 value if greater than 2 (for future-proofing). */ 10095 if ((in_attr[i].i > 2 && in_attr[i].i > out_attr[i].i) 10096 || (in_attr[i].i <= 2 && out_attr[i].i <= 2 10097 && order_021[in_attr[i].i] > order_021[out_attr[i].i])) 10098 out_attr[i].i = in_attr[i].i; 10099 break; 10100 10101 case Tag_Virtualization_use: 10102 /* The virtualization tag effectively stores two bits of 10103 information: the intended use of TrustZone (in bit 0), and the 10104 intended use of Virtualization (in bit 1). */ 10105 if (out_attr[i].i == 0) 10106 out_attr[i].i = in_attr[i].i; 10107 else if (in_attr[i].i != 0 10108 && in_attr[i].i != out_attr[i].i) 10109 { 10110 if (in_attr[i].i <= 3 && out_attr[i].i <= 3) 10111 out_attr[i].i = 3; 10112 else 10113 { 10114 _bfd_error_handler 10115 (_("error: %B: unable to merge virtualization attributes " 10116 "with %B"), 10117 obfd, ibfd); 10118 result = FALSE; 10119 } 10120 } 10121 break; 10122 10123 case Tag_CPU_arch_profile: 10124 if (out_attr[i].i != in_attr[i].i) 10125 { 10126 /* 0 will merge with anything. 10127 'A' and 'S' merge to 'A'. 10128 'R' and 'S' merge to 'R'. 10129 'M' and 'A|R|S' is an error. */ 10130 if (out_attr[i].i == 0 10131 || (out_attr[i].i == 'S' 10132 && (in_attr[i].i == 'A' || in_attr[i].i == 'R'))) 10133 out_attr[i].i = in_attr[i].i; 10134 else if (in_attr[i].i == 0 10135 || (in_attr[i].i == 'S' 10136 && (out_attr[i].i == 'A' || out_attr[i].i == 'R'))) 10137 ; /* Do nothing. */ 10138 else 10139 { 10140 _bfd_error_handler 10141 (_("error: %B: Conflicting architecture profiles %c/%c"), 10142 ibfd, 10143 in_attr[i].i ? in_attr[i].i : '0', 10144 out_attr[i].i ? out_attr[i].i : '0'); 10145 result = FALSE; 10146 } 10147 } 10148 break; 10149 case Tag_FP_arch: 10150 { 10151 /* Tag_ABI_HardFP_use is handled along with Tag_FP_arch since 10152 the meaning of Tag_ABI_HardFP_use depends on Tag_FP_arch 10153 when it's 0. It might mean absence of FP hardware if 10154 Tag_FP_arch is zero, otherwise it is effectively SP + DP. */ 10155 10156 static const struct 10157 { 10158 int ver; 10159 int regs; 10160 } vfp_versions[7] = 10161 { 10162 {0, 0}, 10163 {1, 16}, 10164 {2, 16}, 10165 {3, 32}, 10166 {3, 16}, 10167 {4, 32}, 10168 {4, 16} 10169 }; 10170 int ver; 10171 int regs; 10172 int newval; 10173 10174 /* If the output has no requirement about FP hardware, 10175 follow the requirement of the input. */ 10176 if (out_attr[i].i == 0) 10177 { 10178 BFD_ASSERT (out_attr[Tag_ABI_HardFP_use].i == 0); 10179 out_attr[i].i = in_attr[i].i; 10180 out_attr[Tag_ABI_HardFP_use].i 10181 = in_attr[Tag_ABI_HardFP_use].i; 10182 break; 10183 } 10184 /* If the input has no requirement about FP hardware, do 10185 nothing. */ 10186 else if (in_attr[i].i == 0) 10187 { 10188 BFD_ASSERT (in_attr[Tag_ABI_HardFP_use].i == 0); 10189 break; 10190 } 10191 10192 /* Both the input and the output have nonzero Tag_FP_arch. 10193 So Tag_ABI_HardFP_use is (SP & DP) when it's zero. */ 10194 10195 /* If both the input and the output have zero Tag_ABI_HardFP_use, 10196 do nothing. */ 10197 if (in_attr[Tag_ABI_HardFP_use].i == 0 10198 && out_attr[Tag_ABI_HardFP_use].i == 0) 10199 ; 10200 /* If the input and the output have different Tag_ABI_HardFP_use, 10201 the combination of them is 3 (SP & DP). */ 10202 else if (in_attr[Tag_ABI_HardFP_use].i 10203 != out_attr[Tag_ABI_HardFP_use].i) 10204 out_attr[Tag_ABI_HardFP_use].i = 3; 10205 10206 /* Now we can handle Tag_FP_arch. */ 10207 10208 /* Values greater than 6 aren't defined, so just pick the 10209 biggest */ 10210 if (in_attr[i].i > 6 && in_attr[i].i > out_attr[i].i) 10211 { 10212 out_attr[i] = in_attr[i]; 10213 break; 10214 } 10215 /* The output uses the superset of input features 10216 (ISA version) and registers. */ 10217 ver = vfp_versions[in_attr[i].i].ver; 10218 if (ver < vfp_versions[out_attr[i].i].ver) 10219 ver = vfp_versions[out_attr[i].i].ver; 10220 regs = vfp_versions[in_attr[i].i].regs; 10221 if (regs < vfp_versions[out_attr[i].i].regs) 10222 regs = vfp_versions[out_attr[i].i].regs; 10223 /* This assumes all possible supersets are also a valid 10224 options. */ 10225 for (newval = 6; newval > 0; newval--) 10226 { 10227 if (regs == vfp_versions[newval].regs 10228 && ver == vfp_versions[newval].ver) 10229 break; 10230 } 10231 out_attr[i].i = newval; 10232 } 10233 break; 10234 case Tag_PCS_config: 10235 if (out_attr[i].i == 0) 10236 out_attr[i].i = in_attr[i].i; 10237 else if (in_attr[i].i != 0 && out_attr[i].i != 0) 10238 { 10239 /* It's sometimes ok to mix different configs, so this is only 10240 a warning. */ 10241 _bfd_error_handler 10242 (_("Warning: %B: Conflicting platform configuration"), ibfd); 10243 } 10244 break; 10245 case Tag_ABI_PCS_R9_use: 10246 if (in_attr[i].i != out_attr[i].i 10247 && out_attr[i].i != AEABI_R9_unused 10248 && in_attr[i].i != AEABI_R9_unused) 10249 { 10250 _bfd_error_handler 10251 (_("error: %B: Conflicting use of R9"), ibfd); 10252 result = FALSE; 10253 } 10254 if (out_attr[i].i == AEABI_R9_unused) 10255 out_attr[i].i = in_attr[i].i; 10256 break; 10257 case Tag_ABI_PCS_RW_data: 10258 if (in_attr[i].i == AEABI_PCS_RW_data_SBrel 10259 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_SB 10260 && out_attr[Tag_ABI_PCS_R9_use].i != AEABI_R9_unused) 10261 { 10262 _bfd_error_handler 10263 (_("error: %B: SB relative addressing conflicts with use of R9"), 10264 ibfd); 10265 result = FALSE; 10266 } 10267 /* Use the smallest value specified. */ 10268 if (in_attr[i].i < out_attr[i].i) 10269 out_attr[i].i = in_attr[i].i; 10270 break; 10271 case Tag_ABI_PCS_wchar_t: 10272 if (out_attr[i].i && in_attr[i].i && out_attr[i].i != in_attr[i].i 10273 && !elf_arm_tdata (obfd)->no_wchar_size_warning) 10274 { 10275 _bfd_error_handler 10276 (_("warning: %B uses %u-byte wchar_t yet the output is to use %u-byte wchar_t; use of wchar_t values across objects may fail"), 10277 ibfd, in_attr[i].i, out_attr[i].i); 10278 } 10279 else if (in_attr[i].i && !out_attr[i].i) 10280 out_attr[i].i = in_attr[i].i; 10281 break; 10282 case Tag_ABI_enum_size: 10283 if (in_attr[i].i != AEABI_enum_unused) 10284 { 10285 if (out_attr[i].i == AEABI_enum_unused 10286 || out_attr[i].i == AEABI_enum_forced_wide) 10287 { 10288 /* The existing object is compatible with anything. 10289 Use whatever requirements the new object has. */ 10290 out_attr[i].i = in_attr[i].i; 10291 } 10292 else if (in_attr[i].i != AEABI_enum_forced_wide 10293 && out_attr[i].i != in_attr[i].i 10294 && !elf_arm_tdata (obfd)->no_enum_size_warning) 10295 { 10296 static const char *aeabi_enum_names[] = 10297 { "", "variable-size", "32-bit", "" }; 10298 const char *in_name = 10299 in_attr[i].i < ARRAY_SIZE(aeabi_enum_names) 10300 ? aeabi_enum_names[in_attr[i].i] 10301 : "<unknown>"; 10302 const char *out_name = 10303 out_attr[i].i < ARRAY_SIZE(aeabi_enum_names) 10304 ? aeabi_enum_names[out_attr[i].i] 10305 : "<unknown>"; 10306 _bfd_error_handler 10307 (_("warning: %B uses %s enums yet the output is to use %s enums; use of enum values across objects may fail"), 10308 ibfd, in_name, out_name); 10309 } 10310 } 10311 break; 10312 case Tag_ABI_VFP_args: 10313 /* Aready done. */ 10314 break; 10315 case Tag_ABI_WMMX_args: 10316 if (in_attr[i].i != out_attr[i].i) 10317 { 10318 _bfd_error_handler 10319 (_("error: %B uses iWMMXt register arguments, %B does not"), 10320 ibfd, obfd); 10321 result = FALSE; 10322 } 10323 break; 10324 case Tag_compatibility: 10325 /* Merged in target-independent code. */ 10326 break; 10327 case Tag_ABI_HardFP_use: 10328 /* This is handled along with Tag_FP_arch. */ 10329 break; 10330 case Tag_ABI_FP_16bit_format: 10331 if (in_attr[i].i != 0 && out_attr[i].i != 0) 10332 { 10333 if (in_attr[i].i != out_attr[i].i) 10334 { 10335 _bfd_error_handler 10336 (_("error: fp16 format mismatch between %B and %B"), 10337 ibfd, obfd); 10338 result = FALSE; 10339 } 10340 } 10341 if (in_attr[i].i != 0) 10342 out_attr[i].i = in_attr[i].i; 10343 break; 10344 10345 case Tag_DIV_use: 10346 /* This tag is set to zero if we can use UDIV and SDIV in Thumb 10347 mode on a v7-M or v7-R CPU; to one if we can not use UDIV or 10348 SDIV at all; and to two if we can use UDIV or SDIV on a v7-A 10349 CPU. We will merge as follows: If the input attribute's value 10350 is one then the output attribute's value remains unchanged. If 10351 the input attribute's value is zero or two then if the output 10352 attribute's value is one the output value is set to the input 10353 value, otherwise the output value must be the same as the 10354 inputs. */ 10355 if (in_attr[i].i != 1 && out_attr[i].i != 1) 10356 { 10357 if (in_attr[i].i != out_attr[i].i) 10358 { 10359 _bfd_error_handler 10360 (_("DIV usage mismatch between %B and %B"), 10361 ibfd, obfd); 10362 result = FALSE; 10363 } 10364 } 10365 10366 if (in_attr[i].i != 1) 10367 out_attr[i].i = in_attr[i].i; 10368 10369 break; 10370 10371 case Tag_MPextension_use_legacy: 10372 /* We don't output objects with Tag_MPextension_use_legacy - we 10373 move the value to Tag_MPextension_use. */ 10374 if (in_attr[i].i != 0 && in_attr[Tag_MPextension_use].i != 0) 10375 { 10376 if (in_attr[Tag_MPextension_use].i != in_attr[i].i) 10377 { 10378 _bfd_error_handler 10379 (_("%B has has both the current and legacy " 10380 "Tag_MPextension_use attributes"), 10381 ibfd); 10382 result = FALSE; 10383 } 10384 } 10385 10386 if (in_attr[i].i > out_attr[Tag_MPextension_use].i) 10387 out_attr[Tag_MPextension_use] = in_attr[i]; 10388 10389 break; 10390 10391 case Tag_nodefaults: 10392 /* This tag is set if it exists, but the value is unused (and is 10393 typically zero). We don't actually need to do anything here - 10394 the merge happens automatically when the type flags are merged 10395 below. */ 10396 break; 10397 case Tag_also_compatible_with: 10398 /* Already done in Tag_CPU_arch. */ 10399 break; 10400 case Tag_conformance: 10401 /* Keep the attribute if it matches. Throw it away otherwise. 10402 No attribute means no claim to conform. */ 10403 if (!in_attr[i].s || !out_attr[i].s 10404 || strcmp (in_attr[i].s, out_attr[i].s) != 0) 10405 out_attr[i].s = NULL; 10406 break; 10407 10408 default: 10409 result 10410 = result && _bfd_elf_merge_unknown_attribute_low (ibfd, obfd, i); 10411 } 10412 10413 /* If out_attr was copied from in_attr then it won't have a type yet. */ 10414 if (in_attr[i].type && !out_attr[i].type) 10415 out_attr[i].type = in_attr[i].type; 10416 } 10417 10418 /* Merge Tag_compatibility attributes and any common GNU ones. */ 10419 if (!_bfd_elf_merge_object_attributes (ibfd, obfd)) 10420 return FALSE; 10421 10422 /* Check for any attributes not known on ARM. */ 10423 result &= _bfd_elf_merge_unknown_attribute_list (ibfd, obfd); 10424 10425 return result; 10426 } 10427 10428 10429 /* Return TRUE if the two EABI versions are incompatible. */ 10430 10431 static bfd_boolean 10432 elf32_arm_versions_compatible (unsigned iver, unsigned over) 10433 { 10434 /* v4 and v5 are the same spec before and after it was released, 10435 so allow mixing them. */ 10436 if ((iver == EF_ARM_EABI_VER4 && over == EF_ARM_EABI_VER5) 10437 || (iver == EF_ARM_EABI_VER5 && over == EF_ARM_EABI_VER4)) 10438 return TRUE; 10439 10440 return (iver == over); 10441 } 10442 10443 /* Merge backend specific data from an object file to the output 10444 object file when linking. */ 10445 10446 static bfd_boolean 10447 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd); 10448 10449 /* Display the flags field. */ 10450 10451 static bfd_boolean 10452 elf32_arm_print_private_bfd_data (bfd *abfd, void * ptr) 10453 { 10454 FILE * file = (FILE *) ptr; 10455 unsigned long flags; 10456 10457 BFD_ASSERT (abfd != NULL && ptr != NULL); 10458 10459 /* Print normal ELF private data. */ 10460 _bfd_elf_print_private_bfd_data (abfd, ptr); 10461 10462 flags = elf_elfheader (abfd)->e_flags; 10463 /* Ignore init flag - it may not be set, despite the flags field 10464 containing valid data. */ 10465 10466 /* xgettext:c-format */ 10467 fprintf (file, _("private flags = %lx:"), elf_elfheader (abfd)->e_flags); 10468 10469 switch (EF_ARM_EABI_VERSION (flags)) 10470 { 10471 case EF_ARM_EABI_UNKNOWN: 10472 /* The following flag bits are GNU extensions and not part of the 10473 official ARM ELF extended ABI. Hence they are only decoded if 10474 the EABI version is not set. */ 10475 if (flags & EF_ARM_INTERWORK) 10476 fprintf (file, _(" [interworking enabled]")); 10477 10478 if (flags & EF_ARM_APCS_26) 10479 fprintf (file, " [APCS-26]"); 10480 else 10481 fprintf (file, " [APCS-32]"); 10482 10483 if (flags & EF_ARM_VFP_FLOAT) 10484 fprintf (file, _(" [VFP float format]")); 10485 else if (flags & EF_ARM_MAVERICK_FLOAT) 10486 fprintf (file, _(" [Maverick float format]")); 10487 else 10488 fprintf (file, _(" [FPA float format]")); 10489 10490 if (flags & EF_ARM_APCS_FLOAT) 10491 fprintf (file, _(" [floats passed in float registers]")); 10492 10493 if (flags & EF_ARM_PIC) 10494 fprintf (file, _(" [position independent]")); 10495 10496 if (flags & EF_ARM_NEW_ABI) 10497 fprintf (file, _(" [new ABI]")); 10498 10499 if (flags & EF_ARM_OLD_ABI) 10500 fprintf (file, _(" [old ABI]")); 10501 10502 if (flags & EF_ARM_SOFT_FLOAT) 10503 fprintf (file, _(" [software FP]")); 10504 10505 flags &= ~(EF_ARM_INTERWORK | EF_ARM_APCS_26 | EF_ARM_APCS_FLOAT 10506 | EF_ARM_PIC | EF_ARM_NEW_ABI | EF_ARM_OLD_ABI 10507 | EF_ARM_SOFT_FLOAT | EF_ARM_VFP_FLOAT 10508 | EF_ARM_MAVERICK_FLOAT); 10509 break; 10510 10511 case EF_ARM_EABI_VER1: 10512 fprintf (file, _(" [Version1 EABI]")); 10513 10514 if (flags & EF_ARM_SYMSARESORTED) 10515 fprintf (file, _(" [sorted symbol table]")); 10516 else 10517 fprintf (file, _(" [unsorted symbol table]")); 10518 10519 flags &= ~ EF_ARM_SYMSARESORTED; 10520 break; 10521 10522 case EF_ARM_EABI_VER2: 10523 fprintf (file, _(" [Version2 EABI]")); 10524 10525 if (flags & EF_ARM_SYMSARESORTED) 10526 fprintf (file, _(" [sorted symbol table]")); 10527 else 10528 fprintf (file, _(" [unsorted symbol table]")); 10529 10530 if (flags & EF_ARM_DYNSYMSUSESEGIDX) 10531 fprintf (file, _(" [dynamic symbols use segment index]")); 10532 10533 if (flags & EF_ARM_MAPSYMSFIRST) 10534 fprintf (file, _(" [mapping symbols precede others]")); 10535 10536 flags &= ~(EF_ARM_SYMSARESORTED | EF_ARM_DYNSYMSUSESEGIDX 10537 | EF_ARM_MAPSYMSFIRST); 10538 break; 10539 10540 case EF_ARM_EABI_VER3: 10541 fprintf (file, _(" [Version3 EABI]")); 10542 break; 10543 10544 case EF_ARM_EABI_VER4: 10545 fprintf (file, _(" [Version4 EABI]")); 10546 goto eabi; 10547 10548 case EF_ARM_EABI_VER5: 10549 fprintf (file, _(" [Version5 EABI]")); 10550 eabi: 10551 if (flags & EF_ARM_BE8) 10552 fprintf (file, _(" [BE8]")); 10553 10554 if (flags & EF_ARM_LE8) 10555 fprintf (file, _(" [LE8]")); 10556 10557 flags &= ~(EF_ARM_LE8 | EF_ARM_BE8); 10558 break; 10559 10560 default: 10561 fprintf (file, _(" <EABI version unrecognised>")); 10562 break; 10563 } 10564 10565 flags &= ~ EF_ARM_EABIMASK; 10566 10567 if (flags & EF_ARM_RELEXEC) 10568 fprintf (file, _(" [relocatable executable]")); 10569 10570 if (flags & EF_ARM_HASENTRY) 10571 fprintf (file, _(" [has entry point]")); 10572 10573 flags &= ~ (EF_ARM_RELEXEC | EF_ARM_HASENTRY); 10574 10575 if (flags) 10576 fprintf (file, _("<Unrecognised flag bits set>")); 10577 10578 fputc ('\n', file); 10579 10580 return TRUE; 10581 } 10582 10583 static int 10584 elf32_arm_get_symbol_type (Elf_Internal_Sym * elf_sym, int type) 10585 { 10586 switch (ELF_ST_TYPE (elf_sym->st_info)) 10587 { 10588 case STT_ARM_TFUNC: 10589 return ELF_ST_TYPE (elf_sym->st_info); 10590 10591 case STT_ARM_16BIT: 10592 /* If the symbol is not an object, return the STT_ARM_16BIT flag. 10593 This allows us to distinguish between data used by Thumb instructions 10594 and non-data (which is probably code) inside Thumb regions of an 10595 executable. */ 10596 if (type != STT_OBJECT && type != STT_TLS) 10597 return ELF_ST_TYPE (elf_sym->st_info); 10598 break; 10599 10600 default: 10601 break; 10602 } 10603 10604 return type; 10605 } 10606 10607 static asection * 10608 elf32_arm_gc_mark_hook (asection *sec, 10609 struct bfd_link_info *info, 10610 Elf_Internal_Rela *rel, 10611 struct elf_link_hash_entry *h, 10612 Elf_Internal_Sym *sym) 10613 { 10614 if (h != NULL) 10615 switch (ELF32_R_TYPE (rel->r_info)) 10616 { 10617 case R_ARM_GNU_VTINHERIT: 10618 case R_ARM_GNU_VTENTRY: 10619 return NULL; 10620 } 10621 10622 return _bfd_elf_gc_mark_hook (sec, info, rel, h, sym); 10623 } 10624 10625 /* Update the got entry reference counts for the section being removed. */ 10626 10627 static bfd_boolean 10628 elf32_arm_gc_sweep_hook (bfd * abfd, 10629 struct bfd_link_info * info, 10630 asection * sec, 10631 const Elf_Internal_Rela * relocs) 10632 { 10633 Elf_Internal_Shdr *symtab_hdr; 10634 struct elf_link_hash_entry **sym_hashes; 10635 bfd_signed_vma *local_got_refcounts; 10636 const Elf_Internal_Rela *rel, *relend; 10637 struct elf32_arm_link_hash_table * globals; 10638 10639 if (info->relocatable) 10640 return TRUE; 10641 10642 globals = elf32_arm_hash_table (info); 10643 if (globals == NULL) 10644 return FALSE; 10645 10646 elf_section_data (sec)->local_dynrel = NULL; 10647 10648 symtab_hdr = & elf_symtab_hdr (abfd); 10649 sym_hashes = elf_sym_hashes (abfd); 10650 local_got_refcounts = elf_local_got_refcounts (abfd); 10651 10652 check_use_blx (globals); 10653 10654 relend = relocs + sec->reloc_count; 10655 for (rel = relocs; rel < relend; rel++) 10656 { 10657 unsigned long r_symndx; 10658 struct elf_link_hash_entry *h = NULL; 10659 int r_type; 10660 10661 r_symndx = ELF32_R_SYM (rel->r_info); 10662 if (r_symndx >= symtab_hdr->sh_info) 10663 { 10664 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 10665 while (h->root.type == bfd_link_hash_indirect 10666 || h->root.type == bfd_link_hash_warning) 10667 h = (struct elf_link_hash_entry *) h->root.u.i.link; 10668 } 10669 10670 r_type = ELF32_R_TYPE (rel->r_info); 10671 r_type = arm_real_reloc_type (globals, r_type); 10672 switch (r_type) 10673 { 10674 case R_ARM_GOT32: 10675 case R_ARM_GOT_PREL: 10676 case R_ARM_TLS_GD32: 10677 case R_ARM_TLS_IE32: 10678 if (h != NULL) 10679 { 10680 if (h->got.refcount > 0) 10681 h->got.refcount -= 1; 10682 } 10683 else if (local_got_refcounts != NULL) 10684 { 10685 if (local_got_refcounts[r_symndx] > 0) 10686 local_got_refcounts[r_symndx] -= 1; 10687 } 10688 break; 10689 10690 case R_ARM_TLS_LDM32: 10691 globals->tls_ldm_got.refcount -= 1; 10692 break; 10693 10694 case R_ARM_ABS32: 10695 case R_ARM_ABS32_NOI: 10696 case R_ARM_REL32: 10697 case R_ARM_REL32_NOI: 10698 case R_ARM_PC24: 10699 case R_ARM_PLT32: 10700 case R_ARM_CALL: 10701 case R_ARM_JUMP24: 10702 case R_ARM_PREL31: 10703 case R_ARM_THM_CALL: 10704 case R_ARM_THM_JUMP24: 10705 case R_ARM_THM_JUMP19: 10706 case R_ARM_MOVW_ABS_NC: 10707 case R_ARM_MOVT_ABS: 10708 case R_ARM_MOVW_PREL_NC: 10709 case R_ARM_MOVT_PREL: 10710 case R_ARM_THM_MOVW_ABS_NC: 10711 case R_ARM_THM_MOVT_ABS: 10712 case R_ARM_THM_MOVW_PREL_NC: 10713 case R_ARM_THM_MOVT_PREL: 10714 /* Should the interworking branches be here also? */ 10715 10716 if (h != NULL) 10717 { 10718 struct elf32_arm_link_hash_entry *eh; 10719 struct elf32_arm_relocs_copied **pp; 10720 struct elf32_arm_relocs_copied *p; 10721 10722 eh = (struct elf32_arm_link_hash_entry *) h; 10723 10724 if (h->plt.refcount > 0) 10725 { 10726 h->plt.refcount -= 1; 10727 if (r_type == R_ARM_THM_CALL) 10728 eh->plt_maybe_thumb_refcount--; 10729 10730 if (r_type == R_ARM_THM_JUMP24 10731 || r_type == R_ARM_THM_JUMP19) 10732 eh->plt_thumb_refcount--; 10733 } 10734 10735 if (r_type == R_ARM_ABS32 10736 || r_type == R_ARM_REL32 10737 || r_type == R_ARM_ABS32_NOI 10738 || r_type == R_ARM_REL32_NOI) 10739 { 10740 for (pp = &eh->relocs_copied; (p = *pp) != NULL; 10741 pp = &p->next) 10742 if (p->section == sec) 10743 { 10744 p->count -= 1; 10745 if (ELF32_R_TYPE (rel->r_info) == R_ARM_REL32 10746 || ELF32_R_TYPE (rel->r_info) == R_ARM_REL32_NOI) 10747 p->pc_count -= 1; 10748 if (p->count == 0) 10749 *pp = p->next; 10750 break; 10751 } 10752 } 10753 } 10754 break; 10755 10756 default: 10757 break; 10758 } 10759 } 10760 10761 return TRUE; 10762 } 10763 10764 /* Look through the relocs for a section during the first phase. */ 10765 10766 static bfd_boolean 10767 elf32_arm_check_relocs (bfd *abfd, struct bfd_link_info *info, 10768 asection *sec, const Elf_Internal_Rela *relocs) 10769 { 10770 Elf_Internal_Shdr *symtab_hdr; 10771 struct elf_link_hash_entry **sym_hashes; 10772 const Elf_Internal_Rela *rel; 10773 const Elf_Internal_Rela *rel_end; 10774 bfd *dynobj; 10775 asection *sreloc; 10776 struct elf32_arm_link_hash_table *htab; 10777 bfd_boolean needs_plt; 10778 unsigned long nsyms; 10779 10780 if (info->relocatable) 10781 return TRUE; 10782 10783 BFD_ASSERT (is_arm_elf (abfd)); 10784 10785 htab = elf32_arm_hash_table (info); 10786 if (htab == NULL) 10787 return FALSE; 10788 10789 sreloc = NULL; 10790 10791 /* Create dynamic sections for relocatable executables so that we can 10792 copy relocations. */ 10793 if (htab->root.is_relocatable_executable 10794 && ! htab->root.dynamic_sections_created) 10795 { 10796 if (! _bfd_elf_link_create_dynamic_sections (abfd, info)) 10797 return FALSE; 10798 } 10799 10800 dynobj = elf_hash_table (info)->dynobj; 10801 symtab_hdr = & elf_symtab_hdr (abfd); 10802 sym_hashes = elf_sym_hashes (abfd); 10803 nsyms = NUM_SHDR_ENTRIES (symtab_hdr); 10804 10805 rel_end = relocs + sec->reloc_count; 10806 for (rel = relocs; rel < rel_end; rel++) 10807 { 10808 struct elf_link_hash_entry *h; 10809 struct elf32_arm_link_hash_entry *eh; 10810 unsigned long r_symndx; 10811 int r_type; 10812 10813 r_symndx = ELF32_R_SYM (rel->r_info); 10814 r_type = ELF32_R_TYPE (rel->r_info); 10815 r_type = arm_real_reloc_type (htab, r_type); 10816 10817 if (r_symndx >= nsyms 10818 /* PR 9934: It is possible to have relocations that do not 10819 refer to symbols, thus it is also possible to have an 10820 object file containing relocations but no symbol table. */ 10821 && (r_symndx > STN_UNDEF || nsyms > 0)) 10822 { 10823 (*_bfd_error_handler) (_("%B: bad symbol index: %d"), abfd, 10824 r_symndx); 10825 return FALSE; 10826 } 10827 10828 if (nsyms == 0 || r_symndx < symtab_hdr->sh_info) 10829 h = NULL; 10830 else 10831 { 10832 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 10833 while (h->root.type == bfd_link_hash_indirect 10834 || h->root.type == bfd_link_hash_warning) 10835 h = (struct elf_link_hash_entry *) h->root.u.i.link; 10836 } 10837 10838 eh = (struct elf32_arm_link_hash_entry *) h; 10839 10840 switch (r_type) 10841 { 10842 case R_ARM_GOT32: 10843 case R_ARM_GOT_PREL: 10844 case R_ARM_TLS_GD32: 10845 case R_ARM_TLS_IE32: 10846 /* This symbol requires a global offset table entry. */ 10847 { 10848 int tls_type, old_tls_type; 10849 10850 switch (r_type) 10851 { 10852 case R_ARM_TLS_GD32: tls_type = GOT_TLS_GD; break; 10853 case R_ARM_TLS_IE32: tls_type = GOT_TLS_IE; break; 10854 default: tls_type = GOT_NORMAL; break; 10855 } 10856 10857 if (h != NULL) 10858 { 10859 h->got.refcount++; 10860 old_tls_type = elf32_arm_hash_entry (h)->tls_type; 10861 } 10862 else 10863 { 10864 bfd_signed_vma *local_got_refcounts; 10865 10866 /* This is a global offset table entry for a local symbol. */ 10867 local_got_refcounts = elf_local_got_refcounts (abfd); 10868 if (local_got_refcounts == NULL) 10869 { 10870 bfd_size_type size; 10871 10872 size = symtab_hdr->sh_info; 10873 size *= (sizeof (bfd_signed_vma) + sizeof (char)); 10874 local_got_refcounts = (bfd_signed_vma *) 10875 bfd_zalloc (abfd, size); 10876 if (local_got_refcounts == NULL) 10877 return FALSE; 10878 elf_local_got_refcounts (abfd) = local_got_refcounts; 10879 elf32_arm_local_got_tls_type (abfd) 10880 = (char *) (local_got_refcounts + symtab_hdr->sh_info); 10881 } 10882 local_got_refcounts[r_symndx] += 1; 10883 old_tls_type = elf32_arm_local_got_tls_type (abfd) [r_symndx]; 10884 } 10885 10886 /* We will already have issued an error message if there is a 10887 TLS / non-TLS mismatch, based on the symbol type. We don't 10888 support any linker relaxations. So just combine any TLS 10889 types needed. */ 10890 if (old_tls_type != GOT_UNKNOWN && old_tls_type != GOT_NORMAL 10891 && tls_type != GOT_NORMAL) 10892 tls_type |= old_tls_type; 10893 10894 if (old_tls_type != tls_type) 10895 { 10896 if (h != NULL) 10897 elf32_arm_hash_entry (h)->tls_type = tls_type; 10898 else 10899 elf32_arm_local_got_tls_type (abfd) [r_symndx] = tls_type; 10900 } 10901 } 10902 /* Fall through. */ 10903 10904 case R_ARM_TLS_LDM32: 10905 if (r_type == R_ARM_TLS_LDM32) 10906 htab->tls_ldm_got.refcount++; 10907 /* Fall through. */ 10908 10909 case R_ARM_GOTOFF32: 10910 case R_ARM_GOTPC: 10911 if (htab->sgot == NULL) 10912 { 10913 if (htab->root.dynobj == NULL) 10914 htab->root.dynobj = abfd; 10915 if (!create_got_section (htab->root.dynobj, info)) 10916 return FALSE; 10917 } 10918 break; 10919 10920 case R_ARM_ABS12: 10921 /* VxWorks uses dynamic R_ARM_ABS12 relocations for 10922 ldr __GOTT_INDEX__ offsets. */ 10923 if (!htab->vxworks_p) 10924 break; 10925 /* Fall through. */ 10926 10927 case R_ARM_PC24: 10928 case R_ARM_PLT32: 10929 case R_ARM_CALL: 10930 case R_ARM_JUMP24: 10931 case R_ARM_PREL31: 10932 case R_ARM_THM_CALL: 10933 case R_ARM_THM_JUMP24: 10934 case R_ARM_THM_JUMP19: 10935 needs_plt = 1; 10936 goto normal_reloc; 10937 10938 case R_ARM_MOVW_ABS_NC: 10939 case R_ARM_MOVT_ABS: 10940 case R_ARM_THM_MOVW_ABS_NC: 10941 case R_ARM_THM_MOVT_ABS: 10942 if (info->shared) 10943 { 10944 (*_bfd_error_handler) 10945 (_("%B: relocation %s against `%s' can not be used when making a shared object; recompile with -fPIC"), 10946 abfd, elf32_arm_howto_table_1[r_type].name, 10947 (h) ? h->root.root.string : "a local symbol"); 10948 bfd_set_error (bfd_error_bad_value); 10949 return FALSE; 10950 } 10951 10952 /* Fall through. */ 10953 case R_ARM_ABS32: 10954 case R_ARM_ABS32_NOI: 10955 case R_ARM_REL32: 10956 case R_ARM_REL32_NOI: 10957 case R_ARM_MOVW_PREL_NC: 10958 case R_ARM_MOVT_PREL: 10959 case R_ARM_THM_MOVW_PREL_NC: 10960 case R_ARM_THM_MOVT_PREL: 10961 needs_plt = 0; 10962 normal_reloc: 10963 10964 /* Should the interworking branches be listed here? */ 10965 if (h != NULL) 10966 { 10967 /* If this reloc is in a read-only section, we might 10968 need a copy reloc. We can't check reliably at this 10969 stage whether the section is read-only, as input 10970 sections have not yet been mapped to output sections. 10971 Tentatively set the flag for now, and correct in 10972 adjust_dynamic_symbol. */ 10973 if (!info->shared) 10974 h->non_got_ref = 1; 10975 10976 /* We may need a .plt entry if the function this reloc 10977 refers to is in a different object. We can't tell for 10978 sure yet, because something later might force the 10979 symbol local. */ 10980 if (needs_plt) 10981 h->needs_plt = 1; 10982 10983 /* If we create a PLT entry, this relocation will reference 10984 it, even if it's an ABS32 relocation. */ 10985 h->plt.refcount += 1; 10986 10987 /* It's too early to use htab->use_blx here, so we have to 10988 record possible blx references separately from 10989 relocs that definitely need a thumb stub. */ 10990 10991 if (r_type == R_ARM_THM_CALL) 10992 eh->plt_maybe_thumb_refcount += 1; 10993 10994 if (r_type == R_ARM_THM_JUMP24 10995 || r_type == R_ARM_THM_JUMP19) 10996 eh->plt_thumb_refcount += 1; 10997 } 10998 10999 /* If we are creating a shared library or relocatable executable, 11000 and this is a reloc against a global symbol, or a non PC 11001 relative reloc against a local symbol, then we need to copy 11002 the reloc into the shared library. However, if we are linking 11003 with -Bsymbolic, we do not need to copy a reloc against a 11004 global symbol which is defined in an object we are 11005 including in the link (i.e., DEF_REGULAR is set). At 11006 this point we have not seen all the input files, so it is 11007 possible that DEF_REGULAR is not set now but will be set 11008 later (it is never cleared). We account for that 11009 possibility below by storing information in the 11010 relocs_copied field of the hash table entry. */ 11011 if ((info->shared || htab->root.is_relocatable_executable) 11012 && (sec->flags & SEC_ALLOC) != 0 11013 && ((r_type == R_ARM_ABS32 || r_type == R_ARM_ABS32_NOI) 11014 || (h != NULL && ! h->needs_plt 11015 && (! info->symbolic || ! h->def_regular)))) 11016 { 11017 struct elf32_arm_relocs_copied *p, **head; 11018 11019 /* When creating a shared object, we must copy these 11020 reloc types into the output file. We create a reloc 11021 section in dynobj and make room for this reloc. */ 11022 if (sreloc == NULL) 11023 { 11024 sreloc = _bfd_elf_make_dynamic_reloc_section 11025 (sec, dynobj, 2, abfd, ! htab->use_rel); 11026 11027 if (sreloc == NULL) 11028 return FALSE; 11029 11030 /* BPABI objects never have dynamic relocations mapped. */ 11031 if (htab->symbian_p) 11032 { 11033 flagword flags; 11034 11035 flags = bfd_get_section_flags (dynobj, sreloc); 11036 flags &= ~(SEC_LOAD | SEC_ALLOC); 11037 bfd_set_section_flags (dynobj, sreloc, flags); 11038 } 11039 } 11040 11041 /* If this is a global symbol, we count the number of 11042 relocations we need for this symbol. */ 11043 if (h != NULL) 11044 { 11045 head = &((struct elf32_arm_link_hash_entry *) h)->relocs_copied; 11046 } 11047 else 11048 { 11049 /* Track dynamic relocs needed for local syms too. 11050 We really need local syms available to do this 11051 easily. Oh well. */ 11052 asection *s; 11053 void *vpp; 11054 Elf_Internal_Sym *isym; 11055 11056 isym = bfd_sym_from_r_symndx (&htab->sym_cache, 11057 abfd, r_symndx); 11058 if (isym == NULL) 11059 return FALSE; 11060 11061 s = bfd_section_from_elf_index (abfd, isym->st_shndx); 11062 if (s == NULL) 11063 s = sec; 11064 11065 vpp = &elf_section_data (s)->local_dynrel; 11066 head = (struct elf32_arm_relocs_copied **) vpp; 11067 } 11068 11069 p = *head; 11070 if (p == NULL || p->section != sec) 11071 { 11072 bfd_size_type amt = sizeof *p; 11073 11074 p = (struct elf32_arm_relocs_copied *) 11075 bfd_alloc (htab->root.dynobj, amt); 11076 if (p == NULL) 11077 return FALSE; 11078 p->next = *head; 11079 *head = p; 11080 p->section = sec; 11081 p->count = 0; 11082 p->pc_count = 0; 11083 } 11084 11085 if (r_type == R_ARM_REL32 || r_type == R_ARM_REL32_NOI) 11086 p->pc_count += 1; 11087 p->count += 1; 11088 } 11089 break; 11090 11091 /* This relocation describes the C++ object vtable hierarchy. 11092 Reconstruct it for later use during GC. */ 11093 case R_ARM_GNU_VTINHERIT: 11094 if (!bfd_elf_gc_record_vtinherit (abfd, sec, h, rel->r_offset)) 11095 return FALSE; 11096 break; 11097 11098 /* This relocation describes which C++ vtable entries are actually 11099 used. Record for later use during GC. */ 11100 case R_ARM_GNU_VTENTRY: 11101 BFD_ASSERT (h != NULL); 11102 if (h != NULL 11103 && !bfd_elf_gc_record_vtentry (abfd, sec, h, rel->r_offset)) 11104 return FALSE; 11105 break; 11106 } 11107 } 11108 11109 return TRUE; 11110 } 11111 11112 /* Unwinding tables are not referenced directly. This pass marks them as 11113 required if the corresponding code section is marked. */ 11114 11115 static bfd_boolean 11116 elf32_arm_gc_mark_extra_sections (struct bfd_link_info *info, 11117 elf_gc_mark_hook_fn gc_mark_hook) 11118 { 11119 bfd *sub; 11120 Elf_Internal_Shdr **elf_shdrp; 11121 bfd_boolean again; 11122 11123 /* Marking EH data may cause additional code sections to be marked, 11124 requiring multiple passes. */ 11125 again = TRUE; 11126 while (again) 11127 { 11128 again = FALSE; 11129 for (sub = info->input_bfds; sub != NULL; sub = sub->link_next) 11130 { 11131 asection *o; 11132 11133 if (! is_arm_elf (sub)) 11134 continue; 11135 11136 elf_shdrp = elf_elfsections (sub); 11137 for (o = sub->sections; o != NULL; o = o->next) 11138 { 11139 Elf_Internal_Shdr *hdr; 11140 11141 hdr = &elf_section_data (o)->this_hdr; 11142 if (hdr->sh_type == SHT_ARM_EXIDX 11143 && hdr->sh_link 11144 && hdr->sh_link < elf_numsections (sub) 11145 && !o->gc_mark 11146 && elf_shdrp[hdr->sh_link]->bfd_section->gc_mark) 11147 { 11148 again = TRUE; 11149 if (!_bfd_elf_gc_mark (info, o, gc_mark_hook)) 11150 return FALSE; 11151 } 11152 } 11153 } 11154 } 11155 11156 return TRUE; 11157 } 11158 11159 /* Treat mapping symbols as special target symbols. */ 11160 11161 static bfd_boolean 11162 elf32_arm_is_target_special_symbol (bfd * abfd ATTRIBUTE_UNUSED, asymbol * sym) 11163 { 11164 return bfd_is_arm_special_symbol_name (sym->name, 11165 BFD_ARM_SPECIAL_SYM_TYPE_ANY); 11166 } 11167 11168 /* This is a copy of elf_find_function() from elf.c except that 11169 ARM mapping symbols are ignored when looking for function names 11170 and STT_ARM_TFUNC is considered to a function type. */ 11171 11172 static bfd_boolean 11173 arm_elf_find_function (bfd * abfd ATTRIBUTE_UNUSED, 11174 asection * section, 11175 asymbol ** symbols, 11176 bfd_vma offset, 11177 const char ** filename_ptr, 11178 const char ** functionname_ptr) 11179 { 11180 const char * filename = NULL; 11181 asymbol * func = NULL; 11182 bfd_vma low_func = 0; 11183 asymbol ** p; 11184 11185 for (p = symbols; *p != NULL; p++) 11186 { 11187 elf_symbol_type *q; 11188 11189 q = (elf_symbol_type *) *p; 11190 11191 switch (ELF_ST_TYPE (q->internal_elf_sym.st_info)) 11192 { 11193 default: 11194 break; 11195 case STT_FILE: 11196 filename = bfd_asymbol_name (&q->symbol); 11197 break; 11198 case STT_FUNC: 11199 case STT_ARM_TFUNC: 11200 case STT_NOTYPE: 11201 /* Skip mapping symbols. */ 11202 if ((q->symbol.flags & BSF_LOCAL) 11203 && bfd_is_arm_special_symbol_name (q->symbol.name, 11204 BFD_ARM_SPECIAL_SYM_TYPE_ANY)) 11205 continue; 11206 /* Fall through. */ 11207 if (bfd_get_section (&q->symbol) == section 11208 && q->symbol.value >= low_func 11209 && q->symbol.value <= offset) 11210 { 11211 func = (asymbol *) q; 11212 low_func = q->symbol.value; 11213 } 11214 break; 11215 } 11216 } 11217 11218 if (func == NULL) 11219 return FALSE; 11220 11221 if (filename_ptr) 11222 *filename_ptr = filename; 11223 if (functionname_ptr) 11224 *functionname_ptr = bfd_asymbol_name (func); 11225 11226 return TRUE; 11227 } 11228 11229 11230 /* Find the nearest line to a particular section and offset, for error 11231 reporting. This code is a duplicate of the code in elf.c, except 11232 that it uses arm_elf_find_function. */ 11233 11234 static bfd_boolean 11235 elf32_arm_find_nearest_line (bfd * abfd, 11236 asection * section, 11237 asymbol ** symbols, 11238 bfd_vma offset, 11239 const char ** filename_ptr, 11240 const char ** functionname_ptr, 11241 unsigned int * line_ptr) 11242 { 11243 bfd_boolean found = FALSE; 11244 11245 /* We skip _bfd_dwarf1_find_nearest_line since no known ARM toolchain uses it. */ 11246 11247 if (_bfd_dwarf2_find_nearest_line (abfd, section, symbols, offset, 11248 filename_ptr, functionname_ptr, 11249 line_ptr, 0, 11250 & elf_tdata (abfd)->dwarf2_find_line_info)) 11251 { 11252 if (!*functionname_ptr) 11253 arm_elf_find_function (abfd, section, symbols, offset, 11254 *filename_ptr ? NULL : filename_ptr, 11255 functionname_ptr); 11256 11257 return TRUE; 11258 } 11259 11260 if (! _bfd_stab_section_find_nearest_line (abfd, symbols, section, offset, 11261 & found, filename_ptr, 11262 functionname_ptr, line_ptr, 11263 & elf_tdata (abfd)->line_info)) 11264 return FALSE; 11265 11266 if (found && (*functionname_ptr || *line_ptr)) 11267 return TRUE; 11268 11269 if (symbols == NULL) 11270 return FALSE; 11271 11272 if (! arm_elf_find_function (abfd, section, symbols, offset, 11273 filename_ptr, functionname_ptr)) 11274 return FALSE; 11275 11276 *line_ptr = 0; 11277 return TRUE; 11278 } 11279 11280 static bfd_boolean 11281 elf32_arm_find_inliner_info (bfd * abfd, 11282 const char ** filename_ptr, 11283 const char ** functionname_ptr, 11284 unsigned int * line_ptr) 11285 { 11286 bfd_boolean found; 11287 found = _bfd_dwarf2_find_inliner_info (abfd, filename_ptr, 11288 functionname_ptr, line_ptr, 11289 & elf_tdata (abfd)->dwarf2_find_line_info); 11290 return found; 11291 } 11292 11293 /* Adjust a symbol defined by a dynamic object and referenced by a 11294 regular object. The current definition is in some section of the 11295 dynamic object, but we're not including those sections. We have to 11296 change the definition to something the rest of the link can 11297 understand. */ 11298 11299 static bfd_boolean 11300 elf32_arm_adjust_dynamic_symbol (struct bfd_link_info * info, 11301 struct elf_link_hash_entry * h) 11302 { 11303 bfd * dynobj; 11304 asection * s; 11305 struct elf32_arm_link_hash_entry * eh; 11306 struct elf32_arm_link_hash_table *globals; 11307 11308 globals = elf32_arm_hash_table (info); 11309 if (globals == NULL) 11310 return FALSE; 11311 11312 dynobj = elf_hash_table (info)->dynobj; 11313 11314 /* Make sure we know what is going on here. */ 11315 BFD_ASSERT (dynobj != NULL 11316 && (h->needs_plt 11317 || h->u.weakdef != NULL 11318 || (h->def_dynamic 11319 && h->ref_regular 11320 && !h->def_regular))); 11321 11322 eh = (struct elf32_arm_link_hash_entry *) h; 11323 11324 /* If this is a function, put it in the procedure linkage table. We 11325 will fill in the contents of the procedure linkage table later, 11326 when we know the address of the .got section. */ 11327 if (h->type == STT_FUNC || h->type == STT_ARM_TFUNC 11328 || h->needs_plt) 11329 { 11330 if (h->plt.refcount <= 0 11331 || SYMBOL_CALLS_LOCAL (info, h) 11332 || (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT 11333 && h->root.type == bfd_link_hash_undefweak)) 11334 { 11335 /* This case can occur if we saw a PLT32 reloc in an input 11336 file, but the symbol was never referred to by a dynamic 11337 object, or if all references were garbage collected. In 11338 such a case, we don't actually need to build a procedure 11339 linkage table, and we can just do a PC24 reloc instead. */ 11340 h->plt.offset = (bfd_vma) -1; 11341 eh->plt_thumb_refcount = 0; 11342 eh->plt_maybe_thumb_refcount = 0; 11343 h->needs_plt = 0; 11344 } 11345 11346 return TRUE; 11347 } 11348 else 11349 { 11350 /* It's possible that we incorrectly decided a .plt reloc was 11351 needed for an R_ARM_PC24 or similar reloc to a non-function sym 11352 in check_relocs. We can't decide accurately between function 11353 and non-function syms in check-relocs; Objects loaded later in 11354 the link may change h->type. So fix it now. */ 11355 h->plt.offset = (bfd_vma) -1; 11356 eh->plt_thumb_refcount = 0; 11357 eh->plt_maybe_thumb_refcount = 0; 11358 } 11359 11360 /* If this is a weak symbol, and there is a real definition, the 11361 processor independent code will have arranged for us to see the 11362 real definition first, and we can just use the same value. */ 11363 if (h->u.weakdef != NULL) 11364 { 11365 BFD_ASSERT (h->u.weakdef->root.type == bfd_link_hash_defined 11366 || h->u.weakdef->root.type == bfd_link_hash_defweak); 11367 h->root.u.def.section = h->u.weakdef->root.u.def.section; 11368 h->root.u.def.value = h->u.weakdef->root.u.def.value; 11369 return TRUE; 11370 } 11371 11372 /* If there are no non-GOT references, we do not need a copy 11373 relocation. */ 11374 if (!h->non_got_ref) 11375 return TRUE; 11376 11377 /* This is a reference to a symbol defined by a dynamic object which 11378 is not a function. */ 11379 11380 /* If we are creating a shared library, we must presume that the 11381 only references to the symbol are via the global offset table. 11382 For such cases we need not do anything here; the relocations will 11383 be handled correctly by relocate_section. Relocatable executables 11384 can reference data in shared objects directly, so we don't need to 11385 do anything here. */ 11386 if (info->shared || globals->root.is_relocatable_executable) 11387 return TRUE; 11388 11389 if (h->size == 0) 11390 { 11391 (*_bfd_error_handler) (_("dynamic variable `%s' is zero size"), 11392 h->root.root.string); 11393 return TRUE; 11394 } 11395 11396 /* We must allocate the symbol in our .dynbss section, which will 11397 become part of the .bss section of the executable. There will be 11398 an entry for this symbol in the .dynsym section. The dynamic 11399 object will contain position independent code, so all references 11400 from the dynamic object to this symbol will go through the global 11401 offset table. The dynamic linker will use the .dynsym entry to 11402 determine the address it must put in the global offset table, so 11403 both the dynamic object and the regular object will refer to the 11404 same memory location for the variable. */ 11405 s = bfd_get_section_by_name (dynobj, ".dynbss"); 11406 BFD_ASSERT (s != NULL); 11407 11408 /* We must generate a R_ARM_COPY reloc to tell the dynamic linker to 11409 copy the initial value out of the dynamic object and into the 11410 runtime process image. We need to remember the offset into the 11411 .rel(a).bss section we are going to use. */ 11412 if ((h->root.u.def.section->flags & SEC_ALLOC) != 0) 11413 { 11414 asection *srel; 11415 11416 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (globals, ".bss")); 11417 BFD_ASSERT (srel != NULL); 11418 srel->size += RELOC_SIZE (globals); 11419 h->needs_copy = 1; 11420 } 11421 11422 return _bfd_elf_adjust_dynamic_copy (h, s); 11423 } 11424 11425 /* Allocate space in .plt, .got and associated reloc sections for 11426 dynamic relocs. */ 11427 11428 static bfd_boolean 11429 allocate_dynrelocs (struct elf_link_hash_entry *h, void * inf) 11430 { 11431 struct bfd_link_info *info; 11432 struct elf32_arm_link_hash_table *htab; 11433 struct elf32_arm_link_hash_entry *eh; 11434 struct elf32_arm_relocs_copied *p; 11435 bfd_signed_vma thumb_refs; 11436 11437 eh = (struct elf32_arm_link_hash_entry *) h; 11438 11439 if (h->root.type == bfd_link_hash_indirect) 11440 return TRUE; 11441 11442 if (h->root.type == bfd_link_hash_warning) 11443 /* When warning symbols are created, they **replace** the "real" 11444 entry in the hash table, thus we never get to see the real 11445 symbol in a hash traversal. So look at it now. */ 11446 h = (struct elf_link_hash_entry *) h->root.u.i.link; 11447 11448 info = (struct bfd_link_info *) inf; 11449 htab = elf32_arm_hash_table (info); 11450 if (htab == NULL) 11451 return FALSE; 11452 11453 if (htab->root.dynamic_sections_created 11454 && h->plt.refcount > 0) 11455 { 11456 /* Make sure this symbol is output as a dynamic symbol. 11457 Undefined weak syms won't yet be marked as dynamic. */ 11458 if (h->dynindx == -1 11459 && !h->forced_local) 11460 { 11461 if (! bfd_elf_link_record_dynamic_symbol (info, h)) 11462 return FALSE; 11463 } 11464 11465 if (info->shared 11466 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (1, 0, h)) 11467 { 11468 asection *s = htab->splt; 11469 11470 /* If this is the first .plt entry, make room for the special 11471 first entry. */ 11472 if (s->size == 0) 11473 s->size += htab->plt_header_size; 11474 11475 h->plt.offset = s->size; 11476 11477 /* If we will insert a Thumb trampoline before this PLT, leave room 11478 for it. */ 11479 thumb_refs = eh->plt_thumb_refcount; 11480 if (!htab->use_blx) 11481 thumb_refs += eh->plt_maybe_thumb_refcount; 11482 11483 if (thumb_refs > 0) 11484 { 11485 h->plt.offset += PLT_THUMB_STUB_SIZE; 11486 s->size += PLT_THUMB_STUB_SIZE; 11487 } 11488 11489 /* If this symbol is not defined in a regular file, and we are 11490 not generating a shared library, then set the symbol to this 11491 location in the .plt. This is required to make function 11492 pointers compare as equal between the normal executable and 11493 the shared library. */ 11494 if (! info->shared 11495 && !h->def_regular) 11496 { 11497 h->root.u.def.section = s; 11498 h->root.u.def.value = h->plt.offset; 11499 11500 /* Make sure the function is not marked as Thumb, in case 11501 it is the target of an ABS32 relocation, which will 11502 point to the PLT entry. */ 11503 if (ELF_ST_TYPE (h->type) == STT_ARM_TFUNC) 11504 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); 11505 } 11506 11507 /* Make room for this entry. */ 11508 s->size += htab->plt_entry_size; 11509 11510 if (!htab->symbian_p) 11511 { 11512 /* We also need to make an entry in the .got.plt section, which 11513 will be placed in the .got section by the linker script. */ 11514 eh->plt_got_offset = htab->sgotplt->size; 11515 htab->sgotplt->size += 4; 11516 } 11517 11518 /* We also need to make an entry in the .rel(a).plt section. */ 11519 htab->srelplt->size += RELOC_SIZE (htab); 11520 11521 /* VxWorks executables have a second set of relocations for 11522 each PLT entry. They go in a separate relocation section, 11523 which is processed by the kernel loader. */ 11524 if (htab->vxworks_p && !info->shared) 11525 { 11526 /* There is a relocation for the initial PLT entry: 11527 an R_ARM_32 relocation for _GLOBAL_OFFSET_TABLE_. */ 11528 if (h->plt.offset == htab->plt_header_size) 11529 htab->srelplt2->size += RELOC_SIZE (htab); 11530 11531 /* There are two extra relocations for each subsequent 11532 PLT entry: an R_ARM_32 relocation for the GOT entry, 11533 and an R_ARM_32 relocation for the PLT entry. */ 11534 htab->srelplt2->size += RELOC_SIZE (htab) * 2; 11535 } 11536 } 11537 else 11538 { 11539 h->plt.offset = (bfd_vma) -1; 11540 h->needs_plt = 0; 11541 } 11542 } 11543 else 11544 { 11545 h->plt.offset = (bfd_vma) -1; 11546 h->needs_plt = 0; 11547 } 11548 11549 if (h->got.refcount > 0) 11550 { 11551 asection *s; 11552 bfd_boolean dyn; 11553 int tls_type = elf32_arm_hash_entry (h)->tls_type; 11554 int indx; 11555 11556 /* Make sure this symbol is output as a dynamic symbol. 11557 Undefined weak syms won't yet be marked as dynamic. */ 11558 if (h->dynindx == -1 11559 && !h->forced_local) 11560 { 11561 if (! bfd_elf_link_record_dynamic_symbol (info, h)) 11562 return FALSE; 11563 } 11564 11565 if (!htab->symbian_p) 11566 { 11567 s = htab->sgot; 11568 h->got.offset = s->size; 11569 11570 if (tls_type == GOT_UNKNOWN) 11571 abort (); 11572 11573 if (tls_type == GOT_NORMAL) 11574 /* Non-TLS symbols need one GOT slot. */ 11575 s->size += 4; 11576 else 11577 { 11578 if (tls_type & GOT_TLS_GD) 11579 /* R_ARM_TLS_GD32 needs 2 consecutive GOT slots. */ 11580 s->size += 8; 11581 if (tls_type & GOT_TLS_IE) 11582 /* R_ARM_TLS_IE32 needs one GOT slot. */ 11583 s->size += 4; 11584 } 11585 11586 dyn = htab->root.dynamic_sections_created; 11587 11588 indx = 0; 11589 if (WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, info->shared, h) 11590 && (!info->shared 11591 || !SYMBOL_REFERENCES_LOCAL (info, h))) 11592 indx = h->dynindx; 11593 11594 if (tls_type != GOT_NORMAL 11595 && (info->shared || indx != 0) 11596 && (ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 11597 || h->root.type != bfd_link_hash_undefweak)) 11598 { 11599 if (tls_type & GOT_TLS_IE) 11600 htab->srelgot->size += RELOC_SIZE (htab); 11601 11602 if (tls_type & GOT_TLS_GD) 11603 htab->srelgot->size += RELOC_SIZE (htab); 11604 11605 if ((tls_type & GOT_TLS_GD) && indx != 0) 11606 htab->srelgot->size += RELOC_SIZE (htab); 11607 } 11608 else if ((ELF_ST_VISIBILITY (h->other) == STV_DEFAULT 11609 || h->root.type != bfd_link_hash_undefweak) 11610 && (info->shared 11611 || WILL_CALL_FINISH_DYNAMIC_SYMBOL (dyn, 0, h))) 11612 htab->srelgot->size += RELOC_SIZE (htab); 11613 } 11614 } 11615 else 11616 h->got.offset = (bfd_vma) -1; 11617 11618 /* Allocate stubs for exported Thumb functions on v4t. */ 11619 if (!htab->use_blx && h->dynindx != -1 11620 && h->def_regular 11621 && ELF_ST_TYPE (h->type) == STT_ARM_TFUNC 11622 && ELF_ST_VISIBILITY (h->other) == STV_DEFAULT) 11623 { 11624 struct elf_link_hash_entry * th; 11625 struct bfd_link_hash_entry * bh; 11626 struct elf_link_hash_entry * myh; 11627 char name[1024]; 11628 asection *s; 11629 bh = NULL; 11630 /* Create a new symbol to regist the real location of the function. */ 11631 s = h->root.u.def.section; 11632 sprintf (name, "__real_%s", h->root.root.string); 11633 _bfd_generic_link_add_one_symbol (info, s->owner, 11634 name, BSF_GLOBAL, s, 11635 h->root.u.def.value, 11636 NULL, TRUE, FALSE, &bh); 11637 11638 myh = (struct elf_link_hash_entry *) bh; 11639 myh->type = ELF_ST_INFO (STB_LOCAL, STT_ARM_TFUNC); 11640 myh->forced_local = 1; 11641 eh->export_glue = myh; 11642 th = record_arm_to_thumb_glue (info, h); 11643 /* Point the symbol at the stub. */ 11644 h->type = ELF_ST_INFO (ELF_ST_BIND (h->type), STT_FUNC); 11645 h->root.u.def.section = th->root.u.def.section; 11646 h->root.u.def.value = th->root.u.def.value & ~1; 11647 } 11648 11649 if (eh->relocs_copied == NULL) 11650 return TRUE; 11651 11652 /* In the shared -Bsymbolic case, discard space allocated for 11653 dynamic pc-relative relocs against symbols which turn out to be 11654 defined in regular objects. For the normal shared case, discard 11655 space for pc-relative relocs that have become local due to symbol 11656 visibility changes. */ 11657 11658 if (info->shared || htab->root.is_relocatable_executable) 11659 { 11660 /* The only relocs that use pc_count are R_ARM_REL32 and 11661 R_ARM_REL32_NOI, which will appear on something like 11662 ".long foo - .". We want calls to protected symbols to resolve 11663 directly to the function rather than going via the plt. If people 11664 want function pointer comparisons to work as expected then they 11665 should avoid writing assembly like ".long foo - .". */ 11666 if (SYMBOL_CALLS_LOCAL (info, h)) 11667 { 11668 struct elf32_arm_relocs_copied **pp; 11669 11670 for (pp = &eh->relocs_copied; (p = *pp) != NULL; ) 11671 { 11672 p->count -= p->pc_count; 11673 p->pc_count = 0; 11674 if (p->count == 0) 11675 *pp = p->next; 11676 else 11677 pp = &p->next; 11678 } 11679 } 11680 11681 if (htab->vxworks_p) 11682 { 11683 struct elf32_arm_relocs_copied **pp; 11684 11685 for (pp = &eh->relocs_copied; (p = *pp) != NULL; ) 11686 { 11687 if (strcmp (p->section->output_section->name, ".tls_vars") == 0) 11688 *pp = p->next; 11689 else 11690 pp = &p->next; 11691 } 11692 } 11693 11694 /* Also discard relocs on undefined weak syms with non-default 11695 visibility. */ 11696 if (eh->relocs_copied != NULL 11697 && h->root.type == bfd_link_hash_undefweak) 11698 { 11699 if (ELF_ST_VISIBILITY (h->other) != STV_DEFAULT) 11700 eh->relocs_copied = NULL; 11701 11702 /* Make sure undefined weak symbols are output as a dynamic 11703 symbol in PIEs. */ 11704 else if (h->dynindx == -1 11705 && !h->forced_local) 11706 { 11707 if (! bfd_elf_link_record_dynamic_symbol (info, h)) 11708 return FALSE; 11709 } 11710 } 11711 11712 else if (htab->root.is_relocatable_executable && h->dynindx == -1 11713 && h->root.type == bfd_link_hash_new) 11714 { 11715 /* Output absolute symbols so that we can create relocations 11716 against them. For normal symbols we output a relocation 11717 against the section that contains them. */ 11718 if (! bfd_elf_link_record_dynamic_symbol (info, h)) 11719 return FALSE; 11720 } 11721 11722 } 11723 else 11724 { 11725 /* For the non-shared case, discard space for relocs against 11726 symbols which turn out to need copy relocs or are not 11727 dynamic. */ 11728 11729 if (!h->non_got_ref 11730 && ((h->def_dynamic 11731 && !h->def_regular) 11732 || (htab->root.dynamic_sections_created 11733 && (h->root.type == bfd_link_hash_undefweak 11734 || h->root.type == bfd_link_hash_undefined)))) 11735 { 11736 /* Make sure this symbol is output as a dynamic symbol. 11737 Undefined weak syms won't yet be marked as dynamic. */ 11738 if (h->dynindx == -1 11739 && !h->forced_local) 11740 { 11741 if (! bfd_elf_link_record_dynamic_symbol (info, h)) 11742 return FALSE; 11743 } 11744 11745 /* If that succeeded, we know we'll be keeping all the 11746 relocs. */ 11747 if (h->dynindx != -1) 11748 goto keep; 11749 } 11750 11751 eh->relocs_copied = NULL; 11752 11753 keep: ; 11754 } 11755 11756 /* Finally, allocate space. */ 11757 for (p = eh->relocs_copied; p != NULL; p = p->next) 11758 { 11759 asection *sreloc = elf_section_data (p->section)->sreloc; 11760 sreloc->size += p->count * RELOC_SIZE (htab); 11761 } 11762 11763 return TRUE; 11764 } 11765 11766 /* Find any dynamic relocs that apply to read-only sections. */ 11767 11768 static bfd_boolean 11769 elf32_arm_readonly_dynrelocs (struct elf_link_hash_entry * h, void * inf) 11770 { 11771 struct elf32_arm_link_hash_entry * eh; 11772 struct elf32_arm_relocs_copied * p; 11773 11774 if (h->root.type == bfd_link_hash_warning) 11775 h = (struct elf_link_hash_entry *) h->root.u.i.link; 11776 11777 eh = (struct elf32_arm_link_hash_entry *) h; 11778 for (p = eh->relocs_copied; p != NULL; p = p->next) 11779 { 11780 asection *s = p->section; 11781 11782 if (s != NULL && (s->flags & SEC_READONLY) != 0) 11783 { 11784 struct bfd_link_info *info = (struct bfd_link_info *) inf; 11785 11786 if (info->warn_shared_textrel) 11787 (*_bfd_error_handler) 11788 (_("warning: dynamic relocation in readonly section `%s'"), 11789 h->root.root.string); 11790 info->flags |= DF_TEXTREL; 11791 11792 /* Not an error, just cut short the traversal. */ 11793 return FALSE; 11794 } 11795 } 11796 return TRUE; 11797 } 11798 11799 void 11800 bfd_elf32_arm_set_byteswap_code (struct bfd_link_info *info, 11801 int byteswap_code) 11802 { 11803 struct elf32_arm_link_hash_table *globals; 11804 11805 globals = elf32_arm_hash_table (info); 11806 if (globals == NULL) 11807 return; 11808 11809 globals->byteswap_code = byteswap_code; 11810 } 11811 11812 /* Set the sizes of the dynamic sections. */ 11813 11814 static bfd_boolean 11815 elf32_arm_size_dynamic_sections (bfd * output_bfd ATTRIBUTE_UNUSED, 11816 struct bfd_link_info * info) 11817 { 11818 bfd * dynobj; 11819 asection * s; 11820 bfd_boolean plt; 11821 bfd_boolean relocs; 11822 bfd *ibfd; 11823 struct elf32_arm_link_hash_table *htab; 11824 11825 htab = elf32_arm_hash_table (info); 11826 if (htab == NULL) 11827 return FALSE; 11828 11829 dynobj = elf_hash_table (info)->dynobj; 11830 BFD_ASSERT (dynobj != NULL); 11831 check_use_blx (htab); 11832 11833 if (elf_hash_table (info)->dynamic_sections_created) 11834 { 11835 /* Set the contents of the .interp section to the interpreter. */ 11836 if (info->executable) 11837 { 11838 s = bfd_get_section_by_name (dynobj, ".interp"); 11839 BFD_ASSERT (s != NULL); 11840 s->size = sizeof ELF_DYNAMIC_INTERPRETER; 11841 s->contents = (unsigned char *) ELF_DYNAMIC_INTERPRETER; 11842 } 11843 } 11844 11845 /* Set up .got offsets for local syms, and space for local dynamic 11846 relocs. */ 11847 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) 11848 { 11849 bfd_signed_vma *local_got; 11850 bfd_signed_vma *end_local_got; 11851 char *local_tls_type; 11852 bfd_size_type locsymcount; 11853 Elf_Internal_Shdr *symtab_hdr; 11854 asection *srel; 11855 bfd_boolean is_vxworks = htab->vxworks_p; 11856 11857 if (! is_arm_elf (ibfd)) 11858 continue; 11859 11860 for (s = ibfd->sections; s != NULL; s = s->next) 11861 { 11862 struct elf32_arm_relocs_copied *p; 11863 11864 for (p = (struct elf32_arm_relocs_copied *) 11865 elf_section_data (s)->local_dynrel; p != NULL; p = p->next) 11866 { 11867 if (!bfd_is_abs_section (p->section) 11868 && bfd_is_abs_section (p->section->output_section)) 11869 { 11870 /* Input section has been discarded, either because 11871 it is a copy of a linkonce section or due to 11872 linker script /DISCARD/, so we'll be discarding 11873 the relocs too. */ 11874 } 11875 else if (is_vxworks 11876 && strcmp (p->section->output_section->name, 11877 ".tls_vars") == 0) 11878 { 11879 /* Relocations in vxworks .tls_vars sections are 11880 handled specially by the loader. */ 11881 } 11882 else if (p->count != 0) 11883 { 11884 srel = elf_section_data (p->section)->sreloc; 11885 srel->size += p->count * RELOC_SIZE (htab); 11886 if ((p->section->output_section->flags & SEC_READONLY) != 0) 11887 info->flags |= DF_TEXTREL; 11888 } 11889 } 11890 } 11891 11892 local_got = elf_local_got_refcounts (ibfd); 11893 if (!local_got) 11894 continue; 11895 11896 symtab_hdr = & elf_symtab_hdr (ibfd); 11897 locsymcount = symtab_hdr->sh_info; 11898 end_local_got = local_got + locsymcount; 11899 local_tls_type = elf32_arm_local_got_tls_type (ibfd); 11900 s = htab->sgot; 11901 srel = htab->srelgot; 11902 for (; local_got < end_local_got; ++local_got, ++local_tls_type) 11903 { 11904 if (*local_got > 0) 11905 { 11906 *local_got = s->size; 11907 if (*local_tls_type & GOT_TLS_GD) 11908 /* TLS_GD relocs need an 8-byte structure in the GOT. */ 11909 s->size += 8; 11910 if (*local_tls_type & GOT_TLS_IE) 11911 s->size += 4; 11912 if (*local_tls_type == GOT_NORMAL) 11913 s->size += 4; 11914 11915 if (info->shared || *local_tls_type == GOT_TLS_GD) 11916 srel->size += RELOC_SIZE (htab); 11917 } 11918 else 11919 *local_got = (bfd_vma) -1; 11920 } 11921 } 11922 11923 if (htab->tls_ldm_got.refcount > 0) 11924 { 11925 /* Allocate two GOT entries and one dynamic relocation (if necessary) 11926 for R_ARM_TLS_LDM32 relocations. */ 11927 htab->tls_ldm_got.offset = htab->sgot->size; 11928 htab->sgot->size += 8; 11929 if (info->shared) 11930 htab->srelgot->size += RELOC_SIZE (htab); 11931 } 11932 else 11933 htab->tls_ldm_got.offset = -1; 11934 11935 /* Allocate global sym .plt and .got entries, and space for global 11936 sym dynamic relocs. */ 11937 elf_link_hash_traverse (& htab->root, allocate_dynrelocs, info); 11938 11939 /* Here we rummage through the found bfds to collect glue information. */ 11940 for (ibfd = info->input_bfds; ibfd != NULL; ibfd = ibfd->link_next) 11941 { 11942 if (! is_arm_elf (ibfd)) 11943 continue; 11944 11945 /* Initialise mapping tables for code/data. */ 11946 bfd_elf32_arm_init_maps (ibfd); 11947 11948 if (!bfd_elf32_arm_process_before_allocation (ibfd, info) 11949 || !bfd_elf32_arm_vfp11_erratum_scan (ibfd, info)) 11950 /* xgettext:c-format */ 11951 _bfd_error_handler (_("Errors encountered processing file %s"), 11952 ibfd->filename); 11953 } 11954 11955 /* Allocate space for the glue sections now that we've sized them. */ 11956 bfd_elf32_arm_allocate_interworking_sections (info); 11957 11958 /* The check_relocs and adjust_dynamic_symbol entry points have 11959 determined the sizes of the various dynamic sections. Allocate 11960 memory for them. */ 11961 plt = FALSE; 11962 relocs = FALSE; 11963 for (s = dynobj->sections; s != NULL; s = s->next) 11964 { 11965 const char * name; 11966 11967 if ((s->flags & SEC_LINKER_CREATED) == 0) 11968 continue; 11969 11970 /* It's OK to base decisions on the section name, because none 11971 of the dynobj section names depend upon the input files. */ 11972 name = bfd_get_section_name (dynobj, s); 11973 11974 if (strcmp (name, ".plt") == 0) 11975 { 11976 /* Remember whether there is a PLT. */ 11977 plt = s->size != 0; 11978 } 11979 else if (CONST_STRNEQ (name, ".rel")) 11980 { 11981 if (s->size != 0) 11982 { 11983 /* Remember whether there are any reloc sections other 11984 than .rel(a).plt and .rela.plt.unloaded. */ 11985 if (s != htab->srelplt && s != htab->srelplt2) 11986 relocs = TRUE; 11987 11988 /* We use the reloc_count field as a counter if we need 11989 to copy relocs into the output file. */ 11990 s->reloc_count = 0; 11991 } 11992 } 11993 else if (! CONST_STRNEQ (name, ".got") 11994 && strcmp (name, ".dynbss") != 0) 11995 { 11996 /* It's not one of our sections, so don't allocate space. */ 11997 continue; 11998 } 11999 12000 if (s->size == 0) 12001 { 12002 /* If we don't need this section, strip it from the 12003 output file. This is mostly to handle .rel(a).bss and 12004 .rel(a).plt. We must create both sections in 12005 create_dynamic_sections, because they must be created 12006 before the linker maps input sections to output 12007 sections. The linker does that before 12008 adjust_dynamic_symbol is called, and it is that 12009 function which decides whether anything needs to go 12010 into these sections. */ 12011 s->flags |= SEC_EXCLUDE; 12012 continue; 12013 } 12014 12015 if ((s->flags & SEC_HAS_CONTENTS) == 0) 12016 continue; 12017 12018 /* Allocate memory for the section contents. */ 12019 s->contents = (unsigned char *) bfd_zalloc (dynobj, s->size); 12020 if (s->contents == NULL) 12021 return FALSE; 12022 } 12023 12024 if (elf_hash_table (info)->dynamic_sections_created) 12025 { 12026 /* Add some entries to the .dynamic section. We fill in the 12027 values later, in elf32_arm_finish_dynamic_sections, but we 12028 must add the entries now so that we get the correct size for 12029 the .dynamic section. The DT_DEBUG entry is filled in by the 12030 dynamic linker and used by the debugger. */ 12031 #define add_dynamic_entry(TAG, VAL) \ 12032 _bfd_elf_add_dynamic_entry (info, TAG, VAL) 12033 12034 if (info->executable) 12035 { 12036 if (!add_dynamic_entry (DT_DEBUG, 0)) 12037 return FALSE; 12038 } 12039 12040 if (plt) 12041 { 12042 if ( !add_dynamic_entry (DT_PLTGOT, 0) 12043 || !add_dynamic_entry (DT_PLTRELSZ, 0) 12044 || !add_dynamic_entry (DT_PLTREL, 12045 htab->use_rel ? DT_REL : DT_RELA) 12046 || !add_dynamic_entry (DT_JMPREL, 0)) 12047 return FALSE; 12048 } 12049 12050 if (relocs) 12051 { 12052 if (htab->use_rel) 12053 { 12054 if (!add_dynamic_entry (DT_REL, 0) 12055 || !add_dynamic_entry (DT_RELSZ, 0) 12056 || !add_dynamic_entry (DT_RELENT, RELOC_SIZE (htab))) 12057 return FALSE; 12058 } 12059 else 12060 { 12061 if (!add_dynamic_entry (DT_RELA, 0) 12062 || !add_dynamic_entry (DT_RELASZ, 0) 12063 || !add_dynamic_entry (DT_RELAENT, RELOC_SIZE (htab))) 12064 return FALSE; 12065 } 12066 } 12067 12068 /* If any dynamic relocs apply to a read-only section, 12069 then we need a DT_TEXTREL entry. */ 12070 if ((info->flags & DF_TEXTREL) == 0) 12071 elf_link_hash_traverse (& htab->root, elf32_arm_readonly_dynrelocs, 12072 info); 12073 12074 if ((info->flags & DF_TEXTREL) != 0) 12075 { 12076 if (!add_dynamic_entry (DT_TEXTREL, 0)) 12077 return FALSE; 12078 } 12079 if (htab->vxworks_p 12080 && !elf_vxworks_add_dynamic_entries (output_bfd, info)) 12081 return FALSE; 12082 } 12083 #undef add_dynamic_entry 12084 12085 return TRUE; 12086 } 12087 12088 /* Finish up dynamic symbol handling. We set the contents of various 12089 dynamic sections here. */ 12090 12091 static bfd_boolean 12092 elf32_arm_finish_dynamic_symbol (bfd * output_bfd, 12093 struct bfd_link_info * info, 12094 struct elf_link_hash_entry * h, 12095 Elf_Internal_Sym * sym) 12096 { 12097 bfd * dynobj; 12098 struct elf32_arm_link_hash_table *htab; 12099 struct elf32_arm_link_hash_entry *eh; 12100 12101 dynobj = elf_hash_table (info)->dynobj; 12102 htab = elf32_arm_hash_table (info); 12103 if (htab == NULL) 12104 return FALSE; 12105 12106 eh = (struct elf32_arm_link_hash_entry *) h; 12107 12108 if (h->plt.offset != (bfd_vma) -1) 12109 { 12110 asection * splt; 12111 asection * srel; 12112 bfd_byte *loc; 12113 bfd_vma plt_index; 12114 Elf_Internal_Rela rel; 12115 12116 /* This symbol has an entry in the procedure linkage table. Set 12117 it up. */ 12118 12119 BFD_ASSERT (h->dynindx != -1); 12120 12121 splt = bfd_get_section_by_name (dynobj, ".plt"); 12122 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".plt")); 12123 BFD_ASSERT (splt != NULL && srel != NULL); 12124 12125 /* Fill in the entry in the procedure linkage table. */ 12126 if (htab->symbian_p) 12127 { 12128 put_arm_insn (htab, output_bfd, 12129 elf32_arm_symbian_plt_entry[0], 12130 splt->contents + h->plt.offset); 12131 bfd_put_32 (output_bfd, 12132 elf32_arm_symbian_plt_entry[1], 12133 splt->contents + h->plt.offset + 4); 12134 12135 /* Fill in the entry in the .rel.plt section. */ 12136 rel.r_offset = (splt->output_section->vma 12137 + splt->output_offset 12138 + h->plt.offset + 4); 12139 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); 12140 12141 /* Get the index in the procedure linkage table which 12142 corresponds to this symbol. This is the index of this symbol 12143 in all the symbols for which we are making plt entries. The 12144 first entry in the procedure linkage table is reserved. */ 12145 plt_index = ((h->plt.offset - htab->plt_header_size) 12146 / htab->plt_entry_size); 12147 } 12148 else 12149 { 12150 bfd_vma got_offset, got_address, plt_address; 12151 bfd_vma got_displacement; 12152 asection * sgot; 12153 bfd_byte * ptr; 12154 12155 sgot = bfd_get_section_by_name (dynobj, ".got.plt"); 12156 BFD_ASSERT (sgot != NULL); 12157 12158 /* Get the offset into the .got.plt table of the entry that 12159 corresponds to this function. */ 12160 got_offset = eh->plt_got_offset; 12161 12162 /* Get the index in the procedure linkage table which 12163 corresponds to this symbol. This is the index of this symbol 12164 in all the symbols for which we are making plt entries. The 12165 first three entries in .got.plt are reserved; after that 12166 symbols appear in the same order as in .plt. */ 12167 plt_index = (got_offset - 12) / 4; 12168 12169 /* Calculate the address of the GOT entry. */ 12170 got_address = (sgot->output_section->vma 12171 + sgot->output_offset 12172 + got_offset); 12173 12174 /* ...and the address of the PLT entry. */ 12175 plt_address = (splt->output_section->vma 12176 + splt->output_offset 12177 + h->plt.offset); 12178 12179 ptr = htab->splt->contents + h->plt.offset; 12180 if (htab->vxworks_p && info->shared) 12181 { 12182 unsigned int i; 12183 bfd_vma val; 12184 12185 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) 12186 { 12187 val = elf32_arm_vxworks_shared_plt_entry[i]; 12188 if (i == 2) 12189 val |= got_address - sgot->output_section->vma; 12190 if (i == 5) 12191 val |= plt_index * RELOC_SIZE (htab); 12192 if (i == 2 || i == 5) 12193 bfd_put_32 (output_bfd, val, ptr); 12194 else 12195 put_arm_insn (htab, output_bfd, val, ptr); 12196 } 12197 } 12198 else if (htab->vxworks_p) 12199 { 12200 unsigned int i; 12201 bfd_vma val; 12202 12203 for (i = 0; i != htab->plt_entry_size / 4; i++, ptr += 4) 12204 { 12205 val = elf32_arm_vxworks_exec_plt_entry[i]; 12206 if (i == 2) 12207 val |= got_address; 12208 if (i == 4) 12209 val |= 0xffffff & -((h->plt.offset + i * 4 + 8) >> 2); 12210 if (i == 5) 12211 val |= plt_index * RELOC_SIZE (htab); 12212 if (i == 2 || i == 5) 12213 bfd_put_32 (output_bfd, val, ptr); 12214 else 12215 put_arm_insn (htab, output_bfd, val, ptr); 12216 } 12217 12218 loc = (htab->srelplt2->contents 12219 + (plt_index * 2 + 1) * RELOC_SIZE (htab)); 12220 12221 /* Create the .rela.plt.unloaded R_ARM_ABS32 relocation 12222 referencing the GOT for this PLT entry. */ 12223 rel.r_offset = plt_address + 8; 12224 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); 12225 rel.r_addend = got_offset; 12226 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); 12227 loc += RELOC_SIZE (htab); 12228 12229 /* Create the R_ARM_ABS32 relocation referencing the 12230 beginning of the PLT for this GOT entry. */ 12231 rel.r_offset = got_address; 12232 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); 12233 rel.r_addend = 0; 12234 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); 12235 } 12236 else 12237 { 12238 bfd_signed_vma thumb_refs; 12239 /* Calculate the displacement between the PLT slot and the 12240 entry in the GOT. The eight-byte offset accounts for the 12241 value produced by adding to pc in the first instruction 12242 of the PLT stub. */ 12243 got_displacement = got_address - (plt_address + 8); 12244 12245 BFD_ASSERT ((got_displacement & 0xf0000000) == 0); 12246 12247 thumb_refs = eh->plt_thumb_refcount; 12248 if (!htab->use_blx) 12249 thumb_refs += eh->plt_maybe_thumb_refcount; 12250 12251 if (thumb_refs > 0) 12252 { 12253 put_thumb_insn (htab, output_bfd, 12254 elf32_arm_plt_thumb_stub[0], ptr - 4); 12255 put_thumb_insn (htab, output_bfd, 12256 elf32_arm_plt_thumb_stub[1], ptr - 2); 12257 } 12258 12259 put_arm_insn (htab, output_bfd, 12260 elf32_arm_plt_entry[0] 12261 | ((got_displacement & 0x0ff00000) >> 20), 12262 ptr + 0); 12263 put_arm_insn (htab, output_bfd, 12264 elf32_arm_plt_entry[1] 12265 | ((got_displacement & 0x000ff000) >> 12), 12266 ptr+ 4); 12267 put_arm_insn (htab, output_bfd, 12268 elf32_arm_plt_entry[2] 12269 | (got_displacement & 0x00000fff), 12270 ptr + 8); 12271 #ifdef FOUR_WORD_PLT 12272 bfd_put_32 (output_bfd, elf32_arm_plt_entry[3], ptr + 12); 12273 #endif 12274 } 12275 12276 /* Fill in the entry in the global offset table. */ 12277 bfd_put_32 (output_bfd, 12278 (splt->output_section->vma 12279 + splt->output_offset), 12280 sgot->contents + got_offset); 12281 12282 /* Fill in the entry in the .rel(a).plt section. */ 12283 rel.r_addend = 0; 12284 rel.r_offset = got_address; 12285 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_JUMP_SLOT); 12286 } 12287 12288 loc = srel->contents + plt_index * RELOC_SIZE (htab); 12289 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); 12290 12291 if (!h->def_regular) 12292 { 12293 /* Mark the symbol as undefined, rather than as defined in 12294 the .plt section. Leave the value alone. */ 12295 sym->st_shndx = SHN_UNDEF; 12296 /* If the symbol is weak, we do need to clear the value. 12297 Otherwise, the PLT entry would provide a definition for 12298 the symbol even if the symbol wasn't defined anywhere, 12299 and so the symbol would never be NULL. */ 12300 if (!h->ref_regular_nonweak) 12301 sym->st_value = 0; 12302 } 12303 } 12304 12305 if (h->got.offset != (bfd_vma) -1 12306 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_GD) == 0 12307 && (elf32_arm_hash_entry (h)->tls_type & GOT_TLS_IE) == 0) 12308 { 12309 asection * sgot; 12310 asection * srel; 12311 Elf_Internal_Rela rel; 12312 bfd_byte *loc; 12313 bfd_vma offset; 12314 12315 /* This symbol has an entry in the global offset table. Set it 12316 up. */ 12317 sgot = bfd_get_section_by_name (dynobj, ".got"); 12318 srel = bfd_get_section_by_name (dynobj, RELOC_SECTION (htab, ".got")); 12319 BFD_ASSERT (sgot != NULL && srel != NULL); 12320 12321 offset = (h->got.offset & ~(bfd_vma) 1); 12322 rel.r_addend = 0; 12323 rel.r_offset = (sgot->output_section->vma 12324 + sgot->output_offset 12325 + offset); 12326 12327 /* If this is a static link, or it is a -Bsymbolic link and the 12328 symbol is defined locally or was forced to be local because 12329 of a version file, we just want to emit a RELATIVE reloc. 12330 The entry in the global offset table will already have been 12331 initialized in the relocate_section function. */ 12332 if (info->shared 12333 && SYMBOL_REFERENCES_LOCAL (info, h)) 12334 { 12335 BFD_ASSERT ((h->got.offset & 1) != 0); 12336 rel.r_info = ELF32_R_INFO (0, R_ARM_RELATIVE); 12337 if (!htab->use_rel) 12338 { 12339 rel.r_addend = bfd_get_32 (output_bfd, sgot->contents + offset); 12340 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset); 12341 } 12342 } 12343 else 12344 { 12345 BFD_ASSERT ((h->got.offset & 1) == 0); 12346 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + offset); 12347 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_GLOB_DAT); 12348 } 12349 12350 loc = srel->contents + srel->reloc_count++ * RELOC_SIZE (htab); 12351 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); 12352 } 12353 12354 if (h->needs_copy) 12355 { 12356 asection * s; 12357 Elf_Internal_Rela rel; 12358 bfd_byte *loc; 12359 12360 /* This symbol needs a copy reloc. Set it up. */ 12361 BFD_ASSERT (h->dynindx != -1 12362 && (h->root.type == bfd_link_hash_defined 12363 || h->root.type == bfd_link_hash_defweak)); 12364 12365 s = bfd_get_section_by_name (h->root.u.def.section->owner, 12366 RELOC_SECTION (htab, ".bss")); 12367 BFD_ASSERT (s != NULL); 12368 12369 rel.r_addend = 0; 12370 rel.r_offset = (h->root.u.def.value 12371 + h->root.u.def.section->output_section->vma 12372 + h->root.u.def.section->output_offset); 12373 rel.r_info = ELF32_R_INFO (h->dynindx, R_ARM_COPY); 12374 loc = s->contents + s->reloc_count++ * RELOC_SIZE (htab); 12375 SWAP_RELOC_OUT (htab) (output_bfd, &rel, loc); 12376 } 12377 12378 /* Mark _DYNAMIC and _GLOBAL_OFFSET_TABLE_ as absolute. On VxWorks, 12379 the _GLOBAL_OFFSET_TABLE_ symbol is not absolute: it is relative 12380 to the ".got" section. */ 12381 if (strcmp (h->root.root.string, "_DYNAMIC") == 0 12382 || (!htab->vxworks_p && h == htab->root.hgot)) 12383 sym->st_shndx = SHN_ABS; 12384 12385 return TRUE; 12386 } 12387 12388 /* Finish up the dynamic sections. */ 12389 12390 static bfd_boolean 12391 elf32_arm_finish_dynamic_sections (bfd * output_bfd, struct bfd_link_info * info) 12392 { 12393 bfd * dynobj; 12394 asection * sgot; 12395 asection * sdyn; 12396 struct elf32_arm_link_hash_table *htab; 12397 12398 htab = elf32_arm_hash_table (info); 12399 if (htab == NULL) 12400 return FALSE; 12401 12402 dynobj = elf_hash_table (info)->dynobj; 12403 12404 sgot = bfd_get_section_by_name (dynobj, ".got.plt"); 12405 BFD_ASSERT (htab->symbian_p || sgot != NULL); 12406 sdyn = bfd_get_section_by_name (dynobj, ".dynamic"); 12407 12408 if (elf_hash_table (info)->dynamic_sections_created) 12409 { 12410 asection *splt; 12411 Elf32_External_Dyn *dyncon, *dynconend; 12412 12413 splt = bfd_get_section_by_name (dynobj, ".plt"); 12414 BFD_ASSERT (splt != NULL && sdyn != NULL); 12415 12416 dyncon = (Elf32_External_Dyn *) sdyn->contents; 12417 dynconend = (Elf32_External_Dyn *) (sdyn->contents + sdyn->size); 12418 12419 for (; dyncon < dynconend; dyncon++) 12420 { 12421 Elf_Internal_Dyn dyn; 12422 const char * name; 12423 asection * s; 12424 12425 bfd_elf32_swap_dyn_in (dynobj, dyncon, &dyn); 12426 12427 switch (dyn.d_tag) 12428 { 12429 unsigned int type; 12430 12431 default: 12432 if (htab->vxworks_p 12433 && elf_vxworks_finish_dynamic_entry (output_bfd, &dyn)) 12434 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12435 break; 12436 12437 case DT_HASH: 12438 name = ".hash"; 12439 goto get_vma_if_bpabi; 12440 case DT_STRTAB: 12441 name = ".dynstr"; 12442 goto get_vma_if_bpabi; 12443 case DT_SYMTAB: 12444 name = ".dynsym"; 12445 goto get_vma_if_bpabi; 12446 case DT_VERSYM: 12447 name = ".gnu.version"; 12448 goto get_vma_if_bpabi; 12449 case DT_VERDEF: 12450 name = ".gnu.version_d"; 12451 goto get_vma_if_bpabi; 12452 case DT_VERNEED: 12453 name = ".gnu.version_r"; 12454 goto get_vma_if_bpabi; 12455 12456 case DT_PLTGOT: 12457 name = ".got"; 12458 goto get_vma; 12459 case DT_JMPREL: 12460 name = RELOC_SECTION (htab, ".plt"); 12461 get_vma: 12462 s = bfd_get_section_by_name (output_bfd, name); 12463 BFD_ASSERT (s != NULL); 12464 if (!htab->symbian_p) 12465 dyn.d_un.d_ptr = s->vma; 12466 else 12467 /* In the BPABI, tags in the PT_DYNAMIC section point 12468 at the file offset, not the memory address, for the 12469 convenience of the post linker. */ 12470 dyn.d_un.d_ptr = s->filepos; 12471 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12472 break; 12473 12474 get_vma_if_bpabi: 12475 if (htab->symbian_p) 12476 goto get_vma; 12477 break; 12478 12479 case DT_PLTRELSZ: 12480 s = bfd_get_section_by_name (output_bfd, 12481 RELOC_SECTION (htab, ".plt")); 12482 BFD_ASSERT (s != NULL); 12483 dyn.d_un.d_val = s->size; 12484 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12485 break; 12486 12487 case DT_RELSZ: 12488 case DT_RELASZ: 12489 if (!htab->symbian_p) 12490 { 12491 /* My reading of the SVR4 ABI indicates that the 12492 procedure linkage table relocs (DT_JMPREL) should be 12493 included in the overall relocs (DT_REL). This is 12494 what Solaris does. However, UnixWare can not handle 12495 that case. Therefore, we override the DT_RELSZ entry 12496 here to make it not include the JMPREL relocs. Since 12497 the linker script arranges for .rel(a).plt to follow all 12498 other relocation sections, we don't have to worry 12499 about changing the DT_REL entry. */ 12500 s = bfd_get_section_by_name (output_bfd, 12501 RELOC_SECTION (htab, ".plt")); 12502 if (s != NULL) 12503 dyn.d_un.d_val -= s->size; 12504 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12505 break; 12506 } 12507 /* Fall through. */ 12508 12509 case DT_REL: 12510 case DT_RELA: 12511 /* In the BPABI, the DT_REL tag must point at the file 12512 offset, not the VMA, of the first relocation 12513 section. So, we use code similar to that in 12514 elflink.c, but do not check for SHF_ALLOC on the 12515 relcoation section, since relocations sections are 12516 never allocated under the BPABI. The comments above 12517 about Unixware notwithstanding, we include all of the 12518 relocations here. */ 12519 if (htab->symbian_p) 12520 { 12521 unsigned int i; 12522 type = ((dyn.d_tag == DT_REL || dyn.d_tag == DT_RELSZ) 12523 ? SHT_REL : SHT_RELA); 12524 dyn.d_un.d_val = 0; 12525 for (i = 1; i < elf_numsections (output_bfd); i++) 12526 { 12527 Elf_Internal_Shdr *hdr 12528 = elf_elfsections (output_bfd)[i]; 12529 if (hdr->sh_type == type) 12530 { 12531 if (dyn.d_tag == DT_RELSZ 12532 || dyn.d_tag == DT_RELASZ) 12533 dyn.d_un.d_val += hdr->sh_size; 12534 else if ((ufile_ptr) hdr->sh_offset 12535 <= dyn.d_un.d_val - 1) 12536 dyn.d_un.d_val = hdr->sh_offset; 12537 } 12538 } 12539 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12540 } 12541 break; 12542 12543 /* Set the bottom bit of DT_INIT/FINI if the 12544 corresponding function is Thumb. */ 12545 case DT_INIT: 12546 name = info->init_function; 12547 goto get_sym; 12548 case DT_FINI: 12549 name = info->fini_function; 12550 get_sym: 12551 /* If it wasn't set by elf_bfd_final_link 12552 then there is nothing to adjust. */ 12553 if (dyn.d_un.d_val != 0) 12554 { 12555 struct elf_link_hash_entry * eh; 12556 12557 eh = elf_link_hash_lookup (elf_hash_table (info), name, 12558 FALSE, FALSE, TRUE); 12559 if (eh != NULL 12560 && ELF_ST_TYPE (eh->type) == STT_ARM_TFUNC) 12561 { 12562 dyn.d_un.d_val |= 1; 12563 bfd_elf32_swap_dyn_out (output_bfd, &dyn, dyncon); 12564 } 12565 } 12566 break; 12567 } 12568 } 12569 12570 /* Fill in the first entry in the procedure linkage table. */ 12571 if (splt->size > 0 && htab->plt_header_size) 12572 { 12573 const bfd_vma *plt0_entry; 12574 bfd_vma got_address, plt_address, got_displacement; 12575 12576 /* Calculate the addresses of the GOT and PLT. */ 12577 got_address = sgot->output_section->vma + sgot->output_offset; 12578 plt_address = splt->output_section->vma + splt->output_offset; 12579 12580 if (htab->vxworks_p) 12581 { 12582 /* The VxWorks GOT is relocated by the dynamic linker. 12583 Therefore, we must emit relocations rather than simply 12584 computing the values now. */ 12585 Elf_Internal_Rela rel; 12586 12587 plt0_entry = elf32_arm_vxworks_exec_plt0_entry; 12588 put_arm_insn (htab, output_bfd, plt0_entry[0], 12589 splt->contents + 0); 12590 put_arm_insn (htab, output_bfd, plt0_entry[1], 12591 splt->contents + 4); 12592 put_arm_insn (htab, output_bfd, plt0_entry[2], 12593 splt->contents + 8); 12594 bfd_put_32 (output_bfd, got_address, splt->contents + 12); 12595 12596 /* Generate a relocation for _GLOBAL_OFFSET_TABLE_. */ 12597 rel.r_offset = plt_address + 12; 12598 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); 12599 rel.r_addend = 0; 12600 SWAP_RELOC_OUT (htab) (output_bfd, &rel, 12601 htab->srelplt2->contents); 12602 } 12603 else 12604 { 12605 got_displacement = got_address - (plt_address + 16); 12606 12607 plt0_entry = elf32_arm_plt0_entry; 12608 put_arm_insn (htab, output_bfd, plt0_entry[0], 12609 splt->contents + 0); 12610 put_arm_insn (htab, output_bfd, plt0_entry[1], 12611 splt->contents + 4); 12612 put_arm_insn (htab, output_bfd, plt0_entry[2], 12613 splt->contents + 8); 12614 put_arm_insn (htab, output_bfd, plt0_entry[3], 12615 splt->contents + 12); 12616 12617 #ifdef FOUR_WORD_PLT 12618 /* The displacement value goes in the otherwise-unused 12619 last word of the second entry. */ 12620 bfd_put_32 (output_bfd, got_displacement, splt->contents + 28); 12621 #else 12622 bfd_put_32 (output_bfd, got_displacement, splt->contents + 16); 12623 #endif 12624 } 12625 } 12626 12627 /* UnixWare sets the entsize of .plt to 4, although that doesn't 12628 really seem like the right value. */ 12629 if (splt->output_section->owner == output_bfd) 12630 elf_section_data (splt->output_section)->this_hdr.sh_entsize = 4; 12631 12632 if (htab->vxworks_p && !info->shared && htab->splt->size > 0) 12633 { 12634 /* Correct the .rel(a).plt.unloaded relocations. They will have 12635 incorrect symbol indexes. */ 12636 int num_plts; 12637 unsigned char *p; 12638 12639 num_plts = ((htab->splt->size - htab->plt_header_size) 12640 / htab->plt_entry_size); 12641 p = htab->srelplt2->contents + RELOC_SIZE (htab); 12642 12643 for (; num_plts; num_plts--) 12644 { 12645 Elf_Internal_Rela rel; 12646 12647 SWAP_RELOC_IN (htab) (output_bfd, p, &rel); 12648 rel.r_info = ELF32_R_INFO (htab->root.hgot->indx, R_ARM_ABS32); 12649 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); 12650 p += RELOC_SIZE (htab); 12651 12652 SWAP_RELOC_IN (htab) (output_bfd, p, &rel); 12653 rel.r_info = ELF32_R_INFO (htab->root.hplt->indx, R_ARM_ABS32); 12654 SWAP_RELOC_OUT (htab) (output_bfd, &rel, p); 12655 p += RELOC_SIZE (htab); 12656 } 12657 } 12658 } 12659 12660 /* Fill in the first three entries in the global offset table. */ 12661 if (sgot) 12662 { 12663 if (sgot->size > 0) 12664 { 12665 if (sdyn == NULL) 12666 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents); 12667 else 12668 bfd_put_32 (output_bfd, 12669 sdyn->output_section->vma + sdyn->output_offset, 12670 sgot->contents); 12671 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 4); 12672 bfd_put_32 (output_bfd, (bfd_vma) 0, sgot->contents + 8); 12673 } 12674 12675 elf_section_data (sgot->output_section)->this_hdr.sh_entsize = 4; 12676 } 12677 12678 return TRUE; 12679 } 12680 12681 static void 12682 elf32_arm_post_process_headers (bfd * abfd, struct bfd_link_info * link_info ATTRIBUTE_UNUSED) 12683 { 12684 Elf_Internal_Ehdr * i_ehdrp; /* ELF file header, internal form. */ 12685 struct elf32_arm_link_hash_table *globals; 12686 12687 i_ehdrp = elf_elfheader (abfd); 12688 12689 if (EF_ARM_EABI_VERSION (i_ehdrp->e_flags) == EF_ARM_EABI_UNKNOWN) 12690 i_ehdrp->e_ident[EI_OSABI] = ELFOSABI_ARM; 12691 else 12692 i_ehdrp->e_ident[EI_OSABI] = 0; 12693 i_ehdrp->e_ident[EI_ABIVERSION] = ARM_ELF_ABI_VERSION; 12694 12695 if (link_info) 12696 { 12697 globals = elf32_arm_hash_table (link_info); 12698 if (globals != NULL && globals->byteswap_code) 12699 i_ehdrp->e_flags |= EF_ARM_BE8; 12700 } 12701 } 12702 12703 static enum elf_reloc_type_class 12704 elf32_arm_reloc_type_class (const Elf_Internal_Rela *rela) 12705 { 12706 switch ((int) ELF32_R_TYPE (rela->r_info)) 12707 { 12708 case R_ARM_RELATIVE: 12709 return reloc_class_relative; 12710 case R_ARM_JUMP_SLOT: 12711 return reloc_class_plt; 12712 case R_ARM_COPY: 12713 return reloc_class_copy; 12714 default: 12715 return reloc_class_normal; 12716 } 12717 } 12718 12719 /* Set the right machine number for an Arm ELF file. */ 12720 12721 static bfd_boolean 12722 elf32_arm_section_flags (flagword *flags, const Elf_Internal_Shdr *hdr) 12723 { 12724 if (hdr->sh_type == SHT_NOTE) 12725 *flags |= SEC_LINK_ONCE | SEC_LINK_DUPLICATES_SAME_CONTENTS; 12726 12727 return TRUE; 12728 } 12729 12730 static void 12731 elf32_arm_final_write_processing (bfd *abfd, bfd_boolean linker ATTRIBUTE_UNUSED) 12732 { 12733 bfd_arm_update_notes (abfd, ARM_NOTE_SECTION); 12734 } 12735 12736 /* Return TRUE if this is an unwinding table entry. */ 12737 12738 static bfd_boolean 12739 is_arm_elf_unwind_section_name (bfd * abfd ATTRIBUTE_UNUSED, const char * name) 12740 { 12741 return (CONST_STRNEQ (name, ELF_STRING_ARM_unwind) 12742 || CONST_STRNEQ (name, ELF_STRING_ARM_unwind_once)); 12743 } 12744 12745 12746 /* Set the type and flags for an ARM section. We do this by 12747 the section name, which is a hack, but ought to work. */ 12748 12749 static bfd_boolean 12750 elf32_arm_fake_sections (bfd * abfd, Elf_Internal_Shdr * hdr, asection * sec) 12751 { 12752 const char * name; 12753 12754 name = bfd_get_section_name (abfd, sec); 12755 12756 if (is_arm_elf_unwind_section_name (abfd, name)) 12757 { 12758 hdr->sh_type = SHT_ARM_EXIDX; 12759 hdr->sh_flags |= SHF_LINK_ORDER; 12760 } 12761 return TRUE; 12762 } 12763 12764 /* Handle an ARM specific section when reading an object file. This is 12765 called when bfd_section_from_shdr finds a section with an unknown 12766 type. */ 12767 12768 static bfd_boolean 12769 elf32_arm_section_from_shdr (bfd *abfd, 12770 Elf_Internal_Shdr * hdr, 12771 const char *name, 12772 int shindex) 12773 { 12774 /* There ought to be a place to keep ELF backend specific flags, but 12775 at the moment there isn't one. We just keep track of the 12776 sections by their name, instead. Fortunately, the ABI gives 12777 names for all the ARM specific sections, so we will probably get 12778 away with this. */ 12779 switch (hdr->sh_type) 12780 { 12781 case SHT_ARM_EXIDX: 12782 case SHT_ARM_PREEMPTMAP: 12783 case SHT_ARM_ATTRIBUTES: 12784 break; 12785 12786 default: 12787 return FALSE; 12788 } 12789 12790 if (! _bfd_elf_make_section_from_shdr (abfd, hdr, name, shindex)) 12791 return FALSE; 12792 12793 return TRUE; 12794 } 12795 12796 static _arm_elf_section_data * 12797 get_arm_elf_section_data (asection * sec) 12798 { 12799 if (sec && sec->owner && is_arm_elf (sec->owner)) 12800 return elf32_arm_section_data (sec); 12801 else 12802 return NULL; 12803 } 12804 12805 typedef struct 12806 { 12807 void *finfo; 12808 struct bfd_link_info *info; 12809 asection *sec; 12810 int sec_shndx; 12811 int (*func) (void *, const char *, Elf_Internal_Sym *, 12812 asection *, struct elf_link_hash_entry *); 12813 } output_arch_syminfo; 12814 12815 enum map_symbol_type 12816 { 12817 ARM_MAP_ARM, 12818 ARM_MAP_THUMB, 12819 ARM_MAP_DATA 12820 }; 12821 12822 12823 /* Output a single mapping symbol. */ 12824 12825 static bfd_boolean 12826 elf32_arm_output_map_sym (output_arch_syminfo *osi, 12827 enum map_symbol_type type, 12828 bfd_vma offset) 12829 { 12830 static const char *names[3] = {"$a", "$t", "$d"}; 12831 Elf_Internal_Sym sym; 12832 12833 sym.st_value = osi->sec->output_section->vma 12834 + osi->sec->output_offset 12835 + offset; 12836 sym.st_size = 0; 12837 sym.st_other = 0; 12838 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_NOTYPE); 12839 sym.st_shndx = osi->sec_shndx; 12840 elf32_arm_section_map_add (osi->sec, names[type][1], offset); 12841 return osi->func (osi->finfo, names[type], &sym, osi->sec, NULL) == 1; 12842 } 12843 12844 12845 /* Output mapping symbols for PLT entries associated with H. */ 12846 12847 static bfd_boolean 12848 elf32_arm_output_plt_map (struct elf_link_hash_entry *h, void *inf) 12849 { 12850 output_arch_syminfo *osi = (output_arch_syminfo *) inf; 12851 struct elf32_arm_link_hash_table *htab; 12852 struct elf32_arm_link_hash_entry *eh; 12853 bfd_vma addr; 12854 12855 if (h->root.type == bfd_link_hash_indirect) 12856 return TRUE; 12857 12858 if (h->root.type == bfd_link_hash_warning) 12859 /* When warning symbols are created, they **replace** the "real" 12860 entry in the hash table, thus we never get to see the real 12861 symbol in a hash traversal. So look at it now. */ 12862 h = (struct elf_link_hash_entry *) h->root.u.i.link; 12863 12864 if (h->plt.offset == (bfd_vma) -1) 12865 return TRUE; 12866 12867 htab = elf32_arm_hash_table (osi->info); 12868 if (htab == NULL) 12869 return FALSE; 12870 12871 eh = (struct elf32_arm_link_hash_entry *) h; 12872 addr = h->plt.offset; 12873 if (htab->symbian_p) 12874 { 12875 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) 12876 return FALSE; 12877 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 4)) 12878 return FALSE; 12879 } 12880 else if (htab->vxworks_p) 12881 { 12882 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) 12883 return FALSE; 12884 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 8)) 12885 return FALSE; 12886 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr + 12)) 12887 return FALSE; 12888 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 20)) 12889 return FALSE; 12890 } 12891 else 12892 { 12893 bfd_signed_vma thumb_refs; 12894 12895 thumb_refs = eh->plt_thumb_refcount; 12896 if (!htab->use_blx) 12897 thumb_refs += eh->plt_maybe_thumb_refcount; 12898 12899 if (thumb_refs > 0) 12900 { 12901 if (!elf32_arm_output_map_sym (osi, ARM_MAP_THUMB, addr - 4)) 12902 return FALSE; 12903 } 12904 #ifdef FOUR_WORD_PLT 12905 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) 12906 return FALSE; 12907 if (!elf32_arm_output_map_sym (osi, ARM_MAP_DATA, addr + 12)) 12908 return FALSE; 12909 #else 12910 /* A three-word PLT with no Thumb thunk contains only Arm code, 12911 so only need to output a mapping symbol for the first PLT entry and 12912 entries with thumb thunks. */ 12913 if (thumb_refs > 0 || addr == 20) 12914 { 12915 if (!elf32_arm_output_map_sym (osi, ARM_MAP_ARM, addr)) 12916 return FALSE; 12917 } 12918 #endif 12919 } 12920 12921 return TRUE; 12922 } 12923 12924 /* Output a single local symbol for a generated stub. */ 12925 12926 static bfd_boolean 12927 elf32_arm_output_stub_sym (output_arch_syminfo *osi, const char *name, 12928 bfd_vma offset, bfd_vma size) 12929 { 12930 Elf_Internal_Sym sym; 12931 12932 sym.st_value = osi->sec->output_section->vma 12933 + osi->sec->output_offset 12934 + offset; 12935 sym.st_size = size; 12936 sym.st_other = 0; 12937 sym.st_info = ELF_ST_INFO (STB_LOCAL, STT_FUNC); 12938 sym.st_shndx = osi->sec_shndx; 12939 return osi->func (osi->finfo, name, &sym, osi->sec, NULL) == 1; 12940 } 12941 12942 static bfd_boolean 12943 arm_map_one_stub (struct bfd_hash_entry * gen_entry, 12944 void * in_arg) 12945 { 12946 struct elf32_arm_stub_hash_entry *stub_entry; 12947 asection *stub_sec; 12948 bfd_vma addr; 12949 char *stub_name; 12950 output_arch_syminfo *osi; 12951 const insn_sequence *template_sequence; 12952 enum stub_insn_type prev_type; 12953 int size; 12954 int i; 12955 enum map_symbol_type sym_type; 12956 12957 /* Massage our args to the form they really have. */ 12958 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; 12959 osi = (output_arch_syminfo *) in_arg; 12960 12961 stub_sec = stub_entry->stub_sec; 12962 12963 /* Ensure this stub is attached to the current section being 12964 processed. */ 12965 if (stub_sec != osi->sec) 12966 return TRUE; 12967 12968 addr = (bfd_vma) stub_entry->stub_offset; 12969 stub_name = stub_entry->output_name; 12970 12971 template_sequence = stub_entry->stub_template; 12972 switch (template_sequence[0].type) 12973 { 12974 case ARM_TYPE: 12975 if (!elf32_arm_output_stub_sym (osi, stub_name, addr, stub_entry->stub_size)) 12976 return FALSE; 12977 break; 12978 case THUMB16_TYPE: 12979 case THUMB32_TYPE: 12980 if (!elf32_arm_output_stub_sym (osi, stub_name, addr | 1, 12981 stub_entry->stub_size)) 12982 return FALSE; 12983 break; 12984 default: 12985 BFD_FAIL (); 12986 return 0; 12987 } 12988 12989 prev_type = DATA_TYPE; 12990 size = 0; 12991 for (i = 0; i < stub_entry->stub_template_size; i++) 12992 { 12993 switch (template_sequence[i].type) 12994 { 12995 case ARM_TYPE: 12996 sym_type = ARM_MAP_ARM; 12997 break; 12998 12999 case THUMB16_TYPE: 13000 case THUMB32_TYPE: 13001 sym_type = ARM_MAP_THUMB; 13002 break; 13003 13004 case DATA_TYPE: 13005 sym_type = ARM_MAP_DATA; 13006 break; 13007 13008 default: 13009 BFD_FAIL (); 13010 return FALSE; 13011 } 13012 13013 if (template_sequence[i].type != prev_type) 13014 { 13015 prev_type = template_sequence[i].type; 13016 if (!elf32_arm_output_map_sym (osi, sym_type, addr + size)) 13017 return FALSE; 13018 } 13019 13020 switch (template_sequence[i].type) 13021 { 13022 case ARM_TYPE: 13023 case THUMB32_TYPE: 13024 size += 4; 13025 break; 13026 13027 case THUMB16_TYPE: 13028 size += 2; 13029 break; 13030 13031 case DATA_TYPE: 13032 size += 4; 13033 break; 13034 13035 default: 13036 BFD_FAIL (); 13037 return FALSE; 13038 } 13039 } 13040 13041 return TRUE; 13042 } 13043 13044 /* Output mapping symbols for linker generated sections, 13045 and for those data-only sections that do not have a 13046 $d. */ 13047 13048 static bfd_boolean 13049 elf32_arm_output_arch_local_syms (bfd *output_bfd, 13050 struct bfd_link_info *info, 13051 void *finfo, 13052 int (*func) (void *, const char *, 13053 Elf_Internal_Sym *, 13054 asection *, 13055 struct elf_link_hash_entry *)) 13056 { 13057 output_arch_syminfo osi; 13058 struct elf32_arm_link_hash_table *htab; 13059 bfd_vma offset; 13060 bfd_size_type size; 13061 bfd *input_bfd; 13062 13063 htab = elf32_arm_hash_table (info); 13064 if (htab == NULL) 13065 return FALSE; 13066 13067 check_use_blx (htab); 13068 13069 osi.finfo = finfo; 13070 osi.info = info; 13071 osi.func = func; 13072 13073 /* Add a $d mapping symbol to data-only sections that 13074 don't have any mapping symbol. This may result in (harmless) redundant 13075 mapping symbols. */ 13076 for (input_bfd = info->input_bfds; 13077 input_bfd != NULL; 13078 input_bfd = input_bfd->link_next) 13079 { 13080 if ((input_bfd->flags & (BFD_LINKER_CREATED | HAS_SYMS)) == HAS_SYMS) 13081 for (osi.sec = input_bfd->sections; 13082 osi.sec != NULL; 13083 osi.sec = osi.sec->next) 13084 { 13085 if (osi.sec->output_section != NULL 13086 && ((osi.sec->output_section->flags & (SEC_ALLOC | SEC_CODE)) 13087 != 0) 13088 && (osi.sec->flags & (SEC_HAS_CONTENTS | SEC_LINKER_CREATED)) 13089 == SEC_HAS_CONTENTS 13090 && get_arm_elf_section_data (osi.sec) != NULL 13091 && get_arm_elf_section_data (osi.sec)->mapcount == 0 13092 && osi.sec->size > 0) 13093 { 13094 osi.sec_shndx = _bfd_elf_section_from_bfd_section 13095 (output_bfd, osi.sec->output_section); 13096 if (osi.sec_shndx != (int)SHN_BAD) 13097 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 0); 13098 } 13099 } 13100 } 13101 13102 /* ARM->Thumb glue. */ 13103 if (htab->arm_glue_size > 0) 13104 { 13105 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, 13106 ARM2THUMB_GLUE_SECTION_NAME); 13107 13108 osi.sec_shndx = _bfd_elf_section_from_bfd_section 13109 (output_bfd, osi.sec->output_section); 13110 if (info->shared || htab->root.is_relocatable_executable 13111 || htab->pic_veneer) 13112 size = ARM2THUMB_PIC_GLUE_SIZE; 13113 else if (htab->use_blx) 13114 size = ARM2THUMB_V5_STATIC_GLUE_SIZE; 13115 else 13116 size = ARM2THUMB_STATIC_GLUE_SIZE; 13117 13118 for (offset = 0; offset < htab->arm_glue_size; offset += size) 13119 { 13120 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset); 13121 elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, offset + size - 4); 13122 } 13123 } 13124 13125 /* Thumb->ARM glue. */ 13126 if (htab->thumb_glue_size > 0) 13127 { 13128 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, 13129 THUMB2ARM_GLUE_SECTION_NAME); 13130 13131 osi.sec_shndx = _bfd_elf_section_from_bfd_section 13132 (output_bfd, osi.sec->output_section); 13133 size = THUMB2ARM_GLUE_SIZE; 13134 13135 for (offset = 0; offset < htab->thumb_glue_size; offset += size) 13136 { 13137 elf32_arm_output_map_sym (&osi, ARM_MAP_THUMB, offset); 13138 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, offset + 4); 13139 } 13140 } 13141 13142 /* ARMv4 BX veneers. */ 13143 if (htab->bx_glue_size > 0) 13144 { 13145 osi.sec = bfd_get_section_by_name (htab->bfd_of_glue_owner, 13146 ARM_BX_GLUE_SECTION_NAME); 13147 13148 osi.sec_shndx = _bfd_elf_section_from_bfd_section 13149 (output_bfd, osi.sec->output_section); 13150 13151 elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0); 13152 } 13153 13154 /* Long calls stubs. */ 13155 if (htab->stub_bfd && htab->stub_bfd->sections) 13156 { 13157 asection* stub_sec; 13158 13159 for (stub_sec = htab->stub_bfd->sections; 13160 stub_sec != NULL; 13161 stub_sec = stub_sec->next) 13162 { 13163 /* Ignore non-stub sections. */ 13164 if (!strstr (stub_sec->name, STUB_SUFFIX)) 13165 continue; 13166 13167 osi.sec = stub_sec; 13168 13169 osi.sec_shndx = _bfd_elf_section_from_bfd_section 13170 (output_bfd, osi.sec->output_section); 13171 13172 bfd_hash_traverse (&htab->stub_hash_table, arm_map_one_stub, &osi); 13173 } 13174 } 13175 13176 /* Finally, output mapping symbols for the PLT. */ 13177 if (!htab->splt || htab->splt->size == 0) 13178 return TRUE; 13179 13180 osi.sec_shndx = _bfd_elf_section_from_bfd_section (output_bfd, 13181 htab->splt->output_section); 13182 osi.sec = htab->splt; 13183 /* Output mapping symbols for the plt header. SymbianOS does not have a 13184 plt header. */ 13185 if (htab->vxworks_p) 13186 { 13187 /* VxWorks shared libraries have no PLT header. */ 13188 if (!info->shared) 13189 { 13190 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) 13191 return FALSE; 13192 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 12)) 13193 return FALSE; 13194 } 13195 } 13196 else if (!htab->symbian_p) 13197 { 13198 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_ARM, 0)) 13199 return FALSE; 13200 #ifndef FOUR_WORD_PLT 13201 if (!elf32_arm_output_map_sym (&osi, ARM_MAP_DATA, 16)) 13202 return FALSE; 13203 #endif 13204 } 13205 13206 elf_link_hash_traverse (&htab->root, elf32_arm_output_plt_map, (void *) &osi); 13207 return TRUE; 13208 } 13209 13210 /* Allocate target specific section data. */ 13211 13212 static bfd_boolean 13213 elf32_arm_new_section_hook (bfd *abfd, asection *sec) 13214 { 13215 if (!sec->used_by_bfd) 13216 { 13217 _arm_elf_section_data *sdata; 13218 bfd_size_type amt = sizeof (*sdata); 13219 13220 sdata = (_arm_elf_section_data *) bfd_zalloc (abfd, amt); 13221 if (sdata == NULL) 13222 return FALSE; 13223 sec->used_by_bfd = sdata; 13224 } 13225 13226 return _bfd_elf_new_section_hook (abfd, sec); 13227 } 13228 13229 13230 /* Used to order a list of mapping symbols by address. */ 13231 13232 static int 13233 elf32_arm_compare_mapping (const void * a, const void * b) 13234 { 13235 const elf32_arm_section_map *amap = (const elf32_arm_section_map *) a; 13236 const elf32_arm_section_map *bmap = (const elf32_arm_section_map *) b; 13237 13238 if (amap->vma > bmap->vma) 13239 return 1; 13240 else if (amap->vma < bmap->vma) 13241 return -1; 13242 else if (amap->type > bmap->type) 13243 /* Ensure results do not depend on the host qsort for objects with 13244 multiple mapping symbols at the same address by sorting on type 13245 after vma. */ 13246 return 1; 13247 else if (amap->type < bmap->type) 13248 return -1; 13249 else 13250 return 0; 13251 } 13252 13253 /* Add OFFSET to lower 31 bits of ADDR, leaving other bits unmodified. */ 13254 13255 static unsigned long 13256 offset_prel31 (unsigned long addr, bfd_vma offset) 13257 { 13258 return (addr & ~0x7ffffffful) | ((addr + offset) & 0x7ffffffful); 13259 } 13260 13261 /* Copy an .ARM.exidx table entry, adding OFFSET to (applied) PREL31 13262 relocations. */ 13263 13264 static void 13265 copy_exidx_entry (bfd *output_bfd, bfd_byte *to, bfd_byte *from, bfd_vma offset) 13266 { 13267 unsigned long first_word = bfd_get_32 (output_bfd, from); 13268 unsigned long second_word = bfd_get_32 (output_bfd, from + 4); 13269 13270 /* High bit of first word is supposed to be zero. */ 13271 if ((first_word & 0x80000000ul) == 0) 13272 first_word = offset_prel31 (first_word, offset); 13273 13274 /* If the high bit of the first word is clear, and the bit pattern is not 0x1 13275 (EXIDX_CANTUNWIND), this is an offset to an .ARM.extab entry. */ 13276 if ((second_word != 0x1) && ((second_word & 0x80000000ul) == 0)) 13277 second_word = offset_prel31 (second_word, offset); 13278 13279 bfd_put_32 (output_bfd, first_word, to); 13280 bfd_put_32 (output_bfd, second_word, to + 4); 13281 } 13282 13283 /* Data for make_branch_to_a8_stub(). */ 13284 13285 struct a8_branch_to_stub_data { 13286 asection *writing_section; 13287 bfd_byte *contents; 13288 }; 13289 13290 13291 /* Helper to insert branches to Cortex-A8 erratum stubs in the right 13292 places for a particular section. */ 13293 13294 static bfd_boolean 13295 make_branch_to_a8_stub (struct bfd_hash_entry *gen_entry, 13296 void *in_arg) 13297 { 13298 struct elf32_arm_stub_hash_entry *stub_entry; 13299 struct a8_branch_to_stub_data *data; 13300 bfd_byte *contents; 13301 unsigned long branch_insn; 13302 bfd_vma veneered_insn_loc, veneer_entry_loc; 13303 bfd_signed_vma branch_offset; 13304 bfd *abfd; 13305 unsigned int target; 13306 13307 stub_entry = (struct elf32_arm_stub_hash_entry *) gen_entry; 13308 data = (struct a8_branch_to_stub_data *) in_arg; 13309 13310 if (stub_entry->target_section != data->writing_section 13311 || stub_entry->stub_type < arm_stub_a8_veneer_lwm) 13312 return TRUE; 13313 13314 contents = data->contents; 13315 13316 veneered_insn_loc = stub_entry->target_section->output_section->vma 13317 + stub_entry->target_section->output_offset 13318 + stub_entry->target_value; 13319 13320 veneer_entry_loc = stub_entry->stub_sec->output_section->vma 13321 + stub_entry->stub_sec->output_offset 13322 + stub_entry->stub_offset; 13323 13324 if (stub_entry->stub_type == arm_stub_a8_veneer_blx) 13325 veneered_insn_loc &= ~3u; 13326 13327 branch_offset = veneer_entry_loc - veneered_insn_loc - 4; 13328 13329 abfd = stub_entry->target_section->owner; 13330 target = stub_entry->target_value; 13331 13332 /* We attempt to avoid this condition by setting stubs_always_after_branch 13333 in elf32_arm_size_stubs if we've enabled the Cortex-A8 erratum workaround. 13334 This check is just to be on the safe side... */ 13335 if ((veneered_insn_loc & ~0xfff) == (veneer_entry_loc & ~0xfff)) 13336 { 13337 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub is " 13338 "allocated in unsafe location"), abfd); 13339 return FALSE; 13340 } 13341 13342 switch (stub_entry->stub_type) 13343 { 13344 case arm_stub_a8_veneer_b: 13345 case arm_stub_a8_veneer_b_cond: 13346 branch_insn = 0xf0009000; 13347 goto jump24; 13348 13349 case arm_stub_a8_veneer_blx: 13350 branch_insn = 0xf000e800; 13351 goto jump24; 13352 13353 case arm_stub_a8_veneer_bl: 13354 { 13355 unsigned int i1, j1, i2, j2, s; 13356 13357 branch_insn = 0xf000d000; 13358 13359 jump24: 13360 if (branch_offset < -16777216 || branch_offset > 16777214) 13361 { 13362 /* There's not much we can do apart from complain if this 13363 happens. */ 13364 (*_bfd_error_handler) (_("%B: error: Cortex-A8 erratum stub out " 13365 "of range (input file too large)"), abfd); 13366 return FALSE; 13367 } 13368 13369 /* i1 = not(j1 eor s), so: 13370 not i1 = j1 eor s 13371 j1 = (not i1) eor s. */ 13372 13373 branch_insn |= (branch_offset >> 1) & 0x7ff; 13374 branch_insn |= ((branch_offset >> 12) & 0x3ff) << 16; 13375 i2 = (branch_offset >> 22) & 1; 13376 i1 = (branch_offset >> 23) & 1; 13377 s = (branch_offset >> 24) & 1; 13378 j1 = (!i1) ^ s; 13379 j2 = (!i2) ^ s; 13380 branch_insn |= j2 << 11; 13381 branch_insn |= j1 << 13; 13382 branch_insn |= s << 26; 13383 } 13384 break; 13385 13386 default: 13387 BFD_FAIL (); 13388 return FALSE; 13389 } 13390 13391 bfd_put_16 (abfd, (branch_insn >> 16) & 0xffff, &contents[target]); 13392 bfd_put_16 (abfd, branch_insn & 0xffff, &contents[target + 2]); 13393 13394 return TRUE; 13395 } 13396 13397 /* Do code byteswapping. Return FALSE afterwards so that the section is 13398 written out as normal. */ 13399 13400 static bfd_boolean 13401 elf32_arm_write_section (bfd *output_bfd, 13402 struct bfd_link_info *link_info, 13403 asection *sec, 13404 bfd_byte *contents) 13405 { 13406 unsigned int mapcount, errcount; 13407 _arm_elf_section_data *arm_data; 13408 struct elf32_arm_link_hash_table *globals = elf32_arm_hash_table (link_info); 13409 elf32_arm_section_map *map; 13410 elf32_vfp11_erratum_list *errnode; 13411 bfd_vma ptr; 13412 bfd_vma end; 13413 bfd_vma offset = sec->output_section->vma + sec->output_offset; 13414 bfd_byte tmp; 13415 unsigned int i; 13416 13417 if (globals == NULL) 13418 return FALSE; 13419 13420 /* If this section has not been allocated an _arm_elf_section_data 13421 structure then we cannot record anything. */ 13422 arm_data = get_arm_elf_section_data (sec); 13423 if (arm_data == NULL) 13424 return FALSE; 13425 13426 mapcount = arm_data->mapcount; 13427 map = arm_data->map; 13428 errcount = arm_data->erratumcount; 13429 13430 if (errcount != 0) 13431 { 13432 unsigned int endianflip = bfd_big_endian (output_bfd) ? 3 : 0; 13433 13434 for (errnode = arm_data->erratumlist; errnode != 0; 13435 errnode = errnode->next) 13436 { 13437 bfd_vma target = errnode->vma - offset; 13438 13439 switch (errnode->type) 13440 { 13441 case VFP11_ERRATUM_BRANCH_TO_ARM_VENEER: 13442 { 13443 bfd_vma branch_to_veneer; 13444 /* Original condition code of instruction, plus bit mask for 13445 ARM B instruction. */ 13446 unsigned int insn = (errnode->u.b.vfp_insn & 0xf0000000) 13447 | 0x0a000000; 13448 13449 /* The instruction is before the label. */ 13450 target -= 4; 13451 13452 /* Above offset included in -4 below. */ 13453 branch_to_veneer = errnode->u.b.veneer->vma 13454 - errnode->vma - 4; 13455 13456 if ((signed) branch_to_veneer < -(1 << 25) 13457 || (signed) branch_to_veneer >= (1 << 25)) 13458 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " 13459 "range"), output_bfd); 13460 13461 insn |= (branch_to_veneer >> 2) & 0xffffff; 13462 contents[endianflip ^ target] = insn & 0xff; 13463 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; 13464 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; 13465 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; 13466 } 13467 break; 13468 13469 case VFP11_ERRATUM_ARM_VENEER: 13470 { 13471 bfd_vma branch_from_veneer; 13472 unsigned int insn; 13473 13474 /* Take size of veneer into account. */ 13475 branch_from_veneer = errnode->u.v.branch->vma 13476 - errnode->vma - 12; 13477 13478 if ((signed) branch_from_veneer < -(1 << 25) 13479 || (signed) branch_from_veneer >= (1 << 25)) 13480 (*_bfd_error_handler) (_("%B: error: VFP11 veneer out of " 13481 "range"), output_bfd); 13482 13483 /* Original instruction. */ 13484 insn = errnode->u.v.branch->u.b.vfp_insn; 13485 contents[endianflip ^ target] = insn & 0xff; 13486 contents[endianflip ^ (target + 1)] = (insn >> 8) & 0xff; 13487 contents[endianflip ^ (target + 2)] = (insn >> 16) & 0xff; 13488 contents[endianflip ^ (target + 3)] = (insn >> 24) & 0xff; 13489 13490 /* Branch back to insn after original insn. */ 13491 insn = 0xea000000 | ((branch_from_veneer >> 2) & 0xffffff); 13492 contents[endianflip ^ (target + 4)] = insn & 0xff; 13493 contents[endianflip ^ (target + 5)] = (insn >> 8) & 0xff; 13494 contents[endianflip ^ (target + 6)] = (insn >> 16) & 0xff; 13495 contents[endianflip ^ (target + 7)] = (insn >> 24) & 0xff; 13496 } 13497 break; 13498 13499 default: 13500 abort (); 13501 } 13502 } 13503 } 13504 13505 if (arm_data->elf.this_hdr.sh_type == SHT_ARM_EXIDX) 13506 { 13507 arm_unwind_table_edit *edit_node 13508 = arm_data->u.exidx.unwind_edit_list; 13509 /* Now, sec->size is the size of the section we will write. The original 13510 size (before we merged duplicate entries and inserted EXIDX_CANTUNWIND 13511 markers) was sec->rawsize. (This isn't the case if we perform no 13512 edits, then rawsize will be zero and we should use size). */ 13513 bfd_byte *edited_contents = (bfd_byte *) bfd_malloc (sec->size); 13514 unsigned int input_size = sec->rawsize ? sec->rawsize : sec->size; 13515 unsigned int in_index, out_index; 13516 bfd_vma add_to_offsets = 0; 13517 13518 for (in_index = 0, out_index = 0; in_index * 8 < input_size || edit_node;) 13519 { 13520 if (edit_node) 13521 { 13522 unsigned int edit_index = edit_node->index; 13523 13524 if (in_index < edit_index && in_index * 8 < input_size) 13525 { 13526 copy_exidx_entry (output_bfd, edited_contents + out_index * 8, 13527 contents + in_index * 8, add_to_offsets); 13528 out_index++; 13529 in_index++; 13530 } 13531 else if (in_index == edit_index 13532 || (in_index * 8 >= input_size 13533 && edit_index == UINT_MAX)) 13534 { 13535 switch (edit_node->type) 13536 { 13537 case DELETE_EXIDX_ENTRY: 13538 in_index++; 13539 add_to_offsets += 8; 13540 break; 13541 13542 case INSERT_EXIDX_CANTUNWIND_AT_END: 13543 { 13544 asection *text_sec = edit_node->linked_section; 13545 bfd_vma text_offset = text_sec->output_section->vma 13546 + text_sec->output_offset 13547 + text_sec->size; 13548 bfd_vma exidx_offset = offset + out_index * 8; 13549 unsigned long prel31_offset; 13550 13551 /* Note: this is meant to be equivalent to an 13552 R_ARM_PREL31 relocation. These synthetic 13553 EXIDX_CANTUNWIND markers are not relocated by the 13554 usual BFD method. */ 13555 prel31_offset = (text_offset - exidx_offset) 13556 & 0x7ffffffful; 13557 13558 /* First address we can't unwind. */ 13559 bfd_put_32 (output_bfd, prel31_offset, 13560 &edited_contents[out_index * 8]); 13561 13562 /* Code for EXIDX_CANTUNWIND. */ 13563 bfd_put_32 (output_bfd, 0x1, 13564 &edited_contents[out_index * 8 + 4]); 13565 13566 out_index++; 13567 add_to_offsets -= 8; 13568 } 13569 break; 13570 } 13571 13572 edit_node = edit_node->next; 13573 } 13574 } 13575 else 13576 { 13577 /* No more edits, copy remaining entries verbatim. */ 13578 copy_exidx_entry (output_bfd, edited_contents + out_index * 8, 13579 contents + in_index * 8, add_to_offsets); 13580 out_index++; 13581 in_index++; 13582 } 13583 } 13584 13585 if (!(sec->flags & SEC_EXCLUDE) && !(sec->flags & SEC_NEVER_LOAD)) 13586 bfd_set_section_contents (output_bfd, sec->output_section, 13587 edited_contents, 13588 (file_ptr) sec->output_offset, sec->size); 13589 13590 return TRUE; 13591 } 13592 13593 /* Fix code to point to Cortex-A8 erratum stubs. */ 13594 if (globals->fix_cortex_a8) 13595 { 13596 struct a8_branch_to_stub_data data; 13597 13598 data.writing_section = sec; 13599 data.contents = contents; 13600 13601 bfd_hash_traverse (&globals->stub_hash_table, make_branch_to_a8_stub, 13602 &data); 13603 } 13604 13605 if (mapcount == 0) 13606 return FALSE; 13607 13608 if (globals->byteswap_code) 13609 { 13610 qsort (map, mapcount, sizeof (* map), elf32_arm_compare_mapping); 13611 13612 ptr = map[0].vma; 13613 for (i = 0; i < mapcount; i++) 13614 { 13615 if (i == mapcount - 1) 13616 end = sec->size; 13617 else 13618 end = map[i + 1].vma; 13619 13620 switch (map[i].type) 13621 { 13622 case 'a': 13623 /* Byte swap code words. */ 13624 while (ptr + 3 < end) 13625 { 13626 tmp = contents[ptr]; 13627 contents[ptr] = contents[ptr + 3]; 13628 contents[ptr + 3] = tmp; 13629 tmp = contents[ptr + 1]; 13630 contents[ptr + 1] = contents[ptr + 2]; 13631 contents[ptr + 2] = tmp; 13632 ptr += 4; 13633 } 13634 break; 13635 13636 case 't': 13637 /* Byte swap code halfwords. */ 13638 while (ptr + 1 < end) 13639 { 13640 tmp = contents[ptr]; 13641 contents[ptr] = contents[ptr + 1]; 13642 contents[ptr + 1] = tmp; 13643 ptr += 2; 13644 } 13645 break; 13646 13647 case 'd': 13648 /* Leave data alone. */ 13649 break; 13650 } 13651 ptr = end; 13652 } 13653 } 13654 13655 free (map); 13656 arm_data->mapcount = -1; 13657 arm_data->mapsize = 0; 13658 arm_data->map = NULL; 13659 13660 return FALSE; 13661 } 13662 13663 /* Display STT_ARM_TFUNC symbols as functions. */ 13664 13665 static void 13666 elf32_arm_symbol_processing (bfd *abfd ATTRIBUTE_UNUSED, 13667 asymbol *asym) 13668 { 13669 elf_symbol_type *elfsym = (elf_symbol_type *) asym; 13670 13671 if (ELF_ST_TYPE (elfsym->internal_elf_sym.st_info) == STT_ARM_TFUNC) 13672 elfsym->symbol.flags |= BSF_FUNCTION; 13673 } 13674 13675 13676 /* Mangle thumb function symbols as we read them in. */ 13677 13678 static bfd_boolean 13679 elf32_arm_swap_symbol_in (bfd * abfd, 13680 const void *psrc, 13681 const void *pshn, 13682 Elf_Internal_Sym *dst) 13683 { 13684 if (!bfd_elf32_swap_symbol_in (abfd, psrc, pshn, dst)) 13685 return FALSE; 13686 13687 /* New EABI objects mark thumb function symbols by setting the low bit of 13688 the address. Turn these into STT_ARM_TFUNC. */ 13689 if ((ELF_ST_TYPE (dst->st_info) == STT_FUNC) 13690 && (dst->st_value & 1)) 13691 { 13692 dst->st_info = ELF_ST_INFO (ELF_ST_BIND (dst->st_info), STT_ARM_TFUNC); 13693 dst->st_value &= ~(bfd_vma) 1; 13694 } 13695 return TRUE; 13696 } 13697 13698 13699 /* Mangle thumb function symbols as we write them out. */ 13700 13701 static void 13702 elf32_arm_swap_symbol_out (bfd *abfd, 13703 const Elf_Internal_Sym *src, 13704 void *cdst, 13705 void *shndx) 13706 { 13707 Elf_Internal_Sym newsym; 13708 13709 /* We convert STT_ARM_TFUNC symbols into STT_FUNC with the low bit 13710 of the address set, as per the new EABI. We do this unconditionally 13711 because objcopy does not set the elf header flags until after 13712 it writes out the symbol table. */ 13713 if (ELF_ST_TYPE (src->st_info) == STT_ARM_TFUNC) 13714 { 13715 newsym = *src; 13716 newsym.st_info = ELF_ST_INFO (ELF_ST_BIND (src->st_info), STT_FUNC); 13717 if (newsym.st_shndx != SHN_UNDEF) 13718 { 13719 /* Do this only for defined symbols. At link type, the static 13720 linker will simulate the work of dynamic linker of resolving 13721 symbols and will carry over the thumbness of found symbols to 13722 the output symbol table. It's not clear how it happens, but 13723 the thumbness of undefined symbols can well be different at 13724 runtime, and writing '1' for them will be confusing for users 13725 and possibly for dynamic linker itself. 13726 */ 13727 newsym.st_value |= 1; 13728 } 13729 13730 src = &newsym; 13731 } 13732 bfd_elf32_swap_symbol_out (abfd, src, cdst, shndx); 13733 } 13734 13735 /* Add the PT_ARM_EXIDX program header. */ 13736 13737 static bfd_boolean 13738 elf32_arm_modify_segment_map (bfd *abfd, 13739 struct bfd_link_info *info ATTRIBUTE_UNUSED) 13740 { 13741 struct elf_segment_map *m; 13742 asection *sec; 13743 13744 sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); 13745 if (sec != NULL && (sec->flags & SEC_LOAD) != 0) 13746 { 13747 /* If there is already a PT_ARM_EXIDX header, then we do not 13748 want to add another one. This situation arises when running 13749 "strip"; the input binary already has the header. */ 13750 m = elf_tdata (abfd)->segment_map; 13751 while (m && m->p_type != PT_ARM_EXIDX) 13752 m = m->next; 13753 if (!m) 13754 { 13755 m = (struct elf_segment_map *) 13756 bfd_zalloc (abfd, sizeof (struct elf_segment_map)); 13757 if (m == NULL) 13758 return FALSE; 13759 m->p_type = PT_ARM_EXIDX; 13760 m->count = 1; 13761 m->sections[0] = sec; 13762 13763 m->next = elf_tdata (abfd)->segment_map; 13764 elf_tdata (abfd)->segment_map = m; 13765 } 13766 } 13767 13768 return TRUE; 13769 } 13770 13771 /* We may add a PT_ARM_EXIDX program header. */ 13772 13773 static int 13774 elf32_arm_additional_program_headers (bfd *abfd, 13775 struct bfd_link_info *info ATTRIBUTE_UNUSED) 13776 { 13777 asection *sec; 13778 13779 sec = bfd_get_section_by_name (abfd, ".ARM.exidx"); 13780 if (sec != NULL && (sec->flags & SEC_LOAD) != 0) 13781 return 1; 13782 else 13783 return 0; 13784 } 13785 13786 /* We have two function types: STT_FUNC and STT_ARM_TFUNC. */ 13787 13788 static bfd_boolean 13789 elf32_arm_is_function_type (unsigned int type) 13790 { 13791 return (type == STT_FUNC) || (type == STT_ARM_TFUNC); 13792 } 13793 13794 /* We use this to override swap_symbol_in and swap_symbol_out. */ 13795 const struct elf_size_info elf32_arm_size_info = 13796 { 13797 sizeof (Elf32_External_Ehdr), 13798 sizeof (Elf32_External_Phdr), 13799 sizeof (Elf32_External_Shdr), 13800 sizeof (Elf32_External_Rel), 13801 sizeof (Elf32_External_Rela), 13802 sizeof (Elf32_External_Sym), 13803 sizeof (Elf32_External_Dyn), 13804 sizeof (Elf_External_Note), 13805 4, 13806 1, 13807 32, 2, 13808 ELFCLASS32, EV_CURRENT, 13809 bfd_elf32_write_out_phdrs, 13810 bfd_elf32_write_shdrs_and_ehdr, 13811 bfd_elf32_checksum_contents, 13812 bfd_elf32_write_relocs, 13813 elf32_arm_swap_symbol_in, 13814 elf32_arm_swap_symbol_out, 13815 bfd_elf32_slurp_reloc_table, 13816 bfd_elf32_slurp_symbol_table, 13817 bfd_elf32_swap_dyn_in, 13818 bfd_elf32_swap_dyn_out, 13819 bfd_elf32_swap_reloc_in, 13820 bfd_elf32_swap_reloc_out, 13821 bfd_elf32_swap_reloca_in, 13822 bfd_elf32_swap_reloca_out 13823 }; 13824 13825 #define ELF_ARCH bfd_arch_arm 13826 #define ELF_TARGET_ID ARM_ELF_DATA 13827 #define ELF_MACHINE_CODE EM_ARM 13828 #ifdef __QNXTARGET__ 13829 #define ELF_MAXPAGESIZE 0x1000 13830 #else 13831 #define ELF_MAXPAGESIZE 0x8000 13832 #endif 13833 #define ELF_MINPAGESIZE 0x1000 13834 #define ELF_COMMONPAGESIZE 0x1000 13835 13836 #define bfd_elf32_mkobject elf32_arm_mkobject 13837 13838 #define bfd_elf32_bfd_copy_private_bfd_data elf32_arm_copy_private_bfd_data 13839 #define bfd_elf32_bfd_merge_private_bfd_data elf32_arm_merge_private_bfd_data 13840 #define bfd_elf32_bfd_set_private_flags elf32_arm_set_private_flags 13841 #define bfd_elf32_bfd_print_private_bfd_data elf32_arm_print_private_bfd_data 13842 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_link_hash_table_create 13843 #define bfd_elf32_bfd_link_hash_table_free elf32_arm_hash_table_free 13844 #define bfd_elf32_bfd_reloc_type_lookup elf32_arm_reloc_type_lookup 13845 #define bfd_elf32_bfd_reloc_name_lookup elf32_arm_reloc_name_lookup 13846 #define bfd_elf32_find_nearest_line elf32_arm_find_nearest_line 13847 #define bfd_elf32_find_inliner_info elf32_arm_find_inliner_info 13848 #define bfd_elf32_new_section_hook elf32_arm_new_section_hook 13849 #define bfd_elf32_bfd_is_target_special_symbol elf32_arm_is_target_special_symbol 13850 #define bfd_elf32_bfd_final_link elf32_arm_final_link 13851 13852 #define elf_backend_get_symbol_type elf32_arm_get_symbol_type 13853 #define elf_backend_gc_mark_hook elf32_arm_gc_mark_hook 13854 #define elf_backend_gc_mark_extra_sections elf32_arm_gc_mark_extra_sections 13855 #define elf_backend_gc_sweep_hook elf32_arm_gc_sweep_hook 13856 #define elf_backend_check_relocs elf32_arm_check_relocs 13857 #define elf_backend_relocate_section elf32_arm_relocate_section 13858 #define elf_backend_write_section elf32_arm_write_section 13859 #define elf_backend_adjust_dynamic_symbol elf32_arm_adjust_dynamic_symbol 13860 #define elf_backend_create_dynamic_sections elf32_arm_create_dynamic_sections 13861 #define elf_backend_finish_dynamic_symbol elf32_arm_finish_dynamic_symbol 13862 #define elf_backend_finish_dynamic_sections elf32_arm_finish_dynamic_sections 13863 #define elf_backend_size_dynamic_sections elf32_arm_size_dynamic_sections 13864 #define elf_backend_init_index_section _bfd_elf_init_2_index_sections 13865 #define elf_backend_post_process_headers elf32_arm_post_process_headers 13866 #define elf_backend_reloc_type_class elf32_arm_reloc_type_class 13867 #define elf_backend_object_p elf32_arm_object_p 13868 #define elf_backend_section_flags elf32_arm_section_flags 13869 #define elf_backend_fake_sections elf32_arm_fake_sections 13870 #define elf_backend_section_from_shdr elf32_arm_section_from_shdr 13871 #define elf_backend_final_write_processing elf32_arm_final_write_processing 13872 #define elf_backend_copy_indirect_symbol elf32_arm_copy_indirect_symbol 13873 #define elf_backend_symbol_processing elf32_arm_symbol_processing 13874 #define elf_backend_size_info elf32_arm_size_info 13875 #define elf_backend_modify_segment_map elf32_arm_modify_segment_map 13876 #define elf_backend_additional_program_headers elf32_arm_additional_program_headers 13877 #define elf_backend_output_arch_local_syms elf32_arm_output_arch_local_syms 13878 #define elf_backend_begin_write_processing elf32_arm_begin_write_processing 13879 #define elf_backend_is_function_type elf32_arm_is_function_type 13880 13881 #define elf_backend_can_refcount 1 13882 #define elf_backend_can_gc_sections 1 13883 #define elf_backend_plt_readonly 1 13884 #define elf_backend_want_got_plt 1 13885 #define elf_backend_want_plt_sym 0 13886 #define elf_backend_may_use_rel_p 1 13887 #define elf_backend_may_use_rela_p 0 13888 #define elf_backend_default_use_rela_p 0 13889 13890 #define elf_backend_got_header_size 12 13891 13892 #undef elf_backend_obj_attrs_vendor 13893 #define elf_backend_obj_attrs_vendor "aeabi" 13894 #undef elf_backend_obj_attrs_section 13895 #define elf_backend_obj_attrs_section ".ARM.attributes" 13896 #undef elf_backend_obj_attrs_arg_type 13897 #define elf_backend_obj_attrs_arg_type elf32_arm_obj_attrs_arg_type 13898 #undef elf_backend_obj_attrs_section_type 13899 #define elf_backend_obj_attrs_section_type SHT_ARM_ATTRIBUTES 13900 #define elf_backend_obj_attrs_order elf32_arm_obj_attrs_order 13901 #define elf_backend_obj_attrs_handle_unknown elf32_arm_obj_attrs_handle_unknown 13902 13903 #include "elf32-target.h" 13904 13905 /* VxWorks Targets. */ 13906 13907 #undef TARGET_LITTLE_SYM 13908 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_vxworks_vec 13909 #undef TARGET_LITTLE_NAME 13910 #define TARGET_LITTLE_NAME "elf32-littlearm-vxworks" 13911 #undef TARGET_BIG_SYM 13912 #define TARGET_BIG_SYM bfd_elf32_bigarm_vxworks_vec 13913 #undef TARGET_BIG_NAME 13914 #define TARGET_BIG_NAME "elf32-bigarm-vxworks" 13915 13916 /* Like elf32_arm_link_hash_table_create -- but overrides 13917 appropriately for VxWorks. */ 13918 13919 static struct bfd_link_hash_table * 13920 elf32_arm_vxworks_link_hash_table_create (bfd *abfd) 13921 { 13922 struct bfd_link_hash_table *ret; 13923 13924 ret = elf32_arm_link_hash_table_create (abfd); 13925 if (ret) 13926 { 13927 struct elf32_arm_link_hash_table *htab 13928 = (struct elf32_arm_link_hash_table *) ret; 13929 htab->use_rel = 0; 13930 htab->vxworks_p = 1; 13931 } 13932 return ret; 13933 } 13934 13935 static void 13936 elf32_arm_vxworks_final_write_processing (bfd *abfd, bfd_boolean linker) 13937 { 13938 elf32_arm_final_write_processing (abfd, linker); 13939 elf_vxworks_final_write_processing (abfd, linker); 13940 } 13941 13942 #undef elf32_bed 13943 #define elf32_bed elf32_arm_vxworks_bed 13944 13945 #undef bfd_elf32_bfd_link_hash_table_create 13946 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_vxworks_link_hash_table_create 13947 #undef elf_backend_add_symbol_hook 13948 #define elf_backend_add_symbol_hook elf_vxworks_add_symbol_hook 13949 #undef elf_backend_final_write_processing 13950 #define elf_backend_final_write_processing elf32_arm_vxworks_final_write_processing 13951 #undef elf_backend_emit_relocs 13952 #define elf_backend_emit_relocs elf_vxworks_emit_relocs 13953 13954 #undef elf_backend_may_use_rel_p 13955 #define elf_backend_may_use_rel_p 0 13956 #undef elf_backend_may_use_rela_p 13957 #define elf_backend_may_use_rela_p 1 13958 #undef elf_backend_default_use_rela_p 13959 #define elf_backend_default_use_rela_p 1 13960 #undef elf_backend_want_plt_sym 13961 #define elf_backend_want_plt_sym 1 13962 #undef ELF_MAXPAGESIZE 13963 #define ELF_MAXPAGESIZE 0x1000 13964 13965 #include "elf32-target.h" 13966 13967 13968 /* Merge backend specific data from an object file to the output 13969 object file when linking. */ 13970 13971 static bfd_boolean 13972 elf32_arm_merge_private_bfd_data (bfd * ibfd, bfd * obfd) 13973 { 13974 flagword out_flags; 13975 flagword in_flags; 13976 bfd_boolean flags_compatible = TRUE; 13977 asection *sec; 13978 13979 /* Check if we have the same endianess. */ 13980 if (! _bfd_generic_verify_endian_match (ibfd, obfd)) 13981 return FALSE; 13982 13983 if (! is_arm_elf (ibfd) || ! is_arm_elf (obfd)) 13984 return TRUE; 13985 13986 if (!elf32_arm_merge_eabi_attributes (ibfd, obfd)) 13987 return FALSE; 13988 13989 /* The input BFD must have had its flags initialised. */ 13990 /* The following seems bogus to me -- The flags are initialized in 13991 the assembler but I don't think an elf_flags_init field is 13992 written into the object. */ 13993 /* BFD_ASSERT (elf_flags_init (ibfd)); */ 13994 13995 in_flags = elf_elfheader (ibfd)->e_flags; 13996 out_flags = elf_elfheader (obfd)->e_flags; 13997 13998 /* In theory there is no reason why we couldn't handle this. However 13999 in practice it isn't even close to working and there is no real 14000 reason to want it. */ 14001 if (EF_ARM_EABI_VERSION (in_flags) >= EF_ARM_EABI_VER4 14002 && !(ibfd->flags & DYNAMIC) 14003 && (in_flags & EF_ARM_BE8)) 14004 { 14005 _bfd_error_handler (_("error: %B is already in final BE8 format"), 14006 ibfd); 14007 return FALSE; 14008 } 14009 14010 if (!elf_flags_init (obfd)) 14011 { 14012 /* If the input is the default architecture and had the default 14013 flags then do not bother setting the flags for the output 14014 architecture, instead allow future merges to do this. If no 14015 future merges ever set these flags then they will retain their 14016 uninitialised values, which surprise surprise, correspond 14017 to the default values. */ 14018 if (bfd_get_arch_info (ibfd)->the_default 14019 && elf_elfheader (ibfd)->e_flags == 0) 14020 return TRUE; 14021 14022 elf_flags_init (obfd) = TRUE; 14023 elf_elfheader (obfd)->e_flags = in_flags; 14024 14025 if (bfd_get_arch (obfd) == bfd_get_arch (ibfd) 14026 && bfd_get_arch_info (obfd)->the_default) 14027 return bfd_set_arch_mach (obfd, bfd_get_arch (ibfd), bfd_get_mach (ibfd)); 14028 14029 return TRUE; 14030 } 14031 14032 /* Determine what should happen if the input ARM architecture 14033 does not match the output ARM architecture. */ 14034 if (! bfd_arm_merge_machines (ibfd, obfd)) 14035 return FALSE; 14036 14037 /* Identical flags must be compatible. */ 14038 if (in_flags == out_flags) 14039 return TRUE; 14040 14041 /* Check to see if the input BFD actually contains any sections. If 14042 not, its flags may not have been initialised either, but it 14043 cannot actually cause any incompatiblity. Do not short-circuit 14044 dynamic objects; their section list may be emptied by 14045 elf_link_add_object_symbols. 14046 14047 Also check to see if there are no code sections in the input. 14048 In this case there is no need to check for code specific flags. 14049 XXX - do we need to worry about floating-point format compatability 14050 in data sections ? */ 14051 if (!(ibfd->flags & DYNAMIC)) 14052 { 14053 bfd_boolean null_input_bfd = TRUE; 14054 bfd_boolean only_data_sections = TRUE; 14055 14056 for (sec = ibfd->sections; sec != NULL; sec = sec->next) 14057 { 14058 /* Ignore synthetic glue sections. */ 14059 if (strcmp (sec->name, ".glue_7") 14060 && strcmp (sec->name, ".glue_7t")) 14061 { 14062 if ((bfd_get_section_flags (ibfd, sec) 14063 & (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) 14064 == (SEC_LOAD | SEC_CODE | SEC_HAS_CONTENTS)) 14065 only_data_sections = FALSE; 14066 14067 null_input_bfd = FALSE; 14068 break; 14069 } 14070 } 14071 14072 if (null_input_bfd || only_data_sections) 14073 return TRUE; 14074 } 14075 14076 /* Complain about various flag mismatches. */ 14077 if (!elf32_arm_versions_compatible (EF_ARM_EABI_VERSION (in_flags), 14078 EF_ARM_EABI_VERSION (out_flags))) 14079 { 14080 _bfd_error_handler 14081 (_("error: Source object %B has EABI version %d, but target %B has EABI version %d"), 14082 ibfd, obfd, 14083 (in_flags & EF_ARM_EABIMASK) >> 24, 14084 (out_flags & EF_ARM_EABIMASK) >> 24); 14085 return FALSE; 14086 } 14087 14088 /* Not sure what needs to be checked for EABI versions >= 1. */ 14089 /* VxWorks libraries do not use these flags. */ 14090 if (get_elf_backend_data (obfd) != &elf32_arm_vxworks_bed 14091 && get_elf_backend_data (ibfd) != &elf32_arm_vxworks_bed 14092 && EF_ARM_EABI_VERSION (in_flags) == EF_ARM_EABI_UNKNOWN) 14093 { 14094 if ((in_flags & EF_ARM_APCS_26) != (out_flags & EF_ARM_APCS_26)) 14095 { 14096 _bfd_error_handler 14097 (_("error: %B is compiled for APCS-%d, whereas target %B uses APCS-%d"), 14098 ibfd, obfd, 14099 in_flags & EF_ARM_APCS_26 ? 26 : 32, 14100 out_flags & EF_ARM_APCS_26 ? 26 : 32); 14101 flags_compatible = FALSE; 14102 } 14103 14104 if ((in_flags & EF_ARM_APCS_FLOAT) != (out_flags & EF_ARM_APCS_FLOAT)) 14105 { 14106 if (in_flags & EF_ARM_APCS_FLOAT) 14107 _bfd_error_handler 14108 (_("error: %B passes floats in float registers, whereas %B passes them in integer registers"), 14109 ibfd, obfd); 14110 else 14111 _bfd_error_handler 14112 (_("error: %B passes floats in integer registers, whereas %B passes them in float registers"), 14113 ibfd, obfd); 14114 14115 flags_compatible = FALSE; 14116 } 14117 14118 if ((in_flags & EF_ARM_VFP_FLOAT) != (out_flags & EF_ARM_VFP_FLOAT)) 14119 { 14120 if (in_flags & EF_ARM_VFP_FLOAT) 14121 _bfd_error_handler 14122 (_("error: %B uses VFP instructions, whereas %B does not"), 14123 ibfd, obfd); 14124 else 14125 _bfd_error_handler 14126 (_("error: %B uses FPA instructions, whereas %B does not"), 14127 ibfd, obfd); 14128 14129 flags_compatible = FALSE; 14130 } 14131 14132 if ((in_flags & EF_ARM_MAVERICK_FLOAT) != (out_flags & EF_ARM_MAVERICK_FLOAT)) 14133 { 14134 if (in_flags & EF_ARM_MAVERICK_FLOAT) 14135 _bfd_error_handler 14136 (_("error: %B uses Maverick instructions, whereas %B does not"), 14137 ibfd, obfd); 14138 else 14139 _bfd_error_handler 14140 (_("error: %B does not use Maverick instructions, whereas %B does"), 14141 ibfd, obfd); 14142 14143 flags_compatible = FALSE; 14144 } 14145 14146 #ifdef EF_ARM_SOFT_FLOAT 14147 if ((in_flags & EF_ARM_SOFT_FLOAT) != (out_flags & EF_ARM_SOFT_FLOAT)) 14148 { 14149 /* We can allow interworking between code that is VFP format 14150 layout, and uses either soft float or integer regs for 14151 passing floating point arguments and results. We already 14152 know that the APCS_FLOAT flags match; similarly for VFP 14153 flags. */ 14154 if ((in_flags & EF_ARM_APCS_FLOAT) != 0 14155 || (in_flags & EF_ARM_VFP_FLOAT) == 0) 14156 { 14157 if (in_flags & EF_ARM_SOFT_FLOAT) 14158 _bfd_error_handler 14159 (_("error: %B uses software FP, whereas %B uses hardware FP"), 14160 ibfd, obfd); 14161 else 14162 _bfd_error_handler 14163 (_("error: %B uses hardware FP, whereas %B uses software FP"), 14164 ibfd, obfd); 14165 14166 flags_compatible = FALSE; 14167 } 14168 } 14169 #endif 14170 14171 /* Interworking mismatch is only a warning. */ 14172 if ((in_flags & EF_ARM_INTERWORK) != (out_flags & EF_ARM_INTERWORK)) 14173 { 14174 if (in_flags & EF_ARM_INTERWORK) 14175 { 14176 _bfd_error_handler 14177 (_("Warning: %B supports interworking, whereas %B does not"), 14178 ibfd, obfd); 14179 } 14180 else 14181 { 14182 _bfd_error_handler 14183 (_("Warning: %B does not support interworking, whereas %B does"), 14184 ibfd, obfd); 14185 } 14186 } 14187 } 14188 14189 return flags_compatible; 14190 } 14191 14192 14193 /* Symbian OS Targets. */ 14194 14195 #undef TARGET_LITTLE_SYM 14196 #define TARGET_LITTLE_SYM bfd_elf32_littlearm_symbian_vec 14197 #undef TARGET_LITTLE_NAME 14198 #define TARGET_LITTLE_NAME "elf32-littlearm-symbian" 14199 #undef TARGET_BIG_SYM 14200 #define TARGET_BIG_SYM bfd_elf32_bigarm_symbian_vec 14201 #undef TARGET_BIG_NAME 14202 #define TARGET_BIG_NAME "elf32-bigarm-symbian" 14203 14204 /* Like elf32_arm_link_hash_table_create -- but overrides 14205 appropriately for Symbian OS. */ 14206 14207 static struct bfd_link_hash_table * 14208 elf32_arm_symbian_link_hash_table_create (bfd *abfd) 14209 { 14210 struct bfd_link_hash_table *ret; 14211 14212 ret = elf32_arm_link_hash_table_create (abfd); 14213 if (ret) 14214 { 14215 struct elf32_arm_link_hash_table *htab 14216 = (struct elf32_arm_link_hash_table *)ret; 14217 /* There is no PLT header for Symbian OS. */ 14218 htab->plt_header_size = 0; 14219 /* The PLT entries are each one instruction and one word. */ 14220 htab->plt_entry_size = 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry); 14221 htab->symbian_p = 1; 14222 /* Symbian uses armv5t or above, so use_blx is always true. */ 14223 htab->use_blx = 1; 14224 htab->root.is_relocatable_executable = 1; 14225 } 14226 return ret; 14227 } 14228 14229 static const struct bfd_elf_special_section 14230 elf32_arm_symbian_special_sections[] = 14231 { 14232 /* In a BPABI executable, the dynamic linking sections do not go in 14233 the loadable read-only segment. The post-linker may wish to 14234 refer to these sections, but they are not part of the final 14235 program image. */ 14236 { STRING_COMMA_LEN (".dynamic"), 0, SHT_DYNAMIC, 0 }, 14237 { STRING_COMMA_LEN (".dynstr"), 0, SHT_STRTAB, 0 }, 14238 { STRING_COMMA_LEN (".dynsym"), 0, SHT_DYNSYM, 0 }, 14239 { STRING_COMMA_LEN (".got"), 0, SHT_PROGBITS, 0 }, 14240 { STRING_COMMA_LEN (".hash"), 0, SHT_HASH, 0 }, 14241 /* These sections do not need to be writable as the SymbianOS 14242 postlinker will arrange things so that no dynamic relocation is 14243 required. */ 14244 { STRING_COMMA_LEN (".init_array"), 0, SHT_INIT_ARRAY, SHF_ALLOC }, 14245 { STRING_COMMA_LEN (".fini_array"), 0, SHT_FINI_ARRAY, SHF_ALLOC }, 14246 { STRING_COMMA_LEN (".preinit_array"), 0, SHT_PREINIT_ARRAY, SHF_ALLOC }, 14247 { NULL, 0, 0, 0, 0 } 14248 }; 14249 14250 static void 14251 elf32_arm_symbian_begin_write_processing (bfd *abfd, 14252 struct bfd_link_info *link_info) 14253 { 14254 /* BPABI objects are never loaded directly by an OS kernel; they are 14255 processed by a postlinker first, into an OS-specific format. If 14256 the D_PAGED bit is set on the file, BFD will align segments on 14257 page boundaries, so that an OS can directly map the file. With 14258 BPABI objects, that just results in wasted space. In addition, 14259 because we clear the D_PAGED bit, map_sections_to_segments will 14260 recognize that the program headers should not be mapped into any 14261 loadable segment. */ 14262 abfd->flags &= ~D_PAGED; 14263 elf32_arm_begin_write_processing (abfd, link_info); 14264 } 14265 14266 static bfd_boolean 14267 elf32_arm_symbian_modify_segment_map (bfd *abfd, 14268 struct bfd_link_info *info) 14269 { 14270 struct elf_segment_map *m; 14271 asection *dynsec; 14272 14273 /* BPABI shared libraries and executables should have a PT_DYNAMIC 14274 segment. However, because the .dynamic section is not marked 14275 with SEC_LOAD, the generic ELF code will not create such a 14276 segment. */ 14277 dynsec = bfd_get_section_by_name (abfd, ".dynamic"); 14278 if (dynsec) 14279 { 14280 for (m = elf_tdata (abfd)->segment_map; m != NULL; m = m->next) 14281 if (m->p_type == PT_DYNAMIC) 14282 break; 14283 14284 if (m == NULL) 14285 { 14286 m = _bfd_elf_make_dynamic_segment (abfd, dynsec); 14287 m->next = elf_tdata (abfd)->segment_map; 14288 elf_tdata (abfd)->segment_map = m; 14289 } 14290 } 14291 14292 /* Also call the generic arm routine. */ 14293 return elf32_arm_modify_segment_map (abfd, info); 14294 } 14295 14296 /* Return address for Ith PLT stub in section PLT, for relocation REL 14297 or (bfd_vma) -1 if it should not be included. */ 14298 14299 static bfd_vma 14300 elf32_arm_symbian_plt_sym_val (bfd_vma i, const asection *plt, 14301 const arelent *rel ATTRIBUTE_UNUSED) 14302 { 14303 return plt->vma + 4 * ARRAY_SIZE (elf32_arm_symbian_plt_entry) * i; 14304 } 14305 14306 14307 #undef elf32_bed 14308 #define elf32_bed elf32_arm_symbian_bed 14309 14310 /* The dynamic sections are not allocated on SymbianOS; the postlinker 14311 will process them and then discard them. */ 14312 #undef ELF_DYNAMIC_SEC_FLAGS 14313 #define ELF_DYNAMIC_SEC_FLAGS \ 14314 (SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_LINKER_CREATED) 14315 14316 #undef elf_backend_add_symbol_hook 14317 #undef elf_backend_emit_relocs 14318 14319 #undef bfd_elf32_bfd_link_hash_table_create 14320 #define bfd_elf32_bfd_link_hash_table_create elf32_arm_symbian_link_hash_table_create 14321 #undef elf_backend_special_sections 14322 #define elf_backend_special_sections elf32_arm_symbian_special_sections 14323 #undef elf_backend_begin_write_processing 14324 #define elf_backend_begin_write_processing elf32_arm_symbian_begin_write_processing 14325 #undef elf_backend_final_write_processing 14326 #define elf_backend_final_write_processing elf32_arm_final_write_processing 14327 14328 #undef elf_backend_modify_segment_map 14329 #define elf_backend_modify_segment_map elf32_arm_symbian_modify_segment_map 14330 14331 /* There is no .got section for BPABI objects, and hence no header. */ 14332 #undef elf_backend_got_header_size 14333 #define elf_backend_got_header_size 0 14334 14335 /* Similarly, there is no .got.plt section. */ 14336 #undef elf_backend_want_got_plt 14337 #define elf_backend_want_got_plt 0 14338 14339 #undef elf_backend_plt_sym_val 14340 #define elf_backend_plt_sym_val elf32_arm_symbian_plt_sym_val 14341 14342 #undef elf_backend_may_use_rel_p 14343 #define elf_backend_may_use_rel_p 1 14344 #undef elf_backend_may_use_rela_p 14345 #define elf_backend_may_use_rela_p 0 14346 #undef elf_backend_default_use_rela_p 14347 #define elf_backend_default_use_rela_p 0 14348 #undef elf_backend_want_plt_sym 14349 #define elf_backend_want_plt_sym 0 14350 #undef ELF_MAXPAGESIZE 14351 #define ELF_MAXPAGESIZE 0x8000 14352 14353 #include "elf32-target.h" 14354