1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */ 2 /* Disassembler interface for targets using CGEN. -*- C -*- 3 CGEN: Cpu tools GENerator 4 5 THIS FILE IS MACHINE GENERATED WITH CGEN. 6 - the resultant file is machine generated, cgen-dis.in isn't 7 8 Copyright (C) 1996-2020 Free Software Foundation, Inc. 9 10 This file is part of libopcodes. 11 12 This library is free software; you can redistribute it and/or modify 13 it under the terms of the GNU General Public License as published by 14 the Free Software Foundation; either version 3, or (at your option) 15 any later version. 16 17 It is distributed in the hope that it will be useful, but WITHOUT 18 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 19 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 20 License for more details. 21 22 You should have received a copy of the GNU General Public License 23 along with this program; if not, write to the Free Software Foundation, Inc., 24 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */ 25 26 /* ??? Eventually more and more of this stuff can go to cpu-independent files. 27 Keep that in mind. */ 28 29 #include "sysdep.h" 30 #include <stdio.h> 31 #include "ansidecl.h" 32 #include "disassemble.h" 33 #include "bfd.h" 34 #include "symcat.h" 35 #include "libiberty.h" 36 #include "or1k-desc.h" 37 #include "or1k-opc.h" 38 #include "opintl.h" 39 40 /* Default text to print if an instruction isn't recognized. */ 41 #define UNKNOWN_INSN_MSG _("*unknown*") 42 43 static void print_normal 44 (CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int); 45 static void print_address 46 (CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED; 47 static void print_keyword 48 (CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED; 49 static void print_insn_normal 50 (CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int); 51 static int print_insn 52 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned); 53 static int default_print_insn 54 (CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED; 55 static int read_insn 56 (CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *, 57 unsigned long *); 58 59 /* -- disassembler routines inserted here. */ 60 61 /* -- dis.c */ 62 63 static void 64 print_regpair (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 65 void * dis_info, 66 long value, 67 unsigned int attrs ATTRIBUTE_UNUSED, 68 bfd_vma pc ATTRIBUTE_UNUSED, 69 int length ATTRIBUTE_UNUSED) 70 { 71 disassemble_info *info = dis_info; 72 char reg1_index; 73 char reg2_index; 74 75 reg1_index = value & 0x1f; 76 reg2_index = reg1_index + ((value & (1 << 5)) ? 2 : 1); 77 78 (*info->fprintf_func) (info->stream, "r%d,r%d", reg1_index, reg2_index); 79 } 80 81 /* -- */ 82 83 void or1k_cgen_print_operand 84 (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int); 85 86 /* Main entry point for printing operands. 87 XINFO is a `void *' and not a `disassemble_info *' to not put a requirement 88 of dis-asm.h on cgen.h. 89 90 This function is basically just a big switch statement. Earlier versions 91 used tables to look up the function to use, but 92 - if the table contains both assembler and disassembler functions then 93 the disassembler contains much of the assembler and vice-versa, 94 - there's a lot of inlining possibilities as things grow, 95 - using a switch statement avoids the function call overhead. 96 97 This function could be moved into `print_insn_normal', but keeping it 98 separate makes clear the interface between `print_insn_normal' and each of 99 the handlers. */ 100 101 void 102 or1k_cgen_print_operand (CGEN_CPU_DESC cd, 103 int opindex, 104 void * xinfo, 105 CGEN_FIELDS *fields, 106 void const *attrs ATTRIBUTE_UNUSED, 107 bfd_vma pc, 108 int length) 109 { 110 disassemble_info *info = (disassemble_info *) xinfo; 111 112 switch (opindex) 113 { 114 case OR1K_OPERAND_DISP21 : 115 print_address (cd, info, fields->f_disp21, 0|(1<<CGEN_OPERAND_ABS_ADDR), pc, length); 116 break; 117 case OR1K_OPERAND_DISP26 : 118 print_address (cd, info, fields->f_disp26, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length); 119 break; 120 case OR1K_OPERAND_RA : 121 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r2, 0); 122 break; 123 case OR1K_OPERAND_RAD32F : 124 print_regpair (cd, info, fields->f_rad32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 125 break; 126 case OR1K_OPERAND_RADF : 127 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r2, 0); 128 break; 129 case OR1K_OPERAND_RADI : 130 print_regpair (cd, info, fields->f_rad32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 131 break; 132 case OR1K_OPERAND_RASF : 133 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r2, 0); 134 break; 135 case OR1K_OPERAND_RB : 136 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r3, 0); 137 break; 138 case OR1K_OPERAND_RBD32F : 139 print_regpair (cd, info, fields->f_rbd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 140 break; 141 case OR1K_OPERAND_RBDF : 142 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r3, 0); 143 break; 144 case OR1K_OPERAND_RBDI : 145 print_regpair (cd, info, fields->f_rbd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 146 break; 147 case OR1K_OPERAND_RBSF : 148 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r3, 0); 149 break; 150 case OR1K_OPERAND_RD : 151 print_keyword (cd, info, & or1k_cgen_opval_h_gpr, fields->f_r1, 0); 152 break; 153 case OR1K_OPERAND_RDD32F : 154 print_regpair (cd, info, fields->f_rdd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 155 break; 156 case OR1K_OPERAND_RDDF : 157 print_keyword (cd, info, & or1k_cgen_opval_h_fdr, fields->f_r1, 0); 158 break; 159 case OR1K_OPERAND_RDDI : 160 print_regpair (cd, info, fields->f_rdd32, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 161 break; 162 case OR1K_OPERAND_RDSF : 163 print_keyword (cd, info, & or1k_cgen_opval_h_fsr, fields->f_r1, 0); 164 break; 165 case OR1K_OPERAND_SIMM16 : 166 print_normal (cd, info, fields->f_simm16, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT), pc, length); 167 break; 168 case OR1K_OPERAND_SIMM16_SPLIT : 169 print_normal (cd, info, fields->f_simm16_split, 0|(1<<CGEN_OPERAND_SIGNED)|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 170 break; 171 case OR1K_OPERAND_UIMM16 : 172 print_normal (cd, info, fields->f_uimm16, 0, pc, length); 173 break; 174 case OR1K_OPERAND_UIMM16_SPLIT : 175 print_normal (cd, info, fields->f_uimm16_split, 0|(1<<CGEN_OPERAND_VIRTUAL), pc, length); 176 break; 177 case OR1K_OPERAND_UIMM6 : 178 print_normal (cd, info, fields->f_uimm6, 0, pc, length); 179 break; 180 181 default : 182 /* xgettext:c-format */ 183 opcodes_error_handler 184 (_("internal error: unrecognized field %d while printing insn"), 185 opindex); 186 abort (); 187 } 188 } 189 190 cgen_print_fn * const or1k_cgen_print_handlers[] = 191 { 192 print_insn_normal, 193 }; 194 195 196 void 197 or1k_cgen_init_dis (CGEN_CPU_DESC cd) 198 { 199 or1k_cgen_init_opcode_table (cd); 200 or1k_cgen_init_ibld_table (cd); 201 cd->print_handlers = & or1k_cgen_print_handlers[0]; 202 cd->print_operand = or1k_cgen_print_operand; 203 } 204 205 206 /* Default print handler. */ 207 208 static void 209 print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 210 void *dis_info, 211 long value, 212 unsigned int attrs, 213 bfd_vma pc ATTRIBUTE_UNUSED, 214 int length ATTRIBUTE_UNUSED) 215 { 216 disassemble_info *info = (disassemble_info *) dis_info; 217 218 /* Print the operand as directed by the attributes. */ 219 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 220 ; /* nothing to do */ 221 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 222 (*info->fprintf_func) (info->stream, "%ld", value); 223 else 224 (*info->fprintf_func) (info->stream, "0x%lx", value); 225 } 226 227 /* Default address handler. */ 228 229 static void 230 print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 231 void *dis_info, 232 bfd_vma value, 233 unsigned int attrs, 234 bfd_vma pc ATTRIBUTE_UNUSED, 235 int length ATTRIBUTE_UNUSED) 236 { 237 disassemble_info *info = (disassemble_info *) dis_info; 238 239 /* Print the operand as directed by the attributes. */ 240 if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY)) 241 ; /* Nothing to do. */ 242 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR)) 243 (*info->print_address_func) (value, info); 244 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR)) 245 (*info->print_address_func) (value, info); 246 else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED)) 247 (*info->fprintf_func) (info->stream, "%ld", (long) value); 248 else 249 (*info->fprintf_func) (info->stream, "0x%lx", (long) value); 250 } 251 252 /* Keyword print handler. */ 253 254 static void 255 print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 256 void *dis_info, 257 CGEN_KEYWORD *keyword_table, 258 long value, 259 unsigned int attrs ATTRIBUTE_UNUSED) 260 { 261 disassemble_info *info = (disassemble_info *) dis_info; 262 const CGEN_KEYWORD_ENTRY *ke; 263 264 ke = cgen_keyword_lookup_value (keyword_table, value); 265 if (ke != NULL) 266 (*info->fprintf_func) (info->stream, "%s", ke->name); 267 else 268 (*info->fprintf_func) (info->stream, "???"); 269 } 270 271 /* Default insn printer. 272 273 DIS_INFO is defined as `void *' so the disassembler needn't know anything 274 about disassemble_info. */ 275 276 static void 277 print_insn_normal (CGEN_CPU_DESC cd, 278 void *dis_info, 279 const CGEN_INSN *insn, 280 CGEN_FIELDS *fields, 281 bfd_vma pc, 282 int length) 283 { 284 const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn); 285 disassemble_info *info = (disassemble_info *) dis_info; 286 const CGEN_SYNTAX_CHAR_TYPE *syn; 287 288 CGEN_INIT_PRINT (cd); 289 290 for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn) 291 { 292 if (CGEN_SYNTAX_MNEMONIC_P (*syn)) 293 { 294 (*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn)); 295 continue; 296 } 297 if (CGEN_SYNTAX_CHAR_P (*syn)) 298 { 299 (*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn)); 300 continue; 301 } 302 303 /* We have an operand. */ 304 or1k_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info, 305 fields, CGEN_INSN_ATTRS (insn), pc, length); 306 } 307 } 308 309 /* Subroutine of print_insn. Reads an insn into the given buffers and updates 310 the extract info. 311 Returns 0 if all is well, non-zero otherwise. */ 312 313 static int 314 read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED, 315 bfd_vma pc, 316 disassemble_info *info, 317 bfd_byte *buf, 318 int buflen, 319 CGEN_EXTRACT_INFO *ex_info, 320 unsigned long *insn_value) 321 { 322 int status = (*info->read_memory_func) (pc, buf, buflen, info); 323 324 if (status != 0) 325 { 326 (*info->memory_error_func) (status, pc, info); 327 return -1; 328 } 329 330 ex_info->dis_info = info; 331 ex_info->valid = (1 << buflen) - 1; 332 ex_info->insn_bytes = buf; 333 334 *insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG); 335 return 0; 336 } 337 338 /* Utility to print an insn. 339 BUF is the base part of the insn, target byte order, BUFLEN bytes long. 340 The result is the size of the insn in bytes or zero for an unknown insn 341 or -1 if an error occurs fetching data (memory_error_func will have 342 been called). */ 343 344 static int 345 print_insn (CGEN_CPU_DESC cd, 346 bfd_vma pc, 347 disassemble_info *info, 348 bfd_byte *buf, 349 unsigned int buflen) 350 { 351 CGEN_INSN_INT insn_value; 352 const CGEN_INSN_LIST *insn_list; 353 CGEN_EXTRACT_INFO ex_info; 354 int basesize; 355 356 /* Extract base part of instruction, just in case CGEN_DIS_* uses it. */ 357 basesize = cd->base_insn_bitsize < buflen * 8 ? 358 cd->base_insn_bitsize : buflen * 8; 359 insn_value = cgen_get_insn_value (cd, buf, basesize); 360 361 362 /* Fill in ex_info fields like read_insn would. Don't actually call 363 read_insn, since the incoming buffer is already read (and possibly 364 modified a la m32r). */ 365 ex_info.valid = (1 << buflen) - 1; 366 ex_info.dis_info = info; 367 ex_info.insn_bytes = buf; 368 369 /* The instructions are stored in hash lists. 370 Pick the first one and keep trying until we find the right one. */ 371 372 insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value); 373 while (insn_list != NULL) 374 { 375 const CGEN_INSN *insn = insn_list->insn; 376 CGEN_FIELDS fields; 377 int length; 378 unsigned long insn_value_cropped; 379 380 #ifdef CGEN_VALIDATE_INSN_SUPPORTED 381 /* Not needed as insn shouldn't be in hash lists if not supported. */ 382 /* Supported by this cpu? */ 383 if (! or1k_cgen_insn_supported (cd, insn)) 384 { 385 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 386 continue; 387 } 388 #endif 389 390 /* Basic bit mask must be correct. */ 391 /* ??? May wish to allow target to defer this check until the extract 392 handler. */ 393 394 /* Base size may exceed this instruction's size. Extract the 395 relevant part from the buffer. */ 396 if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen && 397 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 398 insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn), 399 info->endian == BFD_ENDIAN_BIG); 400 else 401 insn_value_cropped = insn_value; 402 403 if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn)) 404 == CGEN_INSN_BASE_VALUE (insn)) 405 { 406 /* Printing is handled in two passes. The first pass parses the 407 machine insn and extracts the fields. The second pass prints 408 them. */ 409 410 /* Make sure the entire insn is loaded into insn_value, if it 411 can fit. */ 412 if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) && 413 (unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long)) 414 { 415 unsigned long full_insn_value; 416 int rc = read_insn (cd, pc, info, buf, 417 CGEN_INSN_BITSIZE (insn) / 8, 418 & ex_info, & full_insn_value); 419 if (rc != 0) 420 return rc; 421 length = CGEN_EXTRACT_FN (cd, insn) 422 (cd, insn, &ex_info, full_insn_value, &fields, pc); 423 } 424 else 425 length = CGEN_EXTRACT_FN (cd, insn) 426 (cd, insn, &ex_info, insn_value_cropped, &fields, pc); 427 428 /* Length < 0 -> error. */ 429 if (length < 0) 430 return length; 431 if (length > 0) 432 { 433 CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length); 434 /* Length is in bits, result is in bytes. */ 435 return length / 8; 436 } 437 } 438 439 insn_list = CGEN_DIS_NEXT_INSN (insn_list); 440 } 441 442 return 0; 443 } 444 445 /* Default value for CGEN_PRINT_INSN. 446 The result is the size of the insn in bytes or zero for an unknown insn 447 or -1 if an error occured fetching bytes. */ 448 449 #ifndef CGEN_PRINT_INSN 450 #define CGEN_PRINT_INSN default_print_insn 451 #endif 452 453 static int 454 default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info) 455 { 456 bfd_byte buf[CGEN_MAX_INSN_SIZE]; 457 int buflen; 458 int status; 459 460 /* Attempt to read the base part of the insn. */ 461 buflen = cd->base_insn_bitsize / 8; 462 status = (*info->read_memory_func) (pc, buf, buflen, info); 463 464 /* Try again with the minimum part, if min < base. */ 465 if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize)) 466 { 467 buflen = cd->min_insn_bitsize / 8; 468 status = (*info->read_memory_func) (pc, buf, buflen, info); 469 } 470 471 if (status != 0) 472 { 473 (*info->memory_error_func) (status, pc, info); 474 return -1; 475 } 476 477 return print_insn (cd, pc, info, buf, buflen); 478 } 479 480 /* Main entry point. 481 Print one instruction from PC on INFO->STREAM. 482 Return the size of the instruction (in bytes). */ 483 484 typedef struct cpu_desc_list 485 { 486 struct cpu_desc_list *next; 487 CGEN_BITSET *isa; 488 int mach; 489 int endian; 490 CGEN_CPU_DESC cd; 491 } cpu_desc_list; 492 493 int 494 print_insn_or1k (bfd_vma pc, disassemble_info *info) 495 { 496 static cpu_desc_list *cd_list = 0; 497 cpu_desc_list *cl = 0; 498 static CGEN_CPU_DESC cd = 0; 499 static CGEN_BITSET *prev_isa; 500 static int prev_mach; 501 static int prev_endian; 502 int length; 503 CGEN_BITSET *isa; 504 int mach; 505 int endian = (info->endian == BFD_ENDIAN_BIG 506 ? CGEN_ENDIAN_BIG 507 : CGEN_ENDIAN_LITTLE); 508 enum bfd_architecture arch; 509 510 /* ??? gdb will set mach but leave the architecture as "unknown" */ 511 #ifndef CGEN_BFD_ARCH 512 #define CGEN_BFD_ARCH bfd_arch_or1k 513 #endif 514 arch = info->arch; 515 if (arch == bfd_arch_unknown) 516 arch = CGEN_BFD_ARCH; 517 518 /* There's no standard way to compute the machine or isa number 519 so we leave it to the target. */ 520 #ifdef CGEN_COMPUTE_MACH 521 mach = CGEN_COMPUTE_MACH (info); 522 #else 523 mach = info->mach; 524 #endif 525 526 #ifdef CGEN_COMPUTE_ISA 527 { 528 static CGEN_BITSET *permanent_isa; 529 530 if (!permanent_isa) 531 permanent_isa = cgen_bitset_create (MAX_ISAS); 532 isa = permanent_isa; 533 cgen_bitset_clear (isa); 534 cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info)); 535 } 536 #else 537 isa = info->private_data; 538 #endif 539 540 /* If we've switched cpu's, try to find a handle we've used before */ 541 if (cd 542 && (cgen_bitset_compare (isa, prev_isa) != 0 543 || mach != prev_mach 544 || endian != prev_endian)) 545 { 546 cd = 0; 547 for (cl = cd_list; cl; cl = cl->next) 548 { 549 if (cgen_bitset_compare (cl->isa, isa) == 0 && 550 cl->mach == mach && 551 cl->endian == endian) 552 { 553 cd = cl->cd; 554 prev_isa = cd->isas; 555 break; 556 } 557 } 558 } 559 560 /* If we haven't initialized yet, initialize the opcode table. */ 561 if (! cd) 562 { 563 const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach); 564 const char *mach_name; 565 566 if (!arch_type) 567 abort (); 568 mach_name = arch_type->printable_name; 569 570 prev_isa = cgen_bitset_copy (isa); 571 prev_mach = mach; 572 prev_endian = endian; 573 cd = or1k_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa, 574 CGEN_CPU_OPEN_BFDMACH, mach_name, 575 CGEN_CPU_OPEN_ENDIAN, prev_endian, 576 CGEN_CPU_OPEN_END); 577 if (!cd) 578 abort (); 579 580 /* Save this away for future reference. */ 581 cl = xmalloc (sizeof (struct cpu_desc_list)); 582 cl->cd = cd; 583 cl->isa = prev_isa; 584 cl->mach = mach; 585 cl->endian = endian; 586 cl->next = cd_list; 587 cd_list = cl; 588 589 or1k_cgen_init_dis (cd); 590 } 591 592 /* We try to have as much common code as possible. 593 But at this point some targets need to take over. */ 594 /* ??? Some targets may need a hook elsewhere. Try to avoid this, 595 but if not possible try to move this hook elsewhere rather than 596 have two hooks. */ 597 length = CGEN_PRINT_INSN (cd, pc, info); 598 if (length > 0) 599 return length; 600 if (length < 0) 601 return -1; 602 603 (*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG); 604 return cd->default_insn_bitsize / 8; 605 } 606