1 /* Altera Nios II disassemble routines 2 Copyright (C) 2012-2018 Free Software Foundation, Inc. 3 Contributed by Nigel Gray (ngray@altera.com). 4 Contributed by Mentor Graphics, Inc. 5 6 This file is part of the GNU opcodes library. 7 8 This library is free software; you can redistribute it and/or modify 9 it under the terms of the GNU General Public License as published by 10 the Free Software Foundation; either version 3, or (at your option) 11 any later version. 12 13 It is distributed in the hope that it will be useful, but WITHOUT 14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY 15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public 16 License for more details. 17 18 You should have received a copy of the GNU General Public License 19 along with this file; see the file COPYING. If not, write to the 20 Free Software Foundation, 51 Franklin Street - Fifth Floor, Boston, 21 MA 02110-1301, USA. */ 22 23 #include "sysdep.h" 24 #include "disassemble.h" 25 #include "opintl.h" 26 #include "opcode/nios2.h" 27 #include "libiberty.h" 28 #include <string.h> 29 #include <assert.h> 30 31 /* No symbol table is available when this code runs out in an embedded 32 system as when it is used for disassembler support in a monitor. */ 33 #if !defined(EMBEDDED_ENV) 34 #define SYMTAB_AVAILABLE 1 35 #include "elf-bfd.h" 36 #include "elf/nios2.h" 37 #endif 38 39 /* Default length of Nios II instruction in bytes. */ 40 #define INSNLEN 4 41 42 /* Data structures used by the opcode hash table. */ 43 typedef struct _nios2_opcode_hash 44 { 45 const struct nios2_opcode *opcode; 46 struct _nios2_opcode_hash *next; 47 } nios2_opcode_hash; 48 49 /* Hash table size. */ 50 #define OPCODE_HASH_SIZE (IW_R1_OP_UNSHIFTED_MASK + 1) 51 52 /* Extract the opcode from an instruction word. */ 53 static unsigned int 54 nios2_r1_extract_opcode (unsigned int x) 55 { 56 return GET_IW_R1_OP (x); 57 } 58 59 static unsigned int 60 nios2_r2_extract_opcode (unsigned int x) 61 { 62 return GET_IW_R2_OP (x); 63 } 64 65 /* We maintain separate hash tables for R1 and R2 opcodes, and pseudo-ops 66 are stored in a different table than regular instructions. */ 67 68 typedef struct _nios2_disassembler_state 69 { 70 const struct nios2_opcode *opcodes; 71 const int *num_opcodes; 72 unsigned int (*extract_opcode) (unsigned int); 73 nios2_opcode_hash *hash[OPCODE_HASH_SIZE]; 74 nios2_opcode_hash *ps_hash[OPCODE_HASH_SIZE]; 75 const struct nios2_opcode *nop; 76 bfd_boolean init; 77 } nios2_disassembler_state; 78 79 static nios2_disassembler_state 80 nios2_r1_disassembler_state = { 81 nios2_r1_opcodes, 82 &nios2_num_r1_opcodes, 83 nios2_r1_extract_opcode, 84 {}, 85 {}, 86 NULL, 87 0 88 }; 89 90 static nios2_disassembler_state 91 nios2_r2_disassembler_state = { 92 nios2_r2_opcodes, 93 &nios2_num_r2_opcodes, 94 nios2_r2_extract_opcode, 95 {}, 96 {}, 97 NULL, 98 0 99 }; 100 101 /* Function to initialize the opcode hash table. */ 102 static void 103 nios2_init_opcode_hash (nios2_disassembler_state *state) 104 { 105 unsigned int i; 106 register const struct nios2_opcode *op; 107 108 for (i = 0; i < OPCODE_HASH_SIZE; i++) 109 for (op = state->opcodes; op < &state->opcodes[*(state->num_opcodes)]; op++) 110 { 111 nios2_opcode_hash *new_hash; 112 nios2_opcode_hash **bucket = NULL; 113 114 if ((op->pinfo & NIOS2_INSN_MACRO) == NIOS2_INSN_MACRO) 115 { 116 if (i == state->extract_opcode (op->match) 117 && (op->pinfo & (NIOS2_INSN_MACRO_MOV | NIOS2_INSN_MACRO_MOVI) 118 & 0x7fffffff)) 119 { 120 bucket = &(state->ps_hash[i]); 121 if (strcmp (op->name, "nop") == 0) 122 state->nop = op; 123 } 124 } 125 else if (i == state->extract_opcode (op->match)) 126 bucket = &(state->hash[i]); 127 128 if (bucket) 129 { 130 new_hash = 131 (nios2_opcode_hash *) malloc (sizeof (nios2_opcode_hash)); 132 if (new_hash == NULL) 133 { 134 /* xgettext:c-format */ 135 opcodes_error_handler (_("out of memory")); 136 exit (1); 137 } 138 new_hash->opcode = op; 139 new_hash->next = NULL; 140 while (*bucket) 141 bucket = &((*bucket)->next); 142 *bucket = new_hash; 143 } 144 } 145 state->init = 1; 146 147 #ifdef DEBUG_HASHTABLE 148 for (i = 0; i < OPCODE_HASH_SIZE; ++i) 149 { 150 nios2_opcode_hash *tmp_hash = state->hash[i]; 151 printf ("index: 0x%02X ops: ", i); 152 while (tmp_hash != NULL) 153 { 154 printf ("%s ", tmp_hash->opcode->name); 155 tmp_hash = tmp_hash->next; 156 } 157 printf ("\n"); 158 } 159 160 for (i = 0; i < OPCODE_HASH_SIZE; ++i) 161 { 162 nios2_opcode_hash *tmp_hash = state->ps_hash[i]; 163 printf ("index: 0x%02X ops: ", i); 164 while (tmp_hash != NULL) 165 { 166 printf ("%s ", tmp_hash->opcode->name); 167 tmp_hash = tmp_hash->next; 168 } 169 printf ("\n"); 170 } 171 #endif /* DEBUG_HASHTABLE */ 172 } 173 174 /* Return a pointer to an nios2_opcode struct for a given instruction 175 word OPCODE for bfd machine MACH, or NULL if there is an error. */ 176 const struct nios2_opcode * 177 nios2_find_opcode_hash (unsigned long opcode, unsigned long mach) 178 { 179 nios2_opcode_hash *entry; 180 nios2_disassembler_state *state; 181 182 /* Select the right instruction set, hash tables, and opcode accessor 183 for the mach variant. */ 184 if (mach == bfd_mach_nios2r2) 185 state = &nios2_r2_disassembler_state; 186 else 187 state = &nios2_r1_disassembler_state; 188 189 /* Build a hash table to shorten the search time. */ 190 if (!state->init) 191 nios2_init_opcode_hash (state); 192 193 /* Check for NOP first. Both NOP and MOV are macros that expand into 194 an ADD instruction, and we always want to give priority to NOP. */ 195 if (state->nop->match == (opcode & state->nop->mask)) 196 return state->nop; 197 198 /* First look in the pseudo-op hashtable. */ 199 for (entry = state->ps_hash[state->extract_opcode (opcode)]; 200 entry; entry = entry->next) 201 if (entry->opcode->match == (opcode & entry->opcode->mask)) 202 return entry->opcode; 203 204 /* Otherwise look in the main hashtable. */ 205 for (entry = state->hash[state->extract_opcode (opcode)]; 206 entry; entry = entry->next) 207 if (entry->opcode->match == (opcode & entry->opcode->mask)) 208 return entry->opcode; 209 210 return NULL; 211 } 212 213 /* There are 32 regular registers, 32 coprocessor registers, 214 and 32 control registers. */ 215 #define NUMREGNAMES 32 216 217 /* Return a pointer to the base of the coprocessor register name array. */ 218 static struct nios2_reg * 219 nios2_coprocessor_regs (void) 220 { 221 static struct nios2_reg *cached = NULL; 222 223 if (!cached) 224 { 225 int i; 226 for (i = NUMREGNAMES; i < nios2_num_regs; i++) 227 if (!strcmp (nios2_regs[i].name, "c0")) 228 { 229 cached = nios2_regs + i; 230 break; 231 } 232 assert (cached); 233 } 234 return cached; 235 } 236 237 /* Return a pointer to the base of the control register name array. */ 238 static struct nios2_reg * 239 nios2_control_regs (void) 240 { 241 static struct nios2_reg *cached = NULL; 242 243 if (!cached) 244 { 245 int i; 246 for (i = NUMREGNAMES; i < nios2_num_regs; i++) 247 if (!strcmp (nios2_regs[i].name, "status")) 248 { 249 cached = nios2_regs + i; 250 break; 251 } 252 assert (cached); 253 } 254 return cached; 255 } 256 257 /* Helper routine to report internal errors. */ 258 static void 259 bad_opcode (const struct nios2_opcode *op) 260 { 261 opcodes_error_handler 262 /* xgettext:c-format */ 263 (_("internal error: broken opcode descriptor for `%s %s'"), 264 op->name, op->args); 265 abort (); 266 } 267 268 /* The function nios2_print_insn_arg uses the character pointed 269 to by ARGPTR to determine how it print the next token or separator 270 character in the arguments to an instruction. */ 271 static int 272 nios2_print_insn_arg (const char *argptr, 273 unsigned long opcode, bfd_vma address, 274 disassemble_info *info, 275 const struct nios2_opcode *op) 276 { 277 unsigned long i = 0; 278 struct nios2_reg *reg_base; 279 280 switch (*argptr) 281 { 282 case ',': 283 case '(': 284 case ')': 285 (*info->fprintf_func) (info->stream, "%c", *argptr); 286 break; 287 288 case 'c': 289 /* Control register index. */ 290 switch (op->format) 291 { 292 case iw_r_type: 293 i = GET_IW_R_IMM5 (opcode); 294 break; 295 case iw_F3X6L5_type: 296 i = GET_IW_F3X6L5_IMM5 (opcode); 297 break; 298 default: 299 bad_opcode (op); 300 } 301 reg_base = nios2_control_regs (); 302 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 303 break; 304 305 case 'd': 306 reg_base = nios2_regs; 307 switch (op->format) 308 { 309 case iw_r_type: 310 i = GET_IW_R_C (opcode); 311 break; 312 case iw_custom_type: 313 i = GET_IW_CUSTOM_C (opcode); 314 if (GET_IW_CUSTOM_READC (opcode) == 0) 315 reg_base = nios2_coprocessor_regs (); 316 break; 317 case iw_F3X6L5_type: 318 case iw_F3X6_type: 319 i = GET_IW_F3X6L5_C (opcode); 320 break; 321 case iw_F3X8_type: 322 i = GET_IW_F3X8_C (opcode); 323 if (GET_IW_F3X8_READC (opcode) == 0) 324 reg_base = nios2_coprocessor_regs (); 325 break; 326 case iw_F2_type: 327 i = GET_IW_F2_B (opcode); 328 break; 329 default: 330 bad_opcode (op); 331 } 332 if (i < NUMREGNAMES) 333 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 334 else 335 (*info->fprintf_func) (info->stream, "unknown"); 336 break; 337 338 case 's': 339 reg_base = nios2_regs; 340 switch (op->format) 341 { 342 case iw_r_type: 343 i = GET_IW_R_A (opcode); 344 break; 345 case iw_i_type: 346 i = GET_IW_I_A (opcode); 347 break; 348 case iw_custom_type: 349 i = GET_IW_CUSTOM_A (opcode); 350 if (GET_IW_CUSTOM_READA (opcode) == 0) 351 reg_base = nios2_coprocessor_regs (); 352 break; 353 case iw_F2I16_type: 354 i = GET_IW_F2I16_A (opcode); 355 break; 356 case iw_F2X4I12_type: 357 i = GET_IW_F2X4I12_A (opcode); 358 break; 359 case iw_F1X4I12_type: 360 i = GET_IW_F1X4I12_A (opcode); 361 break; 362 case iw_F1X4L17_type: 363 i = GET_IW_F1X4L17_A (opcode); 364 break; 365 case iw_F3X6L5_type: 366 case iw_F3X6_type: 367 i = GET_IW_F3X6L5_A (opcode); 368 break; 369 case iw_F2X6L10_type: 370 i = GET_IW_F2X6L10_A (opcode); 371 break; 372 case iw_F3X8_type: 373 i = GET_IW_F3X8_A (opcode); 374 if (GET_IW_F3X8_READA (opcode) == 0) 375 reg_base = nios2_coprocessor_regs (); 376 break; 377 case iw_F1X1_type: 378 i = GET_IW_F1X1_A (opcode); 379 break; 380 case iw_F1I5_type: 381 i = 27; /* Implicit stack pointer reference. */ 382 break; 383 case iw_F2_type: 384 i = GET_IW_F2_A (opcode); 385 break; 386 default: 387 bad_opcode (op); 388 } 389 if (i < NUMREGNAMES) 390 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 391 else 392 (*info->fprintf_func) (info->stream, "unknown"); 393 break; 394 395 case 't': 396 reg_base = nios2_regs; 397 switch (op->format) 398 { 399 case iw_r_type: 400 i = GET_IW_R_B (opcode); 401 break; 402 case iw_i_type: 403 i = GET_IW_I_B (opcode); 404 break; 405 case iw_custom_type: 406 i = GET_IW_CUSTOM_B (opcode); 407 if (GET_IW_CUSTOM_READB (opcode) == 0) 408 reg_base = nios2_coprocessor_regs (); 409 break; 410 case iw_F2I16_type: 411 i = GET_IW_F2I16_B (opcode); 412 break; 413 case iw_F2X4I12_type: 414 i = GET_IW_F2X4I12_B (opcode); 415 break; 416 case iw_F3X6L5_type: 417 case iw_F3X6_type: 418 i = GET_IW_F3X6L5_B (opcode); 419 break; 420 case iw_F2X6L10_type: 421 i = GET_IW_F2X6L10_B (opcode); 422 break; 423 case iw_F3X8_type: 424 i = GET_IW_F3X8_B (opcode); 425 if (GET_IW_F3X8_READB (opcode) == 0) 426 reg_base = nios2_coprocessor_regs (); 427 break; 428 case iw_F1I5_type: 429 i = GET_IW_F1I5_B (opcode); 430 break; 431 case iw_F2_type: 432 i = GET_IW_F2_B (opcode); 433 break; 434 case iw_T1X1I6_type: 435 i = 0; 436 break; 437 default: 438 bad_opcode (op); 439 } 440 if (i < NUMREGNAMES) 441 (*info->fprintf_func) (info->stream, "%s", reg_base[i].name); 442 else 443 (*info->fprintf_func) (info->stream, "unknown"); 444 break; 445 446 case 'D': 447 switch (op->format) 448 { 449 case iw_T1I7_type: 450 i = GET_IW_T1I7_A3 (opcode); 451 break; 452 case iw_T2X1L3_type: 453 i = GET_IW_T2X1L3_B3 (opcode); 454 break; 455 case iw_T2X1I3_type: 456 i = GET_IW_T2X1I3_B3 (opcode); 457 break; 458 case iw_T3X1_type: 459 i = GET_IW_T3X1_C3 (opcode); 460 break; 461 case iw_T2X3_type: 462 if (op->num_args == 3) 463 i = GET_IW_T2X3_A3 (opcode); 464 else 465 i = GET_IW_T2X3_B3 (opcode); 466 break; 467 default: 468 bad_opcode (op); 469 } 470 i = nios2_r2_reg3_mappings[i]; 471 (*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name); 472 break; 473 474 case 'M': 475 /* 6-bit unsigned immediate with no shift. */ 476 switch (op->format) 477 { 478 case iw_T1X1I6_type: 479 i = GET_IW_T1X1I6_IMM6 (opcode); 480 break; 481 default: 482 bad_opcode (op); 483 } 484 (*info->fprintf_func) (info->stream, "%ld", i); 485 break; 486 487 case 'N': 488 /* 6-bit unsigned immediate with 2-bit shift. */ 489 switch (op->format) 490 { 491 case iw_T1X1I6_type: 492 i = GET_IW_T1X1I6_IMM6 (opcode) << 2; 493 break; 494 default: 495 bad_opcode (op); 496 } 497 (*info->fprintf_func) (info->stream, "%ld", i); 498 break; 499 500 case 'S': 501 switch (op->format) 502 { 503 case iw_T1I7_type: 504 i = GET_IW_T1I7_A3 (opcode); 505 break; 506 case iw_T2I4_type: 507 i = GET_IW_T2I4_A3 (opcode); 508 break; 509 case iw_T2X1L3_type: 510 i = GET_IW_T2X1L3_A3 (opcode); 511 break; 512 case iw_T2X1I3_type: 513 i = GET_IW_T2X1I3_A3 (opcode); 514 break; 515 case iw_T3X1_type: 516 i = GET_IW_T3X1_A3 (opcode); 517 break; 518 case iw_T2X3_type: 519 i = GET_IW_T2X3_A3 (opcode); 520 break; 521 case iw_T1X1I6_type: 522 i = GET_IW_T1X1I6_A3 (opcode); 523 break; 524 default: 525 bad_opcode (op); 526 } 527 i = nios2_r2_reg3_mappings[i]; 528 (*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name); 529 break; 530 531 case 'T': 532 switch (op->format) 533 { 534 case iw_T2I4_type: 535 i = GET_IW_T2I4_B3 (opcode); 536 break; 537 case iw_T3X1_type: 538 i = GET_IW_T3X1_B3 (opcode); 539 break; 540 case iw_T2X3_type: 541 i = GET_IW_T2X3_B3 (opcode); 542 break; 543 default: 544 bad_opcode (op); 545 } 546 i = nios2_r2_reg3_mappings[i]; 547 (*info->fprintf_func) (info->stream, "%s", nios2_regs[i].name); 548 break; 549 550 case 'i': 551 /* 16-bit signed immediate. */ 552 switch (op->format) 553 { 554 case iw_i_type: 555 i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16; 556 break; 557 case iw_F2I16_type: 558 i = (signed) (GET_IW_F2I16_IMM16 (opcode) << 16) >> 16; 559 break; 560 default: 561 bad_opcode (op); 562 } 563 (*info->fprintf_func) (info->stream, "%ld", i); 564 break; 565 566 case 'I': 567 /* 12-bit signed immediate. */ 568 switch (op->format) 569 { 570 case iw_F2X4I12_type: 571 i = (signed) (GET_IW_F2X4I12_IMM12 (opcode) << 20) >> 20; 572 break; 573 case iw_F1X4I12_type: 574 i = (signed) (GET_IW_F1X4I12_IMM12 (opcode) << 20) >> 20; 575 break; 576 default: 577 bad_opcode (op); 578 } 579 (*info->fprintf_func) (info->stream, "%ld", i); 580 break; 581 582 case 'u': 583 /* 16-bit unsigned immediate. */ 584 switch (op->format) 585 { 586 case iw_i_type: 587 i = GET_IW_I_IMM16 (opcode); 588 break; 589 case iw_F2I16_type: 590 i = GET_IW_F2I16_IMM16 (opcode); 591 break; 592 default: 593 bad_opcode (op); 594 } 595 (*info->fprintf_func) (info->stream, "%ld", i); 596 break; 597 598 case 'U': 599 /* 7-bit unsigned immediate with 2-bit shift. */ 600 switch (op->format) 601 { 602 case iw_T1I7_type: 603 i = GET_IW_T1I7_IMM7 (opcode) << 2; 604 break; 605 case iw_X1I7_type: 606 i = GET_IW_X1I7_IMM7 (opcode) << 2; 607 break; 608 default: 609 bad_opcode (op); 610 } 611 (*info->fprintf_func) (info->stream, "%ld", i); 612 break; 613 614 case 'V': 615 /* 5-bit unsigned immediate with 2-bit shift. */ 616 switch (op->format) 617 { 618 case iw_F1I5_type: 619 i = GET_IW_F1I5_IMM5 (opcode) << 2; 620 break; 621 default: 622 bad_opcode (op); 623 } 624 (*info->fprintf_func) (info->stream, "%ld", i); 625 break; 626 627 case 'W': 628 /* 4-bit unsigned immediate with 2-bit shift. */ 629 switch (op->format) 630 { 631 case iw_T2I4_type: 632 i = GET_IW_T2I4_IMM4 (opcode) << 2; 633 break; 634 case iw_L5I4X1_type: 635 i = GET_IW_L5I4X1_IMM4 (opcode) << 2; 636 break; 637 default: 638 bad_opcode (op); 639 } 640 (*info->fprintf_func) (info->stream, "%ld", i); 641 break; 642 643 case 'X': 644 /* 4-bit unsigned immediate with 1-bit shift. */ 645 switch (op->format) 646 { 647 case iw_T2I4_type: 648 i = GET_IW_T2I4_IMM4 (opcode) << 1; 649 break; 650 default: 651 bad_opcode (op); 652 } 653 (*info->fprintf_func) (info->stream, "%ld", i); 654 break; 655 656 case 'Y': 657 /* 4-bit unsigned immediate without shift. */ 658 switch (op->format) 659 { 660 case iw_T2I4_type: 661 i = GET_IW_T2I4_IMM4 (opcode); 662 break; 663 default: 664 bad_opcode (op); 665 } 666 (*info->fprintf_func) (info->stream, "%ld", i); 667 break; 668 669 case 'o': 670 /* 16-bit signed immediate address offset. */ 671 switch (op->format) 672 { 673 case iw_i_type: 674 i = (signed) (GET_IW_I_IMM16 (opcode) << 16) >> 16; 675 break; 676 case iw_F2I16_type: 677 i = (signed) (GET_IW_F2I16_IMM16 (opcode) << 16) >> 16; 678 break; 679 default: 680 bad_opcode (op); 681 } 682 address = address + 4 + i; 683 (*info->print_address_func) (address, info); 684 break; 685 686 case 'O': 687 /* 10-bit signed address offset with 1-bit shift. */ 688 switch (op->format) 689 { 690 case iw_I10_type: 691 i = (signed) (GET_IW_I10_IMM10 (opcode) << 22) >> 21; 692 break; 693 default: 694 bad_opcode (op); 695 } 696 address = address + 2 + i; 697 (*info->print_address_func) (address, info); 698 break; 699 700 case 'P': 701 /* 7-bit signed address offset with 1-bit shift. */ 702 switch (op->format) 703 { 704 case iw_T1I7_type: 705 i = (signed) (GET_IW_T1I7_IMM7 (opcode) << 25) >> 24; 706 break; 707 default: 708 bad_opcode (op); 709 } 710 address = address + 2 + i; 711 (*info->print_address_func) (address, info); 712 break; 713 714 case 'j': 715 /* 5-bit unsigned immediate. */ 716 switch (op->format) 717 { 718 case iw_r_type: 719 i = GET_IW_R_IMM5 (opcode); 720 break; 721 case iw_F3X6L5_type: 722 i = GET_IW_F3X6L5_IMM5 (opcode); 723 break; 724 case iw_F2X6L10_type: 725 i = GET_IW_F2X6L10_MSB (opcode); 726 break; 727 case iw_X2L5_type: 728 i = GET_IW_X2L5_IMM5 (opcode); 729 break; 730 default: 731 bad_opcode (op); 732 } 733 (*info->fprintf_func) (info->stream, "%ld", i); 734 break; 735 736 case 'k': 737 /* Second 5-bit unsigned immediate field. */ 738 switch (op->format) 739 { 740 case iw_F2X6L10_type: 741 i = GET_IW_F2X6L10_LSB (opcode); 742 break; 743 default: 744 bad_opcode (op); 745 } 746 (*info->fprintf_func) (info->stream, "%ld", i); 747 break; 748 749 case 'l': 750 /* 8-bit unsigned immediate. */ 751 switch (op->format) 752 { 753 case iw_custom_type: 754 i = GET_IW_CUSTOM_N (opcode); 755 break; 756 case iw_F3X8_type: 757 i = GET_IW_F3X8_N (opcode); 758 break; 759 default: 760 bad_opcode (op); 761 } 762 (*info->fprintf_func) (info->stream, "%lu", i); 763 break; 764 765 case 'm': 766 /* 26-bit unsigned immediate. */ 767 switch (op->format) 768 { 769 case iw_j_type: 770 i = GET_IW_J_IMM26 (opcode); 771 break; 772 case iw_L26_type: 773 i = GET_IW_L26_IMM26 (opcode); 774 break; 775 default: 776 bad_opcode (op); 777 } 778 /* This translates to an address because it's only used in call 779 instructions. */ 780 address = (address & 0xf0000000) | (i << 2); 781 (*info->print_address_func) (address, info); 782 break; 783 784 case 'e': 785 /* Encoded enumeration for addi.n/subi.n. */ 786 switch (op->format) 787 { 788 case iw_T2X1I3_type: 789 i = nios2_r2_asi_n_mappings[GET_IW_T2X1I3_IMM3 (opcode)]; 790 break; 791 default: 792 bad_opcode (op); 793 } 794 (*info->fprintf_func) (info->stream, "%lu", i); 795 break; 796 797 case 'f': 798 /* Encoded enumeration for slli.n/srli.n. */ 799 switch (op->format) 800 { 801 case iw_T2X1L3_type: 802 i = nios2_r2_shi_n_mappings[GET_IW_T2X1I3_IMM3 (opcode)]; 803 break; 804 default: 805 bad_opcode (op); 806 } 807 (*info->fprintf_func) (info->stream, "%lu", i); 808 break; 809 810 case 'g': 811 /* Encoded enumeration for andi.n. */ 812 switch (op->format) 813 { 814 case iw_T2I4_type: 815 i = nios2_r2_andi_n_mappings[GET_IW_T2I4_IMM4 (opcode)]; 816 break; 817 default: 818 bad_opcode (op); 819 } 820 (*info->fprintf_func) (info->stream, "%lu", i); 821 break; 822 823 case 'h': 824 /* Encoded enumeration for movi.n. */ 825 switch (op->format) 826 { 827 case iw_T1I7_type: 828 i = GET_IW_T1I7_IMM7 (opcode); 829 if (i == 125) 830 i = 0xff; 831 else if (i == 126) 832 i = -2; 833 else if (i == 127) 834 i = -1; 835 break; 836 default: 837 bad_opcode (op); 838 } 839 (*info->fprintf_func) (info->stream, "%ld", i); 840 break; 841 842 case 'R': 843 { 844 unsigned long reglist = 0; 845 int dir = 1; 846 int k, t; 847 848 switch (op->format) 849 { 850 case iw_F1X4L17_type: 851 /* Encoding for ldwm/stwm. */ 852 i = GET_IW_F1X4L17_REGMASK (opcode); 853 if (GET_IW_F1X4L17_RS (opcode)) 854 { 855 reglist = ((i << 14) & 0x00ffc000); 856 if (i & (1 << 10)) 857 reglist |= (1 << 28); 858 if (i & (1 << 11)) 859 reglist |= (1 << 31); 860 } 861 else 862 reglist = i << 2; 863 dir = GET_IW_F1X4L17_REGMASK (opcode) ? 1 : -1; 864 break; 865 866 case iw_L5I4X1_type: 867 /* Encoding for push.n/pop.n. */ 868 reglist |= (1 << 31); 869 if (GET_IW_L5I4X1_FP (opcode)) 870 reglist |= (1 << 28); 871 if (GET_IW_L5I4X1_CS (opcode)) 872 { 873 int val = GET_IW_L5I4X1_REGRANGE (opcode); 874 reglist |= nios2_r2_reg_range_mappings[val]; 875 } 876 dir = (op->match == MATCH_R2_POP_N ? 1 : -1); 877 break; 878 879 default: 880 bad_opcode (op); 881 } 882 883 t = 0; 884 (*info->fprintf_func) (info->stream, "{"); 885 for (k = (dir == 1 ? 0 : 31); 886 (dir == 1 && k < 32) || (dir == -1 && k >= 0); 887 k += dir) 888 if (reglist & (1 << k)) 889 { 890 if (t) 891 (*info->fprintf_func) (info->stream, ","); 892 else 893 t++; 894 (*info->fprintf_func) (info->stream, "%s", nios2_regs[k].name); 895 } 896 (*info->fprintf_func) (info->stream, "}"); 897 break; 898 } 899 900 case 'B': 901 /* Base register and options for ldwm/stwm. */ 902 switch (op->format) 903 { 904 case iw_F1X4L17_type: 905 if (GET_IW_F1X4L17_ID (opcode) == 0) 906 (*info->fprintf_func) (info->stream, "--"); 907 908 i = GET_IW_F1X4I12_A (opcode); 909 (*info->fprintf_func) (info->stream, "(%s)", 910 nios2_builtin_regs[i].name); 911 912 if (GET_IW_F1X4L17_ID (opcode)) 913 (*info->fprintf_func) (info->stream, "++"); 914 if (GET_IW_F1X4L17_WB (opcode)) 915 (*info->fprintf_func) (info->stream, ",writeback"); 916 if (GET_IW_F1X4L17_PC (opcode)) 917 (*info->fprintf_func) (info->stream, ",ret"); 918 break; 919 default: 920 bad_opcode (op); 921 } 922 break; 923 924 default: 925 (*info->fprintf_func) (info->stream, "unknown"); 926 break; 927 } 928 return 0; 929 } 930 931 /* nios2_disassemble does all the work of disassembling a Nios II 932 instruction opcode. */ 933 static int 934 nios2_disassemble (bfd_vma address, unsigned long opcode, 935 disassemble_info *info) 936 { 937 const struct nios2_opcode *op; 938 939 info->bytes_per_line = INSNLEN; 940 info->bytes_per_chunk = INSNLEN; 941 info->display_endian = info->endian; 942 info->insn_info_valid = 1; 943 info->branch_delay_insns = 0; 944 info->data_size = 0; 945 info->insn_type = dis_nonbranch; 946 info->target = 0; 947 info->target2 = 0; 948 949 /* Find the major opcode and use this to disassemble 950 the instruction and its arguments. */ 951 op = nios2_find_opcode_hash (opcode, info->mach); 952 953 if (op != NULL) 954 { 955 const char *argstr = op->args; 956 (*info->fprintf_func) (info->stream, "%s", op->name); 957 if (argstr != NULL && *argstr != '\0') 958 { 959 (*info->fprintf_func) (info->stream, "\t"); 960 while (*argstr != '\0') 961 { 962 nios2_print_insn_arg (argstr, opcode, address, info, op); 963 ++argstr; 964 } 965 } 966 /* Tell the caller how far to advance the program counter. */ 967 info->bytes_per_chunk = op->size; 968 return op->size; 969 } 970 else 971 { 972 /* Handle undefined instructions. */ 973 info->insn_type = dis_noninsn; 974 (*info->fprintf_func) (info->stream, "0x%lx", opcode); 975 return INSNLEN; 976 } 977 } 978 979 980 /* print_insn_nios2 is the main disassemble function for Nios II. 981 The function diassembler(abfd) (source in disassemble.c) returns a 982 pointer to this either print_insn_big_nios2 or 983 print_insn_little_nios2, which in turn call this function when the 984 bfd machine type is Nios II. print_insn_nios2 reads the 985 instruction word at the address given, and prints the disassembled 986 instruction on the stream info->stream using info->fprintf_func. */ 987 988 static int 989 print_insn_nios2 (bfd_vma address, disassemble_info *info, 990 enum bfd_endian endianness) 991 { 992 bfd_byte buffer[INSNLEN]; 993 int status; 994 995 status = (*info->read_memory_func) (address, buffer, INSNLEN, info); 996 if (status == 0) 997 { 998 unsigned long insn; 999 if (endianness == BFD_ENDIAN_BIG) 1000 insn = (unsigned long) bfd_getb32 (buffer); 1001 else 1002 insn = (unsigned long) bfd_getl32 (buffer); 1003 return nios2_disassemble (address, insn, info); 1004 } 1005 1006 /* We might have a 16-bit R2 instruction at the end of memory. Try that. */ 1007 if (info->mach == bfd_mach_nios2r2) 1008 { 1009 status = (*info->read_memory_func) (address, buffer, 2, info); 1010 if (status == 0) 1011 { 1012 unsigned long insn; 1013 if (endianness == BFD_ENDIAN_BIG) 1014 insn = (unsigned long) bfd_getb16 (buffer); 1015 else 1016 insn = (unsigned long) bfd_getl16 (buffer); 1017 return nios2_disassemble (address, insn, info); 1018 } 1019 } 1020 1021 /* If we got here, we couldn't read anything. */ 1022 (*info->memory_error_func) (status, address, info); 1023 return -1; 1024 } 1025 1026 /* These two functions are the main entry points, accessed from 1027 disassemble.c. */ 1028 int 1029 print_insn_big_nios2 (bfd_vma address, disassemble_info *info) 1030 { 1031 return print_insn_nios2 (address, info, BFD_ENDIAN_BIG); 1032 } 1033 1034 int 1035 print_insn_little_nios2 (bfd_vma address, disassemble_info *info) 1036 { 1037 return print_insn_nios2 (address, info, BFD_ENDIAN_LITTLE); 1038 } 1039