1source_sh ${srcdir}/emulparams/elf32ppccommon.sh 2source_sh ${srcdir}/emulparams/plt_unwind.sh 3source_sh ${srcdir}/emulparams/dt-relr.sh 4EXTRA_EM_FILE=ppc64elf 5ELFSIZE=64 6OUTPUT_FORMAT="elf64-powerpc" 7TEXT_START_ADDR=0x10000000 8#SEGMENT_SIZE=0x10000000 9ARCH=powerpc:common64 10unset EXECUTABLE_SYMBOLS 11unset SDATA_START_SYMBOLS 12unset SDATA2_START_SYMBOLS 13unset SBSS_START_SYMBOLS 14unset SBSS_END_SYMBOLS 15unset OTHER_END_SYMBOLS 16unset OTHER_RELRO_SECTIONS 17OTHER_TEXT_SECTIONS="*(.sfpr .glink)" 18OTHER_SDATA_SECTIONS=" 19 .tocbss ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.tocbss)}" 20 21if test x${RELOCATING+set} = xset; then 22 GOT=" 23 .got : ALIGN(256) { *(.got .toc) }" 24else 25 GOT=" 26 .got 0 : { *(.got) } 27 .toc 0 : { *(.toc) }" 28fi 29# Put .opd relocs first so ld.so will process them before any ifunc relocs. 30INITIAL_RELOC_SECTIONS=" 31 .rela.opd ${RELOCATING-0} : { *(.rela.opd) }" 32OTHER_GOT_RELOC_SECTIONS=" 33 .rela.toc ${RELOCATING-0} : { *(.rela.toc) } 34 .rela.toc1 ${RELOCATING-0} : { *(.rela.toc1) } 35 .rela.tocbss ${RELOCATING-0} : { *(.rela.tocbss) } 36 .rela.branch_lt ${RELOCATING-0} : { *(.rela.branch_lt) }" 37# The idea behind setting .branch_lt address as we do below is to put 38# it up against .got which is 256 byte aligned, so that the offset 39# from .TOC. to an entry in .branch_lt remains fixed after stub 40# sizing. (.eh_frame is edited late.) When -z relro -z now, we have 41# .branch_lt, .plt, .iplt, then .got, so in that case we move 42# .branch_lt so that the end of .iplt is against .got. All of these 43# sections are linker generated, with alignment eight and size a 44# multiple of eight, but a user playing games with their own 45# .branch_lt, .plt or .iplt sections can result in unexpected 46# alignment or size. Cope with that anyway. Note that if user 47# alignment of .branch_lt is 256 or more then nothing special need be 48# done. 49# 50# To understand what is going on here consider that the end address 51# of .iplt should be 0 mod 256, so the start of .iplt should be 52# -sizeof(.iplt) mod 256. But the start is constrained by alignment, 53# so goes down to (-alignof(.iplt) & -sizeof(.iplt)) mod 256. Repeat 54# that calculation for .plt and .branch_lt to find the start of 55# .branch_lt then subtract . mod 256 to find the padding. Of course 56# just one mod 256 suffices, which is done by anding with 255. 57OTHER_RELRO_SECTIONS_2=" 58 .opd ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { KEEP (*(.opd)) } 59 .toc1 ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc1) } 60 .branch_lt ${RELOCATING-0}${RELOCATING+ALIGNOF(.branch_lt) < 256 && SIZEOF(.got) != 0 ? . + (((-MAX(ALIGNOF(.branch_lt),8) & (-SIZEOF(.branch_lt)${RELRO_NOW+ + (-MAX(ALIGNOF(.plt),8) & (-SIZEOF(.plt) + (-MAX(ALIGNOF(.iplt),8) & -SIZEOF(.iplt))))})) - .) & 255) : ALIGN(MAX(ALIGNOF(.branch_lt), SIZEOF(.got) != 0 ? 256 : 8))} : { *(.branch_lt) }" 61INITIAL_READWRITE_SECTIONS=" 62 .toc ${RELOCATING-0} :${RELOCATING+ ALIGN(8)} { *(.toc) }" 63# Put .got before .data 64DATA_GOT=" " 65# Always make .got read-only after relocation 66SEPARATE_GOTPLT=0 67# Also put .sdata before .data 68DATA_SDATA=" " 69# and .plt/.iplt before .data 70DATA_PLT= 71PLT_BEFORE_GOT=" " 72