xref: /netbsd-src/external/gpl3/binutils.old/dist/include/opcode/s12z.h (revision 867d70fc718005c0918b8b8b2f9d7f2d52d0a0db)
1*867d70fcSchristos #ifndef S12Z_H
2*867d70fcSchristos #define S12Z_H
3*867d70fcSchristos 
4*867d70fcSchristos /* This byte is used to prefix instructions in "page 2" of the opcode
5*867d70fcSchristos    space.  */
6*867d70fcSchristos #define PAGE2_PREBYTE (0x1b)
7*867d70fcSchristos 
8*867d70fcSchristos struct reg
9*867d70fcSchristos {
10*867d70fcSchristos   char      *name;   /* The canonical name of the register.  */
11*867d70fcSchristos   int       bytes;   /* its size, in bytes.  */
12*867d70fcSchristos };
13*867d70fcSchristos 
14*867d70fcSchristos 
15*867d70fcSchristos /* How many registers do we have.  Actually there are only 13,
16*867d70fcSchristos    because CCL and CCH are the low and high bytes of CCW.  But
17*867d70fcSchristos    for assemnbly / disassembly purposes they are considered
18*867d70fcSchristos    distinct registers.  */
19*867d70fcSchristos #define S12Z_N_REGISTERS 15
20*867d70fcSchristos 
21*867d70fcSchristos extern const struct reg registers[S12Z_N_REGISTERS];
22*867d70fcSchristos 
23*867d70fcSchristos /* Solaris defines REG_Y in sys/regset.h; undef it here to avoid
24*867d70fcSchristos    breaking compilation when this target is enabled.  */
25*867d70fcSchristos #undef REG_Y
26*867d70fcSchristos 
27*867d70fcSchristos enum
28*867d70fcSchristos   {
29*867d70fcSchristos     REG_D2 = 0,
30*867d70fcSchristos     REG_D3,
31*867d70fcSchristos     REG_D4,
32*867d70fcSchristos     REG_D5,
33*867d70fcSchristos     REG_D0,
34*867d70fcSchristos     REG_D1,
35*867d70fcSchristos     REG_D6,
36*867d70fcSchristos     REG_D7,
37*867d70fcSchristos     REG_X,
38*867d70fcSchristos     REG_Y,
39*867d70fcSchristos     REG_S,
40*867d70fcSchristos     REG_P,
41*867d70fcSchristos     REG_CCH,
42*867d70fcSchristos     REG_CCL,
43*867d70fcSchristos     REG_CCW
44*867d70fcSchristos   };
45*867d70fcSchristos 
46*867d70fcSchristos /* Any of the registers d0, d1, ... d7.  */
47*867d70fcSchristos #define REG_BIT_Dn \
48*867d70fcSchristos ((0x1U << REG_D2) | \
49*867d70fcSchristos  (0x1U << REG_D3) | \
50*867d70fcSchristos  (0x1U << REG_D4) | \
51*867d70fcSchristos  (0x1U << REG_D5) | \
52*867d70fcSchristos  (0x1U << REG_D6) | \
53*867d70fcSchristos  (0x1U << REG_D7) | \
54*867d70fcSchristos  (0x1U << REG_D0) | \
55*867d70fcSchristos  (0x1U << REG_D1))
56*867d70fcSchristos 
57*867d70fcSchristos /* Any of the registers x, y or z.  */
58*867d70fcSchristos #define REG_BIT_XYS \
59*867d70fcSchristos ((0x1U << REG_X) | \
60*867d70fcSchristos  (0x1U << REG_Y) | \
61*867d70fcSchristos  (0x1U << REG_S))
62*867d70fcSchristos 
63*867d70fcSchristos /* Any of the registers x, y, z or p.  */
64*867d70fcSchristos #define REG_BIT_XYSP \
65*867d70fcSchristos ((0x1U << REG_X)  | \
66*867d70fcSchristos  (0x1U << REG_Y)  | \
67*867d70fcSchristos  (0x1U << REG_S)  | \
68*867d70fcSchristos  (0x1U << REG_P))
69*867d70fcSchristos 
70*867d70fcSchristos /* The x register or the y register.  */
71*867d70fcSchristos #define REG_BIT_XY \
72*867d70fcSchristos ((0x1U << REG_X) | \
73*867d70fcSchristos  (0x1U << REG_Y))
74*867d70fcSchristos 
75*867d70fcSchristos #endif
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