xref: /netbsd-src/external/gpl3/binutils.old/dist/gas/config/tc-ppc.c (revision fc4f42693f9b1c31f39f9cf50af1bf2010325808)
1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2    Copyright (C) 1994-2016 Free Software Foundation, Inc.
3    Written by Ian Lance Taylor, Cygnus Support.
4 
5    This file is part of GAS, the GNU Assembler.
6 
7    GAS is free software; you can redistribute it and/or modify
8    it under the terms of the GNU General Public License as published by
9    the Free Software Foundation; either version 3, or (at your option)
10    any later version.
11 
12    GAS is distributed in the hope that it will be useful,
13    but WITHOUT ANY WARRANTY; without even the implied warranty of
14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15    GNU General Public License for more details.
16 
17    You should have received a copy of the GNU General Public License
18    along with GAS; see the file COPYING.  If not, write to the Free
19    Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
20    02110-1301, USA.  */
21 
22 #include "as.h"
23 #include "safe-ctype.h"
24 #include "subsegs.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
27 
28 #ifdef OBJ_ELF
29 #include "elf/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
32 #endif
33 
34 #ifdef TE_PE
35 #include "coff/pe.h"
36 #endif
37 
38 #ifdef OBJ_XCOFF
39 #include "coff/xcoff.h"
40 #include "libxcoff.h"
41 #endif
42 
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips.  */
44 
45 /* Tell the main code what the endianness is.  */
46 extern int target_big_endian;
47 
48 /* Whether or not, we've set target_big_endian.  */
49 static int set_target_endian = 0;
50 
51 /* Whether to use user friendly register names.  */
52 #ifndef TARGET_REG_NAMES_P
53 #ifdef TE_PE
54 #define TARGET_REG_NAMES_P TRUE
55 #else
56 #define TARGET_REG_NAMES_P FALSE
57 #endif
58 #endif
59 
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
61    HIGHESTA.  */
62 
63 /* #lo(value) denotes the least significant 16 bits of the indicated.  */
64 #define PPC_LO(v) ((v) & 0xffff)
65 
66 /* #hi(value) denotes bits 16 through 31 of the indicated value.  */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
68 
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70   the indicated value, compensating for #lo() being treated as a
71   signed number.  */
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
73 
74 /* #higher(value) denotes bits 32 through 47 of the indicated value.  */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
76 
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78    compensating for #lo() being treated as a signed number.  */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
80 
81 /* #highest(value) denotes bits 48 through 63 of the indicated value.  */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
83 
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85    compensating for #lo being treated as a signed number.  */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
87 
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
89 
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91    applied to constants.  */
92 #define REPORT_OVERFLOW_HI 0
93 
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
95 
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
98 
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
102 #endif
103 
104 #ifdef OBJ_XCOFF
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
129 #endif
130 
131 #ifdef OBJ_ELF
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 #endif
137 
138 #ifdef TE_PE
139 static void ppc_previous (int);
140 static void ppc_pdata (int);
141 static void ppc_ydata (int);
142 static void ppc_reldata (int);
143 static void ppc_rdata (int);
144 static void ppc_ualong (int);
145 static void ppc_znop (int);
146 static void ppc_pe_comm (int);
147 static void ppc_pe_section (int);
148 static void ppc_pe_function (int);
149 static void ppc_pe_tocd (int);
150 #endif
151 
152 /* Generic assembler global variables which must be defined by all
153    targets.  */
154 
155 #ifdef OBJ_ELF
156 /* This string holds the chars that always start a comment.  If the
157    pre-processor is disabled, these aren't very useful.  The macro
158    tc_comment_chars points to this.  We use this, rather than the
159    usual comment_chars, so that we can switch for Solaris conventions.  */
160 static const char ppc_solaris_comment_chars[] = "#!";
161 static const char ppc_eabi_comment_chars[] = "#";
162 
163 #ifdef TARGET_SOLARIS_COMMENT
164 const char *ppc_comment_chars = ppc_solaris_comment_chars;
165 #else
166 const char *ppc_comment_chars = ppc_eabi_comment_chars;
167 #endif
168 #else
169 const char comment_chars[] = "#";
170 #endif
171 
172 /* Characters which start a comment at the beginning of a line.  */
173 const char line_comment_chars[] = "#";
174 
175 /* Characters which may be used to separate multiple commands on a
176    single line.  */
177 const char line_separator_chars[] = ";";
178 
179 /* Characters which are used to indicate an exponent in a floating
180    point number.  */
181 const char EXP_CHARS[] = "eE";
182 
183 /* Characters which mean that a number is a floating point constant,
184    as in 0d1.0.  */
185 const char FLT_CHARS[] = "dD";
186 
187 /* Anything that can start an operand needs to be mentioned here,
188    to stop the input scrubber eating whitespace.  */
189 const char ppc_symbol_chars[] = "%[";
190 
191 /* The dwarf2 data alignment, adjusted for 32 or 64 bit.  */
192 int ppc_cie_data_alignment;
193 
194 /* The dwarf2 minimum instruction length.  */
195 int ppc_dwarf2_line_min_insn_length;
196 
197 /* More than this number of nops in an alignment op gets a branch
198    instead.  */
199 unsigned long nop_limit = 4;
200 
201 /* The type of processor we are assembling for.  This is one or more
202    of the PPC_OPCODE flags defined in opcode/ppc.h.  */
203 ppc_cpu_t ppc_cpu = 0;
204 ppc_cpu_t sticky = 0;
205 
206 /* Value for ELF e_flags EF_PPC64_ABI.  */
207 unsigned int ppc_abiversion = 0;
208 
209 #ifdef OBJ_ELF
210 /* Flags set on encountering toc relocs.  */
211 static enum {
212   has_large_toc_reloc = 1,
213   has_small_toc_reloc = 2
214 } toc_reloc_types;
215 #endif
216 
217 /* Warn on emitting data to code sections.  */
218 int warn_476;
219 unsigned long last_insn;
220 segT last_seg;
221 subsegT last_subseg;
222 
223 /* The target specific pseudo-ops which we support.  */
224 
225 const pseudo_typeS md_pseudo_table[] =
226 {
227   /* Pseudo-ops which must be overridden.  */
228   { "byte",	ppc_byte,	0 },
229 
230 #ifdef OBJ_XCOFF
231   /* Pseudo-ops specific to the RS/6000 XCOFF format.  Some of these
232      legitimately belong in the obj-*.c file.  However, XCOFF is based
233      on COFF, and is only implemented for the RS/6000.  We just use
234      obj-coff.c, and add what we need here.  */
235   { "comm",	ppc_comm,	0 },
236   { "lcomm",	ppc_comm,	1 },
237   { "bb",	ppc_bb,		0 },
238   { "bc",	ppc_bc,		0 },
239   { "bf",	ppc_bf,		0 },
240   { "bi",	ppc_biei,	0 },
241   { "bs",	ppc_bs,		0 },
242   { "csect",	ppc_csect,	0 },
243   { "dwsect",	ppc_dwsect,	0 },
244   { "data",	ppc_section,	'd' },
245   { "eb",	ppc_eb,		0 },
246   { "ec",	ppc_ec,		0 },
247   { "ef",	ppc_ef,		0 },
248   { "ei",	ppc_biei,	1 },
249   { "es",	ppc_es,		0 },
250   { "extern",	ppc_extern,	0 },
251   { "function",	ppc_function,	0 },
252   { "lglobl",	ppc_lglobl,	0 },
253   { "ref",	ppc_ref,	0 },
254   { "rename",	ppc_rename,	0 },
255   { "section",	ppc_named_section, 0 },
256   { "stabx",	ppc_stabx,	0 },
257   { "text",	ppc_section,	't' },
258   { "toc",	ppc_toc,	0 },
259   { "long",	ppc_xcoff_cons,	2 },
260   { "llong",	ppc_xcoff_cons,	3 },
261   { "word",	ppc_xcoff_cons,	1 },
262   { "short",	ppc_xcoff_cons,	1 },
263   { "vbyte",    ppc_vbyte,	0 },
264 #endif
265 
266 #ifdef OBJ_ELF
267   { "llong",	cons,		8 },
268   { "rdata",	ppc_elf_rdata,	0 },
269   { "rodata",	ppc_elf_rdata,	0 },
270   { "lcomm",	ppc_elf_lcomm,	0 },
271   { "localentry", ppc_elf_localentry,	0 },
272   { "abiversion", ppc_elf_abiversion,	0 },
273 #endif
274 
275 #ifdef TE_PE
276   /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format.  */
277   { "previous", ppc_previous,   0 },
278   { "pdata",    ppc_pdata,      0 },
279   { "ydata",    ppc_ydata,      0 },
280   { "reldata",  ppc_reldata,    0 },
281   { "rdata",    ppc_rdata,      0 },
282   { "ualong",   ppc_ualong,     0 },
283   { "znop",     ppc_znop,       0 },
284   { "comm",	ppc_pe_comm,	0 },
285   { "lcomm",	ppc_pe_comm,	1 },
286   { "section",  ppc_pe_section, 0 },
287   { "function",	ppc_pe_function,0 },
288   { "tocd",     ppc_pe_tocd,    0 },
289 #endif
290 
291 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
292   { "tc",	ppc_tc,		0 },
293   { "machine",  ppc_machine,    0 },
294 #endif
295 
296   { NULL,	NULL,		0 }
297 };
298 
299 
300 /* Predefined register names if -mregnames (or default for Windows NT).
301    In general, there are lots of them, in an attempt to be compatible
302    with a number of other Windows NT assemblers.  */
303 
304 /* Structure to hold information about predefined registers.  */
305 struct pd_reg
306   {
307     const char *name;
308     int value;
309   };
310 
311 /* List of registers that are pre-defined:
312 
313    Each general register has predefined names of the form:
314    1. r<reg_num> which has the value <reg_num>.
315    2. r.<reg_num> which has the value <reg_num>.
316 
317    Each floating point register has predefined names of the form:
318    1. f<reg_num> which has the value <reg_num>.
319    2. f.<reg_num> which has the value <reg_num>.
320 
321    Each vector unit register has predefined names of the form:
322    1. v<reg_num> which has the value <reg_num>.
323    2. v.<reg_num> which has the value <reg_num>.
324 
325    Each condition register has predefined names of the form:
326    1. cr<reg_num> which has the value <reg_num>.
327    2. cr.<reg_num> which has the value <reg_num>.
328 
329    There are individual registers as well:
330    sp or r.sp     has the value 1
331    rtoc or r.toc  has the value 2
332    fpscr          has the value 0
333    xer            has the value 1
334    lr             has the value 8
335    ctr            has the value 9
336    pmr            has the value 0
337    dar            has the value 19
338    dsisr          has the value 18
339    dec            has the value 22
340    sdr1           has the value 25
341    srr0           has the value 26
342    srr1           has the value 27
343 
344    The table is sorted. Suitable for searching by a binary search.  */
345 
346 static const struct pd_reg pre_defined_registers[] =
347 {
348   { "cr.0", 0 },    /* Condition Registers */
349   { "cr.1", 1 },
350   { "cr.2", 2 },
351   { "cr.3", 3 },
352   { "cr.4", 4 },
353   { "cr.5", 5 },
354   { "cr.6", 6 },
355   { "cr.7", 7 },
356 
357   { "cr0", 0 },
358   { "cr1", 1 },
359   { "cr2", 2 },
360   { "cr3", 3 },
361   { "cr4", 4 },
362   { "cr5", 5 },
363   { "cr6", 6 },
364   { "cr7", 7 },
365 
366   { "ctr", 9 },
367 
368   { "dar", 19 },    /* Data Access Register */
369   { "dec", 22 },    /* Decrementer */
370   { "dsisr", 18 },  /* Data Storage Interrupt Status Register */
371 
372   { "f.0", 0 },     /* Floating point registers */
373   { "f.1", 1 },
374   { "f.10", 10 },
375   { "f.11", 11 },
376   { "f.12", 12 },
377   { "f.13", 13 },
378   { "f.14", 14 },
379   { "f.15", 15 },
380   { "f.16", 16 },
381   { "f.17", 17 },
382   { "f.18", 18 },
383   { "f.19", 19 },
384   { "f.2", 2 },
385   { "f.20", 20 },
386   { "f.21", 21 },
387   { "f.22", 22 },
388   { "f.23", 23 },
389   { "f.24", 24 },
390   { "f.25", 25 },
391   { "f.26", 26 },
392   { "f.27", 27 },
393   { "f.28", 28 },
394   { "f.29", 29 },
395   { "f.3", 3 },
396   { "f.30", 30 },
397   { "f.31", 31 },
398 
399   { "f.32", 32 },    /* Extended floating point scalar registers (ISA 2.06).  */
400   { "f.33", 33 },
401   { "f.34", 34 },
402   { "f.35", 35 },
403   { "f.36", 36 },
404   { "f.37", 37 },
405   { "f.38", 38 },
406   { "f.39", 39 },
407   { "f.4", 4 },
408   { "f.40", 40 },
409   { "f.41", 41 },
410   { "f.42", 42 },
411   { "f.43", 43 },
412   { "f.44", 44 },
413   { "f.45", 45 },
414   { "f.46", 46 },
415   { "f.47", 47 },
416   { "f.48", 48 },
417   { "f.49", 49 },
418   { "f.5", 5 },
419   { "f.50", 50 },
420   { "f.51", 51 },
421   { "f.52", 52 },
422   { "f.53", 53 },
423   { "f.54", 54 },
424   { "f.55", 55 },
425   { "f.56", 56 },
426   { "f.57", 57 },
427   { "f.58", 58 },
428   { "f.59", 59 },
429   { "f.6", 6 },
430   { "f.60", 60 },
431   { "f.61", 61 },
432   { "f.62", 62 },
433   { "f.63", 63 },
434   { "f.7", 7 },
435   { "f.8", 8 },
436   { "f.9", 9 },
437 
438   { "f0", 0 },
439   { "f1", 1 },
440   { "f10", 10 },
441   { "f11", 11 },
442   { "f12", 12 },
443   { "f13", 13 },
444   { "f14", 14 },
445   { "f15", 15 },
446   { "f16", 16 },
447   { "f17", 17 },
448   { "f18", 18 },
449   { "f19", 19 },
450   { "f2", 2 },
451   { "f20", 20 },
452   { "f21", 21 },
453   { "f22", 22 },
454   { "f23", 23 },
455   { "f24", 24 },
456   { "f25", 25 },
457   { "f26", 26 },
458   { "f27", 27 },
459   { "f28", 28 },
460   { "f29", 29 },
461   { "f3", 3 },
462   { "f30", 30 },
463   { "f31", 31 },
464 
465   { "f32", 32 },    /* Extended floating point scalar registers (ISA 2.06).  */
466   { "f33", 33 },
467   { "f34", 34 },
468   { "f35", 35 },
469   { "f36", 36 },
470   { "f37", 37 },
471   { "f38", 38 },
472   { "f39", 39 },
473   { "f4", 4 },
474   { "f40", 40 },
475   { "f41", 41 },
476   { "f42", 42 },
477   { "f43", 43 },
478   { "f44", 44 },
479   { "f45", 45 },
480   { "f46", 46 },
481   { "f47", 47 },
482   { "f48", 48 },
483   { "f49", 49 },
484   { "f5", 5 },
485   { "f50", 50 },
486   { "f51", 51 },
487   { "f52", 52 },
488   { "f53", 53 },
489   { "f54", 54 },
490   { "f55", 55 },
491   { "f56", 56 },
492   { "f57", 57 },
493   { "f58", 58 },
494   { "f59", 59 },
495   { "f6", 6 },
496   { "f60", 60 },
497   { "f61", 61 },
498   { "f62", 62 },
499   { "f63", 63 },
500   { "f7", 7 },
501   { "f8", 8 },
502   { "f9", 9 },
503 
504   { "fpscr", 0 },
505 
506   /* Quantization registers used with pair single instructions.  */
507   { "gqr.0", 0 },
508   { "gqr.1", 1 },
509   { "gqr.2", 2 },
510   { "gqr.3", 3 },
511   { "gqr.4", 4 },
512   { "gqr.5", 5 },
513   { "gqr.6", 6 },
514   { "gqr.7", 7 },
515   { "gqr0", 0 },
516   { "gqr1", 1 },
517   { "gqr2", 2 },
518   { "gqr3", 3 },
519   { "gqr4", 4 },
520   { "gqr5", 5 },
521   { "gqr6", 6 },
522   { "gqr7", 7 },
523 
524   { "lr", 8 },     /* Link Register */
525 
526   { "pmr", 0 },
527 
528   { "r.0", 0 },    /* General Purpose Registers */
529   { "r.1", 1 },
530   { "r.10", 10 },
531   { "r.11", 11 },
532   { "r.12", 12 },
533   { "r.13", 13 },
534   { "r.14", 14 },
535   { "r.15", 15 },
536   { "r.16", 16 },
537   { "r.17", 17 },
538   { "r.18", 18 },
539   { "r.19", 19 },
540   { "r.2", 2 },
541   { "r.20", 20 },
542   { "r.21", 21 },
543   { "r.22", 22 },
544   { "r.23", 23 },
545   { "r.24", 24 },
546   { "r.25", 25 },
547   { "r.26", 26 },
548   { "r.27", 27 },
549   { "r.28", 28 },
550   { "r.29", 29 },
551   { "r.3", 3 },
552   { "r.30", 30 },
553   { "r.31", 31 },
554   { "r.4", 4 },
555   { "r.5", 5 },
556   { "r.6", 6 },
557   { "r.7", 7 },
558   { "r.8", 8 },
559   { "r.9", 9 },
560 
561   { "r.sp", 1 },   /* Stack Pointer */
562 
563   { "r.toc", 2 },  /* Pointer to the table of contents */
564 
565   { "r0", 0 },     /* More general purpose registers */
566   { "r1", 1 },
567   { "r10", 10 },
568   { "r11", 11 },
569   { "r12", 12 },
570   { "r13", 13 },
571   { "r14", 14 },
572   { "r15", 15 },
573   { "r16", 16 },
574   { "r17", 17 },
575   { "r18", 18 },
576   { "r19", 19 },
577   { "r2", 2 },
578   { "r20", 20 },
579   { "r21", 21 },
580   { "r22", 22 },
581   { "r23", 23 },
582   { "r24", 24 },
583   { "r25", 25 },
584   { "r26", 26 },
585   { "r27", 27 },
586   { "r28", 28 },
587   { "r29", 29 },
588   { "r3", 3 },
589   { "r30", 30 },
590   { "r31", 31 },
591   { "r4", 4 },
592   { "r5", 5 },
593   { "r6", 6 },
594   { "r7", 7 },
595   { "r8", 8 },
596   { "r9", 9 },
597 
598   { "rtoc", 2 },  /* Table of contents */
599 
600   { "sdr1", 25 }, /* Storage Description Register 1 */
601 
602   { "sp", 1 },
603 
604   { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
605   { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
606 
607   { "v.0", 0 },     /* Vector (Altivec/VMX) registers */
608   { "v.1", 1 },
609   { "v.10", 10 },
610   { "v.11", 11 },
611   { "v.12", 12 },
612   { "v.13", 13 },
613   { "v.14", 14 },
614   { "v.15", 15 },
615   { "v.16", 16 },
616   { "v.17", 17 },
617   { "v.18", 18 },
618   { "v.19", 19 },
619   { "v.2", 2 },
620   { "v.20", 20 },
621   { "v.21", 21 },
622   { "v.22", 22 },
623   { "v.23", 23 },
624   { "v.24", 24 },
625   { "v.25", 25 },
626   { "v.26", 26 },
627   { "v.27", 27 },
628   { "v.28", 28 },
629   { "v.29", 29 },
630   { "v.3", 3 },
631   { "v.30", 30 },
632   { "v.31", 31 },
633   { "v.4", 4 },
634   { "v.5", 5 },
635   { "v.6", 6 },
636   { "v.7", 7 },
637   { "v.8", 8 },
638   { "v.9", 9 },
639 
640   { "v0", 0 },
641   { "v1", 1 },
642   { "v10", 10 },
643   { "v11", 11 },
644   { "v12", 12 },
645   { "v13", 13 },
646   { "v14", 14 },
647   { "v15", 15 },
648   { "v16", 16 },
649   { "v17", 17 },
650   { "v18", 18 },
651   { "v19", 19 },
652   { "v2", 2 },
653   { "v20", 20 },
654   { "v21", 21 },
655   { "v22", 22 },
656   { "v23", 23 },
657   { "v24", 24 },
658   { "v25", 25 },
659   { "v26", 26 },
660   { "v27", 27 },
661   { "v28", 28 },
662   { "v29", 29 },
663   { "v3", 3 },
664   { "v30", 30 },
665   { "v31", 31 },
666   { "v4", 4 },
667   { "v5", 5 },
668   { "v6", 6 },
669   { "v7", 7 },
670   { "v8", 8 },
671   { "v9", 9 },
672 
673   { "vs.0", 0 },     /* Vector Scalar (VSX) registers (ISA 2.06).  */
674   { "vs.1", 1 },
675   { "vs.10", 10 },
676   { "vs.11", 11 },
677   { "vs.12", 12 },
678   { "vs.13", 13 },
679   { "vs.14", 14 },
680   { "vs.15", 15 },
681   { "vs.16", 16 },
682   { "vs.17", 17 },
683   { "vs.18", 18 },
684   { "vs.19", 19 },
685   { "vs.2", 2 },
686   { "vs.20", 20 },
687   { "vs.21", 21 },
688   { "vs.22", 22 },
689   { "vs.23", 23 },
690   { "vs.24", 24 },
691   { "vs.25", 25 },
692   { "vs.26", 26 },
693   { "vs.27", 27 },
694   { "vs.28", 28 },
695   { "vs.29", 29 },
696   { "vs.3", 3 },
697   { "vs.30", 30 },
698   { "vs.31", 31 },
699   { "vs.32", 32 },
700   { "vs.33", 33 },
701   { "vs.34", 34 },
702   { "vs.35", 35 },
703   { "vs.36", 36 },
704   { "vs.37", 37 },
705   { "vs.38", 38 },
706   { "vs.39", 39 },
707   { "vs.4", 4 },
708   { "vs.40", 40 },
709   { "vs.41", 41 },
710   { "vs.42", 42 },
711   { "vs.43", 43 },
712   { "vs.44", 44 },
713   { "vs.45", 45 },
714   { "vs.46", 46 },
715   { "vs.47", 47 },
716   { "vs.48", 48 },
717   { "vs.49", 49 },
718   { "vs.5", 5 },
719   { "vs.50", 50 },
720   { "vs.51", 51 },
721   { "vs.52", 52 },
722   { "vs.53", 53 },
723   { "vs.54", 54 },
724   { "vs.55", 55 },
725   { "vs.56", 56 },
726   { "vs.57", 57 },
727   { "vs.58", 58 },
728   { "vs.59", 59 },
729   { "vs.6", 6 },
730   { "vs.60", 60 },
731   { "vs.61", 61 },
732   { "vs.62", 62 },
733   { "vs.63", 63 },
734   { "vs.7", 7 },
735   { "vs.8", 8 },
736   { "vs.9", 9 },
737 
738   { "vs0", 0 },
739   { "vs1", 1 },
740   { "vs10", 10 },
741   { "vs11", 11 },
742   { "vs12", 12 },
743   { "vs13", 13 },
744   { "vs14", 14 },
745   { "vs15", 15 },
746   { "vs16", 16 },
747   { "vs17", 17 },
748   { "vs18", 18 },
749   { "vs19", 19 },
750   { "vs2", 2 },
751   { "vs20", 20 },
752   { "vs21", 21 },
753   { "vs22", 22 },
754   { "vs23", 23 },
755   { "vs24", 24 },
756   { "vs25", 25 },
757   { "vs26", 26 },
758   { "vs27", 27 },
759   { "vs28", 28 },
760   { "vs29", 29 },
761   { "vs3", 3 },
762   { "vs30", 30 },
763   { "vs31", 31 },
764   { "vs32", 32 },
765   { "vs33", 33 },
766   { "vs34", 34 },
767   { "vs35", 35 },
768   { "vs36", 36 },
769   { "vs37", 37 },
770   { "vs38", 38 },
771   { "vs39", 39 },
772   { "vs4", 4 },
773   { "vs40", 40 },
774   { "vs41", 41 },
775   { "vs42", 42 },
776   { "vs43", 43 },
777   { "vs44", 44 },
778   { "vs45", 45 },
779   { "vs46", 46 },
780   { "vs47", 47 },
781   { "vs48", 48 },
782   { "vs49", 49 },
783   { "vs5", 5 },
784   { "vs50", 50 },
785   { "vs51", 51 },
786   { "vs52", 52 },
787   { "vs53", 53 },
788   { "vs54", 54 },
789   { "vs55", 55 },
790   { "vs56", 56 },
791   { "vs57", 57 },
792   { "vs58", 58 },
793   { "vs59", 59 },
794   { "vs6", 6 },
795   { "vs60", 60 },
796   { "vs61", 61 },
797   { "vs62", 62 },
798   { "vs63", 63 },
799   { "vs7", 7 },
800   { "vs8", 8 },
801   { "vs9", 9 },
802 
803   { "xer", 1 },
804 
805 };
806 
807 #define REG_NAME_CNT	(sizeof (pre_defined_registers) / sizeof (struct pd_reg))
808 
809 /* Given NAME, find the register number associated with that name, return
810    the integer value associated with the given name or -1 on failure.  */
811 
812 static int
813 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
814 {
815   int middle, low, high;
816   int cmp;
817 
818   low = 0;
819   high = regcount - 1;
820 
821   do
822     {
823       middle = (low + high) / 2;
824       cmp = strcasecmp (name, regs[middle].name);
825       if (cmp < 0)
826 	high = middle - 1;
827       else if (cmp > 0)
828 	low = middle + 1;
829       else
830 	return regs[middle].value;
831     }
832   while (low <= high);
833 
834   return -1;
835 }
836 
837 /*
838  * Summary of register_name.
839  *
840  * in:	Input_line_pointer points to 1st char of operand.
841  *
842  * out:	A expressionS.
843  *      The operand may have been a register: in this case, X_op == O_register,
844  *      X_add_number is set to the register number, and truth is returned.
845  *	Input_line_pointer->(next non-blank) char after operand, or is in its
846  *      original state.
847  */
848 
849 static bfd_boolean
850 register_name (expressionS *expressionP)
851 {
852   int reg_number;
853   char *name;
854   char *start;
855   char c;
856 
857   /* Find the spelling of the operand.  */
858   start = name = input_line_pointer;
859   if (name[0] == '%' && ISALPHA (name[1]))
860     name = ++input_line_pointer;
861 
862   else if (!reg_names_p || !ISALPHA (name[0]))
863     return FALSE;
864 
865   c = get_symbol_name (&name);
866   reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
867 
868   /* Put back the delimiting char.  */
869   *input_line_pointer = c;
870 
871   /* Look to see if it's in the register table.  */
872   if (reg_number >= 0)
873     {
874       expressionP->X_op = O_register;
875       expressionP->X_add_number = reg_number;
876 
877       /* Make the rest nice.  */
878       expressionP->X_add_symbol = NULL;
879       expressionP->X_op_symbol = NULL;
880       return TRUE;
881     }
882 
883   /* Reset the line as if we had not done anything.  */
884   input_line_pointer = start;
885   return FALSE;
886 }
887 
888 /* This function is called for each symbol seen in an expression.  It
889    handles the special parsing which PowerPC assemblers are supposed
890    to use for condition codes.  */
891 
892 /* Whether to do the special parsing.  */
893 static bfd_boolean cr_operand;
894 
895 /* Names to recognize in a condition code.  This table is sorted.  */
896 static const struct pd_reg cr_names[] =
897 {
898   { "cr0", 0 },
899   { "cr1", 1 },
900   { "cr2", 2 },
901   { "cr3", 3 },
902   { "cr4", 4 },
903   { "cr5", 5 },
904   { "cr6", 6 },
905   { "cr7", 7 },
906   { "eq", 2 },
907   { "gt", 1 },
908   { "lt", 0 },
909   { "so", 3 },
910   { "un", 3 }
911 };
912 
913 /* Parsing function.  This returns non-zero if it recognized an
914    expression.  */
915 
916 int
917 ppc_parse_name (const char *name, expressionS *exp)
918 {
919   int val;
920 
921   if (! cr_operand)
922     return 0;
923 
924   if (*name == '%')
925     ++name;
926   val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
927 			 name);
928   if (val < 0)
929     return 0;
930 
931   exp->X_op = O_constant;
932   exp->X_add_number = val;
933 
934   return 1;
935 }
936 
937 /* Local variables.  */
938 
939 /* Whether to target xcoff64/elf64.  */
940 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
941 
942 /* Opcode hash table.  */
943 static struct hash_control *ppc_hash;
944 
945 /* Macro hash table.  */
946 static struct hash_control *ppc_macro_hash;
947 
948 #ifdef OBJ_ELF
949 /* What type of shared library support to use.  */
950 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
951 
952 /* Flags to set in the elf header.  */
953 static flagword ppc_flags = 0;
954 
955 /* Whether this is Solaris or not.  */
956 #ifdef TARGET_SOLARIS_COMMENT
957 #define SOLARIS_P TRUE
958 #else
959 #define SOLARIS_P FALSE
960 #endif
961 
962 static bfd_boolean msolaris = SOLARIS_P;
963 #endif
964 
965 #ifdef OBJ_XCOFF
966 
967 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
968    using a bunch of different sections.  These assembler sections,
969    however, are all encompassed within the .text or .data sections of
970    the final output file.  We handle this by using different
971    subsegments within these main segments.  */
972 
973 /* Next subsegment to allocate within the .text segment.  */
974 static subsegT ppc_text_subsegment = 2;
975 
976 /* Linked list of csects in the text section.  */
977 static symbolS *ppc_text_csects;
978 
979 /* Next subsegment to allocate within the .data segment.  */
980 static subsegT ppc_data_subsegment = 2;
981 
982 /* Linked list of csects in the data section.  */
983 static symbolS *ppc_data_csects;
984 
985 /* The current csect.  */
986 static symbolS *ppc_current_csect;
987 
988 /* The RS/6000 assembler uses a TOC which holds addresses of functions
989    and variables.  Symbols are put in the TOC with the .tc pseudo-op.
990    A special relocation is used when accessing TOC entries.  We handle
991    the TOC as a subsegment within the .data segment.  We set it up if
992    we see a .toc pseudo-op, and save the csect symbol here.  */
993 static symbolS *ppc_toc_csect;
994 
995 /* The first frag in the TOC subsegment.  */
996 static fragS *ppc_toc_frag;
997 
998 /* The first frag in the first subsegment after the TOC in the .data
999    segment.  NULL if there are no subsegments after the TOC.  */
1000 static fragS *ppc_after_toc_frag;
1001 
1002 /* The current static block.  */
1003 static symbolS *ppc_current_block;
1004 
1005 /* The COFF debugging section; set by md_begin.  This is not the
1006    .debug section, but is instead the secret BFD section which will
1007    cause BFD to set the section number of a symbol to N_DEBUG.  */
1008 static asection *ppc_coff_debug_section;
1009 
1010 /* Structure to set the length field of the dwarf sections.  */
1011 struct dw_subsection {
1012   /* Subsections are simply linked.  */
1013   struct dw_subsection *link;
1014 
1015   /* The subsection number.  */
1016   subsegT subseg;
1017 
1018   /* Expression to compute the length of the section.  */
1019   expressionS end_exp;
1020 };
1021 
1022 static struct dw_section {
1023   /* Corresponding section.  */
1024   segT sect;
1025 
1026   /* Simply linked list of subsections with a label.  */
1027   struct dw_subsection *list_subseg;
1028 
1029   /* The anonymous subsection.  */
1030   struct dw_subsection *anon_subseg;
1031 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1032 #endif /* OBJ_XCOFF */
1033 
1034 #ifdef TE_PE
1035 
1036 /* Various sections that we need for PE coff support.  */
1037 static segT ydata_section;
1038 static segT pdata_section;
1039 static segT reldata_section;
1040 static segT rdata_section;
1041 static segT tocdata_section;
1042 
1043 /* The current section and the previous section. See ppc_previous.  */
1044 static segT ppc_previous_section;
1045 static segT ppc_current_section;
1046 
1047 #endif /* TE_PE */
1048 
1049 #ifdef OBJ_ELF
1050 symbolS *GOT_symbol;		/* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1051 unsigned long *ppc_apuinfo_list;
1052 unsigned int ppc_apuinfo_num;
1053 unsigned int ppc_apuinfo_num_alloc;
1054 #endif /* OBJ_ELF */
1055 
1056 #ifdef OBJ_ELF
1057 const char *const md_shortopts = "b:l:usm:K:VQ:";
1058 #else
1059 const char *const md_shortopts = "um:";
1060 #endif
1061 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1062 const struct option md_longopts[] = {
1063   {"nops", required_argument, NULL, OPTION_NOPS},
1064   {"ppc476-workaround", no_argument, &warn_476, 1},
1065   {"no-ppc476-workaround", no_argument, &warn_476, 0},
1066   {NULL, no_argument, NULL, 0}
1067 };
1068 const size_t md_longopts_size = sizeof (md_longopts);
1069 
1070 int
1071 md_parse_option (int c, const char *arg)
1072 {
1073   ppc_cpu_t new_cpu;
1074 
1075   switch (c)
1076     {
1077     case 'u':
1078       /* -u means that any undefined symbols should be treated as
1079 	 external, which is the default for gas anyhow.  */
1080       break;
1081 
1082 #ifdef OBJ_ELF
1083     case 'l':
1084       /* Solaris as takes -le (presumably for little endian).  For completeness
1085 	 sake, recognize -be also.  */
1086       if (strcmp (arg, "e") == 0)
1087 	{
1088 	  target_big_endian = 0;
1089 	  set_target_endian = 1;
1090 	  if (ppc_cpu & PPC_OPCODE_VLE)
1091 	    as_bad (_("the use of -mvle requires big endian."));
1092 	}
1093       else
1094 	return 0;
1095 
1096       break;
1097 
1098     case 'b':
1099       if (strcmp (arg, "e") == 0)
1100 	{
1101 	  target_big_endian = 1;
1102 	  set_target_endian = 1;
1103 	}
1104       else
1105 	return 0;
1106 
1107       break;
1108 
1109     case 'K':
1110       /* Recognize -K PIC.  */
1111       if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1112 	{
1113 	  shlib = SHLIB_PIC;
1114 	  ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1115 	}
1116       else
1117 	return 0;
1118 
1119       break;
1120 #endif
1121 
1122       /* a64 and a32 determine whether to use XCOFF64 or XCOFF32.  */
1123     case 'a':
1124       if (strcmp (arg, "64") == 0)
1125 	{
1126 #ifdef BFD64
1127 	  ppc_obj64 = 1;
1128 	  if (ppc_cpu & PPC_OPCODE_VLE)
1129 	    as_bad (_("the use of -mvle requires -a32."));
1130 #else
1131 	  as_fatal (_("%s unsupported"), "-a64");
1132 #endif
1133 	}
1134       else if (strcmp (arg, "32") == 0)
1135 	ppc_obj64 = 0;
1136       else
1137 	return 0;
1138       break;
1139 
1140     case 'm':
1141       new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1142       if (new_cpu != 0)
1143 	{
1144 	  ppc_cpu = new_cpu;
1145 	  if (strcmp (arg, "vle") == 0)
1146 	    {
1147 	      if (set_target_endian && target_big_endian == 0)
1148 		as_bad (_("the use of -mvle requires big endian."));
1149 	      if (ppc_obj64)
1150 		as_bad (_("the use of -mvle requires -a32."));
1151 	    }
1152 	}
1153 
1154       else if (strcmp (arg, "regnames") == 0)
1155 	reg_names_p = TRUE;
1156 
1157       else if (strcmp (arg, "no-regnames") == 0)
1158 	reg_names_p = FALSE;
1159 
1160 #ifdef OBJ_ELF
1161       /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1162 	 that require relocation.  */
1163       else if (strcmp (arg, "relocatable") == 0)
1164 	{
1165 	  shlib = SHLIB_MRELOCATABLE;
1166 	  ppc_flags |= EF_PPC_RELOCATABLE;
1167 	}
1168 
1169       else if (strcmp (arg, "relocatable-lib") == 0)
1170 	{
1171 	  shlib = SHLIB_MRELOCATABLE;
1172 	  ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1173 	}
1174 
1175       /* -memb, set embedded bit.  */
1176       else if (strcmp (arg, "emb") == 0)
1177 	ppc_flags |= EF_PPC_EMB;
1178 
1179       /* -mlittle/-mbig set the endianness.  */
1180       else if (strcmp (arg, "little") == 0
1181 	       || strcmp (arg, "little-endian") == 0)
1182 	{
1183 	  target_big_endian = 0;
1184 	  set_target_endian = 1;
1185 	  if (ppc_cpu & PPC_OPCODE_VLE)
1186 	    as_bad (_("the use of -mvle requires big endian."));
1187 	}
1188 
1189       else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1190 	{
1191 	  target_big_endian = 1;
1192 	  set_target_endian = 1;
1193 	}
1194 
1195       else if (strcmp (arg, "solaris") == 0)
1196 	{
1197 	  msolaris = TRUE;
1198 	  ppc_comment_chars = ppc_solaris_comment_chars;
1199 	}
1200 
1201       else if (strcmp (arg, "no-solaris") == 0)
1202 	{
1203 	  msolaris = FALSE;
1204 	  ppc_comment_chars = ppc_eabi_comment_chars;
1205 	}
1206 #endif
1207       else
1208 	{
1209 	  as_bad (_("invalid switch -m%s"), arg);
1210 	  return 0;
1211 	}
1212       break;
1213 
1214 #ifdef OBJ_ELF
1215       /* -V: SVR4 argument to print version ID.  */
1216     case 'V':
1217       print_version_id ();
1218       break;
1219 
1220       /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1221 	 should be emitted or not.  FIXME: Not implemented.  */
1222     case 'Q':
1223       break;
1224 
1225       /* Solaris takes -s to specify that .stabs go in a .stabs section,
1226 	 rather than .stabs.excl, which is ignored by the linker.
1227 	 FIXME: Not implemented.  */
1228     case 's':
1229       if (arg)
1230 	return 0;
1231 
1232       break;
1233 #endif
1234 
1235     case OPTION_NOPS:
1236       {
1237 	char *end;
1238 	nop_limit = strtoul (optarg, &end, 0);
1239 	if (*end)
1240 	  as_bad (_("--nops needs a numeric argument"));
1241       }
1242       break;
1243 
1244     case 0:
1245       break;
1246 
1247     default:
1248       return 0;
1249     }
1250 
1251   return 1;
1252 }
1253 
1254 void
1255 md_show_usage (FILE *stream)
1256 {
1257   fprintf (stream, _("\
1258 PowerPC options:\n\
1259 -a32                    generate ELF32/XCOFF32\n\
1260 -a64                    generate ELF64/XCOFF64\n\
1261 -u                      ignored\n\
1262 -mpwrx, -mpwr2          generate code for POWER/2 (RIOS2)\n\
1263 -mpwr                   generate code for POWER (RIOS1)\n\
1264 -m601                   generate code for PowerPC 601\n\
1265 -mppc, -mppc32, -m603, -m604\n\
1266                         generate code for PowerPC 603/604\n\
1267 -m403                   generate code for PowerPC 403\n\
1268 -m405                   generate code for PowerPC 405\n\
1269 -m440                   generate code for PowerPC 440\n\
1270 -m464                   generate code for PowerPC 464\n\
1271 -m476                   generate code for PowerPC 476\n\
1272 -m7400, -m7410, -m7450, -m7455\n\
1273                         generate code for PowerPC 7400/7410/7450/7455\n\
1274 -m750cl                 generate code for PowerPC 750cl\n\
1275 -m821, -m850, -m860     generate code for PowerPC 821/850/860\n"));
1276   fprintf (stream, _("\
1277 -mppc64, -m620          generate code for PowerPC 620/625/630\n\
1278 -mppc64bridge           generate code for PowerPC 64, including bridge insns\n\
1279 -mbooke                 generate code for 32-bit PowerPC BookE\n\
1280 -ma2                    generate code for A2 architecture\n\
1281 -mpower4, -mpwr4        generate code for Power4 architecture\n\
1282 -mpower5, -mpwr5, -mpwr5x\n\
1283                         generate code for Power5 architecture\n\
1284 -mpower6, -mpwr6        generate code for Power6 architecture\n\
1285 -mpower7, -mpwr7        generate code for Power7 architecture\n\
1286 -mpower8, -mpwr8        generate code for Power8 architecture\n\
1287 -mpower9, -mpwr9        generate code for Power9 architecture\n\
1288 -mcell                  generate code for Cell Broadband Engine architecture\n\
1289 -mcom                   generate code Power/PowerPC common instructions\n\
1290 -many                   generate code for any architecture (PWR/PWRX/PPC)\n"));
1291   fprintf (stream, _("\
1292 -maltivec               generate code for AltiVec\n\
1293 -mvsx                   generate code for Vector-Scalar (VSX) instructions\n\
1294 -mhtm                   generate code for Hardware Transactional Memory\n\
1295 -me300                  generate code for PowerPC e300 family\n\
1296 -me500, -me500x2        generate code for Motorola e500 core complex\n\
1297 -me500mc,               generate code for Freescale e500mc core complex\n\
1298 -me500mc64,             generate code for Freescale e500mc64 core complex\n\
1299 -me5500,                generate code for Freescale e5500 core complex\n\
1300 -me6500,                generate code for Freescale e6500 core complex\n\
1301 -mspe                   generate code for Motorola SPE instructions\n\
1302 -mvle                   generate code for Freescale VLE instructions\n\
1303 -mtitan                 generate code for AppliedMicro Titan core complex\n\
1304 -mregnames              Allow symbolic names for registers\n\
1305 -mno-regnames           Do not allow symbolic names for registers\n"));
1306 #ifdef OBJ_ELF
1307   fprintf (stream, _("\
1308 -mrelocatable           support for GCC's -mrelocatble option\n\
1309 -mrelocatable-lib       support for GCC's -mrelocatble-lib option\n\
1310 -memb                   set PPC_EMB bit in ELF flags\n\
1311 -mlittle, -mlittle-endian, -le\n\
1312                         generate code for a little endian machine\n\
1313 -mbig, -mbig-endian, -be\n\
1314                         generate code for a big endian machine\n\
1315 -msolaris               generate code for Solaris\n\
1316 -mno-solaris            do not generate code for Solaris\n\
1317 -K PIC                  set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1318 -V                      print assembler version number\n\
1319 -Qy, -Qn                ignored\n"));
1320 #endif
1321   fprintf (stream, _("\
1322 -nops=count             when aligning, more than COUNT nops uses a branch\n\
1323 -ppc476-workaround      warn if emitting data to code sections\n"));
1324 }
1325 
1326 /* Set ppc_cpu if it is not already set.  */
1327 
1328 static void
1329 ppc_set_cpu (void)
1330 {
1331   const char *default_os  = TARGET_OS;
1332   const char *default_cpu = TARGET_CPU;
1333 
1334   if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1335     {
1336       if (ppc_obj64)
1337 	ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1338       else if (strncmp (default_os, "aix", 3) == 0
1339 	       && default_os[3] >= '4' && default_os[3] <= '9')
1340 	ppc_cpu |= PPC_OPCODE_COMMON;
1341       else if (strncmp (default_os, "aix3", 4) == 0)
1342 	ppc_cpu |= PPC_OPCODE_POWER;
1343       else if (strcmp (default_cpu, "rs6000") == 0)
1344 	ppc_cpu |= PPC_OPCODE_POWER;
1345       else if (strncmp (default_cpu, "powerpc", 7) == 0)
1346 	ppc_cpu |= PPC_OPCODE_PPC;
1347       else
1348 	as_fatal (_("unknown default cpu = %s, os = %s"),
1349 		  default_cpu, default_os);
1350     }
1351 }
1352 
1353 /* Figure out the BFD architecture to use.  This function and ppc_mach
1354    are called well before md_begin, when the output file is opened.  */
1355 
1356 enum bfd_architecture
1357 ppc_arch (void)
1358 {
1359   const char *default_cpu = TARGET_CPU;
1360   ppc_set_cpu ();
1361 
1362   if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1363     return bfd_arch_powerpc;
1364   if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1365     return bfd_arch_powerpc;
1366   if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1367     return bfd_arch_rs6000;
1368   if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1369     {
1370       if (strcmp (default_cpu, "rs6000") == 0)
1371 	return bfd_arch_rs6000;
1372       else if (strncmp (default_cpu, "powerpc", 7) == 0)
1373 	return bfd_arch_powerpc;
1374     }
1375 
1376   as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1377   return bfd_arch_unknown;
1378 }
1379 
1380 unsigned long
1381 ppc_mach (void)
1382 {
1383   if (ppc_obj64)
1384     return bfd_mach_ppc64;
1385   else if (ppc_arch () == bfd_arch_rs6000)
1386     return bfd_mach_rs6k;
1387   else if (ppc_cpu & PPC_OPCODE_TITAN)
1388     return bfd_mach_ppc_titan;
1389   else if (ppc_cpu & PPC_OPCODE_VLE)
1390     return bfd_mach_ppc_vle;
1391   else
1392     return bfd_mach_ppc;
1393 }
1394 
1395 extern const char*
1396 ppc_target_format (void)
1397 {
1398 #ifdef OBJ_COFF
1399 #ifdef TE_PE
1400   return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1401 #elif TE_POWERMAC
1402   return "xcoff-powermac";
1403 #else
1404 #  ifdef TE_AIX5
1405   return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1406 #  else
1407   return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1408 #  endif
1409 #endif
1410 #endif
1411 #ifdef OBJ_ELF
1412 # ifdef TE_FreeBSD
1413   return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1414 # elif defined (TE_VXWORKS)
1415   return "elf32-powerpc-vxworks";
1416 # else
1417   return (target_big_endian
1418 	  ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1419 	  : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1420 # endif
1421 #endif
1422 }
1423 
1424 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1425    Return TRUE if there's a problem, otherwise FALSE.  */
1426 
1427 static bfd_boolean
1428 insn_validate (const struct powerpc_opcode *op)
1429 {
1430   const unsigned char *o;
1431   unsigned long omask = op->mask;
1432 
1433   /* The mask had better not trim off opcode bits.  */
1434   if ((op->opcode & omask) != op->opcode)
1435     {
1436       as_bad (_("mask trims opcode bits for %s"), op->name);
1437       return TRUE;
1438     }
1439 
1440   /* The operands must not overlap the opcode or each other.  */
1441   for (o = op->operands; *o; ++o)
1442     {
1443       if (*o >= num_powerpc_operands)
1444         {
1445 	  as_bad (_("operand index error for %s"), op->name);
1446 	  return TRUE;
1447         }
1448       else
1449         {
1450 	  const struct powerpc_operand *operand = &powerpc_operands[*o];
1451 	  if (operand->shift != (int) PPC_OPSHIFT_INV)
1452 	    {
1453 	      unsigned long mask;
1454 
1455 	      if (operand->shift >= 0)
1456 		mask = operand->bitm << operand->shift;
1457 	      else
1458 		mask = operand->bitm >> -operand->shift;
1459 	      if (omask & mask)
1460 		{
1461 		  as_bad (_("operand %d overlap in %s"),
1462 			  (int) (o - op->operands), op->name);
1463 		  return TRUE;
1464 		}
1465 	      omask |= mask;
1466 	    }
1467         }
1468     }
1469   return FALSE;
1470 }
1471 
1472 /* Insert opcodes and macros into hash tables.  Called at startup and
1473    for .machine pseudo.  */
1474 
1475 static void
1476 ppc_setup_opcodes (void)
1477 {
1478   const struct powerpc_opcode *op;
1479   const struct powerpc_opcode *op_end;
1480   const struct powerpc_macro *macro;
1481   const struct powerpc_macro *macro_end;
1482   bfd_boolean bad_insn = FALSE;
1483 
1484   if (ppc_hash != NULL)
1485     hash_die (ppc_hash);
1486   if (ppc_macro_hash != NULL)
1487     hash_die (ppc_macro_hash);
1488 
1489   /* Insert the opcodes into a hash table.  */
1490   ppc_hash = hash_new ();
1491 
1492   if (ENABLE_CHECKING)
1493     {
1494       unsigned int i;
1495 
1496       /* An index into powerpc_operands is stored in struct fix
1497 	 fx_pcrel_adjust which is 8 bits wide.  */
1498       gas_assert (num_powerpc_operands < 256);
1499 
1500       /* Check operand masks.  Code here and in the disassembler assumes
1501 	 all the 1's in the mask are contiguous.  */
1502       for (i = 0; i < num_powerpc_operands; ++i)
1503 	{
1504 	  unsigned long mask = powerpc_operands[i].bitm;
1505 	  unsigned long right_bit;
1506 	  unsigned int j;
1507 
1508 	  right_bit = mask & -mask;
1509 	  mask += right_bit;
1510 	  right_bit = mask & -mask;
1511 	  if (mask != right_bit)
1512 	    {
1513 	      as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1514 	      bad_insn = TRUE;
1515 	    }
1516 	  for (j = i + 1; j < num_powerpc_operands; ++j)
1517 	    if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1518 			sizeof (powerpc_operands[0])) == 0)
1519 	      {
1520 		as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1521 			j, i);
1522 		bad_insn = TRUE;
1523 	      }
1524 	}
1525     }
1526 
1527   op_end = powerpc_opcodes + powerpc_num_opcodes;
1528   for (op = powerpc_opcodes; op < op_end; op++)
1529     {
1530       if (ENABLE_CHECKING)
1531 	{
1532 	  if (op != powerpc_opcodes)
1533 	    {
1534 	      int old_opcode = PPC_OP (op[-1].opcode);
1535 	      int new_opcode = PPC_OP (op[0].opcode);
1536 
1537 #ifdef PRINT_OPCODE_TABLE
1538 	      printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1539 		      op->name, (unsigned int) (op - powerpc_opcodes),
1540 		      (unsigned int) new_opcode, (unsigned int) op->opcode,
1541 		      (unsigned int) op->mask, (unsigned long long) op->flags);
1542 #endif
1543 
1544 	      /* The major opcodes had better be sorted.  Code in the
1545 		 disassembler assumes the insns are sorted according to
1546 		 major opcode.  */
1547 	      if (new_opcode < old_opcode)
1548 		{
1549 		  as_bad (_("major opcode is not sorted for %s"),
1550 			  op->name);
1551 		  bad_insn = TRUE;
1552 		}
1553 	    }
1554 	  if ((op->flags & PPC_OPCODE_VLE) != 0)
1555 	    {
1556 	      as_bad (_("%s is enabled by vle flag"), op->name);
1557 	      bad_insn = TRUE;
1558 	    }
1559 	  if (PPC_OP (op->opcode) != 4
1560 	      && PPC_OP (op->opcode) != 31
1561 	      && (op->deprecated & PPC_OPCODE_VLE) == 0)
1562 	    {
1563 	      as_bad (_("%s not disabled by vle flag"), op->name);
1564 	      bad_insn = TRUE;
1565 	    }
1566 	  bad_insn |= insn_validate (op);
1567 	}
1568 
1569       if ((ppc_cpu & op->flags) != 0
1570 	  && !(ppc_cpu & op->deprecated))
1571 	{
1572 	  const char *retval;
1573 
1574 	  retval = hash_insert (ppc_hash, op->name, (void *) op);
1575 	  if (retval != NULL)
1576 	    {
1577 	      as_bad (_("duplicate instruction %s"),
1578 		      op->name);
1579 	      bad_insn = TRUE;
1580 	    }
1581 	}
1582     }
1583 
1584   if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1585     for (op = powerpc_opcodes; op < op_end; op++)
1586       hash_insert (ppc_hash, op->name, (void *) op);
1587 
1588   op_end = vle_opcodes + vle_num_opcodes;
1589   for (op = vle_opcodes; op < op_end; op++)
1590     {
1591       if (ENABLE_CHECKING)
1592 	{
1593 	  if (op != vle_opcodes)
1594 	    {
1595 	      unsigned old_seg, new_seg;
1596 
1597 	      old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1598 	      old_seg = VLE_OP_TO_SEG (old_seg);
1599 	      new_seg = VLE_OP (op[0].opcode, op[0].mask);
1600 	      new_seg = VLE_OP_TO_SEG (new_seg);
1601 
1602 #ifdef PRINT_OPCODE_TABLE
1603 	      printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1604 		      op->name, (unsigned int) (op - powerpc_opcodes),
1605 		      (unsigned int) new_seg, (unsigned int) op->opcode,
1606 		      (unsigned int) op->mask, (unsigned long long) op->flags);
1607 #endif
1608 	      /* The major opcodes had better be sorted.  Code in the
1609 		 disassembler assumes the insns are sorted according to
1610 		 major opcode.  */
1611 	      if (new_seg < old_seg)
1612 		{
1613 		  as_bad (_("major opcode is not sorted for %s"),
1614 			  op->name);
1615 		  bad_insn = TRUE;
1616 		}
1617 	    }
1618 
1619 	  bad_insn |= insn_validate (op);
1620 	}
1621 
1622       if ((ppc_cpu & op->flags) != 0
1623 	  && !(ppc_cpu & op->deprecated))
1624 	{
1625 	  const char *retval;
1626 
1627 	  retval = hash_insert (ppc_hash, op->name, (void *) op);
1628 	  if (retval != NULL)
1629 	    {
1630 	      as_bad (_("duplicate instruction %s"),
1631 		      op->name);
1632 	      bad_insn = TRUE;
1633 	    }
1634 	}
1635     }
1636 
1637   /* Insert the macros into a hash table.  */
1638   ppc_macro_hash = hash_new ();
1639 
1640   macro_end = powerpc_macros + powerpc_num_macros;
1641   for (macro = powerpc_macros; macro < macro_end; macro++)
1642     {
1643       if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1644 	{
1645 	  const char *retval;
1646 
1647 	  retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1648 	  if (retval != (const char *) NULL)
1649 	    {
1650 	      as_bad (_("duplicate macro %s"), macro->name);
1651 	      bad_insn = TRUE;
1652 	    }
1653 	}
1654     }
1655 
1656   if (bad_insn)
1657     abort ();
1658 }
1659 
1660 /* This function is called when the assembler starts up.  It is called
1661    after the options have been parsed and the output file has been
1662    opened.  */
1663 
1664 void
1665 md_begin (void)
1666 {
1667   ppc_set_cpu ();
1668 
1669   ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1670   ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1671 
1672 #ifdef OBJ_ELF
1673   /* Set the ELF flags if desired.  */
1674   if (ppc_flags && !msolaris)
1675     bfd_set_private_flags (stdoutput, ppc_flags);
1676 #endif
1677 
1678   ppc_setup_opcodes ();
1679 
1680   /* Tell the main code what the endianness is if it is not overridden
1681      by the user.  */
1682   if (!set_target_endian)
1683     {
1684       set_target_endian = 1;
1685       target_big_endian = PPC_BIG_ENDIAN;
1686     }
1687 
1688 #ifdef OBJ_XCOFF
1689   ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1690 
1691   /* Create dummy symbols to serve as initial csects.  This forces the
1692      text csects to precede the data csects.  These symbols will not
1693      be output.  */
1694   ppc_text_csects = symbol_make ("dummy\001");
1695   symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1696   ppc_data_csects = symbol_make ("dummy\001");
1697   symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1698 #endif
1699 
1700 #ifdef TE_PE
1701 
1702   ppc_current_section = text_section;
1703   ppc_previous_section = 0;
1704 
1705 #endif
1706 }
1707 
1708 void
1709 ppc_cleanup (void)
1710 {
1711 #ifdef OBJ_ELF
1712   if (ppc_apuinfo_list == NULL)
1713     return;
1714 
1715   /* Ok, so write the section info out.  We have this layout:
1716 
1717   byte	data		what
1718   ----	----		----
1719   0	8		length of "APUinfo\0"
1720   4	(n*4)		number of APU's (4 bytes each)
1721   8	2		note type 2
1722   12	"APUinfo\0"	name
1723   20	APU#1		first APU's info
1724   24	APU#2		second APU's info
1725   ...	...
1726   */
1727   {
1728     char *p;
1729     asection *seg = now_seg;
1730     subsegT subseg = now_subseg;
1731     asection *apuinfo_secp = (asection *) NULL;
1732     unsigned int i;
1733 
1734     /* Create the .PPC.EMB.apuinfo section.  */
1735     apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1736     bfd_set_section_flags (stdoutput,
1737 			   apuinfo_secp,
1738 			   SEC_HAS_CONTENTS | SEC_READONLY);
1739 
1740     p = frag_more (4);
1741     md_number_to_chars (p, (valueT) 8, 4);
1742 
1743     p = frag_more (4);
1744     md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1745 
1746     p = frag_more (4);
1747     md_number_to_chars (p, (valueT) 2, 4);
1748 
1749     p = frag_more (8);
1750     strcpy (p, APUINFO_LABEL);
1751 
1752     for (i = 0; i < ppc_apuinfo_num; i++)
1753       {
1754 	p = frag_more (4);
1755 	md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1756       }
1757 
1758     frag_align (2, 0, 0);
1759 
1760     /* We probably can't restore the current segment, for there likely
1761        isn't one yet...  */
1762     if (seg && subseg)
1763       subseg_set (seg, subseg);
1764   }
1765 #endif
1766 }
1767 
1768 /* Insert an operand value into an instruction.  */
1769 
1770 static unsigned long
1771 ppc_insert_operand (unsigned long insn,
1772 		    const struct powerpc_operand *operand,
1773 		    offsetT val,
1774 		    ppc_cpu_t cpu,
1775 		    const char *file,
1776 		    unsigned int line)
1777 {
1778   long min, max, right;
1779 
1780   max = operand->bitm;
1781   right = max & -max;
1782   min = 0;
1783 
1784   if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1785     {
1786       /* Extend the allowed range for addis to [-32768, 65535].
1787 	 Similarly for cmpli and some VLE high part insns.  For 64-bit
1788 	 it would be good to disable this for signed fields since the
1789 	 value is sign extended into the high 32 bits of the register.
1790 	 If the value is, say, an address, then we might care about
1791 	 the high bits.  However, gcc as of 2014-06 uses unsigned
1792 	 values when loading the high part of 64-bit constants using
1793 	 lis.  */
1794       min = ~(max >> 1) & -right;
1795     }
1796   else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1797     {
1798       max = (max >> 1) & -right;
1799       min = ~max & -right;
1800     }
1801 
1802   if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1803     max++;
1804 
1805   if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1806     {
1807       long tmp = min;
1808       min = -max;
1809       max = -tmp;
1810     }
1811 
1812   if (min <= max)
1813     {
1814       /* Some people write constants with the sign extension done by
1815 	 hand but only up to 32 bits.  This shouldn't really be valid,
1816 	 but, to permit this code to assemble on a 64-bit host, we
1817 	 sign extend the 32-bit value to 64 bits if so doing makes the
1818 	 value valid.  */
1819       if (val > max
1820 	  && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1821 	  && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1822 	  && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1823 	val = val - 0x80000000 - 0x80000000;
1824 
1825       /* Similarly, people write expressions like ~(1<<15), and expect
1826 	 this to be OK for a 32-bit unsigned value.  */
1827       else if (val < min
1828 	       && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1829 	       && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1830 	       && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1831 	val = val + 0x80000000 + 0x80000000;
1832 
1833       else if (val < min
1834 	       || val > max
1835 	       || (val & (right - 1)) != 0)
1836 	as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1837     }
1838 
1839   if (operand->insert)
1840     {
1841       const char *errmsg;
1842 
1843       errmsg = NULL;
1844       insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1845       if (errmsg != (const char *) NULL)
1846 	as_bad_where (file, line, "%s", errmsg);
1847     }
1848   else if (operand->shift >= 0)
1849     insn |= ((long) val & operand->bitm) << operand->shift;
1850   else
1851     insn |= ((long) val & operand->bitm) >> -operand->shift;
1852 
1853   return insn;
1854 }
1855 
1856 
1857 #ifdef OBJ_ELF
1858 /* Parse @got, etc. and return the desired relocation.  */
1859 static bfd_reloc_code_real_type
1860 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1861 {
1862   struct map_bfd {
1863     const char *string;
1864     unsigned int length : 8;
1865     unsigned int valid32 : 1;
1866     unsigned int valid64 : 1;
1867     unsigned int reloc;
1868   };
1869 
1870   char ident[20];
1871   char *str = *str_p;
1872   char *str2;
1873   int ch;
1874   int len;
1875   const struct map_bfd *ptr;
1876 
1877 #define MAP(str, reloc)   { str, sizeof (str) - 1, 1, 1, reloc }
1878 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1879 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1880 
1881   static const struct map_bfd mapping[] = {
1882     MAP ("l",			BFD_RELOC_LO16),
1883     MAP ("h",			BFD_RELOC_HI16),
1884     MAP ("ha",			BFD_RELOC_HI16_S),
1885     MAP ("brtaken",		BFD_RELOC_PPC_B16_BRTAKEN),
1886     MAP ("brntaken",		BFD_RELOC_PPC_B16_BRNTAKEN),
1887     MAP ("got",			BFD_RELOC_16_GOTOFF),
1888     MAP ("got@l",		BFD_RELOC_LO16_GOTOFF),
1889     MAP ("got@h",		BFD_RELOC_HI16_GOTOFF),
1890     MAP ("got@ha",		BFD_RELOC_HI16_S_GOTOFF),
1891     MAP ("plt@l",		BFD_RELOC_LO16_PLTOFF),
1892     MAP ("plt@h",		BFD_RELOC_HI16_PLTOFF),
1893     MAP ("plt@ha",		BFD_RELOC_HI16_S_PLTOFF),
1894     MAP ("copy",		BFD_RELOC_PPC_COPY),
1895     MAP ("globdat",		BFD_RELOC_PPC_GLOB_DAT),
1896     MAP ("sectoff",		BFD_RELOC_16_BASEREL),
1897     MAP ("sectoff@l",		BFD_RELOC_LO16_BASEREL),
1898     MAP ("sectoff@h",		BFD_RELOC_HI16_BASEREL),
1899     MAP ("sectoff@ha",		BFD_RELOC_HI16_S_BASEREL),
1900     MAP ("tls",			BFD_RELOC_PPC_TLS),
1901     MAP ("dtpmod",		BFD_RELOC_PPC_DTPMOD),
1902     MAP ("dtprel",		BFD_RELOC_PPC_DTPREL),
1903     MAP ("dtprel@l",		BFD_RELOC_PPC_DTPREL16_LO),
1904     MAP ("dtprel@h",		BFD_RELOC_PPC_DTPREL16_HI),
1905     MAP ("dtprel@ha",		BFD_RELOC_PPC_DTPREL16_HA),
1906     MAP ("tprel",		BFD_RELOC_PPC_TPREL),
1907     MAP ("tprel@l",		BFD_RELOC_PPC_TPREL16_LO),
1908     MAP ("tprel@h",		BFD_RELOC_PPC_TPREL16_HI),
1909     MAP ("tprel@ha",		BFD_RELOC_PPC_TPREL16_HA),
1910     MAP ("got@tlsgd",		BFD_RELOC_PPC_GOT_TLSGD16),
1911     MAP ("got@tlsgd@l",		BFD_RELOC_PPC_GOT_TLSGD16_LO),
1912     MAP ("got@tlsgd@h",		BFD_RELOC_PPC_GOT_TLSGD16_HI),
1913     MAP ("got@tlsgd@ha",	BFD_RELOC_PPC_GOT_TLSGD16_HA),
1914     MAP ("got@tlsld",		BFD_RELOC_PPC_GOT_TLSLD16),
1915     MAP ("got@tlsld@l",		BFD_RELOC_PPC_GOT_TLSLD16_LO),
1916     MAP ("got@tlsld@h",		BFD_RELOC_PPC_GOT_TLSLD16_HI),
1917     MAP ("got@tlsld@ha",	BFD_RELOC_PPC_GOT_TLSLD16_HA),
1918     MAP ("got@dtprel",		BFD_RELOC_PPC_GOT_DTPREL16),
1919     MAP ("got@dtprel@l",	BFD_RELOC_PPC_GOT_DTPREL16_LO),
1920     MAP ("got@dtprel@h",	BFD_RELOC_PPC_GOT_DTPREL16_HI),
1921     MAP ("got@dtprel@ha",	BFD_RELOC_PPC_GOT_DTPREL16_HA),
1922     MAP ("got@tprel",		BFD_RELOC_PPC_GOT_TPREL16),
1923     MAP ("got@tprel@l",		BFD_RELOC_PPC_GOT_TPREL16_LO),
1924     MAP ("got@tprel@h",		BFD_RELOC_PPC_GOT_TPREL16_HI),
1925     MAP ("got@tprel@ha",	BFD_RELOC_PPC_GOT_TPREL16_HA),
1926     MAP32 ("fixup",		BFD_RELOC_CTOR),
1927     MAP32 ("plt",		BFD_RELOC_24_PLT_PCREL),
1928     MAP32 ("pltrel24",		BFD_RELOC_24_PLT_PCREL),
1929     MAP32 ("local24pc",		BFD_RELOC_PPC_LOCAL24PC),
1930     MAP32 ("local",		BFD_RELOC_PPC_LOCAL24PC),
1931     MAP32 ("pltrel",		BFD_RELOC_32_PLT_PCREL),
1932     MAP32 ("sdarel",		BFD_RELOC_GPREL16),
1933     MAP32 ("sdarel@l",		BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1934     MAP32 ("sdarel@h",		BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1935     MAP32 ("sdarel@ha",		BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1936     MAP32 ("naddr",		BFD_RELOC_PPC_EMB_NADDR32),
1937     MAP32 ("naddr16",		BFD_RELOC_PPC_EMB_NADDR16),
1938     MAP32 ("naddr@l",		BFD_RELOC_PPC_EMB_NADDR16_LO),
1939     MAP32 ("naddr@h",		BFD_RELOC_PPC_EMB_NADDR16_HI),
1940     MAP32 ("naddr@ha",		BFD_RELOC_PPC_EMB_NADDR16_HA),
1941     MAP32 ("sdai16",		BFD_RELOC_PPC_EMB_SDAI16),
1942     MAP32 ("sda2rel",		BFD_RELOC_PPC_EMB_SDA2REL),
1943     MAP32 ("sda2i16",		BFD_RELOC_PPC_EMB_SDA2I16),
1944     MAP32 ("sda21",		BFD_RELOC_PPC_EMB_SDA21),
1945     MAP32 ("sda21@l",		BFD_RELOC_PPC_VLE_SDA21_LO),
1946     MAP32 ("mrkref",		BFD_RELOC_PPC_EMB_MRKREF),
1947     MAP32 ("relsect",		BFD_RELOC_PPC_EMB_RELSEC16),
1948     MAP32 ("relsect@l",		BFD_RELOC_PPC_EMB_RELST_LO),
1949     MAP32 ("relsect@h",		BFD_RELOC_PPC_EMB_RELST_HI),
1950     MAP32 ("relsect@ha",	BFD_RELOC_PPC_EMB_RELST_HA),
1951     MAP32 ("bitfld",		BFD_RELOC_PPC_EMB_BIT_FLD),
1952     MAP32 ("relsda",		BFD_RELOC_PPC_EMB_RELSDA),
1953     MAP32 ("xgot",		BFD_RELOC_PPC_TOC16),
1954     MAP64 ("high",		BFD_RELOC_PPC64_ADDR16_HIGH),
1955     MAP64 ("higha",		BFD_RELOC_PPC64_ADDR16_HIGHA),
1956     MAP64 ("higher",		BFD_RELOC_PPC64_HIGHER),
1957     MAP64 ("highera",		BFD_RELOC_PPC64_HIGHER_S),
1958     MAP64 ("highest",		BFD_RELOC_PPC64_HIGHEST),
1959     MAP64 ("highesta",		BFD_RELOC_PPC64_HIGHEST_S),
1960     MAP64 ("tocbase",		BFD_RELOC_PPC64_TOC),
1961     MAP64 ("toc",		BFD_RELOC_PPC_TOC16),
1962     MAP64 ("toc@l",		BFD_RELOC_PPC64_TOC16_LO),
1963     MAP64 ("toc@h",		BFD_RELOC_PPC64_TOC16_HI),
1964     MAP64 ("toc@ha",		BFD_RELOC_PPC64_TOC16_HA),
1965     MAP64 ("dtprel@high",	BFD_RELOC_PPC64_DTPREL16_HIGH),
1966     MAP64 ("dtprel@higha",	BFD_RELOC_PPC64_DTPREL16_HIGHA),
1967     MAP64 ("dtprel@higher",	BFD_RELOC_PPC64_DTPREL16_HIGHER),
1968     MAP64 ("dtprel@highera",	BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1969     MAP64 ("dtprel@highest",	BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1970     MAP64 ("dtprel@highesta",	BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1971     MAP64 ("localentry",	BFD_RELOC_PPC64_ADDR64_LOCAL),
1972     MAP64 ("tprel@high",	BFD_RELOC_PPC64_TPREL16_HIGH),
1973     MAP64 ("tprel@higha",	BFD_RELOC_PPC64_TPREL16_HIGHA),
1974     MAP64 ("tprel@higher",	BFD_RELOC_PPC64_TPREL16_HIGHER),
1975     MAP64 ("tprel@highera",	BFD_RELOC_PPC64_TPREL16_HIGHERA),
1976     MAP64 ("tprel@highest",	BFD_RELOC_PPC64_TPREL16_HIGHEST),
1977     MAP64 ("tprel@highesta",	BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1978     { (char *) 0, 0, 0, 0,	BFD_RELOC_NONE }
1979   };
1980 
1981   if (*str++ != '@')
1982     return BFD_RELOC_NONE;
1983 
1984   for (ch = *str, str2 = ident;
1985        (str2 < ident + sizeof (ident) - 1
1986 	&& (ISALNUM (ch) || ch == '@'));
1987        ch = *++str)
1988     {
1989       *str2++ = TOLOWER (ch);
1990     }
1991 
1992   *str2 = '\0';
1993   len = str2 - ident;
1994 
1995   ch = ident[0];
1996   for (ptr = &mapping[0]; ptr->length > 0; ptr++)
1997     if (ch == ptr->string[0]
1998 	&& len == ptr->length
1999 	&& memcmp (ident, ptr->string, ptr->length) == 0
2000 	&& (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2001       {
2002 	int reloc = ptr->reloc;
2003 
2004 	if (!ppc_obj64 && exp_p->X_add_number != 0)
2005 	  {
2006 	    switch (reloc)
2007 	      {
2008 	      case BFD_RELOC_16_GOTOFF:
2009 	      case BFD_RELOC_LO16_GOTOFF:
2010 	      case BFD_RELOC_HI16_GOTOFF:
2011 	      case BFD_RELOC_HI16_S_GOTOFF:
2012 		as_warn (_("identifier+constant@got means "
2013 			   "identifier@got+constant"));
2014 		break;
2015 
2016 	      case BFD_RELOC_PPC_GOT_TLSGD16:
2017 	      case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2018 	      case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2019 	      case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2020 	      case BFD_RELOC_PPC_GOT_TLSLD16:
2021 	      case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2022 	      case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2023 	      case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2024 	      case BFD_RELOC_PPC_GOT_DTPREL16:
2025 	      case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2026 	      case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2027 	      case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2028 	      case BFD_RELOC_PPC_GOT_TPREL16:
2029 	      case BFD_RELOC_PPC_GOT_TPREL16_LO:
2030 	      case BFD_RELOC_PPC_GOT_TPREL16_HI:
2031 	      case BFD_RELOC_PPC_GOT_TPREL16_HA:
2032 		as_bad (_("symbol+offset not supported for got tls"));
2033 		break;
2034 	      }
2035 	  }
2036 
2037 	/* Now check for identifier@suffix+constant.  */
2038 	if (*str == '-' || *str == '+')
2039 	  {
2040 	    char *orig_line = input_line_pointer;
2041 	    expressionS new_exp;
2042 
2043 	    input_line_pointer = str;
2044 	    expression (&new_exp);
2045 	    if (new_exp.X_op == O_constant)
2046 	      {
2047 		exp_p->X_add_number += new_exp.X_add_number;
2048 		str = input_line_pointer;
2049 	      }
2050 
2051 	    if (&input_line_pointer != str_p)
2052 	      input_line_pointer = orig_line;
2053 	  }
2054 	*str_p = str;
2055 
2056 	if (reloc == (int) BFD_RELOC_PPC64_TOC
2057 	    && exp_p->X_op == O_symbol
2058 	    && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2059 	  {
2060 	    /* Change the symbol so that the dummy .TOC. symbol can be
2061 	       omitted from the object file.  */
2062 	    exp_p->X_add_symbol = &abs_symbol;
2063 	  }
2064 
2065 	return (bfd_reloc_code_real_type) reloc;
2066       }
2067 
2068   return BFD_RELOC_NONE;
2069 }
2070 
2071 /* Support @got, etc. on constants emitted via .short, .int etc.  */
2072 
2073 bfd_reloc_code_real_type
2074 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2075 {
2076   expression (exp);
2077   if (nbytes >= 2 && *input_line_pointer == '@')
2078     return ppc_elf_suffix (&input_line_pointer, exp);
2079   return BFD_RELOC_NONE;
2080 }
2081 
2082 /* Warn when emitting data to code sections, unless we are emitting
2083    a relocation that ld --ppc476-workaround uses to recognise data
2084    *and* there was an unconditional branch prior to the data.  */
2085 
2086 void
2087 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2088 			unsigned int nbytes, fixS *fix)
2089 {
2090   if (warn_476
2091       && (now_seg->flags & SEC_CODE) != 0
2092       && (nbytes != 4
2093 	  || fix == NULL
2094 	  || !(fix->fx_r_type == BFD_RELOC_32
2095 	       || fix->fx_r_type == BFD_RELOC_CTOR
2096 	       || fix->fx_r_type == BFD_RELOC_32_PCREL)
2097 	  || !(last_seg == now_seg && last_subseg == now_subseg)
2098 	  || !((last_insn & (0x3f << 26)) == (18u << 26)
2099 	       || ((last_insn & (0x3f << 26)) == (16u << 26)
2100 		   && (last_insn & (0x14 << 21)) == (0x14 << 21))
2101 	       || ((last_insn & (0x3f << 26)) == (19u << 26)
2102 		   && (last_insn & (0x3ff << 1)) == (16u << 1)
2103 		   && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2104     {
2105       /* Flag that we've warned.  */
2106       if (fix != NULL)
2107 	fix->fx_tcbit = 1;
2108 
2109       as_warn (_("data in executable section"));
2110     }
2111 }
2112 
2113 /* Solaris pseduo op to change to the .rodata section.  */
2114 static void
2115 ppc_elf_rdata (int xxx)
2116 {
2117   char *save_line = input_line_pointer;
2118   static char section[] = ".rodata\n";
2119 
2120   /* Just pretend this is .section .rodata  */
2121   input_line_pointer = section;
2122   obj_elf_section (xxx);
2123 
2124   input_line_pointer = save_line;
2125 }
2126 
2127 /* Pseudo op to make file scope bss items.  */
2128 static void
2129 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2130 {
2131   char *name;
2132   char c;
2133   char *p;
2134   offsetT size;
2135   symbolS *symbolP;
2136   offsetT align;
2137   segT old_sec;
2138   int old_subsec;
2139   char *pfrag;
2140   int align2;
2141 
2142   c = get_symbol_name (&name);
2143 
2144   /* Just after name is now '\0'.  */
2145   p = input_line_pointer;
2146   *p = c;
2147   SKIP_WHITESPACE_AFTER_NAME ();
2148   if (*input_line_pointer != ',')
2149     {
2150       as_bad (_("expected comma after symbol-name: rest of line ignored."));
2151       ignore_rest_of_line ();
2152       return;
2153     }
2154 
2155   input_line_pointer++;		/* skip ',' */
2156   if ((size = get_absolute_expression ()) < 0)
2157     {
2158       as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2159       ignore_rest_of_line ();
2160       return;
2161     }
2162 
2163   /* The third argument to .lcomm is the alignment.  */
2164   if (*input_line_pointer != ',')
2165     align = 8;
2166   else
2167     {
2168       ++input_line_pointer;
2169       align = get_absolute_expression ();
2170       if (align <= 0)
2171 	{
2172 	  as_warn (_("ignoring bad alignment"));
2173 	  align = 8;
2174 	}
2175     }
2176 
2177   *p = 0;
2178   symbolP = symbol_find_or_make (name);
2179   *p = c;
2180 
2181   if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2182     {
2183       as_bad (_("ignoring attempt to re-define symbol `%s'."),
2184 	      S_GET_NAME (symbolP));
2185       ignore_rest_of_line ();
2186       return;
2187     }
2188 
2189   if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2190     {
2191       as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2192 	      S_GET_NAME (symbolP),
2193 	      (long) S_GET_VALUE (symbolP),
2194 	      (long) size);
2195 
2196       ignore_rest_of_line ();
2197       return;
2198     }
2199 
2200   /* Allocate_bss.  */
2201   old_sec = now_seg;
2202   old_subsec = now_subseg;
2203   if (align)
2204     {
2205       /* Convert to a power of 2 alignment.  */
2206       for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2207       if (align != 1)
2208 	{
2209 	  as_bad (_("common alignment not a power of 2"));
2210 	  ignore_rest_of_line ();
2211 	  return;
2212 	}
2213     }
2214   else
2215     align2 = 0;
2216 
2217   record_alignment (bss_section, align2);
2218   subseg_set (bss_section, 1);
2219   if (align2)
2220     frag_align (align2, 0, 0);
2221   if (S_GET_SEGMENT (symbolP) == bss_section)
2222     symbol_get_frag (symbolP)->fr_symbol = 0;
2223   symbol_set_frag (symbolP, frag_now);
2224   pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2225 		    (char *) 0);
2226   *pfrag = 0;
2227   S_SET_SIZE (symbolP, size);
2228   S_SET_SEGMENT (symbolP, bss_section);
2229   subseg_set (old_sec, old_subsec);
2230   demand_empty_rest_of_line ();
2231 }
2232 
2233 /* Pseudo op to set symbol local entry point.  */
2234 static void
2235 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2236 {
2237   char *name;
2238   char c = get_symbol_name (&name);
2239   char *p;
2240   expressionS exp;
2241   symbolS *sym;
2242   asymbol *bfdsym;
2243   elf_symbol_type *elfsym;
2244 
2245   p = input_line_pointer;
2246   *p = c;
2247   SKIP_WHITESPACE_AFTER_NAME ();
2248   if (*input_line_pointer != ',')
2249     {
2250       *p = 0;
2251       as_bad (_("expected comma after name `%s' in .localentry directive"),
2252 	      name);
2253       *p = c;
2254       ignore_rest_of_line ();
2255       return;
2256     }
2257   input_line_pointer++;
2258   expression (&exp);
2259   if (exp.X_op == O_absent)
2260     {
2261       as_bad (_("missing expression in .localentry directive"));
2262       exp.X_op = O_constant;
2263       exp.X_add_number = 0;
2264     }
2265   *p = 0;
2266   sym = symbol_find_or_make (name);
2267   *p = c;
2268 
2269   if (resolve_expression (&exp)
2270       && exp.X_op == O_constant)
2271     {
2272       unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2273 
2274       if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2275         as_bad (_(".localentry expression for `%s' "
2276 		  "is not a valid power of 2"), S_GET_NAME (sym));
2277       else
2278 	{
2279 	  bfdsym = symbol_get_bfdsym (sym);
2280 	  elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2281 	  gas_assert (elfsym);
2282 	  elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2283 	  elfsym->internal_elf_sym.st_other |= encoded;
2284 	  if (ppc_abiversion == 0)
2285 	    ppc_abiversion = 2;
2286 	}
2287     }
2288   else
2289     as_bad (_(".localentry expression for `%s' "
2290 	      "does not evaluate to a constant"), S_GET_NAME (sym));
2291 
2292   demand_empty_rest_of_line ();
2293 }
2294 
2295 /* Pseudo op to set ABI version.  */
2296 static void
2297 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2298 {
2299   expressionS exp;
2300 
2301   expression (&exp);
2302   if (exp.X_op == O_absent)
2303     {
2304       as_bad (_("missing expression in .abiversion directive"));
2305       exp.X_op = O_constant;
2306       exp.X_add_number = 0;
2307     }
2308 
2309   if (resolve_expression (&exp)
2310       && exp.X_op == O_constant)
2311     ppc_abiversion = exp.X_add_number;
2312   else
2313     as_bad (_(".abiversion expression does not evaluate to a constant"));
2314   demand_empty_rest_of_line ();
2315 }
2316 
2317 /* Set ABI version in output file.  */
2318 void
2319 ppc_elf_end (void)
2320 {
2321   if (ppc_obj64 && ppc_abiversion != 0)
2322     {
2323       elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2324       elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2325     }
2326 }
2327 
2328 /* Validate any relocations emitted for -mrelocatable, possibly adding
2329    fixups for word relocations in writable segments, so we can adjust
2330    them at runtime.  */
2331 static void
2332 ppc_elf_validate_fix (fixS *fixp, segT seg)
2333 {
2334   if (fixp->fx_done || fixp->fx_pcrel)
2335     return;
2336 
2337   switch (shlib)
2338     {
2339     case SHLIB_NONE:
2340     case SHLIB_PIC:
2341       return;
2342 
2343     case SHLIB_MRELOCATABLE:
2344       if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2345 	  && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2346 	  && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2347 	  && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2348 	  && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2349 	  && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2350 	  && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2351 	  && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2352 	  && (seg->flags & SEC_LOAD) != 0
2353 	  && strcmp (segment_name (seg), ".got2") != 0
2354 	  && strcmp (segment_name (seg), ".dtors") != 0
2355 	  && strcmp (segment_name (seg), ".ctors") != 0
2356 	  && strcmp (segment_name (seg), ".fixup") != 0
2357 	  && strcmp (segment_name (seg), ".gcc_except_table") != 0
2358 	  && strcmp (segment_name (seg), ".eh_frame") != 0
2359 	  && strcmp (segment_name (seg), ".ex_shared") != 0)
2360 	{
2361 	  if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2362 	      || fixp->fx_r_type != BFD_RELOC_CTOR)
2363 	    {
2364 	      as_bad_where (fixp->fx_file, fixp->fx_line,
2365 			    _("relocation cannot be done when using -mrelocatable"));
2366 	    }
2367 	}
2368       return;
2369     }
2370 }
2371 
2372 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2373    function descriptor sym if the corresponding code sym is used.  */
2374 
2375 void
2376 ppc_frob_file_before_adjust (void)
2377 {
2378   symbolS *symp;
2379   asection *toc;
2380 
2381   if (!ppc_obj64)
2382     return;
2383 
2384   for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2385     {
2386       const char *name;
2387       char *dotname;
2388       symbolS *dotsym;
2389 
2390       name = S_GET_NAME (symp);
2391       if (name[0] == '.')
2392 	continue;
2393 
2394       if (! S_IS_WEAK (symp)
2395 	  || S_IS_DEFINED (symp))
2396 	continue;
2397 
2398       dotname = concat (".", name, (char *) NULL);
2399       dotsym = symbol_find_noref (dotname, 1);
2400       free (dotname);
2401       if (dotsym != NULL && (symbol_used_p (dotsym)
2402 			     || symbol_used_in_reloc_p (dotsym)))
2403 	symbol_mark_used (symp);
2404 
2405     }
2406 
2407   toc = bfd_get_section_by_name (stdoutput, ".toc");
2408   if (toc != NULL
2409       && toc_reloc_types != has_large_toc_reloc
2410       && bfd_section_size (stdoutput, toc) > 0x10000)
2411     as_warn (_("TOC section size exceeds 64k"));
2412 }
2413 
2414 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2415    emitted.  Other uses of .TOC. will cause the symbol to be marked
2416    with BSF_KEEP in md_apply_fix.  */
2417 
2418 void
2419 ppc_elf_adjust_symtab (void)
2420 {
2421   if (ppc_obj64)
2422     {
2423       symbolS *symp;
2424       symp = symbol_find (".TOC.");
2425       if (symp != NULL)
2426 	{
2427 	  asymbol *bsym = symbol_get_bfdsym (symp);
2428 	  if ((bsym->flags & BSF_KEEP) == 0)
2429 	    symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2430 	}
2431     }
2432 }
2433 #endif /* OBJ_ELF */
2434 
2435 #ifdef TE_PE
2436 
2437 /*
2438  * Summary of parse_toc_entry.
2439  *
2440  * in:	Input_line_pointer points to the '[' in one of:
2441  *
2442  *        [toc] [tocv] [toc32] [toc64]
2443  *
2444  *      Anything else is an error of one kind or another.
2445  *
2446  * out:
2447  *   return value: success or failure
2448  *   toc_kind:     kind of toc reference
2449  *   input_line_pointer:
2450  *     success: first char after the ']'
2451  *     failure: unchanged
2452  *
2453  * settings:
2454  *
2455  *     [toc]   - rv == success, toc_kind = default_toc
2456  *     [tocv]  - rv == success, toc_kind = data_in_toc
2457  *     [toc32] - rv == success, toc_kind = must_be_32
2458  *     [toc64] - rv == success, toc_kind = must_be_64
2459  *
2460  */
2461 
2462 enum toc_size_qualifier
2463 {
2464   default_toc, /* The toc cell constructed should be the system default size */
2465   data_in_toc, /* This is a direct reference to a toc cell                   */
2466   must_be_32,  /* The toc cell constructed must be 32 bits wide              */
2467   must_be_64   /* The toc cell constructed must be 64 bits wide              */
2468 };
2469 
2470 static int
2471 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2472 {
2473   char *start;
2474   char *toc_spec;
2475   char c;
2476   enum toc_size_qualifier t;
2477 
2478   /* Save the input_line_pointer.  */
2479   start = input_line_pointer;
2480 
2481   /* Skip over the '[' , and whitespace.  */
2482   ++input_line_pointer;
2483   SKIP_WHITESPACE ();
2484 
2485   /* Find the spelling of the operand.  */
2486   c = get_symbol_name (&toc_spec);
2487 
2488   if (strcmp (toc_spec, "toc") == 0)
2489     {
2490       t = default_toc;
2491     }
2492   else if (strcmp (toc_spec, "tocv") == 0)
2493     {
2494       t = data_in_toc;
2495     }
2496   else if (strcmp (toc_spec, "toc32") == 0)
2497     {
2498       t = must_be_32;
2499     }
2500   else if (strcmp (toc_spec, "toc64") == 0)
2501     {
2502       t = must_be_64;
2503     }
2504   else
2505     {
2506       as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2507       *input_line_pointer = c;
2508       input_line_pointer = start;
2509       return 0;
2510     }
2511 
2512   /* Now find the ']'.  */
2513   *input_line_pointer = c;
2514 
2515   SKIP_WHITESPACE_AFTER_NAME ();	/* leading whitespace could be there.  */
2516   c = *input_line_pointer++; /* input_line_pointer->past char in c.  */
2517 
2518   if (c != ']')
2519     {
2520       as_bad (_("syntax error: expected `]', found  `%c'"), c);
2521       input_line_pointer = start;
2522       return 0;
2523     }
2524 
2525   *toc_kind = t;
2526   return 1;
2527 }
2528 #endif
2529 
2530 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2531 /* See whether a symbol is in the TOC section.  */
2532 
2533 static int
2534 ppc_is_toc_sym (symbolS *sym)
2535 {
2536 #ifdef OBJ_XCOFF
2537   return (symbol_get_tc (sym)->symbol_class == XMC_TC
2538 	  || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2539 #endif
2540 #ifdef OBJ_ELF
2541   const char *sname = segment_name (S_GET_SEGMENT (sym));
2542   if (ppc_obj64)
2543     return strcmp (sname, ".toc") == 0;
2544   else
2545     return strcmp (sname, ".got") == 0;
2546 #endif
2547 }
2548 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2549 
2550 
2551 #ifdef OBJ_ELF
2552 #define APUID(a,v)	((((a) & 0xffff) << 16) | ((v) & 0xffff))
2553 static void
2554 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2555 {
2556   unsigned int i;
2557 
2558   /* Check we don't already exist.  */
2559   for (i = 0; i < ppc_apuinfo_num; i++)
2560     if (ppc_apuinfo_list[i] == APUID (apu, version))
2561       return;
2562 
2563   if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2564     {
2565       if (ppc_apuinfo_num_alloc == 0)
2566 	{
2567 	  ppc_apuinfo_num_alloc = 4;
2568 	  ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2569 	}
2570       else
2571 	{
2572 	  ppc_apuinfo_num_alloc += 4;
2573 	  ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2574 					 ppc_apuinfo_num_alloc);
2575 	}
2576     }
2577   ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2578 }
2579 #undef APUID
2580 #endif
2581 
2582 
2583 /* We need to keep a list of fixups.  We can't simply generate them as
2584    we go, because that would require us to first create the frag, and
2585    that would screw up references to ``.''.  */
2586 
2587 struct ppc_fixup
2588 {
2589   expressionS exp;
2590   int opindex;
2591   bfd_reloc_code_real_type reloc;
2592 };
2593 
2594 #define MAX_INSN_FIXUPS (5)
2595 
2596 /* Form I16L.  */
2597 #define E_OR2I_INSN		0x7000C000
2598 #define E_AND2I_DOT_INSN	0x7000C800
2599 #define E_OR2IS_INSN		0x7000D000
2600 #define E_LIS_INSN		0x7000E000
2601 #define	E_AND2IS_DOT_INSN	0x7000E800
2602 
2603 /* Form I16A.  */
2604 #define E_ADD2I_DOT_INSN	0x70008800
2605 #define E_ADD2IS_INSN		0x70009000
2606 #define E_CMP16I_INSN		0x70009800
2607 #define E_MULL2I_INSN		0x7000A000
2608 #define E_CMPL16I_INSN		0x7000A800
2609 #define E_CMPH16I_INSN		0x7000B000
2610 #define E_CMPHL16I_INSN		0x7000B800
2611 
2612 /* This routine is called for each instruction to be assembled.  */
2613 
2614 void
2615 md_assemble (char *str)
2616 {
2617   char *s;
2618   const struct powerpc_opcode *opcode;
2619   unsigned long insn;
2620   const unsigned char *opindex_ptr;
2621   int skip_optional;
2622   int need_paren;
2623   int next_opindex;
2624   struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2625   int fc;
2626   char *f;
2627   int addr_mod;
2628   int i;
2629   unsigned int insn_length;
2630 
2631   /* Get the opcode.  */
2632   for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2633     ;
2634   if (*s != '\0')
2635     *s++ = '\0';
2636 
2637   /* Look up the opcode in the hash table.  */
2638   opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2639   if (opcode == (const struct powerpc_opcode *) NULL)
2640     {
2641       const struct powerpc_macro *macro;
2642 
2643       macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2644       if (macro == (const struct powerpc_macro *) NULL)
2645 	as_bad (_("unrecognized opcode: `%s'"), str);
2646       else
2647 	ppc_macro (s, macro);
2648 
2649       return;
2650     }
2651 
2652   insn = opcode->opcode;
2653 
2654   str = s;
2655   while (ISSPACE (*str))
2656     ++str;
2657 
2658   /* PowerPC operands are just expressions.  The only real issue is
2659      that a few operand types are optional.  All cases which might use
2660      an optional operand separate the operands only with commas (in some
2661      cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2662      have optional operands).  Most instructions with optional operands
2663      have only one.  Those that have more than one optional operand can
2664      take either all their operands or none.  So, before we start seriously
2665      parsing the operands, we check to see if we have optional operands,
2666      and if we do, we count the number of commas to see which operands
2667      have been omitted.  */
2668   skip_optional = 0;
2669   for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2670     {
2671       const struct powerpc_operand *operand;
2672 
2673       operand = &powerpc_operands[*opindex_ptr];
2674       if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2675 	{
2676 	  unsigned int opcount;
2677 	  unsigned int num_operands_expected;
2678 
2679 	  /* There is an optional operand.  Count the number of
2680 	     commas in the input line.  */
2681 	  if (*str == '\0')
2682 	    opcount = 0;
2683 	  else
2684 	    {
2685 	      opcount = 1;
2686 	      s = str;
2687 	      while ((s = strchr (s, ',')) != (char *) NULL)
2688 		{
2689 		  ++opcount;
2690 		  ++s;
2691 		}
2692 	    }
2693 
2694 	  /* Compute the number of expected operands.
2695 	     Do not count fake operands.  */
2696 	  for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2697 	    if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2698 	      ++ num_operands_expected;
2699 
2700 	  /* If there are fewer operands in the line then are called
2701 	     for by the instruction, we want to skip the optional
2702 	     operands.  */
2703 	  if (opcount < num_operands_expected)
2704 	    skip_optional = 1;
2705 
2706 	  break;
2707 	}
2708     }
2709 
2710   /* Gather the operands.  */
2711   need_paren = 0;
2712   next_opindex = 0;
2713   fc = 0;
2714   for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2715     {
2716       const struct powerpc_operand *operand;
2717       const char *errmsg;
2718       char *hold;
2719       expressionS ex;
2720       char endc;
2721 
2722       if (next_opindex == 0)
2723 	operand = &powerpc_operands[*opindex_ptr];
2724       else
2725 	{
2726 	  operand = &powerpc_operands[next_opindex];
2727 	  next_opindex = 0;
2728 	}
2729       errmsg = NULL;
2730 
2731       /* If this is a fake operand, then we do not expect anything
2732 	 from the input.  */
2733       if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2734 	{
2735 	  insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2736 	  if (errmsg != (const char *) NULL)
2737 	    as_bad ("%s", errmsg);
2738 	  continue;
2739 	}
2740 
2741       /* If this is an optional operand, and we are skipping it, just
2742 	 insert a zero.  */
2743       if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2744 	  && skip_optional)
2745 	{
2746 	  long val = ppc_optional_operand_value (operand);
2747 	  if (operand->insert)
2748 	    {
2749 	      insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2750 	      if (errmsg != (const char *) NULL)
2751 		as_bad ("%s", errmsg);
2752 	    }
2753 	  else if (operand->shift >= 0)
2754 	    insn |= ((long) val & operand->bitm) << operand->shift;
2755 	  else
2756 	    insn |= ((long) val & operand->bitm) >> -operand->shift;
2757 
2758 	  if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2759 	    next_opindex = *opindex_ptr + 1;
2760 	  continue;
2761 	}
2762 
2763       /* Gather the operand.  */
2764       hold = input_line_pointer;
2765       input_line_pointer = str;
2766 
2767 #ifdef TE_PE
2768       if (*input_line_pointer == '[')
2769 	{
2770 	  /* We are expecting something like the second argument here:
2771 	   *
2772 	   *    lwz r4,[toc].GS.0.static_int(rtoc)
2773 	   *           ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2774 	   * The argument following the `]' must be a symbol name, and the
2775 	   * register must be the toc register: 'rtoc' or '2'
2776 	   *
2777 	   * The effect is to 0 as the displacement field
2778 	   * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2779 	   * the appropriate variation) reloc against it based on the symbol.
2780 	   * The linker will build the toc, and insert the resolved toc offset.
2781 	   *
2782 	   * Note:
2783 	   * o The size of the toc entry is currently assumed to be
2784 	   *   32 bits. This should not be assumed to be a hard coded
2785 	   *   number.
2786 	   * o In an effort to cope with a change from 32 to 64 bits,
2787 	   *   there are also toc entries that are specified to be
2788 	   *   either 32 or 64 bits:
2789 	   *     lwz r4,[toc32].GS.0.static_int(rtoc)
2790 	   *     lwz r4,[toc64].GS.0.static_int(rtoc)
2791 	   *   These demand toc entries of the specified size, and the
2792 	   *   instruction probably requires it.
2793 	   */
2794 
2795 	  int valid_toc;
2796 	  enum toc_size_qualifier toc_kind;
2797 	  bfd_reloc_code_real_type toc_reloc;
2798 
2799 	  /* Go parse off the [tocXX] part.  */
2800 	  valid_toc = parse_toc_entry (&toc_kind);
2801 
2802 	  if (!valid_toc)
2803 	    {
2804 	      ignore_rest_of_line ();
2805 	      break;
2806 	    }
2807 
2808 	  /* Now get the symbol following the ']'.  */
2809 	  expression (&ex);
2810 
2811 	  switch (toc_kind)
2812 	    {
2813 	    case default_toc:
2814 	      /* In this case, we may not have seen the symbol yet,
2815 		 since  it is allowed to appear on a .extern or .globl
2816 		 or just be a label in the .data section.  */
2817 	      toc_reloc = BFD_RELOC_PPC_TOC16;
2818 	      break;
2819 	    case data_in_toc:
2820 	      /* 1. The symbol must be defined and either in the toc
2821 		 section, or a global.
2822 		 2. The reloc generated must have the TOCDEFN flag set
2823 		 in upper bit mess of the reloc type.
2824 		 FIXME: It's a little confusing what the tocv
2825 		 qualifier can be used for.  At the very least, I've
2826 		 seen three uses, only one of which I'm sure I can
2827 		 explain.  */
2828 	      if (ex.X_op == O_symbol)
2829 		{
2830 		  gas_assert (ex.X_add_symbol != NULL);
2831 		  if (symbol_get_bfdsym (ex.X_add_symbol)->section
2832 		      != tocdata_section)
2833 		    {
2834 		      as_bad (_("[tocv] symbol is not a toc symbol"));
2835 		    }
2836 		}
2837 
2838 	      toc_reloc = BFD_RELOC_PPC_TOC16;
2839 	      break;
2840 	    case must_be_32:
2841 	      /* FIXME: these next two specifically specify 32/64 bit
2842 		 toc entries.  We don't support them today.  Is this
2843 		 the right way to say that?  */
2844 	      toc_reloc = BFD_RELOC_NONE;
2845 	      as_bad (_("unimplemented toc32 expression modifier"));
2846 	      break;
2847 	    case must_be_64:
2848 	      /* FIXME: see above.  */
2849 	      toc_reloc = BFD_RELOC_NONE;
2850 	      as_bad (_("unimplemented toc64 expression modifier"));
2851 	      break;
2852 	    default:
2853 	      fprintf (stderr,
2854 		       _("Unexpected return value [%d] from parse_toc_entry!\n"),
2855 		       toc_kind);
2856 	      abort ();
2857 	      break;
2858 	    }
2859 
2860 	  /* We need to generate a fixup for this expression.  */
2861 	  if (fc >= MAX_INSN_FIXUPS)
2862 	    as_fatal (_("too many fixups"));
2863 
2864 	  fixups[fc].reloc = toc_reloc;
2865 	  fixups[fc].exp = ex;
2866 	  fixups[fc].opindex = *opindex_ptr;
2867 	  ++fc;
2868 
2869 	  /* Ok. We've set up the fixup for the instruction. Now make it
2870 	     look like the constant 0 was found here.  */
2871 	  ex.X_unsigned = 1;
2872 	  ex.X_op = O_constant;
2873 	  ex.X_add_number = 0;
2874 	  ex.X_add_symbol = NULL;
2875 	  ex.X_op_symbol = NULL;
2876 	}
2877 
2878       else
2879 #endif		/* TE_PE */
2880 	{
2881 	  if ((reg_names_p
2882                && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2883 		   || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2884 	      || !register_name (&ex))
2885 	    {
2886 	      char save_lex = lex_type['%'];
2887 
2888 	      if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2889 		  || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2890 		{
2891 		  cr_operand = TRUE;
2892 		  lex_type['%'] |= LEX_BEGIN_NAME;
2893 		}
2894 	      expression (&ex);
2895 	      cr_operand = FALSE;
2896 	      lex_type['%'] = save_lex;
2897 	    }
2898 	}
2899 
2900       str = input_line_pointer;
2901       input_line_pointer = hold;
2902 
2903       if (ex.X_op == O_illegal)
2904 	as_bad (_("illegal operand"));
2905       else if (ex.X_op == O_absent)
2906 	as_bad (_("missing operand"));
2907       else if (ex.X_op == O_register)
2908 	{
2909 	  insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2910 				     ppc_cpu, (char *) NULL, 0);
2911 	}
2912       else if (ex.X_op == O_constant)
2913 	{
2914 #ifdef OBJ_ELF
2915 	  /* Allow @HA, @L, @H on constants.  */
2916 	  bfd_reloc_code_real_type reloc;
2917 	  char *orig_str = str;
2918 
2919 	  if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
2920 	    switch (reloc)
2921 	      {
2922 	      default:
2923 		str = orig_str;
2924 		break;
2925 
2926 	      case BFD_RELOC_LO16:
2927 		ex.X_add_number &= 0xffff;
2928 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2929 		  ex.X_add_number = SEX16 (ex.X_add_number);
2930 		break;
2931 
2932 	      case BFD_RELOC_HI16:
2933 		if (REPORT_OVERFLOW_HI && ppc_obj64)
2934 		  {
2935 		    /* PowerPC64 @h is tested for overflow.  */
2936 		    ex.X_add_number = (addressT) ex.X_add_number >> 16;
2937 		    if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2938 		      {
2939 			addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2940 			ex.X_add_number
2941 			  = ((addressT) ex.X_add_number ^ sign) - sign;
2942 		      }
2943 		    break;
2944 		  }
2945 		/* Fall thru */
2946 
2947 	      case BFD_RELOC_PPC64_ADDR16_HIGH:
2948 		ex.X_add_number = PPC_HI (ex.X_add_number);
2949 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2950 		  ex.X_add_number = SEX16 (ex.X_add_number);
2951 		break;
2952 
2953 	      case BFD_RELOC_HI16_S:
2954 		if (REPORT_OVERFLOW_HI && ppc_obj64)
2955 		  {
2956 		    /* PowerPC64 @ha is tested for overflow.  */
2957 		    ex.X_add_number
2958 		      = ((addressT) ex.X_add_number + 0x8000) >> 16;
2959 		    if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2960 		      {
2961 			addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2962 			ex.X_add_number
2963 			  = ((addressT) ex.X_add_number ^ sign) - sign;
2964 		      }
2965 		    break;
2966 		  }
2967 		/* Fall thru */
2968 
2969 	      case BFD_RELOC_PPC64_ADDR16_HIGHA:
2970 		ex.X_add_number = PPC_HA (ex.X_add_number);
2971 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2972 		  ex.X_add_number = SEX16 (ex.X_add_number);
2973 		break;
2974 
2975 	      case BFD_RELOC_PPC64_HIGHER:
2976 		ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2977 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2978 		  ex.X_add_number = SEX16 (ex.X_add_number);
2979 		break;
2980 
2981 	      case BFD_RELOC_PPC64_HIGHER_S:
2982 		ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2983 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2984 		  ex.X_add_number = SEX16 (ex.X_add_number);
2985 		break;
2986 
2987 	      case BFD_RELOC_PPC64_HIGHEST:
2988 		ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2989 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2990 		  ex.X_add_number = SEX16 (ex.X_add_number);
2991 		break;
2992 
2993 	      case BFD_RELOC_PPC64_HIGHEST_S:
2994 		ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2995 		if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2996 		  ex.X_add_number = SEX16 (ex.X_add_number);
2997 		break;
2998 	      }
2999 #endif /* OBJ_ELF */
3000 	  insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3001 				     ppc_cpu, (char *) NULL, 0);
3002 	}
3003       else
3004 	{
3005 	  bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3006 #ifdef OBJ_ELF
3007 	  if (ex.X_op == O_symbol && str[0] == '(')
3008 	    {
3009 	      const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3010 	      if (sym_name[0] == '.')
3011 		++sym_name;
3012 
3013 	      if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3014 		{
3015 		  expressionS tls_exp;
3016 
3017 		  hold = input_line_pointer;
3018 		  input_line_pointer = str + 1;
3019 		  expression (&tls_exp);
3020 		  if (tls_exp.X_op == O_symbol)
3021 		    {
3022 		      reloc = BFD_RELOC_NONE;
3023 		      if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3024 			{
3025 			  reloc = BFD_RELOC_PPC_TLSGD;
3026 			  input_line_pointer += 7;
3027 			}
3028 		      else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3029 			{
3030 			  reloc = BFD_RELOC_PPC_TLSLD;
3031 			  input_line_pointer += 7;
3032 			}
3033 		      if (reloc != BFD_RELOC_NONE)
3034 			{
3035 			  SKIP_WHITESPACE ();
3036 			  str = input_line_pointer;
3037 
3038 			  if (fc >= MAX_INSN_FIXUPS)
3039 			    as_fatal (_("too many fixups"));
3040 			  fixups[fc].exp = tls_exp;
3041 			  fixups[fc].opindex = *opindex_ptr;
3042 			  fixups[fc].reloc = reloc;
3043 			  ++fc;
3044 			}
3045 		    }
3046 		  input_line_pointer = hold;
3047 		}
3048 	    }
3049 
3050 	  if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3051 	    {
3052 	      /* Some TLS tweaks.  */
3053 	      switch (reloc)
3054 		{
3055 		default:
3056 		  break;
3057 
3058 		case BFD_RELOC_PPC_TLS:
3059 		  if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3060 		    as_bad (_("@tls may not be used with \"%s\" operands"),
3061 			    opcode->name);
3062 		  else if (operand->shift != 11)
3063 		    as_bad (_("@tls may only be used in last operand"));
3064 		  else
3065 		    insn = ppc_insert_operand (insn, operand,
3066 					       ppc_obj64 ? 13 : 2,
3067 					       ppc_cpu, (char *) NULL, 0);
3068 		  break;
3069 
3070 		  /* We'll only use the 32 (or 64) bit form of these relocations
3071 		     in constants.  Instructions get the 16 bit form.  */
3072 		case BFD_RELOC_PPC_DTPREL:
3073 		  reloc = BFD_RELOC_PPC_DTPREL16;
3074 		  break;
3075 		case BFD_RELOC_PPC_TPREL:
3076 		  reloc = BFD_RELOC_PPC_TPREL16;
3077 		  break;
3078 		}
3079 
3080 	      /* addpcis.  */
3081 	      if (opcode->opcode == (19 << 26) + (2 << 1)
3082 		  && reloc == BFD_RELOC_HI16_S)
3083 		reloc = BFD_RELOC_PPC_REL16DX_HA;
3084 
3085 	      /* If VLE-mode convert LO/HI/HA relocations.  */
3086       	      if (opcode->flags & PPC_OPCODE_VLE)
3087 		{
3088 		  int tmp_insn = insn & opcode->mask;
3089 
3090 		  int use_d_reloc = (tmp_insn == E_OR2I_INSN
3091 				     || tmp_insn == E_AND2I_DOT_INSN
3092 				     || tmp_insn == E_OR2IS_INSN
3093 				     || tmp_insn == E_LIS_INSN
3094 				     || tmp_insn == E_AND2IS_DOT_INSN);
3095 
3096 
3097 		  int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3098 				     || tmp_insn == E_ADD2IS_INSN
3099 				     || tmp_insn == E_CMP16I_INSN
3100 				     || tmp_insn == E_MULL2I_INSN
3101 				     || tmp_insn == E_CMPL16I_INSN
3102 				     || tmp_insn == E_CMPH16I_INSN
3103 				     || tmp_insn == E_CMPHL16I_INSN);
3104 
3105 		  switch (reloc)
3106 		    {
3107 		    default:
3108 		      break;
3109 
3110 		    case BFD_RELOC_PPC_EMB_SDA21:
3111 		      reloc = BFD_RELOC_PPC_VLE_SDA21;
3112 		      break;
3113 
3114 		    case BFD_RELOC_LO16:
3115 		      if (use_d_reloc)
3116 			reloc = BFD_RELOC_PPC_VLE_LO16D;
3117 		      else if (use_a_reloc)
3118 			reloc = BFD_RELOC_PPC_VLE_LO16A;
3119 		      break;
3120 
3121 		    case BFD_RELOC_HI16:
3122 		      if (use_d_reloc)
3123 			reloc = BFD_RELOC_PPC_VLE_HI16D;
3124 		      else if (use_a_reloc)
3125 			reloc = BFD_RELOC_PPC_VLE_HI16A;
3126 		      break;
3127 
3128 		    case BFD_RELOC_HI16_S:
3129 		      if (use_d_reloc)
3130 			reloc = BFD_RELOC_PPC_VLE_HA16D;
3131 		      else if (use_a_reloc)
3132 			reloc = BFD_RELOC_PPC_VLE_HA16A;
3133 		      break;
3134 
3135 		    case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3136 		      if (use_d_reloc)
3137 			reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3138 		      break;
3139 
3140 		    case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3141 		      if (use_d_reloc)
3142 			reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3143 		      break;
3144 
3145 		    case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3146 		      if (use_d_reloc)
3147 			reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3148 		      break;
3149 		    }
3150 		}
3151 	    }
3152 #endif /* OBJ_ELF */
3153 
3154 	  if (reloc != BFD_RELOC_NONE)
3155 	    ;
3156 	  /* Determine a BFD reloc value based on the operand information.
3157 	     We are only prepared to turn a few of the operands into
3158 	     relocs.  */
3159 	  else if ((operand->flags & (PPC_OPERAND_RELATIVE
3160 				      | PPC_OPERAND_ABSOLUTE)) != 0
3161 		   && operand->bitm == 0x3fffffc
3162 		   && operand->shift == 0)
3163 	    reloc = BFD_RELOC_PPC_B26;
3164 	  else if ((operand->flags & (PPC_OPERAND_RELATIVE
3165 				      | PPC_OPERAND_ABSOLUTE)) != 0
3166 		   && operand->bitm == 0xfffc
3167 		   && operand->shift == 0)
3168 	    reloc = BFD_RELOC_PPC_B16;
3169 	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3170 		   && operand->bitm == 0x1fe
3171 		   && operand->shift == -1)
3172 	    reloc = BFD_RELOC_PPC_VLE_REL8;
3173 	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3174 		   && operand->bitm == 0xfffe
3175 		   && operand->shift == 0)
3176 	    reloc = BFD_RELOC_PPC_VLE_REL15;
3177 	  else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3178 		   && operand->bitm == 0x1fffffe
3179 		   && operand->shift == 0)
3180 	    reloc = BFD_RELOC_PPC_VLE_REL24;
3181 	  else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3182 		   && (operand->bitm & 0xfff0) == 0xfff0
3183 		   && operand->shift == 0)
3184 	    {
3185 	      reloc = BFD_RELOC_16;
3186 #if defined OBJ_XCOFF || defined OBJ_ELF
3187 	      /* Note: the symbol may be not yet defined.  */
3188 	      if ((operand->flags & PPC_OPERAND_PARENS) != 0
3189 		  && ppc_is_toc_sym (ex.X_add_symbol))
3190 		{
3191 		  reloc = BFD_RELOC_PPC_TOC16;
3192 #ifdef OBJ_ELF
3193 		  as_warn (_("assuming %s on symbol"),
3194 			   ppc_obj64 ? "@toc" : "@xgot");
3195 #endif
3196 		}
3197 #endif
3198 	    }
3199 
3200 	  /* For the absolute forms of branches, convert the PC
3201 	     relative form back into the absolute.  */
3202 	  if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3203 	    {
3204 	      switch (reloc)
3205 		{
3206 		case BFD_RELOC_PPC_B26:
3207 		  reloc = BFD_RELOC_PPC_BA26;
3208 		  break;
3209 		case BFD_RELOC_PPC_B16:
3210 		  reloc = BFD_RELOC_PPC_BA16;
3211 		  break;
3212 #ifdef OBJ_ELF
3213 		case BFD_RELOC_PPC_B16_BRTAKEN:
3214 		  reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3215 		  break;
3216 		case BFD_RELOC_PPC_B16_BRNTAKEN:
3217 		  reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3218 		  break;
3219 #endif
3220 		default:
3221 		  break;
3222 		}
3223 	    }
3224 
3225 #ifdef OBJ_ELF
3226 	  switch (reloc)
3227 	    {
3228 	    case BFD_RELOC_PPC_TOC16:
3229 	      toc_reloc_types |= has_small_toc_reloc;
3230 	      break;
3231 	    case BFD_RELOC_PPC64_TOC16_LO:
3232 	    case BFD_RELOC_PPC64_TOC16_HI:
3233 	    case BFD_RELOC_PPC64_TOC16_HA:
3234 	      toc_reloc_types |= has_large_toc_reloc;
3235 	      break;
3236 	    default:
3237 	      break;
3238 	    }
3239 
3240 	  if (ppc_obj64
3241 	      && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3242 	    {
3243 	      switch (reloc)
3244 		{
3245 		case BFD_RELOC_16:
3246 		  reloc = BFD_RELOC_PPC64_ADDR16_DS;
3247 		  break;
3248 		case BFD_RELOC_LO16:
3249 		  reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3250 		  break;
3251 		case BFD_RELOC_16_GOTOFF:
3252 		  reloc = BFD_RELOC_PPC64_GOT16_DS;
3253 		  break;
3254 		case BFD_RELOC_LO16_GOTOFF:
3255 		  reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3256 		  break;
3257 		case BFD_RELOC_LO16_PLTOFF:
3258 		  reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3259 		  break;
3260 		case BFD_RELOC_16_BASEREL:
3261 		  reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3262 		  break;
3263 		case BFD_RELOC_LO16_BASEREL:
3264 		  reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3265 		  break;
3266 		case BFD_RELOC_PPC_TOC16:
3267 		  reloc = BFD_RELOC_PPC64_TOC16_DS;
3268 		  break;
3269 		case BFD_RELOC_PPC64_TOC16_LO:
3270 		  reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3271 		  break;
3272 		case BFD_RELOC_PPC64_PLTGOT16:
3273 		  reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3274 		  break;
3275 		case BFD_RELOC_PPC64_PLTGOT16_LO:
3276 		  reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3277 		  break;
3278 		case BFD_RELOC_PPC_DTPREL16:
3279 		  reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3280 		  break;
3281 		case BFD_RELOC_PPC_DTPREL16_LO:
3282 		  reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3283 		  break;
3284 		case BFD_RELOC_PPC_TPREL16:
3285 		  reloc = BFD_RELOC_PPC64_TPREL16_DS;
3286 		  break;
3287 		case BFD_RELOC_PPC_TPREL16_LO:
3288 		  reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3289 		  break;
3290 		case BFD_RELOC_PPC_GOT_DTPREL16:
3291 		case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3292 		case BFD_RELOC_PPC_GOT_TPREL16:
3293 		case BFD_RELOC_PPC_GOT_TPREL16_LO:
3294 		  break;
3295 		default:
3296 		  as_bad (_("unsupported relocation for DS offset field"));
3297 		  break;
3298 		}
3299 	    }
3300 #endif
3301 
3302 	  /* We need to generate a fixup for this expression.  */
3303 	  if (fc >= MAX_INSN_FIXUPS)
3304 	    as_fatal (_("too many fixups"));
3305 	  fixups[fc].exp = ex;
3306 	  fixups[fc].opindex = *opindex_ptr;
3307 	  fixups[fc].reloc = reloc;
3308 	  ++fc;
3309 	}
3310 
3311       if (need_paren)
3312 	{
3313 	  endc = ')';
3314 	  need_paren = 0;
3315 	  /* If expecting more operands, then we want to see "),".  */
3316 	  if (*str == endc && opindex_ptr[1] != 0)
3317 	    {
3318 	      do
3319 		++str;
3320 	      while (ISSPACE (*str));
3321 	      endc = ',';
3322 	    }
3323 	}
3324       else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3325 	{
3326 	  endc = '(';
3327 	  need_paren = 1;
3328 	}
3329       else
3330 	endc = ',';
3331 
3332       /* The call to expression should have advanced str past any
3333 	 whitespace.  */
3334       if (*str != endc
3335 	  && (endc != ',' || *str != '\0'))
3336 	{
3337 	  if (*str == '\0')
3338 	    as_bad (_("syntax error; end of line, expected `%c'"), endc);
3339 	  else
3340 	    as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3341 	  break;
3342 	}
3343 
3344       if (*str != '\0')
3345 	++str;
3346     }
3347 
3348   while (ISSPACE (*str))
3349     ++str;
3350 
3351   if (*str != '\0')
3352     as_bad (_("junk at end of line: `%s'"), str);
3353 
3354 #ifdef OBJ_ELF
3355   /* Do we need/want an APUinfo section? */
3356   if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3357       && !ppc_obj64)
3358     {
3359       /* These are all version "1".  */
3360       if (opcode->flags & PPC_OPCODE_SPE)
3361 	ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3362       if (opcode->flags & PPC_OPCODE_ISEL)
3363 	ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3364       if (opcode->flags & PPC_OPCODE_EFS)
3365 	ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3366       if (opcode->flags & PPC_OPCODE_BRLOCK)
3367 	ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3368       if (opcode->flags & PPC_OPCODE_PMR)
3369 	ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3370       if (opcode->flags & PPC_OPCODE_CACHELCK)
3371 	ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3372       if (opcode->flags & PPC_OPCODE_RFMCI)
3373 	ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3374       /* Only set the VLE flag if the instruction has been pulled via
3375          the VLE instruction set.  This way the flag is guaranteed to
3376          be set for VLE-only instructions or for VLE-only processors,
3377          however it'll remain clear for dual-mode instructions on
3378          dual-mode and, more importantly, standard-mode processors.  */
3379       if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3380 	ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3381     }
3382 #endif
3383 
3384   /* Write out the instruction.  */
3385   /* Differentiate between two and four byte insns.  */
3386   if (ppc_mach () == bfd_mach_ppc_vle)
3387     {
3388       if (PPC_OP_SE_VLE (insn))
3389         insn_length = 2;
3390       else
3391         insn_length = 4;
3392       addr_mod = frag_now_fix () & 1;
3393     }
3394   else
3395     {
3396       insn_length = 4;
3397       addr_mod = frag_now_fix () & 3;
3398     }
3399   /* All instructions can start on a 2 byte boundary for VLE.  */
3400   f = frag_more (insn_length);
3401   if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3402     {
3403       if (ppc_mach() == bfd_mach_ppc_vle)
3404         as_bad (_("instruction address is not a multiple of 2"));
3405       else
3406         as_bad (_("instruction address is not a multiple of 4"));
3407     }
3408   frag_now->insn_addr = addr_mod;
3409   frag_now->has_code = 1;
3410   md_number_to_chars (f, insn, insn_length);
3411   last_insn = insn;
3412   last_seg = now_seg;
3413   last_subseg = now_subseg;
3414 
3415 #ifdef OBJ_ELF
3416   dwarf2_emit_insn (insn_length);
3417 #endif
3418 
3419   /* Create any fixups.  */
3420   for (i = 0; i < fc; i++)
3421     {
3422       fixS *fixP;
3423       if (fixups[i].reloc != BFD_RELOC_NONE)
3424 	{
3425 	  reloc_howto_type *reloc_howto;
3426 	  int size;
3427 	  int offset;
3428 
3429 	  reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3430 	  if (!reloc_howto)
3431 	    abort ();
3432 
3433 	  size = bfd_get_reloc_size (reloc_howto);
3434 	  offset = target_big_endian ? (insn_length - size) : 0;
3435 
3436 	  fixP = fix_new_exp (frag_now,
3437 			      f - frag_now->fr_literal + offset,
3438 			      size,
3439 			      &fixups[i].exp,
3440 			      reloc_howto->pc_relative,
3441 			      fixups[i].reloc);
3442 	}
3443       else
3444 	{
3445 	  const struct powerpc_operand *operand;
3446 
3447 	  operand = &powerpc_operands[fixups[i].opindex];
3448 	  fixP = fix_new_exp (frag_now,
3449 			      f - frag_now->fr_literal,
3450 			      insn_length,
3451 			      &fixups[i].exp,
3452 			      (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3453 			      BFD_RELOC_NONE);
3454 	}
3455       fixP->fx_pcrel_adjust = fixups[i].opindex;
3456     }
3457 }
3458 
3459 /* Handle a macro.  Gather all the operands, transform them as
3460    described by the macro, and call md_assemble recursively.  All the
3461    operands are separated by commas; we don't accept parentheses
3462    around operands here.  */
3463 
3464 static void
3465 ppc_macro (char *str, const struct powerpc_macro *macro)
3466 {
3467   char *operands[10];
3468   unsigned int count;
3469   char *s;
3470   unsigned int len;
3471   const char *format;
3472   unsigned int arg;
3473   char *send;
3474   char *complete;
3475 
3476   /* Gather the users operands into the operands array.  */
3477   count = 0;
3478   s = str;
3479   while (1)
3480     {
3481       if (count >= sizeof operands / sizeof operands[0])
3482 	break;
3483       operands[count++] = s;
3484       s = strchr (s, ',');
3485       if (s == (char *) NULL)
3486 	break;
3487       *s++ = '\0';
3488     }
3489 
3490   if (count != macro->operands)
3491     {
3492       as_bad (_("wrong number of operands"));
3493       return;
3494     }
3495 
3496   /* Work out how large the string must be (the size is unbounded
3497      because it includes user input).  */
3498   len = 0;
3499   format = macro->format;
3500   while (*format != '\0')
3501     {
3502       if (*format != '%')
3503 	{
3504 	  ++len;
3505 	  ++format;
3506 	}
3507       else
3508 	{
3509 	  arg = strtol (format + 1, &send, 10);
3510 	  know (send != format && arg < count);
3511 	  len += strlen (operands[arg]);
3512 	  format = send;
3513 	}
3514     }
3515 
3516   /* Put the string together.  */
3517   complete = s = XNEWVEC (char, len + 1);
3518   format = macro->format;
3519   while (*format != '\0')
3520     {
3521       if (*format != '%')
3522 	*s++ = *format++;
3523       else
3524 	{
3525 	  arg = strtol (format + 1, &send, 10);
3526 	  strcpy (s, operands[arg]);
3527 	  s += strlen (s);
3528 	  format = send;
3529 	}
3530     }
3531   *s = '\0';
3532 
3533   /* Assemble the constructed instruction.  */
3534   md_assemble (complete);
3535   free (complete);
3536 }
3537 
3538 #ifdef OBJ_ELF
3539 /* For ELF, add support for SHT_ORDERED.  */
3540 
3541 int
3542 ppc_section_type (char *str, size_t len)
3543 {
3544   if (len == 7 && strncmp (str, "ordered", 7) == 0)
3545     return SHT_ORDERED;
3546 
3547   return -1;
3548 }
3549 
3550 int
3551 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3552 {
3553   if (type == SHT_ORDERED)
3554     flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3555 
3556   return flags;
3557 }
3558 #endif /* OBJ_ELF */
3559 
3560 
3561 /* Pseudo-op handling.  */
3562 
3563 /* The .byte pseudo-op.  This is similar to the normal .byte
3564    pseudo-op, but it can also take a single ASCII string.  */
3565 
3566 static void
3567 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3568 {
3569   int count = 0;
3570 
3571   if (*input_line_pointer != '\"')
3572     {
3573       cons (1);
3574       return;
3575     }
3576 
3577   /* Gather characters.  A real double quote is doubled.  Unusual
3578      characters are not permitted.  */
3579   ++input_line_pointer;
3580   while (1)
3581     {
3582       char c;
3583 
3584       c = *input_line_pointer++;
3585 
3586       if (c == '\"')
3587 	{
3588 	  if (*input_line_pointer != '\"')
3589 	    break;
3590 	  ++input_line_pointer;
3591 	}
3592 
3593       FRAG_APPEND_1_CHAR (c);
3594       ++count;
3595     }
3596 
3597   if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3598     as_warn (_("data in executable section"));
3599   demand_empty_rest_of_line ();
3600 }
3601 
3602 #ifdef OBJ_XCOFF
3603 
3604 /* XCOFF specific pseudo-op handling.  */
3605 
3606 /* This is set if we are creating a .stabx symbol, since we don't want
3607    to handle symbol suffixes for such symbols.  */
3608 static bfd_boolean ppc_stab_symbol;
3609 
3610 /* The .comm and .lcomm pseudo-ops for XCOFF.  XCOFF puts common
3611    symbols in the .bss segment as though they were local common
3612    symbols, and uses a different smclas.  The native Aix 4.3.3 assembler
3613    aligns .comm and .lcomm to 4 bytes.  */
3614 
3615 static void
3616 ppc_comm (int lcomm)
3617 {
3618   asection *current_seg = now_seg;
3619   subsegT current_subseg = now_subseg;
3620   char *name;
3621   char endc;
3622   char *end_name;
3623   offsetT size;
3624   offsetT align;
3625   symbolS *lcomm_sym = NULL;
3626   symbolS *sym;
3627   char *pfrag;
3628 
3629   endc = get_symbol_name (&name);
3630   end_name = input_line_pointer;
3631   (void) restore_line_pointer (endc);
3632 
3633   if (*input_line_pointer != ',')
3634     {
3635       as_bad (_("missing size"));
3636       ignore_rest_of_line ();
3637       return;
3638     }
3639   ++input_line_pointer;
3640 
3641   size = get_absolute_expression ();
3642   if (size < 0)
3643     {
3644       as_bad (_("negative size"));
3645       ignore_rest_of_line ();
3646       return;
3647     }
3648 
3649   if (! lcomm)
3650     {
3651       /* The third argument to .comm is the alignment.  */
3652       if (*input_line_pointer != ',')
3653 	align = 2;
3654       else
3655 	{
3656 	  ++input_line_pointer;
3657 	  align = get_absolute_expression ();
3658 	  if (align <= 0)
3659 	    {
3660 	      as_warn (_("ignoring bad alignment"));
3661 	      align = 2;
3662 	    }
3663 	}
3664     }
3665   else
3666     {
3667       char *lcomm_name;
3668       char lcomm_endc;
3669 
3670       /* The third argument to .lcomm appears to be the real local
3671 	 common symbol to create.  References to the symbol named in
3672 	 the first argument are turned into references to the third
3673 	 argument.  */
3674       if (*input_line_pointer != ',')
3675 	{
3676 	  as_bad (_("missing real symbol name"));
3677 	  ignore_rest_of_line ();
3678 	  return;
3679 	}
3680       ++input_line_pointer;
3681 
3682       lcomm_endc = get_symbol_name (&lcomm_name);
3683 
3684       lcomm_sym = symbol_find_or_make (lcomm_name);
3685 
3686       (void) restore_line_pointer (lcomm_endc);
3687 
3688       /* The fourth argument to .lcomm is the alignment.  */
3689       if (*input_line_pointer != ',')
3690 	{
3691 	  if (size <= 4)
3692 	    align = 2;
3693 	  else
3694 	    align = 3;
3695 	}
3696       else
3697 	{
3698 	  ++input_line_pointer;
3699 	  align = get_absolute_expression ();
3700 	  if (align <= 0)
3701 	    {
3702 	      as_warn (_("ignoring bad alignment"));
3703 	      align = 2;
3704 	    }
3705 	}
3706     }
3707 
3708   *end_name = '\0';
3709   sym = symbol_find_or_make (name);
3710   *end_name = endc;
3711 
3712   if (S_IS_DEFINED (sym)
3713       || S_GET_VALUE (sym) != 0)
3714     {
3715       as_bad (_("attempt to redefine symbol"));
3716       ignore_rest_of_line ();
3717       return;
3718     }
3719 
3720   record_alignment (bss_section, align);
3721 
3722   if (! lcomm
3723       || ! S_IS_DEFINED (lcomm_sym))
3724     {
3725       symbolS *def_sym;
3726       offsetT def_size;
3727 
3728       if (! lcomm)
3729 	{
3730 	  def_sym = sym;
3731 	  def_size = size;
3732 	  S_SET_EXTERNAL (sym);
3733 	}
3734       else
3735 	{
3736 	  symbol_get_tc (lcomm_sym)->output = 1;
3737 	  def_sym = lcomm_sym;
3738 	  def_size = 0;
3739 	}
3740 
3741       subseg_set (bss_section, 1);
3742       frag_align (align, 0, 0);
3743 
3744       symbol_set_frag (def_sym, frag_now);
3745       pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3746 			def_size, (char *) NULL);
3747       *pfrag = 0;
3748       S_SET_SEGMENT (def_sym, bss_section);
3749       symbol_get_tc (def_sym)->align = align;
3750     }
3751   else if (lcomm)
3752     {
3753       /* Align the size of lcomm_sym.  */
3754       symbol_get_frag (lcomm_sym)->fr_offset =
3755 	((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3756 	 &~ ((1 << align) - 1));
3757       if (align > symbol_get_tc (lcomm_sym)->align)
3758 	symbol_get_tc (lcomm_sym)->align = align;
3759     }
3760 
3761   if (lcomm)
3762     {
3763       /* Make sym an offset from lcomm_sym.  */
3764       S_SET_SEGMENT (sym, bss_section);
3765       symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3766       S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3767       symbol_get_frag (lcomm_sym)->fr_offset += size;
3768     }
3769 
3770   subseg_set (current_seg, current_subseg);
3771 
3772   demand_empty_rest_of_line ();
3773 }
3774 
3775 /* The .csect pseudo-op.  This switches us into a different
3776    subsegment.  The first argument is a symbol whose value is the
3777    start of the .csect.  In COFF, csect symbols get special aux
3778    entries defined by the x_csect field of union internal_auxent.  The
3779    optional second argument is the alignment (the default is 2).  */
3780 
3781 static void
3782 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3783 {
3784   char *name;
3785   char endc;
3786   symbolS *sym;
3787   offsetT align;
3788 
3789   endc = get_symbol_name (&name);
3790 
3791   sym = symbol_find_or_make (name);
3792 
3793   (void) restore_line_pointer (endc);
3794 
3795   if (S_GET_NAME (sym)[0] == '\0')
3796     {
3797       /* An unnamed csect is assumed to be [PR].  */
3798       symbol_get_tc (sym)->symbol_class = XMC_PR;
3799     }
3800 
3801   align = 2;
3802   if (*input_line_pointer == ',')
3803     {
3804       ++input_line_pointer;
3805       align = get_absolute_expression ();
3806     }
3807 
3808   ppc_change_csect (sym, align);
3809 
3810   demand_empty_rest_of_line ();
3811 }
3812 
3813 /* Change to a different csect.  */
3814 
3815 static void
3816 ppc_change_csect (symbolS *sym, offsetT align)
3817 {
3818   if (S_IS_DEFINED (sym))
3819     subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3820   else
3821     {
3822       symbolS **list_ptr;
3823       int after_toc;
3824       int hold_chunksize;
3825       symbolS *list;
3826       int is_code;
3827       segT sec;
3828 
3829       /* This is a new csect.  We need to look at the symbol class to
3830 	 figure out whether it should go in the text section or the
3831 	 data section.  */
3832       after_toc = 0;
3833       is_code = 0;
3834       switch (symbol_get_tc (sym)->symbol_class)
3835 	{
3836 	case XMC_PR:
3837 	case XMC_RO:
3838 	case XMC_DB:
3839 	case XMC_GL:
3840 	case XMC_XO:
3841 	case XMC_SV:
3842 	case XMC_TI:
3843 	case XMC_TB:
3844 	  S_SET_SEGMENT (sym, text_section);
3845 	  symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3846 	  ++ppc_text_subsegment;
3847 	  list_ptr = &ppc_text_csects;
3848 	  is_code = 1;
3849 	  break;
3850 	case XMC_RW:
3851 	case XMC_TC0:
3852 	case XMC_TC:
3853 	case XMC_DS:
3854 	case XMC_UA:
3855 	case XMC_BS:
3856 	case XMC_UC:
3857 	  if (ppc_toc_csect != NULL
3858 	      && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3859 		  == ppc_data_subsegment))
3860 	    after_toc = 1;
3861 	  S_SET_SEGMENT (sym, data_section);
3862 	  symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3863 	  ++ppc_data_subsegment;
3864 	  list_ptr = &ppc_data_csects;
3865 	  break;
3866 	default:
3867 	  abort ();
3868 	}
3869 
3870       /* We set the obstack chunk size to a small value before
3871 	 changing subsegments, so that we don't use a lot of memory
3872 	 space for what may be a small section.  */
3873       hold_chunksize = chunksize;
3874       chunksize = 64;
3875 
3876       sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3877 			symbol_get_tc (sym)->subseg);
3878 
3879       chunksize = hold_chunksize;
3880 
3881       if (after_toc)
3882 	ppc_after_toc_frag = frag_now;
3883 
3884       record_alignment (sec, align);
3885       if (is_code)
3886 	frag_align_code (align, 0);
3887       else
3888 	frag_align (align, 0, 0);
3889 
3890       symbol_set_frag (sym, frag_now);
3891       S_SET_VALUE (sym, (valueT) frag_now_fix ());
3892 
3893       symbol_get_tc (sym)->align = align;
3894       symbol_get_tc (sym)->output = 1;
3895       symbol_get_tc (sym)->within = sym;
3896 
3897       for (list = *list_ptr;
3898 	   symbol_get_tc (list)->next != (symbolS *) NULL;
3899 	   list = symbol_get_tc (list)->next)
3900 	;
3901       symbol_get_tc (list)->next = sym;
3902 
3903       symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3904       symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3905 		     &symbol_lastP);
3906     }
3907 
3908   ppc_current_csect = sym;
3909 }
3910 
3911 static void
3912 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3913 {
3914   segT sec;
3915   flagword oldflags;
3916   const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3917 
3918   sec = subseg_new (dw->name, subseg);
3919   oldflags = bfd_get_section_flags (stdoutput, sec);
3920   if (oldflags == SEC_NO_FLAGS)
3921     {
3922       /* Just created section.  */
3923       gas_assert (dw_sections[idx].sect == NULL);
3924 
3925       bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3926       bfd_set_section_alignment (stdoutput, sec, 0);
3927       dw_sections[idx].sect = sec;
3928     }
3929 
3930   /* Not anymore in a csect.  */
3931   ppc_current_csect = NULL;
3932 }
3933 
3934 /* The .dwsect pseudo-op.  Defines a DWARF section.  Syntax is:
3935      .dwsect flag [, opt-label ]
3936 */
3937 
3938 static void
3939 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3940 {
3941   offsetT flag;
3942   symbolS *opt_label;
3943   const struct xcoff_dwsect_name *dw;
3944   struct dw_subsection *subseg;
3945   struct dw_section *dws;
3946   int i;
3947 
3948   /* Find section.  */
3949   flag = get_absolute_expression ();
3950   dw = NULL;
3951   for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3952     if (xcoff_dwsect_names[i].flag == flag)
3953       {
3954         dw = &xcoff_dwsect_names[i];
3955         break;
3956       }
3957 
3958   /* Parse opt-label.  */
3959   if (*input_line_pointer == ',')
3960     {
3961       char *label;
3962       char c;
3963 
3964       ++input_line_pointer;
3965 
3966       c = get_symbol_name (&label);
3967       opt_label = symbol_find_or_make (label);
3968       (void) restore_line_pointer (c);
3969     }
3970   else
3971     opt_label = NULL;
3972 
3973   demand_empty_rest_of_line ();
3974 
3975   /* Return now in case of unknown subsection.  */
3976   if (dw == NULL)
3977     {
3978       as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3979               (unsigned)flag);
3980       return;
3981     }
3982 
3983   /* Find the subsection.  */
3984   dws = &dw_sections[i];
3985   subseg = NULL;
3986   if (opt_label != NULL && S_IS_DEFINED (opt_label))
3987     {
3988       /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null).  */
3989       if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3990         {
3991           as_bad (_("label %s was not defined in this dwarf section"),
3992                   S_GET_NAME (opt_label));
3993           subseg = dws->anon_subseg;
3994           opt_label = NULL;
3995         }
3996       else
3997         subseg = symbol_get_tc (opt_label)->u.dw;
3998     }
3999 
4000   if (subseg != NULL)
4001     {
4002       /* Switch to the subsection.  */
4003       ppc_change_debug_section (i, subseg->subseg);
4004     }
4005   else
4006     {
4007       /* Create a new dw subsection.  */
4008       subseg = XNEW (struct dw_subsection);
4009 
4010       if (opt_label == NULL)
4011         {
4012           /* The anonymous one.  */
4013           subseg->subseg = 0;
4014           subseg->link = NULL;
4015           dws->anon_subseg = subseg;
4016         }
4017       else
4018         {
4019           /* A named one.  */
4020           if (dws->list_subseg != NULL)
4021             subseg->subseg = dws->list_subseg->subseg + 1;
4022           else
4023             subseg->subseg = 1;
4024 
4025           subseg->link = dws->list_subseg;
4026           dws->list_subseg = subseg;
4027           symbol_get_tc (opt_label)->u.dw = subseg;
4028         }
4029 
4030       ppc_change_debug_section (i, subseg->subseg);
4031 
4032       if (dw->def_size)
4033         {
4034           /* Add the length field.  */
4035           expressionS *exp = &subseg->end_exp;
4036           int sz;
4037 
4038           if (opt_label != NULL)
4039             symbol_set_value_now (opt_label);
4040 
4041           /* Add the length field.  Note that according to the AIX assembler
4042              manual, the size of the length field is 4 for powerpc32 but
4043              12 for powerpc64.  */
4044           if (ppc_obj64)
4045             {
4046               /* Write the 64bit marker.  */
4047               md_number_to_chars (frag_more (4), -1, 4);
4048             }
4049 
4050           exp->X_op = O_subtract;
4051           exp->X_op_symbol = symbol_temp_new_now ();
4052           exp->X_add_symbol = symbol_temp_make ();
4053 
4054           sz = ppc_obj64 ? 8 : 4;
4055           exp->X_add_number = -sz;
4056           emit_expr (exp, sz);
4057         }
4058     }
4059 }
4060 
4061 /* This function handles the .text and .data pseudo-ops.  These
4062    pseudo-ops aren't really used by XCOFF; we implement them for the
4063    convenience of people who aren't used to XCOFF.  */
4064 
4065 static void
4066 ppc_section (int type)
4067 {
4068   const char *name;
4069   symbolS *sym;
4070 
4071   if (type == 't')
4072     name = ".text[PR]";
4073   else if (type == 'd')
4074     name = ".data[RW]";
4075   else
4076     abort ();
4077 
4078   sym = symbol_find_or_make (name);
4079 
4080   ppc_change_csect (sym, 2);
4081 
4082   demand_empty_rest_of_line ();
4083 }
4084 
4085 /* This function handles the .section pseudo-op.  This is mostly to
4086    give an error, since XCOFF only supports .text, .data and .bss, but
4087    we do permit the user to name the text or data section.  */
4088 
4089 static void
4090 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4091 {
4092   char *user_name;
4093   const char *real_name;
4094   char c;
4095   symbolS *sym;
4096 
4097   c = get_symbol_name (&user_name);
4098 
4099   if (strcmp (user_name, ".text") == 0)
4100     real_name = ".text[PR]";
4101   else if (strcmp (user_name, ".data") == 0)
4102     real_name = ".data[RW]";
4103   else
4104     {
4105       as_bad (_("the XCOFF file format does not support arbitrary sections"));
4106       (void) restore_line_pointer (c);
4107       ignore_rest_of_line ();
4108       return;
4109     }
4110 
4111   (void) restore_line_pointer (c);
4112 
4113   sym = symbol_find_or_make (real_name);
4114 
4115   ppc_change_csect (sym, 2);
4116 
4117   demand_empty_rest_of_line ();
4118 }
4119 
4120 /* The .extern pseudo-op.  We create an undefined symbol.  */
4121 
4122 static void
4123 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4124 {
4125   char *name;
4126   char endc;
4127 
4128   endc = get_symbol_name (&name);
4129 
4130   (void) symbol_find_or_make (name);
4131 
4132   (void) restore_line_pointer (endc);
4133 
4134   demand_empty_rest_of_line ();
4135 }
4136 
4137 /* The .lglobl pseudo-op.  Keep the symbol in the symbol table.  */
4138 
4139 static void
4140 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4141 {
4142   char *name;
4143   char endc;
4144   symbolS *sym;
4145 
4146   endc = get_symbol_name (&name);
4147 
4148   sym = symbol_find_or_make (name);
4149 
4150   (void) restore_line_pointer (endc);
4151 
4152   symbol_get_tc (sym)->output = 1;
4153 
4154   demand_empty_rest_of_line ();
4155 }
4156 
4157 /* The .ref pseudo-op.  It takes a list of symbol names and inserts R_REF
4158    relocations at the beginning of the current csect.
4159 
4160    (In principle, there's no reason why the relocations _have_ to be at
4161    the beginning.  Anywhere in the csect would do.  However, inserting
4162    at the beginning is what the native assmebler does, and it helps to
4163    deal with cases where the .ref statements follow the section contents.)
4164 
4165    ??? .refs don't work for empty .csects.  However, the native assembler
4166    doesn't report an error in this case, and neither yet do we.  */
4167 
4168 static void
4169 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4170 {
4171   char *name;
4172   char c;
4173 
4174   if (ppc_current_csect == NULL)
4175     {
4176       as_bad (_(".ref outside .csect"));
4177       ignore_rest_of_line ();
4178       return;
4179     }
4180 
4181   do
4182     {
4183       c = get_symbol_name (&name);
4184 
4185       fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4186 		    symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4187 
4188       *input_line_pointer = c;
4189       SKIP_WHITESPACE_AFTER_NAME ();
4190       c = *input_line_pointer;
4191       if (c == ',')
4192 	{
4193 	  input_line_pointer++;
4194 	  SKIP_WHITESPACE ();
4195 	  if (is_end_of_line[(unsigned char) *input_line_pointer])
4196 	    {
4197 	      as_bad (_("missing symbol name"));
4198 	      ignore_rest_of_line ();
4199 	      return;
4200 	    }
4201 	}
4202     }
4203   while (c == ',');
4204 
4205   demand_empty_rest_of_line ();
4206 }
4207 
4208 /* The .rename pseudo-op.  The RS/6000 assembler can rename symbols,
4209    although I don't know why it bothers.  */
4210 
4211 static void
4212 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4213 {
4214   char *name;
4215   char endc;
4216   symbolS *sym;
4217   int len;
4218 
4219   endc = get_symbol_name (&name);
4220 
4221   sym = symbol_find_or_make (name);
4222 
4223   (void) restore_line_pointer (endc);
4224 
4225   if (*input_line_pointer != ',')
4226     {
4227       as_bad (_("missing rename string"));
4228       ignore_rest_of_line ();
4229       return;
4230     }
4231   ++input_line_pointer;
4232 
4233   symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4234 
4235   demand_empty_rest_of_line ();
4236 }
4237 
4238 /* The .stabx pseudo-op.  This is similar to a normal .stabs
4239    pseudo-op, but slightly different.  A sample is
4240        .stabx "main:F-1",.main,142,0
4241    The first argument is the symbol name to create.  The second is the
4242    value, and the third is the storage class.  The fourth seems to be
4243    always zero, and I am assuming it is the type.  */
4244 
4245 static void
4246 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4247 {
4248   char *name;
4249   int len;
4250   symbolS *sym;
4251   expressionS exp;
4252 
4253   name = demand_copy_C_string (&len);
4254 
4255   if (*input_line_pointer != ',')
4256     {
4257       as_bad (_("missing value"));
4258       return;
4259     }
4260   ++input_line_pointer;
4261 
4262   ppc_stab_symbol = TRUE;
4263   sym = symbol_make (name);
4264   ppc_stab_symbol = FALSE;
4265 
4266   symbol_get_tc (sym)->real_name = name;
4267 
4268   (void) expression (&exp);
4269 
4270   switch (exp.X_op)
4271     {
4272     case O_illegal:
4273     case O_absent:
4274     case O_big:
4275       as_bad (_("illegal .stabx expression; zero assumed"));
4276       exp.X_add_number = 0;
4277       /* Fall through.  */
4278     case O_constant:
4279       S_SET_VALUE (sym, (valueT) exp.X_add_number);
4280       symbol_set_frag (sym, &zero_address_frag);
4281       break;
4282 
4283     case O_symbol:
4284       if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4285 	symbol_set_value_expression (sym, &exp);
4286       else
4287 	{
4288 	  S_SET_VALUE (sym,
4289 		       exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4290 	  symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4291 	}
4292       break;
4293 
4294     default:
4295       /* The value is some complex expression.  This will probably
4296 	 fail at some later point, but this is probably the right
4297 	 thing to do here.  */
4298       symbol_set_value_expression (sym, &exp);
4299       break;
4300     }
4301 
4302   S_SET_SEGMENT (sym, ppc_coff_debug_section);
4303   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4304 
4305   if (*input_line_pointer != ',')
4306     {
4307       as_bad (_("missing class"));
4308       return;
4309     }
4310   ++input_line_pointer;
4311 
4312   S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4313 
4314   if (*input_line_pointer != ',')
4315     {
4316       as_bad (_("missing type"));
4317       return;
4318     }
4319   ++input_line_pointer;
4320 
4321   S_SET_DATA_TYPE (sym, get_absolute_expression ());
4322 
4323   symbol_get_tc (sym)->output = 1;
4324 
4325   if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4326     {
4327       /* In this case :
4328 
4329          .bs name
4330          .stabx	"z",arrays_,133,0
4331          .es
4332 
4333          .comm arrays_,13768,3
4334 
4335          resolve_symbol_value will copy the exp's "within" into sym's when the
4336          offset is 0.  Since this seems to be corner case problem,
4337          only do the correction for storage class C_STSYM.  A better solution
4338          would be to have the tc field updated in ppc_symbol_new_hook.  */
4339 
4340       if (exp.X_op == O_symbol)
4341         {
4342           if (ppc_current_block == NULL)
4343             as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4344 
4345           symbol_get_tc (sym)->within = ppc_current_block;
4346           symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4347         }
4348     }
4349 
4350   if (exp.X_op != O_symbol
4351       || ! S_IS_EXTERNAL (exp.X_add_symbol)
4352       || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4353     ppc_frob_label (sym);
4354   else
4355     {
4356       symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4357       symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4358       if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4359 	symbol_get_tc (ppc_current_csect)->within = sym;
4360     }
4361 
4362   demand_empty_rest_of_line ();
4363 }
4364 
4365 /* The .function pseudo-op.  This takes several arguments.  The first
4366    argument seems to be the external name of the symbol.  The second
4367    argument seems to be the label for the start of the function.  gcc
4368    uses the same name for both.  I have no idea what the third and
4369    fourth arguments are meant to be.  The optional fifth argument is
4370    an expression for the size of the function.  In COFF this symbol
4371    gets an aux entry like that used for a csect.  */
4372 
4373 static void
4374 ppc_function (int ignore ATTRIBUTE_UNUSED)
4375 {
4376   char *name;
4377   char endc;
4378   char *s;
4379   symbolS *ext_sym;
4380   symbolS *lab_sym;
4381 
4382   endc = get_symbol_name (&name);
4383 
4384   /* Ignore any [PR] suffix.  */
4385   name = ppc_canonicalize_symbol_name (name);
4386   s = strchr (name, '[');
4387   if (s != (char *) NULL
4388       && strcmp (s + 1, "PR]") == 0)
4389     *s = '\0';
4390 
4391   ext_sym = symbol_find_or_make (name);
4392 
4393   (void) restore_line_pointer (endc);
4394 
4395   if (*input_line_pointer != ',')
4396     {
4397       as_bad (_("missing symbol name"));
4398       ignore_rest_of_line ();
4399       return;
4400     }
4401   ++input_line_pointer;
4402 
4403   endc = get_symbol_name (&name);
4404 
4405   lab_sym = symbol_find_or_make (name);
4406 
4407   (void) restore_line_pointer (endc);
4408 
4409   if (ext_sym != lab_sym)
4410     {
4411       expressionS exp;
4412 
4413       exp.X_op = O_symbol;
4414       exp.X_add_symbol = lab_sym;
4415       exp.X_op_symbol = NULL;
4416       exp.X_add_number = 0;
4417       exp.X_unsigned = 0;
4418       symbol_set_value_expression (ext_sym, &exp);
4419     }
4420 
4421   if (symbol_get_tc (ext_sym)->symbol_class == -1)
4422     symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4423   symbol_get_tc (ext_sym)->output = 1;
4424 
4425   if (*input_line_pointer == ',')
4426     {
4427       expressionS exp;
4428 
4429       /* Ignore the third argument.  */
4430       ++input_line_pointer;
4431       expression (& exp);
4432       if (*input_line_pointer == ',')
4433 	{
4434 	  /* Ignore the fourth argument.  */
4435 	  ++input_line_pointer;
4436 	  expression (& exp);
4437 	  if (*input_line_pointer == ',')
4438 	    {
4439 	      /* The fifth argument is the function size.  */
4440 	      ++input_line_pointer;
4441 	      symbol_get_tc (ext_sym)->u.size = symbol_new
4442                 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4443 	      pseudo_set (symbol_get_tc (ext_sym)->u.size);
4444 	    }
4445 	}
4446     }
4447 
4448   S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4449   SF_SET_FUNCTION (ext_sym);
4450   SF_SET_PROCESS (ext_sym);
4451   coff_add_linesym (ext_sym);
4452 
4453   demand_empty_rest_of_line ();
4454 }
4455 
4456 /* The .bf pseudo-op.  This is just like a COFF C_FCN symbol named
4457    ".bf".  If the pseudo op .bi was seen before .bf, patch the .bi sym
4458    with the correct line number */
4459 
4460 static symbolS *saved_bi_sym = 0;
4461 
4462 static void
4463 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4464 {
4465   symbolS *sym;
4466 
4467   sym = symbol_make (".bf");
4468   S_SET_SEGMENT (sym, text_section);
4469   symbol_set_frag (sym, frag_now);
4470   S_SET_VALUE (sym, frag_now_fix ());
4471   S_SET_STORAGE_CLASS (sym, C_FCN);
4472 
4473   coff_line_base = get_absolute_expression ();
4474 
4475   S_SET_NUMBER_AUXILIARY (sym, 1);
4476   SA_SET_SYM_LNNO (sym, coff_line_base);
4477 
4478   /* Line number for bi.  */
4479   if (saved_bi_sym)
4480     {
4481       S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4482       saved_bi_sym = 0;
4483     }
4484 
4485 
4486   symbol_get_tc (sym)->output = 1;
4487 
4488   ppc_frob_label (sym);
4489 
4490   demand_empty_rest_of_line ();
4491 }
4492 
4493 /* The .ef pseudo-op.  This is just like a COFF C_FCN symbol named
4494    ".ef", except that the line number is absolute, not relative to the
4495    most recent ".bf" symbol.  */
4496 
4497 static void
4498 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4499 {
4500   symbolS *sym;
4501 
4502   sym = symbol_make (".ef");
4503   S_SET_SEGMENT (sym, text_section);
4504   symbol_set_frag (sym, frag_now);
4505   S_SET_VALUE (sym, frag_now_fix ());
4506   S_SET_STORAGE_CLASS (sym, C_FCN);
4507   S_SET_NUMBER_AUXILIARY (sym, 1);
4508   SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4509   symbol_get_tc (sym)->output = 1;
4510 
4511   ppc_frob_label (sym);
4512 
4513   demand_empty_rest_of_line ();
4514 }
4515 
4516 /* The .bi and .ei pseudo-ops.  These take a string argument and
4517    generates a C_BINCL or C_EINCL symbol, which goes at the start of
4518    the symbol list.  The value of .bi will be know when the next .bf
4519    is encountered.  */
4520 
4521 static void
4522 ppc_biei (int ei)
4523 {
4524   static symbolS *last_biei;
4525 
4526   char *name;
4527   int len;
4528   symbolS *sym;
4529   symbolS *look;
4530 
4531   name = demand_copy_C_string (&len);
4532 
4533   /* The value of these symbols is actually file offset.  Here we set
4534      the value to the index into the line number entries.  In
4535      ppc_frob_symbols we set the fix_line field, which will cause BFD
4536      to do the right thing.  */
4537 
4538   sym = symbol_make (name);
4539   /* obj-coff.c currently only handles line numbers correctly in the
4540      .text section.  */
4541   S_SET_SEGMENT (sym, text_section);
4542   S_SET_VALUE (sym, coff_n_line_nos);
4543   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4544 
4545   S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4546   symbol_get_tc (sym)->output = 1;
4547 
4548   /* Save bi.  */
4549   if (ei)
4550     saved_bi_sym = 0;
4551   else
4552     saved_bi_sym = sym;
4553 
4554   for (look = last_biei ? last_biei : symbol_rootP;
4555        (look != (symbolS *) NULL
4556 	&& (S_GET_STORAGE_CLASS (look) == C_FILE
4557 	    || S_GET_STORAGE_CLASS (look) == C_BINCL
4558 	    || S_GET_STORAGE_CLASS (look) == C_EINCL));
4559        look = symbol_next (look))
4560     ;
4561   if (look != (symbolS *) NULL)
4562     {
4563       symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4564       symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4565       last_biei = sym;
4566     }
4567 
4568   demand_empty_rest_of_line ();
4569 }
4570 
4571 /* The .bs pseudo-op.  This generates a C_BSTAT symbol named ".bs".
4572    There is one argument, which is a csect symbol.  The value of the
4573    .bs symbol is the index of this csect symbol.  */
4574 
4575 static void
4576 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4577 {
4578   char *name;
4579   char endc;
4580   symbolS *csect;
4581   symbolS *sym;
4582 
4583   if (ppc_current_block != NULL)
4584     as_bad (_("nested .bs blocks"));
4585 
4586   endc = get_symbol_name (&name);
4587 
4588   csect = symbol_find_or_make (name);
4589 
4590   (void) restore_line_pointer (endc);
4591 
4592   sym = symbol_make (".bs");
4593   S_SET_SEGMENT (sym, now_seg);
4594   S_SET_STORAGE_CLASS (sym, C_BSTAT);
4595   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4596   symbol_get_tc (sym)->output = 1;
4597 
4598   symbol_get_tc (sym)->within = csect;
4599 
4600   ppc_frob_label (sym);
4601 
4602   ppc_current_block = sym;
4603 
4604   demand_empty_rest_of_line ();
4605 }
4606 
4607 /* The .es pseudo-op.  Generate a C_ESTART symbol named .es.  */
4608 
4609 static void
4610 ppc_es (int ignore ATTRIBUTE_UNUSED)
4611 {
4612   symbolS *sym;
4613 
4614   if (ppc_current_block == NULL)
4615     as_bad (_(".es without preceding .bs"));
4616 
4617   sym = symbol_make (".es");
4618   S_SET_SEGMENT (sym, now_seg);
4619   S_SET_STORAGE_CLASS (sym, C_ESTAT);
4620   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4621   symbol_get_tc (sym)->output = 1;
4622 
4623   ppc_frob_label (sym);
4624 
4625   ppc_current_block = NULL;
4626 
4627   demand_empty_rest_of_line ();
4628 }
4629 
4630 /* The .bb pseudo-op.  Generate a C_BLOCK symbol named .bb, with a
4631    line number.  */
4632 
4633 static void
4634 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4635 {
4636   symbolS *sym;
4637 
4638   sym = symbol_make (".bb");
4639   S_SET_SEGMENT (sym, text_section);
4640   symbol_set_frag (sym, frag_now);
4641   S_SET_VALUE (sym, frag_now_fix ());
4642   S_SET_STORAGE_CLASS (sym, C_BLOCK);
4643 
4644   S_SET_NUMBER_AUXILIARY (sym, 1);
4645   SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4646 
4647   symbol_get_tc (sym)->output = 1;
4648 
4649   SF_SET_PROCESS (sym);
4650 
4651   ppc_frob_label (sym);
4652 
4653   demand_empty_rest_of_line ();
4654 }
4655 
4656 /* The .eb pseudo-op.  Generate a C_BLOCK symbol named .eb, with a
4657    line number.  */
4658 
4659 static void
4660 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4661 {
4662   symbolS *sym;
4663 
4664   sym = symbol_make (".eb");
4665   S_SET_SEGMENT (sym, text_section);
4666   symbol_set_frag (sym, frag_now);
4667   S_SET_VALUE (sym, frag_now_fix ());
4668   S_SET_STORAGE_CLASS (sym, C_BLOCK);
4669   S_SET_NUMBER_AUXILIARY (sym, 1);
4670   SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4671   symbol_get_tc (sym)->output = 1;
4672 
4673   SF_SET_PROCESS (sym);
4674 
4675   ppc_frob_label (sym);
4676 
4677   demand_empty_rest_of_line ();
4678 }
4679 
4680 /* The .bc pseudo-op.  This just creates a C_BCOMM symbol with a
4681    specified name.  */
4682 
4683 static void
4684 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4685 {
4686   char *name;
4687   int len;
4688   symbolS *sym;
4689 
4690   name = demand_copy_C_string (&len);
4691   sym = symbol_make (name);
4692   S_SET_SEGMENT (sym, ppc_coff_debug_section);
4693   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4694   S_SET_STORAGE_CLASS (sym, C_BCOMM);
4695   S_SET_VALUE (sym, 0);
4696   symbol_get_tc (sym)->output = 1;
4697 
4698   ppc_frob_label (sym);
4699 
4700   demand_empty_rest_of_line ();
4701 }
4702 
4703 /* The .ec pseudo-op.  This just creates a C_ECOMM symbol.  */
4704 
4705 static void
4706 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4707 {
4708   symbolS *sym;
4709 
4710   sym = symbol_make (".ec");
4711   S_SET_SEGMENT (sym, ppc_coff_debug_section);
4712   symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4713   S_SET_STORAGE_CLASS (sym, C_ECOMM);
4714   S_SET_VALUE (sym, 0);
4715   symbol_get_tc (sym)->output = 1;
4716 
4717   ppc_frob_label (sym);
4718 
4719   demand_empty_rest_of_line ();
4720 }
4721 
4722 /* The .toc pseudo-op.  Switch to the .toc subsegment.  */
4723 
4724 static void
4725 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4726 {
4727   if (ppc_toc_csect != (symbolS *) NULL)
4728     subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4729   else
4730     {
4731       subsegT subseg;
4732       symbolS *sym;
4733       symbolS *list;
4734 
4735       subseg = ppc_data_subsegment;
4736       ++ppc_data_subsegment;
4737 
4738       subseg_new (segment_name (data_section), subseg);
4739       ppc_toc_frag = frag_now;
4740 
4741       sym = symbol_find_or_make ("TOC[TC0]");
4742       symbol_set_frag (sym, frag_now);
4743       S_SET_SEGMENT (sym, data_section);
4744       S_SET_VALUE (sym, (valueT) frag_now_fix ());
4745       symbol_get_tc (sym)->subseg = subseg;
4746       symbol_get_tc (sym)->output = 1;
4747       symbol_get_tc (sym)->within = sym;
4748 
4749       ppc_toc_csect = sym;
4750 
4751       for (list = ppc_data_csects;
4752 	   symbol_get_tc (list)->next != (symbolS *) NULL;
4753 	   list = symbol_get_tc (list)->next)
4754 	;
4755       symbol_get_tc (list)->next = sym;
4756 
4757       symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4758       symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4759 		     &symbol_lastP);
4760     }
4761 
4762   ppc_current_csect = ppc_toc_csect;
4763 
4764   demand_empty_rest_of_line ();
4765 }
4766 
4767 /* The AIX assembler automatically aligns the operands of a .long or
4768    .short pseudo-op, and we want to be compatible.  */
4769 
4770 static void
4771 ppc_xcoff_cons (int log_size)
4772 {
4773   frag_align (log_size, 0, 0);
4774   record_alignment (now_seg, log_size);
4775   cons (1 << log_size);
4776 }
4777 
4778 static void
4779 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4780 {
4781   expressionS exp;
4782   int byte_count;
4783 
4784   (void) expression (&exp);
4785 
4786   if (exp.X_op != O_constant)
4787     {
4788       as_bad (_("non-constant byte count"));
4789       return;
4790     }
4791 
4792   byte_count = exp.X_add_number;
4793 
4794   if (*input_line_pointer != ',')
4795     {
4796       as_bad (_("missing value"));
4797       return;
4798     }
4799 
4800   ++input_line_pointer;
4801   cons (byte_count);
4802 }
4803 
4804 void
4805 ppc_xcoff_end (void)
4806 {
4807   int i;
4808 
4809   for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4810     {
4811       struct dw_section *dws = &dw_sections[i];
4812       struct dw_subsection *dwss;
4813 
4814       if (dws->anon_subseg)
4815         {
4816           dwss = dws->anon_subseg;
4817           dwss->link = dws->list_subseg;
4818         }
4819       else
4820         dwss = dws->list_subseg;
4821 
4822       for (; dwss != NULL; dwss = dwss->link)
4823         if (dwss->end_exp.X_add_symbol != NULL)
4824           {
4825             subseg_set (dws->sect, dwss->subseg);
4826             symbol_set_value_now (dwss->end_exp.X_add_symbol);
4827           }
4828     }
4829 }
4830 
4831 #endif /* OBJ_XCOFF */
4832 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4833 
4834 /* The .tc pseudo-op.  This is used when generating either XCOFF or
4835    ELF.  This takes two or more arguments.
4836 
4837    When generating XCOFF output, the first argument is the name to
4838    give to this location in the toc; this will be a symbol with class
4839    TC.  The rest of the arguments are N-byte values to actually put at
4840    this location in the TOC; often there is just one more argument, a
4841    relocatable symbol reference.  The size of the value to store
4842    depends on target word size.  A 32-bit target uses 4-byte values, a
4843    64-bit target uses 8-byte values.
4844 
4845    When not generating XCOFF output, the arguments are the same, but
4846    the first argument is simply ignored.  */
4847 
4848 static void
4849 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4850 {
4851 #ifdef OBJ_XCOFF
4852 
4853   /* Define the TOC symbol name.  */
4854   {
4855     char *name;
4856     char endc;
4857     symbolS *sym;
4858 
4859     if (ppc_toc_csect == (symbolS *) NULL
4860 	|| ppc_toc_csect != ppc_current_csect)
4861       {
4862 	as_bad (_(".tc not in .toc section"));
4863 	ignore_rest_of_line ();
4864 	return;
4865       }
4866 
4867     endc = get_symbol_name (&name);
4868 
4869     sym = symbol_find_or_make (name);
4870 
4871     (void) restore_line_pointer (endc);
4872 
4873     if (S_IS_DEFINED (sym))
4874       {
4875 	symbolS *label;
4876 
4877 	label = symbol_get_tc (ppc_current_csect)->within;
4878 	if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4879 	  {
4880 	    as_bad (_(".tc with no label"));
4881 	    ignore_rest_of_line ();
4882 	    return;
4883 	  }
4884 
4885 	S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4886 	symbol_set_frag (label, symbol_get_frag (sym));
4887 	S_SET_VALUE (label, S_GET_VALUE (sym));
4888 
4889 	while (! is_end_of_line[(unsigned char) *input_line_pointer])
4890 	  ++input_line_pointer;
4891 
4892 	return;
4893       }
4894 
4895     S_SET_SEGMENT (sym, now_seg);
4896     symbol_set_frag (sym, frag_now);
4897     S_SET_VALUE (sym, (valueT) frag_now_fix ());
4898     symbol_get_tc (sym)->symbol_class = XMC_TC;
4899     symbol_get_tc (sym)->output = 1;
4900 
4901     ppc_frob_label (sym);
4902   }
4903 
4904 #endif /* OBJ_XCOFF */
4905 #ifdef OBJ_ELF
4906   int align;
4907 
4908   /* Skip the TOC symbol name.  */
4909   while (is_part_of_name (*input_line_pointer)
4910 	 || *input_line_pointer == ' '
4911 	 || *input_line_pointer == '['
4912 	 || *input_line_pointer == ']'
4913 	 || *input_line_pointer == '{'
4914 	 || *input_line_pointer == '}')
4915     ++input_line_pointer;
4916 
4917   /* Align to a four/eight byte boundary.  */
4918   align = ppc_obj64 ? 3 : 2;
4919   frag_align (align, 0, 0);
4920   record_alignment (now_seg, align);
4921 #endif /* OBJ_ELF */
4922 
4923   if (*input_line_pointer != ',')
4924     demand_empty_rest_of_line ();
4925   else
4926     {
4927       ++input_line_pointer;
4928       cons (ppc_obj64 ? 8 : 4);
4929     }
4930 }
4931 
4932 /* Pseudo-op .machine.  */
4933 
4934 static void
4935 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4936 {
4937   char c;
4938   char *cpu_string;
4939 #define MAX_HISTORY 100
4940   static ppc_cpu_t *cpu_history;
4941   static int curr_hist;
4942 
4943   SKIP_WHITESPACE ();
4944 
4945   c = get_symbol_name (&cpu_string);
4946   cpu_string = xstrdup (cpu_string);
4947   (void) restore_line_pointer (c);
4948 
4949   if (cpu_string != NULL)
4950     {
4951       ppc_cpu_t old_cpu = ppc_cpu;
4952       ppc_cpu_t new_cpu;
4953       char *p;
4954 
4955       for (p = cpu_string; *p != 0; p++)
4956 	*p = TOLOWER (*p);
4957 
4958       if (strcmp (cpu_string, "push") == 0)
4959 	{
4960 	  if (cpu_history == NULL)
4961 	    cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
4962 
4963 	  if (curr_hist >= MAX_HISTORY)
4964 	    as_bad (_(".machine stack overflow"));
4965 	  else
4966 	    cpu_history[curr_hist++] = ppc_cpu;
4967 	}
4968       else if (strcmp (cpu_string, "pop") == 0)
4969 	{
4970 	  if (curr_hist <= 0)
4971 	    as_bad (_(".machine stack underflow"));
4972 	  else
4973 	    ppc_cpu = cpu_history[--curr_hist];
4974 	}
4975       else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4976 	ppc_cpu = new_cpu;
4977       else
4978 	as_bad (_("invalid machine `%s'"), cpu_string);
4979 
4980       if (ppc_cpu != old_cpu)
4981 	ppc_setup_opcodes ();
4982     }
4983 
4984   demand_empty_rest_of_line ();
4985 }
4986 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4987 
4988 #ifdef TE_PE
4989 
4990 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format.  */
4991 
4992 /* Set the current section.  */
4993 static void
4994 ppc_set_current_section (segT new)
4995 {
4996   ppc_previous_section = ppc_current_section;
4997   ppc_current_section = new;
4998 }
4999 
5000 /* pseudo-op: .previous
5001    behaviour: toggles the current section with the previous section.
5002    errors:    None
5003    warnings:  "No previous section"  */
5004 
5005 static void
5006 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5007 {
5008   if (ppc_previous_section == NULL)
5009     {
5010       as_warn (_("no previous section to return to, ignored."));
5011       return;
5012     }
5013 
5014   subseg_set (ppc_previous_section, 0);
5015 
5016   ppc_set_current_section (ppc_previous_section);
5017 }
5018 
5019 /* pseudo-op: .pdata
5020    behaviour: predefined read only data section
5021 	      double word aligned
5022    errors:    None
5023    warnings:  None
5024    initial:   .section .pdata "adr3"
5025 	      a - don't know -- maybe a misprint
5026 	      d - initialized data
5027 	      r - readable
5028 	      3 - double word aligned (that would be 4 byte boundary)
5029 
5030    commentary:
5031    Tag index tables (also known as the function table) for exception
5032    handling, debugging, etc.  */
5033 
5034 static void
5035 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5036 {
5037   if (pdata_section == 0)
5038     {
5039       pdata_section = subseg_new (".pdata", 0);
5040 
5041       bfd_set_section_flags (stdoutput, pdata_section,
5042 			     (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5043 			      | SEC_READONLY | SEC_DATA ));
5044 
5045       bfd_set_section_alignment (stdoutput, pdata_section, 2);
5046     }
5047   else
5048     {
5049       pdata_section = subseg_new (".pdata", 0);
5050     }
5051   ppc_set_current_section (pdata_section);
5052 }
5053 
5054 /* pseudo-op: .ydata
5055    behaviour: predefined read only data section
5056 	      double word aligned
5057    errors:    None
5058    warnings:  None
5059    initial:   .section .ydata "drw3"
5060 	      a - don't know -- maybe a misprint
5061 	      d - initialized data
5062 	      r - readable
5063 	      3 - double word aligned (that would be 4 byte boundary)
5064    commentary:
5065    Tag tables (also known as the scope table) for exception handling,
5066    debugging, etc.  */
5067 
5068 static void
5069 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5070 {
5071   if (ydata_section == 0)
5072     {
5073       ydata_section = subseg_new (".ydata", 0);
5074       bfd_set_section_flags (stdoutput, ydata_section,
5075 			     (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5076 			      | SEC_READONLY | SEC_DATA ));
5077 
5078       bfd_set_section_alignment (stdoutput, ydata_section, 3);
5079     }
5080   else
5081     {
5082       ydata_section = subseg_new (".ydata", 0);
5083     }
5084   ppc_set_current_section (ydata_section);
5085 }
5086 
5087 /* pseudo-op: .reldata
5088    behaviour: predefined read write data section
5089 	      double word aligned (4-byte)
5090 	      FIXME: relocation is applied to it
5091 	      FIXME: what's the difference between this and .data?
5092    errors:    None
5093    warnings:  None
5094    initial:   .section .reldata "drw3"
5095 	      d - initialized data
5096 	      r - readable
5097 	      w - writeable
5098 	      3 - double word aligned (that would be 8 byte boundary)
5099 
5100    commentary:
5101    Like .data, but intended to hold data subject to relocation, such as
5102    function descriptors, etc.  */
5103 
5104 static void
5105 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5106 {
5107   if (reldata_section == 0)
5108     {
5109       reldata_section = subseg_new (".reldata", 0);
5110 
5111       bfd_set_section_flags (stdoutput, reldata_section,
5112 			     (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5113 			      | SEC_DATA));
5114 
5115       bfd_set_section_alignment (stdoutput, reldata_section, 2);
5116     }
5117   else
5118     {
5119       reldata_section = subseg_new (".reldata", 0);
5120     }
5121   ppc_set_current_section (reldata_section);
5122 }
5123 
5124 /* pseudo-op: .rdata
5125    behaviour: predefined read only data section
5126 	      double word aligned
5127    errors:    None
5128    warnings:  None
5129    initial:   .section .rdata "dr3"
5130 	      d - initialized data
5131 	      r - readable
5132 	      3 - double word aligned (that would be 4 byte boundary)  */
5133 
5134 static void
5135 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5136 {
5137   if (rdata_section == 0)
5138     {
5139       rdata_section = subseg_new (".rdata", 0);
5140       bfd_set_section_flags (stdoutput, rdata_section,
5141 			     (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5142 			      | SEC_READONLY | SEC_DATA ));
5143 
5144       bfd_set_section_alignment (stdoutput, rdata_section, 2);
5145     }
5146   else
5147     {
5148       rdata_section = subseg_new (".rdata", 0);
5149     }
5150   ppc_set_current_section (rdata_section);
5151 }
5152 
5153 /* pseudo-op: .ualong
5154    behaviour: much like .int, with the exception that no alignment is
5155 	      performed.
5156 	      FIXME: test the alignment statement
5157    errors:    None
5158    warnings:  None  */
5159 
5160 static void
5161 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5162 {
5163   /* Try for long.  */
5164   cons (4);
5165 }
5166 
5167 /* pseudo-op: .znop  <symbol name>
5168    behaviour: Issue a nop instruction
5169 	      Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5170 	      the supplied symbol name.
5171    errors:    None
5172    warnings:  Missing symbol name  */
5173 
5174 static void
5175 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5176 {
5177   unsigned long insn;
5178   const struct powerpc_opcode *opcode;
5179   char *f;
5180   symbolS *sym;
5181   char *symbol_name;
5182   char c;
5183   char *name;
5184 
5185   /* Strip out the symbol name.  */
5186   c = get_symbol_name (&symbol_name);
5187 
5188   name = xstrdup (symbol_name);
5189 
5190   sym = symbol_find_or_make (name);
5191 
5192   *input_line_pointer = c;
5193 
5194   SKIP_WHITESPACE_AFTER_NAME ();
5195 
5196   /* Look up the opcode in the hash table.  */
5197   opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5198 
5199   /* Stick in the nop.  */
5200   insn = opcode->opcode;
5201 
5202   /* Write out the instruction.  */
5203   f = frag_more (4);
5204   md_number_to_chars (f, insn, 4);
5205   fix_new (frag_now,
5206 	   f - frag_now->fr_literal,
5207 	   4,
5208 	   sym,
5209 	   0,
5210 	   0,
5211 	   BFD_RELOC_16_GOT_PCREL);
5212 
5213 }
5214 
5215 /* pseudo-op:
5216    behaviour:
5217    errors:
5218    warnings:  */
5219 
5220 static void
5221 ppc_pe_comm (int lcomm)
5222 {
5223   char *name;
5224   char c;
5225   char *p;
5226   offsetT temp;
5227   symbolS *symbolP;
5228   offsetT align;
5229 
5230   c = get_symbol_name (&name);
5231 
5232   /* just after name is now '\0'.  */
5233   p = input_line_pointer;
5234   *p = c;
5235   SKIP_WHITESPACE_AFTER_NAME ();
5236   if (*input_line_pointer != ',')
5237     {
5238       as_bad (_("expected comma after symbol-name: rest of line ignored."));
5239       ignore_rest_of_line ();
5240       return;
5241     }
5242 
5243   input_line_pointer++;		/* skip ',' */
5244   if ((temp = get_absolute_expression ()) < 0)
5245     {
5246       as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5247       ignore_rest_of_line ();
5248       return;
5249     }
5250 
5251   if (! lcomm)
5252     {
5253       /* The third argument to .comm is the alignment.  */
5254       if (*input_line_pointer != ',')
5255 	align = 3;
5256       else
5257 	{
5258 	  ++input_line_pointer;
5259 	  align = get_absolute_expression ();
5260 	  if (align <= 0)
5261 	    {
5262 	      as_warn (_("ignoring bad alignment"));
5263 	      align = 3;
5264 	    }
5265 	}
5266     }
5267 
5268   *p = 0;
5269   symbolP = symbol_find_or_make (name);
5270 
5271   *p = c;
5272   if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5273     {
5274       as_bad (_("ignoring attempt to re-define symbol `%s'."),
5275 	      S_GET_NAME (symbolP));
5276       ignore_rest_of_line ();
5277       return;
5278     }
5279 
5280   if (S_GET_VALUE (symbolP))
5281     {
5282       if (S_GET_VALUE (symbolP) != (valueT) temp)
5283 	as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5284 		S_GET_NAME (symbolP),
5285 		(long) S_GET_VALUE (symbolP),
5286 		(long) temp);
5287     }
5288   else
5289     {
5290       S_SET_VALUE (symbolP, (valueT) temp);
5291       S_SET_EXTERNAL (symbolP);
5292       S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5293     }
5294 
5295   demand_empty_rest_of_line ();
5296 }
5297 
5298 /*
5299  * implement the .section pseudo op:
5300  *	.section name {, "flags"}
5301  *                ^         ^
5302  *                |         +--- optional flags: 'b' for bss
5303  *                |                              'i' for info
5304  *                +-- section name               'l' for lib
5305  *                                               'n' for noload
5306  *                                               'o' for over
5307  *                                               'w' for data
5308  *						 'd' (apparently m88k for data)
5309  *                                               'x' for text
5310  * But if the argument is not a quoted string, treat it as a
5311  * subsegment number.
5312  *
5313  * FIXME: this is a copy of the section processing from obj-coff.c, with
5314  * additions/changes for the moto-pas assembler support. There are three
5315  * categories:
5316  *
5317  * FIXME: I just noticed this. This doesn't work at all really. It it
5318  *        setting bits that bfd probably neither understands or uses. The
5319  *        correct approach (?) will have to incorporate extra fields attached
5320  *        to the section to hold the system specific stuff. (krk)
5321  *
5322  * Section Contents:
5323  * 'a' - unknown - referred to in documentation, but no definition supplied
5324  * 'c' - section has code
5325  * 'd' - section has initialized data
5326  * 'u' - section has uninitialized data
5327  * 'i' - section contains directives (info)
5328  * 'n' - section can be discarded
5329  * 'R' - remove section at link time
5330  *
5331  * Section Protection:
5332  * 'r' - section is readable
5333  * 'w' - section is writeable
5334  * 'x' - section is executable
5335  * 's' - section is sharable
5336  *
5337  * Section Alignment:
5338  * '0' - align to byte boundary
5339  * '1' - align to halfword undary
5340  * '2' - align to word boundary
5341  * '3' - align to doubleword boundary
5342  * '4' - align to quadword boundary
5343  * '5' - align to 32 byte boundary
5344  * '6' - align to 64 byte boundary
5345  *
5346  */
5347 
5348 void
5349 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5350 {
5351   /* Strip out the section name.  */
5352   char *section_name;
5353   char c;
5354   char *name;
5355   unsigned int exp;
5356   flagword flags;
5357   segT sec;
5358   int align;
5359 
5360   c = get_symbol_name (&section_name);
5361 
5362   name = xstrdup (section_name);
5363 
5364   *input_line_pointer = c;
5365 
5366   SKIP_WHITESPACE_AFTER_NAME ();
5367 
5368   exp = 0;
5369   flags = SEC_NO_FLAGS;
5370 
5371   if (strcmp (name, ".idata$2") == 0)
5372     {
5373       align = 0;
5374     }
5375   else if (strcmp (name, ".idata$3") == 0)
5376     {
5377       align = 0;
5378     }
5379   else if (strcmp (name, ".idata$4") == 0)
5380     {
5381       align = 2;
5382     }
5383   else if (strcmp (name, ".idata$5") == 0)
5384     {
5385       align = 2;
5386     }
5387   else if (strcmp (name, ".idata$6") == 0)
5388     {
5389       align = 1;
5390     }
5391   else
5392     /* Default alignment to 16 byte boundary.  */
5393     align = 4;
5394 
5395   if (*input_line_pointer == ',')
5396     {
5397       ++input_line_pointer;
5398       SKIP_WHITESPACE ();
5399       if (*input_line_pointer != '"')
5400 	exp = get_absolute_expression ();
5401       else
5402 	{
5403 	  ++input_line_pointer;
5404 	  while (*input_line_pointer != '"'
5405 		 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5406 	    {
5407 	      switch (*input_line_pointer)
5408 		{
5409 		  /* Section Contents */
5410 		case 'a': /* unknown */
5411 		  as_bad (_("unsupported section attribute -- 'a'"));
5412 		  break;
5413 		case 'c': /* code section */
5414 		  flags |= SEC_CODE;
5415 		  break;
5416 		case 'd': /* section has initialized data */
5417 		  flags |= SEC_DATA;
5418 		  break;
5419 		case 'u': /* section has uninitialized data */
5420 		  /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5421 		     in winnt.h */
5422 		  flags |= SEC_ROM;
5423 		  break;
5424 		case 'i': /* section contains directives (info) */
5425 		  /* FIXME: This is IMAGE_SCN_LNK_INFO
5426 		     in winnt.h */
5427 		  flags |= SEC_HAS_CONTENTS;
5428 		  break;
5429 		case 'n': /* section can be discarded */
5430 		  flags &=~ SEC_LOAD;
5431 		  break;
5432 		case 'R': /* Remove section at link time */
5433 		  flags |= SEC_NEVER_LOAD;
5434 		  break;
5435 #if IFLICT_BRAIN_DAMAGE
5436 		  /* Section Protection */
5437 		case 'r': /* section is readable */
5438 		  flags |= IMAGE_SCN_MEM_READ;
5439 		  break;
5440 		case 'w': /* section is writeable */
5441 		  flags |= IMAGE_SCN_MEM_WRITE;
5442 		  break;
5443 		case 'x': /* section is executable */
5444 		  flags |= IMAGE_SCN_MEM_EXECUTE;
5445 		  break;
5446 		case 's': /* section is sharable */
5447 		  flags |= IMAGE_SCN_MEM_SHARED;
5448 		  break;
5449 
5450 		  /* Section Alignment */
5451 		case '0': /* align to byte boundary */
5452 		  flags |= IMAGE_SCN_ALIGN_1BYTES;
5453 		  align = 0;
5454 		  break;
5455 		case '1':  /* align to halfword boundary */
5456 		  flags |= IMAGE_SCN_ALIGN_2BYTES;
5457 		  align = 1;
5458 		  break;
5459 		case '2':  /* align to word boundary */
5460 		  flags |= IMAGE_SCN_ALIGN_4BYTES;
5461 		  align = 2;
5462 		  break;
5463 		case '3':  /* align to doubleword boundary */
5464 		  flags |= IMAGE_SCN_ALIGN_8BYTES;
5465 		  align = 3;
5466 		  break;
5467 		case '4':  /* align to quadword boundary */
5468 		  flags |= IMAGE_SCN_ALIGN_16BYTES;
5469 		  align = 4;
5470 		  break;
5471 		case '5':  /* align to 32 byte boundary */
5472 		  flags |= IMAGE_SCN_ALIGN_32BYTES;
5473 		  align = 5;
5474 		  break;
5475 		case '6':  /* align to 64 byte boundary */
5476 		  flags |= IMAGE_SCN_ALIGN_64BYTES;
5477 		  align = 6;
5478 		  break;
5479 #endif
5480 		default:
5481 		  as_bad (_("unknown section attribute '%c'"),
5482 			  *input_line_pointer);
5483 		  break;
5484 		}
5485 	      ++input_line_pointer;
5486 	    }
5487 	  if (*input_line_pointer == '"')
5488 	    ++input_line_pointer;
5489 	}
5490     }
5491 
5492   sec = subseg_new (name, (subsegT) exp);
5493 
5494   ppc_set_current_section (sec);
5495 
5496   if (flags != SEC_NO_FLAGS)
5497     {
5498       if (! bfd_set_section_flags (stdoutput, sec, flags))
5499 	as_bad (_("error setting flags for \"%s\": %s"),
5500 		bfd_section_name (stdoutput, sec),
5501 		bfd_errmsg (bfd_get_error ()));
5502     }
5503 
5504   bfd_set_section_alignment (stdoutput, sec, align);
5505 }
5506 
5507 static void
5508 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5509 {
5510   char *name;
5511   char endc;
5512   symbolS *ext_sym;
5513 
5514   endc = get_symbol_name (&name);
5515 
5516   ext_sym = symbol_find_or_make (name);
5517 
5518   (void) restore_line_pointer (endc);
5519 
5520   S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5521   SF_SET_FUNCTION (ext_sym);
5522   SF_SET_PROCESS (ext_sym);
5523   coff_add_linesym (ext_sym);
5524 
5525   demand_empty_rest_of_line ();
5526 }
5527 
5528 static void
5529 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5530 {
5531   if (tocdata_section == 0)
5532     {
5533       tocdata_section = subseg_new (".tocd", 0);
5534       /* FIXME: section flags won't work.  */
5535       bfd_set_section_flags (stdoutput, tocdata_section,
5536 			     (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5537 			      | SEC_READONLY | SEC_DATA));
5538 
5539       bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5540     }
5541   else
5542     {
5543       rdata_section = subseg_new (".tocd", 0);
5544     }
5545 
5546   ppc_set_current_section (tocdata_section);
5547 
5548   demand_empty_rest_of_line ();
5549 }
5550 
5551 /* Don't adjust TOC relocs to use the section symbol.  */
5552 
5553 int
5554 ppc_pe_fix_adjustable (fixS *fix)
5555 {
5556   return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5557 }
5558 
5559 #endif
5560 
5561 #ifdef OBJ_XCOFF
5562 
5563 /* XCOFF specific symbol and file handling.  */
5564 
5565 /* Canonicalize the symbol name.  We use the to force the suffix, if
5566    any, to use square brackets, and to be in upper case.  */
5567 
5568 char *
5569 ppc_canonicalize_symbol_name (char *name)
5570 {
5571   char *s;
5572 
5573   if (ppc_stab_symbol)
5574     return name;
5575 
5576   for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5577     ;
5578   if (*s != '\0')
5579     {
5580       char brac;
5581 
5582       if (*s == '[')
5583 	brac = ']';
5584       else
5585 	{
5586 	  *s = '[';
5587 	  brac = '}';
5588 	}
5589 
5590       for (s++; *s != '\0' && *s != brac; s++)
5591 	*s = TOUPPER (*s);
5592 
5593       if (*s == '\0' || s[1] != '\0')
5594 	as_bad (_("bad symbol suffix"));
5595 
5596       *s = ']';
5597     }
5598 
5599   return name;
5600 }
5601 
5602 /* Set the class of a symbol based on the suffix, if any.  This is
5603    called whenever a new symbol is created.  */
5604 
5605 void
5606 ppc_symbol_new_hook (symbolS *sym)
5607 {
5608   struct ppc_tc_sy *tc;
5609   const char *s;
5610 
5611   tc = symbol_get_tc (sym);
5612   tc->next = NULL;
5613   tc->output = 0;
5614   tc->symbol_class = -1;
5615   tc->real_name = NULL;
5616   tc->subseg = 0;
5617   tc->align = 0;
5618   tc->u.size = NULL;
5619   tc->u.dw = NULL;
5620   tc->within = NULL;
5621 
5622   if (ppc_stab_symbol)
5623     return;
5624 
5625   s = strchr (S_GET_NAME (sym), '[');
5626   if (s == (const char *) NULL)
5627     {
5628       /* There is no suffix.  */
5629       return;
5630     }
5631 
5632   ++s;
5633 
5634   switch (s[0])
5635     {
5636     case 'B':
5637       if (strcmp (s, "BS]") == 0)
5638 	tc->symbol_class = XMC_BS;
5639       break;
5640     case 'D':
5641       if (strcmp (s, "DB]") == 0)
5642 	tc->symbol_class = XMC_DB;
5643       else if (strcmp (s, "DS]") == 0)
5644 	tc->symbol_class = XMC_DS;
5645       break;
5646     case 'G':
5647       if (strcmp (s, "GL]") == 0)
5648 	tc->symbol_class = XMC_GL;
5649       break;
5650     case 'P':
5651       if (strcmp (s, "PR]") == 0)
5652 	tc->symbol_class = XMC_PR;
5653       break;
5654     case 'R':
5655       if (strcmp (s, "RO]") == 0)
5656 	tc->symbol_class = XMC_RO;
5657       else if (strcmp (s, "RW]") == 0)
5658 	tc->symbol_class = XMC_RW;
5659       break;
5660     case 'S':
5661       if (strcmp (s, "SV]") == 0)
5662 	tc->symbol_class = XMC_SV;
5663       break;
5664     case 'T':
5665       if (strcmp (s, "TC]") == 0)
5666 	tc->symbol_class = XMC_TC;
5667       else if (strcmp (s, "TI]") == 0)
5668 	tc->symbol_class = XMC_TI;
5669       else if (strcmp (s, "TB]") == 0)
5670 	tc->symbol_class = XMC_TB;
5671       else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5672 	tc->symbol_class = XMC_TC0;
5673       break;
5674     case 'U':
5675       if (strcmp (s, "UA]") == 0)
5676 	tc->symbol_class = XMC_UA;
5677       else if (strcmp (s, "UC]") == 0)
5678 	tc->symbol_class = XMC_UC;
5679       break;
5680     case 'X':
5681       if (strcmp (s, "XO]") == 0)
5682 	tc->symbol_class = XMC_XO;
5683       break;
5684     }
5685 
5686   if (tc->symbol_class == -1)
5687     as_bad (_("unrecognized symbol suffix"));
5688 }
5689 
5690 /* Set the class of a label based on where it is defined.  This
5691    handles symbols without suffixes.  Also, move the symbol so that it
5692    follows the csect symbol.  */
5693 
5694 void
5695 ppc_frob_label (symbolS *sym)
5696 {
5697   if (ppc_current_csect != (symbolS *) NULL)
5698     {
5699       if (symbol_get_tc (sym)->symbol_class == -1)
5700 	symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5701 
5702       symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5703       symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5704 		     &symbol_rootP, &symbol_lastP);
5705       symbol_get_tc (ppc_current_csect)->within = sym;
5706       symbol_get_tc (sym)->within = ppc_current_csect;
5707     }
5708 
5709 #ifdef OBJ_ELF
5710   dwarf2_emit_label (sym);
5711 #endif
5712 }
5713 
5714 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5715    seen.  It tells ppc_adjust_symtab whether it needs to look through
5716    the symbols.  */
5717 
5718 static bfd_boolean ppc_saw_abs;
5719 
5720 /* Change the name of a symbol just before writing it out.  Set the
5721    real name if the .rename pseudo-op was used.  Otherwise, remove any
5722    class suffix.  Return 1 if the symbol should not be included in the
5723    symbol table.  */
5724 
5725 int
5726 ppc_frob_symbol (symbolS *sym)
5727 {
5728   static symbolS *ppc_last_function;
5729   static symbolS *set_end;
5730 
5731   /* Discard symbols that should not be included in the output symbol
5732      table.  */
5733   if (! symbol_used_in_reloc_p (sym)
5734       && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5735 	  || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5736 	      && ! symbol_get_tc (sym)->output
5737 	      && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5738     return 1;
5739 
5740   /* This one will disappear anyway.  Don't make a csect sym for it.  */
5741   if (sym == abs_section_sym)
5742     return 1;
5743 
5744   if (symbol_get_tc (sym)->real_name != (char *) NULL)
5745     S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5746   else
5747     {
5748       const char *name;
5749       const char *s;
5750 
5751       name = S_GET_NAME (sym);
5752       s = strchr (name, '[');
5753       if (s != (char *) NULL)
5754 	{
5755 	  unsigned int len;
5756 	  char *snew;
5757 
5758 	  len = s - name;
5759 	  snew = xstrndup (name, len);
5760 
5761 	  S_SET_NAME (sym, snew);
5762 	}
5763     }
5764 
5765   if (set_end != (symbolS *) NULL)
5766     {
5767       SA_SET_SYM_ENDNDX (set_end, sym);
5768       set_end = NULL;
5769     }
5770 
5771   if (SF_GET_FUNCTION (sym))
5772     {
5773       if (ppc_last_function != (symbolS *) NULL)
5774 	as_bad (_("two .function pseudo-ops with no intervening .ef"));
5775       ppc_last_function = sym;
5776       if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5777 	{
5778 	  resolve_symbol_value (symbol_get_tc (sym)->u.size);
5779 	  SA_SET_SYM_FSIZE (sym,
5780 			    (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5781 	}
5782     }
5783   else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5784 	   && strcmp (S_GET_NAME (sym), ".ef") == 0)
5785     {
5786       if (ppc_last_function == (symbolS *) NULL)
5787 	as_bad (_(".ef with no preceding .function"));
5788       else
5789 	{
5790 	  set_end = ppc_last_function;
5791 	  ppc_last_function = NULL;
5792 
5793 	  /* We don't have a C_EFCN symbol, but we need to force the
5794 	     COFF backend to believe that it has seen one.  */
5795 	  coff_last_function = NULL;
5796 	}
5797     }
5798 
5799   if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5800       && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5801       && S_GET_STORAGE_CLASS (sym) != C_FILE
5802       && S_GET_STORAGE_CLASS (sym) != C_FCN
5803       && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5804       && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5805       && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5806       && S_GET_STORAGE_CLASS (sym) != C_BINCL
5807       && S_GET_STORAGE_CLASS (sym) != C_EINCL
5808       && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5809     S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5810 
5811   if (S_GET_STORAGE_CLASS (sym) == C_EXT
5812       || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5813       || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5814     {
5815       int i;
5816       union internal_auxent *a;
5817 
5818       /* Create a csect aux.  */
5819       i = S_GET_NUMBER_AUXILIARY (sym);
5820       S_SET_NUMBER_AUXILIARY (sym, i + 1);
5821       a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5822       if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5823 	{
5824 	  /* This is the TOC table.  */
5825 	  know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5826 	  a->x_csect.x_scnlen.l = 0;
5827 	  a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5828 	}
5829       else if (symbol_get_tc (sym)->subseg != 0)
5830 	{
5831 	  /* This is a csect symbol.  x_scnlen is the size of the
5832 	     csect.  */
5833 	  if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5834 	    a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5835 						       S_GET_SEGMENT (sym))
5836 				     - S_GET_VALUE (sym));
5837 	  else
5838 	    {
5839 	      resolve_symbol_value (symbol_get_tc (sym)->next);
5840 	      a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5841 				       - S_GET_VALUE (sym));
5842 	    }
5843 	  a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5844 	}
5845       else if (S_GET_SEGMENT (sym) == bss_section)
5846 	{
5847 	  /* This is a common symbol.  */
5848 	  a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5849 	  a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5850 	  if (S_IS_EXTERNAL (sym))
5851 	    symbol_get_tc (sym)->symbol_class = XMC_RW;
5852 	  else
5853 	    symbol_get_tc (sym)->symbol_class = XMC_BS;
5854 	}
5855       else if (S_GET_SEGMENT (sym) == absolute_section)
5856 	{
5857 	  /* This is an absolute symbol.  The csect will be created by
5858 	     ppc_adjust_symtab.  */
5859 	  ppc_saw_abs = TRUE;
5860 	  a->x_csect.x_smtyp = XTY_LD;
5861 	  if (symbol_get_tc (sym)->symbol_class == -1)
5862 	    symbol_get_tc (sym)->symbol_class = XMC_XO;
5863 	}
5864       else if (! S_IS_DEFINED (sym))
5865 	{
5866 	  /* This is an external symbol.  */
5867 	  a->x_csect.x_scnlen.l = 0;
5868 	  a->x_csect.x_smtyp = XTY_ER;
5869 	}
5870       else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5871 	{
5872 	  symbolS *next;
5873 
5874 	  /* This is a TOC definition.  x_scnlen is the size of the
5875 	     TOC entry.  */
5876 	  next = symbol_next (sym);
5877 	  while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5878 	    next = symbol_next (next);
5879 	  if (next == (symbolS *) NULL
5880 	      || symbol_get_tc (next)->symbol_class != XMC_TC)
5881 	    {
5882 	      if (ppc_after_toc_frag == (fragS *) NULL)
5883 		a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5884 							   data_section)
5885 					 - S_GET_VALUE (sym));
5886 	      else
5887 		a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5888 					 - S_GET_VALUE (sym));
5889 	    }
5890 	  else
5891 	    {
5892 	      resolve_symbol_value (next);
5893 	      a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5894 				       - S_GET_VALUE (sym));
5895 	    }
5896 	  a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5897 	}
5898       else
5899 	{
5900 	  symbolS *csect;
5901 
5902 	  /* This is a normal symbol definition.  x_scnlen is the
5903 	     symbol index of the containing csect.  */
5904 	  if (S_GET_SEGMENT (sym) == text_section)
5905 	    csect = ppc_text_csects;
5906 	  else if (S_GET_SEGMENT (sym) == data_section)
5907 	    csect = ppc_data_csects;
5908 	  else
5909 	    abort ();
5910 
5911 	  /* Skip the initial dummy symbol.  */
5912 	  csect = symbol_get_tc (csect)->next;
5913 
5914 	  if (csect == (symbolS *) NULL)
5915 	    {
5916 	      as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5917 	      a->x_csect.x_scnlen.l = 0;
5918 	    }
5919 	  else
5920 	    {
5921 	      while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5922 		{
5923 		  resolve_symbol_value (symbol_get_tc (csect)->next);
5924 		  if (S_GET_VALUE (symbol_get_tc (csect)->next)
5925 		      > S_GET_VALUE (sym))
5926 		    break;
5927 		  csect = symbol_get_tc (csect)->next;
5928 		}
5929 
5930 	      a->x_csect.x_scnlen.p =
5931 		coffsymbol (symbol_get_bfdsym (csect))->native;
5932 	      coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5933 		1;
5934 	    }
5935 	  a->x_csect.x_smtyp = XTY_LD;
5936 	}
5937 
5938       a->x_csect.x_parmhash = 0;
5939       a->x_csect.x_snhash = 0;
5940       if (symbol_get_tc (sym)->symbol_class == -1)
5941 	a->x_csect.x_smclas = XMC_PR;
5942       else
5943 	a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5944       a->x_csect.x_stab = 0;
5945       a->x_csect.x_snstab = 0;
5946 
5947       /* Don't let the COFF backend resort these symbols.  */
5948       symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5949     }
5950   else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5951     {
5952       /* We want the value to be the symbol index of the referenced
5953 	 csect symbol.  BFD will do that for us if we set the right
5954 	 flags.  */
5955       asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5956       combined_entry_type *c = coffsymbol (bsym)->native;
5957 
5958       S_SET_VALUE (sym, (valueT) (size_t) c);
5959       coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5960     }
5961   else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5962     {
5963       symbolS *block;
5964       valueT base;
5965 
5966       block = symbol_get_tc (sym)->within;
5967       if (block)
5968         {
5969           /* The value is the offset from the enclosing csect.  */
5970           symbolS *csect;
5971 
5972           csect = symbol_get_tc (block)->within;
5973           resolve_symbol_value (csect);
5974           base = S_GET_VALUE (csect);
5975         }
5976       else
5977         base = 0;
5978 
5979       S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5980     }
5981   else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5982 	   || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5983     {
5984       /* We want the value to be a file offset into the line numbers.
5985 	 BFD will do that for us if we set the right flags.  We have
5986 	 already set the value correctly.  */
5987       coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5988     }
5989 
5990   return 0;
5991 }
5992 
5993 /* Adjust the symbol table.  This creates csect symbols for all
5994    absolute symbols.  */
5995 
5996 void
5997 ppc_adjust_symtab (void)
5998 {
5999   symbolS *sym;
6000 
6001   if (! ppc_saw_abs)
6002     return;
6003 
6004   for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6005     {
6006       symbolS *csect;
6007       int i;
6008       union internal_auxent *a;
6009 
6010       if (S_GET_SEGMENT (sym) != absolute_section)
6011 	continue;
6012 
6013       csect = symbol_create (".abs[XO]", absolute_section,
6014 			     S_GET_VALUE (sym), &zero_address_frag);
6015       symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6016       S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6017       i = S_GET_NUMBER_AUXILIARY (csect);
6018       S_SET_NUMBER_AUXILIARY (csect, i + 1);
6019       a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6020       a->x_csect.x_scnlen.l = 0;
6021       a->x_csect.x_smtyp = XTY_SD;
6022       a->x_csect.x_parmhash = 0;
6023       a->x_csect.x_snhash = 0;
6024       a->x_csect.x_smclas = XMC_XO;
6025       a->x_csect.x_stab = 0;
6026       a->x_csect.x_snstab = 0;
6027 
6028       symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6029 
6030       i = S_GET_NUMBER_AUXILIARY (sym);
6031       a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6032       a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6033       coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6034     }
6035 
6036   ppc_saw_abs = FALSE;
6037 }
6038 
6039 /* Set the VMA for a section.  This is called on all the sections in
6040    turn.  */
6041 
6042 void
6043 ppc_frob_section (asection *sec)
6044 {
6045   static bfd_vma vma = 0;
6046 
6047   /* Dwarf sections start at 0.  */
6048   if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6049     return;
6050 
6051   vma = md_section_align (sec, vma);
6052   bfd_set_section_vma (stdoutput, sec, vma);
6053   vma += bfd_section_size (stdoutput, sec);
6054 }
6055 
6056 #endif /* OBJ_XCOFF */
6057 
6058 const char *
6059 md_atof (int type, char *litp, int *sizep)
6060 {
6061   return ieee_md_atof (type, litp, sizep, target_big_endian);
6062 }
6063 
6064 /* Write a value out to the object file, using the appropriate
6065    endianness.  */
6066 
6067 void
6068 md_number_to_chars (char *buf, valueT val, int n)
6069 {
6070   if (target_big_endian)
6071     number_to_chars_bigendian (buf, val, n);
6072   else
6073     number_to_chars_littleendian (buf, val, n);
6074 }
6075 
6076 /* Align a section (I don't know why this is machine dependent).  */
6077 
6078 valueT
6079 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6080 {
6081 #ifdef OBJ_ELF
6082   return addr;
6083 #else
6084   int align = bfd_get_section_alignment (stdoutput, seg);
6085 
6086   return ((addr + (1 << align) - 1) & -(1 << align));
6087 #endif
6088 }
6089 
6090 /* We don't have any form of relaxing.  */
6091 
6092 int
6093 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6094 			       asection *seg ATTRIBUTE_UNUSED)
6095 {
6096   abort ();
6097   return 0;
6098 }
6099 
6100 /* Convert a machine dependent frag.  We never generate these.  */
6101 
6102 void
6103 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6104 		 asection *sec ATTRIBUTE_UNUSED,
6105 		 fragS *fragp ATTRIBUTE_UNUSED)
6106 {
6107   abort ();
6108 }
6109 
6110 /* We have no need to default values of symbols.  */
6111 
6112 symbolS *
6113 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6114 {
6115   return 0;
6116 }
6117 
6118 /* Functions concerning relocs.  */
6119 
6120 /* The location from which a PC relative jump should be calculated,
6121    given a PC relative reloc.  */
6122 
6123 long
6124 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6125 {
6126   return fixp->fx_frag->fr_address + fixp->fx_where;
6127 }
6128 
6129 #ifdef OBJ_XCOFF
6130 
6131 /* This is called to see whether a fixup should be adjusted to use a
6132    section symbol.  We take the opportunity to change a fixup against
6133    a symbol in the TOC subsegment into a reloc against the
6134    corresponding .tc symbol.  */
6135 
6136 int
6137 ppc_fix_adjustable (fixS *fix)
6138 {
6139   valueT val = resolve_symbol_value (fix->fx_addsy);
6140   segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6141   TC_SYMFIELD_TYPE *tc;
6142 
6143   if (symseg == absolute_section)
6144     return 0;
6145 
6146   /* Always adjust symbols in debugging sections.  */
6147   if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6148     return 1;
6149 
6150   if (ppc_toc_csect != (symbolS *) NULL
6151       && fix->fx_addsy != ppc_toc_csect
6152       && symseg == data_section
6153       && val >= ppc_toc_frag->fr_address
6154       && (ppc_after_toc_frag == (fragS *) NULL
6155 	  || val < ppc_after_toc_frag->fr_address))
6156     {
6157       symbolS *sy;
6158 
6159       for (sy = symbol_next (ppc_toc_csect);
6160 	   sy != (symbolS *) NULL;
6161 	   sy = symbol_next (sy))
6162 	{
6163 	  TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6164 
6165 	  if (sy_tc->symbol_class == XMC_TC0)
6166 	    continue;
6167 	  if (sy_tc->symbol_class != XMC_TC)
6168 	    break;
6169 	  if (val == resolve_symbol_value (sy))
6170 	    {
6171 	      fix->fx_addsy = sy;
6172 	      fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6173 	      return 0;
6174 	    }
6175 	}
6176 
6177       as_bad_where (fix->fx_file, fix->fx_line,
6178 		    _("symbol in .toc does not match any .tc"));
6179     }
6180 
6181   /* Possibly adjust the reloc to be against the csect.  */
6182   tc = symbol_get_tc (fix->fx_addsy);
6183   if (tc->subseg == 0
6184       && tc->symbol_class != XMC_TC0
6185       && tc->symbol_class != XMC_TC
6186       && symseg != bss_section
6187       /* Don't adjust if this is a reloc in the toc section.  */
6188       && (symseg != data_section
6189 	  || ppc_toc_csect == NULL
6190 	  || val < ppc_toc_frag->fr_address
6191 	  || (ppc_after_toc_frag != NULL
6192 	      && val >= ppc_after_toc_frag->fr_address)))
6193     {
6194       symbolS *csect = tc->within;
6195 
6196       /* If the symbol was not declared by a label (eg: a section symbol),
6197          use the section instead of the csect.  This doesn't happen in
6198          normal AIX assembly code.  */
6199       if (csect == NULL)
6200         csect = seg_info (symseg)->sym;
6201 
6202       fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6203       fix->fx_addsy = csect;
6204 
6205       return 0;
6206     }
6207 
6208   /* Adjust a reloc against a .lcomm symbol to be against the base
6209      .lcomm.  */
6210   if (symseg == bss_section
6211       && ! S_IS_EXTERNAL (fix->fx_addsy))
6212     {
6213       symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6214 
6215       fix->fx_offset += val - resolve_symbol_value (sy);
6216       fix->fx_addsy = sy;
6217     }
6218 
6219   return 0;
6220 }
6221 
6222 /* A reloc from one csect to another must be kept.  The assembler
6223    will, of course, keep relocs between sections, and it will keep
6224    absolute relocs, but we need to force it to keep PC relative relocs
6225    between two csects in the same section.  */
6226 
6227 int
6228 ppc_force_relocation (fixS *fix)
6229 {
6230   /* At this point fix->fx_addsy should already have been converted to
6231      a csect symbol.  If the csect does not include the fragment, then
6232      we need to force the relocation.  */
6233   if (fix->fx_pcrel
6234       && fix->fx_addsy != NULL
6235       && symbol_get_tc (fix->fx_addsy)->subseg != 0
6236       && ((symbol_get_frag (fix->fx_addsy)->fr_address
6237 	   > fix->fx_frag->fr_address)
6238 	  || (symbol_get_tc (fix->fx_addsy)->next != NULL
6239 	      && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6240 		  <= fix->fx_frag->fr_address))))
6241     return 1;
6242 
6243   return generic_force_reloc (fix);
6244 }
6245 
6246 void
6247 ppc_new_dot_label (symbolS *sym)
6248 {
6249   /* Anchor this label to the current csect for relocations.  */
6250   symbol_get_tc (sym)->within = ppc_current_csect;
6251 }
6252 
6253 #endif /* OBJ_XCOFF */
6254 
6255 #ifdef OBJ_ELF
6256 /* If this function returns non-zero, it guarantees that a relocation
6257    will be emitted for a fixup.  */
6258 
6259 int
6260 ppc_force_relocation (fixS *fix)
6261 {
6262   /* Branch prediction relocations must force a relocation, as must
6263      the vtable description relocs.  */
6264   switch (fix->fx_r_type)
6265     {
6266     case BFD_RELOC_PPC_B16_BRTAKEN:
6267     case BFD_RELOC_PPC_B16_BRNTAKEN:
6268     case BFD_RELOC_PPC_BA16_BRTAKEN:
6269     case BFD_RELOC_PPC_BA16_BRNTAKEN:
6270     case BFD_RELOC_24_PLT_PCREL:
6271     case BFD_RELOC_PPC64_TOC:
6272       return 1;
6273     case BFD_RELOC_PPC_B26:
6274     case BFD_RELOC_PPC_BA26:
6275     case BFD_RELOC_PPC_B16:
6276     case BFD_RELOC_PPC_BA16:
6277       /* All branch fixups targeting a localentry symbol must
6278          force a relocation.  */
6279       if (fix->fx_addsy)
6280 	{
6281 	  asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6282 	  elf_symbol_type *elfsym
6283 	    = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6284 	  gas_assert (elfsym);
6285 	  if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6286 	    return 1;
6287 	}
6288       break;
6289     default:
6290       break;
6291     }
6292 
6293   if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6294       && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6295     return 1;
6296 
6297   return generic_force_reloc (fix);
6298 }
6299 
6300 int
6301 ppc_fix_adjustable (fixS *fix)
6302 {
6303   switch (fix->fx_r_type)
6304     {
6305       /* All branch fixups targeting a localentry symbol must
6306          continue using the symbol.  */
6307     case BFD_RELOC_PPC_B26:
6308     case BFD_RELOC_PPC_BA26:
6309     case BFD_RELOC_PPC_B16:
6310     case BFD_RELOC_PPC_BA16:
6311     case BFD_RELOC_PPC_B16_BRTAKEN:
6312     case BFD_RELOC_PPC_B16_BRNTAKEN:
6313     case BFD_RELOC_PPC_BA16_BRTAKEN:
6314     case BFD_RELOC_PPC_BA16_BRNTAKEN:
6315       if (fix->fx_addsy)
6316 	{
6317 	  asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6318 	  elf_symbol_type *elfsym
6319 	    = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6320 	  gas_assert (elfsym);
6321 	  if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6322 	    return 0;
6323 	}
6324       break;
6325     default:
6326       break;
6327     }
6328 
6329   return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6330 	  && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6331 	  && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6332 	  && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6333 	  && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6334 	  && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6335 	  && fix->fx_r_type != BFD_RELOC_GPREL16
6336 	  && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6337 	  && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6338 	  && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6339 	       && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6340 }
6341 #endif
6342 
6343 void
6344 ppc_frag_check (struct frag *fragP)
6345 {
6346   if (!fragP->has_code)
6347     return;
6348 
6349   if (ppc_mach() == bfd_mach_ppc_vle)
6350     {
6351       if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6352         as_bad (_("instruction address is not a multiple of 2"));
6353     }
6354   else
6355     {
6356       if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6357         as_bad (_("instruction address is not a multiple of 4"));
6358     }
6359 }
6360 
6361 /* Implement HANDLE_ALIGN.  This writes the NOP pattern into an
6362    rs_align_code frag.  */
6363 
6364 void
6365 ppc_handle_align (struct frag *fragP)
6366 {
6367   valueT count = (fragP->fr_next->fr_address
6368 		  - (fragP->fr_address + fragP->fr_fix));
6369 
6370   if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6371     {
6372       char *dest = fragP->fr_literal + fragP->fr_fix;
6373 
6374       fragP->fr_var = 2;
6375       md_number_to_chars (dest, 0x4400, 2);
6376     }
6377   else if (count != 0 && (count & 3) == 0)
6378     {
6379       char *dest = fragP->fr_literal + fragP->fr_fix;
6380 
6381       fragP->fr_var = 4;
6382 
6383       if (count > 4 * nop_limit && count < 0x2000000)
6384 	{
6385 	  struct frag *rest;
6386 
6387 	  /* Make a branch, then follow with nops.  Insert another
6388 	     frag to handle the nops.  */
6389 	  md_number_to_chars (dest, 0x48000000 + count, 4);
6390 	  count -= 4;
6391 	  if (count == 0)
6392 	    return;
6393 
6394 	  rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6395 	  memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6396 	  fragP->fr_next = rest;
6397 	  fragP = rest;
6398 	  rest->fr_address += rest->fr_fix + 4;
6399 	  rest->fr_fix = 0;
6400 	  /* If we leave the next frag as rs_align_code we'll come here
6401 	     again, resulting in a bunch of branches rather than a
6402 	     branch followed by nops.  */
6403 	  rest->fr_type = rs_align;
6404 	  dest = rest->fr_literal;
6405 	}
6406 
6407       md_number_to_chars (dest, 0x60000000, 4);
6408 
6409       if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6410 	  || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6411 	  || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6412 	  || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6413 	{
6414 	  /* For power6, power7, power8 and power9, we want the last nop to be
6415 	     a group terminating one.  Do this by inserting an rs_fill frag
6416 	     immediately after this one, with its address set to the last nop
6417 	     location.  This will automatically reduce the number of nops in
6418 	     the current frag by one.  */
6419 	  if (count > 4)
6420 	    {
6421 	      struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6422 
6423 	      memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6424 	      group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6425 	      group_nop->fr_fix = 0;
6426 	      group_nop->fr_offset = 1;
6427 	      group_nop->fr_type = rs_fill;
6428 	      fragP->fr_next = group_nop;
6429 	      dest = group_nop->fr_literal;
6430 	    }
6431 
6432 	  if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6433 	      || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6434 	      || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6435 	    {
6436 	      if (ppc_cpu & PPC_OPCODE_E500MC)
6437 		/* e500mc group terminating nop: "ori 0,0,0".  */
6438 		md_number_to_chars (dest, 0x60000000, 4);
6439 	      else
6440 		/* power7/power8/power9 group terminating nop: "ori 2,2,0".  */
6441 		md_number_to_chars (dest, 0x60420000, 4);
6442 	    }
6443 	  else
6444 	    /* power6 group terminating nop: "ori 1,1,0".  */
6445 	    md_number_to_chars (dest, 0x60210000, 4);
6446 	}
6447     }
6448 }
6449 
6450 /* Apply a fixup to the object code.  This is called for all the
6451    fixups we generated by the calls to fix_new_exp, above.  */
6452 
6453 void
6454 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6455 {
6456   valueT value = * valP;
6457   offsetT fieldval;
6458   const struct powerpc_operand *operand;
6459 
6460 #ifdef OBJ_ELF
6461   if (fixP->fx_addsy != NULL)
6462     {
6463       /* Hack around bfd_install_relocation brain damage.  */
6464       if (fixP->fx_pcrel)
6465 	value += fixP->fx_frag->fr_address + fixP->fx_where;
6466 
6467       if (fixP->fx_addsy == abs_section_sym)
6468 	fixP->fx_done = 1;
6469     }
6470   else
6471     fixP->fx_done = 1;
6472 #else
6473   /* FIXME FIXME FIXME: The value we are passed in *valP includes
6474      the symbol values.  If we are doing this relocation the code in
6475      write.c is going to call bfd_install_relocation, which is also
6476      going to use the symbol value.  That means that if the reloc is
6477      fully resolved we want to use *valP since bfd_install_relocation is
6478      not being used.
6479      However, if the reloc is not fully resolved we do not want to
6480      use *valP, and must use fx_offset instead.  If the relocation
6481      is PC-relative, we then need to re-apply md_pcrel_from_section
6482      to this new relocation value.  */
6483   if (fixP->fx_addsy == (symbolS *) NULL)
6484     fixP->fx_done = 1;
6485 
6486   else
6487     {
6488       value = fixP->fx_offset;
6489       if (fixP->fx_pcrel)
6490 	value -= md_pcrel_from_section (fixP, seg);
6491     }
6492 #endif
6493 
6494   if (fixP->fx_subsy != (symbolS *) NULL)
6495     {
6496       /* We can't actually support subtracting a symbol.  */
6497       as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6498     }
6499 
6500   operand = NULL;
6501   if (fixP->fx_pcrel_adjust != 0)
6502     {
6503       /* This is a fixup on an instruction.  */
6504       int opindex = fixP->fx_pcrel_adjust & 0xff;
6505 
6506       operand = &powerpc_operands[opindex];
6507 #ifdef OBJ_XCOFF
6508       /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6509 	 does not generate a reloc.  It uses the offset of `sym' within its
6510 	 csect.  Other usages, such as `.long sym', generate relocs.  This
6511 	 is the documented behaviour of non-TOC symbols.  */
6512       if ((operand->flags & PPC_OPERAND_PARENS) != 0
6513 	  && (operand->bitm & 0xfff0) == 0xfff0
6514 	  && operand->shift == 0
6515 	  && (operand->insert == NULL || ppc_obj64)
6516 	  && fixP->fx_addsy != NULL
6517 	  && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6518 	  && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6519 	  && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6520 	  && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6521 	{
6522 	  value = fixP->fx_offset;
6523 	  fixP->fx_done = 1;
6524 	}
6525 
6526        /* During parsing of instructions, a TOC16 reloc is generated for
6527           instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6528           in the toc.  But at parse time, SYM may be not yet defined, so
6529           check again here.  */
6530        if (fixP->fx_r_type == BFD_RELOC_16
6531            && fixP->fx_addsy != NULL
6532            && ppc_is_toc_sym (fixP->fx_addsy))
6533          fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6534 #endif
6535     }
6536 
6537   /* Calculate value to be stored in field.  */
6538   fieldval = value;
6539   switch (fixP->fx_r_type)
6540     {
6541 #ifdef OBJ_ELF
6542     case BFD_RELOC_PPC64_ADDR16_LO_DS:
6543     case BFD_RELOC_PPC_VLE_LO16A:
6544     case BFD_RELOC_PPC_VLE_LO16D:
6545 #endif
6546     case BFD_RELOC_LO16:
6547     case BFD_RELOC_LO16_PCREL:
6548       fieldval = value & 0xffff;
6549     sign_extend_16:
6550       if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6551 	fieldval = SEX16 (fieldval);
6552       fixP->fx_no_overflow = 1;
6553       break;
6554 
6555     case BFD_RELOC_HI16:
6556     case BFD_RELOC_HI16_PCREL:
6557 #ifdef OBJ_ELF
6558       if (REPORT_OVERFLOW_HI && ppc_obj64)
6559 	{
6560 	  fieldval = value >> 16;
6561 	  if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6562 	    {
6563 	      valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6564 	      fieldval = ((valueT) fieldval ^ sign) - sign;
6565 	    }
6566 	  break;
6567 	}
6568       /* Fall thru */
6569 
6570     case BFD_RELOC_PPC_VLE_HI16A:
6571     case BFD_RELOC_PPC_VLE_HI16D:
6572     case BFD_RELOC_PPC64_ADDR16_HIGH:
6573 #endif
6574       fieldval = PPC_HI (value);
6575       goto sign_extend_16;
6576 
6577     case BFD_RELOC_HI16_S:
6578     case BFD_RELOC_HI16_S_PCREL:
6579     case BFD_RELOC_PPC_REL16DX_HA:
6580 #ifdef OBJ_ELF
6581       if (REPORT_OVERFLOW_HI && ppc_obj64)
6582 	{
6583 	  fieldval = (value + 0x8000) >> 16;
6584 	  if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6585 	    {
6586 	      valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6587 	      fieldval = ((valueT) fieldval ^ sign) - sign;
6588 	    }
6589 	  break;
6590 	}
6591       /* Fall thru */
6592 
6593     case BFD_RELOC_PPC_VLE_HA16A:
6594     case BFD_RELOC_PPC_VLE_HA16D:
6595     case BFD_RELOC_PPC64_ADDR16_HIGHA:
6596 #endif
6597       fieldval = PPC_HA (value);
6598       goto sign_extend_16;
6599 
6600 #ifdef OBJ_ELF
6601     case BFD_RELOC_PPC64_HIGHER:
6602       fieldval = PPC_HIGHER (value);
6603       goto sign_extend_16;
6604 
6605     case BFD_RELOC_PPC64_HIGHER_S:
6606       fieldval = PPC_HIGHERA (value);
6607       goto sign_extend_16;
6608 
6609     case BFD_RELOC_PPC64_HIGHEST:
6610       fieldval = PPC_HIGHEST (value);
6611       goto sign_extend_16;
6612 
6613     case BFD_RELOC_PPC64_HIGHEST_S:
6614       fieldval = PPC_HIGHESTA (value);
6615       goto sign_extend_16;
6616 #endif
6617 
6618     default:
6619       break;
6620     }
6621 
6622   if (operand != NULL)
6623     {
6624       /* Handle relocs in an insn.  */
6625       switch (fixP->fx_r_type)
6626 	{
6627 #ifdef OBJ_ELF
6628 	  /* The following relocs can't be calculated by the assembler.
6629 	     Leave the field zero.  */
6630 	case BFD_RELOC_PPC_TPREL16:
6631 	case BFD_RELOC_PPC_TPREL16_LO:
6632 	case BFD_RELOC_PPC_TPREL16_HI:
6633 	case BFD_RELOC_PPC_TPREL16_HA:
6634 	case BFD_RELOC_PPC_DTPREL16:
6635 	case BFD_RELOC_PPC_DTPREL16_LO:
6636 	case BFD_RELOC_PPC_DTPREL16_HI:
6637 	case BFD_RELOC_PPC_DTPREL16_HA:
6638 	case BFD_RELOC_PPC_GOT_TLSGD16:
6639 	case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6640 	case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6641 	case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6642 	case BFD_RELOC_PPC_GOT_TLSLD16:
6643 	case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6644 	case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6645 	case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6646 	case BFD_RELOC_PPC_GOT_TPREL16:
6647 	case BFD_RELOC_PPC_GOT_TPREL16_LO:
6648 	case BFD_RELOC_PPC_GOT_TPREL16_HI:
6649 	case BFD_RELOC_PPC_GOT_TPREL16_HA:
6650 	case BFD_RELOC_PPC_GOT_DTPREL16:
6651 	case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6652 	case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6653 	case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6654 	case BFD_RELOC_PPC64_TPREL16_DS:
6655 	case BFD_RELOC_PPC64_TPREL16_LO_DS:
6656 	case BFD_RELOC_PPC64_TPREL16_HIGH:
6657 	case BFD_RELOC_PPC64_TPREL16_HIGHA:
6658 	case BFD_RELOC_PPC64_TPREL16_HIGHER:
6659 	case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6660 	case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6661 	case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6662 	case BFD_RELOC_PPC64_DTPREL16_HIGH:
6663 	case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6664 	case BFD_RELOC_PPC64_DTPREL16_DS:
6665 	case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6666 	case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6667 	case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6668 	case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6669 	case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6670 	  gas_assert (fixP->fx_addsy != NULL);
6671 	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
6672 	  fieldval = 0;
6673 	  break;
6674 
6675 	  /* These also should leave the field zero for the same
6676 	     reason.  Note that older versions of gas wrote values
6677 	     here.  If we want to go back to the old behaviour, then
6678 	     all _LO and _LO_DS cases will need to be treated like
6679 	     BFD_RELOC_LO16_PCREL above.  Similarly for _HI etc.  */
6680 	case BFD_RELOC_16_GOTOFF:
6681 	case BFD_RELOC_LO16_GOTOFF:
6682 	case BFD_RELOC_HI16_GOTOFF:
6683 	case BFD_RELOC_HI16_S_GOTOFF:
6684 	case BFD_RELOC_LO16_PLTOFF:
6685 	case BFD_RELOC_HI16_PLTOFF:
6686 	case BFD_RELOC_HI16_S_PLTOFF:
6687 	case BFD_RELOC_GPREL16:
6688 	case BFD_RELOC_16_BASEREL:
6689 	case BFD_RELOC_LO16_BASEREL:
6690 	case BFD_RELOC_HI16_BASEREL:
6691 	case BFD_RELOC_HI16_S_BASEREL:
6692 	case BFD_RELOC_PPC_TOC16:
6693 	case BFD_RELOC_PPC64_TOC16_LO:
6694 	case BFD_RELOC_PPC64_TOC16_HI:
6695 	case BFD_RELOC_PPC64_TOC16_HA:
6696 	case BFD_RELOC_PPC64_PLTGOT16:
6697 	case BFD_RELOC_PPC64_PLTGOT16_LO:
6698 	case BFD_RELOC_PPC64_PLTGOT16_HI:
6699 	case BFD_RELOC_PPC64_PLTGOT16_HA:
6700 	case BFD_RELOC_PPC64_GOT16_DS:
6701 	case BFD_RELOC_PPC64_GOT16_LO_DS:
6702 	case BFD_RELOC_PPC64_PLT16_LO_DS:
6703 	case BFD_RELOC_PPC64_SECTOFF_DS:
6704 	case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6705 	case BFD_RELOC_PPC64_TOC16_DS:
6706 	case BFD_RELOC_PPC64_TOC16_LO_DS:
6707 	case BFD_RELOC_PPC64_PLTGOT16_DS:
6708 	case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6709 	case BFD_RELOC_PPC_EMB_NADDR16:
6710 	case BFD_RELOC_PPC_EMB_NADDR16_LO:
6711 	case BFD_RELOC_PPC_EMB_NADDR16_HI:
6712 	case BFD_RELOC_PPC_EMB_NADDR16_HA:
6713 	case BFD_RELOC_PPC_EMB_SDAI16:
6714 	case BFD_RELOC_PPC_EMB_SDA2I16:
6715 	case BFD_RELOC_PPC_EMB_SDA2REL:
6716 	case BFD_RELOC_PPC_EMB_SDA21:
6717 	case BFD_RELOC_PPC_EMB_MRKREF:
6718 	case BFD_RELOC_PPC_EMB_RELSEC16:
6719 	case BFD_RELOC_PPC_EMB_RELST_LO:
6720 	case BFD_RELOC_PPC_EMB_RELST_HI:
6721 	case BFD_RELOC_PPC_EMB_RELST_HA:
6722 	case BFD_RELOC_PPC_EMB_BIT_FLD:
6723 	case BFD_RELOC_PPC_EMB_RELSDA:
6724 	case BFD_RELOC_PPC_VLE_SDA21:
6725 	case BFD_RELOC_PPC_VLE_SDA21_LO:
6726 	case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6727 	case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6728 	case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6729 	case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6730 	case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6731 	case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6732 	  gas_assert (fixP->fx_addsy != NULL);
6733 	  /* Fall thru */
6734 
6735 	case BFD_RELOC_PPC_TLS:
6736 	case BFD_RELOC_PPC_TLSGD:
6737 	case BFD_RELOC_PPC_TLSLD:
6738 	  fieldval = 0;
6739 	  break;
6740 #endif
6741 
6742 #ifdef OBJ_XCOFF
6743 	case BFD_RELOC_PPC_B16:
6744 	  /* Adjust the offset to the instruction boundary.  */
6745 	  fieldval += 2;
6746 	  break;
6747 #endif
6748 
6749 	case BFD_RELOC_VTABLE_INHERIT:
6750 	case BFD_RELOC_VTABLE_ENTRY:
6751 	case BFD_RELOC_PPC_DTPMOD:
6752 	case BFD_RELOC_PPC_TPREL:
6753 	case BFD_RELOC_PPC_DTPREL:
6754 	case BFD_RELOC_PPC_COPY:
6755 	case BFD_RELOC_PPC_GLOB_DAT:
6756 	case BFD_RELOC_32_PLT_PCREL:
6757 	case BFD_RELOC_PPC_EMB_NADDR32:
6758 	case BFD_RELOC_PPC64_TOC:
6759 	case BFD_RELOC_CTOR:
6760 	case BFD_RELOC_32:
6761 	case BFD_RELOC_32_PCREL:
6762 	case BFD_RELOC_RVA:
6763 	case BFD_RELOC_64:
6764 	case BFD_RELOC_64_PCREL:
6765 	case BFD_RELOC_PPC64_ADDR64_LOCAL:
6766 	  as_bad_where (fixP->fx_file, fixP->fx_line,
6767 			_("%s unsupported as instruction fixup"),
6768 			bfd_get_reloc_code_name (fixP->fx_r_type));
6769 	  fixP->fx_done = 1;
6770 	  return;
6771 
6772 	default:
6773 	  break;
6774 	}
6775 
6776 #ifdef OBJ_ELF
6777 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6778    contents can stay at zero.  */
6779 #define APPLY_RELOC fixP->fx_done
6780 #else
6781 #define APPLY_RELOC 1
6782 #endif
6783       if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6784 	{
6785 	  unsigned long insn;
6786 	  unsigned char *where;
6787 
6788 	  /* Fetch the instruction, insert the fully resolved operand
6789 	     value, and stuff the instruction back again.  */
6790 	  where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6791 	  if (target_big_endian)
6792 	    {
6793 	      if (fixP->fx_size == 4)
6794 		insn = bfd_getb32 (where);
6795 	      else
6796 		insn = bfd_getb16 (where);
6797 	    }
6798 	  else
6799 	    {
6800 	      if (fixP->fx_size == 4)
6801 		insn = bfd_getl32 (where);
6802 	      else
6803 		insn = bfd_getl16 (where);
6804 	    }
6805 	  insn = ppc_insert_operand (insn, operand, fieldval,
6806 				     fixP->tc_fix_data.ppc_cpu,
6807 				     fixP->fx_file, fixP->fx_line);
6808 	  if (target_big_endian)
6809 	    {
6810 	      if (fixP->fx_size == 4)
6811 		bfd_putb32 (insn, where);
6812 	      else
6813 		bfd_putb16 (insn, where);
6814 	    }
6815 	  else
6816 	    {
6817 	      if (fixP->fx_size == 4)
6818 		bfd_putl32 (insn, where);
6819 	      else
6820 		bfd_putl16 (insn, where);
6821 	    }
6822 	}
6823 
6824       if (fixP->fx_done)
6825 	/* Nothing else to do here.  */
6826 	return;
6827 
6828       gas_assert (fixP->fx_addsy != NULL);
6829       if (fixP->fx_r_type == BFD_RELOC_NONE)
6830 	{
6831 	  const char *sfile;
6832 	  unsigned int sline;
6833 
6834 	  /* Use expr_symbol_where to see if this is an expression
6835 	     symbol.  */
6836 	  if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6837 	    as_bad_where (fixP->fx_file, fixP->fx_line,
6838 			  _("unresolved expression that must be resolved"));
6839 	  else
6840 	    as_bad_where (fixP->fx_file, fixP->fx_line,
6841 			  _("unsupported relocation against %s"),
6842 			  S_GET_NAME (fixP->fx_addsy));
6843 	  fixP->fx_done = 1;
6844 	  return;
6845 	}
6846     }
6847   else
6848     {
6849       /* Handle relocs in data.  */
6850       switch (fixP->fx_r_type)
6851 	{
6852 	case BFD_RELOC_VTABLE_INHERIT:
6853 	  if (fixP->fx_addsy
6854 	      && !S_IS_DEFINED (fixP->fx_addsy)
6855 	      && !S_IS_WEAK (fixP->fx_addsy))
6856 	    S_SET_WEAK (fixP->fx_addsy);
6857 	  /* Fall thru */
6858 
6859 	case BFD_RELOC_VTABLE_ENTRY:
6860 	  fixP->fx_done = 0;
6861 	  break;
6862 
6863 #ifdef OBJ_ELF
6864 	  /* These can appear with @l etc. in data.  */
6865 	case BFD_RELOC_LO16:
6866 	case BFD_RELOC_LO16_PCREL:
6867 	case BFD_RELOC_HI16:
6868 	case BFD_RELOC_HI16_PCREL:
6869 	case BFD_RELOC_HI16_S:
6870 	case BFD_RELOC_HI16_S_PCREL:
6871 	case BFD_RELOC_PPC64_HIGHER:
6872 	case BFD_RELOC_PPC64_HIGHER_S:
6873 	case BFD_RELOC_PPC64_HIGHEST:
6874 	case BFD_RELOC_PPC64_HIGHEST_S:
6875 	case BFD_RELOC_PPC64_ADDR16_HIGH:
6876 	case BFD_RELOC_PPC64_ADDR16_HIGHA:
6877 	case BFD_RELOC_PPC64_ADDR64_LOCAL:
6878 	  break;
6879 
6880 	case BFD_RELOC_PPC_DTPMOD:
6881 	case BFD_RELOC_PPC_TPREL:
6882 	case BFD_RELOC_PPC_DTPREL:
6883 	  S_SET_THREAD_LOCAL (fixP->fx_addsy);
6884 	  break;
6885 
6886 	  /* Just punt all of these to the linker.  */
6887 	case BFD_RELOC_PPC_B16_BRTAKEN:
6888 	case BFD_RELOC_PPC_B16_BRNTAKEN:
6889 	case BFD_RELOC_16_GOTOFF:
6890 	case BFD_RELOC_LO16_GOTOFF:
6891 	case BFD_RELOC_HI16_GOTOFF:
6892 	case BFD_RELOC_HI16_S_GOTOFF:
6893 	case BFD_RELOC_LO16_PLTOFF:
6894 	case BFD_RELOC_HI16_PLTOFF:
6895 	case BFD_RELOC_HI16_S_PLTOFF:
6896 	case BFD_RELOC_PPC_COPY:
6897 	case BFD_RELOC_PPC_GLOB_DAT:
6898 	case BFD_RELOC_16_BASEREL:
6899 	case BFD_RELOC_LO16_BASEREL:
6900 	case BFD_RELOC_HI16_BASEREL:
6901 	case BFD_RELOC_HI16_S_BASEREL:
6902 	case BFD_RELOC_PPC_TLS:
6903 	case BFD_RELOC_PPC_DTPREL16_LO:
6904 	case BFD_RELOC_PPC_DTPREL16_HI:
6905 	case BFD_RELOC_PPC_DTPREL16_HA:
6906 	case BFD_RELOC_PPC_TPREL16_LO:
6907 	case BFD_RELOC_PPC_TPREL16_HI:
6908 	case BFD_RELOC_PPC_TPREL16_HA:
6909 	case BFD_RELOC_PPC_GOT_TLSGD16:
6910 	case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6911 	case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6912 	case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6913 	case BFD_RELOC_PPC_GOT_TLSLD16:
6914 	case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6915 	case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6916 	case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6917 	case BFD_RELOC_PPC_GOT_DTPREL16:
6918 	case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6919 	case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6920 	case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6921 	case BFD_RELOC_PPC_GOT_TPREL16:
6922 	case BFD_RELOC_PPC_GOT_TPREL16_LO:
6923 	case BFD_RELOC_PPC_GOT_TPREL16_HI:
6924 	case BFD_RELOC_PPC_GOT_TPREL16_HA:
6925 	case BFD_RELOC_24_PLT_PCREL:
6926 	case BFD_RELOC_PPC_LOCAL24PC:
6927 	case BFD_RELOC_32_PLT_PCREL:
6928 	case BFD_RELOC_GPREL16:
6929 	case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6930 	case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6931 	case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6932 	case BFD_RELOC_PPC_EMB_NADDR32:
6933 	case BFD_RELOC_PPC_EMB_NADDR16:
6934 	case BFD_RELOC_PPC_EMB_NADDR16_LO:
6935 	case BFD_RELOC_PPC_EMB_NADDR16_HI:
6936 	case BFD_RELOC_PPC_EMB_NADDR16_HA:
6937 	case BFD_RELOC_PPC_EMB_SDAI16:
6938 	case BFD_RELOC_PPC_EMB_SDA2REL:
6939 	case BFD_RELOC_PPC_EMB_SDA2I16:
6940 	case BFD_RELOC_PPC_EMB_SDA21:
6941 	case BFD_RELOC_PPC_VLE_SDA21_LO:
6942 	case BFD_RELOC_PPC_EMB_MRKREF:
6943 	case BFD_RELOC_PPC_EMB_RELSEC16:
6944 	case BFD_RELOC_PPC_EMB_RELST_LO:
6945 	case BFD_RELOC_PPC_EMB_RELST_HI:
6946 	case BFD_RELOC_PPC_EMB_RELST_HA:
6947 	case BFD_RELOC_PPC_EMB_BIT_FLD:
6948 	case BFD_RELOC_PPC_EMB_RELSDA:
6949 	case BFD_RELOC_PPC64_TOC:
6950 	case BFD_RELOC_PPC_TOC16:
6951 	case BFD_RELOC_PPC64_TOC16_LO:
6952 	case BFD_RELOC_PPC64_TOC16_HI:
6953 	case BFD_RELOC_PPC64_TOC16_HA:
6954 	case BFD_RELOC_PPC64_DTPREL16_HIGH:
6955 	case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6956 	case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6957 	case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6958 	case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6959 	case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6960 	case BFD_RELOC_PPC64_TPREL16_HIGH:
6961 	case BFD_RELOC_PPC64_TPREL16_HIGHA:
6962 	case BFD_RELOC_PPC64_TPREL16_HIGHER:
6963 	case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6964 	case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6965 	case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6966 	  fixP->fx_done = 0;
6967 	  break;
6968 #endif
6969 
6970 #ifdef OBJ_XCOFF
6971 	case BFD_RELOC_NONE:
6972 #endif
6973 	case BFD_RELOC_CTOR:
6974 	case BFD_RELOC_32:
6975 	case BFD_RELOC_32_PCREL:
6976 	case BFD_RELOC_RVA:
6977 	case BFD_RELOC_64:
6978 	case BFD_RELOC_64_PCREL:
6979 	case BFD_RELOC_16:
6980 	case BFD_RELOC_16_PCREL:
6981 	case BFD_RELOC_8:
6982 	  break;
6983 
6984 	default:
6985 	  fprintf (stderr,
6986 		   _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6987 	  fflush (stderr);
6988 	  abort ();
6989 	}
6990 
6991       if (fixP->fx_size && APPLY_RELOC)
6992 	md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6993 			    fieldval, fixP->fx_size);
6994       if (warn_476
6995 	  && (seg->flags & SEC_CODE) != 0
6996 	  && fixP->fx_size == 4
6997 	  && fixP->fx_done
6998 	  && !fixP->fx_tcbit
6999 	  && (fixP->fx_r_type == BFD_RELOC_32
7000 	      || fixP->fx_r_type == BFD_RELOC_CTOR
7001 	      || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7002 	as_warn_where (fixP->fx_file, fixP->fx_line,
7003 		       _("data in executable section"));
7004     }
7005 
7006   /* We are only able to convert some relocs to pc-relative.  */
7007   if (!fixP->fx_done && fixP->fx_pcrel)
7008     {
7009       switch (fixP->fx_r_type)
7010 	{
7011 	case BFD_RELOC_LO16:
7012 	  fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7013 	  break;
7014 
7015 	case BFD_RELOC_HI16:
7016 	  fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7017 	  break;
7018 
7019 	case BFD_RELOC_HI16_S:
7020 	  fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7021 	  break;
7022 
7023 	case BFD_RELOC_64:
7024 	  fixP->fx_r_type = BFD_RELOC_64_PCREL;
7025 	  break;
7026 
7027 	case BFD_RELOC_32:
7028 	  fixP->fx_r_type = BFD_RELOC_32_PCREL;
7029 	  break;
7030 
7031 	case BFD_RELOC_16:
7032 	  fixP->fx_r_type = BFD_RELOC_16_PCREL;
7033 	  break;
7034 
7035 	  /* Some of course are already pc-relative.  */
7036 	case BFD_RELOC_LO16_PCREL:
7037 	case BFD_RELOC_HI16_PCREL:
7038 	case BFD_RELOC_HI16_S_PCREL:
7039 	case BFD_RELOC_PPC_REL16DX_HA:
7040 	case BFD_RELOC_64_PCREL:
7041 	case BFD_RELOC_32_PCREL:
7042 	case BFD_RELOC_16_PCREL:
7043 	case BFD_RELOC_PPC_B16:
7044 	case BFD_RELOC_PPC_B16_BRTAKEN:
7045 	case BFD_RELOC_PPC_B16_BRNTAKEN:
7046 	case BFD_RELOC_PPC_B26:
7047 	case BFD_RELOC_PPC_LOCAL24PC:
7048 	case BFD_RELOC_24_PLT_PCREL:
7049 	case BFD_RELOC_32_PLT_PCREL:
7050 	case BFD_RELOC_64_PLT_PCREL:
7051 	case BFD_RELOC_PPC_VLE_REL8:
7052 	case BFD_RELOC_PPC_VLE_REL15:
7053 	case BFD_RELOC_PPC_VLE_REL24:
7054 	  break;
7055 
7056 	default:
7057 	  if (fixP->fx_addsy)
7058 	    {
7059 	      const char *sfile;
7060 	      unsigned int sline;
7061 
7062 	      /* Use expr_symbol_where to see if this is an
7063 		 expression symbol.  */
7064 	      if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7065 		as_bad_where (fixP->fx_file, fixP->fx_line,
7066 			      _("unresolved expression that must"
7067 				" be resolved"));
7068 	      else
7069 		as_bad_where (fixP->fx_file, fixP->fx_line,
7070 			      _("cannot emit PC relative %s relocation"
7071 				" against %s"),
7072 			      bfd_get_reloc_code_name (fixP->fx_r_type),
7073 			      S_GET_NAME (fixP->fx_addsy));
7074 	    }
7075 	  else
7076 	    as_bad_where (fixP->fx_file, fixP->fx_line,
7077 			  _("unable to resolve expression"));
7078 	  fixP->fx_done = 1;
7079 	  break;
7080 	}
7081     }
7082 
7083 #ifdef OBJ_ELF
7084   ppc_elf_validate_fix (fixP, seg);
7085   fixP->fx_addnumber = value;
7086 
7087   /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7088      from the section contents.  If we are going to be emitting a reloc
7089      then the section contents are immaterial, so don't warn if they
7090      happen to overflow.  Leave such warnings to ld.  */
7091   if (!fixP->fx_done)
7092     {
7093       fixP->fx_no_overflow = 1;
7094 
7095       /* Arrange to emit .TOC. as a normal symbol if used in anything
7096 	 but .TOC.@tocbase.  */
7097       if (ppc_obj64
7098 	  && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7099 	  && fixP->fx_addsy != NULL
7100 	  && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7101 	symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7102     }
7103 #else
7104   if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7105     fixP->fx_addnumber = 0;
7106   else
7107     {
7108 #ifdef TE_PE
7109       fixP->fx_addnumber = 0;
7110 #else
7111       /* We want to use the offset within the toc, not the actual VMA
7112 	 of the symbol.  */
7113       fixP->fx_addnumber =
7114 	- bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7115 	- S_GET_VALUE (ppc_toc_csect);
7116       /* Set *valP to avoid errors.  */
7117       *valP = value;
7118 #endif
7119     }
7120 #endif
7121 }
7122 
7123 /* Generate a reloc for a fixup.  */
7124 
7125 arelent *
7126 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7127 {
7128   arelent *reloc;
7129 
7130   reloc = XNEW (arelent);
7131 
7132   reloc->sym_ptr_ptr = XNEW (asymbol *);
7133   *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7134   reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7135   reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7136   if (reloc->howto == (reloc_howto_type *) NULL)
7137     {
7138       as_bad_where (fixp->fx_file, fixp->fx_line,
7139 		    _("reloc %d not supported by object file format"),
7140 		    (int) fixp->fx_r_type);
7141       return NULL;
7142     }
7143   reloc->addend = fixp->fx_addnumber;
7144 
7145   return reloc;
7146 }
7147 
7148 void
7149 ppc_cfi_frame_initial_instructions (void)
7150 {
7151   cfi_add_CFA_def_cfa (1, 0);
7152 }
7153 
7154 int
7155 tc_ppc_regname_to_dw2regnum (char *regname)
7156 {
7157   unsigned int regnum = -1;
7158   unsigned int i;
7159   const char *p;
7160   char *q;
7161   static struct { const char *name; int dw2regnum; } regnames[] =
7162     {
7163       { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7164       { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7165       { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7166       { "spe_acc", 111 }, { "spefscr", 112 }
7167     };
7168 
7169   for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7170     if (strcmp (regnames[i].name, regname) == 0)
7171       return regnames[i].dw2regnum;
7172 
7173   if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7174     {
7175       p = regname + 1 + (regname[1] == '.');
7176       regnum = strtoul (p, &q, 10);
7177       if (p == q || *q || regnum >= 32)
7178 	return -1;
7179       if (regname[0] == 'f')
7180 	regnum += 32;
7181       else if (regname[0] == 'v')
7182 	regnum += 77;
7183     }
7184   else if (regname[0] == 'c' && regname[1] == 'r')
7185     {
7186       p = regname + 2 + (regname[2] == '.');
7187       if (p[0] < '0' || p[0] > '7' || p[1])
7188 	return -1;
7189       regnum = p[0] - '0' + 68;
7190     }
7191   return regnum;
7192 }
7193