12018-07-18 Nick Clifton <nickc@redhat.com> 2 3 2.31.1 Release point. 4 52018-07-14 Nick Clifton <nickc@redhat.com> 6 7 2.31 Release point. 8 92018-05-09 Sebastian Rasmussen <sebras@gmail.com> 10 11 * or1kcommon.cpu (spr-reg-info): Typo fix. 12 132018-03-03 Alan Modra <amodra@gmail.com> 14 15 * frv.opc: Include opintl.h. 16 (add_next_to_vliw): Use opcodes_error_handler to print error. 17 Standardize error message. 18 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise. 19 202018-01-13 Nick Clifton <nickc@redhat.com> 21 22 2.30 branch created. 23 242017-03-15 Stafford Horne <shorne@gmail.com> 25 26 * or1kcommon.cpu: Add pc set semantics to also update ppc. 27 282016-10-06 Alan Modra <amodra@gmail.com> 29 30 * mep.opc (expand_string): Add fall through comment. 31 322016-03-03 Alan Modra <amodra@gmail.com> 33 34 * fr30.cpu (f-m4): Replace bogus comment with a better guess 35 at what is really going on. 36 372016-03-02 Alan Modra <amodra@gmail.com> 38 39 * fr30.cpu (f-m4): Replace -1 << 4 with -16. 40 412016-02-02 Andrew Burgess <andrew.burgess@embecosm.com> 42 43 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to 44 a constant to better align disassembler output. 45 462014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 47 48 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions. 49 502014-06-12 Alan Modra <amodra@gmail.com> 51 52 * or1k.opc: Whitespace fixes. 53 542014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> 55 56 * or1korbis.cpu (h-atomic-reserve): New hardware. 57 (h-atomic-address): Likewise. 58 (insn-opcode): Add opcodes for LWA and SWA. 59 (atomic-reserve): New operand. 60 (atomic-address): Likewise. 61 (l-lwa, l-swa): New instructions. 62 (l-lbs): Fix typo in comment. 63 (store-insn): Clear atomic reserve on store to atomic-address. 64 Fix register names in fmt field. 65 662014-04-22 Christian Svensson <blue@cmd.nu> 67 68 * openrisc.cpu: Delete. 69 * openrisc.opc: Delete. 70 * or1k.cpu: New file. 71 * or1k.opc: New file. 72 * or1kcommon.cpu: New file. 73 * or1korbis.cpu: New file. 74 * or1korfpx.cpu: New file. 75 762013-12-07 Mike Frysinger <vapier@gentoo.org> 77 78 * epiphany.opc: Remove +x file mode. 79 802013-03-08 Yann Sionneau <yann.sionneau@gmail.com> 81 82 PR binutils/15241 83 * lm32.cpu (Control and status registers): Add CFG2, PSW, 84 TLBVADDR, TLBPADDR and TLBBADVADDR. 85 862012-11-30 Oleg Raikhman <oleg@adapteva.com> 87 Joern Rennecke <joern.rennecke@embecosm.com> 88 89 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12. 90 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l. 91 (testset-insn): Add NO_DIS attribute to t.l. 92 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l. 93 (move-insns): Add NO-DIS attribute to cmov.l. 94 (op-mmr-movts): Add NO-DIS attribute to movts.l. 95 (op-mmr-movfs): Add NO-DIS attribute to movfs.l. 96 (op-rrr): Add NO-DIS attribute to .l. 97 (shift-rrr): Add NO-DIS attribute to .l. 98 (op-shift-rri): Add NO-DIS attribute to i32.l. 99 (bitrl, movtl): Add NO-DIS attribute. 100 (op-iextrrr): Add NO-DIS attribute to .l 101 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l. 102 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise. 103 1042012-02-27 Alan Modra <amodra@gmail.com> 105 106 * mt.opc (print_dollarhex): Trim values to 32 bits. 107 1082011-12-15 Nick Clifton <nickc@redhat.com> 109 110 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit 111 hosts. 112 1132011-10-26 Joern Rennecke <joern.rennecke@embecosm.com> 114 115 * epiphany.opc (parse_branch_addr): Fix type of valuep. 116 Cast value before printing it as a long. 117 (parse_postindex): Fix type of valuep. 118 1192011-10-25 Joern Rennecke <joern.rennecke@embecosm.com> 120 121 * cpu/epiphany.cpu: New file. 122 * cpu/epiphany.opc: New file. 123 1242011-08-22 Nick Clifton <nickc@redhat.com> 125 126 * fr30.cpu: Newly contributed file. 127 * fr30.opc: Likewise. 128 * ip2k.cpu: Likewise. 129 * ip2k.opc: Likewise. 130 * mep-avc.cpu: Likewise. 131 * mep-avc2.cpu: Likewise. 132 * mep-c5.cpu: Likewise. 133 * mep-core.cpu: Likewise. 134 * mep-default.cpu: Likewise. 135 * mep-ext-cop.cpu: Likewise. 136 * mep-fmax.cpu: Likewise. 137 * mep-h1.cpu: Likewise. 138 * mep-ivc2.cpu: Likewise. 139 * mep-rhcop.cpu: Likewise. 140 * mep-sample-ucidsp.cpu: Likewise. 141 * mep.cpu: Likewise. 142 * mep.opc: Likewise. 143 * openrisc.cpu: Likewise. 144 * openrisc.opc: Likewise. 145 * xstormy16.cpu: Likewise. 146 * xstormy16.opc: Likewise. 147 1482010-10-08 Pierre Muller <muller@ics.u-strasbg.fr> 149 150 * frv.opc: #undef DEBUG. 151 1522010-07-03 DJ Delorie <dj@delorie.com> 153 154 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it. 155 1562010-02-11 Doug Evans <dje@sebabeach.org> 157 158 * m32r.cpu (HASH-PREFIX): Delete. 159 (duhpo, dshpo): New pmacros. 160 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. 161 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX 162 attribute, define with dshpo. 163 (uimm24): Delete HASH-PREFIX attribute. 164 * m32r.opc (CGEN_PRINT_NORMAL): Delete. 165 (print_signed_with_hash_prefix): New function. 166 (print_unsigned_with_hash_prefix): New function. 167 * xc16x.cpu (dowh): New pmacro. 168 (upof16): Define with dowh, specify print handler. 169 (qbit, qlobit, qhibit): Ditto. 170 (upag16): Ditto. 171 * xc16x.opc (CGEN_PRINT_NORMAL): Delete. 172 (print_with_dot_prefix): New functions. 173 (print_with_pof_prefix, print_with_pag_prefix): New functions. 174 1752010-01-24 Doug Evans <dje@sebabeach.org> 176 177 * frv.cpu (floating-point-conversion): Update call to fp conv op. 178 (floating-point-dual-conversion, ne-floating-point-dual-conversion, 179 conditional-floating-point-conversion, ne-floating-point-conversion, 180 float-parallel-mul-add-double-semantics): Ditto. 181 1822010-01-05 Doug Evans <dje@sebabeach.org> 183 184 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler. 185 (f-dsp-40-u20, f-dsp-40-u24): Ditto. 186 1872010-01-02 Doug Evans <dje@sebabeach.org> 188 189 * m32c.opc (parse_signed16): Fix typo. 190 1912009-12-11 Nick Clifton <nickc@redhat.com> 192 193 * frv.opc: Fix shadowed variable warnings. 194 * m32c.opc: Fix shadowed variable warnings. 195 1962009-11-14 Doug Evans <dje@sebabeach.org> 197 198 Must use VOID expression in VOID context. 199 * xc16x.cpu (mov4): Fix mode of `sequence'. 200 (mov9, mov10): Ditto. 201 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'. 202 (callr, callseg, calls, trap, rets, reti): Ditto. 203 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'. 204 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'. 205 (exts, exts1, extsr, extsr1, prior): Ditto. 206 2072009-10-23 Doug Evans <dje@sebabeach.org> 208 209 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h. 210 cgen-ops.h -> cgen/basic-ops.h. 211 2122009-09-25 Alan Modra <amodra@bigpond.net.au> 213 214 * m32r.cpu (stb-plus): Typo fix. 215 2162009-09-23 Doug Evans <dje@sebabeach.org> 217 218 * m32r.cpu (sth-plus): Fix address mode and calculation. 219 (stb-plus): Ditto. 220 (clrpsw): Fix mask calculation. 221 (bset, bclr, btst): Make mode in bit calculation match expression. 222 223 * xc16x.cpu (rtl-version): Set to 0.8. 224 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix, 225 make uppercase. Remove unnecessary name-prefix spec. 226 (grb-names, conditioncode-names, extconditioncode-names): Ditto. 227 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto. 228 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto. 229 (h-cr): New hardware. 230 (muls): Comment out parts that won't compile, add fixme. 231 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto. 232 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto. 233 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto. 234 2352009-07-16 Doug Evans <dje@sebabeach.org> 236 237 * cpu/simplify.inc (*): One line doc strings don't need \n. 238 (df): Invoke define-full-ifield instead of claiming it's an alias. 239 (dno): Define. 240 (dnop): Mark as deprecated. 241 2422009-06-22 Alan Modra <amodra@bigpond.net.au> 243 244 * m32c.opc (parse_lab_5_3): Use correct enum. 245 2462009-01-07 Hans-Peter Nilsson <hp@axis.com> 247 248 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI. 249 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros. 250 (media-arith-sat-semantics): Explicitly sign- or zero-extend 251 arguments of "operation" to DI using "mode" and the new pmacros. 252 2532009-01-03 Hans-Peter Nilsson <hp@axis.com> 254 255 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size 256 of number 2, PID. 257 2582008-12-23 Jon Beniston <jon@beniston.com> 259 260 * lm32.cpu: New file. 261 * lm32.opc: New file. 262 2632008-01-29 Alan Modra <amodra@bigpond.net.au> 264 265 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change 266 to source. 267 2682007-10-22 Hans-Peter Nilsson <hp@axis.com> 269 270 * cris.cpu (movs, movu): Use result of extension operation when 271 updating flags. 272 2732007-07-04 Nick Clifton <nickc@redhat.com> 274 275 * cris.cpu: Update copyright notice to refer to GPLv3. 276 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu, 277 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu, 278 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu, 279 xc16x.opc: Likewise. 280 * iq2000.cpu: Fix copyright notice to refer to FSF. 281 2822007-04-30 Mark Salter <msalter@sadr.localdomain> 283 284 * frv.cpu (spr-names): Support new coprocessor SPR registers. 285 2862007-04-20 Nick Clifton <nickc@redhat.com> 287 288 * xc16x.cpu: Restore after accidentally overwriting this file with 289 xc16x.opc. 290 2912007-03-29 DJ Delorie <dj@redhat.com> 292 293 * m32c.cpu (Imm-8-s4n): Fix print hook. 294 (Lab-24-8, Lab-32-8, Lab-40-8): Fix. 295 (arith-jnz-imm4-dst-defn): Make relaxable. 296 (arith-jnz16-imm4-dst-defn): Fix encodings. 297 2982007-03-20 DJ Delorie <dj@redhat.com> 299 300 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20, 301 mem20): New. 302 (src16-16-20-An-relative-*): New. 303 (dst16-*-20-An-relative-*): New. 304 (dst16-16-16sa-*): New 305 (dst16-16-16ar-*): New 306 (dst32-16-16sa-Unprefixed-*): New 307 (jsri): Fix operands. 308 (setzx): Fix encoding. 309 3102007-03-08 Alan Modra <amodra@bigpond.net.au> 311 312 * m32r.opc: Formatting. 313 3142006-05-22 Nick Clifton <nickc@redhat.com> 315 316 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu. 317 3182006-04-10 DJ Delorie <dj@redhat.com> 319 320 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which 321 decides if this function accepts symbolic constants or not. 322 (parse_signed_bitbase): Likewise. 323 (parse_unsigned_bitbase8): Pass the new parameter. 324 (parse_unsigned_bitbase11): Likewise. 325 (parse_unsigned_bitbase16): Likewise. 326 (parse_unsigned_bitbase19): Likewise. 327 (parse_unsigned_bitbase27): Likewise. 328 (parse_signed_bitbase8): Likewise. 329 (parse_signed_bitbase11): Likewise. 330 (parse_signed_bitbase19): Likewise. 331 3322006-03-13 DJ Delorie <dj@redhat.com> 333 334 * m32c.cpu (Bit3-S): New. 335 (btst:s): New. 336 * m32c.opc (parse_bit3_S): New. 337 338 * m32c.cpu (decimal-subtraction16-insn): Add second operand. 339 (btst): Add optional :G suffix for MACH32. 340 (or.b:S): New. 341 (pop.w:G): Add optional :G suffix for MACH16. 342 (push.b.imm): Fix syntax. 343 3442006-03-10 DJ Delorie <dj@redhat.com> 345 346 * m32c.cpu (mul.l): New. 347 (mulu.l): New. 348 3492006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com) 350 351 * xc16x.opc (parse_hash): Return NULL if the input was parsed or 352 an error message otherwise. 353 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise. 354 Fix up comments to correctly describe the functions. 355 3562006-02-24 DJ Delorie <dj@redhat.com> 357 358 * m32c.cpu (RL_TYPE): New attribute, with macros. 359 (Lab-8-24): Add RELAX. 360 (unary-insn-defn-g, binary-arith-imm-dst-defn, 361 binary-arith-imm4-dst-defn): Add 1ADDR attribute. 362 (binary-arith-src-dst-defn): Add 2ADDR attribute. 363 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a, 364 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP 365 attribute. 366 (jsri16, jsri32): Add 1ADDR attribute. 367 (jsr32.w, jsr32.a): Add JUMP attribute. 368 3692006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com> 370 Anil Paranjape <anilp1@kpitcummins.com> 371 Shilin Shakti <shilins@kpitcummins.com> 372 373 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU 374 description. 375 * xc16x.opc: New file containing supporting XC16C routines. 376 3772006-02-10 Nick Clifton <nickc@redhat.com> 378 379 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits. 380 3812006-01-06 DJ Delorie <dj@redhat.com> 382 383 * m32c.cpu (mov.w:q): Fix mode. 384 (push32.b.imm): Likewise, for the comment. 385 3862005-12-16 Nathan Sidwell <nathan@codesourcery.com> 387 388 Second part of ms1 to mt renaming. 389 * mt.cpu (define-arch, define-isa): Set name to mt. 390 (define-mach): Adjust. 391 * mt.opc (CGEN_ASM_HASH): Update. 392 (mt_asm_hash, mt_cgen_insn_supported): Renamed. 393 (parse_loopsize, parse_imm16): Adjust. 394 3952005-12-13 DJ Delorie <dj@redhat.com> 396 397 * m32c.cpu (jsri): Fix order so register names aren't treated as 398 symbols. 399 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw, 400 indexwd, indexws): Fix encodings. 401 4022005-12-12 Nathan Sidwell <nathan@codesourcery.com> 403 404 * mt.cpu: Rename from ms1.cpu. 405 * mt.opc: Rename from ms1.opc. 406 4072005-12-06 Hans-Peter Nilsson <hp@axis.com> 408 409 * cris.cpu (simplecris-common-writable-specregs) 410 (simplecris-common-readable-specregs): Split from 411 simplecris-common-specregs. All users changed. 412 (cris-implemented-writable-specregs-v0) 413 (cris-implemented-readable-specregs-v0): Similar from 414 cris-implemented-specregs-v0. 415 (cris-implemented-writable-specregs-v3) 416 (cris-implemented-readable-specregs-v3) 417 (cris-implemented-writable-specregs-v8) 418 (cris-implemented-readable-specregs-v8) 419 (cris-implemented-writable-specregs-v10) 420 (cris-implemented-readable-specregs-v10) 421 (cris-implemented-writable-specregs-v32) 422 (cris-implemented-readable-specregs-v32): Similar. 423 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New 424 insns and specializations. 425 4262005-11-08 Nathan Sidwell <nathan@codesourcery.com> 427 428 Add ms2 429 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and 430 model. 431 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr, 432 f-cb2incr, f-rc3): New fields. 433 (LOOP): New instruction. 434 (JAL-HAZARD): New hazard. 435 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr): 436 New operands. 437 (mul, muli, dbnz, iflush): Enable for ms2 438 (jal, reti): Has JAL-HAZARD. 439 (ldctxt, ldfb, stfb): Only ms1. 440 (fbcb): Only ms1,ms1-003. 441 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs, 442 fbcbincrs, mfbcbincrs): Enable for ms2. 443 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns. 444 * ms1.opc (parse_loopsize): New. 445 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L. 446 (print_pcrel): New. 447 4482005-10-28 Dave Brolley <brolley@redhat.com> 449 450 Contribute the following change: 451 2003-09-24 Dave Brolley <brolley@redhat.com> 452 453 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of 454 CGEN_ATTR_VALUE_TYPE. 455 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE. 456 Use cgen_bitset_intersect_p. 457 4582005-10-27 DJ Delorie <dj@redhat.com> 459 460 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New. 461 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn, 462 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which 463 imm operand is needed. 464 (adjnz, sbjnz): Pass the right operands. 465 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach, 466 unary-insn): Add -g variants for opcodes that need to support :G. 467 (not.BW:G, push.BW:G): Call it. 468 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb, 469 stzx16-imm8-imm8-abs16): Fix operand typos. 470 * m32c.opc (m32c_asm_hash): Support bnCND. 471 (parse_signed4n, print_signed4n): New. 472 4732005-10-26 DJ Delorie <dj@redhat.com> 474 475 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New. 476 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn, 477 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn): 478 dsp8[sp] is signed. 479 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff). 480 (mov.BW:S r0,r1): Fix typo r1l->r1. 481 (tst): Allow :G suffix. 482 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff. 483 4842005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 485 486 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size. 487 4882005-10-25 DJ Delorie <dj@redhat.com> 489 490 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by 491 making one a macro of the other. 492 4932005-10-21 DJ Delorie <dj@redhat.com> 494 495 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing. 496 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl, 497 indexld, indexls): .w variants have `1' bit. 498 (rot32.b): QI, not SI. 499 (rot32.w): HI, not SI. 500 (xchg16): HI for .w variant. 501 5022005-10-19 Nick Clifton <nickc@redhat.com> 503 504 * m32r.opc (parse_slo16): Fix bad application of previous patch. 505 5062005-10-18 Andreas Schwab <schwab@suse.de> 507 508 * m32r.opc (parse_slo16): Better version of previous patch. 509 5102005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 511 512 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word 513 size. 514 5152005-07-25 DJ Delorie <dj@redhat.com> 516 517 * m32c.opc (parse_unsigned8): Add %dsp8(). 518 (parse_signed8): Add %hi8(). 519 (parse_unsigned16): Add %dsp16(). 520 (parse_signed16): Add %lo16() and %hi16(). 521 (parse_lab_5_3): Make valuep a bfd_vma *. 522 5232005-07-18 Nick Clifton <nickc@redhat.com> 524 525 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode 526 components. 527 (f-lab32-jmp-s): Fix insertion sequence. 528 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands. 529 (Dsp-40-s8): Make parameter be signed. 530 (Dsp-40-s16): Likewise. 531 (Dsp-48-s8): Likewise. 532 (Dsp-48-s16): Likewise. 533 (Imm-13-u3): Likewise. (Despite its name!) 534 (BitBase16-16-s8): Make the parameter be unsigned. 535 (BitBase16-8-u11-S): Likewise. 536 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s, 537 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow 538 relaxation. 539 540 * m32c.opc: Fix formatting. 541 Use safe-ctype.h instead of ctype.h 542 Move duplicated code sequences into a macro. 543 Fix compile time warnings about signedness mismatches. 544 Remove dead code. 545 (parse_lab_5_3): New parser function. 546 5472005-07-16 Jim Blandy <jimb@redhat.com> 548 549 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET, 550 to represent isa sets. 551 5522005-07-15 Jim Blandy <jimb@redhat.com> 553 554 * m32c.cpu, m32c.opc: Fix copyright. 555 5562005-07-14 Jim Blandy <jimb@redhat.com> 557 558 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C. 559 5602005-07-14 Alan Modra <amodra@bigpond.net.au> 561 562 * ms1.opc (print_dollarhex): Correct format string. 563 5642005-07-06 Alan Modra <amodra@bigpond.net.au> 565 566 * iq2000.cpu: Include from binutils cpu dir. 567 5682005-07-05 Nick Clifton <nickc@redhat.com> 569 570 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter 571 unsigned in order to avoid compile time warnings about sign 572 conflicts. 573 574 * ms1.opc (parse_*): Likewise. 575 (parse_imm16): Use a "void *" as it is passed both signed and 576 unsigned arguments. 577 5782005-07-01 Nick Clifton <nickc@redhat.com> 579 580 * frv.opc: Update to ISO C90 function declaration style. 581 * iq2000.opc: Likewise. 582 * m32r.opc: Likewise. 583 * sh.opc: Likewise. 584 5852005-06-15 Dave Brolley <brolley@redhat.com> 586 587 Contributed by Red Hat. 588 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox. 589 * ms1.opc: New file. Written by Stan Cox. 590 5912005-05-10 Nick Clifton <nickc@redhat.com> 592 593 * Update the address and phone number of the FSF organization in 594 the GPL notices in the following files: 595 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu, 596 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu, 597 sh64-media.cpu, simplify.inc 598 5992005-02-24 Alan Modra <amodra@bigpond.net.au> 600 601 * frv.opc (parse_A): Warning fix. 602 6032005-02-23 Nick Clifton <nickc@redhat.com> 604 605 * frv.opc: Fixed compile time warnings about differing signed'ness 606 of pointers passed to functions. 607 * m32r.opc: Likewise. 608 6092005-02-11 Nick Clifton <nickc@redhat.com> 610 611 * iq2000.opc (parse_jtargq10): Change type of valuep argument to 612 'bfd_vma *' in order avoid compile time warning message. 613 6142005-01-28 Hans-Peter Nilsson <hp@axis.com> 615 616 * cris.cpu (mstep): Add missing insn. 617 6182005-01-25 Alexandre Oliva <aoliva@redhat.com> 619 620 2004-11-10 Alexandre Oliva <aoliva@redhat.com> 621 * frv.cpu: Add support for TLS annotations in loads and calll. 622 * frv.opc (parse_symbolic_address): New. 623 (parse_ldd_annotation): New. 624 (parse_call_annotation): New. 625 (parse_ld_annotation): New. 626 (parse_ulo16, parse_uslo16): Use parse_symbolic_address. 627 Introduce TLS relocations. 628 (parse_d12, parse_s12, parse_u12): Likewise. 629 (parse_uhi16): Likewise. Fix constant checking on 64-bit host. 630 (parse_call_label, print_at): New. 631 6322004-12-21 Mikael Starvik <starvik@axis.com> 633 634 * cris.cpu (cris-set-mem): Correct integral write semantics. 635 6362004-11-29 Hans-Peter Nilsson <hp@axis.com> 637 638 * cris.cpu: New file. 639 6402004-11-15 Michael K. Lechner <mike.lechner@gmail.com> 641 642 * iq2000.cpu: Added quotes around macro arguments so that they 643 will work with newer versions of guile. 644 6452004-10-27 Nick Clifton <nickc@redhat.com> 646 647 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1, 648 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index 649 operand. 650 * iq2000.cpu (dnop index): Rename to _index to avoid complications 651 with guile. 652 6532004-08-27 Richard Sandiford <rsandifo@redhat.com> 654 655 * frv.cpu (cfmovs): Change UNIT attribute to FMALL. 656 6572004-05-15 Nick Clifton <nickc@redhat.com> 658 659 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const. 660 6612004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 662 663 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug. 664 6652004-03-01 Richard Sandiford <rsandifo@redhat.com> 666 667 * frv.cpu (define-arch frv): Add fr450 mach. 668 (define-mach fr450): New. 669 (define-model fr450): New. Add profile units to every fr450 insn. 670 (define-attr UNIT): Add MDCUTSSI. 671 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn. 672 (define-attr AUDIO): New boolean. 673 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL) 674 (f-LRA-null, f-TLBPR-null): New fields. 675 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr) 676 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs. 677 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands. 678 (LRA-null, TLBPR-null): New macros. 679 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr. 680 (load-real-address): New macro. 681 (lrai, lrad, tlbpr): New instructions. 682 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument. 683 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly. 684 (mdcutssi): Change UNIT attribute to MDCUTSSI. 685 (media-low-clear-semantics, media-scope-limit-semantics) 686 (media-quad-limit, media-quad-shift): New macros. 687 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions. 688 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major) 689 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn) 690 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450. 691 (fr450_unit_mapping): New array. 692 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry 693 for new MDCUTSSI unit. 694 (fr450_check_insn_major_constraints): New function. 695 (check_insn_major_constraints): Use it. 696 6972004-03-01 Richard Sandiford <rsandifo@redhat.com> 698 699 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit. 700 (scutss): Change unit to I0. 701 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit. 702 (mqsaths): Fix FR400-MAJOR categorization. 703 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc) 704 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL. 705 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1) 706 combinations. 707 7082004-03-01 Richard Sandiford <rsandifo@redhat.com> 709 710 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete. 711 (rstb, rsth, rst, rstd, rstq): Delete. 712 (rstbf, rsthf, rstf, rstdf, rstqf): Delete. 713 7142004-02-23 Nick Clifton <nickc@redhat.com> 715 716 * Apply these patches from Renesas: 717 718 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 719 720 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when 721 disassembling codes for 0x*2 addresses. 722 723 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 724 725 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction. 726 727 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> 728 729 * cpu/m32r.cpu : Add new model m32r2. 730 Add new instructions. 731 Replace occurrances of 'Mitsubishi' with 'Renesas'. 732 Changed PIPE attr of push from O to OS. 733 Care for Little-endian of M32R. 734 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn): 735 Care for Little-endian of M32R. 736 (parse_slo16): signed extension for value. 737 7382004-02-20 Andrew Cagney <cagney@redhat.com> 739 740 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick 741 Clifton, Ben Elliston, Matthew Green, and Andrew Haley. 742 743 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all 744 written by Ben Elliston. 745 7462004-01-14 Richard Sandiford <rsandifo@redhat.com> 747 748 * frv.cpu (UNIT): Add IACC. 749 (iacc-multiply-r-r): Use it. 750 * frv.opc (fr400_unit_mapping): Add entry for IACC. 751 (fr500_unit_mapping, fr550_unit_mapping): Likewise. 752 7532004-01-06 Alexandre Oliva <aoliva@redhat.com> 754 755 2003-12-19 Alexandre Oliva <aoliva@redhat.com> 756 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some 757 cut&paste errors in shifting/truncating numerical operands. 758 2003-08-08 Alexandre Oliva <aoliva@redhat.com> 759 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo. 760 (parse_uslo16): Likewise. 761 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi. 762 (parse_d12): Parse gotoff12 and gotofffuncdesc12. 763 (parse_s12): Likewise. 764 2003-08-04 Alexandre Oliva <aoliva@redhat.com> 765 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo. 766 (parse_uslo16): Likewise. 767 (parse_uhi16): Parse gothi and gotfuncdeschi. 768 (parse_d12): Parse got12 and gotfuncdesc12. 769 (parse_s12): Likewise. 770 7712003-10-10 Dave Brolley <brolley@redhat.com> 772 773 * frv.cpu (dnpmop): New p-macro. 774 (GRdoublek): Use dnpmop. 775 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto. 776 (store-double-r-r): Use (.sym regtype doublek). 777 (r-store-double): Ditto. 778 (store-double-r-r-u): Ditto. 779 (conditional-store-double): Ditto. 780 (conditional-store-double-u): Ditto. 781 (store-double-r-simm): Ditto. 782 (fmovs): Assign to UNIT FMALL. 783 7842003-10-06 Dave Brolley <brolley@redhat.com> 785 786 * frv.cpu, frv.opc: Add support for fr550. 787 7882003-09-24 Dave Brolley <brolley@redhat.com> 789 790 * frv.cpu (u-commit): New modelling unit for fr500. 791 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand. 792 (commit-r): Use u-commit model for fr500. 793 (commit): Ditto. 794 (conditional-float-binary-op): Take profiling data as an argument. 795 Update callers. 796 (ne-float-binary-op): Ditto. 797 7982003-09-19 Michael Snyder <msnyder@redhat.com> 799 800 * frv.cpu (nldqi): Delete unimplemented instruction. 801 8022003-09-12 Dave Brolley <brolley@redhat.com> 803 804 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500. 805 (clear-ne-flag-r): Pass insn profiling in as an argument. Call 806 frv_ref_SI to get input register referenced for profiling. 807 (clear-ne-flag-all): Pass insn profiling in as an argument. 808 (clrgr,clrfr,clrga,clrfa): Add profiling information. 809 8102003-09-11 Michael Snyder <msnyder@redhat.com> 811 812 * frv.cpu: Typographical corrections. 813 8142003-09-09 Dave Brolley <brolley@redhat.com> 815 816 * frv.cpu (media-dual-complex): Change UNIT to FMALL. 817 (conditional-media-dual-complex, media-quad-complex): Likewise. 818 8192003-09-04 Dave Brolley <brolley@redhat.com> 820 821 * frv.cpu (register-transfer): Pass in all attributes in on argument. 822 Update all callers. 823 (conditional-register-transfer): Ditto. 824 (cache-preload): Ditto. 825 (floating-point-conversion): Ditto. 826 (floating-point-neg): Ditto. 827 (float-abs): Ditto. 828 (float-binary-op-s): Ditto. 829 (conditional-float-binary-op): Ditto. 830 (ne-float-binary-op): Ditto. 831 (float-dual-arith): Ditto. 832 (ne-float-dual-arith): Ditto. 833 8342003-09-03 Dave Brolley <brolley@redhat.com> 835 836 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers. 837 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC, 838 MCLRACC-1. 839 (A): Removed operand. 840 (A0,A1): New operands replace operand A. 841 (mnop): Now a real insn 842 (mclracc): Removed insn. 843 (mclracc-0, mclracc-1): New insns replace mclracc. 844 (all insns): Use new UNIT attributes. 845 8462003-08-21 Nick Clifton <nickc@redhat.com> 847 848 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand 849 and u-media-dual-btoh with output parameter. 850 (cmbtoh): Add profiling hack. 851 8522003-08-19 Michael Snyder <msnyder@redhat.com> 853 854 * frv.cpu: Fix typo, Frintkeven -> FRintkeven 855 8562003-06-10 Doug Evans <dje@sebabeach.org> 857 858 * frv.cpu: Add IDOC attribute. 859 8602003-06-06 Andrew Cagney <cagney@redhat.com> 861 862 Contributed by Red Hat. 863 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston, 864 Stan Cox, and Frank Ch. Eigler. 865 * iq2000.opc: New file. Written by Ben Elliston, Frank 866 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox. 867 * iq2000m.cpu: New file. Written by Jeff Johnston. 868 * iq10.cpu: New file. Written by Jeff Johnston. 869 8702003-06-05 Nick Clifton <nickc@redhat.com> 871 872 * frv.cpu (FRintieven): New operand. An even-numbered only 873 version of the FRinti operand. 874 (FRintjeven): Likewise for FRintj. 875 (FRintkeven): Likewise for FRintk. 876 (mdcutssi, media-dual-word-rotate-r-r, mqsaths, 877 media-quad-arith-sat-semantics, media-quad-arith-sat, 878 conditional-media-quad-arith-sat, mdunpackh, 879 media-quad-multiply-semantics, media-quad-multiply, 880 conditional-media-quad-multiply, media-quad-complex-i, 881 media-quad-multiply-acc-semantics, media-quad-multiply-acc, 882 conditional-media-quad-multiply-acc, munpackh, 883 media-quad-multiply-cross-acc-semantics, mdpackh, 884 media-quad-multiply-cross-acc, mbtoh-semantics, 885 media-quad-cross-multiply-cross-acc-semantics, 886 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics, 887 media-quad-cross-multiply-acc-semantics, cmbtoh, 888 media-quad-cross-multiply-acc, media-quad-complex, mhtob, 889 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd, 890 cmhtob): Use new operands. 891 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define. 892 (parse_even_register): New function. 893 8942003-06-03 Nick Clifton <nickc@redhat.com> 895 896 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit 897 immediate value not unsigned. 898 8992003-06-03 Andrew Cagney <cagney@redhat.com> 900 901 Contributed by Red Hat. 902 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore, 903 and Eric Christopher. 904 * frv.opc: New file. Written by Catherine Moore, and Dave 905 Brolley. 906 * simplify.inc: New file. Written by Doug Evans. 907 9082003-05-02 Andrew Cagney <cagney@redhat.com> 909 910 * New file. 911 912 913Copyright (C) 2003-2012 Free Software Foundation, Inc. 914 915Copying and distribution of this file, with or without modification, 916are permitted in any medium without royalty provided the copyright 917notice and this notice are preserved. 918 919Local Variables: 920mode: change-log 921left-margin: 8 922fill-column: 74 923version-control: never 924End: 925