xref: /netbsd-src/external/gpl3/binutils.old/dist/cpu/ChangeLog (revision 9573673d78c64ea1eac42d7f2e9521be89932ae5)
12013-03-25  Tristan Gingold  <gingold@adacore.com>
2	Backport of: 2013-03-08  Yann Sionneau  <yann.sionneau@gmail.com>
3
4	PR binutils/15241
5	* lm32.cpu (Control and status registers): Add CFG2, PSW,
6	TLBVADDR, TLBPADDR and TLBBADVADDR.
7
82012-02-27  Alan Modra  <amodra@gmail.com>
9
10	* mt.opc (print_dollarhex): Trim values to 32 bits.
11
122011-12-15  Nick Clifton  <nickc@redhat.com>
13
14	* frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
15	hosts.
16
172011-10-26  Joern Rennecke  <joern.rennecke@embecosm.com>
18
19	* epiphany.opc (parse_branch_addr): Fix type of valuep.
20	Cast value before printing it as a long.
21	(parse_postindex): Fix type of valuep.
22
232011-10-25  Joern Rennecke  <joern.rennecke@embecosm.com>
24
25	* cpu/epiphany.cpu: New file.
26	* cpu/epiphany.opc: New file.
27
282011-08-22  Nick Clifton  <nickc@redhat.com>
29
30	* fr30.cpu: Newly contributed file.
31	* fr30.opc: Likewise.
32	* ip2k.cpu: Likewise.
33	* ip2k.opc: Likewise.
34	* mep-avc.cpu: Likewise.
35	* mep-avc2.cpu: Likewise.
36	* mep-c5.cpu: Likewise.
37	* mep-core.cpu: Likewise.
38	* mep-default.cpu: Likewise.
39	* mep-ext-cop.cpu: Likewise.
40	* mep-fmax.cpu: Likewise.
41	* mep-h1.cpu: Likewise.
42	* mep-ivc2.cpu: Likewise.
43	* mep-rhcop.cpu: Likewise.
44	* mep-sample-ucidsp.cpu: Likewise.
45	* mep.cpu: Likewise.
46	* mep.opc: Likewise.
47	* openrisc.cpu: Likewise.
48	* openrisc.opc: Likewise.
49	* xstormy16.cpu: Likewise.
50	* xstormy16.opc: Likewise.
51
522010-10-08  Pierre Muller  <muller@ics.u-strasbg.fr>
53
54	* frv.opc: #undef DEBUG.
55
562010-07-03  DJ Delorie  <dj@delorie.com>
57
58	* m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
59
602010-02-11  Doug Evans  <dje@sebabeach.org>
61
62	* m32r.cpu (HASH-PREFIX): Delete.
63	(duhpo, dshpo): New pmacros.
64	(simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
65	(uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
66	attribute, define with dshpo.
67	(uimm24): Delete HASH-PREFIX attribute.
68	* m32r.opc (CGEN_PRINT_NORMAL): Delete.
69	(print_signed_with_hash_prefix): New function.
70	(print_unsigned_with_hash_prefix): New function.
71	* xc16x.cpu (dowh): New pmacro.
72	(upof16): Define with dowh, specify print handler.
73	(qbit, qlobit, qhibit): Ditto.
74	(upag16): Ditto.
75	* xc16x.opc (CGEN_PRINT_NORMAL): Delete.
76	(print_with_dot_prefix): New functions.
77	(print_with_pof_prefix, print_with_pag_prefix): New functions.
78
792010-01-24  Doug Evans  <dje@sebabeach.org>
80
81	* frv.cpu (floating-point-conversion): Update call to fp conv op.
82	(floating-point-dual-conversion, ne-floating-point-dual-conversion,
83	conditional-floating-point-conversion, ne-floating-point-conversion,
84	float-parallel-mul-add-double-semantics): Ditto.
85
862010-01-05  Doug Evans  <dje@sebabeach.org>
87
88	* m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
89	(f-dsp-40-u20, f-dsp-40-u24): Ditto.
90
912010-01-02  Doug Evans  <dje@sebabeach.org>
92
93	* m32c.opc (parse_signed16): Fix typo.
94
952009-12-11  Nick Clifton  <nickc@redhat.com>
96
97	* frv.opc: Fix shadowed variable warnings.
98	* m32c.opc: Fix shadowed variable warnings.
99
1002009-11-14  Doug Evans  <dje@sebabeach.org>
101
102	Must use VOID expression in VOID context.
103	* xc16x.cpu (mov4): Fix mode of `sequence'.
104	(mov9, mov10): Ditto.
105	(movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
106	(callr, callseg, calls, trap, rets, reti): Ditto.
107	(jb, jbc, jnb, jnbs): Fix mode of `if'.  Comment out no-op `sll'.
108	(atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
109	(exts, exts1, extsr, extsr1, prior): Ditto.
110
1112009-10-23  Doug Evans  <dje@sebabeach.org>
112
113	* m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
114	cgen-ops.h -> cgen/basic-ops.h.
115
1162009-09-25  Alan Modra  <amodra@bigpond.net.au>
117
118	* m32r.cpu (stb-plus): Typo fix.
119
1202009-09-23  Doug Evans  <dje@sebabeach.org>
121
122	* m32r.cpu (sth-plus): Fix address mode and calculation.
123	(stb-plus): Ditto.
124	(clrpsw): Fix mask calculation.
125	(bset, bclr, btst): Make mode in bit calculation match expression.
126
127	* xc16x.cpu (rtl-version): Set to 0.8.
128	(gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
129	make uppercase.  Remove unnecessary name-prefix spec.
130	(grb-names, conditioncode-names, extconditioncode-names): Ditto.
131	(grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
132	(reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
133	(h-cr): New hardware.
134	(muls): Comment out parts that won't compile, add fixme.
135	(mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
136	(scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
137	(bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
138
1392009-07-16  Doug Evans  <dje@sebabeach.org>
140
141	* cpu/simplify.inc (*): One line doc strings don't need \n.
142	(df): Invoke define-full-ifield instead of claiming it's an alias.
143	(dno): Define.
144	(dnop): Mark as deprecated.
145
1462009-06-22  Alan Modra  <amodra@bigpond.net.au>
147
148	* m32c.opc (parse_lab_5_3): Use correct enum.
149
1502009-01-07  Hans-Peter Nilsson  <hp@axis.com>
151
152	* frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
153	(DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
154	(media-arith-sat-semantics): Explicitly sign- or zero-extend
155	arguments of "operation" to DI using "mode" and the new pmacros.
156
1572009-01-03  Hans-Peter Nilsson  <hp@axis.com>
158
159	* cris.cpu (cris-implemented-writable-specregs-v32): Correct size
160	of number 2, PID.
161
1622008-12-23  Jon Beniston <jon@beniston.com>
163
164	* lm32.cpu: New file.
165	* lm32.opc: New file.
166
1672008-01-29  Alan Modra  <amodra@bigpond.net.au>
168
169	* mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
170	to source.
171
1722007-10-22  Hans-Peter Nilsson  <hp@axis.com>
173
174	* cris.cpu (movs, movu): Use result of extension operation when
175	updating flags.
176
1772007-07-04  Nick Clifton  <nickc@redhat.com>
178
179	* cris.cpu: Update copyright notice to refer to GPLv3.
180	* frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
181	m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
182	sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
183	xc16x.opc: Likewise.
184	* iq2000.cpu: Fix copyright notice to refer to FSF.
185
1862007-04-30  Mark Salter  <msalter@sadr.localdomain>
187
188	* frv.cpu (spr-names): Support new coprocessor SPR registers.
189
1902007-04-20  Nick Clifton  <nickc@redhat.com>
191
192	* xc16x.cpu: Restore after accidentally overwriting this file with
193	xc16x.opc.
194
1952007-03-29  DJ Delorie  <dj@redhat.com>
196
197	* m32c.cpu (Imm-8-s4n): Fix print hook.
198	(Lab-24-8, Lab-32-8, Lab-40-8): Fix.
199	(arith-jnz-imm4-dst-defn): Make relaxable.
200	(arith-jnz16-imm4-dst-defn): Fix encodings.
201
2022007-03-20  DJ Delorie  <dj@redhat.com>
203
204	* m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
205	mem20): New.
206	(src16-16-20-An-relative-*): New.
207	(dst16-*-20-An-relative-*): New.
208	(dst16-16-16sa-*): New
209	(dst16-16-16ar-*): New
210	(dst32-16-16sa-Unprefixed-*): New
211	(jsri): Fix operands.
212	(setzx): Fix encoding.
213
2142007-03-08  Alan Modra  <amodra@bigpond.net.au>
215
216	* m32r.opc: Formatting.
217
2182006-05-22  Nick Clifton  <nickc@redhat.com>
219
220	* iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
221
2222006-04-10  DJ Delorie  <dj@redhat.com>
223
224	* m32c.opc (parse_unsigned_bitbase): Take a new parameter which
225	decides if this function accepts symbolic constants or not.
226	(parse_signed_bitbase): Likewise.
227	(parse_unsigned_bitbase8): Pass the new parameter.
228	(parse_unsigned_bitbase11): Likewise.
229	(parse_unsigned_bitbase16): Likewise.
230	(parse_unsigned_bitbase19): Likewise.
231	(parse_unsigned_bitbase27): Likewise.
232	(parse_signed_bitbase8): Likewise.
233	(parse_signed_bitbase11): Likewise.
234	(parse_signed_bitbase19): Likewise.
235
2362006-03-13  DJ Delorie  <dj@redhat.com>
237
238	* m32c.cpu (Bit3-S): New.
239	(btst:s): New.
240	* m32c.opc (parse_bit3_S): New.
241
242	* m32c.cpu (decimal-subtraction16-insn): Add second operand.
243	(btst): Add optional :G suffix for MACH32.
244	(or.b:S): New.
245	(pop.w:G): Add optional :G suffix for MACH16.
246	(push.b.imm): Fix syntax.
247
2482006-03-10  DJ Delorie  <dj@redhat.com>
249
250	* m32c.cpu (mul.l): New.
251	(mulu.l): New.
252
2532006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
254
255	* xc16x.opc (parse_hash): Return NULL if the input was parsed or
256	an error message otherwise.
257	(parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
258	Fix up comments to correctly describe the functions.
259
2602006-02-24  DJ Delorie  <dj@redhat.com>
261
262	* m32c.cpu (RL_TYPE): New attribute, with macros.
263	(Lab-8-24): Add RELAX.
264	(unary-insn-defn-g, binary-arith-imm-dst-defn,
265	binary-arith-imm4-dst-defn): Add 1ADDR attribute.
266	(binary-arith-src-dst-defn): Add 2ADDR attribute.
267	(jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
268	jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
269	attribute.
270	(jsri16, jsri32): Add 1ADDR attribute.
271	(jsr32.w, jsr32.a): Add JUMP attribute.
272
2732006-02-17  Shrirang Khisti  <shrirangk@kpitcummins.com>
274            Anil Paranjape   <anilp1@kpitcummins.com>
275            Shilin Shakti    <shilins@kpitcummins.com>
276
277	* xc16x.cpu: New file containing complete CGEN specific XC16X CPU
278	description.
279	* xc16x.opc: New file containing supporting XC16C routines.
280
2812006-02-10  Nick Clifton  <nickc@redhat.com>
282
283	* iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
284
2852006-01-06  DJ Delorie  <dj@redhat.com>
286
287	* m32c.cpu (mov.w:q): Fix mode.
288	(push32.b.imm): Likewise, for the comment.
289
2902005-12-16  Nathan Sidwell  <nathan@codesourcery.com>
291
292	Second part of ms1 to mt renaming.
293	* mt.cpu (define-arch, define-isa): Set name to mt.
294	(define-mach): Adjust.
295	* mt.opc (CGEN_ASM_HASH): Update.
296	(mt_asm_hash, mt_cgen_insn_supported): Renamed.
297	(parse_loopsize, parse_imm16): Adjust.
298
2992005-12-13  DJ Delorie  <dj@redhat.com>
300
301	* m32c.cpu (jsri): Fix order so register names aren't treated as
302	symbols.
303	(indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
304	indexwd, indexws): Fix encodings.
305
3062005-12-12  Nathan Sidwell  <nathan@codesourcery.com>
307
308	* mt.cpu: Rename from ms1.cpu.
309	* mt.opc: Rename from ms1.opc.
310
3112005-12-06  Hans-Peter Nilsson  <hp@axis.com>
312
313	* cris.cpu (simplecris-common-writable-specregs)
314	(simplecris-common-readable-specregs): Split from
315	simplecris-common-specregs.  All users changed.
316	(cris-implemented-writable-specregs-v0)
317	(cris-implemented-readable-specregs-v0): Similar from
318	cris-implemented-specregs-v0.
319	(cris-implemented-writable-specregs-v3)
320	(cris-implemented-readable-specregs-v3)
321	(cris-implemented-writable-specregs-v8)
322	(cris-implemented-readable-specregs-v8)
323	(cris-implemented-writable-specregs-v10)
324	(cris-implemented-readable-specregs-v10)
325	(cris-implemented-writable-specregs-v32)
326	(cris-implemented-readable-specregs-v32): Similar.
327	(bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
328	insns and specializations.
329
3302005-11-08  Nathan Sidwell  <nathan@codesourcery.com>
331
332	Add ms2
333	* ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
334	model.
335	(f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
336	f-cb2incr, f-rc3): New fields.
337	(LOOP): New instruction.
338	(JAL-HAZARD): New hazard.
339	(imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
340	New operands.
341	(mul, muli, dbnz, iflush): Enable for ms2
342	(jal, reti): Has JAL-HAZARD.
343	(ldctxt, ldfb, stfb): Only ms1.
344	(fbcb): Only ms1,ms1-003.
345	(wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
346	fbcbincrs, mfbcbincrs): Enable for ms2.
347	(loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
348	* ms1.opc (parse_loopsize): New.
349	(parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
350	(print_pcrel): New.
351
3522005-10-28  Dave Brolley  <brolley@redhat.com>
353
354	Contribute the following change:
355	2003-09-24  Dave Brolley  <brolley@redhat.com>
356
357	* frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
358	CGEN_ATTR_VALUE_TYPE.
359	* m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
360	Use cgen_bitset_intersect_p.
361
3622005-10-27  DJ Delorie  <dj@redhat.com>
363
364	* m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
365	(arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
366	arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
367	imm operand is needed.
368	(adjnz, sbjnz): Pass the right operands.
369	(unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
370	unary-insn): Add -g variants for opcodes that need to support :G.
371	(not.BW:G, push.BW:G): Call it.
372	(stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
373	stzx16-imm8-imm8-abs16): Fix operand typos.
374	* m32c.opc (m32c_asm_hash): Support bnCND.
375	(parse_signed4n, print_signed4n): New.
376
3772005-10-26  DJ Delorie  <dj@redhat.com>
378
379	* m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
380	(mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
381	mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
382	dsp8[sp] is signed.
383	(mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
384	(mov.BW:S r0,r1): Fix typo r1l->r1.
385	(tst): Allow :G suffix.
386	* m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
387
3882005-10-26  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
389
390	* m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
391
3922005-10-25  DJ Delorie  <dj@redhat.com>
393
394	* m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
395	making one a macro of the other.
396
3972005-10-21  DJ Delorie  <dj@redhat.com>
398
399	* m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
400	(indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
401	indexld, indexls): .w variants have `1' bit.
402	(rot32.b): QI, not SI.
403	(rot32.w): HI, not SI.
404	(xchg16): HI for .w variant.
405
4062005-10-19  Nick Clifton  <nickc@redhat.com>
407
408	* m32r.opc (parse_slo16): Fix bad application of previous patch.
409
4102005-10-18  Andreas Schwab  <schwab@suse.de>
411
412	* m32r.opc (parse_slo16): Better version of previous patch.
413
4142005-10-14  Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
415
416	* cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
417	size.
418
4192005-07-25  DJ Delorie  <dj@redhat.com>
420
421	* m32c.opc (parse_unsigned8): Add %dsp8().
422	(parse_signed8): Add %hi8().
423	(parse_unsigned16): Add %dsp16().
424	(parse_signed16): Add %lo16() and %hi16().
425	(parse_lab_5_3): Make valuep a bfd_vma *.
426
4272005-07-18  Nick Clifton  <nickc@redhat.com>
428
429	* m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
430	components.
431	(f-lab32-jmp-s): Fix insertion sequence.
432	(Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
433	(Dsp-40-s8): Make parameter be signed.
434	(Dsp-40-s16): Likewise.
435	(Dsp-48-s8): Likewise.
436	(Dsp-48-s16): Likewise.
437	(Imm-13-u3): Likewise. (Despite its name!)
438	(BitBase16-16-s8): Make the parameter be unsigned.
439	(BitBase16-8-u11-S): Likewise.
440	(Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
441	jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
442	relaxation.
443
444	* m32c.opc: Fix formatting.
445	Use safe-ctype.h instead of ctype.h
446	Move duplicated code sequences into a macro.
447	Fix compile time warnings about signedness mismatches.
448	Remove dead code.
449	(parse_lab_5_3): New parser function.
450
4512005-07-16  Jim Blandy  <jimb@redhat.com>
452
453	* m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
454	to represent isa sets.
455
4562005-07-15  Jim Blandy  <jimb@redhat.com>
457
458	* m32c.cpu, m32c.opc: Fix copyright.
459
4602005-07-14  Jim Blandy  <jimb@redhat.com>
461
462	* m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
463
4642005-07-14  Alan Modra  <amodra@bigpond.net.au>
465
466	* ms1.opc (print_dollarhex): Correct format string.
467
4682005-07-06  Alan Modra  <amodra@bigpond.net.au>
469
470	* iq2000.cpu: Include from binutils cpu dir.
471
4722005-07-05  Nick Clifton  <nickc@redhat.com>
473
474	* iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
475	unsigned in order to avoid compile time warnings about sign
476	conflicts.
477
478	* ms1.opc (parse_*): Likewise.
479	(parse_imm16): Use a "void *" as it is passed both signed and
480	unsigned arguments.
481
4822005-07-01  Nick Clifton  <nickc@redhat.com>
483
484	* frv.opc: Update to ISO C90 function declaration style.
485	* iq2000.opc: Likewise.
486	* m32r.opc: Likewise.
487	* sh.opc: Likewise.
488
4892005-06-15  Dave Brolley  <brolley@redhat.com>
490
491	Contributed by Red Hat.
492	* ms1.cpu: New file.  Written by Nick Clifton, Stan Cox.
493	* ms1.opc: New file.  Written by Stan Cox.
494
4952005-05-10  Nick Clifton  <nickc@redhat.com>
496
497	* Update the address and phone number of the FSF organization in
498	the GPL notices in the following files:
499	cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
500	m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
501	sh64-media.cpu, simplify.inc
502
5032005-02-24  Alan Modra  <amodra@bigpond.net.au>
504
505	* frv.opc (parse_A): Warning fix.
506
5072005-02-23  Nick Clifton  <nickc@redhat.com>
508
509	* frv.opc: Fixed compile time warnings about differing signed'ness
510	of pointers passed to functions.
511	* m32r.opc: Likewise.
512
5132005-02-11  Nick Clifton  <nickc@redhat.com>
514
515	* iq2000.opc (parse_jtargq10): Change type of valuep argument to
516	'bfd_vma *' in order avoid compile time warning message.
517
5182005-01-28  Hans-Peter Nilsson  <hp@axis.com>
519
520	* cris.cpu (mstep): Add missing insn.
521
5222005-01-25  Alexandre Oliva  <aoliva@redhat.com>
523
524	2004-11-10  Alexandre Oliva  <aoliva@redhat.com>
525	* frv.cpu: Add support for TLS annotations in loads and calll.
526	* frv.opc (parse_symbolic_address): New.
527	(parse_ldd_annotation): New.
528	(parse_call_annotation): New.
529	(parse_ld_annotation): New.
530	(parse_ulo16, parse_uslo16): Use parse_symbolic_address.
531	Introduce TLS relocations.
532	(parse_d12, parse_s12, parse_u12): Likewise.
533	(parse_uhi16): Likewise.  Fix constant checking on 64-bit host.
534	(parse_call_label, print_at): New.
535
5362004-12-21  Mikael Starvik  <starvik@axis.com>
537
538	* cris.cpu (cris-set-mem): Correct integral write semantics.
539
5402004-11-29  Hans-Peter Nilsson  <hp@axis.com>
541
542	* cris.cpu: New file.
543
5442004-11-15  Michael K. Lechner <mike.lechner@gmail.com>
545
546	* iq2000.cpu: Added quotes around macro arguments so that they
547	will work with newer versions of guile.
548
5492004-10-27  Nick Clifton  <nickc@redhat.com>
550
551	* iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
552	wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
553	operand.
554	* iq2000.cpu (dnop index): Rename to _index to avoid complications
555	with guile.
556
5572004-08-27  Richard Sandiford  <rsandifo@redhat.com>
558
559	* frv.cpu (cfmovs): Change UNIT attribute to FMALL.
560
5612004-05-15  Nick Clifton  <nickc@redhat.com>
562
563	* iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
564
5652004-03-30  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
566
567	* m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
568
5692004-03-01  Richard Sandiford  <rsandifo@redhat.com>
570
571	* frv.cpu (define-arch frv): Add fr450 mach.
572	(define-mach fr450): New.
573	(define-model fr450): New.  Add profile units to every fr450 insn.
574	(define-attr UNIT): Add MDCUTSSI.
575	(define-attr FR450-MAJOR): New enum.  Add to every fr450 insn.
576	(define-attr AUDIO): New boolean.
577	(f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
578	(f-LRA-null, f-TLBPR-null): New fields.
579	(scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
580	(tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
581	(LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
582	(LRA-null, TLBPR-null): New macros.
583	(iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
584	(load-real-address): New macro.
585	(lrai, lrad, tlbpr): New instructions.
586	(media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
587	(mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
588	(mdcutssi): Change UNIT attribute to MDCUTSSI.
589	(media-low-clear-semantics, media-scope-limit-semantics)
590	(media-quad-limit, media-quad-shift): New macros.
591	(mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
592	* frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
593	(frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
594	(frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
595	(fr450_unit_mapping): New array.
596	(fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
597	for new MDCUTSSI unit.
598	(fr450_check_insn_major_constraints): New function.
599	(check_insn_major_constraints): Use it.
600
6012004-03-01  Richard Sandiford  <rsandifo@redhat.com>
602
603	* frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
604	(scutss): Change unit to I0.
605	(calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
606	(mqsaths): Fix FR400-MAJOR categorization.
607	(media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
608	(media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
609	* frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
610	combinations.
611
6122004-03-01  Richard Sandiford  <rsandifo@redhat.com>
613
614	* frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
615	(rstb, rsth, rst, rstd, rstq): Delete.
616	(rstbf, rsthf, rstf, rstdf, rstqf): Delete.
617
6182004-02-23  Nick Clifton  <nickc@redhat.com>
619
620	* Apply these patches from Renesas:
621
622	2004-02-10  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
623
624	* cpu/m32r.opc (my_print_insn): Fixed incorrect output when
625	disassembling codes for 0x*2 addresses.
626
627	2003-12-15  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
628
629	* cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
630
631	2003-12-03  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
632
633	* cpu/m32r.cpu : Add new model m32r2.
634	Add new instructions.
635	Replace occurrances of 'Mitsubishi' with 'Renesas'.
636	Changed PIPE attr of push from O to OS.
637	Care for Little-endian of M32R.
638	* cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
639	Care for Little-endian of M32R.
640	(parse_slo16): signed extension for value.
641
6422004-02-20  Andrew Cagney  <cagney@redhat.com>
643
644	* m32r.opc, m32r.cpu: New files.  Written by , Doug Evans, Nick
645	Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
646
647	* sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
648	written by Ben Elliston.
649
6502004-01-14  Richard Sandiford  <rsandifo@redhat.com>
651
652	* frv.cpu (UNIT): Add IACC.
653	(iacc-multiply-r-r): Use it.
654	* frv.opc (fr400_unit_mapping): Add entry for IACC.
655	(fr500_unit_mapping, fr550_unit_mapping): Likewise.
656
6572004-01-06  Alexandre Oliva  <aoliva@redhat.com>
658
659	2003-12-19  Alexandre Oliva  <aoliva@redhat.com>
660	* frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
661	cut&paste errors in shifting/truncating numerical operands.
662	2003-08-08  Alexandre Oliva  <aoliva@redhat.com>
663	* frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
664	(parse_uslo16): Likewise.
665	(parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
666	(parse_d12): Parse gotoff12 and gotofffuncdesc12.
667	(parse_s12): Likewise.
668	2003-08-04  Alexandre Oliva  <aoliva@redhat.com>
669	* frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
670	(parse_uslo16): Likewise.
671	(parse_uhi16): Parse gothi and gotfuncdeschi.
672	(parse_d12): Parse got12 and gotfuncdesc12.
673	(parse_s12): Likewise.
674
6752003-10-10  Dave Brolley  <brolley@redhat.com>
676
677	* frv.cpu (dnpmop): New p-macro.
678	(GRdoublek): Use dnpmop.
679	(CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
680	(store-double-r-r): Use (.sym regtype doublek).
681	(r-store-double): Ditto.
682	(store-double-r-r-u): Ditto.
683	(conditional-store-double): Ditto.
684	(conditional-store-double-u): Ditto.
685	(store-double-r-simm): Ditto.
686	(fmovs): Assign to UNIT FMALL.
687
6882003-10-06  Dave Brolley  <brolley@redhat.com>
689
690	* frv.cpu, frv.opc: Add support for fr550.
691
6922003-09-24  Dave Brolley  <brolley@redhat.com>
693
694	* frv.cpu (u-commit): New modelling unit for fr500.
695	(mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
696	(commit-r): Use u-commit model for fr500.
697	(commit): Ditto.
698	(conditional-float-binary-op): Take profiling data as an argument.
699	Update callers.
700	(ne-float-binary-op): Ditto.
701
7022003-09-19  Michael Snyder  <msnyder@redhat.com>
703
704	* frv.cpu (nldqi): Delete unimplemented instruction.
705
7062003-09-12  Dave Brolley  <brolley@redhat.com>
707
708	* frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
709	(clear-ne-flag-r): Pass insn profiling in as an argument. Call
710	frv_ref_SI to get input register referenced for profiling.
711	(clear-ne-flag-all): Pass insn profiling in as an argument.
712	(clrgr,clrfr,clrga,clrfa): Add profiling information.
713
7142003-09-11  Michael Snyder  <msnyder@redhat.com>
715
716	* frv.cpu: Typographical corrections.
717
7182003-09-09  Dave Brolley  <brolley@redhat.com>
719
720	* frv.cpu (media-dual-complex): Change UNIT to FMALL.
721	(conditional-media-dual-complex, media-quad-complex): Likewise.
722
7232003-09-04  Dave Brolley  <brolley@redhat.com>
724
725	* frv.cpu (register-transfer): Pass in all attributes in on argument.
726	Update all callers.
727	(conditional-register-transfer): Ditto.
728	(cache-preload): Ditto.
729	(floating-point-conversion): Ditto.
730	(floating-point-neg): Ditto.
731	(float-abs): Ditto.
732	(float-binary-op-s): Ditto.
733	(conditional-float-binary-op): Ditto.
734	(ne-float-binary-op): Ditto.
735	(float-dual-arith): Ditto.
736	(ne-float-dual-arith): Ditto.
737
7382003-09-03  Dave Brolley  <brolley@redhat.com>
739
740	* frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
741	* frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
742	MCLRACC-1.
743	(A): Removed operand.
744	(A0,A1): New operands replace operand A.
745	(mnop): Now a real insn
746	(mclracc): Removed insn.
747	(mclracc-0, mclracc-1): New insns replace mclracc.
748	(all insns): Use new UNIT attributes.
749
7502003-08-21  Nick Clifton  <nickc@redhat.com>
751
752	* frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
753	and u-media-dual-btoh with output parameter.
754	(cmbtoh): Add profiling hack.
755
7562003-08-19  Michael Snyder  <msnyder@redhat.com>
757
758	* frv.cpu: Fix typo, Frintkeven -> FRintkeven
759
7602003-06-10  Doug Evans  <dje@sebabeach.org>
761
762	* frv.cpu: Add IDOC attribute.
763
7642003-06-06  Andrew Cagney  <cagney@redhat.com>
765
766	Contributed by Red Hat.
767	* iq2000.cpu: New file.  Written by Ben Elliston, Jeff Johnston,
768	Stan Cox, and Frank Ch. Eigler.
769	* iq2000.opc: New file.  Written by Ben Elliston, Frank
770	Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
771	* iq2000m.cpu: New file.  Written by Jeff Johnston.
772	* iq10.cpu: New file.  Written by Jeff Johnston.
773
7742003-06-05  Nick Clifton  <nickc@redhat.com>
775
776	* frv.cpu (FRintieven): New operand.  An even-numbered only
777	version of the FRinti operand.
778	(FRintjeven): Likewise for FRintj.
779	(FRintkeven): Likewise for FRintk.
780	(mdcutssi, media-dual-word-rotate-r-r, mqsaths,
781	media-quad-arith-sat-semantics, media-quad-arith-sat,
782	conditional-media-quad-arith-sat, mdunpackh,
783	media-quad-multiply-semantics, media-quad-multiply,
784	conditional-media-quad-multiply, media-quad-complex-i,
785	media-quad-multiply-acc-semantics, media-quad-multiply-acc,
786	conditional-media-quad-multiply-acc, munpackh,
787	media-quad-multiply-cross-acc-semantics, mdpackh,
788	media-quad-multiply-cross-acc, mbtoh-semantics,
789	media-quad-cross-multiply-cross-acc-semantics,
790	media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
791	media-quad-cross-multiply-acc-semantics, cmbtoh,
792	media-quad-cross-multiply-acc, media-quad-complex, mhtob,
793	media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
794	cmhtob): Use new operands.
795	* frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
796	(parse_even_register): New function.
797
7982003-06-03  Nick Clifton  <nickc@redhat.com>
799
800	* frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
801	immediate value not unsigned.
802
8032003-06-03  Andrew Cagney  <cagney@redhat.com>
804
805	Contributed by Red Hat.
806	* frv.cpu: New file.  Written by Dave Brolley, Catherine Moore,
807	and Eric Christopher.
808	* frv.opc: New file.  Written by Catherine Moore, and Dave
809	Brolley.
810	* simplify.inc: New file.  Written by Doug Evans.
811
8122003-05-02  Andrew Cagney  <cagney@redhat.com>
813
814	* New file.
815
816
817Local Variables:
818mode: change-log
819left-margin: 8
820fill-column: 74
821version-control: never
822End:
823