1 /* Renesas RL78 specific support for 32-bit ELF. 2 Copyright (C) 2011-2018 Free Software Foundation, Inc. 3 4 This file is part of BFD, the Binary File Descriptor library. 5 6 This program is free software; you can redistribute it and/or modify 7 it under the terms of the GNU General Public License as published by 8 the Free Software Foundation; either version 3 of the License, or 9 (at your option) any later version. 10 11 This program is distributed in the hope that it will be useful, 12 but WITHOUT ANY WARRANTY; without even the implied warranty of 13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 GNU General Public License for more details. 15 16 You should have received a copy of the GNU General Public License 17 along with this program; if not, write to the Free Software 18 Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, 19 MA 02110-1301, USA. */ 20 21 #include "sysdep.h" 22 #include "bfd.h" 23 #include "bfd_stdint.h" 24 #include "libbfd.h" 25 #include "elf-bfd.h" 26 #include "elf/rl78.h" 27 #include "libiberty.h" 28 29 #define valid_16bit_address(v) ((v) <= 0x0ffff || (v) >= 0xf0000) 30 31 #define RL78REL(n,sz,bit,shift,complain,pcrel) \ 32 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 33 bfd_elf_generic_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 34 35 static bfd_reloc_status_type rl78_special_reloc (bfd *, arelent *, asymbol *, void *, 36 asection *, bfd *, char **); 37 38 /* FIXME: We could omit the SHIFT parameter, it is always zero. */ 39 #define RL78_OP_REL(n,sz,bit,shift,complain,pcrel) \ 40 HOWTO (R_RL78_##n, shift, sz, bit, pcrel, 0, complain_overflow_ ## complain, \ 41 rl78_special_reloc, "R_RL78_" #n, FALSE, 0, ~0, FALSE) 42 43 /* Note that the relocations around 0x7f are internal to this file; 44 feel free to move them as needed to avoid conflicts with published 45 relocation numbers. */ 46 47 static reloc_howto_type rl78_elf_howto_table [] = 48 { 49 RL78REL (NONE, 3, 0, 0, dont, FALSE), 50 RL78REL (DIR32, 2, 32, 0, signed, FALSE), 51 RL78REL (DIR24S, 2, 24, 0, signed, FALSE), 52 RL78REL (DIR16, 1, 16, 0, dont, FALSE), 53 RL78REL (DIR16U, 1, 16, 0, unsigned, FALSE), 54 RL78REL (DIR16S, 1, 16, 0, signed, FALSE), 55 RL78REL (DIR8, 0, 8, 0, dont, FALSE), 56 RL78REL (DIR8U, 0, 8, 0, unsigned, FALSE), 57 RL78REL (DIR8S, 0, 8, 0, signed, FALSE), 58 RL78REL (DIR24S_PCREL, 2, 24, 0, signed, TRUE), 59 RL78REL (DIR16S_PCREL, 1, 16, 0, signed, TRUE), 60 RL78REL (DIR8S_PCREL, 0, 8, 0, signed, TRUE), 61 RL78REL (DIR16UL, 1, 16, 2, unsigned, FALSE), 62 RL78REL (DIR16UW, 1, 16, 1, unsigned, FALSE), 63 RL78REL (DIR8UL, 0, 8, 2, unsigned, FALSE), 64 RL78REL (DIR8UW, 0, 8, 1, unsigned, FALSE), 65 RL78REL (DIR32_REV, 1, 16, 0, dont, FALSE), 66 RL78REL (DIR16_REV, 1, 16, 0, dont, FALSE), 67 RL78REL (DIR3U_PCREL, 0, 3, 0, dont, TRUE), 68 69 EMPTY_HOWTO (0x13), 70 EMPTY_HOWTO (0x14), 71 EMPTY_HOWTO (0x15), 72 EMPTY_HOWTO (0x16), 73 EMPTY_HOWTO (0x17), 74 EMPTY_HOWTO (0x18), 75 EMPTY_HOWTO (0x19), 76 EMPTY_HOWTO (0x1a), 77 EMPTY_HOWTO (0x1b), 78 EMPTY_HOWTO (0x1c), 79 EMPTY_HOWTO (0x1d), 80 EMPTY_HOWTO (0x1e), 81 EMPTY_HOWTO (0x1f), 82 83 EMPTY_HOWTO (0x20), 84 EMPTY_HOWTO (0x21), 85 EMPTY_HOWTO (0x22), 86 EMPTY_HOWTO (0x23), 87 EMPTY_HOWTO (0x24), 88 EMPTY_HOWTO (0x25), 89 EMPTY_HOWTO (0x26), 90 EMPTY_HOWTO (0x27), 91 EMPTY_HOWTO (0x28), 92 EMPTY_HOWTO (0x29), 93 EMPTY_HOWTO (0x2a), 94 EMPTY_HOWTO (0x2b), 95 EMPTY_HOWTO (0x2c), 96 RL78REL (RH_RELAX, 0, 0, 0, dont, FALSE), 97 98 EMPTY_HOWTO (0x2e), 99 RL78REL (RH_SADDR, 0, 0, 0, dont, FALSE), 100 EMPTY_HOWTO (0x30), 101 EMPTY_HOWTO (0x31), 102 EMPTY_HOWTO (0x32), 103 EMPTY_HOWTO (0x33), 104 EMPTY_HOWTO (0x34), 105 EMPTY_HOWTO (0x35), 106 EMPTY_HOWTO (0x36), 107 EMPTY_HOWTO (0x37), 108 EMPTY_HOWTO (0x38), 109 EMPTY_HOWTO (0x39), 110 EMPTY_HOWTO (0x3a), 111 EMPTY_HOWTO (0x3b), 112 EMPTY_HOWTO (0x3c), 113 EMPTY_HOWTO (0x3d), 114 EMPTY_HOWTO (0x3e), 115 EMPTY_HOWTO (0x3f), 116 EMPTY_HOWTO (0x40), 117 118 RL78_OP_REL (ABS32, 2, 32, 0, dont, FALSE), 119 RL78_OP_REL (ABS24S, 2, 24, 0, signed, FALSE), 120 RL78_OP_REL (ABS16, 1, 16, 0, dont, FALSE), 121 RL78_OP_REL (ABS16U, 1, 16, 0, unsigned, FALSE), 122 RL78_OP_REL (ABS16S, 1, 16, 0, signed, FALSE), 123 RL78_OP_REL (ABS8, 0, 8, 0, dont, FALSE), 124 RL78_OP_REL (ABS8U, 0, 8, 0, unsigned, FALSE), 125 RL78_OP_REL (ABS8S, 0, 8, 0, signed, FALSE), 126 RL78_OP_REL (ABS24S_PCREL, 2, 24, 0, signed, TRUE), 127 RL78_OP_REL (ABS16S_PCREL, 1, 16, 0, signed, TRUE), 128 RL78_OP_REL (ABS8S_PCREL, 0, 8, 0, signed, TRUE), 129 RL78_OP_REL (ABS16UL, 1, 16, 0, unsigned, FALSE), 130 RL78_OP_REL (ABS16UW, 1, 16, 0, unsigned, FALSE), 131 RL78_OP_REL (ABS8UL, 0, 8, 0, unsigned, FALSE), 132 RL78_OP_REL (ABS8UW, 0, 8, 0, unsigned, FALSE), 133 RL78_OP_REL (ABS32_REV, 2, 32, 0, dont, FALSE), 134 RL78_OP_REL (ABS16_REV, 1, 16, 0, dont, FALSE), 135 136 #define STACK_REL_P(x) ((x) <= R_RL78_ABS16_REV && (x) >= R_RL78_ABS32) 137 138 EMPTY_HOWTO (0x52), 139 EMPTY_HOWTO (0x53), 140 EMPTY_HOWTO (0x54), 141 EMPTY_HOWTO (0x55), 142 EMPTY_HOWTO (0x56), 143 EMPTY_HOWTO (0x57), 144 EMPTY_HOWTO (0x58), 145 EMPTY_HOWTO (0x59), 146 EMPTY_HOWTO (0x5a), 147 EMPTY_HOWTO (0x5b), 148 EMPTY_HOWTO (0x5c), 149 EMPTY_HOWTO (0x5d), 150 EMPTY_HOWTO (0x5e), 151 EMPTY_HOWTO (0x5f), 152 EMPTY_HOWTO (0x60), 153 EMPTY_HOWTO (0x61), 154 EMPTY_HOWTO (0x62), 155 EMPTY_HOWTO (0x63), 156 EMPTY_HOWTO (0x64), 157 EMPTY_HOWTO (0x65), 158 EMPTY_HOWTO (0x66), 159 EMPTY_HOWTO (0x67), 160 EMPTY_HOWTO (0x68), 161 EMPTY_HOWTO (0x69), 162 EMPTY_HOWTO (0x6a), 163 EMPTY_HOWTO (0x6b), 164 EMPTY_HOWTO (0x6c), 165 EMPTY_HOWTO (0x6d), 166 EMPTY_HOWTO (0x6e), 167 EMPTY_HOWTO (0x6f), 168 EMPTY_HOWTO (0x70), 169 EMPTY_HOWTO (0x71), 170 EMPTY_HOWTO (0x72), 171 EMPTY_HOWTO (0x73), 172 EMPTY_HOWTO (0x74), 173 EMPTY_HOWTO (0x75), 174 EMPTY_HOWTO (0x76), 175 EMPTY_HOWTO (0x77), 176 177 EMPTY_HOWTO (0x78), 178 EMPTY_HOWTO (0x79), 179 EMPTY_HOWTO (0x7a), 180 EMPTY_HOWTO (0x7b), 181 EMPTY_HOWTO (0x7c), 182 EMPTY_HOWTO (0x7d), 183 EMPTY_HOWTO (0x7e), 184 EMPTY_HOWTO (0x7f), 185 186 RL78_OP_REL (SYM, 2, 32, 0, dont, FALSE), 187 RL78_OP_REL (OPneg, 2, 32, 0, dont, FALSE), 188 RL78_OP_REL (OPadd, 2, 32, 0, dont, FALSE), 189 RL78_OP_REL (OPsub, 2, 32, 0, dont, FALSE), 190 RL78_OP_REL (OPmul, 2, 32, 0, dont, FALSE), 191 RL78_OP_REL (OPdiv, 2, 32, 0, dont, FALSE), 192 RL78_OP_REL (OPshla, 2, 32, 0, dont, FALSE), 193 RL78_OP_REL (OPshra, 2, 32, 0, dont, FALSE), 194 RL78_OP_REL (OPsctsize, 2, 32, 0, dont, FALSE), 195 EMPTY_HOWTO (0x89), 196 EMPTY_HOWTO (0x8a), 197 EMPTY_HOWTO (0x8b), 198 EMPTY_HOWTO (0x8c), 199 RL78_OP_REL (OPscttop, 2, 32, 0, dont, FALSE), 200 EMPTY_HOWTO (0x8e), 201 EMPTY_HOWTO (0x8f), 202 RL78_OP_REL (OPand, 2, 32, 0, dont, FALSE), 203 RL78_OP_REL (OPor, 2, 32, 0, dont, FALSE), 204 RL78_OP_REL (OPxor, 2, 32, 0, dont, FALSE), 205 RL78_OP_REL (OPnot, 2, 32, 0, dont, FALSE), 206 RL78_OP_REL (OPmod, 2, 32, 0, dont, FALSE), 207 RL78_OP_REL (OPromtop, 2, 32, 0, dont, FALSE), 208 RL78_OP_REL (OPramtop, 2, 32, 0, dont, FALSE) 209 }; 210 211 /* Map BFD reloc types to RL78 ELF reloc types. */ 212 213 struct rl78_reloc_map 214 { 215 bfd_reloc_code_real_type bfd_reloc_val; 216 unsigned int rl78_reloc_val; 217 }; 218 219 static const struct rl78_reloc_map rl78_reloc_map [] = 220 { 221 { BFD_RELOC_NONE, R_RL78_NONE }, 222 { BFD_RELOC_8, R_RL78_DIR8S }, 223 { BFD_RELOC_16, R_RL78_DIR16S }, 224 { BFD_RELOC_24, R_RL78_DIR24S }, 225 { BFD_RELOC_32, R_RL78_DIR32 }, 226 { BFD_RELOC_RL78_16_OP, R_RL78_DIR16 }, 227 { BFD_RELOC_RL78_DIR3U_PCREL, R_RL78_DIR3U_PCREL }, 228 { BFD_RELOC_8_PCREL, R_RL78_DIR8S_PCREL }, 229 { BFD_RELOC_16_PCREL, R_RL78_DIR16S_PCREL }, 230 { BFD_RELOC_24_PCREL, R_RL78_DIR24S_PCREL }, 231 { BFD_RELOC_RL78_8U, R_RL78_DIR8U }, 232 { BFD_RELOC_RL78_16U, R_RL78_DIR16U }, 233 { BFD_RELOC_RL78_SYM, R_RL78_SYM }, 234 { BFD_RELOC_RL78_OP_SUBTRACT, R_RL78_OPsub }, 235 { BFD_RELOC_RL78_OP_NEG, R_RL78_OPneg }, 236 { BFD_RELOC_RL78_OP_AND, R_RL78_OPand }, 237 { BFD_RELOC_RL78_OP_SHRA, R_RL78_OPshra }, 238 { BFD_RELOC_RL78_ABS8, R_RL78_ABS8 }, 239 { BFD_RELOC_RL78_ABS16, R_RL78_ABS16 }, 240 { BFD_RELOC_RL78_ABS16_REV, R_RL78_ABS16_REV }, 241 { BFD_RELOC_RL78_ABS32, R_RL78_ABS32 }, 242 { BFD_RELOC_RL78_ABS32_REV, R_RL78_ABS32_REV }, 243 { BFD_RELOC_RL78_ABS16UL, R_RL78_ABS16UL }, 244 { BFD_RELOC_RL78_ABS16UW, R_RL78_ABS16UW }, 245 { BFD_RELOC_RL78_ABS16U, R_RL78_ABS16U }, 246 { BFD_RELOC_RL78_SADDR, R_RL78_RH_SADDR }, 247 { BFD_RELOC_RL78_RELAX, R_RL78_RH_RELAX } 248 }; 249 250 static reloc_howto_type * 251 rl78_reloc_type_lookup (bfd * abfd ATTRIBUTE_UNUSED, 252 bfd_reloc_code_real_type code) 253 { 254 unsigned int i; 255 256 if (code == BFD_RELOC_RL78_32_OP) 257 return rl78_elf_howto_table + R_RL78_DIR32; 258 259 for (i = ARRAY_SIZE (rl78_reloc_map); i--;) 260 if (rl78_reloc_map [i].bfd_reloc_val == code) 261 return rl78_elf_howto_table + rl78_reloc_map[i].rl78_reloc_val; 262 263 return NULL; 264 } 265 266 static reloc_howto_type * 267 rl78_reloc_name_lookup (bfd * abfd ATTRIBUTE_UNUSED, const char * r_name) 268 { 269 unsigned int i; 270 271 for (i = 0; i < ARRAY_SIZE (rl78_elf_howto_table); i++) 272 if (rl78_elf_howto_table[i].name != NULL 273 && strcasecmp (rl78_elf_howto_table[i].name, r_name) == 0) 274 return rl78_elf_howto_table + i; 275 276 return NULL; 277 } 278 279 /* Set the howto pointer for an RL78 ELF reloc. */ 280 281 static bfd_boolean 282 rl78_info_to_howto_rela (bfd * abfd, 283 arelent * cache_ptr, 284 Elf_Internal_Rela * dst) 285 { 286 unsigned int r_type; 287 288 r_type = ELF32_R_TYPE (dst->r_info); 289 if (r_type >= (unsigned int) R_RL78_max) 290 { 291 /* xgettext:c-format */ 292 _bfd_error_handler (_("%pB: unsupported relocation type %#x"), 293 abfd, r_type); 294 bfd_set_error (bfd_error_bad_value); 295 return FALSE; 296 } 297 cache_ptr->howto = rl78_elf_howto_table + r_type; 298 return TRUE; 299 } 300 301 static bfd_vma 302 get_symbol_value (const char * name, 303 struct bfd_link_info * info, 304 bfd * input_bfd, 305 asection * input_section, 306 int offset) 307 { 308 struct bfd_link_hash_entry * h; 309 310 if (info == NULL) 311 return 0; 312 313 h = bfd_link_hash_lookup (info->hash, name, FALSE, FALSE, TRUE); 314 315 if (h == NULL 316 || (h->type != bfd_link_hash_defined 317 && h->type != bfd_link_hash_defweak)) 318 { 319 (*info->callbacks->undefined_symbol) 320 (info, name, input_bfd, input_section, offset, TRUE); 321 return 0; 322 } 323 324 return (h->u.def.value 325 + h->u.def.section->output_section->vma 326 + h->u.def.section->output_offset); 327 } 328 329 static bfd_vma 330 get_romstart (struct bfd_link_info * info, 331 bfd * abfd, 332 asection * sec, 333 int offset) 334 { 335 static bfd_boolean cached = FALSE; 336 static bfd_vma cached_value = 0; 337 338 if (!cached) 339 { 340 cached_value = get_symbol_value ("_start", info, abfd, sec, offset); 341 cached = TRUE; 342 } 343 return cached_value; 344 } 345 346 static bfd_vma 347 get_ramstart (struct bfd_link_info * info, 348 bfd * abfd, 349 asection * sec, 350 int offset) 351 { 352 static bfd_boolean cached = FALSE; 353 static bfd_vma cached_value = 0; 354 355 if (!cached) 356 { 357 cached_value = get_symbol_value ("__datastart", info, abfd, sec, offset); 358 cached = TRUE; 359 } 360 return cached_value; 361 } 362 363 #define NUM_STACK_ENTRIES 16 364 static int32_t rl78_stack [ NUM_STACK_ENTRIES ]; 365 static unsigned int rl78_stack_top; 366 367 #define RL78_STACK_PUSH(val) \ 368 do \ 369 { \ 370 if (rl78_stack_top < NUM_STACK_ENTRIES) \ 371 rl78_stack [rl78_stack_top ++] = (val); \ 372 else \ 373 _bfd_error_handler (_("internal error: RL78 reloc stack overflow")); \ 374 } \ 375 while (0) 376 377 #define RL78_STACK_POP(dest) \ 378 do \ 379 { \ 380 if (rl78_stack_top > 0) \ 381 (dest) = rl78_stack [-- rl78_stack_top];\ 382 else \ 383 { \ 384 _bfd_error_handler (_("internal error: RL78 reloc stack underflow")); \ 385 (dest) = 0; \ 386 } \ 387 } \ 388 while (0) 389 390 /* Special handling for RL78 complex relocs. Returns the 391 value of the reloc, or 0 for relocs which do not generate 392 a result. SYMVAL is the value of the symbol for relocs 393 which use a symbolic argument. */ 394 395 static bfd_vma 396 rl78_compute_complex_reloc (unsigned long r_type, 397 bfd_vma symval, 398 asection * input_section) 399 { 400 int32_t tmp1, tmp2; 401 bfd_vma relocation; 402 403 switch (r_type) 404 { 405 default: 406 return 0; 407 408 case R_RL78_ABS24S_PCREL: 409 case R_RL78_ABS16S_PCREL: 410 case R_RL78_ABS8S_PCREL: 411 RL78_STACK_POP (relocation); 412 relocation -= input_section->output_section->vma + input_section->output_offset; 413 return relocation; 414 415 case R_RL78_ABS32: 416 case R_RL78_ABS32_REV: 417 case R_RL78_ABS16: 418 case R_RL78_ABS16_REV: 419 case R_RL78_ABS16S: 420 case R_RL78_ABS16U: 421 case R_RL78_ABS8: 422 case R_RL78_ABS8U: 423 case R_RL78_ABS8S: 424 RL78_STACK_POP (relocation); 425 return relocation; 426 427 case R_RL78_ABS16UL: 428 case R_RL78_ABS8UL: 429 RL78_STACK_POP (relocation); 430 return relocation >> 2; 431 432 case R_RL78_ABS16UW: 433 case R_RL78_ABS8UW: 434 RL78_STACK_POP (relocation); 435 return relocation >> 1; 436 437 /* The rest of the relocs compute values and then push them onto the stack. */ 438 case R_RL78_OPramtop: 439 case R_RL78_OPromtop: 440 case R_RL78_SYM: 441 RL78_STACK_PUSH (symval); 442 return 0; 443 444 case R_RL78_OPneg: 445 RL78_STACK_POP (tmp1); 446 tmp1 = - tmp1; 447 RL78_STACK_PUSH (tmp1); 448 return 0; 449 450 case R_RL78_OPadd: 451 RL78_STACK_POP (tmp2); 452 RL78_STACK_POP (tmp1); 453 tmp1 += tmp2; 454 RL78_STACK_PUSH (tmp1); 455 return 0; 456 457 case R_RL78_OPsub: 458 /* For the expression "A - B", the assembler pushes A, 459 then B, then OPSUB. So the first op we pop is B, not A. */ 460 RL78_STACK_POP (tmp2); /* B */ 461 RL78_STACK_POP (tmp1); /* A */ 462 tmp1 -= tmp2; /* A - B */ 463 RL78_STACK_PUSH (tmp1); 464 return 0; 465 466 case R_RL78_OPmul: 467 RL78_STACK_POP (tmp2); 468 RL78_STACK_POP (tmp1); 469 tmp1 *= tmp2; 470 RL78_STACK_PUSH (tmp1); 471 return 0; 472 473 case R_RL78_OPdiv: 474 RL78_STACK_POP (tmp2); 475 RL78_STACK_POP (tmp1); 476 tmp1 /= tmp2; 477 RL78_STACK_PUSH (tmp1); 478 return 0; 479 480 case R_RL78_OPshla: 481 RL78_STACK_POP (tmp2); 482 RL78_STACK_POP (tmp1); 483 tmp1 <<= tmp2; 484 RL78_STACK_PUSH (tmp1); 485 return 0; 486 487 case R_RL78_OPshra: 488 RL78_STACK_POP (tmp2); 489 RL78_STACK_POP (tmp1); 490 tmp1 >>= tmp2; 491 RL78_STACK_PUSH (tmp1); 492 return 0; 493 494 case R_RL78_OPsctsize: 495 RL78_STACK_PUSH (input_section->size); 496 return 0; 497 498 case R_RL78_OPscttop: 499 RL78_STACK_PUSH (input_section->output_section->vma); 500 return 0; 501 502 case R_RL78_OPand: 503 RL78_STACK_POP (tmp2); 504 RL78_STACK_POP (tmp1); 505 tmp1 &= tmp2; 506 RL78_STACK_PUSH (tmp1); 507 return 0; 508 509 case R_RL78_OPor: 510 RL78_STACK_POP (tmp2); 511 RL78_STACK_POP (tmp1); 512 tmp1 |= tmp2; 513 RL78_STACK_PUSH (tmp1); 514 return 0; 515 516 case R_RL78_OPxor: 517 RL78_STACK_POP (tmp2); 518 RL78_STACK_POP (tmp1); 519 tmp1 ^= tmp2; 520 RL78_STACK_PUSH (tmp1); 521 return 0; 522 523 case R_RL78_OPnot: 524 RL78_STACK_POP (tmp1); 525 tmp1 = ~ tmp1; 526 RL78_STACK_PUSH (tmp1); 527 return 0; 528 529 case R_RL78_OPmod: 530 RL78_STACK_POP (tmp2); 531 RL78_STACK_POP (tmp1); 532 tmp1 %= tmp2; 533 RL78_STACK_PUSH (tmp1); 534 return 0; 535 } 536 } 537 538 #undef RL78_STACK_PUSH 539 #undef RL78_STACK_POP 540 541 #define OP(i) (contents[reloc->address + (i)]) 542 543 static bfd_reloc_status_type 544 rl78_special_reloc (bfd * input_bfd, 545 arelent * reloc, 546 asymbol * symbol, 547 void * data, 548 asection * input_section, 549 bfd * output_bfd ATTRIBUTE_UNUSED, 550 char ** error_message ATTRIBUTE_UNUSED) 551 { 552 bfd_reloc_status_type r = bfd_reloc_ok; 553 bfd_vma relocation = 0; 554 unsigned long r_type = reloc->howto->type; 555 bfd_byte * contents = data; 556 557 /* If necessary, compute the symbolic value of the relocation. */ 558 switch (r_type) 559 { 560 case R_RL78_SYM: 561 relocation = (symbol->value 562 + symbol->section->output_section->vma 563 + symbol->section->output_offset 564 + reloc->addend); 565 break; 566 567 case R_RL78_OPromtop: 568 relocation = get_romstart (NULL, input_bfd, input_section, 569 reloc->address); 570 break; 571 572 case R_RL78_OPramtop: 573 relocation = get_ramstart (NULL, input_bfd, input_section, 574 reloc->address); 575 break; 576 } 577 578 /* Get the value of the relocation. */ 579 relocation = rl78_compute_complex_reloc (r_type, relocation, input_section); 580 581 /* If the relocation alters the contents of the section then apply it now. 582 Note - since this function is called from 583 bfd_generic_get_relocated_section_contents via bfd_perform_relocation, 584 and not from the linker, we do not perform any range checking. The 585 clients who are calling us are only interested in some relocated section 586 contents, and not any linkage problems that might occur later. */ 587 switch (r_type) 588 { 589 case R_RL78_ABS32: 590 OP (0) = relocation; 591 OP (1) = relocation >> 8; 592 OP (2) = relocation >> 16; 593 OP (3) = relocation >> 24; 594 break; 595 596 case R_RL78_ABS32_REV: 597 OP (3) = relocation; 598 OP (2) = relocation >> 8; 599 OP (1) = relocation >> 16; 600 OP (0) = relocation >> 24; 601 break; 602 603 case R_RL78_ABS24S_PCREL: 604 case R_RL78_ABS24S: 605 OP (0) = relocation; 606 OP (1) = relocation >> 8; 607 OP (2) = relocation >> 16; 608 break; 609 610 case R_RL78_ABS16_REV: 611 OP (1) = relocation; 612 OP (0) = relocation >> 8; 613 break; 614 615 case R_RL78_ABS16S_PCREL: 616 case R_RL78_ABS16: 617 case R_RL78_ABS16S: 618 case R_RL78_ABS16U: 619 case R_RL78_ABS16UL: 620 case R_RL78_ABS16UW: 621 OP (0) = relocation; 622 OP (1) = relocation >> 8; 623 break; 624 625 case R_RL78_ABS8S_PCREL: 626 case R_RL78_ABS8: 627 case R_RL78_ABS8U: 628 case R_RL78_ABS8UL: 629 case R_RL78_ABS8UW: 630 case R_RL78_ABS8S: 631 OP (0) = relocation; 632 break; 633 634 default: 635 break; 636 } 637 638 return r; 639 } 640 641 #undef OP 642 #define OP(i) (contents[rel->r_offset + (i)]) 643 644 /* Relocate an RL78 ELF section. 645 There is some attempt to make this function usable for many architectures, 646 both USE_REL and USE_RELA ['twould be nice if such a critter existed], 647 if only to serve as a learning tool. 648 649 The RELOCATE_SECTION function is called by the new ELF backend linker 650 to handle the relocations for a section. 651 652 The relocs are always passed as Rela structures; if the section 653 actually uses Rel structures, the r_addend field will always be 654 zero. 655 656 This function is responsible for adjusting the section contents as 657 necessary, and (if using Rela relocs and generating a relocatable 658 output file) adjusting the reloc addend as necessary. 659 660 This function does not have to worry about setting the reloc 661 address or the reloc symbol index. 662 663 LOCAL_SYMS is a pointer to the swapped in local symbols. 664 665 LOCAL_SECTIONS is an array giving the section in the input file 666 corresponding to the st_shndx field of each local symbol. 667 668 The global hash table entry for the global symbols can be found 669 via elf_sym_hashes (input_bfd). 670 671 When generating relocatable output, this function must handle 672 STB_LOCAL/STT_SECTION symbols specially. The output symbol is 673 going to be the section symbol corresponding to the output 674 section, which means that the addend must be adjusted 675 accordingly. */ 676 677 static bfd_boolean 678 rl78_elf_relocate_section 679 (bfd * output_bfd, 680 struct bfd_link_info * info, 681 bfd * input_bfd, 682 asection * input_section, 683 bfd_byte * contents, 684 Elf_Internal_Rela * relocs, 685 Elf_Internal_Sym * local_syms, 686 asection ** local_sections) 687 { 688 Elf_Internal_Shdr * symtab_hdr; 689 struct elf_link_hash_entry ** sym_hashes; 690 Elf_Internal_Rela * rel; 691 Elf_Internal_Rela * relend; 692 asection *splt; 693 694 symtab_hdr = & elf_tdata (input_bfd)->symtab_hdr; 695 sym_hashes = elf_sym_hashes (input_bfd); 696 relend = relocs + input_section->reloc_count; 697 698 splt = elf_hash_table (info)->splt; 699 700 for (rel = relocs; rel < relend; rel ++) 701 { 702 reloc_howto_type * howto; 703 unsigned long r_symndx; 704 Elf_Internal_Sym * sym; 705 asection * sec; 706 struct elf_link_hash_entry * h; 707 bfd_vma relocation; 708 bfd_reloc_status_type r; 709 const char * name = NULL; 710 bfd_boolean unresolved_reloc = TRUE; 711 int r_type; 712 713 r_type = ELF32_R_TYPE (rel->r_info); 714 r_symndx = ELF32_R_SYM (rel->r_info); 715 716 howto = rl78_elf_howto_table + ELF32_R_TYPE (rel->r_info); 717 h = NULL; 718 sym = NULL; 719 sec = NULL; 720 relocation = 0; 721 722 if (r_symndx < symtab_hdr->sh_info) 723 { 724 sym = local_syms + r_symndx; 725 sec = local_sections [r_symndx]; 726 relocation = _bfd_elf_rela_local_sym (output_bfd, sym, & sec, rel); 727 728 name = bfd_elf_string_from_elf_section 729 (input_bfd, symtab_hdr->sh_link, sym->st_name); 730 name = (sym->st_name == 0) ? bfd_section_name (input_bfd, sec) : name; 731 } 732 else 733 { 734 bfd_boolean warned ATTRIBUTE_UNUSED; 735 bfd_boolean ignored ATTRIBUTE_UNUSED; 736 737 RELOC_FOR_GLOBAL_SYMBOL (info, input_bfd, input_section, rel, 738 r_symndx, symtab_hdr, sym_hashes, h, 739 sec, relocation, unresolved_reloc, 740 warned, ignored); 741 742 name = h->root.root.string; 743 } 744 745 if (sec != NULL && discarded_section (sec)) 746 RELOC_AGAINST_DISCARDED_SECTION (info, input_bfd, input_section, 747 rel, 1, relend, howto, 0, contents); 748 749 if (bfd_link_relocatable (info)) 750 { 751 /* This is a relocatable link. We don't have to change 752 anything, unless the reloc is against a section symbol, 753 in which case we have to adjust according to where the 754 section symbol winds up in the output section. */ 755 if (sym != NULL && ELF_ST_TYPE (sym->st_info) == STT_SECTION) 756 rel->r_addend += sec->output_offset; 757 continue; 758 } 759 760 switch (ELF32_R_TYPE (rel->r_info)) 761 { 762 case R_RL78_DIR16S: 763 { 764 bfd_vma *plt_offset; 765 766 if (h != NULL) 767 plt_offset = &h->plt.offset; 768 else 769 plt_offset = elf_local_got_offsets (input_bfd) + r_symndx; 770 771 if (! valid_16bit_address (relocation)) 772 { 773 /* If this is the first time we've processed this symbol, 774 fill in the plt entry with the correct symbol address. */ 775 if ((*plt_offset & 1) == 0) 776 { 777 unsigned int x; 778 779 x = 0x000000ec; /* br !!abs24 */ 780 x |= (relocation << 8) & 0xffffff00; 781 bfd_put_32 (input_bfd, x, splt->contents + *plt_offset); 782 *plt_offset |= 1; 783 } 784 785 relocation = (splt->output_section->vma 786 + splt->output_offset 787 + (*plt_offset & -2)); 788 if (name) 789 { 790 char *newname = bfd_malloc (strlen(name)+5); 791 strcpy (newname, name); 792 strcat(newname, ".plt"); 793 _bfd_generic_link_add_one_symbol (info, 794 input_bfd, 795 newname, 796 BSF_FUNCTION | BSF_WEAK, 797 splt, 798 (*plt_offset & -2), 799 0, 800 1, 801 0, 802 0); 803 } 804 } 805 } 806 break; 807 } 808 809 if (h != NULL && h->root.type == bfd_link_hash_undefweak) 810 /* If the symbol is undefined and weak 811 then the relocation resolves to zero. */ 812 relocation = 0; 813 else 814 { 815 if (howto->pc_relative) 816 { 817 relocation -= (input_section->output_section->vma 818 + input_section->output_offset 819 + rel->r_offset); 820 relocation -= bfd_get_reloc_size (howto); 821 } 822 823 relocation += rel->r_addend; 824 } 825 826 r = bfd_reloc_ok; 827 828 #define RANGE(a,b) if (a > (long) relocation || (long) relocation > b) r = bfd_reloc_overflow 829 830 /* Opcode relocs are always big endian. Data relocs are bi-endian. */ 831 switch (r_type) 832 { 833 case R_RL78_NONE: 834 break; 835 836 case R_RL78_RH_RELAX: 837 break; 838 839 case R_RL78_DIR8S_PCREL: 840 RANGE (-128, 127); 841 OP (0) = relocation; 842 break; 843 844 case R_RL78_DIR8S: 845 RANGE (-128, 255); 846 OP (0) = relocation; 847 break; 848 849 case R_RL78_DIR8U: 850 RANGE (0, 255); 851 OP (0) = relocation; 852 break; 853 854 case R_RL78_DIR16S_PCREL: 855 RANGE (-32768, 32767); 856 OP (0) = relocation; 857 OP (1) = relocation >> 8; 858 break; 859 860 case R_RL78_DIR16S: 861 if ((relocation & 0xf0000) == 0xf0000) 862 relocation &= 0xffff; 863 RANGE (-32768, 65535); 864 OP (0) = relocation; 865 OP (1) = relocation >> 8; 866 break; 867 868 case R_RL78_DIR16U: 869 RANGE (0, 65536); 870 OP (0) = relocation; 871 OP (1) = relocation >> 8; 872 break; 873 874 case R_RL78_DIR16: 875 RANGE (-32768, 65536); 876 OP (0) = relocation; 877 OP (1) = relocation >> 8; 878 break; 879 880 case R_RL78_DIR16_REV: 881 RANGE (-32768, 65536); 882 OP (1) = relocation; 883 OP (0) = relocation >> 8; 884 break; 885 886 case R_RL78_DIR3U_PCREL: 887 RANGE (3, 10); 888 OP (0) &= 0xf8; 889 OP (0) |= relocation & 0x07; 890 break; 891 892 case R_RL78_DIR24S_PCREL: 893 RANGE (-0x800000, 0x7fffff); 894 OP (0) = relocation; 895 OP (1) = relocation >> 8; 896 OP (2) = relocation >> 16; 897 break; 898 899 case R_RL78_DIR24S: 900 RANGE (-0x800000, 0x7fffff); 901 OP (0) = relocation; 902 OP (1) = relocation >> 8; 903 OP (2) = relocation >> 16; 904 break; 905 906 case R_RL78_DIR32: 907 OP (0) = relocation; 908 OP (1) = relocation >> 8; 909 OP (2) = relocation >> 16; 910 OP (3) = relocation >> 24; 911 break; 912 913 case R_RL78_DIR32_REV: 914 OP (3) = relocation; 915 OP (2) = relocation >> 8; 916 OP (1) = relocation >> 16; 917 OP (0) = relocation >> 24; 918 break; 919 920 case R_RL78_RH_SFR: 921 RANGE (0xfff00, 0xfffff); 922 OP (0) = relocation & 0xff; 923 break; 924 925 case R_RL78_RH_SADDR: 926 RANGE (0xffe20, 0xfff1f); 927 OP (0) = relocation & 0xff; 928 break; 929 930 /* Complex reloc handling: */ 931 case R_RL78_ABS32: 932 case R_RL78_ABS32_REV: 933 case R_RL78_ABS24S_PCREL: 934 case R_RL78_ABS24S: 935 case R_RL78_ABS16: 936 case R_RL78_ABS16_REV: 937 case R_RL78_ABS16S_PCREL: 938 case R_RL78_ABS16S: 939 case R_RL78_ABS16U: 940 case R_RL78_ABS16UL: 941 case R_RL78_ABS16UW: 942 case R_RL78_ABS8: 943 case R_RL78_ABS8U: 944 case R_RL78_ABS8UL: 945 case R_RL78_ABS8UW: 946 case R_RL78_ABS8S_PCREL: 947 case R_RL78_ABS8S: 948 case R_RL78_OPneg: 949 case R_RL78_OPadd: 950 case R_RL78_OPsub: 951 case R_RL78_OPmul: 952 case R_RL78_OPdiv: 953 case R_RL78_OPshla: 954 case R_RL78_OPshra: 955 case R_RL78_OPsctsize: 956 case R_RL78_OPscttop: 957 case R_RL78_OPand: 958 case R_RL78_OPor: 959 case R_RL78_OPxor: 960 case R_RL78_OPnot: 961 case R_RL78_OPmod: 962 relocation = rl78_compute_complex_reloc (r_type, 0, input_section); 963 964 switch (r_type) 965 { 966 case R_RL78_ABS32: 967 OP (0) = relocation; 968 OP (1) = relocation >> 8; 969 OP (2) = relocation >> 16; 970 OP (3) = relocation >> 24; 971 break; 972 973 case R_RL78_ABS32_REV: 974 OP (3) = relocation; 975 OP (2) = relocation >> 8; 976 OP (1) = relocation >> 16; 977 OP (0) = relocation >> 24; 978 break; 979 980 case R_RL78_ABS24S_PCREL: 981 case R_RL78_ABS24S: 982 RANGE (-0x800000, 0x7fffff); 983 OP (0) = relocation; 984 OP (1) = relocation >> 8; 985 OP (2) = relocation >> 16; 986 break; 987 988 case R_RL78_ABS16: 989 RANGE (-32768, 65535); 990 OP (0) = relocation; 991 OP (1) = relocation >> 8; 992 break; 993 994 case R_RL78_ABS16_REV: 995 RANGE (-32768, 65535); 996 OP (1) = relocation; 997 OP (0) = relocation >> 8; 998 break; 999 1000 case R_RL78_ABS16S_PCREL: 1001 case R_RL78_ABS16S: 1002 RANGE (-32768, 32767); 1003 OP (0) = relocation; 1004 OP (1) = relocation >> 8; 1005 break; 1006 1007 case R_RL78_ABS16U: 1008 case R_RL78_ABS16UL: 1009 case R_RL78_ABS16UW: 1010 RANGE (0, 65536); 1011 OP (0) = relocation; 1012 OP (1) = relocation >> 8; 1013 break; 1014 1015 case R_RL78_ABS8: 1016 RANGE (-128, 255); 1017 OP (0) = relocation; 1018 break; 1019 1020 case R_RL78_ABS8U: 1021 case R_RL78_ABS8UL: 1022 case R_RL78_ABS8UW: 1023 RANGE (0, 255); 1024 OP (0) = relocation; 1025 break; 1026 1027 case R_RL78_ABS8S_PCREL: 1028 case R_RL78_ABS8S: 1029 RANGE (-128, 127); 1030 OP (0) = relocation; 1031 break; 1032 1033 default: 1034 break; 1035 } 1036 break; 1037 1038 case R_RL78_SYM: 1039 if (r_symndx < symtab_hdr->sh_info) 1040 relocation = sec->output_section->vma + sec->output_offset 1041 + sym->st_value + rel->r_addend; 1042 else if (h != NULL 1043 && (h->root.type == bfd_link_hash_defined 1044 || h->root.type == bfd_link_hash_defweak)) 1045 relocation = h->root.u.def.value 1046 + sec->output_section->vma 1047 + sec->output_offset 1048 + rel->r_addend; 1049 else 1050 { 1051 relocation = 0; 1052 if (h->root.type != bfd_link_hash_undefweak) 1053 _bfd_error_handler 1054 (_("warning: RL78_SYM reloc with an unknown symbol")); 1055 } 1056 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1057 break; 1058 1059 case R_RL78_OPromtop: 1060 relocation = get_romstart (info, input_bfd, input_section, rel->r_offset); 1061 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1062 break; 1063 1064 case R_RL78_OPramtop: 1065 relocation = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1066 (void) rl78_compute_complex_reloc (r_type, relocation, input_section); 1067 break; 1068 1069 default: 1070 r = bfd_reloc_notsupported; 1071 break; 1072 } 1073 1074 if (r != bfd_reloc_ok) 1075 { 1076 const char * msg = NULL; 1077 1078 switch (r) 1079 { 1080 case bfd_reloc_overflow: 1081 /* Catch the case of a missing function declaration 1082 and emit a more helpful error message. */ 1083 if (r_type == R_RL78_DIR24S_PCREL) 1084 /* xgettext:c-format */ 1085 msg = _("%pB(%pA): error: call to undefined function '%s'"); 1086 else 1087 (*info->callbacks->reloc_overflow) 1088 (info, (h ? &h->root : NULL), name, howto->name, (bfd_vma) 0, 1089 input_bfd, input_section, rel->r_offset); 1090 break; 1091 1092 case bfd_reloc_undefined: 1093 (*info->callbacks->undefined_symbol) 1094 (info, name, input_bfd, input_section, rel->r_offset, TRUE); 1095 break; 1096 1097 case bfd_reloc_other: 1098 /* xgettext:c-format */ 1099 msg = _("%pB(%pA): warning: unaligned access to symbol '%s' in the small data area"); 1100 break; 1101 1102 case bfd_reloc_outofrange: 1103 /* xgettext:c-format */ 1104 msg = _("%pB(%pA): internal error: out of range error"); 1105 break; 1106 1107 case bfd_reloc_notsupported: 1108 /* xgettext:c-format */ 1109 msg = _("%pB(%pA): internal error: unsupported relocation error"); 1110 break; 1111 1112 case bfd_reloc_dangerous: 1113 /* xgettext:c-format */ 1114 msg = _("%pB(%pA): internal error: dangerous relocation"); 1115 break; 1116 1117 default: 1118 /* xgettext:c-format */ 1119 msg = _("%pB(%pA): internal error: unknown error"); 1120 break; 1121 } 1122 1123 if (msg) 1124 _bfd_error_handler (msg, input_bfd, input_section, name); 1125 } 1126 } 1127 1128 return TRUE; 1129 } 1130 1131 /* Function to set the ELF flag bits. */ 1132 1133 static bfd_boolean 1134 rl78_elf_set_private_flags (bfd * abfd, flagword flags) 1135 { 1136 elf_elfheader (abfd)->e_flags = flags; 1137 elf_flags_init (abfd) = TRUE; 1138 return TRUE; 1139 } 1140 1141 static bfd_boolean no_warn_mismatch = FALSE; 1142 1143 void bfd_elf32_rl78_set_target_flags (bfd_boolean); 1144 1145 void 1146 bfd_elf32_rl78_set_target_flags (bfd_boolean user_no_warn_mismatch) 1147 { 1148 no_warn_mismatch = user_no_warn_mismatch; 1149 } 1150 1151 static const char * 1152 rl78_cpu_name (flagword flags) 1153 { 1154 switch (flags & E_FLAG_RL78_CPU_MASK) 1155 { 1156 default: return ""; 1157 case E_FLAG_RL78_G10: return "G10"; 1158 case E_FLAG_RL78_G13: return "G13"; 1159 case E_FLAG_RL78_G14: return "G14"; 1160 } 1161 } 1162 1163 /* Merge backend specific data from an object file to the output 1164 object file when linking. */ 1165 1166 static bfd_boolean 1167 rl78_elf_merge_private_bfd_data (bfd *ibfd, struct bfd_link_info *info) 1168 { 1169 bfd *obfd = info->output_bfd; 1170 flagword new_flags; 1171 flagword old_flags; 1172 bfd_boolean error = FALSE; 1173 1174 new_flags = elf_elfheader (ibfd)->e_flags; 1175 old_flags = elf_elfheader (obfd)->e_flags; 1176 1177 if (!elf_flags_init (obfd)) 1178 { 1179 /* First call, no flags set. */ 1180 elf_flags_init (obfd) = TRUE; 1181 elf_elfheader (obfd)->e_flags = new_flags; 1182 } 1183 else if (old_flags != new_flags) 1184 { 1185 flagword changed_flags = old_flags ^ new_flags; 1186 1187 if (changed_flags & E_FLAG_RL78_CPU_MASK) 1188 { 1189 flagword out_cpu = old_flags & E_FLAG_RL78_CPU_MASK; 1190 flagword in_cpu = new_flags & E_FLAG_RL78_CPU_MASK; 1191 1192 if (in_cpu == E_FLAG_RL78_ANY_CPU || in_cpu == out_cpu) 1193 /* It does not matter what new_cpu may have. */; 1194 else if (out_cpu == E_FLAG_RL78_ANY_CPU) 1195 { 1196 if (in_cpu == E_FLAG_RL78_G10) 1197 { 1198 /* G10 files can only be linked with other G10 files. 1199 If the output is set to "any" this means that it is 1200 a G14 file that does not use hardware multiply/divide, 1201 but that is still incompatible with the G10 ABI. */ 1202 error = TRUE; 1203 1204 _bfd_error_handler 1205 /* xgettext:c-format */ 1206 (_("RL78 ABI conflict: G10 file %pB cannot be linked" 1207 " with %s file %pB"), 1208 ibfd, rl78_cpu_name (out_cpu), obfd); 1209 } 1210 else 1211 { 1212 old_flags &= ~ E_FLAG_RL78_CPU_MASK; 1213 old_flags |= in_cpu; 1214 elf_elfheader (obfd)->e_flags = old_flags; 1215 } 1216 } 1217 else 1218 { 1219 error = TRUE; 1220 1221 _bfd_error_handler 1222 /* xgettext:c-format */ 1223 (_("RL78 ABI conflict: cannot link %s file %pB with %s file %pB"), 1224 rl78_cpu_name (in_cpu), ibfd, 1225 rl78_cpu_name (out_cpu), obfd); 1226 } 1227 } 1228 1229 if (changed_flags & E_FLAG_RL78_64BIT_DOUBLES) 1230 { 1231 _bfd_error_handler 1232 (_("RL78 merge conflict: cannot link 32-bit and 64-bit objects together")); 1233 1234 if (old_flags & E_FLAG_RL78_64BIT_DOUBLES) 1235 /* xgettext:c-format */ 1236 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1237 obfd, ibfd); 1238 else 1239 /* xgettext:c-format */ 1240 _bfd_error_handler (_("- %pB is 64-bit, %pB is not"), 1241 ibfd, obfd); 1242 error = TRUE; 1243 } 1244 } 1245 1246 return !error; 1247 } 1248 1249 static bfd_boolean 1250 rl78_elf_print_private_bfd_data (bfd * abfd, void * ptr) 1251 { 1252 FILE * file = (FILE *) ptr; 1253 flagword flags; 1254 1255 BFD_ASSERT (abfd != NULL && ptr != NULL); 1256 1257 /* Print normal ELF private data. */ 1258 _bfd_elf_print_private_bfd_data (abfd, ptr); 1259 1260 flags = elf_elfheader (abfd)->e_flags; 1261 fprintf (file, _("private flags = 0x%lx:"), (long) flags); 1262 1263 if (flags & E_FLAG_RL78_CPU_MASK) 1264 fprintf (file, " [%s]", rl78_cpu_name (flags)); 1265 1266 if (flags & E_FLAG_RL78_64BIT_DOUBLES) 1267 fprintf (file, _(" [64-bit doubles]")); 1268 1269 fputc ('\n', file); 1270 return TRUE; 1271 } 1272 1273 /* Return the MACH for an e_flags value. */ 1274 1275 static int 1276 elf32_rl78_machine (bfd * abfd ATTRIBUTE_UNUSED) 1277 { 1278 return bfd_mach_rl78; 1279 } 1280 1281 static bfd_boolean 1282 rl78_elf_object_p (bfd * abfd) 1283 { 1284 bfd_default_set_arch_mach (abfd, bfd_arch_rl78, 1285 elf32_rl78_machine (abfd)); 1286 return TRUE; 1287 } 1288 1289 /* support PLT for 16-bit references to 24-bit functions. */ 1290 1291 /* We support 16-bit pointers to code above 64k by generating a thunk 1292 below 64k containing a JMP instruction to the final address. */ 1293 1294 static bfd_boolean 1295 rl78_elf_check_relocs 1296 (bfd * abfd, 1297 struct bfd_link_info * info, 1298 asection * sec, 1299 const Elf_Internal_Rela * relocs) 1300 { 1301 Elf_Internal_Shdr * symtab_hdr; 1302 struct elf_link_hash_entry ** sym_hashes; 1303 const Elf_Internal_Rela * rel; 1304 const Elf_Internal_Rela * rel_end; 1305 bfd_vma *local_plt_offsets; 1306 asection *splt; 1307 bfd *dynobj; 1308 1309 if (bfd_link_relocatable (info)) 1310 return TRUE; 1311 1312 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1313 sym_hashes = elf_sym_hashes (abfd); 1314 local_plt_offsets = elf_local_got_offsets (abfd); 1315 dynobj = elf_hash_table(info)->dynobj; 1316 1317 rel_end = relocs + sec->reloc_count; 1318 for (rel = relocs; rel < rel_end; rel++) 1319 { 1320 struct elf_link_hash_entry *h; 1321 unsigned long r_symndx; 1322 bfd_vma *offset; 1323 1324 r_symndx = ELF32_R_SYM (rel->r_info); 1325 if (r_symndx < symtab_hdr->sh_info) 1326 h = NULL; 1327 else 1328 { 1329 h = sym_hashes[r_symndx - symtab_hdr->sh_info]; 1330 while (h->root.type == bfd_link_hash_indirect 1331 || h->root.type == bfd_link_hash_warning) 1332 h = (struct elf_link_hash_entry *) h->root.u.i.link; 1333 } 1334 1335 switch (ELF32_R_TYPE (rel->r_info)) 1336 { 1337 /* This relocation describes a 16-bit pointer to a function. 1338 We may need to allocate a thunk in low memory; reserve memory 1339 for it now. */ 1340 case R_RL78_DIR16S: 1341 if (dynobj == NULL) 1342 elf_hash_table (info)->dynobj = dynobj = abfd; 1343 splt = elf_hash_table (info)->splt; 1344 if (splt == NULL) 1345 { 1346 flagword flags = (SEC_ALLOC | SEC_LOAD | SEC_HAS_CONTENTS 1347 | SEC_IN_MEMORY | SEC_LINKER_CREATED 1348 | SEC_READONLY | SEC_CODE); 1349 splt = bfd_make_section_anyway_with_flags (dynobj, ".plt", 1350 flags); 1351 elf_hash_table (info)->splt = splt; 1352 if (splt == NULL 1353 || ! bfd_set_section_alignment (dynobj, splt, 1)) 1354 return FALSE; 1355 } 1356 1357 if (h != NULL) 1358 offset = &h->plt.offset; 1359 else 1360 { 1361 if (local_plt_offsets == NULL) 1362 { 1363 size_t size; 1364 unsigned int i; 1365 1366 size = symtab_hdr->sh_info * sizeof (bfd_vma); 1367 local_plt_offsets = (bfd_vma *) bfd_alloc (abfd, size); 1368 if (local_plt_offsets == NULL) 1369 return FALSE; 1370 elf_local_got_offsets (abfd) = local_plt_offsets; 1371 1372 for (i = 0; i < symtab_hdr->sh_info; i++) 1373 local_plt_offsets[i] = (bfd_vma) -1; 1374 } 1375 offset = &local_plt_offsets[r_symndx]; 1376 } 1377 1378 if (*offset == (bfd_vma) -1) 1379 { 1380 *offset = splt->size; 1381 splt->size += 4; 1382 } 1383 break; 1384 } 1385 } 1386 1387 return TRUE; 1388 } 1389 1390 /* This must exist if dynobj is ever set. */ 1391 1392 static bfd_boolean 1393 rl78_elf_finish_dynamic_sections (bfd *abfd ATTRIBUTE_UNUSED, 1394 struct bfd_link_info *info) 1395 { 1396 bfd *dynobj; 1397 asection *splt; 1398 1399 if (!elf_hash_table (info)->dynamic_sections_created) 1400 return TRUE; 1401 1402 /* As an extra sanity check, verify that all plt entries have been 1403 filled in. However, relaxing might have changed the relocs so 1404 that some plt entries don't get filled in, so we have to skip 1405 this check if we're relaxing. Unfortunately, check_relocs is 1406 called before relaxation. */ 1407 1408 if (info->relax_trip > 0) 1409 return TRUE; 1410 1411 dynobj = elf_hash_table (info)->dynobj; 1412 splt = elf_hash_table (info)->splt; 1413 if (dynobj != NULL && splt != NULL) 1414 { 1415 bfd_byte *contents = splt->contents; 1416 unsigned int i, size = splt->size; 1417 1418 for (i = 0; i < size; i += 4) 1419 { 1420 unsigned int x = bfd_get_32 (dynobj, contents + i); 1421 BFD_ASSERT (x != 0); 1422 } 1423 } 1424 1425 return TRUE; 1426 } 1427 1428 static bfd_boolean 1429 rl78_elf_always_size_sections (bfd *output_bfd ATTRIBUTE_UNUSED, 1430 struct bfd_link_info *info) 1431 { 1432 bfd *dynobj; 1433 asection *splt; 1434 1435 if (bfd_link_relocatable (info)) 1436 return TRUE; 1437 1438 dynobj = elf_hash_table (info)->dynobj; 1439 if (dynobj == NULL) 1440 return TRUE; 1441 1442 splt = elf_hash_table (info)->splt; 1443 BFD_ASSERT (splt != NULL); 1444 1445 splt->contents = (bfd_byte *) bfd_zalloc (dynobj, splt->size); 1446 if (splt->contents == NULL) 1447 return FALSE; 1448 1449 return TRUE; 1450 } 1451 1452 1453 1454 /* Handle relaxing. */ 1455 1456 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1457 is within the low 64k, remove any entry for it in the plt. */ 1458 1459 struct relax_plt_data 1460 { 1461 asection *splt; 1462 bfd_boolean *again; 1463 }; 1464 1465 static bfd_boolean 1466 rl78_relax_plt_check (struct elf_link_hash_entry *h, void * xdata) 1467 { 1468 struct relax_plt_data *data = (struct relax_plt_data *) xdata; 1469 1470 if (h->plt.offset != (bfd_vma) -1) 1471 { 1472 bfd_vma address; 1473 1474 if (h->root.type == bfd_link_hash_undefined 1475 || h->root.type == bfd_link_hash_undefweak) 1476 address = 0; 1477 else 1478 address = (h->root.u.def.section->output_section->vma 1479 + h->root.u.def.section->output_offset 1480 + h->root.u.def.value); 1481 1482 if (valid_16bit_address (address)) 1483 { 1484 h->plt.offset = -1; 1485 data->splt->size -= 4; 1486 *data->again = TRUE; 1487 } 1488 } 1489 1490 return TRUE; 1491 } 1492 1493 /* A subroutine of rl78_elf_relax_section. If the global symbol H 1494 previously had a plt entry, give it a new entry offset. */ 1495 1496 static bfd_boolean 1497 rl78_relax_plt_realloc (struct elf_link_hash_entry *h, void * xdata) 1498 { 1499 bfd_vma *entry = (bfd_vma *) xdata; 1500 1501 if (h->plt.offset != (bfd_vma) -1) 1502 { 1503 h->plt.offset = *entry; 1504 *entry += 4; 1505 } 1506 1507 return TRUE; 1508 } 1509 1510 static bfd_boolean 1511 rl78_elf_relax_plt_section (bfd *dynobj, 1512 asection *splt, 1513 struct bfd_link_info *info, 1514 bfd_boolean *again) 1515 { 1516 struct relax_plt_data relax_plt_data; 1517 bfd *ibfd; 1518 1519 /* Assume nothing changes. */ 1520 *again = FALSE; 1521 1522 if (bfd_link_relocatable (info)) 1523 return TRUE; 1524 1525 /* We only relax the .plt section at the moment. */ 1526 if (dynobj != elf_hash_table (info)->dynobj 1527 || strcmp (splt->name, ".plt") != 0) 1528 return TRUE; 1529 1530 /* Quick check for an empty plt. */ 1531 if (splt->size == 0) 1532 return TRUE; 1533 1534 /* Map across all global symbols; see which ones happen to 1535 fall in the low 64k. */ 1536 relax_plt_data.splt = splt; 1537 relax_plt_data.again = again; 1538 elf_link_hash_traverse (elf_hash_table (info), rl78_relax_plt_check, 1539 &relax_plt_data); 1540 1541 /* Likewise for local symbols, though that's somewhat less convenient 1542 as we have to walk the list of input bfds and swap in symbol data. */ 1543 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1544 { 1545 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1546 Elf_Internal_Shdr *symtab_hdr; 1547 Elf_Internal_Sym *isymbuf = NULL; 1548 unsigned int idx; 1549 1550 if (! local_plt_offsets) 1551 continue; 1552 1553 symtab_hdr = &elf_tdata (ibfd)->symtab_hdr; 1554 if (symtab_hdr->sh_info != 0) 1555 { 1556 isymbuf = (Elf_Internal_Sym *) symtab_hdr->contents; 1557 if (isymbuf == NULL) 1558 isymbuf = bfd_elf_get_elf_syms (ibfd, symtab_hdr, 1559 symtab_hdr->sh_info, 0, 1560 NULL, NULL, NULL); 1561 if (isymbuf == NULL) 1562 return FALSE; 1563 } 1564 1565 for (idx = 0; idx < symtab_hdr->sh_info; ++idx) 1566 { 1567 Elf_Internal_Sym *isym; 1568 asection *tsec; 1569 bfd_vma address; 1570 1571 if (local_plt_offsets[idx] == (bfd_vma) -1) 1572 continue; 1573 1574 isym = &isymbuf[idx]; 1575 if (isym->st_shndx == SHN_UNDEF) 1576 continue; 1577 else if (isym->st_shndx == SHN_ABS) 1578 tsec = bfd_abs_section_ptr; 1579 else if (isym->st_shndx == SHN_COMMON) 1580 tsec = bfd_com_section_ptr; 1581 else 1582 tsec = bfd_section_from_elf_index (ibfd, isym->st_shndx); 1583 1584 address = (tsec->output_section->vma 1585 + tsec->output_offset 1586 + isym->st_value); 1587 if (valid_16bit_address (address)) 1588 { 1589 local_plt_offsets[idx] = -1; 1590 splt->size -= 4; 1591 *again = TRUE; 1592 } 1593 } 1594 1595 if (isymbuf != NULL 1596 && symtab_hdr->contents != (unsigned char *) isymbuf) 1597 { 1598 if (! info->keep_memory) 1599 free (isymbuf); 1600 else 1601 { 1602 /* Cache the symbols for elf_link_input_bfd. */ 1603 symtab_hdr->contents = (unsigned char *) isymbuf; 1604 } 1605 } 1606 } 1607 1608 /* If we changed anything, walk the symbols again to reallocate 1609 .plt entry addresses. */ 1610 if (*again && splt->size > 0) 1611 { 1612 bfd_vma entry = 0; 1613 1614 elf_link_hash_traverse (elf_hash_table (info), 1615 rl78_relax_plt_realloc, &entry); 1616 1617 for (ibfd = info->input_bfds; ibfd ; ibfd = ibfd->link.next) 1618 { 1619 bfd_vma *local_plt_offsets = elf_local_got_offsets (ibfd); 1620 unsigned int nlocals = elf_tdata (ibfd)->symtab_hdr.sh_info; 1621 unsigned int idx; 1622 1623 if (! local_plt_offsets) 1624 continue; 1625 1626 for (idx = 0; idx < nlocals; ++idx) 1627 if (local_plt_offsets[idx] != (bfd_vma) -1) 1628 { 1629 local_plt_offsets[idx] = entry; 1630 entry += 4; 1631 } 1632 } 1633 } 1634 1635 return TRUE; 1636 } 1637 1638 /* Delete some bytes from a section while relaxing. */ 1639 1640 static bfd_boolean 1641 elf32_rl78_relax_delete_bytes (bfd *abfd, asection *sec, bfd_vma addr, int count, 1642 Elf_Internal_Rela *alignment_rel, int force_snip) 1643 { 1644 Elf_Internal_Shdr * symtab_hdr; 1645 unsigned int sec_shndx; 1646 bfd_byte * contents; 1647 Elf_Internal_Rela * irel; 1648 Elf_Internal_Rela * irelend; 1649 Elf_Internal_Sym * isym; 1650 Elf_Internal_Sym * isymend; 1651 bfd_vma toaddr; 1652 unsigned int symcount; 1653 struct elf_link_hash_entry ** sym_hashes; 1654 struct elf_link_hash_entry ** end_hashes; 1655 1656 if (!alignment_rel) 1657 force_snip = 1; 1658 1659 sec_shndx = _bfd_elf_section_from_bfd_section (abfd, sec); 1660 1661 contents = elf_section_data (sec)->this_hdr.contents; 1662 1663 /* The deletion must stop at the next alignment boundary, if 1664 ALIGNMENT_REL is non-NULL. */ 1665 toaddr = sec->size; 1666 if (alignment_rel) 1667 toaddr = alignment_rel->r_offset; 1668 1669 irel = elf_section_data (sec)->relocs; 1670 if (irel == NULL) 1671 { 1672 _bfd_elf_link_read_relocs (sec->owner, sec, NULL, NULL, TRUE); 1673 irel = elf_section_data (sec)->relocs; 1674 } 1675 1676 irelend = irel + sec->reloc_count; 1677 1678 /* Actually delete the bytes. */ 1679 memmove (contents + addr, contents + addr + count, 1680 (size_t) (toaddr - addr - count)); 1681 1682 /* If we don't have an alignment marker to worry about, we can just 1683 shrink the section. Otherwise, we have to fill in the newly 1684 created gap with NOP insns (0x03). */ 1685 if (force_snip) 1686 sec->size -= count; 1687 else 1688 memset (contents + toaddr - count, 0x03, count); 1689 1690 /* Adjust all the relocs. */ 1691 for (; irel && irel < irelend; irel++) 1692 { 1693 /* Get the new reloc address. */ 1694 if (irel->r_offset > addr 1695 && (irel->r_offset < toaddr 1696 || (force_snip && irel->r_offset == toaddr))) 1697 irel->r_offset -= count; 1698 1699 /* If we see an ALIGN marker at the end of the gap, we move it 1700 to the beginning of the gap, since marking these gaps is what 1701 they're for. */ 1702 if (irel->r_offset == toaddr 1703 && ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 1704 && irel->r_addend & RL78_RELAXA_ALIGN) 1705 irel->r_offset -= count; 1706 } 1707 1708 /* Adjust the local symbols defined in this section. */ 1709 symtab_hdr = &elf_tdata (abfd)->symtab_hdr; 1710 isym = (Elf_Internal_Sym *) symtab_hdr->contents; 1711 isymend = isym + symtab_hdr->sh_info; 1712 1713 for (; isym < isymend; isym++) 1714 { 1715 /* If the symbol is in the range of memory we just moved, we 1716 have to adjust its value. */ 1717 if (isym->st_shndx == sec_shndx 1718 && isym->st_value > addr 1719 && isym->st_value < toaddr) 1720 isym->st_value -= count; 1721 1722 /* If the symbol *spans* the bytes we just deleted (i.e. it's 1723 *end* is in the moved bytes but it's *start* isn't), then we 1724 must adjust its size. */ 1725 if (isym->st_shndx == sec_shndx 1726 && isym->st_value < addr 1727 && isym->st_value + isym->st_size > addr 1728 && isym->st_value + isym->st_size < toaddr) 1729 isym->st_size -= count; 1730 } 1731 1732 /* Now adjust the global symbols defined in this section. */ 1733 symcount = (symtab_hdr->sh_size / sizeof (Elf32_External_Sym) 1734 - symtab_hdr->sh_info); 1735 sym_hashes = elf_sym_hashes (abfd); 1736 end_hashes = sym_hashes + symcount; 1737 1738 for (; sym_hashes < end_hashes; sym_hashes++) 1739 { 1740 struct elf_link_hash_entry *sym_hash = *sym_hashes; 1741 1742 if ((sym_hash->root.type == bfd_link_hash_defined 1743 || sym_hash->root.type == bfd_link_hash_defweak) 1744 && sym_hash->root.u.def.section == sec) 1745 { 1746 /* As above, adjust the value if needed. */ 1747 if (sym_hash->root.u.def.value > addr 1748 && sym_hash->root.u.def.value < toaddr) 1749 sym_hash->root.u.def.value -= count; 1750 1751 /* As above, adjust the size if needed. */ 1752 if (sym_hash->root.u.def.value < addr 1753 && sym_hash->root.u.def.value + sym_hash->size > addr 1754 && sym_hash->root.u.def.value + sym_hash->size < toaddr) 1755 sym_hash->size -= count; 1756 } 1757 } 1758 1759 return TRUE; 1760 } 1761 1762 /* Used to sort relocs by address. If relocs have the same address, 1763 we maintain their relative order, except that R_RL78_RH_RELAX 1764 alignment relocs must be the first reloc for any given address. */ 1765 1766 static void 1767 reloc_bubblesort (Elf_Internal_Rela * r, int count) 1768 { 1769 int i; 1770 bfd_boolean again; 1771 bfd_boolean swappit; 1772 1773 /* This is almost a classic bubblesort. It's the slowest sort, but 1774 we're taking advantage of the fact that the relocations are 1775 mostly in order already (the assembler emits them that way) and 1776 we need relocs with the same address to remain in the same 1777 relative order. */ 1778 again = TRUE; 1779 while (again) 1780 { 1781 again = FALSE; 1782 for (i = 0; i < count - 1; i ++) 1783 { 1784 if (r[i].r_offset > r[i + 1].r_offset) 1785 swappit = TRUE; 1786 else if (r[i].r_offset < r[i + 1].r_offset) 1787 swappit = FALSE; 1788 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1789 && (r[i + 1].r_addend & RL78_RELAXA_ALIGN)) 1790 swappit = TRUE; 1791 else if (ELF32_R_TYPE (r[i + 1].r_info) == R_RL78_RH_RELAX 1792 && (r[i + 1].r_addend & RL78_RELAXA_ELIGN) 1793 && !(ELF32_R_TYPE (r[i].r_info) == R_RL78_RH_RELAX 1794 && (r[i].r_addend & RL78_RELAXA_ALIGN))) 1795 swappit = TRUE; 1796 else 1797 swappit = FALSE; 1798 1799 if (swappit) 1800 { 1801 Elf_Internal_Rela tmp; 1802 1803 tmp = r[i]; 1804 r[i] = r[i + 1]; 1805 r[i + 1] = tmp; 1806 /* If we do move a reloc back, re-scan to see if it 1807 needs to be moved even further back. This avoids 1808 most of the O(n^2) behavior for our cases. */ 1809 if (i > 0) 1810 i -= 2; 1811 again = TRUE; 1812 } 1813 } 1814 } 1815 } 1816 1817 1818 #define OFFSET_FOR_RELOC(rel, lrel, scale) \ 1819 rl78_offset_for_reloc (abfd, rel + 1, symtab_hdr, shndx_buf, intsyms, \ 1820 lrel, abfd, sec, link_info, scale) 1821 1822 static bfd_vma 1823 rl78_offset_for_reloc (bfd * abfd, 1824 Elf_Internal_Rela * rel, 1825 Elf_Internal_Shdr * symtab_hdr, 1826 Elf_External_Sym_Shndx * shndx_buf ATTRIBUTE_UNUSED, 1827 Elf_Internal_Sym * intsyms, 1828 Elf_Internal_Rela ** lrel, 1829 bfd * input_bfd, 1830 asection * input_section, 1831 struct bfd_link_info * info, 1832 int * scale) 1833 { 1834 bfd_vma symval; 1835 1836 *scale = 1; 1837 1838 /* REL is the first of 1..N relocations. We compute the symbol 1839 value for each relocation, then combine them if needed. LREL 1840 gets a pointer to the last relocation used. */ 1841 while (1) 1842 { 1843 unsigned long r_type; 1844 1845 /* Get the value of the symbol referred to by the reloc. */ 1846 if (ELF32_R_SYM (rel->r_info) < symtab_hdr->sh_info) 1847 { 1848 /* A local symbol. */ 1849 Elf_Internal_Sym *isym; 1850 asection *ssec; 1851 1852 isym = intsyms + ELF32_R_SYM (rel->r_info); 1853 1854 if (isym->st_shndx == SHN_UNDEF) 1855 ssec = bfd_und_section_ptr; 1856 else if (isym->st_shndx == SHN_ABS) 1857 ssec = bfd_abs_section_ptr; 1858 else if (isym->st_shndx == SHN_COMMON) 1859 ssec = bfd_com_section_ptr; 1860 else 1861 ssec = bfd_section_from_elf_index (abfd, 1862 isym->st_shndx); 1863 1864 /* Initial symbol value. */ 1865 symval = isym->st_value; 1866 1867 /* GAS may have made this symbol relative to a section, in 1868 which case, we have to add the addend to find the 1869 symbol. */ 1870 if (ELF_ST_TYPE (isym->st_info) == STT_SECTION) 1871 symval += rel->r_addend; 1872 1873 if (ssec) 1874 { 1875 if ((ssec->flags & SEC_MERGE) 1876 && ssec->sec_info_type == SEC_INFO_TYPE_MERGE) 1877 symval = _bfd_merged_section_offset (abfd, & ssec, 1878 elf_section_data (ssec)->sec_info, 1879 symval); 1880 } 1881 1882 /* Now make the offset relative to where the linker is putting it. */ 1883 if (ssec) 1884 symval += 1885 ssec->output_section->vma + ssec->output_offset; 1886 1887 symval += rel->r_addend; 1888 } 1889 else 1890 { 1891 unsigned long indx; 1892 struct elf_link_hash_entry * h; 1893 1894 /* An external symbol. */ 1895 indx = ELF32_R_SYM (rel->r_info) - symtab_hdr->sh_info; 1896 h = elf_sym_hashes (abfd)[indx]; 1897 BFD_ASSERT (h != NULL); 1898 1899 if (h->root.type != bfd_link_hash_defined 1900 && h->root.type != bfd_link_hash_defweak) 1901 { 1902 /* This appears to be a reference to an undefined 1903 symbol. Just ignore it--it will be caught by the 1904 regular reloc processing. */ 1905 if (lrel) 1906 *lrel = rel; 1907 return 0; 1908 } 1909 1910 symval = (h->root.u.def.value 1911 + h->root.u.def.section->output_section->vma 1912 + h->root.u.def.section->output_offset); 1913 1914 symval += rel->r_addend; 1915 } 1916 1917 r_type = ELF32_R_TYPE (rel->r_info); 1918 switch (r_type) 1919 { 1920 case R_RL78_SYM: 1921 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1922 break; 1923 1924 case R_RL78_OPromtop: 1925 symval = get_romstart (info, input_bfd, input_section, rel->r_offset); 1926 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1927 break; 1928 1929 case R_RL78_OPramtop: 1930 symval = get_ramstart (info, input_bfd, input_section, rel->r_offset); 1931 (void) rl78_compute_complex_reloc (r_type, symval, input_section); 1932 break; 1933 1934 case R_RL78_OPneg: 1935 case R_RL78_OPadd: 1936 case R_RL78_OPsub: 1937 case R_RL78_OPmul: 1938 case R_RL78_OPdiv: 1939 case R_RL78_OPshla: 1940 case R_RL78_OPshra: 1941 case R_RL78_OPsctsize: 1942 case R_RL78_OPscttop: 1943 case R_RL78_OPand: 1944 case R_RL78_OPor: 1945 case R_RL78_OPxor: 1946 case R_RL78_OPnot: 1947 case R_RL78_OPmod: 1948 (void) rl78_compute_complex_reloc (r_type, 0, input_section); 1949 break; 1950 1951 case R_RL78_DIR16UL: 1952 case R_RL78_DIR8UL: 1953 case R_RL78_ABS16UL: 1954 case R_RL78_ABS8UL: 1955 *scale = 4; 1956 goto reloc_computes_value; 1957 1958 case R_RL78_DIR16UW: 1959 case R_RL78_DIR8UW: 1960 case R_RL78_ABS16UW: 1961 case R_RL78_ABS8UW: 1962 *scale = 2; 1963 goto reloc_computes_value; 1964 1965 default: 1966 reloc_computes_value: 1967 symval = rl78_compute_complex_reloc (r_type, symval, input_section); 1968 /* Fall through. */ 1969 case R_RL78_DIR32: 1970 case R_RL78_DIR24S: 1971 case R_RL78_DIR16: 1972 case R_RL78_DIR16U: 1973 case R_RL78_DIR16S: 1974 case R_RL78_DIR24S_PCREL: 1975 case R_RL78_DIR16S_PCREL: 1976 case R_RL78_DIR8S_PCREL: 1977 if (lrel) 1978 *lrel = rel; 1979 return symval; 1980 } 1981 1982 rel ++; 1983 } 1984 } 1985 1986 struct { 1987 int prefix; /* or -1 for "no prefix" */ 1988 int insn; /* or -1 for "end of list" */ 1989 int insn_for_saddr; /* or -1 for "no alternative" */ 1990 int insn_for_sfr; /* or -1 for "no alternative" */ 1991 } relax_addr16[] = { 1992 { -1, 0x02, 0x06, -1 }, /* ADDW AX, !addr16 */ 1993 { -1, 0x22, 0x26, -1 }, /* SUBW AX, !addr16 */ 1994 { -1, 0x42, 0x46, -1 }, /* CMPW AX, !addr16 */ 1995 { -1, 0x40, 0x4a, -1 }, /* CMP !addr16, #byte */ 1996 1997 { -1, 0x0f, 0x0b, -1 }, /* ADD A, !addr16 */ 1998 { -1, 0x1f, 0x1b, -1 }, /* ADDC A, !addr16 */ 1999 { -1, 0x2f, 0x2b, -1 }, /* SUB A, !addr16 */ 2000 { -1, 0x3f, 0x3b, -1 }, /* SUBC A, !addr16 */ 2001 { -1, 0x4f, 0x4b, -1 }, /* CMP A, !addr16 */ 2002 { -1, 0x5f, 0x5b, -1 }, /* AND A, !addr16 */ 2003 { -1, 0x6f, 0x6b, -1 }, /* OR A, !addr16 */ 2004 { -1, 0x7f, 0x7b, -1 }, /* XOR A, !addr16 */ 2005 2006 { -1, 0x8f, 0x8d, 0x8e }, /* MOV A, !addr16 */ 2007 { -1, 0x9f, 0x9d, 0x9e }, /* MOV !addr16, A */ 2008 { -1, 0xaf, 0xad, 0xae }, /* MOVW AX, !addr16 */ 2009 { -1, 0xbf, 0xbd, 0xbe }, /* MOVW !addr16, AX */ 2010 { -1, 0xcf, 0xcd, 0xce }, /* MOVW !addr16, #word */ 2011 2012 { -1, 0xa0, 0xa4, -1 }, /* INC !addr16 */ 2013 { -1, 0xa2, 0xa6, -1 }, /* INCW !addr16 */ 2014 { -1, 0xb0, 0xb4, -1 }, /* DEC !addr16 */ 2015 { -1, 0xb2, 0xb6, -1 }, /* DECW !addr16 */ 2016 2017 { -1, 0xd5, 0xd4, -1 }, /* CMP0 !addr16 */ 2018 { -1, 0xe5, 0xe4, -1 }, /* ONEB !addr16 */ 2019 { -1, 0xf5, 0xf4, -1 }, /* CLRB !addr16 */ 2020 2021 { -1, 0xd9, 0xd8, -1 }, /* MOV X, !addr16 */ 2022 { -1, 0xe9, 0xe8, -1 }, /* MOV B, !addr16 */ 2023 { -1, 0xf9, 0xf8, -1 }, /* MOV C, !addr16 */ 2024 { -1, 0xdb, 0xda, -1 }, /* MOVW BC, !addr16 */ 2025 { -1, 0xeb, 0xea, -1 }, /* MOVW DE, !addr16 */ 2026 { -1, 0xfb, 0xfa, -1 }, /* MOVW HL, !addr16 */ 2027 2028 { 0x61, 0xaa, 0xa8, -1 }, /* XCH A, !addr16 */ 2029 2030 { 0x71, 0x00, 0x02, 0x0a }, /* SET1 !addr16.0 */ 2031 { 0x71, 0x10, 0x12, 0x1a }, /* SET1 !addr16.0 */ 2032 { 0x71, 0x20, 0x22, 0x2a }, /* SET1 !addr16.0 */ 2033 { 0x71, 0x30, 0x32, 0x3a }, /* SET1 !addr16.0 */ 2034 { 0x71, 0x40, 0x42, 0x4a }, /* SET1 !addr16.0 */ 2035 { 0x71, 0x50, 0x52, 0x5a }, /* SET1 !addr16.0 */ 2036 { 0x71, 0x60, 0x62, 0x6a }, /* SET1 !addr16.0 */ 2037 { 0x71, 0x70, 0x72, 0x7a }, /* SET1 !addr16.0 */ 2038 2039 { 0x71, 0x08, 0x03, 0x0b }, /* CLR1 !addr16.0 */ 2040 { 0x71, 0x18, 0x13, 0x1b }, /* CLR1 !addr16.0 */ 2041 { 0x71, 0x28, 0x23, 0x2b }, /* CLR1 !addr16.0 */ 2042 { 0x71, 0x38, 0x33, 0x3b }, /* CLR1 !addr16.0 */ 2043 { 0x71, 0x48, 0x43, 0x4b }, /* CLR1 !addr16.0 */ 2044 { 0x71, 0x58, 0x53, 0x5b }, /* CLR1 !addr16.0 */ 2045 { 0x71, 0x68, 0x63, 0x6b }, /* CLR1 !addr16.0 */ 2046 { 0x71, 0x78, 0x73, 0x7b }, /* CLR1 !addr16.0 */ 2047 2048 { -1, -1, -1, -1 } 2049 }; 2050 2051 /* Relax one section. */ 2052 2053 static bfd_boolean 2054 rl78_elf_relax_section 2055 (bfd * abfd, 2056 asection * sec, 2057 struct bfd_link_info * link_info, 2058 bfd_boolean * again) 2059 { 2060 Elf_Internal_Shdr * symtab_hdr; 2061 Elf_Internal_Shdr * shndx_hdr; 2062 Elf_Internal_Rela * internal_relocs; 2063 Elf_Internal_Rela * free_relocs = NULL; 2064 Elf_Internal_Rela * irel; 2065 Elf_Internal_Rela * srel; 2066 Elf_Internal_Rela * irelend; 2067 Elf_Internal_Rela * next_alignment; 2068 bfd_byte * contents = NULL; 2069 bfd_byte * free_contents = NULL; 2070 Elf_Internal_Sym * intsyms = NULL; 2071 Elf_Internal_Sym * free_intsyms = NULL; 2072 Elf_External_Sym_Shndx * shndx_buf = NULL; 2073 bfd_vma pc; 2074 bfd_vma symval ATTRIBUTE_UNUSED = 0; 2075 int pcrel ATTRIBUTE_UNUSED = 0; 2076 int code ATTRIBUTE_UNUSED = 0; 2077 int section_alignment_glue; 2078 int scale; 2079 2080 if (abfd == elf_hash_table (link_info)->dynobj 2081 && strcmp (sec->name, ".plt") == 0) 2082 return rl78_elf_relax_plt_section (abfd, sec, link_info, again); 2083 2084 /* Assume nothing changes. */ 2085 *again = FALSE; 2086 2087 /* We don't have to do anything for a relocatable link, if 2088 this section does not have relocs, or if this is not a 2089 code section. */ 2090 if (bfd_link_relocatable (link_info) 2091 || (sec->flags & SEC_RELOC) == 0 2092 || sec->reloc_count == 0 2093 || (sec->flags & SEC_CODE) == 0) 2094 return TRUE; 2095 2096 symtab_hdr = & elf_symtab_hdr (abfd); 2097 if (elf_symtab_shndx_list (abfd)) 2098 shndx_hdr = & elf_symtab_shndx_list (abfd)->hdr; 2099 else 2100 shndx_hdr = NULL; 2101 2102 /* Get the section contents. */ 2103 if (elf_section_data (sec)->this_hdr.contents != NULL) 2104 contents = elf_section_data (sec)->this_hdr.contents; 2105 /* Go get them off disk. */ 2106 else 2107 { 2108 if (! bfd_malloc_and_get_section (abfd, sec, &contents)) 2109 goto error_return; 2110 elf_section_data (sec)->this_hdr.contents = contents; 2111 } 2112 2113 /* Read this BFD's symbols. */ 2114 /* Get cached copy if it exists. */ 2115 if (symtab_hdr->contents != NULL) 2116 intsyms = (Elf_Internal_Sym *) symtab_hdr->contents; 2117 else 2118 { 2119 intsyms = bfd_elf_get_elf_syms (abfd, symtab_hdr, symtab_hdr->sh_info, 0, NULL, NULL, NULL); 2120 symtab_hdr->contents = (bfd_byte *) intsyms; 2121 } 2122 2123 if (shndx_hdr && shndx_hdr->sh_size != 0) 2124 { 2125 bfd_size_type amt; 2126 2127 amt = symtab_hdr->sh_info; 2128 amt *= sizeof (Elf_External_Sym_Shndx); 2129 shndx_buf = (Elf_External_Sym_Shndx *) bfd_malloc (amt); 2130 if (shndx_buf == NULL) 2131 goto error_return; 2132 if (bfd_seek (abfd, shndx_hdr->sh_offset, SEEK_SET) != 0 2133 || bfd_bread (shndx_buf, amt, abfd) != amt) 2134 goto error_return; 2135 shndx_hdr->contents = (bfd_byte *) shndx_buf; 2136 } 2137 2138 /* Get a copy of the native relocations. */ 2139 internal_relocs = (_bfd_elf_link_read_relocs 2140 (abfd, sec, NULL, (Elf_Internal_Rela *) NULL, 2141 link_info->keep_memory)); 2142 if (internal_relocs == NULL) 2143 goto error_return; 2144 if (! link_info->keep_memory) 2145 free_relocs = internal_relocs; 2146 2147 /* The RL_ relocs must be just before the operand relocs they go 2148 with, so we must sort them to guarantee this. We use bubblesort 2149 instead of qsort so we can guarantee that relocs with the same 2150 address remain in the same relative order. */ 2151 reloc_bubblesort (internal_relocs, sec->reloc_count); 2152 2153 /* Walk through them looking for relaxing opportunities. */ 2154 irelend = internal_relocs + sec->reloc_count; 2155 2156 2157 /* This will either be NULL or a pointer to the next alignment 2158 relocation. */ 2159 next_alignment = internal_relocs; 2160 2161 /* We calculate worst case shrinkage caused by alignment directives. 2162 No fool-proof, but better than either ignoring the problem or 2163 doing heavy duty analysis of all the alignment markers in all 2164 input sections. */ 2165 section_alignment_glue = 0; 2166 for (irel = internal_relocs; irel < irelend; irel++) 2167 if (ELF32_R_TYPE (irel->r_info) == R_RL78_RH_RELAX 2168 && irel->r_addend & RL78_RELAXA_ALIGN) 2169 { 2170 int this_glue = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2171 2172 if (section_alignment_glue < this_glue) 2173 section_alignment_glue = this_glue; 2174 } 2175 /* Worst case is all 0..N alignments, in order, causing 2*N-1 byte 2176 shrinkage. */ 2177 section_alignment_glue *= 2; 2178 2179 for (irel = internal_relocs; irel < irelend; irel++) 2180 { 2181 unsigned char *insn; 2182 int nrelocs; 2183 2184 /* The insns we care about are all marked with one of these. */ 2185 if (ELF32_R_TYPE (irel->r_info) != R_RL78_RH_RELAX) 2186 continue; 2187 2188 if (irel->r_addend & RL78_RELAXA_ALIGN 2189 || next_alignment == internal_relocs) 2190 { 2191 /* When we delete bytes, we need to maintain all the alignments 2192 indicated. In addition, we need to be careful about relaxing 2193 jumps across alignment boundaries - these displacements 2194 *grow* when we delete bytes. For now, don't shrink 2195 displacements across an alignment boundary, just in case. 2196 Note that this only affects relocations to the same 2197 section. */ 2198 next_alignment += 2; 2199 while (next_alignment < irelend 2200 && (ELF32_R_TYPE (next_alignment->r_info) != R_RL78_RH_RELAX 2201 || !(next_alignment->r_addend & RL78_RELAXA_ELIGN))) 2202 next_alignment ++; 2203 if (next_alignment >= irelend || next_alignment->r_offset == 0) 2204 next_alignment = NULL; 2205 } 2206 2207 /* When we hit alignment markers, see if we've shrunk enough 2208 before them to reduce the gap without violating the alignment 2209 requirements. */ 2210 if (irel->r_addend & RL78_RELAXA_ALIGN) 2211 { 2212 /* At this point, the next relocation *should* be the ELIGN 2213 end marker. */ 2214 Elf_Internal_Rela *erel = irel + 1; 2215 unsigned int alignment, nbytes; 2216 2217 if (ELF32_R_TYPE (erel->r_info) != R_RL78_RH_RELAX) 2218 continue; 2219 if (!(erel->r_addend & RL78_RELAXA_ELIGN)) 2220 continue; 2221 2222 alignment = 1 << (irel->r_addend & RL78_RELAXA_ANUM); 2223 2224 if (erel->r_offset - irel->r_offset < alignment) 2225 continue; 2226 2227 nbytes = erel->r_offset - irel->r_offset; 2228 nbytes /= alignment; 2229 nbytes *= alignment; 2230 2231 elf32_rl78_relax_delete_bytes (abfd, sec, erel->r_offset - nbytes, nbytes, 2232 next_alignment, erel->r_offset == sec->size); 2233 *again = TRUE; 2234 2235 continue; 2236 } 2237 2238 if (irel->r_addend & RL78_RELAXA_ELIGN) 2239 continue; 2240 2241 insn = contents + irel->r_offset; 2242 2243 nrelocs = irel->r_addend & RL78_RELAXA_RNUM; 2244 2245 /* At this point, we have an insn that is a candidate for linker 2246 relaxation. There are NRELOCS relocs following that may be 2247 relaxed, although each reloc may be made of more than one 2248 reloc entry (such as gp-rel symbols). */ 2249 2250 /* Get the value of the symbol referred to by the reloc. Just 2251 in case this is the last reloc in the list, use the RL's 2252 addend to choose between this reloc (no addend) or the next 2253 (yes addend, which means at least one following reloc). */ 2254 2255 /* srel points to the "current" reloction for this insn - 2256 actually the last reloc for a given operand, which is the one 2257 we need to update. We check the relaxations in the same 2258 order that the relocations happen, so we'll just push it 2259 along as we go. */ 2260 srel = irel; 2261 2262 pc = sec->output_section->vma + sec->output_offset 2263 + srel->r_offset; 2264 2265 #define GET_RELOC \ 2266 BFD_ASSERT (nrelocs > 0); \ 2267 symval = OFFSET_FOR_RELOC (srel, &srel, &scale); \ 2268 pcrel = symval - pc + srel->r_addend; \ 2269 nrelocs --; 2270 2271 #define SNIPNR(offset, nbytes) \ 2272 elf32_rl78_relax_delete_bytes (abfd, sec, (insn - contents) + offset, nbytes, next_alignment, 0); 2273 2274 #define SNIP(offset, nbytes, newtype) \ 2275 SNIPNR (offset, nbytes); \ 2276 srel->r_info = ELF32_R_INFO (ELF32_R_SYM (srel->r_info), newtype) 2277 2278 /* The order of these bit tests must match the order that the 2279 relocs appear in. Since we sorted those by offset, we can 2280 predict them. */ 2281 2282 /*----------------------------------------------------------------------*/ 2283 /* EF ad BR $rel8 pcrel 2284 ED al ah BR !abs16 abs 2285 EE al ah BR $!rel16 pcrel 2286 EC al ah as BR !!abs20 abs 2287 2288 FD al ah CALL !abs16 abs 2289 FE al ah CALL $!rel16 pcrel 2290 FC al ah as CALL !!abs20 abs 2291 2292 DC ad BC $rel8 2293 DE ad BNC $rel8 2294 DD ad BZ $rel8 2295 DF ad BNZ $rel8 2296 61 C3 ad BH $rel8 2297 61 D3 ad BNH $rel8 2298 61 C8 EF ad SKC ; BR $rel8 2299 61 D8 EF ad SKNC ; BR $rel8 2300 61 E8 EF ad SKZ ; BR $rel8 2301 61 F8 EF ad SKNZ ; BR $rel8 2302 61 E3 EF ad SKH ; BR $rel8 2303 61 F3 EF ad SKNH ; BR $rel8 2304 */ 2305 2306 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_BRA) 2307 { 2308 /* SKIP opcodes that skip non-branches will have a relax tag 2309 but no corresponding symbol to relax against; we just 2310 skip those. */ 2311 if (irel->r_addend & RL78_RELAXA_RNUM) 2312 { 2313 GET_RELOC; 2314 } 2315 2316 switch (insn[0]) 2317 { 2318 case 0xdc: /* BC */ 2319 case 0xdd: /* BZ */ 2320 case 0xde: /* BNC */ 2321 case 0xdf: /* BNZ */ 2322 if (insn[1] == 0x03 && insn[2] == 0xee /* BR */ 2323 && (srel->r_offset - irel->r_offset) > 1) /* a B<c> without its own reloc */ 2324 { 2325 /* This is a "long" conditional as generated by gas: 2326 DC 03 EE ad.dr */ 2327 if (pcrel < 127 2328 && pcrel > -127) 2329 { 2330 insn[0] ^= 0x02; /* invert conditional */ 2331 SNIPNR (4, 1); 2332 SNIP (1, 2, R_RL78_DIR8S_PCREL); 2333 insn[1] = pcrel; 2334 *again = TRUE; 2335 } 2336 } 2337 break; 2338 2339 case 0xec: /* BR !!abs20 */ 2340 2341 if (pcrel < 127 2342 && pcrel > -127) 2343 { 2344 insn[0] = 0xef; 2345 insn[1] = pcrel; 2346 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2347 *again = TRUE; 2348 } 2349 else if (symval < 65536) 2350 { 2351 insn[0] = 0xed; 2352 insn[1] = symval & 0xff; 2353 insn[2] = symval >> 8; 2354 SNIP (2, 1, R_RL78_DIR16U); 2355 *again = TRUE; 2356 } 2357 else if (pcrel < 32767 2358 && pcrel > -32767) 2359 { 2360 insn[0] = 0xee; 2361 insn[1] = pcrel & 0xff; 2362 insn[2] = pcrel >> 8; 2363 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2364 *again = TRUE; 2365 } 2366 break; 2367 2368 case 0xee: /* BR $!pcrel16 */ 2369 case 0xed: /* BR $!abs16 */ 2370 if (pcrel < 127 2371 && pcrel > -127) 2372 { 2373 insn[0] = 0xef; 2374 insn[1] = pcrel; 2375 SNIP (2, 1, R_RL78_DIR8S_PCREL); 2376 *again = TRUE; 2377 } 2378 break; 2379 2380 case 0xfc: /* CALL !!abs20 */ 2381 if (symval < 65536) 2382 { 2383 insn[0] = 0xfd; 2384 insn[1] = symval & 0xff; 2385 insn[2] = symval >> 8; 2386 SNIP (2, 1, R_RL78_DIR16U); 2387 *again = TRUE; 2388 } 2389 else if (pcrel < 32767 2390 && pcrel > -32767) 2391 { 2392 insn[0] = 0xfe; 2393 insn[1] = pcrel & 0xff; 2394 insn[2] = pcrel >> 8; 2395 SNIP (2, 1, R_RL78_DIR16S_PCREL); 2396 *again = TRUE; 2397 } 2398 break; 2399 2400 case 0x61: /* PREFIX */ 2401 /* For SKIP/BR, we change the BR opcode and delete the 2402 SKIP. That way, we don't have to find and change the 2403 relocation for the BR. */ 2404 /* Note that, for the case where we're skipping some 2405 other insn, we have no "other" reloc but that's safe 2406 here anyway. */ 2407 switch (insn[1]) 2408 { 2409 case 0xd3: /* BNH */ 2410 case 0xc3: /* BH */ 2411 if (insn[2] == 0x03 && insn[3] == 0xee 2412 && (srel->r_offset - irel->r_offset) > 2) /* a B<c> without its own reloc */ 2413 { 2414 /* Another long branch by gas: 2415 61 D3 03 EE ad.dr */ 2416 if (pcrel < 127 2417 && pcrel > -127) 2418 { 2419 insn[1] ^= 0x10; /* invert conditional */ 2420 SNIPNR (5, 1); 2421 SNIP (2, 2, R_RL78_DIR8S_PCREL); 2422 insn[2] = pcrel; 2423 *again = TRUE; 2424 } 2425 } 2426 break; 2427 2428 case 0xc8: /* SKC */ 2429 if (insn[2] == 0xef) 2430 { 2431 insn[2] = 0xde; /* BNC */ 2432 SNIPNR (0, 2); 2433 } 2434 break; 2435 2436 case 0xd8: /* SKNC */ 2437 if (insn[2] == 0xef) 2438 { 2439 insn[2] = 0xdc; /* BC */ 2440 SNIPNR (0, 2); 2441 } 2442 break; 2443 2444 case 0xe8: /* SKZ */ 2445 if (insn[2] == 0xef) 2446 { 2447 insn[2] = 0xdf; /* BNZ */ 2448 SNIPNR (0, 2); 2449 } 2450 break; 2451 2452 case 0xf8: /* SKNZ */ 2453 if (insn[2] == 0xef) 2454 { 2455 insn[2] = 0xdd; /* BZ */ 2456 SNIPNR (0, 2); 2457 } 2458 break; 2459 2460 case 0xe3: /* SKH */ 2461 if (insn[2] == 0xef) 2462 { 2463 insn[2] = 0xd3; /* BNH */ 2464 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2465 } 2466 break; 2467 2468 case 0xf3: /* SKNH */ 2469 if (insn[2] == 0xef) 2470 { 2471 insn[2] = 0xc3; /* BH */ 2472 SNIPNR (1, 1); /* we reuse the 0x61 prefix from the SKH */ 2473 } 2474 break; 2475 } 2476 break; 2477 } 2478 } 2479 2480 if ((irel->r_addend & RL78_RELAXA_MASK) == RL78_RELAXA_ADDR16 2481 && nrelocs > 0) 2482 { 2483 /*----------------------------------------------------------------------*/ 2484 /* Some insns have both a 16-bit address operand and an 8-bit 2485 variant if the address is within a special range: 2486 2487 Address 16-bit operand SADDR range SFR range 2488 FFF00-FFFFF 0xff00-0xffff 0x00-0xff 2489 FFE20-FFF1F 0xfe20-0xff1f 0x00-0xff 2490 2491 The RELAX_ADDR16[] array has the insn encodings for the 2492 16-bit operand version, as well as the SFR and SADDR 2493 variants. We only need to replace the encodings and 2494 adjust the operand. 2495 2496 Note: we intentionally do not attempt to decode and skip 2497 any ES: prefix, as adding ES: means the addr16 (likely) 2498 no longer points to saddr/sfr space. 2499 */ 2500 2501 int is_sfr; 2502 int is_saddr; 2503 int idx; 2504 int poff; 2505 2506 GET_RELOC; 2507 2508 if (0xffe20 <= symval && symval <= 0xfffff) 2509 { 2510 2511 is_saddr = (0xffe20 <= symval && symval <= 0xfff1f); 2512 is_sfr = (0xfff00 <= symval && symval <= 0xfffff); 2513 2514 for (idx = 0; relax_addr16[idx].insn != -1; idx ++) 2515 { 2516 if (relax_addr16[idx].prefix != -1 2517 && insn[0] == relax_addr16[idx].prefix 2518 && insn[1] == relax_addr16[idx].insn) 2519 { 2520 poff = 1; 2521 } 2522 else if (relax_addr16[idx].prefix == -1 2523 && insn[0] == relax_addr16[idx].insn) 2524 { 2525 poff = 0; 2526 } 2527 else 2528 continue; 2529 2530 /* We have a matched insn, and poff is 0 or 1 depending 2531 on the base pattern size. */ 2532 2533 if (is_sfr && relax_addr16[idx].insn_for_sfr != -1) 2534 { 2535 insn[poff] = relax_addr16[idx].insn_for_sfr; 2536 SNIP (poff+2, 1, R_RL78_RH_SFR); 2537 } 2538 2539 else if (is_saddr && relax_addr16[idx].insn_for_saddr != -1) 2540 { 2541 insn[poff] = relax_addr16[idx].insn_for_saddr; 2542 SNIP (poff+2, 1, R_RL78_RH_SADDR); 2543 } 2544 } 2545 } 2546 } 2547 /*----------------------------------------------------------------------*/ 2548 } 2549 2550 return TRUE; 2551 2552 error_return: 2553 if (free_relocs != NULL) 2554 free (free_relocs); 2555 2556 if (free_contents != NULL) 2557 free (free_contents); 2558 2559 if (shndx_buf != NULL) 2560 { 2561 shndx_hdr->contents = NULL; 2562 free (shndx_buf); 2563 } 2564 2565 if (free_intsyms != NULL) 2566 free (free_intsyms); 2567 2568 return TRUE; 2569 } 2570 2571 2572 2573 #define ELF_ARCH bfd_arch_rl78 2574 #define ELF_MACHINE_CODE EM_RL78 2575 #define ELF_MAXPAGESIZE 0x1000 2576 2577 #define TARGET_LITTLE_SYM rl78_elf32_vec 2578 #define TARGET_LITTLE_NAME "elf32-rl78" 2579 2580 #define elf_info_to_howto_rel NULL 2581 #define elf_info_to_howto rl78_info_to_howto_rela 2582 #define elf_backend_object_p rl78_elf_object_p 2583 #define elf_backend_relocate_section rl78_elf_relocate_section 2584 #define elf_symbol_leading_char ('_') 2585 #define elf_backend_can_gc_sections 1 2586 2587 #define bfd_elf32_bfd_reloc_type_lookup rl78_reloc_type_lookup 2588 #define bfd_elf32_bfd_reloc_name_lookup rl78_reloc_name_lookup 2589 #define bfd_elf32_bfd_set_private_flags rl78_elf_set_private_flags 2590 #define bfd_elf32_bfd_merge_private_bfd_data rl78_elf_merge_private_bfd_data 2591 #define bfd_elf32_bfd_print_private_bfd_data rl78_elf_print_private_bfd_data 2592 2593 #define bfd_elf32_bfd_relax_section rl78_elf_relax_section 2594 #define elf_backend_check_relocs rl78_elf_check_relocs 2595 #define elf_backend_always_size_sections \ 2596 rl78_elf_always_size_sections 2597 #define elf_backend_finish_dynamic_sections \ 2598 rl78_elf_finish_dynamic_sections 2599 2600 #include "elf32-target.h" 2601