1@section Architectures 2BFD keeps one atom in a BFD describing the 3architecture of the data attached to the BFD: a pointer to a 4@code{bfd_arch_info_type}. 5 6Pointers to structures can be requested independently of a BFD 7so that an architecture's information can be interrogated 8without access to an open BFD. 9 10The architecture information is provided by each architecture package. 11The set of default architectures is selected by the macro 12@code{SELECT_ARCHITECTURES}. This is normally set up in the 13@file{config/@var{target}.mt} file of your choice. If the name is not 14defined, then all the architectures supported are included. 15 16When BFD starts up, all the architectures are called with an 17initialize method. It is up to the architecture back end to 18insert as many items into the list of architectures as it wants to; 19generally this would be one for each machine and one for the 20default case (an item with a machine field of 0). 21 22BFD's idea of an architecture is implemented in @file{archures.c}. 23 24@subsection bfd_architecture 25 26 27@strong{Description}@* 28This enum gives the object file's CPU architecture, in a 29global sense---i.e., what processor family does it belong to? 30Another field indicates which processor within 31the family is in use. The machine gives a number which 32distinguishes different versions of the architecture, 33containing, for example, 68020 for Motorola 68020. 34@example 35enum bfd_architecture 36@{ 37 bfd_arch_unknown, /* File arch not known. */ 38 bfd_arch_obscure, /* Arch known, not one of these. */ 39 bfd_arch_m68k, /* Motorola 68xxx. */ 40#define bfd_mach_m68000 1 41#define bfd_mach_m68008 2 42#define bfd_mach_m68010 3 43#define bfd_mach_m68020 4 44#define bfd_mach_m68030 5 45#define bfd_mach_m68040 6 46#define bfd_mach_m68060 7 47#define bfd_mach_cpu32 8 48#define bfd_mach_fido 9 49#define bfd_mach_mcf_isa_a_nodiv 10 50#define bfd_mach_mcf_isa_a 11 51#define bfd_mach_mcf_isa_a_mac 12 52#define bfd_mach_mcf_isa_a_emac 13 53#define bfd_mach_mcf_isa_aplus 14 54#define bfd_mach_mcf_isa_aplus_mac 15 55#define bfd_mach_mcf_isa_aplus_emac 16 56#define bfd_mach_mcf_isa_b_nousp 17 57#define bfd_mach_mcf_isa_b_nousp_mac 18 58#define bfd_mach_mcf_isa_b_nousp_emac 19 59#define bfd_mach_mcf_isa_b 20 60#define bfd_mach_mcf_isa_b_mac 21 61#define bfd_mach_mcf_isa_b_emac 22 62#define bfd_mach_mcf_isa_b_float 23 63#define bfd_mach_mcf_isa_b_float_mac 24 64#define bfd_mach_mcf_isa_b_float_emac 25 65#define bfd_mach_mcf_isa_c 26 66#define bfd_mach_mcf_isa_c_mac 27 67#define bfd_mach_mcf_isa_c_emac 28 68#define bfd_mach_mcf_isa_c_nodiv 29 69#define bfd_mach_mcf_isa_c_nodiv_mac 30 70#define bfd_mach_mcf_isa_c_nodiv_emac 31 71 bfd_arch_vax, /* DEC Vax. */ 72 73 bfd_arch_or1k, /* OpenRISC 1000. */ 74#define bfd_mach_or1k 1 75#define bfd_mach_or1knd 2 76 77 bfd_arch_sparc, /* SPARC. */ 78#define bfd_mach_sparc 1 79/* The difference between v8plus and v9 is that v9 is a true 64 bit env. */ 80#define bfd_mach_sparc_sparclet 2 81#define bfd_mach_sparc_sparclite 3 82#define bfd_mach_sparc_v8plus 4 83#define bfd_mach_sparc_v8plusa 5 /* with ultrasparc add'ns. */ 84#define bfd_mach_sparc_sparclite_le 6 85#define bfd_mach_sparc_v9 7 86#define bfd_mach_sparc_v9a 8 /* with ultrasparc add'ns. */ 87#define bfd_mach_sparc_v8plusb 9 /* with cheetah add'ns. */ 88#define bfd_mach_sparc_v9b 10 /* with cheetah add'ns. */ 89#define bfd_mach_sparc_v8plusc 11 /* with UA2005 and T1 add'ns. */ 90#define bfd_mach_sparc_v9c 12 /* with UA2005 and T1 add'ns. */ 91#define bfd_mach_sparc_v8plusd 13 /* with UA2007 and T3 add'ns. */ 92#define bfd_mach_sparc_v9d 14 /* with UA2007 and T3 add'ns. */ 93#define bfd_mach_sparc_v8pluse 15 /* with OSA2001 and T4 add'ns (no IMA). */ 94#define bfd_mach_sparc_v9e 16 /* with OSA2001 and T4 add'ns (no IMA). */ 95#define bfd_mach_sparc_v8plusv 17 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 96#define bfd_mach_sparc_v9v 18 /* with OSA2011 and T4 and IMA and FJMAU add'ns. */ 97#define bfd_mach_sparc_v8plusm 19 /* with OSA2015 and M7 add'ns. */ 98#define bfd_mach_sparc_v9m 20 /* with OSA2015 and M7 add'ns. */ 99#define bfd_mach_sparc_v8plusm8 21 /* with OSA2017 and M8 add'ns. */ 100#define bfd_mach_sparc_v9m8 22 /* with OSA2017 and M8 add'ns. */ 101/* Nonzero if MACH has the v9 instruction set. */ 102#define bfd_mach_sparc_v9_p(mach) \ 103 ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9m8 \ 104 && (mach) != bfd_mach_sparc_sparclite_le) 105/* Nonzero if MACH is a 64 bit sparc architecture. */ 106#define bfd_mach_sparc_64bit_p(mach) \ 107 ((mach) >= bfd_mach_sparc_v9 \ 108 && (mach) != bfd_mach_sparc_v8plusb \ 109 && (mach) != bfd_mach_sparc_v8plusc \ 110 && (mach) != bfd_mach_sparc_v8plusd \ 111 && (mach) != bfd_mach_sparc_v8pluse \ 112 && (mach) != bfd_mach_sparc_v8plusv \ 113 && (mach) != bfd_mach_sparc_v8plusm \ 114 && (mach) != bfd_mach_sparc_v8plusm8) 115 bfd_arch_spu, /* PowerPC SPU. */ 116#define bfd_mach_spu 256 117 bfd_arch_mips, /* MIPS Rxxxx. */ 118#define bfd_mach_mips3000 3000 119#define bfd_mach_mips3900 3900 120#define bfd_mach_mips4000 4000 121#define bfd_mach_mips4010 4010 122#define bfd_mach_mips4100 4100 123#define bfd_mach_mips4111 4111 124#define bfd_mach_mips4120 4120 125#define bfd_mach_mips4300 4300 126#define bfd_mach_mips4400 4400 127#define bfd_mach_mips4600 4600 128#define bfd_mach_mips4650 4650 129#define bfd_mach_mips5000 5000 130#define bfd_mach_mips5400 5400 131#define bfd_mach_mips5500 5500 132#define bfd_mach_mips5900 5900 133#define bfd_mach_mips6000 6000 134#define bfd_mach_mips7000 7000 135#define bfd_mach_mips8000 8000 136#define bfd_mach_mips9000 9000 137#define bfd_mach_mips10000 10000 138#define bfd_mach_mips12000 12000 139#define bfd_mach_mips14000 14000 140#define bfd_mach_mips16000 16000 141#define bfd_mach_mips16 16 142#define bfd_mach_mips5 5 143#define bfd_mach_mips_loongson_2e 3001 144#define bfd_mach_mips_loongson_2f 3002 145#define bfd_mach_mips_gs464 3003 146#define bfd_mach_mips_gs464e 3004 147#define bfd_mach_mips_gs264e 3005 148#define bfd_mach_mips_sb1 12310201 /* octal 'SB', 01. */ 149#define bfd_mach_mips_octeon 6501 150#define bfd_mach_mips_octeonp 6601 151#define bfd_mach_mips_octeon2 6502 152#define bfd_mach_mips_octeon3 6503 153#define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */ 154#define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */ 155#define bfd_mach_mipsisa32 32 156#define bfd_mach_mipsisa32r2 33 157#define bfd_mach_mipsisa32r3 34 158#define bfd_mach_mipsisa32r5 36 159#define bfd_mach_mipsisa32r6 37 160#define bfd_mach_mipsisa64 64 161#define bfd_mach_mipsisa64r2 65 162#define bfd_mach_mipsisa64r3 66 163#define bfd_mach_mipsisa64r5 68 164#define bfd_mach_mipsisa64r6 69 165#define bfd_mach_mips_micromips 96 166 bfd_arch_i386, /* Intel 386. */ 167#define bfd_mach_i386_intel_syntax (1 << 0) 168#define bfd_mach_i386_i8086 (1 << 1) 169#define bfd_mach_i386_i386 (1 << 2) 170#define bfd_mach_x86_64 (1 << 3) 171#define bfd_mach_x64_32 (1 << 4) 172#define bfd_mach_i386_i386_intel_syntax (bfd_mach_i386_i386 | bfd_mach_i386_intel_syntax) 173#define bfd_mach_x86_64_intel_syntax (bfd_mach_x86_64 | bfd_mach_i386_intel_syntax) 174#define bfd_mach_x64_32_intel_syntax (bfd_mach_x64_32 | bfd_mach_i386_intel_syntax) 175 bfd_arch_l1om, /* Intel L1OM. */ 176#define bfd_mach_l1om (1 << 5) 177#define bfd_mach_l1om_intel_syntax (bfd_mach_l1om | bfd_mach_i386_intel_syntax) 178 bfd_arch_k1om, /* Intel K1OM. */ 179#define bfd_mach_k1om (1 << 6) 180#define bfd_mach_k1om_intel_syntax (bfd_mach_k1om | bfd_mach_i386_intel_syntax) 181#define bfd_mach_i386_nacl (1 << 7) 182#define bfd_mach_i386_i386_nacl (bfd_mach_i386_i386 | bfd_mach_i386_nacl) 183#define bfd_mach_x86_64_nacl (bfd_mach_x86_64 | bfd_mach_i386_nacl) 184#define bfd_mach_x64_32_nacl (bfd_mach_x64_32 | bfd_mach_i386_nacl) 185 bfd_arch_iamcu, /* Intel MCU. */ 186#define bfd_mach_iamcu (1 << 8) 187#define bfd_mach_i386_iamcu (bfd_mach_i386_i386 | bfd_mach_iamcu) 188#define bfd_mach_i386_iamcu_intel_syntax (bfd_mach_i386_iamcu | bfd_mach_i386_intel_syntax) 189 bfd_arch_romp, /* IBM ROMP PC/RT. */ 190 bfd_arch_convex, /* Convex. */ 191 bfd_arch_m98k, /* Motorola 98xxx. */ 192 bfd_arch_pyramid, /* Pyramid Technology. */ 193 bfd_arch_h8300, /* Renesas H8/300 (formerly Hitachi H8/300). */ 194#define bfd_mach_h8300 1 195#define bfd_mach_h8300h 2 196#define bfd_mach_h8300s 3 197#define bfd_mach_h8300hn 4 198#define bfd_mach_h8300sn 5 199#define bfd_mach_h8300sx 6 200#define bfd_mach_h8300sxn 7 201 bfd_arch_pdp11, /* DEC PDP-11. */ 202 bfd_arch_plugin, 203 bfd_arch_powerpc, /* PowerPC. */ 204#define bfd_mach_ppc 32 205#define bfd_mach_ppc64 64 206#define bfd_mach_ppc_403 403 207#define bfd_mach_ppc_403gc 4030 208#define bfd_mach_ppc_405 405 209#define bfd_mach_ppc_505 505 210#define bfd_mach_ppc_601 601 211#define bfd_mach_ppc_602 602 212#define bfd_mach_ppc_603 603 213#define bfd_mach_ppc_ec603e 6031 214#define bfd_mach_ppc_604 604 215#define bfd_mach_ppc_620 620 216#define bfd_mach_ppc_630 630 217#define bfd_mach_ppc_750 750 218#define bfd_mach_ppc_860 860 219#define bfd_mach_ppc_a35 35 220#define bfd_mach_ppc_rs64ii 642 221#define bfd_mach_ppc_rs64iii 643 222#define bfd_mach_ppc_7400 7400 223#define bfd_mach_ppc_e500 500 224#define bfd_mach_ppc_e500mc 5001 225#define bfd_mach_ppc_e500mc64 5005 226#define bfd_mach_ppc_e5500 5006 227#define bfd_mach_ppc_e6500 5007 228#define bfd_mach_ppc_titan 83 229#define bfd_mach_ppc_vle 84 230 bfd_arch_rs6000, /* IBM RS/6000. */ 231#define bfd_mach_rs6k 6000 232#define bfd_mach_rs6k_rs1 6001 233#define bfd_mach_rs6k_rsc 6003 234#define bfd_mach_rs6k_rs2 6002 235 bfd_arch_hppa, /* HP PA RISC. */ 236#define bfd_mach_hppa10 10 237#define bfd_mach_hppa11 11 238#define bfd_mach_hppa20 20 239#define bfd_mach_hppa20w 25 240 bfd_arch_d10v, /* Mitsubishi D10V. */ 241#define bfd_mach_d10v 1 242#define bfd_mach_d10v_ts2 2 243#define bfd_mach_d10v_ts3 3 244 bfd_arch_d30v, /* Mitsubishi D30V. */ 245 bfd_arch_dlx, /* DLX. */ 246 bfd_arch_m68hc11, /* Motorola 68HC11. */ 247 bfd_arch_m68hc12, /* Motorola 68HC12. */ 248#define bfd_mach_m6812_default 0 249#define bfd_mach_m6812 1 250#define bfd_mach_m6812s 2 251 bfd_arch_m9s12x, /* Freescale S12X. */ 252 bfd_arch_m9s12xg, /* Freescale XGATE. */ 253 bfd_arch_s12z, /* Freescale S12Z. */ 254#define bfd_mach_s12z_default 0 255 bfd_arch_z8k, /* Zilog Z8000. */ 256#define bfd_mach_z8001 1 257#define bfd_mach_z8002 2 258 bfd_arch_sh, /* Renesas / SuperH SH (formerly Hitachi SH). */ 259#define bfd_mach_sh 1 260#define bfd_mach_sh2 0x20 261#define bfd_mach_sh_dsp 0x2d 262#define bfd_mach_sh2a 0x2a 263#define bfd_mach_sh2a_nofpu 0x2b 264#define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1 265#define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2 266#define bfd_mach_sh2a_or_sh4 0x2a3 267#define bfd_mach_sh2a_or_sh3e 0x2a4 268#define bfd_mach_sh2e 0x2e 269#define bfd_mach_sh3 0x30 270#define bfd_mach_sh3_nommu 0x31 271#define bfd_mach_sh3_dsp 0x3d 272#define bfd_mach_sh3e 0x3e 273#define bfd_mach_sh4 0x40 274#define bfd_mach_sh4_nofpu 0x41 275#define bfd_mach_sh4_nommu_nofpu 0x42 276#define bfd_mach_sh4a 0x4a 277#define bfd_mach_sh4a_nofpu 0x4b 278#define bfd_mach_sh4al_dsp 0x4d 279 bfd_arch_alpha, /* Dec Alpha. */ 280#define bfd_mach_alpha_ev4 0x10 281#define bfd_mach_alpha_ev5 0x20 282#define bfd_mach_alpha_ev6 0x30 283 bfd_arch_arm, /* Advanced Risc Machines ARM. */ 284#define bfd_mach_arm_unknown 0 285#define bfd_mach_arm_2 1 286#define bfd_mach_arm_2a 2 287#define bfd_mach_arm_3 3 288#define bfd_mach_arm_3M 4 289#define bfd_mach_arm_4 5 290#define bfd_mach_arm_4T 6 291#define bfd_mach_arm_5 7 292#define bfd_mach_arm_5T 8 293#define bfd_mach_arm_5TE 9 294#define bfd_mach_arm_XScale 10 295#define bfd_mach_arm_ep9312 11 296#define bfd_mach_arm_iWMMXt 12 297#define bfd_mach_arm_iWMMXt2 13 298#define bfd_mach_arm_5TEJ 14 299#define bfd_mach_arm_6 15 300#define bfd_mach_arm_6KZ 16 301#define bfd_mach_arm_6T2 17 302#define bfd_mach_arm_6K 18 303#define bfd_mach_arm_7 19 304#define bfd_mach_arm_6M 20 305#define bfd_mach_arm_6SM 21 306#define bfd_mach_arm_7EM 22 307#define bfd_mach_arm_8 23 308#define bfd_mach_arm_8R 24 309#define bfd_mach_arm_8M_BASE 25 310#define bfd_mach_arm_8M_MAIN 26 311#define bfd_mach_arm_8_1M_MAIN 27 312 bfd_arch_nds32, /* Andes NDS32. */ 313#define bfd_mach_n1 1 314#define bfd_mach_n1h 2 315#define bfd_mach_n1h_v2 3 316#define bfd_mach_n1h_v3 4 317#define bfd_mach_n1h_v3m 5 318 bfd_arch_ns32k, /* National Semiconductors ns32000. */ 319 bfd_arch_tic30, /* Texas Instruments TMS320C30. */ 320 bfd_arch_tic4x, /* Texas Instruments TMS320C3X/4X. */ 321#define bfd_mach_tic3x 30 322#define bfd_mach_tic4x 40 323 bfd_arch_tic54x, /* Texas Instruments TMS320C54X. */ 324 bfd_arch_tic6x, /* Texas Instruments TMS320C6X. */ 325 bfd_arch_v850, /* NEC V850. */ 326 bfd_arch_v850_rh850,/* NEC V850 (using RH850 ABI). */ 327#define bfd_mach_v850 1 328#define bfd_mach_v850e 'E' 329#define bfd_mach_v850e1 '1' 330#define bfd_mach_v850e2 0x4532 331#define bfd_mach_v850e2v3 0x45325633 332#define bfd_mach_v850e3v5 0x45335635 /* ('E'|'3'|'V'|'5'). */ 333 bfd_arch_arc, /* ARC Cores. */ 334#define bfd_mach_arc_a4 0 335#define bfd_mach_arc_a5 1 336#define bfd_mach_arc_arc600 2 337#define bfd_mach_arc_arc601 4 338#define bfd_mach_arc_arc700 3 339#define bfd_mach_arc_arcv2 5 340 bfd_arch_m32c, /* Renesas M16C/M32C. */ 341#define bfd_mach_m16c 0x75 342#define bfd_mach_m32c 0x78 343 bfd_arch_m32r, /* Renesas M32R (formerly Mitsubishi M32R/D). */ 344#define bfd_mach_m32r 1 /* For backwards compatibility. */ 345#define bfd_mach_m32rx 'x' 346#define bfd_mach_m32r2 '2' 347 bfd_arch_mn10200, /* Matsushita MN10200. */ 348 bfd_arch_mn10300, /* Matsushita MN10300. */ 349#define bfd_mach_mn10300 300 350#define bfd_mach_am33 330 351#define bfd_mach_am33_2 332 352 bfd_arch_fr30, 353#define bfd_mach_fr30 0x46523330 354 bfd_arch_frv, 355#define bfd_mach_frv 1 356#define bfd_mach_frvsimple 2 357#define bfd_mach_fr300 300 358#define bfd_mach_fr400 400 359#define bfd_mach_fr450 450 360#define bfd_mach_frvtomcat 499 /* fr500 prototype. */ 361#define bfd_mach_fr500 500 362#define bfd_mach_fr550 550 363 bfd_arch_moxie, /* The moxie processor. */ 364#define bfd_mach_moxie 1 365 bfd_arch_ft32, /* The ft32 processor. */ 366#define bfd_mach_ft32 1 367#define bfd_mach_ft32b 2 368 bfd_arch_mcore, 369 bfd_arch_mep, 370#define bfd_mach_mep 1 371#define bfd_mach_mep_h1 0x6831 372#define bfd_mach_mep_c5 0x6335 373 bfd_arch_metag, 374#define bfd_mach_metag 1 375 bfd_arch_ia64, /* HP/Intel ia64. */ 376#define bfd_mach_ia64_elf64 64 377#define bfd_mach_ia64_elf32 32 378 bfd_arch_ip2k, /* Ubicom IP2K microcontrollers. */ 379#define bfd_mach_ip2022 1 380#define bfd_mach_ip2022ext 2 381 bfd_arch_iq2000, /* Vitesse IQ2000. */ 382#define bfd_mach_iq2000 1 383#define bfd_mach_iq10 2 384 bfd_arch_bpf, /* Linux eBPF. */ 385#define bfd_mach_bpf 1 386 bfd_arch_epiphany, /* Adapteva EPIPHANY. */ 387#define bfd_mach_epiphany16 1 388#define bfd_mach_epiphany32 2 389 bfd_arch_mt, 390#define bfd_mach_ms1 1 391#define bfd_mach_mrisc2 2 392#define bfd_mach_ms2 3 393 bfd_arch_pj, 394 bfd_arch_avr, /* Atmel AVR microcontrollers. */ 395#define bfd_mach_avr1 1 396#define bfd_mach_avr2 2 397#define bfd_mach_avr25 25 398#define bfd_mach_avr3 3 399#define bfd_mach_avr31 31 400#define bfd_mach_avr35 35 401#define bfd_mach_avr4 4 402#define bfd_mach_avr5 5 403#define bfd_mach_avr51 51 404#define bfd_mach_avr6 6 405#define bfd_mach_avrtiny 100 406#define bfd_mach_avrxmega1 101 407#define bfd_mach_avrxmega2 102 408#define bfd_mach_avrxmega3 103 409#define bfd_mach_avrxmega4 104 410#define bfd_mach_avrxmega5 105 411#define bfd_mach_avrxmega6 106 412#define bfd_mach_avrxmega7 107 413 bfd_arch_bfin, /* ADI Blackfin. */ 414#define bfd_mach_bfin 1 415 bfd_arch_cr16, /* National Semiconductor CompactRISC (ie CR16). */ 416#define bfd_mach_cr16 1 417 bfd_arch_crx, /* National Semiconductor CRX. */ 418#define bfd_mach_crx 1 419 bfd_arch_cris, /* Axis CRIS. */ 420#define bfd_mach_cris_v0_v10 255 421#define bfd_mach_cris_v32 32 422#define bfd_mach_cris_v10_v32 1032 423 bfd_arch_riscv, 424#define bfd_mach_riscv32 132 425#define bfd_mach_riscv64 164 426 bfd_arch_rl78, 427#define bfd_mach_rl78 0x75 428 bfd_arch_rx, /* Renesas RX. */ 429#define bfd_mach_rx 0x75 430#define bfd_mach_rx_v2 0x76 431#define bfd_mach_rx_v3 0x77 432 bfd_arch_s390, /* IBM s390. */ 433#define bfd_mach_s390_31 31 434#define bfd_mach_s390_64 64 435 bfd_arch_score, /* Sunplus score. */ 436#define bfd_mach_score3 3 437#define bfd_mach_score7 7 438 bfd_arch_mmix, /* Donald Knuth's educational processor. */ 439 bfd_arch_xstormy16, 440#define bfd_mach_xstormy16 1 441 bfd_arch_msp430, /* Texas Instruments MSP430 architecture. */ 442#define bfd_mach_msp11 11 443#define bfd_mach_msp110 110 444#define bfd_mach_msp12 12 445#define bfd_mach_msp13 13 446#define bfd_mach_msp14 14 447#define bfd_mach_msp15 15 448#define bfd_mach_msp16 16 449#define bfd_mach_msp20 20 450#define bfd_mach_msp21 21 451#define bfd_mach_msp22 22 452#define bfd_mach_msp23 23 453#define bfd_mach_msp24 24 454#define bfd_mach_msp26 26 455#define bfd_mach_msp31 31 456#define bfd_mach_msp32 32 457#define bfd_mach_msp33 33 458#define bfd_mach_msp41 41 459#define bfd_mach_msp42 42 460#define bfd_mach_msp43 43 461#define bfd_mach_msp44 44 462#define bfd_mach_msp430x 45 463#define bfd_mach_msp46 46 464#define bfd_mach_msp47 47 465#define bfd_mach_msp54 54 466 bfd_arch_xc16x, /* Infineon's XC16X Series. */ 467#define bfd_mach_xc16x 1 468#define bfd_mach_xc16xl 2 469#define bfd_mach_xc16xs 3 470 bfd_arch_xgate, /* Freescale XGATE. */ 471#define bfd_mach_xgate 1 472 bfd_arch_xtensa, /* Tensilica's Xtensa cores. */ 473#define bfd_mach_xtensa 1 474 bfd_arch_z80, 475#define bfd_mach_gbz80 0 /* GameBoy Z80 (reduced instruction set) */ 476#define bfd_mach_z80strict 1 /* Z80 without undocumented opcodes. */ 477#define bfd_mach_z180 2 /* Z180: successor with additional instructions, but without halves of ix and iy */ 478#define bfd_mach_z80 3 /* Z80 with ixl, ixh, iyl, and iyh. */ 479#define bfd_mach_ez80_z80 4 /* eZ80 (successor of Z80 & Z180) in Z80 (16-bit address) mode */ 480#define bfd_mach_ez80_adl 5 /* eZ80 (successor of Z80 & Z180) in ADL (24-bit address) mode */ 481#define bfd_mach_z80full 7 /* Z80 with all undocumented instructions. */ 482#define bfd_mach_r800 11 /* R800: successor with multiplication. */ 483 bfd_arch_lm32, /* Lattice Mico32. */ 484#define bfd_mach_lm32 1 485 bfd_arch_microblaze,/* Xilinx MicroBlaze. */ 486 bfd_arch_tilepro, /* Tilera TILEPro. */ 487 bfd_arch_tilegx, /* Tilera TILE-Gx. */ 488#define bfd_mach_tilepro 1 489#define bfd_mach_tilegx 1 490#define bfd_mach_tilegx32 2 491 bfd_arch_aarch64, /* AArch64. */ 492#define bfd_mach_aarch64 0 493#define bfd_mach_aarch64_ilp32 32 494 bfd_arch_nios2, /* Nios II. */ 495#define bfd_mach_nios2 0 496#define bfd_mach_nios2r1 1 497#define bfd_mach_nios2r2 2 498 bfd_arch_visium, /* Visium. */ 499#define bfd_mach_visium 1 500 bfd_arch_wasm32, /* WebAssembly. */ 501#define bfd_mach_wasm32 1 502 bfd_arch_pru, /* PRU. */ 503#define bfd_mach_pru 0 504 bfd_arch_nfp, /* Netronome Flow Processor */ 505#define bfd_mach_nfp3200 0x3200 506#define bfd_mach_nfp6000 0x6000 507 bfd_arch_csky, /* C-SKY. */ 508#define bfd_mach_ck_unknown 0 509#define bfd_mach_ck510 1 510#define bfd_mach_ck610 2 511#define bfd_mach_ck801 3 512#define bfd_mach_ck802 4 513#define bfd_mach_ck803 5 514#define bfd_mach_ck807 6 515#define bfd_mach_ck810 7 516 bfd_arch_last 517 @}; 518@end example 519 520@subsection bfd_arch_info 521 522 523@strong{Description}@* 524This structure contains information on architectures for use 525within BFD. 526@example 527 528typedef struct bfd_arch_info 529@{ 530 int bits_per_word; 531 int bits_per_address; 532 int bits_per_byte; 533 enum bfd_architecture arch; 534 unsigned long mach; 535 const char *arch_name; 536 const char *printable_name; 537 unsigned int section_align_power; 538 /* TRUE if this is the default machine for the architecture. 539 The default arch should be the first entry for an arch so that 540 all the entries for that arch can be accessed via @code{next}. */ 541 bfd_boolean the_default; 542 const struct bfd_arch_info * (*compatible) (const struct bfd_arch_info *, 543 const struct bfd_arch_info *); 544 545 bfd_boolean (*scan) (const struct bfd_arch_info *, const char *); 546 547 /* Allocate via bfd_malloc and return a fill buffer of size COUNT. If 548 IS_BIGENDIAN is TRUE, the order of bytes is big endian. If CODE is 549 TRUE, the buffer contains code. */ 550 void *(*fill) (bfd_size_type count, bfd_boolean is_bigendian, 551 bfd_boolean code); 552 553 const struct bfd_arch_info *next; 554 555 /* On some architectures the offset for a relocation can point into 556 the middle of an instruction. This field specifies the maximum 557 offset such a relocation can have (in octets). This affects the 558 behaviour of the disassembler, since a value greater than zero 559 means that it may need to disassemble an instruction twice, once 560 to get its length and then a second time to display it. If the 561 value is negative then this has to be done for every single 562 instruction, regardless of the offset of the reloc. */ 563 signed int max_reloc_offset_into_insn; 564@} 565bfd_arch_info_type; 566 567@end example 568 569@findex bfd_printable_name 570@subsubsection @code{bfd_printable_name} 571@strong{Synopsis} 572@example 573const char *bfd_printable_name (bfd *abfd); 574@end example 575@strong{Description}@* 576Return a printable string representing the architecture and machine 577from the pointer to the architecture info structure. 578 579@findex bfd_scan_arch 580@subsubsection @code{bfd_scan_arch} 581@strong{Synopsis} 582@example 583const bfd_arch_info_type *bfd_scan_arch (const char *string); 584@end example 585@strong{Description}@* 586Figure out if BFD supports any cpu which could be described with 587the name @var{string}. Return a pointer to an @code{arch_info} 588structure if a machine is found, otherwise NULL. 589 590@findex bfd_arch_list 591@subsubsection @code{bfd_arch_list} 592@strong{Synopsis} 593@example 594const char **bfd_arch_list (void); 595@end example 596@strong{Description}@* 597Return a freshly malloced NULL-terminated vector of the names 598of all the valid BFD architectures. Do not modify the names. 599 600@findex bfd_arch_get_compatible 601@subsubsection @code{bfd_arch_get_compatible} 602@strong{Synopsis} 603@example 604const bfd_arch_info_type *bfd_arch_get_compatible 605 (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns); 606@end example 607@strong{Description}@* 608Determine whether two BFDs' architectures and machine types 609are compatible. Calculates the lowest common denominator 610between the two architectures and machine types implied by 611the BFDs and returns a pointer to an @code{arch_info} structure 612describing the compatible machine. 613 614@findex bfd_default_arch_struct 615@subsubsection @code{bfd_default_arch_struct} 616@strong{Description}@* 617The @code{bfd_default_arch_struct} is an item of 618@code{bfd_arch_info_type} which has been initialized to a fairly 619generic state. A BFD starts life by pointing to this 620structure, until the correct back end has determined the real 621architecture of the file. 622@example 623extern const bfd_arch_info_type bfd_default_arch_struct; 624@end example 625 626@findex bfd_set_arch_info 627@subsubsection @code{bfd_set_arch_info} 628@strong{Synopsis} 629@example 630void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg); 631@end example 632@strong{Description}@* 633Set the architecture info of @var{abfd} to @var{arg}. 634 635@findex bfd_default_set_arch_mach 636@subsubsection @code{bfd_default_set_arch_mach} 637@strong{Synopsis} 638@example 639bfd_boolean bfd_default_set_arch_mach 640 (bfd *abfd, enum bfd_architecture arch, unsigned long mach); 641@end example 642@strong{Description}@* 643Set the architecture and machine type in BFD @var{abfd} 644to @var{arch} and @var{mach}. Find the correct 645pointer to a structure and insert it into the @code{arch_info} 646pointer. 647 648@findex bfd_get_arch 649@subsubsection @code{bfd_get_arch} 650@strong{Synopsis} 651@example 652enum bfd_architecture bfd_get_arch (const bfd *abfd); 653@end example 654@strong{Description}@* 655Return the enumerated type which describes the BFD @var{abfd}'s 656architecture. 657 658@findex bfd_get_mach 659@subsubsection @code{bfd_get_mach} 660@strong{Synopsis} 661@example 662unsigned long bfd_get_mach (const bfd *abfd); 663@end example 664@strong{Description}@* 665Return the long type which describes the BFD @var{abfd}'s 666machine. 667 668@findex bfd_arch_bits_per_byte 669@subsubsection @code{bfd_arch_bits_per_byte} 670@strong{Synopsis} 671@example 672unsigned int bfd_arch_bits_per_byte (const bfd *abfd); 673@end example 674@strong{Description}@* 675Return the number of bits in one of the BFD @var{abfd}'s 676architecture's bytes. 677 678@findex bfd_arch_bits_per_address 679@subsubsection @code{bfd_arch_bits_per_address} 680@strong{Synopsis} 681@example 682unsigned int bfd_arch_bits_per_address (const bfd *abfd); 683@end example 684@strong{Description}@* 685Return the number of bits in one of the BFD @var{abfd}'s 686architecture's addresses. 687 688@findex bfd_default_compatible 689@subsubsection @code{bfd_default_compatible} 690@strong{Synopsis} 691@example 692const bfd_arch_info_type *bfd_default_compatible 693 (const bfd_arch_info_type *a, const bfd_arch_info_type *b); 694@end example 695@strong{Description}@* 696The default function for testing for compatibility. 697 698@findex bfd_default_scan 699@subsubsection @code{bfd_default_scan} 700@strong{Synopsis} 701@example 702bfd_boolean bfd_default_scan 703 (const struct bfd_arch_info *info, const char *string); 704@end example 705@strong{Description}@* 706The default function for working out whether this is an 707architecture hit and a machine hit. 708 709@findex bfd_get_arch_info 710@subsubsection @code{bfd_get_arch_info} 711@strong{Synopsis} 712@example 713const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd); 714@end example 715@strong{Description}@* 716Return the architecture info struct in @var{abfd}. 717 718@findex bfd_lookup_arch 719@subsubsection @code{bfd_lookup_arch} 720@strong{Synopsis} 721@example 722const bfd_arch_info_type *bfd_lookup_arch 723 (enum bfd_architecture arch, unsigned long machine); 724@end example 725@strong{Description}@* 726Look for the architecture info structure which matches the 727arguments @var{arch} and @var{machine}. A machine of 0 matches the 728machine/architecture structure which marks itself as the 729default. 730 731@findex bfd_printable_arch_mach 732@subsubsection @code{bfd_printable_arch_mach} 733@strong{Synopsis} 734@example 735const char *bfd_printable_arch_mach 736 (enum bfd_architecture arch, unsigned long machine); 737@end example 738@strong{Description}@* 739Return a printable string representing the architecture and 740machine type. 741 742This routine is depreciated. 743 744@findex bfd_octets_per_byte 745@subsubsection @code{bfd_octets_per_byte} 746@strong{Synopsis} 747@example 748unsigned int bfd_octets_per_byte (const bfd *abfd, 749 const asection *sec); 750@end example 751@strong{Description}@* 752Return the number of octets (8-bit quantities) per target byte 753(minimum addressable unit). In most cases, this will be one, but some 754DSP targets have 16, 32, or even 48 bits per byte. 755 756@findex bfd_arch_mach_octets_per_byte 757@subsubsection @code{bfd_arch_mach_octets_per_byte} 758@strong{Synopsis} 759@example 760unsigned int bfd_arch_mach_octets_per_byte 761 (enum bfd_architecture arch, unsigned long machine); 762@end example 763@strong{Description}@* 764See bfd_octets_per_byte. 765 766This routine is provided for those cases where a bfd * is not 767available 768 769@findex bfd_arch_default_fill 770@subsubsection @code{bfd_arch_default_fill} 771@strong{Synopsis} 772@example 773void *bfd_arch_default_fill (bfd_size_type count, 774 bfd_boolean is_bigendian, 775 bfd_boolean code); 776@end example 777@strong{Description}@* 778Allocate via bfd_malloc and return a fill buffer of size COUNT. 779If IS_BIGENDIAN is TRUE, the order of bytes is big endian. If 780CODE is TRUE, the buffer contains code. 781 782