1/* 2 * CDDL HEADER START 3 * 4 * The contents of this file are subject to the terms of the 5 * Common Development and Distribution License, Version 1.0 only 6 * (the "License"). You may not use this file except in compliance 7 * with the License. 8 * 9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 10 * or http://www.opensolaris.org/os/licensing. 11 * See the License for the specific language governing permissions 12 * and limitations under the License. 13 * 14 * When distributing Covered Code, include this CDDL HEADER in each 15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 16 * If applicable, add the following below this CDDL HEADER, with the 17 * fields enclosed by brackets "[]" replaced with your own identifying 18 * information: Portions Copyright [yyyy] [name of copyright owner] 19 * 20 * CDDL HEADER END 21 * 22 * $FreeBSD$ 23 */ 24/* 25 * Copyright 2004 Sun Microsystems, Inc. All rights reserved. 26 * Use is subject to license terms. 27 */ 28 29#define _ASM 30#define _LOCORE 31#define LOCORE 32 33#include <sys/cpuvar_defs.h> 34#include <sys/dtrace.h> 35 36#include <machine/asm.h> 37 38#include "assym.s" 39 40/* 41void dtrace_membar_producer(void) 42*/ 43ENTRY(dtrace_membar_producer) 44 RET 45 46/* 47void dtrace_membar_consumer(void) 48*/ 49ENTRY(dtrace_membar_consumer) 50 RET 51 52/* 53dtrace_icookie_t dtrace_interrupt_disable(void) 54*/ 55ENTRY(dtrace_interrupt_disable) 56 mrs r0, cpsr 57 mov r1, r0 58 orr r1, r1, #(I32_bit|F32_bit) 59 msr cpsr_c, r1 60 RET 61/* 62void dtrace_interrupt_enable(dtrace_icookie_t cookie) 63*/ 64ENTRY(dtrace_interrupt_enable) 65 and r0, r0, #(I32_bit|F32_bit) 66 mrs r1, cpsr 67 bic r1, r1, #(I32_bit|F32_bit) 68 orr r1, r1, r0 69 msr cpsr_c, r1 70 RET 71 72/* 73uint32_t dtrace_cas32(uint32_t *target, uint32_t cmp, uint32_t new) 74XXX: just disable interrupts for now, add proper implementation for 75ARMv6/ARMv7 later 76*/ 77ENTRY_NP(dtrace_casptr) 78ENTRY(dtrace_cas32) 79 stmfd sp!, {r4, r5} 80 81 mrs r3, cpsr 82 mov r4, r3 83 orr r4, r4, #(I32_bit|F32_bit) 84 msr cpsr_c, r4 85 86 ldr r5, [r0] 87 cmp r5, r2 88 movne r0, #0 89 bne 2f 90 91 str r2, [r0] 92 mov r0, #1 93 942: 95 msr cpsr_c, r3 96 ldmfd sp!, {r4, r5} 97 RET 98 99/* 100uint8_t 101dtrace_fuword8_nocheck(void *addr) 102*/ 103ENTRY(dtrace_fuword8_nocheck) 104 ldrb r3, [r0] 105 mov r0, r3 106 RET 107 108/* 109uint16_t 110dtrace_fuword16_nocheck(void *addr) 111*/ 112ENTRY(dtrace_fuword16_nocheck) 113 ldrh r3, [r0] 114 mov r0, r3 115 RET 116 117/* 118uint32_t 119dtrace_fuword32_nocheck(void *addr) 120*/ 121ENTRY(dtrace_fuword32_nocheck) 122 ldr r3, [r0] 123 mov r0, r3 124 RET 125 126/* 127uint64_t 128dtrace_fuword64_nocheck(void *addr) 129XXX: add byteorder check 130*/ 131ENTRY(dtrace_fuword64_nocheck) 132 ldm r0, {r2, r3} 133 134 mov r0, r2 135 mov r1, r3 136#if 0 137/* little endian */ 138 mov r0, r2 139 mov r1, r3 140/* big endian */ 141 mov r0, r3 142 mov r1, r2 143#endif 144 RET 145 146/* 147void 148dtrace_copy(uintptr_t uaddr, uintptr_t kaddr, size_t size) 149*/ 150ENTRY(dtrace_copy) 151 stmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 152 teq r2, #0x00000000 153 mov r5, #0x00000000 154 beq 2f 155 1561: ldrb r4, [r0], #0x0001 157 add r5, r5, #0x00000001 158 strb r4, [r1], #0x0001 159 teqne r5, r2 160 bne 1b 161 1622: ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 163 RET 164 165 166/* 167void 168dtrace_copystr(uintptr_t uaddr, uintptr_t kaddr, size_t size, 169 volatile uint16_t *flags) 170XXX: Check for flags? 171*/ 172ENTRY(dtrace_copystr) 173 stmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 174 teq r2, #0x00000000 175 mov r5, #0x00000000 176 beq 2f 177 1781: ldrb r4, [r0], #0x0001 179 add r5, r5, #0x00000001 180 teq r4, #0x00000000 181 strb r4, [r1], #0x0001 182 teqne r5, r2 183 bne 1b 184 1852: ldmfd sp!, {r4-r5} /* stack is 8 byte aligned */ 186 RET 187 188 189/* 190void dtrace_invop_init(void) 191*/ 192ENTRY(dtrace_invop_init) 193 RET 194 195/* 196void dtrace_invop_uninit(void) 197*/ 198ENTRY(dtrace_invop_uninit) 199 RET 200 201/* 202void 203vpanic(const char *format, va_list alist) 204*/ 205ENTRY(vpanic) /* Initial stack layout: */ 206vpanic_common: 207 RET 208 209/* 210void 211dtrace_vpanic(const char *format, va_list alist) 212*/ 213ENTRY(dtrace_vpanic) /* Initial stack layout: */ 214 RET 215 216/* 217uintptr_t 218dtrace_caller(int aframes) 219*/ 220ENTRY(dtrace_caller) 221 mov r0, #-1 222 RET 223