1 /* $NetBSD: dtrace_subr.c,v 1.10 2018/06/05 12:04:19 christos Exp $ */ 2 3 /* 4 * CDDL HEADER START 5 * 6 * The contents of this file are subject to the terms of the 7 * Common Development and Distribution License, Version 1.0 only 8 * (the "License"). You may not use this file except in compliance 9 * with the License. 10 * 11 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 12 * or http://www.opensolaris.org/os/licensing. 13 * See the License for the specific language governing permissions 14 * and limitations under the License. 15 * 16 * When distributing Covered Code, include this CDDL HEADER in each 17 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 18 * If applicable, add the following below this CDDL HEADER, with the 19 * fields enclosed by brackets "[]" replaced with your own identifying 20 * information: Portions Copyright [yyyy] [name of copyright owner] 21 * 22 * CDDL HEADER END 23 * 24 * $FreeBSD: head/sys/cddl/dev/dtrace/amd64/dtrace_subr.c 313850 2017-02-17 03:27:20Z markj $ 25 * 26 */ 27 /* 28 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 29 * Use is subject to license terms. 30 */ 31 32 /* 33 * Copyright (c) 2011, Joyent, Inc. All rights reserved. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/types.h> 39 #include <sys/kernel.h> 40 #include <sys/malloc.h> 41 #include <sys/kmem.h> 42 #include <sys/xcall.h> 43 #include <sys/cpu.h> 44 #include <sys/cpuvar.h> 45 #include <sys/dtrace_impl.h> 46 #include <sys/dtrace_bsd.h> 47 #include <machine/frame.h> 48 #include <machine/cpu_counter.h> 49 #include <machine/cpufunc.h> 50 51 extern uintptr_t kernelbase; 52 53 int dtrace_invop(uintptr_t, struct trapframe *, uintptr_t); 54 55 typedef struct dtrace_invop_hdlr { 56 int (*dtih_func)(uintptr_t, struct trapframe *, uintptr_t); 57 struct dtrace_invop_hdlr *dtih_next; 58 } dtrace_invop_hdlr_t; 59 60 dtrace_invop_hdlr_t *dtrace_invop_hdlr; 61 62 void dtrace_gethrtime_init(void *); 63 void dtrace_getnanotime(struct timespec *); 64 65 int 66 dtrace_invop(uintptr_t addr, struct trapframe *frame, uintptr_t eax) 67 { 68 dtrace_invop_hdlr_t *hdlr; 69 int rval; 70 71 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 72 if ((rval = hdlr->dtih_func(addr, frame, eax)) != 0) 73 return (rval); 74 75 return (0); 76 } 77 78 void 79 dtrace_invop_add(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 80 { 81 dtrace_invop_hdlr_t *hdlr; 82 83 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 84 hdlr->dtih_func = func; 85 hdlr->dtih_next = dtrace_invop_hdlr; 86 dtrace_invop_hdlr = hdlr; 87 } 88 89 void 90 dtrace_invop_remove(int (*func)(uintptr_t, struct trapframe *, uintptr_t)) 91 { 92 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 93 94 for (;;) { 95 if (hdlr == NULL) 96 panic("attempt to remove non-existent invop handler"); 97 98 if (hdlr->dtih_func == func) 99 break; 100 101 prev = hdlr; 102 hdlr = hdlr->dtih_next; 103 } 104 105 if (prev == NULL) { 106 ASSERT(dtrace_invop_hdlr == hdlr); 107 dtrace_invop_hdlr = hdlr->dtih_next; 108 } else { 109 ASSERT(dtrace_invop_hdlr != hdlr); 110 prev->dtih_next = hdlr->dtih_next; 111 } 112 113 kmem_free(hdlr, sizeof (dtrace_invop_hdlr_t)); 114 } 115 116 /*ARGSUSED*/ 117 void 118 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 119 { 120 (*func)(0, kernelbase); 121 } 122 123 static void 124 xcall_func(void *arg0, void *arg1) 125 { 126 dtrace_xcall_t func = arg0; 127 128 (*func)(arg1); 129 } 130 131 void 132 dtrace_xcall(processorid_t cpu, dtrace_xcall_t func, void *arg) 133 { 134 uint64_t where; 135 136 if (cpu == DTRACE_CPUALL) { 137 where = xc_broadcast(0, xcall_func, func, arg); 138 } else { 139 struct cpu_info *cinfo = cpu_lookup(cpu); 140 141 KASSERT(cinfo != NULL); 142 where = xc_unicast(0, xcall_func, func, arg, cinfo); 143 } 144 xc_wait(where); 145 146 /* XXX Q. Do we really need the other cpus to wait also? 147 * (see solaris:xc_sync()) 148 */ 149 } 150 151 static void 152 dtrace_sync_func(void) 153 { 154 } 155 156 void 157 dtrace_sync(void) 158 { 159 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 160 } 161 162 #ifdef notyet 163 void 164 dtrace_safe_synchronous_signal(void) 165 { 166 kthread_t *t = curthread; 167 struct regs *rp = lwptoregs(ttolwp(t)); 168 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 169 170 ASSERT(t->t_dtrace_on); 171 172 /* 173 * If we're not in the range of scratch addresses, we're not actually 174 * tracing user instructions so turn off the flags. If the instruction 175 * we copied out caused a synchonous trap, reset the pc back to its 176 * original value and turn off the flags. 177 */ 178 if (rp->r_pc < t->t_dtrace_scrpc || 179 rp->r_pc > t->t_dtrace_astpc + isz) { 180 t->t_dtrace_ft = 0; 181 } else if (rp->r_pc == t->t_dtrace_scrpc || 182 rp->r_pc == t->t_dtrace_astpc) { 183 rp->r_pc = t->t_dtrace_pc; 184 t->t_dtrace_ft = 0; 185 } 186 } 187 188 int 189 dtrace_safe_defer_signal(void) 190 { 191 kthread_t *t = curthread; 192 struct regs *rp = lwptoregs(ttolwp(t)); 193 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 194 195 ASSERT(t->t_dtrace_on); 196 197 /* 198 * If we're not in the range of scratch addresses, we're not actually 199 * tracing user instructions so turn off the flags. 200 */ 201 if (rp->r_pc < t->t_dtrace_scrpc || 202 rp->r_pc > t->t_dtrace_astpc + isz) { 203 t->t_dtrace_ft = 0; 204 return (0); 205 } 206 207 /* 208 * If we have executed the original instruction, but we have performed 209 * neither the jmp back to t->t_dtrace_npc nor the clean up of any 210 * registers used to emulate %rip-relative instructions in 64-bit mode, 211 * we'll save ourselves some effort by doing that here and taking the 212 * signal right away. We detect this condition by seeing if the program 213 * counter is the range [scrpc + isz, astpc). 214 */ 215 if (rp->r_pc >= t->t_dtrace_scrpc + isz && 216 rp->r_pc < t->t_dtrace_astpc) { 217 #ifdef __amd64 218 /* 219 * If there is a scratch register and we're on the 220 * instruction immediately after the modified instruction, 221 * restore the value of that scratch register. 222 */ 223 if (t->t_dtrace_reg != 0 && 224 rp->r_pc == t->t_dtrace_scrpc + isz) { 225 switch (t->t_dtrace_reg) { 226 case REG_RAX: 227 rp->r_rax = t->t_dtrace_regv; 228 break; 229 case REG_RCX: 230 rp->r_rcx = t->t_dtrace_regv; 231 break; 232 case REG_R8: 233 rp->r_r8 = t->t_dtrace_regv; 234 break; 235 case REG_R9: 236 rp->r_r9 = t->t_dtrace_regv; 237 break; 238 } 239 } 240 #endif 241 rp->r_pc = t->t_dtrace_npc; 242 t->t_dtrace_ft = 0; 243 return (0); 244 } 245 246 /* 247 * Otherwise, make sure we'll return to the kernel after executing 248 * the copied out instruction and defer the signal. 249 */ 250 if (!t->t_dtrace_step) { 251 ASSERT(rp->r_pc < t->t_dtrace_astpc); 252 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 253 t->t_dtrace_step = 1; 254 } 255 256 t->t_dtrace_ast = 1; 257 258 return (1); 259 } 260 #endif 261 262 #ifdef __NetBSD__ 263 static __inline uint64_t 264 dtrace_rdtsc(void) 265 { 266 uint32_t hi, lo; 267 268 __asm volatile("rdtsc" : "=d" (hi), "=a" (lo)); 269 return (((uint64_t)hi << 32) | (uint64_t) lo); 270 } 271 #define rdtsc dtrace_rdtsc 272 #endif 273 274 #ifdef notyet 275 static int64_t tgt_cpu_tsc; 276 static int64_t hst_cpu_tsc; 277 #endif 278 static int64_t tsc_skew[MAXCPUS]; 279 static uint64_t nsec_scale; 280 281 /* See below for the explanation of this macro. */ 282 #define SCALE_SHIFT 28 283 284 #ifdef notyet 285 static void 286 dtrace_gethrtime_init_sync(void *arg) 287 { 288 #ifdef CHECK_SYNC 289 /* 290 * Delay this function from returning on one 291 * of the CPUs to check that the synchronisation 292 * works. 293 */ 294 uintptr_t cpu = (uintptr_t) arg; 295 296 if (cpu == cpu_number()) { 297 int i; 298 for (i = 0; i < 1000000000; i++) 299 tgt_cpu_tsc = rdtsc(); 300 tgt_cpu_tsc = 0; 301 } 302 #endif 303 } 304 305 static void 306 dtrace_gethrtime_init_cpu(void *arg) 307 { 308 uintptr_t cpu = (uintptr_t) arg; 309 310 if (cpu == cpu_number()) 311 tgt_cpu_tsc = rdtsc(); 312 else 313 hst_cpu_tsc = rdtsc(); 314 } 315 #endif 316 317 void 318 dtrace_gethrtime_init(void *arg) 319 { 320 uint64_t tsc_f; 321 CPU_INFO_ITERATOR cpuind; 322 struct cpu_info *cinfo = curcpu(); 323 cpuid_t cur_cpuid = cpu_number(); /* current cpu id */ 324 325 /* 326 * Get TSC frequency known at this moment. 327 * This should be constant if TSC is invariant. 328 * Otherwise tick->time conversion will be inaccurate, but 329 * will preserve monotonic property of TSC. 330 */ 331 tsc_f = cpu_frequency(cinfo); 332 333 /* 334 * The following line checks that nsec_scale calculated below 335 * doesn't overflow 32-bit unsigned integer, so that it can multiply 336 * another 32-bit integer without overflowing 64-bit. 337 * Thus minimum supported TSC frequency is 62.5MHz. 338 */ 339 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT))); 340 341 /* 342 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 343 * as possible. 344 * 2^28 factor was chosen quite arbitrarily from practical 345 * considerations: 346 * - it supports TSC frequencies as low as 62.5MHz (see above); 347 * - it provides quite good precision (e < 0.01%) up to THz 348 * (terahertz) values; 349 */ 350 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 351 352 /* The current CPU is the reference one. */ 353 tsc_skew[cur_cpuid] = 0; 354 355 for (CPU_INFO_FOREACH(cpuind, cinfo)) { 356 /* use skew relative to cpu 0 */ 357 tsc_skew[cpu_index(cinfo)] = cinfo->ci_data.cpu_cc_skew; 358 } 359 } 360 361 /* 362 * DTrace needs a high resolution time function which can 363 * be called from a probe context and guaranteed not to have 364 * instrumented with probes itself. 365 * 366 * Returns nanoseconds since boot. 367 */ 368 uint64_t 369 dtrace_gethrtime() 370 { 371 uint64_t tsc; 372 uint32_t lo; 373 uint32_t hi; 374 375 /* 376 * We split TSC value into lower and higher 32-bit halves and separately 377 * scale them with nsec_scale, then we scale them down by 2^28 378 * (see nsec_scale calculations) taking into account 32-bit shift of 379 * the higher half and finally add. 380 */ 381 tsc = rdtsc() + tsc_skew[cpu_number()]; 382 lo = tsc; 383 hi = tsc >> 32; 384 return (((lo * nsec_scale) >> SCALE_SHIFT) + 385 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 386 } 387 388 uint64_t 389 dtrace_gethrestime(void) 390 { 391 struct timespec current_time; 392 393 dtrace_getnanotime(¤t_time); 394 395 return (current_time.tv_sec * 1000000000ULL + current_time.tv_nsec); 396 } 397 398 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */ 399 int 400 dtrace_trap(struct trapframe *frame, u_int type) 401 { 402 bool nofault; 403 cpuid_t cpuid = cpu_number(); /* current cpu id */ 404 405 /* 406 * A trap can occur while DTrace executes a probe. Before 407 * executing the probe, DTrace blocks re-scheduling and sets 408 * a flag in it's per-cpu flags to indicate that it doesn't 409 * want to fault. On returning from the the probe, the no-fault 410 * flag is cleared and finally re-scheduling is enabled. 411 * 412 * Check if DTrace has enabled 'no-fault' mode: 413 * 414 */ 415 nofault = (cpu_core[cpuid].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0; 416 if (nofault) { 417 KASSERTMSG((read_rflags() & PSL_I) == 0, "interrupts enabled"); 418 419 /* 420 * There are only a couple of trap types that are expected. 421 * All the rest will be handled in the usual way. 422 */ 423 switch (type) { 424 /* General protection fault. */ 425 case T_PROTFLT: 426 /* Flag an illegal operation. */ 427 cpu_core[cpuid].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 428 429 /* 430 * Offset the instruction pointer to the instruction 431 * following the one causing the fault. 432 */ 433 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 434 return (1); 435 /* Page fault. */ 436 case T_PAGEFLT: 437 /* Flag a bad address. */ 438 cpu_core[cpuid].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 439 cpu_core[cpuid].cpuc_dtrace_illval = rcr2(); 440 441 /* 442 * Offset the instruction pointer to the instruction 443 * following the one causing the fault. 444 */ 445 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 446 return (1); 447 default: 448 /* Handle all other traps in the usual way. */ 449 break; 450 } 451 } 452 453 /* Handle the trap in the usual way. */ 454 return (0); 455 } 456