1 /* $NetBSD: dtrace_subr.c,v 1.5 2011/08/31 21:57:16 christos Exp $ */ 2 3 /* 4 * CDDL HEADER START 5 * 6 * The contents of this file are subject to the terms of the 7 * Common Development and Distribution License, Version 1.0 only 8 * (the "License"). You may not use this file except in compliance 9 * with the License. 10 * 11 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE 12 * or http://www.opensolaris.org/os/licensing. 13 * See the License for the specific language governing permissions 14 * and limitations under the License. 15 * 16 * When distributing Covered Code, include this CDDL HEADER in each 17 * file and include the License file at usr/src/OPENSOLARIS.LICENSE. 18 * If applicable, add the following below this CDDL HEADER, with the 19 * fields enclosed by brackets "[]" replaced with your own identifying 20 * information: Portions Copyright [yyyy] [name of copyright owner] 21 * 22 * CDDL HEADER END 23 * 24 * $FreeBSD: src/sys/cddl/dev/dtrace/amd64/dtrace_subr.c,v 1.3.2.1 2009/08/03 08:13:06 kensmith Exp $ 25 * 26 */ 27 /* 28 * Copyright 2005 Sun Microsystems, Inc. All rights reserved. 29 * Use is subject to license terms. 30 */ 31 32 #include <sys/param.h> 33 #include <sys/systm.h> 34 #include <sys/types.h> 35 #include <sys/kernel.h> 36 #include <sys/malloc.h> 37 #include <sys/kmem.h> 38 #include <sys/xcall.h> 39 #include <sys/cpu.h> 40 #include <sys/cpuvar.h> 41 //#include <sys/smp.h> 42 #include <sys/dtrace_impl.h> 43 #include <sys/dtrace_bsd.h> 44 #include <machine/frame.h> 45 #include <machine/cpu_counter.h> 46 #include <uvm/uvm_pglist.h> 47 #include <uvm/uvm_prot.h> 48 #include <uvm/uvm_pmap.h> 49 50 extern uintptr_t kernelbase; 51 extern uintptr_t dtrace_in_probe_addr; 52 extern int dtrace_in_probe; 53 54 int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t); 55 56 typedef struct dtrace_invop_hdlr { 57 int (*dtih_func)(uintptr_t, uintptr_t *, uintptr_t); 58 struct dtrace_invop_hdlr *dtih_next; 59 } dtrace_invop_hdlr_t; 60 61 dtrace_invop_hdlr_t *dtrace_invop_hdlr; 62 void dtrace_gethrtime_init(void *); 63 64 65 int 66 dtrace_invop(uintptr_t addr, uintptr_t *stack, uintptr_t eax) 67 { 68 dtrace_invop_hdlr_t *hdlr; 69 int rval; 70 71 for (hdlr = dtrace_invop_hdlr; hdlr != NULL; hdlr = hdlr->dtih_next) 72 if ((rval = hdlr->dtih_func(addr, stack, eax)) != 0) 73 return (rval); 74 75 return (0); 76 } 77 78 void 79 dtrace_invop_add(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 80 { 81 dtrace_invop_hdlr_t *hdlr; 82 83 hdlr = kmem_alloc(sizeof (dtrace_invop_hdlr_t), KM_SLEEP); 84 hdlr->dtih_func = func; 85 hdlr->dtih_next = dtrace_invop_hdlr; 86 dtrace_invop_hdlr = hdlr; 87 } 88 89 void 90 dtrace_invop_remove(int (*func)(uintptr_t, uintptr_t *, uintptr_t)) 91 { 92 dtrace_invop_hdlr_t *hdlr = dtrace_invop_hdlr, *prev = NULL; 93 94 for (;;) { 95 if (hdlr == NULL) 96 panic("attempt to remove non-existent invop handler"); 97 98 if (hdlr->dtih_func == func) 99 break; 100 101 prev = hdlr; 102 hdlr = hdlr->dtih_next; 103 } 104 105 if (prev == NULL) { 106 ASSERT(dtrace_invop_hdlr == hdlr); 107 dtrace_invop_hdlr = hdlr->dtih_next; 108 } else { 109 ASSERT(dtrace_invop_hdlr != hdlr); 110 prev->dtih_next = hdlr->dtih_next; 111 } 112 113 kmem_free(hdlr, sizeof (dtrace_invop_hdlr_t)); 114 } 115 116 /*ARGSUSED*/ 117 void 118 dtrace_toxic_ranges(void (*func)(uintptr_t base, uintptr_t limit)) 119 { 120 (*func)(0, kernelbase); 121 } 122 123 static void 124 xcall_func(void *arg0, void *arg1) 125 { 126 dtrace_xcall_t func = arg0; 127 128 (*func)(arg1); 129 } 130 131 void 132 dtrace_xcall(processorid_t xcpu, dtrace_xcall_t func, void *arg) 133 { 134 uint64_t where; 135 136 if (xcpu == DTRACE_CPUALL) { 137 where = xc_broadcast(0, xcall_func, func, arg); 138 } else { 139 struct cpu_info *cinfo = cpu_lookup(cpu); 140 141 KASSERT(cinfo != NULL); 142 where = xc_unicast(0, xcall_func, func, arg, cinfo); 143 } 144 xc_wait(where); 145 146 /* XXX Q. Do we really need the other cpus to wait also? 147 * (see solaris:xc_sync()) 148 */ 149 } 150 151 static void 152 dtrace_sync_func(void) 153 { 154 } 155 156 void 157 dtrace_sync(void) 158 { 159 dtrace_xcall(DTRACE_CPUALL, (dtrace_xcall_t)dtrace_sync_func, NULL); 160 } 161 162 #ifdef notyet 163 int (*dtrace_fasttrap_probe_ptr)(struct regs *); 164 int (*dtrace_pid_probe_ptr)(struct regs *); 165 int (*dtrace_return_probe_ptr)(struct regs *); 166 167 void 168 dtrace_user_probe(struct regs *rp, caddr_t addr, processorid_t cpuid) 169 { 170 krwlock_t *rwp; 171 proc_t *p = curproc; 172 extern void trap(struct regs *, caddr_t, processorid_t); 173 174 if (USERMODE(rp->r_cs) || (rp->r_ps & PS_VM)) { 175 if (curthread->t_cred != p->p_cred) { 176 cred_t *oldcred = curthread->t_cred; 177 /* 178 * DTrace accesses t_cred in probe context. t_cred 179 * must always be either NULL, or point to a valid, 180 * allocated cred structure. 181 */ 182 curthread->t_cred = crgetcred(); 183 crfree(oldcred); 184 } 185 } 186 187 if (rp->r_trapno == T_DTRACE_RET) { 188 uint8_t step = curthread->t_dtrace_step; 189 uint8_t ret = curthread->t_dtrace_ret; 190 uintptr_t npc = curthread->t_dtrace_npc; 191 192 if (curthread->t_dtrace_ast) { 193 aston(curthread); 194 curthread->t_sig_check = 1; 195 } 196 197 /* 198 * Clear all user tracing flags. 199 */ 200 curthread->t_dtrace_ft = 0; 201 202 /* 203 * If we weren't expecting to take a return probe trap, kill 204 * the process as though it had just executed an unassigned 205 * trap instruction. 206 */ 207 if (step == 0) { 208 tsignal(curthread, SIGILL); 209 return; 210 } 211 212 /* 213 * If we hit this trap unrelated to a return probe, we're 214 * just here to reset the AST flag since we deferred a signal 215 * until after we logically single-stepped the instruction we 216 * copied out. 217 */ 218 if (ret == 0) { 219 rp->r_pc = npc; 220 return; 221 } 222 223 /* 224 * We need to wait until after we've called the 225 * dtrace_return_probe_ptr function pointer to set %pc. 226 */ 227 rwp = &CPU->cpu_ft_lock; 228 rw_enter(rwp, RW_READER); 229 if (dtrace_return_probe_ptr != NULL) 230 (void) (*dtrace_return_probe_ptr)(rp); 231 rw_exit(rwp); 232 rp->r_pc = npc; 233 234 } else if (rp->r_trapno == T_DTRACE_PROBE) { 235 rwp = &CPU->cpu_ft_lock; 236 rw_enter(rwp, RW_READER); 237 if (dtrace_fasttrap_probe_ptr != NULL) 238 (void) (*dtrace_fasttrap_probe_ptr)(rp); 239 rw_exit(rwp); 240 241 } else if (rp->r_trapno == T_BPTFLT) { 242 uint8_t instr; 243 rwp = &CPU->cpu_ft_lock; 244 245 /* 246 * The DTrace fasttrap provider uses the breakpoint trap 247 * (int 3). We let DTrace take the first crack at handling 248 * this trap; if it's not a probe that DTrace knowns about, 249 * we call into the trap() routine to handle it like a 250 * breakpoint placed by a conventional debugger. 251 */ 252 rw_enter(rwp, RW_READER); 253 if (dtrace_pid_probe_ptr != NULL && 254 (*dtrace_pid_probe_ptr)(rp) == 0) { 255 rw_exit(rwp); 256 return; 257 } 258 rw_exit(rwp); 259 260 /* 261 * If the instruction that caused the breakpoint trap doesn't 262 * look like an int 3 anymore, it may be that this tracepoint 263 * was removed just after the user thread executed it. In 264 * that case, return to user land to retry the instuction. 265 */ 266 if (fuword8((void *)(rp->r_pc - 1), &instr) == 0 && 267 instr != FASTTRAP_INSTR) { 268 rp->r_pc--; 269 return; 270 } 271 272 trap(rp, addr, cpuid); 273 274 } else { 275 trap(rp, addr, cpuid); 276 } 277 } 278 279 void 280 dtrace_safe_synchronous_signal(void) 281 { 282 kthread_t *t = curthread; 283 struct regs *rp = lwptoregs(ttolwp(t)); 284 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 285 286 ASSERT(t->t_dtrace_on); 287 288 /* 289 * If we're not in the range of scratch addresses, we're not actually 290 * tracing user instructions so turn off the flags. If the instruction 291 * we copied out caused a synchonous trap, reset the pc back to its 292 * original value and turn off the flags. 293 */ 294 if (rp->r_pc < t->t_dtrace_scrpc || 295 rp->r_pc > t->t_dtrace_astpc + isz) { 296 t->t_dtrace_ft = 0; 297 } else if (rp->r_pc == t->t_dtrace_scrpc || 298 rp->r_pc == t->t_dtrace_astpc) { 299 rp->r_pc = t->t_dtrace_pc; 300 t->t_dtrace_ft = 0; 301 } 302 } 303 304 int 305 dtrace_safe_defer_signal(void) 306 { 307 kthread_t *t = curthread; 308 struct regs *rp = lwptoregs(ttolwp(t)); 309 size_t isz = t->t_dtrace_npc - t->t_dtrace_pc; 310 311 ASSERT(t->t_dtrace_on); 312 313 /* 314 * If we're not in the range of scratch addresses, we're not actually 315 * tracing user instructions so turn off the flags. 316 */ 317 if (rp->r_pc < t->t_dtrace_scrpc || 318 rp->r_pc > t->t_dtrace_astpc + isz) { 319 t->t_dtrace_ft = 0; 320 return (0); 321 } 322 323 /* 324 * If we've executed the original instruction, but haven't performed 325 * the jmp back to t->t_dtrace_npc or the clean up of any registers 326 * used to emulate %rip-relative instructions in 64-bit mode, do that 327 * here and take the signal right away. We detect this condition by 328 * seeing if the program counter is the range [scrpc + isz, astpc). 329 */ 330 if (t->t_dtrace_astpc - rp->r_pc < 331 t->t_dtrace_astpc - t->t_dtrace_scrpc - isz) { 332 #ifdef __amd64 333 /* 334 * If there is a scratch register and we're on the 335 * instruction immediately after the modified instruction, 336 * restore the value of that scratch register. 337 */ 338 if (t->t_dtrace_reg != 0 && 339 rp->r_pc == t->t_dtrace_scrpc + isz) { 340 switch (t->t_dtrace_reg) { 341 case REG_RAX: 342 rp->r_rax = t->t_dtrace_regv; 343 break; 344 case REG_RCX: 345 rp->r_rcx = t->t_dtrace_regv; 346 break; 347 case REG_R8: 348 rp->r_r8 = t->t_dtrace_regv; 349 break; 350 case REG_R9: 351 rp->r_r9 = t->t_dtrace_regv; 352 break; 353 } 354 } 355 #endif 356 rp->r_pc = t->t_dtrace_npc; 357 t->t_dtrace_ft = 0; 358 return (0); 359 } 360 361 /* 362 * Otherwise, make sure we'll return to the kernel after executing 363 * the copied out instruction and defer the signal. 364 */ 365 if (!t->t_dtrace_step) { 366 ASSERT(rp->r_pc < t->t_dtrace_astpc); 367 rp->r_pc += t->t_dtrace_astpc - t->t_dtrace_scrpc; 368 t->t_dtrace_step = 1; 369 } 370 371 t->t_dtrace_ast = 1; 372 373 return (1); 374 } 375 #endif 376 377 #ifdef notyet 378 static int64_t tgt_cpu_tsc; 379 static int64_t hst_cpu_tsc; 380 #endif 381 static int64_t tsc_skew[MAXCPUS]; 382 static uint64_t nsec_scale; 383 384 /* See below for the explanation of this macro. */ 385 #define SCALE_SHIFT 28 386 387 #ifdef notyet 388 static void 389 dtrace_gethrtime_init_sync(void *arg) 390 { 391 #ifdef CHECK_SYNC 392 /* 393 * Delay this function from returning on one 394 * of the CPUs to check that the synchronisation 395 * works. 396 */ 397 uintptr_t cpu = (uintptr_t) arg; 398 399 if (cpu == cpu_number()) { 400 int i; 401 for (i = 0; i < 1000000000; i++) 402 tgt_cpu_tsc = rdtsc(); 403 tgt_cpu_tsc = 0; 404 } 405 #endif 406 } 407 408 static void 409 dtrace_gethrtime_init_cpu(void *arg) 410 { 411 uintptr_t cpu = (uintptr_t) arg; 412 413 if (cpu == cpu_number()) 414 tgt_cpu_tsc = rdtsc(); 415 else 416 hst_cpu_tsc = rdtsc(); 417 } 418 #endif 419 420 void 421 dtrace_gethrtime_init(void *arg) 422 { 423 uint64_t tsc_f; 424 CPU_INFO_ITERATOR cpuind; 425 struct cpu_info *cinfo = curcpu(); 426 cpuid_t cur_cpuid = cpu_number(); /* current cpu id */ 427 428 /* 429 * Get TSC frequency known at this moment. 430 * This should be constant if TSC is invariant. 431 * Otherwise tick->time conversion will be inaccurate, but 432 * will preserve monotonic property of TSC. 433 */ 434 tsc_f = cpu_frequency(cinfo); 435 436 /* 437 * The following line checks that nsec_scale calculated below 438 * doesn't overflow 32-bit unsigned integer, so that it can multiply 439 * another 32-bit integer without overflowing 64-bit. 440 * Thus minimum supported TSC frequency is 62.5MHz. 441 */ 442 //KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT)), ("TSC frequency is too low")); 443 KASSERT(tsc_f > (NANOSEC >> (32 - SCALE_SHIFT))); 444 445 /* 446 * We scale up NANOSEC/tsc_f ratio to preserve as much precision 447 * as possible. 448 * 2^28 factor was chosen quite arbitrarily from practical 449 * considerations: 450 * - it supports TSC frequencies as low as 62.5MHz (see above); 451 * - it provides quite good precision (e < 0.01%) up to THz 452 * (terahertz) values; 453 */ 454 nsec_scale = ((uint64_t)NANOSEC << SCALE_SHIFT) / tsc_f; 455 456 /* The current CPU is the reference one. */ 457 tsc_skew[cur_cpuid] = 0; 458 459 for (CPU_INFO_FOREACH(cpuind, cinfo)) { 460 /* use skew relative to cpu 0 */ 461 tsc_skew[cpu_index(cinfo)] = cinfo->ci_data.cpu_cc_skew; 462 } 463 464 /* Already handled in x86/tsc.c for ci_data.cpu_cc_skew */ 465 #if 0 466 for (i = 0; i <= mp_maxid; i++) { 467 if (i == curcpu) 468 continue; 469 470 if (pcpu_find(i) == NULL) 471 continue; 472 473 map = 0; 474 map |= (1 << curcpu); 475 map |= (1 << i); 476 477 smp_rendezvous_cpus(map, dtrace_gethrtime_init_sync, 478 dtrace_gethrtime_init_cpu, 479 smp_no_rendevous_barrier, (void *)(uintptr_t) i); 480 481 tsc_skew[i] = tgt_cpu_tsc - hst_cpu_tsc; 482 } 483 #endif 484 } 485 486 /* 487 * DTrace needs a high resolution time function which can 488 * be called from a probe context and guaranteed not to have 489 * instrumented with probes itself. 490 * 491 * Returns nanoseconds since boot. 492 */ 493 uint64_t 494 dtrace_gethrtime() 495 { 496 uint64_t tsc; 497 uint32_t lo; 498 uint32_t hi; 499 500 /* 501 * We split TSC value into lower and higher 32-bit halves and separately 502 * scale them with nsec_scale, then we scale them down by 2^28 503 * (see nsec_scale calculations) taking into account 32-bit shift of 504 * the higher half and finally add. 505 */ 506 tsc = rdtsc() + tsc_skew[cpu_number()]; 507 lo = tsc; 508 hi = tsc >> 32; 509 return (((lo * nsec_scale) >> SCALE_SHIFT) + 510 ((hi * nsec_scale) << (32 - SCALE_SHIFT))); 511 } 512 513 uint64_t 514 dtrace_gethrestime(void) 515 { 516 printf("%s(%d): XXX\n",__func__,__LINE__); 517 return (0); 518 } 519 520 /* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */ 521 int 522 dtrace_trap(struct trapframe *frame, u_int type) 523 { 524 /* 525 * A trap can occur while DTrace executes a probe. Before 526 * executing the probe, DTrace blocks re-scheduling and sets 527 * a flag in it's per-cpu flags to indicate that it doesn't 528 * want to fault. On returning from the the probe, the no-fault 529 * flag is cleared and finally re-scheduling is enabled. 530 * 531 * Check if DTrace has enabled 'no-fault' mode: 532 * 533 */ 534 if ((cpu_core[cpu_number()].cpuc_dtrace_flags & CPU_DTRACE_NOFAULT) != 0) { 535 /* 536 * There are only a couple of trap types that are expected. 537 * All the rest will be handled in the usual way. 538 */ 539 switch (type) { 540 /* Privilieged instruction fault. */ 541 case T_PRIVINFLT: 542 break; 543 /* General protection fault. */ 544 case T_PROTFLT: 545 /* Flag an illegal operation. */ 546 cpu_core[cpu_number()].cpuc_dtrace_flags |= CPU_DTRACE_ILLOP; 547 548 /* 549 * Offset the instruction pointer to the instruction 550 * following the one causing the fault. 551 */ 552 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 553 return (1); 554 /* Page fault. */ 555 case T_PAGEFLT: 556 /* Flag a bad address. */ 557 cpu_core[cpu_number()].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR; 558 cpu_core[cpu_number()].cpuc_dtrace_illval = rcr2(); 559 560 /* 561 * Offset the instruction pointer to the instruction 562 * following the one causing the fault. 563 */ 564 frame->tf_rip += dtrace_instr_size((u_char *) frame->tf_rip); 565 return (1); 566 default: 567 /* Handle all other traps in the usual way. */ 568 break; 569 } 570 } 571 572 /* Handle the trap in the usual way. */ 573 return (0); 574 } 575