1*a77ebd86Schristos#------------------------------------------------------------------------------ 2*a77ebd86Schristos# $File: ringdove,v 1.1 2022/08/16 12:04:30 christos Exp $ 3*a77ebd86Schristos# ringdove: file(1) magic for RingdoveEDA data files 4*a77ebd86Schristos 5*a77ebd86Schristos# librnd and global 6*a77ebd86Schristos0 regex/128l ha:rnd-menu-v[0-9]+[\ \t\r\n]*[{] librnd menu system (lihata) 7*a77ebd86Schristos0 regex/128l ha:rnd-menu-patch-v[0-9]+[\ \t\r\n]*[{] librnd menu patch (lihata) 8*a77ebd86Schristos0 regex/128l ha:coraleda-project-v[0-9]+[\ \t\r\n]*[{] CoralEDA/Ringdove project file (lihata) 9*a77ebd86Schristos0 regex/128l ha:ringdove-project-v[0-9]+[\ \t\r\n]*[{] Ringdove project file (lihata) 10*a77ebd86Schristos 11*a77ebd86Schristos# pcb-rnd 12*a77ebd86Schristos0 regex/128l ha:pcb-rnd-board-v[0-9]+[\ \t\r\n]*[{] pcb-rnd board file (lihata) 13*a77ebd86Schristos0 regex/128l li:pcb-rnd-subcircuit-v[0-9]+[\ \t\r\n]*[{] pcb-rnd subcircuit/footprint file (lihata) 14*a77ebd86Schristos0 regex/128l ha:pcb-rnd-buffer-v[0-9]+[\ \t\r\n]*[{] pcb-rnd paste buffer content (lihata) 15*a77ebd86Schristos0 regex/128l li:pcb-rnd-conf-v[0-9]+[\ \t\r\n]*[{] pcb-rnd configuration (lihata) 16*a77ebd86Schristos0 regex/128l ha:pcb-rnd-drc-query-v[0-9]+[\ \t\r\n]*[{] pcb-rnd drc query string (lihata) 17*a77ebd86Schristos0 regex/128l li:pcb-rnd-font-v[0-9]+[\ \t\r\n]*[{] pcb-rnd vector font (lihata) 18*a77ebd86Schristos0 regex/128l ha:pcb-rnd-log-v[0-9]+[\ \t\r\n]*[{] pcb-rnd message log dump (lihata) 19*a77ebd86Schristos0 regex/128l ha:pcb-rnd-padstack-v[0-9]+[\ \t\r\n]*[{] pcb-rnd padstack (lihata) 20*a77ebd86Schristos0 regex/128l li:pcb-rnd-view-list-v[0-9]+[\ \t\r\n]*[{] pcb-rnd view list (lihata) 21*a77ebd86Schristos0 regex/128l li:view-list-v[0-9]+[\ \t\r\n]*[{] pcb-rnd view list (lihata) 22*a77ebd86Schristos0 search Netlist(Freeze) pcb-rnd or gEDA/PCB netlist forward annotation action script 23*a77ebd86Schristos 24*a77ebd86Schristos# sch-rnd (cschem data model) 25*a77ebd86Schristos0 regex/128l li:cschem-buffer-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem buffer content (lihata) 26*a77ebd86Schristos0 regex/128l li:sch-rnd-conf-v[0-9]+[\ \t\r\n]*[{] sch-rnd configuration (lihata) 27*a77ebd86Schristos0 regex/128l ha:std_devmap.v[0-9]+[\ \t\r\n]*[{] sch-rnd devmap (device mapping; lihata) 28*a77ebd86Schristos0 regex/128l li:cschem-group-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem group or symbol (lihata) 29*a77ebd86Schristos0 regex/128l ha:cschem-sheet-v[0-9]+[\ \t\r\n]*[{] sch-rnd/cschem schematic sheet (lihata) 30*a77ebd86Schristos 31*a77ebd86Schristos# tEDAx (modular format) 32*a77ebd86Schristos0 regex/1l tEDAx[\ \t\r\n]v tEDAx (Trivial EDA eXchange) 33*a77ebd86Schristos>0 regex begin\ symbol\ v with schematic symbol 34*a77ebd86Schristos>0 regex begin\ board\ v with Printed Circuit Board 35*a77ebd86Schristos>0 regex begin\ route_req\ v with PCB routing request 36*a77ebd86Schristos>0 regex begin\ route_res\ v with PCB routing result 37*a77ebd86Schristos>0 regex begin\ camv_layer\ v with camv-rnd exported layer 38*a77ebd86Schristos>0 regex begin\ netlist\ v with netlist 39*a77ebd86Schristos>0 regex begin\ backann\ v with Ringdove EDA back annotation 40*a77ebd86Schristos>0 regex begin\ footprint\ v with PCB footprint 41*a77ebd86Schristos>0 regex begin\ drc\ v with PCB DRC script 42*a77ebd86Schristos>0 regex begin\ drc_query_rule\ v with pcb-rnd drc_query rules 43*a77ebd86Schristos>0 regex begin\ drc_query_def\ v with pcb-rnd drc_query value/config definitions 44*a77ebd86Schristos>0 regex begin\ etest\ v with PCB electric test 45*a77ebd86Schristos 46